diff --git a/.appveyor.yml b/.appveyor.yml index 4329b47e0..54ad4f01b 100644 --- a/.appveyor.yml +++ b/.appveyor.yml @@ -8,6 +8,7 @@ skip_tags: true skip_commits: files: + - .drone.yml - .github/** - .travis.yml - docs/** diff --git a/.drone.yml b/.drone.yml new file mode 100644 index 000000000..a8c2c21d3 --- /dev/null +++ b/.drone.yml @@ -0,0 +1,214 @@ +--- +kind: pipeline +type: docker +name: lint + +# Run this in a separate pipeline so that it will build even if this fails +steps: +- name: lint + image: xeniaproject/buildenv:2021-06-21 + commands: + - clang-format --version + - ./xenia-build lint --all + +--- +kind: pipeline +type: docker +name: x86_64-linux +platform: + os: linux + arch: amd64 + +# Some expressions in this file are duplicates. Scripting support is +# available using jsonnet but increases complexity +# https://docs.drone.io/pipeline/scripting/jsonnet/ + +# These volumes will be mounted at the build directory, allowing to +# run different premake toolchains from the same source tree +volumes: +- name: build-premake + temp: {} +- name: build-cmake + temp: {} + +steps: +# +# Setup the source tree +# +- name: clone-submodules + image: xeniaproject/buildenv:2021-06-21 + commands: + - pwd + # May miss recursive submodules (but faster than xb setup) + - git submodule update --init --depth 1 -j $(nproc) + + +# +# Setup the two build systems +# + +# Native premake Makefiles for production +- name: toolchain-premake + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-premake + path: /drone/src/build + commands: + - $CXX --version + - $AR --version + - python3 --version + - ./xenia-build premake + depends_on: + - clone-submodules + +# Development toolchain +- name: toolchain-cmake + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-cmake + path: /drone/src/build + commands: + - | + ./xenia-build premake --devenv=cmake + cd build + for c in Debug Release + do + mkdir cmake-$c + cd cmake-$c + cmake -DCMAKE_BUILD_TYPE=$c .. + cd .. + done + depends_on: + # Premake itself needs to be build first: + - toolchain-premake + + +# +# Building +# + +- name: build-premake-debug-all + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-premake + path: /drone/src/build + commands: + - ./xenia-build build --no_premake -j$(nproc) --config=Debug + depends_on: + - toolchain-premake + +- name: build-premake-release-tests + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-premake + path: /drone/src/build + commands: + - ./xenia-build build --no_premake -j$(nproc) --config=Release --target=xenia-base-tests + depends_on: + - toolchain-premake + +- name: build-premake-release-all + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-premake + path: /drone/src/build + commands: + - ./xenia-build build --no_premake -j$(nproc) --config=Release + depends_on: + - build-premake-release-tests + +- name: build-cmake-debug-all + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-cmake + path: /drone/src/build + commands: + - cd build/cmake-Debug + - cmake --build . -j$(nproc) + depends_on: + - toolchain-cmake + +- name: build-cmake-release-tests + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-cmake + path: /drone/src/build + commands: + - cd build/cmake-Release + - cmake --build . -j$(nproc) --target xenia-base-tests + depends_on: + - toolchain-cmake + +- name: build-cmake-release-all + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-cmake + path: /drone/src/build + commands: + - cd build/cmake-Release + - cmake --build . -j$(nproc) + depends_on: + - build-cmake-release-tests + + +# +# Tests +# + +- name: test-premake + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-premake + path: /drone/src/build + commands: + - ./build/bin/Linux/Release/xenia-base-tests + depends_on: + - build-premake-release-tests + +- name: test-cmake + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-cmake + path: /drone/src/build + commands: + - ./build/bin/Linux/Release/xenia-base-tests + depends_on: + - build-cmake-release-tests + + +# +# Stat +# + +- name: stat + image: xeniaproject/buildenv:2021-06-21 + volumes: + - name: build-premake + path: /build-premake + - name: build-cmake + path: /build-cmake + commands: + - | + header() { + SEP='============================================================' + echo + echo $SEP + echo $@ + echo $SEP + } + + for v in premake cmake + do + for c in Debug Release + do + header $v $c + p=/build-$v/bin/Linux/$c + ls -la $p + sha256sum $p/* + done + done + depends_on: + - build-premake-debug-all + - build-premake-release-all + - build-cmake-debug-all + - build-cmake-release-all diff --git a/.gitattributes b/.gitattributes index 4bcb1169e..3d2ef7fa7 100644 --- a/.gitattributes +++ b/.gitattributes @@ -7,3 +7,5 @@ *.csproj text eol=crlf -whitespace merge=union *.vcxproj text eol=crlf -whitespace merge=union *.props text eol=crlf -whitespace merge=union + +src/**/shaders/bytecode/** linguist-generated=true diff --git a/.gitmodules b/.gitmodules index 35b49aab7..630625cc5 100644 --- a/.gitmodules +++ b/.gitmodules @@ -48,7 +48,7 @@ url = https://github.com/jarro2783/cxxopts.git [submodule "third_party/SDL2"] path = third_party/SDL2 - url = https://github.com/JoelLinn/SDL.git + url = https://github.com/libsdl-org/SDL.git [submodule "third_party/utfcpp"] path = third_party/utfcpp url = https://github.com/xenia-project/utfcpp.git diff --git a/.travis.yml b/.travis.yml deleted file mode 100644 index 188278034..000000000 --- a/.travis.yml +++ /dev/null @@ -1,73 +0,0 @@ -# Make Travis use docker (for faster builds, in theory). - -language: cpp -os: - - linux - -dist: bionic -addons: - apt: - sources: - - ubuntu-toolchain-r-test - - llvm-toolchain-9 - packages: - - clang-9 - - clang-format-9 - - llvm-9-dev - - g++-8 - - python3 - - libc++-dev - - libc++abi-dev - - libgtk-3-dev - - libpthread-stubs0-dev - - libsdl2-dev - #- libvulkan1 - #- libvulkan-dev - - libx11-dev - - liblz4-dev - -jobs: - include: - - env: C_COMPILER=clang-9 CXX_COMPILER=clang++-9 AR_COMPILER=llvm-ar-9 LINT=true - - env: C_COMPILER=clang-9 CXX_COMPILER=clang++-9 AR_COMPILER=llvm-ar-9 BUILD=true CONFIG=Debug - - env: C_COMPILER=clang-9 CXX_COMPILER=clang++-9 AR_COMPILER=llvm-ar-9 BUILD=true CONFIG=Release - -git: - # We handle submodules ourselves in xenia-build setup. - submodules: false - -before_script: - - export LIBVULKAN_VERSION=1.1.70 - - export CXX=$CXX_COMPILER - - export CC=$C_COMPILER - - export AR=$AR_COMPILER - # Dump useful info. - - $CXX --version - - $AR_COMPILER --version - - python3 --version - - clang-format-9 --version - - clang-format-9 -style=file -dump-config - # Add Vulkan dependencies. - - travis_retry wget http://mirrors.kernel.org/ubuntu/pool/universe/v/vulkan/libvulkan1_$LIBVULKAN_VERSION+dfsg1-1_amd64.deb - - travis_retry wget http://mirrors.kernel.org/ubuntu/pool/universe/v/vulkan/libvulkan-dev_$LIBVULKAN_VERSION+dfsg1-1_amd64.deb - - if [[ $BUILD == true ]]; then sudo dpkg -i libvulkan1_$LIBVULKAN_VERSION+dfsg1-1_amd64.deb libvulkan-dev_$LIBVULKAN_VERSION+dfsg1-1_amd64.deb; fi - # Prepare environment (pull dependencies, build tools). - - travis_retry ./xenia-build setup - -script: - # Run linter. - - if [[ $LINT == true ]]; then ./xenia-build lint --all; fi - - # Build and run base tests. - - if [[ $BUILD == true ]]; then ./xenia-build build --config=$CONFIG --target=xenia-base-tests; fi - - if [[ $BUILD == true ]]; then ./build/bin/Linux/$CONFIG/xenia-base-tests; fi - # Build and run ppc tests. - - if [[ $BUILD == true ]]; then ./xenia-build build --config=$CONFIG --target=xenia-cpu-ppc-tests; fi - # - if [[ $BUILD == true ]]; then ./build/bin/Linux/$CONFIG/xenia-cpu-ppc-tests --log_file=stdout; fi - - # Build all of xenia. - - if [[ $BUILD == true ]]; then ./xenia-build build --config=$CONFIG; fi - # All tests (without haswell support). - #- ./xenia-build test --config=debug --no-build -- --enable_haswell_instructions=false - # All tests (with haswell support). - #- ./xenia-build test --config=debug --no-build -- --enable_haswell_instructions=true diff --git a/README.md b/README.md index b47f9551a..24599aed2 100644 --- a/README.md +++ b/README.md @@ -24,7 +24,7 @@ Discussing illegal activities will get you banned. Buildbot | Status -------- | ------ [Windows](https://ci.appveyor.com/project/benvanik/xenia/branch/master) | [![Build status](https://ci.appveyor.com/api/projects/status/ftqiy86kdfawyx3a/branch/master?svg=true)](https://ci.appveyor.com/project/benvanik/xenia/branch/master) -[Linux](https://travis-ci.org/xenia-project/xenia) | [![Build status](https://travis-ci.org/xenia-project/xenia.svg?branch=master)](https://travis-ci.org/xenia-project/xenia) +[Linux](https://cloud.drone.io/xenia-project/xenia) | [![Build status](https://cloud.drone.io/api/badges/xenia-project/xenia/status.svg)](https://cloud.drone.io/xenia-project/xenia) Quite a few real games run. Quite a few don't. See the [Game compatibility list](https://github.com/xenia-project/game-compatibility/issues) diff --git a/docs/building.md b/docs/building.md index 0a70fb206..a02cd989d 100644 --- a/docs/building.md +++ b/docs/building.md @@ -99,7 +99,7 @@ Clang-9 or newer should be available from system repositories on all up to date You will also need some development libraries. To get them on an Ubuntu system: ```bash -sudo apt-get install libgtk-3-dev libpthread-stubs0-dev liblz4-dev libx11-dev libvulkan-dev libsdl2-dev libiberty-dev libunwind-dev libc++-dev libc++abi-dev +sudo apt-get install libgtk-3-dev libpthread-stubs0-dev liblz4-dev libx11-dev libx11-xcb-dev libvulkan-dev libsdl2-dev libiberty-dev libunwind-dev libc++-dev libc++abi-dev ``` In addition, you will need up to date Vulkan libraries and drivers for your hardware, which most distributions have in their standard repositories nowadays. diff --git a/premake5.lua b/premake5.lua index 32ac81550..e44f81c71 100644 --- a/premake5.lua +++ b/premake5.lua @@ -99,8 +99,8 @@ filter("platforms:Linux") toolset("clang") buildoptions({ -- "-mlzcnt", -- (don't) Assume lzcnt is supported. - ({os.outputof("pkg-config --cflags gtk+-x11-3.0")})[1], }) + pkg_config.all("gtk+-x11-3.0") links({ "stdc++fs", "dl", @@ -108,9 +108,6 @@ filter("platforms:Linux") "pthread", "rt", }) - linkoptions({ - ({os.outputof("pkg-config --libs gtk+-3.0")})[1], - }) filter({"platforms:Linux", "kind:*App"}) linkgroups("On") @@ -234,7 +231,6 @@ workspace("xenia") include("third_party/mspack.lua") include("third_party/snappy.lua") include("third_party/spirv-tools.lua") - include("third_party/volk.lua") include("third_party/xxhash.lua") if not os.istarget("android") then diff --git a/src/xenia/app/emulator_window.cc b/src/xenia/app/emulator_window.cc index a47edf27b..1b38a8f96 100644 --- a/src/xenia/app/emulator_window.cc +++ b/src/xenia/app/emulator_window.cc @@ -24,6 +24,7 @@ #include "xenia/ui/file_picker.h" #include "xenia/ui/imgui_dialog.h" #include "xenia/ui/imgui_drawer.h" +#include "xenia/ui/virtual_key.h" // Autogenerated by `xb premake`. #include "build/version.h" @@ -53,7 +54,12 @@ EmulatorWindow::EmulatorWindow(Emulator* emulator) " CHECKED" #endif #endif - " (" XE_BUILD_BRANCH "/" XE_BUILD_COMMIT_SHORT "/" XE_BUILD_DATE + " (" +#ifdef XE_BUILD_IS_PR + "PR#" XE_BUILD_PR_NUMBER " " XE_BUILD_PR_REPO + " " XE_BUILD_PR_BRANCH "@" XE_BUILD_PR_COMMIT_SHORT " against " +#endif + XE_BUILD_BRANCH "@" XE_BUILD_COMMIT_SHORT " on " XE_BUILD_DATE ")"; } @@ -93,49 +99,49 @@ bool EmulatorWindow::Initialize() { window_->on_key_down.AddListener([this](KeyEvent* e) { bool handled = true; - switch (e->key_code()) { - case 0x4F: { // o + switch (e->virtual_key()) { + case ui::VirtualKey::kO: { if (e->is_ctrl_pressed()) { FileOpen(); } } break; - case 0x6A: { // numpad * + case ui::VirtualKey::kMultiply: { CpuTimeScalarReset(); } break; - case 0x6D: { // numpad minus + case ui::VirtualKey::kSubtract: { CpuTimeScalarSetHalf(); } break; - case 0x6B: { // numpad plus + case ui::VirtualKey::kAdd: { CpuTimeScalarSetDouble(); } break; - case 0x72: { // F3 + case ui::VirtualKey::kF3: { Profiler::ToggleDisplay(); } break; - case 0x73: { // VK_F4 + case ui::VirtualKey::kF4: { GpuTraceFrame(); } break; - case 0x74: { // VK_F5 + case ui::VirtualKey::kF5: { GpuClearCaches(); } break; - case 0x76: { // VK_F7 + case ui::VirtualKey::kF7: { // Save to file // TODO: Choose path based on user input, or from options // TODO: Spawn a new thread to do this. emulator()->SaveToFile("test.sav"); } break; - case 0x77: { // VK_F8 + case ui::VirtualKey::kF8: { // Restore from file // TODO: Choose path from user // TODO: Spawn a new thread to do this. emulator()->RestoreFromFile("test.sav"); } break; - case 0x7A: { // VK_F11 + case ui::VirtualKey::kF11: { ToggleFullscreen(); } break; - case 0x1B: { // VK_ESCAPE - // Allow users to escape fullscreen (but not enter it). + case ui::VirtualKey::kEscape: { + // Allow users to escape fullscreen (but not enter it). if (window_->is_fullscreen()) { window_->ToggleFullscreen(false); } else { @@ -143,18 +149,18 @@ bool EmulatorWindow::Initialize() { } } break; - case 0x13: { // VK_PAUSE + case ui::VirtualKey::kPause: { CpuBreakIntoDebugger(); } break; - case 0x03: { // VK_CANCEL + case ui::VirtualKey::kCancel: { CpuBreakIntoHostDebugger(); } break; - case 0x70: { // VK_F1 + case ui::VirtualKey::kF1: { ShowHelpWebsite(); } break; - case 0x71: { // VK_F2 + case ui::VirtualKey::kF2: { ShowCommitID(); } break; @@ -425,8 +431,13 @@ void EmulatorWindow::ToggleFullscreen() { void EmulatorWindow::ShowHelpWebsite() { LaunchWebBrowser("https://xenia.jp"); } void EmulatorWindow::ShowCommitID() { +#ifdef XE_BUILD_IS_PR + LaunchWebBrowser( + "https://github.com/xenia-project/xenia/pull/" XE_BUILD_PR_NUMBER); +#else LaunchWebBrowser( "https://github.com/xenia-project/xenia/commit/" XE_BUILD_COMMIT "/"); +#endif } void EmulatorWindow::UpdateTitle() { diff --git a/src/xenia/app/premake5.lua b/src/xenia/app/premake5.lua index fcfacf499..66f8beaa2 100644 --- a/src/xenia/app/premake5.lua +++ b/src/xenia/app/premake5.lua @@ -43,7 +43,6 @@ project("xenia-app") "mspack", "snappy", "spirv-tools", - "volk", "xxhash", }) defines({ diff --git a/src/xenia/app/xenia_main.cc b/src/xenia/app/xenia_main.cc index 342d5cc2b..91c71d822 100644 --- a/src/xenia/app/xenia_main.cc +++ b/src/xenia/app/xenia_main.cc @@ -329,6 +329,22 @@ int xenia_main(const std::vector& args) { emulator->file_system()->RegisterSymbolicLink("cache1:", "\\CACHE1"); } } + + // Some (older?) games try accessing cache:\ too + // NOTE: this must be registered _after_ the cache0/cache1 devices, due to + // substring/start_with logic inside VirtualFileSystem::ResolvePath, else + // accesses to those devices will go here instead + auto cache_device = + std::make_unique("\\CACHE", "cache", false); + if (!cache_device->Initialize()) { + XELOGE("Unable to scan cache path"); + } else { + if (!emulator->file_system()->RegisterDevice(std::move(cache_device))) { + XELOGE("Unable to register cache path"); + } else { + emulator->file_system()->RegisterSymbolicLink("cache:", "\\CACHE"); + } + } } // Set a debug handler. diff --git a/src/xenia/apu/audio_system.cc b/src/xenia/apu/audio_system.cc index 67bf34ae3..c137a4853 100644 --- a/src/xenia/apu/audio_system.cc +++ b/src/xenia/apu/audio_system.cc @@ -223,7 +223,7 @@ void AudioSystem::UnregisterClient(size_t index) { } bool AudioSystem::Save(ByteStream* stream) { - stream->Write('XAUD'); + stream->Write(kAudioSaveSignature); // Count the number of used clients first. // Any gaps should be handled gracefully. @@ -251,7 +251,7 @@ bool AudioSystem::Save(ByteStream* stream) { } bool AudioSystem::Restore(ByteStream* stream) { - if (stream->Read() != 'XAUD') { + if (stream->Read() != kAudioSaveSignature) { XELOGE("AudioSystem::Restore - Invalid magic value!"); return false; } diff --git a/src/xenia/apu/audio_system.h b/src/xenia/apu/audio_system.h index 014a1dc8d..db6a29d37 100644 --- a/src/xenia/apu/audio_system.h +++ b/src/xenia/apu/audio_system.h @@ -23,6 +23,8 @@ namespace xe { namespace apu { +constexpr fourcc_t kAudioSaveSignature = make_fourcc("XAUD"); + class AudioDriver; class XmaDecoder; diff --git a/src/xenia/apu/conversion.h b/src/xenia/apu/conversion.h new file mode 100644 index 000000000..211243348 --- /dev/null +++ b/src/xenia/apu/conversion.h @@ -0,0 +1,119 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_APU_CONVERSION_H_ +#define XENIA_APU_CONVERSION_H_ + +#include + +#include "xenia/base/byte_order.h" +#include "xenia/base/platform.h" + +namespace xe { +namespace apu { +namespace conversion { + +#if XE_ARCH_AMD64 +inline void sequential_6_BE_to_interleaved_6_LE(float* output, + const float* input, + size_t ch_sample_count) { + const uint32_t* in = reinterpret_cast(input); + uint32_t* out = reinterpret_cast(output); + const __m128i byte_swap_shuffle = + _mm_set_epi8(12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3); + for (size_t sample = 0; sample < ch_sample_count; sample++) { + __m128i sample0 = _mm_set_epi32( + in[3 * ch_sample_count + sample], in[2 * ch_sample_count + sample], + in[1 * ch_sample_count + sample], in[0 * ch_sample_count + sample]); + uint32_t sample1 = in[4 * ch_sample_count + sample]; + uint32_t sample2 = in[5 * ch_sample_count + sample]; + sample0 = _mm_shuffle_epi8(sample0, byte_swap_shuffle); + _mm_storeu_si128(reinterpret_cast<__m128i*>(&out[sample * 6]), sample0); + sample1 = xe::byte_swap(sample1); + out[sample * 6 + 4] = sample1; + sample2 = xe::byte_swap(sample2); + out[sample * 6 + 5] = sample2; + } +} + +inline void sequential_6_BE_to_interleaved_2_LE(float* output, + const float* input, + size_t ch_sample_count) { + assert_true(ch_sample_count % 4 == 0); + const uint32_t* in = reinterpret_cast(input); + uint32_t* out = reinterpret_cast(output); + const __m128i byte_swap_shuffle = + _mm_set_epi8(12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3); + const __m128 half = _mm_set1_ps(0.5f); + const __m128 two_fifths = _mm_set1_ps(1.0f / 2.5f); + + // put center on left and right, discard low frequency + for (size_t sample = 0; sample < ch_sample_count; sample += 4) { + // load 4 samples from 6 channels each + __m128 fl = _mm_loadu_ps(&input[0 * ch_sample_count + sample]); + __m128 fr = _mm_loadu_ps(&input[1 * ch_sample_count + sample]); + __m128 fc = _mm_loadu_ps(&input[2 * ch_sample_count + sample]); + __m128 bl = _mm_loadu_ps(&input[4 * ch_sample_count + sample]); + __m128 br = _mm_loadu_ps(&input[5 * ch_sample_count + sample]); + // byte swap + fl = _mm_castsi128_ps( + _mm_shuffle_epi8(_mm_castps_si128(fl), byte_swap_shuffle)); + fr = _mm_castsi128_ps( + _mm_shuffle_epi8(_mm_castps_si128(fr), byte_swap_shuffle)); + fc = _mm_castsi128_ps( + _mm_shuffle_epi8(_mm_castps_si128(fc), byte_swap_shuffle)); + bl = _mm_castsi128_ps( + _mm_shuffle_epi8(_mm_castps_si128(bl), byte_swap_shuffle)); + br = _mm_castsi128_ps( + _mm_shuffle_epi8(_mm_castps_si128(br), byte_swap_shuffle)); + + __m128 center_halved = _mm_mul_ps(fc, half); + __m128 left = _mm_add_ps(_mm_add_ps(fl, bl), center_halved); + __m128 right = _mm_add_ps(_mm_add_ps(fr, br), center_halved); + left = _mm_mul_ps(left, two_fifths); + right = _mm_mul_ps(right, two_fifths); + _mm_storeu_ps(&output[sample * 2], _mm_unpacklo_ps(left, right)); + _mm_storeu_ps(&output[(sample + 2) * 2], _mm_unpackhi_ps(left, right)); + } +} +#else +inline void sequential_6_BE_to_interleaved_6_LE(float* output, + const float* input, + size_t ch_sample_count) { + for (size_t sample = 0; sample < ch_sample_count; sample++) { + for (size_t channel = 0; channel < 6; channel++) { + output[sample * 6 + channel] = + xe::byte_swap(input[channel * ch_sample_count + sample]); + } + } +} +inline void sequential_6_BE_to_interleaved_2_LE(float* output, + const float* input, + size_t ch_sample_count) { + // Default 5.1 channel mapping is fl, fr, fc, lf, bl, br + // https://docs.microsoft.com/en-us/windows/win32/xaudio2/xaudio2-default-channel-mapping + for (size_t sample = 0; sample < ch_sample_count; sample++) { + // put center on left and right, discard low frequency + float fl = xe::byte_swap(input[0 * ch_sample_count + sample]); + float fr = xe::byte_swap(input[1 * ch_sample_count + sample]); + float fc = xe::byte_swap(input[2 * ch_sample_count + sample]); + float br = xe::byte_swap(input[4 * ch_sample_count + sample]); + float bl = xe::byte_swap(input[5 * ch_sample_count + sample]); + float center_halved = fc * 0.5f; + output[sample * 2] = (fl + bl + center_halved) * (1.0f / 2.5f); + output[sample * 2 + 1] = (fr + br + center_halved) * (1.0f / 2.5f); + } +} +#endif + +} // namespace conversion +} // namespace apu +} // namespace xe + +#endif diff --git a/src/xenia/apu/sdl/sdl_audio_driver.cc b/src/xenia/apu/sdl/sdl_audio_driver.cc index a16e9e5d1..bdda565e1 100644 --- a/src/xenia/apu/sdl/sdl_audio_driver.cc +++ b/src/xenia/apu/sdl/sdl_audio_driver.cc @@ -10,9 +10,13 @@ #include "xenia/apu/sdl/sdl_audio_driver.h" #include +#include #include "xenia/apu/apu_flags.h" +#include "xenia/apu/conversion.h" +#include "xenia/base/assert.h" #include "xenia/base/logging.h" +#include "xenia/base/profiling.h" #include "xenia/helper/sdl/sdl_helper.h" namespace xe { @@ -46,41 +50,37 @@ bool SDLAudioDriver::Initialize() { } sdl_initialized_ = true; - SDL_AudioCallback audio_callback = [](void* userdata, Uint8* stream, - int len) -> void { - assert_true(len == frame_size_); - const auto driver = static_cast(userdata); - - std::unique_lock guard(driver->frames_mutex_); - if (driver->frames_queued_.empty()) { - memset(stream, 0, len); - } else { - auto buffer = driver->frames_queued_.front(); - driver->frames_queued_.pop(); - if (cvars::mute) { - memset(stream, 0, len); - } else { - memcpy(stream, buffer, len); - } - driver->frames_unused_.push(buffer); - - auto ret = driver->semaphore_->Release(1, nullptr); - assert_true(ret); + SDL_AudioSpec desired_spec = {}; + SDL_AudioSpec obtained_spec; + desired_spec.freq = frame_frequency_; + desired_spec.format = AUDIO_F32; + desired_spec.channels = frame_channels_; + desired_spec.samples = channel_samples_; + desired_spec.callback = SDLCallback; + desired_spec.userdata = this; + // Allow the hardware to decide between 5.1 and stereo + int allowed_change = SDL_AUDIO_ALLOW_CHANNELS_CHANGE; + for (int i = 0; i < 2; i++) { + sdl_device_id_ = SDL_OpenAudioDevice(nullptr, 0, &desired_spec, + &obtained_spec, allowed_change); + if (sdl_device_id_ <= 0) { + XELOGE("SDL_OpenAudioDevice() failed."); + return false; } - }; - - SDL_AudioSpec wanted_spec = {}; - wanted_spec.freq = frame_frequency_; - wanted_spec.format = AUDIO_F32; - wanted_spec.channels = frame_channels_; - wanted_spec.samples = channel_samples_; - wanted_spec.callback = audio_callback; - wanted_spec.userdata = this; - sdl_device_id_ = SDL_OpenAudioDevice(nullptr, 0, &wanted_spec, nullptr, 0); + if (obtained_spec.channels == 2 || obtained_spec.channels == 6) { + break; + } + // If the system is 4 or 7.1, let SDL convert + allowed_change = 0; + SDL_CloseAudioDevice(sdl_device_id_); + sdl_device_id_ = -1; + } if (sdl_device_id_ <= 0) { - XELOGE("SDL_OpenAudioDevice() failed."); + XELOGE("Failed to get a compatible SDL Audio Device."); return false; } + sdl_device_channels_ = obtained_spec.channels; + SDL_PauseAudioDevice(sdl_device_id_, 0); return true; @@ -99,13 +99,7 @@ void SDLAudioDriver::SubmitFrame(uint32_t frame_ptr) { } } - // interleave the data - for (size_t index = 0, o = 0; index < channel_samples_; ++index) { - for (size_t channel = 0, table = 0; channel < frame_channels_; - ++channel, table += channel_samples_) { - output_frame[o++] = xe::byte_swap(input_frame[table + index]); - } - } + std::memcpy(output_frame, input_frame, frame_samples_ * sizeof(float)); { std::unique_lock guard(frames_mutex_); @@ -133,6 +127,45 @@ void SDLAudioDriver::Shutdown() { }; } +void SDLAudioDriver::SDLCallback(void* userdata, Uint8* stream, int len) { + SCOPE_profile_cpu_f("apu"); + if (!userdata || !stream) { + XELOGE("SDLAudioDriver::sdl_callback called with nullptr."); + return; + } + const auto driver = static_cast(userdata); + assert_true(len == + sizeof(float) * channel_samples_ * driver->sdl_device_channels_); + + std::unique_lock guard(driver->frames_mutex_); + if (driver->frames_queued_.empty()) { + std::memset(stream, 0, len); + } else { + auto buffer = driver->frames_queued_.front(); + driver->frames_queued_.pop(); + if (cvars::mute) { + std::memset(stream, 0, len); + } else { + switch (driver->sdl_device_channels_) { + case 2: + conversion::sequential_6_BE_to_interleaved_2_LE( + reinterpret_cast(stream), buffer, channel_samples_); + break; + case 6: + conversion::sequential_6_BE_to_interleaved_6_LE( + reinterpret_cast(stream), buffer, channel_samples_); + break; + default: + assert_unhandled_case(driver->sdl_device_channels_); + break; + } + } + driver->frames_unused_.push(buffer); + + auto ret = driver->semaphore_->Release(1, nullptr); + assert_true(ret); + } +}; } // namespace sdl } // namespace apu } // namespace xe diff --git a/src/xenia/apu/sdl/sdl_audio_driver.h b/src/xenia/apu/sdl/sdl_audio_driver.h index cb957105f..3d32b86e0 100644 --- a/src/xenia/apu/sdl/sdl_audio_driver.h +++ b/src/xenia/apu/sdl/sdl_audio_driver.h @@ -32,10 +32,13 @@ class SDLAudioDriver : public AudioDriver { void Shutdown(); protected: + static void SDLCallback(void* userdata, Uint8* stream, int len); + xe::threading::Semaphore* semaphore_ = nullptr; SDL_AudioDeviceID sdl_device_id_ = -1; bool sdl_initialized_ = false; + uint8_t sdl_device_channels_ = 0; static const uint32_t frame_frequency_ = 48000; static const uint32_t frame_channels_ = 6; diff --git a/src/xenia/apu/xaudio2/xaudio2_audio_driver.cc b/src/xenia/apu/xaudio2/xaudio2_audio_driver.cc index 4d3ef9c37..f393706c9 100644 --- a/src/xenia/apu/xaudio2/xaudio2_audio_driver.cc +++ b/src/xenia/apu/xaudio2/xaudio2_audio_driver.cc @@ -13,6 +13,7 @@ #include "xenia/base/platform_win.h" #include "xenia/apu/apu_flags.h" +#include "xenia/apu/conversion.h" #include "xenia/base/clock.h" #include "xenia/base/logging.h" @@ -208,12 +209,8 @@ void XAudio2AudioDriver::SubmitFrame(uint32_t frame_ptr) { auto interleave_channels = frame_channels_; // interleave the data - for (uint32_t index = 0, o = 0; index < channel_samples_; ++index) { - for (uint32_t channel = 0, table = 0; channel < interleave_channels; - ++channel, table += channel_samples_) { - output_frame[o++] = xe::byte_swap(input_frame[table + index]); - } - } + conversion::sequential_6_BE_to_interleaved_6_LE(output_frame, input_frame, + channel_samples_); api::XAUDIO2_BUFFER buffer; buffer.Flags = 0; diff --git a/src/xenia/apu/xma_context.cc b/src/xenia/apu/xma_context.cc index 7a1701aaf..9791cba85 100644 --- a/src/xenia/apu/xma_context.cc +++ b/src/xenia/apu/xma_context.cc @@ -16,6 +16,7 @@ #include "xenia/apu/xma_helpers.h" #include "xenia/base/bit_stream.h" #include "xenia/base/logging.h" +#include "xenia/base/platform.h" #include "xenia/base/profiling.h" #include "xenia/base/ring_buffer.h" @@ -351,14 +352,12 @@ void XmaContext::Decode(XMA_CONTEXT_DATA* data) { output_rb.set_read_offset(output_read_offset); output_rb.set_write_offset(output_write_offset); - int num_channels = data->is_stereo ? 2 : 1; - // We can only decode an entire frame and write it out at a time, so // don't save any samples. // TODO(JoelLinn): subframes when looping size_t output_remaining_bytes = output_rb.write_count(); output_remaining_bytes -= - output_remaining_bytes % (kBytesPerFrameChannel * num_channels); + output_remaining_bytes % (kBytesPerFrameChannel << data->is_stereo); // is_dirty_ = true; // TODO // is_dirty_ = false; // TODO @@ -486,7 +485,7 @@ void XmaContext::Decode(XMA_CONTEXT_DATA* data) { std::tie(frame_count, frame_last_split) = GetPacketFrameCount(packet); assert_true(frame_count >= 0); // TODO end - PrepareDecoder(packet, data->sample_rate, num_channels); + PrepareDecoder(packet, data->sample_rate, bool(data->is_stereo)); // Current frame is split to next packet: bool frame_is_split = frame_last_split && (frame_idx >= frame_count - 1); @@ -580,11 +579,11 @@ void XmaContext::Decode(XMA_CONTEXT_DATA* data) { // assert_true(frame_is_split == (frame_idx == -1)); // dump_raw(av_frame_, id()); - ConvertFrame((const uint8_t**)av_frame_->data, num_channels, - kSamplesPerFrame, raw_frame_.data()); + ConvertFrame((const uint8_t**)av_frame_->data, bool(data->is_stereo), + raw_frame_.data()); // decoded_consumed_samples_ += kSamplesPerFrame; - auto byte_count = kBytesPerFrameChannel * num_channels; + auto byte_count = kBytesPerFrameChannel << data->is_stereo; assert_true(output_remaining_bytes >= byte_count); output_rb.Write(raw_frame_.data(), byte_count); output_remaining_bytes -= byte_count; @@ -720,7 +719,7 @@ std::tuple XmaContext::GetFrameNumber(uint8_t* block, size_t size, int frame_idx = 0; while (true) { if (stream.BitsRemaining() < 15) { - return {packet_idx, -1}; + break; } if (stream.offset_bits() == bit_offset) { @@ -780,13 +779,15 @@ std::tuple XmaContext::GetPacketFrameCount(uint8_t* packet) { } } -int XmaContext::PrepareDecoder(uint8_t* packet, int sample_rate, int channels) { +int XmaContext::PrepareDecoder(uint8_t* packet, int sample_rate, + bool is_two_channel) { // Sanity check: Packet metadata is always 1 for XMA2/0 for XMA assert_true((packet[2] & 0x7) == 1 || (packet[2] & 0x7) == 0); sample_rate = GetSampleRate(sample_rate); // Re-initialize the context with new sample rate and channels. + uint32_t channels = is_two_channel ? 2 : 1; if (av_context_->sample_rate != sample_rate || av_context_->channels != channels) { // We have to reopen the codec so it'll realloc whatever data it needs. @@ -805,30 +806,80 @@ int XmaContext::PrepareDecoder(uint8_t* packet, int sample_rate, int channels) { return 0; } -bool XmaContext::ConvertFrame(const uint8_t** samples, int num_channels, - int num_samples, uint8_t* output_buffer) { +void XmaContext::ConvertFrame(const uint8_t** samples, bool is_two_channel, + uint8_t* output_buffer) { // Loop through every sample, convert and drop it into the output array. // If more than one channel, we need to interleave the samples from each - // channel next to each other. - // TODO: This can definitely be optimized with AVX/SSE intrinsics! - uint32_t o = 0; - for (int i = 0; i < num_samples; i++) { - for (int j = 0; j < num_channels; j++) { - // Select the appropriate array based on the current channel. - auto sample_array = reinterpret_cast(samples[j]); + // channel next to each other. Always saturate because FFmpeg output is + // not limited to [-1, 1] (for example 1.095 as seen in RDR) + constexpr float scale = (1 << 15) - 1; + auto out = reinterpret_cast(output_buffer); - // Raw sample should be within [-1, 1]. - // Clamp it, just in case. - float raw_sample = xe::saturate(sample_array[i]); - - // Convert the sample and output it in big endian. - float scaled_sample = raw_sample * ((1 << 15) - 1); - int sample = static_cast(scaled_sample); - xe::store_and_swap(&output_buffer[o++ * 2], sample & 0xFFFF); + // For testing of vectorized versions, stereo audio is common in Halo 3, since + // the first menu frame; the intro cutscene also has more than 2 channels. +#if XE_ARCH_AMD64 + static_assert(kSamplesPerFrame % 8 == 0); + const auto in_channel_0 = reinterpret_cast(samples[0]); + const __m128 scale_mm = _mm_set1_ps(scale); + if (is_two_channel) { + const auto in_channel_1 = reinterpret_cast(samples[1]); + const __m128i shufmask = + _mm_set_epi8(14, 15, 6, 7, 12, 13, 4, 5, 10, 11, 2, 3, 8, 9, 0, 1); + for (uint32_t i = 0; i < kSamplesPerFrame; i += 4) { + // Load 8 samples, 4 for each channel. + __m128 in_mm0 = _mm_loadu_ps(&in_channel_0[i]); + __m128 in_mm1 = _mm_loadu_ps(&in_channel_1[i]); + // Rescale. + in_mm0 = _mm_mul_ps(in_mm0, scale_mm); + in_mm1 = _mm_mul_ps(in_mm1, scale_mm); + // Cast to int32. + __m128i out_mm0 = _mm_cvtps_epi32(in_mm0); + __m128i out_mm1 = _mm_cvtps_epi32(in_mm1); + // Saturated cast and pack to int16. + __m128i out_mm = _mm_packs_epi32(out_mm0, out_mm1); + // Interleave channels and byte swap. + out_mm = _mm_shuffle_epi8(out_mm, shufmask); + // Store, as [out + i * 4] movdqu. + _mm_storeu_si128(reinterpret_cast<__m128i*>(&out[i * 2]), out_mm); + } + } else { + const __m128i shufmask = + _mm_set_epi8(14, 15, 12, 13, 10, 11, 8, 9, 6, 7, 4, 5, 2, 3, 0, 1); + for (uint32_t i = 0; i < kSamplesPerFrame; i += 8) { + // Load 8 samples, as [in_channel_0 + i * 4] and + // [in_channel_0 + i * 4 + 16] movups. + __m128 in_mm0 = _mm_loadu_ps(&in_channel_0[i]); + __m128 in_mm1 = _mm_loadu_ps(&in_channel_0[i + 4]); + // Rescale. + in_mm0 = _mm_mul_ps(in_mm0, scale_mm); + in_mm1 = _mm_mul_ps(in_mm1, scale_mm); + // Cast to int32. + __m128i out_mm0 = _mm_cvtps_epi32(in_mm0); + __m128i out_mm1 = _mm_cvtps_epi32(in_mm1); + // Saturated cast and pack to int16. + __m128i out_mm = _mm_packs_epi32(out_mm0, out_mm1); + // Byte swap. + out_mm = _mm_shuffle_epi8(out_mm, shufmask); + // Store, as [out + i * 2] movdqu. + _mm_storeu_si128(reinterpret_cast<__m128i*>(&out[i]), out_mm); } } +#else + uint32_t o = 0; + for (uint32_t i = 0; i < kSamplesPerFrame; i++) { + for (uint32_t j = 0; j <= uint32_t(is_two_channel); j++) { + // Select the appropriate array based on the current channel. + auto in = reinterpret_cast(samples[j]); - return true; + // Raw samples sometimes aren't within [-1, 1] + float scaled_sample = xe::saturate_signed(in[i]) * scale; + + // Convert the sample and output it in big endian. + auto sample = static_cast(scaled_sample); + out[o++] = xe::byte_swap(sample); + } + } +#endif } } // namespace apu diff --git a/src/xenia/apu/xma_context.h b/src/xenia/apu/xma_context.h index 0fbf30c89..d9e9b360a 100644 --- a/src/xenia/apu/xma_context.h +++ b/src/xenia/apu/xma_context.h @@ -186,13 +186,13 @@ class XmaContext { static std::tuple GetPacketFrameCount(uint8_t* packet); // Convert sample format and swap bytes - static bool ConvertFrame(const uint8_t** samples, int num_channels, - int num_samples, uint8_t* output_buffer); + static void ConvertFrame(const uint8_t** samples, bool is_two_channel, + uint8_t* output_buffer); bool ValidFrameOffset(uint8_t* block, size_t size_bytes, size_t frame_offset_bits); void Decode(XMA_CONTEXT_DATA* data); - int PrepareDecoder(uint8_t* packet, int sample_rate, int channels); + int PrepareDecoder(uint8_t* packet, int sample_rate, bool is_two_channel); Memory* memory_ = nullptr; diff --git a/src/xenia/apu/xma_decoder.cc b/src/xenia/apu/xma_decoder.cc index b15bd7fe2..cd04ebd91 100644 --- a/src/xenia/apu/xma_decoder.cc +++ b/src/xenia/apu/xma_decoder.cc @@ -123,7 +123,7 @@ X_STATUS XmaDecoder::Setup(kernel::KernelState* kernel_state) { sizeof(XMA_CONTEXT_DATA) * kContextCount, 256, kSystemHeapPhysical); context_data_last_ptr_ = context_data_first_ptr_ + (sizeof(XMA_CONTEXT_DATA) * kContextCount - 1); - register_file_[XE_XMA_REG_CONTEXT_ARRAY_ADDRESS].u32 = + register_file_[XmaRegister::ContextArrayAddress] = memory()->GetPhysicalAddress(context_data_first_ptr_); // Setup XMA contexts. @@ -134,7 +134,7 @@ X_STATUS XmaDecoder::Setup(kernel::KernelState* kernel_state) { assert_always(); } } - register_file_[XE_XMA_REG_NEXT_CONTEXT_INDEX].u32 = 1; + register_file_[XmaRegister::NextContextIndex] = 1; context_bitmap_.Resize(kContextCount); worker_running_ = true; @@ -254,27 +254,29 @@ bool XmaDecoder::BlockOnContext(uint32_t guest_ptr, bool poll) { } uint32_t XmaDecoder::ReadRegister(uint32_t addr) { - uint32_t r = (addr & 0xFFFF) / 4; + auto r = (addr & 0xFFFF) / 4; assert_true(r < XmaRegisterFile::kRegisterCount); switch (r) { - case XE_XMA_REG_CURRENT_CONTEXT_INDEX: { + case XmaRegister::ContextArrayAddress: + break; + case XmaRegister::CurrentContextIndex: { // 0606h (1818h) is rotating context processing # set to hardware ID of // context being processed. // If bit 200h is set, the locking code will possibly collide on hardware // IDs and error out, so we should never set it (I think?). uint32_t& current_context_index = - register_file_[XE_XMA_REG_CURRENT_CONTEXT_INDEX].u32; + register_file_[XmaRegister::CurrentContextIndex]; uint32_t& next_context_index = - register_file_[XE_XMA_REG_NEXT_CONTEXT_INDEX].u32; + register_file_[XmaRegister::NextContextIndex]; // To prevent games from seeing a stuck XMA context, return a rotating // number. current_context_index = next_context_index; next_context_index = (next_context_index + 1) % kContextCount; break; } - default: { + default: const auto register_info = register_file_.GetRegisterInfo(r); if (register_info) { XELOGW("XMA: Read from unhandled register ({:04X}, {})", r, @@ -283,10 +285,9 @@ uint32_t XmaDecoder::ReadRegister(uint32_t addr) { XELOGW("XMA: Read from unknown register ({:04X})", r); } break; - } } - return xe::byte_swap(register_file_.values[r].u32); + return xe::byte_swap(register_file_[r]); } void XmaDecoder::WriteRegister(uint32_t addr, uint32_t value) { @@ -296,16 +297,16 @@ void XmaDecoder::WriteRegister(uint32_t addr, uint32_t value) { value = xe::byte_swap(value); assert_true(r < XmaRegisterFile::kRegisterCount); - register_file_.values[r].u32 = value; + register_file_[r] = value; - if (r >= XE_XMA_REG_CONTEXT_KICK_0 && r <= XE_XMA_REG_CONTEXT_KICK_9) { + if (r >= XmaRegister::Context0Kick && r <= XmaRegister::Context9Kick) { // Context kick command. // This will kick off the given hardware contexts. // Basically, this kicks the SPU and says "hey, decode that audio!" // XMAEnableContext // The context ID is a bit in the range of the entire context array. - uint32_t base_context_id = (r - XE_XMA_REG_CONTEXT_KICK_0) * 32; + uint32_t base_context_id = (r - XmaRegister::Context0Kick) * 32; for (int i = 0; value && i < 32; ++i, value >>= 1) { if (value & 1) { uint32_t context_id = base_context_id + i; @@ -315,11 +316,11 @@ void XmaDecoder::WriteRegister(uint32_t addr, uint32_t value) { } // Signal the decoder thread to start processing. work_event_->Set(); - } else if (r >= XE_XMA_REG_CONTEXT_LOCK_0 && r <= XE_XMA_REG_CONTEXT_LOCK_9) { + } else if (r >= XmaRegister::Context0Lock && r <= XmaRegister::Context9Lock) { // Context lock command. // This requests a lock by flagging the context. // XMADisableContext - uint32_t base_context_id = (r - XE_XMA_REG_CONTEXT_LOCK_0) * 32; + uint32_t base_context_id = (r - XmaRegister::Context0Lock) * 32; for (int i = 0; value && i < 32; ++i, value >>= 1) { if (value & 1) { uint32_t context_id = base_context_id + i; @@ -328,12 +329,12 @@ void XmaDecoder::WriteRegister(uint32_t addr, uint32_t value) { } } // Signal the decoder thread to start processing. - work_event_->Set(); - } else if (r >= XE_XMA_REG_CONTEXT_CLEAR_0 && - r <= XE_XMA_REG_CONTEXT_CLEAR_9) { + // work_event_->Set(); + } else if (r >= XmaRegister::Context0Clear && + r <= XmaRegister::Context9Clear) { // Context clear command. // This will reset the given hardware contexts. - uint32_t base_context_id = (r - XE_XMA_REG_CONTEXT_CLEAR_0) * 32; + uint32_t base_context_id = (r - XmaRegister::Context0Clear) * 32; for (int i = 0; value && i < 32; ++i, value >>= 1) { if (value & 1) { uint32_t context_id = base_context_id + i; diff --git a/src/xenia/apu/xma_decoder.h b/src/xenia/apu/xma_decoder.h index 228a7290d..73da02c2e 100644 --- a/src/xenia/apu/xma_decoder.h +++ b/src/xenia/apu/xma_decoder.h @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -37,7 +37,7 @@ class XmaDecoder { void Shutdown(); uint32_t context_array_ptr() const { - return register_file_.values[XE_XMA_REG_CONTEXT_ARRAY_ADDRESS].u32; + return register_file_[XmaRegister::ContextArrayAddress]; } uint32_t AllocateContext(); diff --git a/src/xenia/apu/xma_register_file.cc b/src/xenia/apu/xma_register_file.cc index d3383b9cb..ee45b2811 100644 --- a/src/xenia/apu/xma_register_file.cc +++ b/src/xenia/apu/xma_register_file.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2014 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -20,10 +20,9 @@ XmaRegisterFile::XmaRegisterFile() { std::memset(values, 0, sizeof(values)); } const XmaRegisterInfo* XmaRegisterFile::GetRegisterInfo(uint32_t index) { switch (index) { -#define XE_XMA_REGISTER(index, type, name) \ +#define XE_XMA_REGISTER(index, name) \ case index: { \ static const XmaRegisterInfo reg_info = { \ - XmaRegisterInfo::Type::type, \ #name, \ }; \ return ®_info; \ diff --git a/src/xenia/apu/xma_register_file.h b/src/xenia/apu/xma_register_file.h index 09154b9ad..e2e924c57 100644 --- a/src/xenia/apu/xma_register_file.h +++ b/src/xenia/apu/xma_register_file.h @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2014 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -16,18 +16,13 @@ namespace xe { namespace apu { -enum XmaRegister { -#define XE_XMA_REGISTER(index, type, name) XE_XMA_REG_##name = index, +struct XmaRegister { +#define XE_XMA_REGISTER(index, name) static const uint32_t name = index; #include "xenia/apu/xma_register_table.inc" #undef XE_XMA_REGISTER }; struct XmaRegisterInfo { - enum class Type { - kDword, - kFloat, - }; - Type type; const char* name; }; @@ -38,14 +33,10 @@ class XmaRegisterFile { static const XmaRegisterInfo* GetRegisterInfo(uint32_t index); static const size_t kRegisterCount = (0xFFFF + 1) / 4; - union RegisterValue { - uint32_t u32; - float f32; - }; - RegisterValue values[kRegisterCount]; + uint32_t values[kRegisterCount]; - RegisterValue& operator[](int reg) { return values[reg]; } - RegisterValue& operator[](XmaRegister reg) { return values[reg]; } + uint32_t operator[](uint32_t reg) const { return values[reg]; } + uint32_t& operator[](uint32_t reg) { return values[reg]; } }; } // namespace apu diff --git a/src/xenia/apu/xma_register_table.inc b/src/xenia/apu/xma_register_table.inc index 49b32e26f..1703c2e9f 100644 --- a/src/xenia/apu/xma_register_table.inc +++ b/src/xenia/apu/xma_register_table.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -10,42 +10,72 @@ // This is a partial file designed to be included by other files when // constructing various tables. -//#define XE_XMA_REGISTER(index, type, name) +#ifndef XE_XMA_REGISTER +#define XE_XMA_REGISTER(index, name) +#define __XE_XMA_REGISTER_UNSET +#endif -XE_XMA_REGISTER(0x0600, kDword, CONTEXT_ARRAY_ADDRESS) +#ifndef XE_XMA_REGISTER_CONTEXT_GROUP +#define XE_XMA_REGISTER_CONTEXT_GROUP(index, suffix) \ + XE_XMA_REGISTER(index + 0, Context0##suffix) \ + XE_XMA_REGISTER(index + 1, Context1##suffix) \ + XE_XMA_REGISTER(index + 2, Context2##suffix) \ + XE_XMA_REGISTER(index + 3, Context3##suffix) \ + XE_XMA_REGISTER(index + 4, Context4##suffix) \ + XE_XMA_REGISTER(index + 5, Context5##suffix) \ + XE_XMA_REGISTER(index + 6, Context6##suffix) \ + XE_XMA_REGISTER(index + 7, Context7##suffix) \ + XE_XMA_REGISTER(index + 8, Context8##suffix) \ + XE_XMA_REGISTER(index + 9, Context9##suffix) +#endif -XE_XMA_REGISTER(0x0606, kDword, CURRENT_CONTEXT_INDEX) -XE_XMA_REGISTER(0x0607, kDword, NEXT_CONTEXT_INDEX) +// 0x0000..0x001F : ??? +// 0x0020..0x03FF : all 0xFFs? +// 0x0400..0x043F : ??? +// 0x0440..0x047F : all 0xFFs? +// 0x0480..0x048B : ??? +// 0x048C..0x04C0 : all 0xFFs? +// 0x04C1..0x04CB : ??? +// 0x04CC..0x04FF : all 0xFFs? +// 0x0500..0x051F : ??? +// 0x0520..0x057F : all 0xFFs? +// 0x0580..0x058F : ??? +// 0x0590..0x05FF : all 0xFFs? -XE_XMA_REGISTER(0x0650, kDword, CONTEXT_KICK_0) -XE_XMA_REGISTER(0x0651, kDword, CONTEXT_KICK_1) -XE_XMA_REGISTER(0x0652, kDword, CONTEXT_KICK_2) -XE_XMA_REGISTER(0x0653, kDword, CONTEXT_KICK_3) -XE_XMA_REGISTER(0x0654, kDword, CONTEXT_KICK_4) -XE_XMA_REGISTER(0x0655, kDword, CONTEXT_KICK_5) -XE_XMA_REGISTER(0x0656, kDword, CONTEXT_KICK_6) -XE_XMA_REGISTER(0x0657, kDword, CONTEXT_KICK_7) -XE_XMA_REGISTER(0x0658, kDword, CONTEXT_KICK_8) -XE_XMA_REGISTER(0x0659, kDword, CONTEXT_KICK_9) +// XMA stuff is probably only 0x0600..0x06FF +//---------------------------------------------------------------------------// -XE_XMA_REGISTER(0x0690, kDword, CONTEXT_LOCK_0) -XE_XMA_REGISTER(0x0691, kDword, CONTEXT_LOCK_1) -XE_XMA_REGISTER(0x0692, kDword, CONTEXT_LOCK_2) -XE_XMA_REGISTER(0x0693, kDword, CONTEXT_LOCK_3) -XE_XMA_REGISTER(0x0694, kDword, CONTEXT_LOCK_4) -XE_XMA_REGISTER(0x0695, kDword, CONTEXT_LOCK_5) -XE_XMA_REGISTER(0x0696, kDword, CONTEXT_LOCK_6) -XE_XMA_REGISTER(0x0697, kDword, CONTEXT_LOCK_7) -XE_XMA_REGISTER(0x0698, kDword, CONTEXT_LOCK_8) -XE_XMA_REGISTER(0x0699, kDword, CONTEXT_LOCK_9) +XE_XMA_REGISTER(0x0600, ContextArrayAddress) +// 0x0601..0x0605 : ??? +XE_XMA_REGISTER(0x0606, CurrentContextIndex) +XE_XMA_REGISTER(0x0607, NextContextIndex) +// 0x0608 : ??? +// 0x0609..0x060F : zero? +XE_XMA_REGISTER_CONTEXT_GROUP(0x0610, Unknown610) +// 0x061A..0x061F : zero? +XE_XMA_REGISTER_CONTEXT_GROUP(0x0620, Unknown620) +// 0x062A..0x0641 : zero? +// 0x0642..0x0644 : ??? +// 0x0645..0x064F : zero? +XE_XMA_REGISTER_CONTEXT_GROUP(0x0650, Kick) +// 0x065A..0x065F : zero? +XE_XMA_REGISTER_CONTEXT_GROUP(0x0660, Unknown660) +// 0x066A..0x0681 : zero? +// 0x0682..0x0684 : ??? +// 0x0685..0x068F : zero? +XE_XMA_REGISTER_CONTEXT_GROUP(0x0690, Lock) +// 0x069A..0x069F : zero? +XE_XMA_REGISTER_CONTEXT_GROUP(0x06A0, Clear) -XE_XMA_REGISTER(0x06A0, kDword, CONTEXT_CLEAR_0) -XE_XMA_REGISTER(0x06A1, kDword, CONTEXT_CLEAR_1) -XE_XMA_REGISTER(0x06A2, kDword, CONTEXT_CLEAR_2) -XE_XMA_REGISTER(0x06A3, kDword, CONTEXT_CLEAR_3) -XE_XMA_REGISTER(0x06A4, kDword, CONTEXT_CLEAR_4) -XE_XMA_REGISTER(0x06A5, kDword, CONTEXT_CLEAR_5) -XE_XMA_REGISTER(0x06A6, kDword, CONTEXT_CLEAR_6) -XE_XMA_REGISTER(0x06A7, kDword, CONTEXT_CLEAR_7) -XE_XMA_REGISTER(0x06A8, kDword, CONTEXT_CLEAR_8) -XE_XMA_REGISTER(0x06A9, kDword, CONTEXT_CLEAR_9) +//---------------------------------------------------------------------------// + +// 0x0700..0x07FF : all 0xFFs? +// 0x0800..0x17FF : ??? +// 0x1800..0x2FFF : all 0xFFs? +// 0x3000..0x30FF : ??? +// 0x3100..0x3FFF : all 0xFFs? + +#ifdef __XE_XMA_REGISTER_UNSET +#undef __XE_XMA_REGISTER_UNSET +#undef XE_XMA_REGISTER +#endif diff --git a/src/xenia/base/arena.cc b/src/xenia/base/arena.cc index ec3a44606..9b619cf56 100644 --- a/src/xenia/base/arena.cc +++ b/src/xenia/base/arena.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -13,6 +13,7 @@ #include #include "xenia/base/assert.h" +#include "xenia/base/math.h" namespace xe { @@ -45,12 +46,25 @@ void Arena::DebugFill() { } } -void* Arena::Alloc(size_t size) { +void* Arena::Alloc(size_t size, size_t align) { + assert_true( + xe::bit_count(align) == 1 && align <= 16, + "align needs to be a power of 2 and not greater than Chunk alignment"); + + // for alignment + const auto get_padding = [this, align]() -> size_t { + const size_t mask = align - 1; + size_t deviation = active_chunk_->offset & mask; + return (align - deviation) & mask; + }; + if (active_chunk_) { - if (active_chunk_->capacity - active_chunk_->offset < size + 4096) { + if (active_chunk_->capacity - active_chunk_->offset < + size + get_padding() + 4096) { Chunk* next = active_chunk_->next; if (!next) { - assert_true(size < chunk_size_, "need to support larger chunks"); + assert_true(size + get_padding() < chunk_size_, + "need to support larger chunks"); next = new Chunk(chunk_size_); active_chunk_->next = next; } @@ -61,8 +75,11 @@ void* Arena::Alloc(size_t size) { head_chunk_ = active_chunk_ = new Chunk(chunk_size_); } + active_chunk_->offset += get_padding(); uint8_t* p = active_chunk_->buffer + active_chunk_->offset; active_chunk_->offset += size; + assert_true((reinterpret_cast(p) & (align - 1)) == 0, + "alignment failed"); return p; } @@ -113,6 +130,8 @@ void Arena::CloneContents(void* buffer, size_t buffer_length) { Arena::Chunk::Chunk(size_t chunk_size) : next(nullptr), capacity(chunk_size), buffer(0), offset(0) { buffer = reinterpret_cast(malloc(capacity)); + assert_true((reinterpret_cast(buffer) & size_t(15)) == 0, + "16 byte alignment required"); } Arena::Chunk::~Chunk() { diff --git a/src/xenia/base/arena.h b/src/xenia/base/arena.h index 8b6a90707..7dbdb7c2a 100644 --- a/src/xenia/base/arena.h +++ b/src/xenia/base/arena.h @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -24,11 +24,13 @@ class Arena { void Reset(); void DebugFill(); - void* Alloc(size_t size); + void* Alloc(size_t size, size_t align); template T* Alloc() { - return reinterpret_cast(Alloc(sizeof(T))); + return reinterpret_cast(Alloc(sizeof(T), alignof(T))); } + // When rewinding aligned allocations, any padding that was applied during + // allocation will be leaked void Rewind(size_t size); void* CloneContents(); diff --git a/src/xenia/base/byte_order.h b/src/xenia/base/byte_order.h index 2a2dee412..1a3c63b2f 100644 --- a/src/xenia/base/byte_order.h +++ b/src/xenia/base/byte_order.h @@ -11,103 +11,116 @@ #define XENIA_BASE_BYTE_ORDER_H_ #include +#if defined __has_include +#if __has_include() +#include +#endif +#endif +#if __cpp_lib_endian +#include +#endif #include "xenia/base/assert.h" #include "xenia/base/platform.h" -#if XE_PLATFORM_LINUX -#include +#if !__cpp_lib_endian +// Polyfill +#ifdef __BYTE_ORDER__ +namespace std { +enum class endian { + little = __ORDER_LITTLE_ENDIAN__, + big = __ORDER_BIG_ENDIAN__, + native = __BYTE_ORDER__ +}; +} +#else +// Hardcode to little endian for now +namespace std { +enum class endian { little = 0, big = 1, native = 0 }; +} #endif +#endif +// Check for mixed endian +static_assert((std::endian::native == std::endian::big) || + (std::endian::native == std::endian::little)); namespace xe { -#if XE_PLATFORM_WIN32 +#if XE_COMPILER_MSVC #define XENIA_BASE_BYTE_SWAP_16 _byteswap_ushort #define XENIA_BASE_BYTE_SWAP_32 _byteswap_ulong #define XENIA_BASE_BYTE_SWAP_64 _byteswap_uint64 -#elif XE_PLATFORM_MAC -#define XENIA_BASE_BYTE_SWAP_16 OSSwapInt16 -#define XENIA_BASE_BYTE_SWAP_32 OSSwapInt32 -#define XENIA_BASE_BYTE_SWAP_64 OSSwapInt64 #else -#define XENIA_BASE_BYTE_SWAP_16 bswap_16 -#define XENIA_BASE_BYTE_SWAP_32 bswap_32 -#define XENIA_BASE_BYTE_SWAP_64 bswap_64 +#define XENIA_BASE_BYTE_SWAP_16 __builtin_bswap16 +#define XENIA_BASE_BYTE_SWAP_32 __builtin_bswap32 +#define XENIA_BASE_BYTE_SWAP_64 __builtin_bswap64 #endif // XE_PLATFORM_WIN32 -inline int8_t byte_swap(int8_t value) { return value; } -inline uint8_t byte_swap(uint8_t value) { return value; } -inline int16_t byte_swap(int16_t value) { - return static_cast( - XENIA_BASE_BYTE_SWAP_16(static_cast(value))); -} -inline uint16_t byte_swap(uint16_t value) { - return XENIA_BASE_BYTE_SWAP_16(value); -} -inline uint16_t byte_swap(char16_t value) { - return static_cast(XENIA_BASE_BYTE_SWAP_16(value)); -} -inline int32_t byte_swap(int32_t value) { - return static_cast( - XENIA_BASE_BYTE_SWAP_32(static_cast(value))); -} -inline uint32_t byte_swap(uint32_t value) { - return XENIA_BASE_BYTE_SWAP_32(value); -} -inline int64_t byte_swap(int64_t value) { - return static_cast( - XENIA_BASE_BYTE_SWAP_64(static_cast(value))); -} -inline uint64_t byte_swap(uint64_t value) { - return XENIA_BASE_BYTE_SWAP_64(value); -} -inline float byte_swap(float value) { - uint32_t temp = byte_swap(*reinterpret_cast(&value)); - return *reinterpret_cast(&temp); -} -inline double byte_swap(double value) { - uint64_t temp = byte_swap(*reinterpret_cast(&value)); - return *reinterpret_cast(&temp); -} -template +template inline T byte_swap(T value) { - if (sizeof(T) == 4) { - return static_cast(byte_swap(static_cast(value))); - } else if (sizeof(T) == 2) { - return static_cast(byte_swap(static_cast(value))); - } else { - assert_always("not handled"); + static_assert( + sizeof(T) == 8 || sizeof(T) == 4 || sizeof(T) == 2 || sizeof(T) == 1, + "byte_swap(T value): Type T has illegal size"); + if constexpr (sizeof(T) == 8) { + uint64_t temp = + XENIA_BASE_BYTE_SWAP_64(*reinterpret_cast(&value)); + return *reinterpret_cast(&temp); + } else if constexpr (sizeof(T) == 4) { + uint32_t temp = + XENIA_BASE_BYTE_SWAP_32(*reinterpret_cast(&value)); + return *reinterpret_cast(&temp); + } else if constexpr (sizeof(T) == 2) { + uint16_t temp = + XENIA_BASE_BYTE_SWAP_16(*reinterpret_cast(&value)); + return *reinterpret_cast(&temp); + } else if constexpr (sizeof(T) == 1) { + return value; } } -template -struct be { - be() = default; - be(const T& src) : value(xe::byte_swap(src)) {} // NOLINT(runtime/explicit) - be(const be& other) { value = other.value; } // NOLINT(runtime/explicit) - operator T() const { return xe::byte_swap(value); } +template +struct endian_store { + endian_store() = default; + endian_store(const T& src) { set(src); } + endian_store(const endian_store& other) { set(other); } + operator T() const { return get(); } - be& operator+=(int a) { + void set(const T& src) { + if constexpr (std::endian::native == E) { + value = src; + } else { + value = xe::byte_swap(src); + } + } + void set(const endian_store& other) { value = other.value; } + T get() const { + if constexpr (std::endian::native == E) { + return value; + } + return xe::byte_swap(value); + } + + endian_store& operator+=(int a) { *this = *this + a; return *this; } - be& operator-=(int a) { + endian_store& operator-=(int a) { *this = *this - a; return *this; } - be& operator++() { + endian_store& operator++() { *this += 1; return *this; } // ++a - be operator++(int) { + endian_store operator++(int) { *this += 1; return (*this - 1); } // a++ - be& operator--() { + endian_store& operator--() { *this -= 1; return *this; } // --a - be operator--(int) { + endian_store operator--(int) { *this -= 1; return (*this + 1); } // a-- @@ -115,6 +128,11 @@ struct be { T value; }; +template +using be = endian_store; +template +using le = endian_store; + } // namespace xe #endif // XENIA_BASE_BYTE_ORDER_H_ diff --git a/src/xenia/base/byte_stream.cc b/src/xenia/base/byte_stream.cc index cdd69a1ba..3775cfc91 100644 --- a/src/xenia/base/byte_stream.cc +++ b/src/xenia/base/byte_stream.cc @@ -20,18 +20,19 @@ ByteStream::ByteStream(uint8_t* data, size_t data_length, size_t offset) ByteStream::~ByteStream() = default; -void ByteStream::Advance(size_t num_bytes) { offset_ += num_bytes; } +void ByteStream::Advance(size_t num_bytes) { + assert_true(offset_ + num_bytes <= data_length_); + offset_ += num_bytes; +} void ByteStream::Read(uint8_t* buf, size_t len) { - assert_true(offset_ < data_length_); - + assert_true(offset_ + len <= data_length_); std::memcpy(buf, data_ + offset_, len); Advance(len); } void ByteStream::Write(const uint8_t* buf, size_t len) { - assert_true(offset_ < data_length_); - + assert_true(offset_ + len <= data_length_); std::memcpy(data_ + offset_, buf, len); Advance(len); } @@ -41,7 +42,6 @@ std::string ByteStream::Read() { std::string str; uint32_t len = Read(); str.resize(len); - Read(reinterpret_cast(&str[0]), len); return str; } @@ -49,9 +49,8 @@ std::string ByteStream::Read() { template <> std::u16string ByteStream::Read() { std::u16string str; - uint32_t len = Read(); + size_t len = Read(); str.resize(len); - Read(reinterpret_cast(&str[0]), len * 2); return str; } diff --git a/src/xenia/base/clock_posix.cc b/src/xenia/base/clock_posix.cc index f18082b0e..73a23dc76 100644 --- a/src/xenia/base/clock_posix.cc +++ b/src/xenia/base/clock_posix.cc @@ -2,45 +2,55 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2019 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ -#include "xenia/base/clock.h" - #include -#include + +#include "xenia/base/assert.h" +#include "xenia/base/clock.h" namespace xe { uint64_t Clock::host_tick_frequency_platform() { timespec res; - clock_getres(CLOCK_MONOTONIC_RAW, &res); + int error = clock_getres(CLOCK_MONOTONIC_RAW, &res); + assert_zero(error); + assert_zero(res.tv_sec); // Sub second resolution is required. - return uint64_t(res.tv_sec) + uint64_t(res.tv_nsec) * 1000000000ull; + // Convert nano seconds to hertz. Resolution is 1ns on most systems. + return 1000000000ull / res.tv_nsec; } uint64_t Clock::host_tick_count_platform() { - timespec res; - clock_gettime(CLOCK_MONOTONIC_RAW, &res); + timespec tp; + int error = clock_gettime(CLOCK_MONOTONIC_RAW, &tp); + assert_zero(error); - return uint64_t(res.tv_sec) + uint64_t(res.tv_nsec) * 1000000000ull; + return tp.tv_nsec + tp.tv_sec * 1000000000ull; } uint64_t Clock::QueryHostSystemTime() { - struct timeval tv; - gettimeofday(&tv, NULL); + // https://docs.microsoft.com/en-us/windows/win32/sysinfo/converting-a-time-t-value-to-a-file-time + constexpr uint64_t seconds_per_day = 3600 * 24; + // Don't forget the 89 leap days. + constexpr uint64_t seconds_1601_to_1970 = + ((369 * 365 + 89) * seconds_per_day); - uint64_t ret = tv.tv_usec; - ret /= 1000; // usec -> msec + timeval now; + int error = gettimeofday(&now, nullptr); + assert_zero(error); - ret += (tv.tv_sec * 1000); // sec -> msec - return ret; + // NT systems use 100ns intervals. + return static_cast( + (static_cast(now.tv_sec) + seconds_1601_to_1970) * 10000000ull + + now.tv_usec * 10); } uint64_t Clock::QueryHostUptimeMillis() { return host_tick_count_platform() * 1000 / host_tick_frequency_platform(); } -} // namespace xe \ No newline at end of file +} // namespace xe diff --git a/src/xenia/base/cvar.cc b/src/xenia/base/cvar.cc index bd6b0c254..cd85c7a68 100644 --- a/src/xenia/base/cvar.cc +++ b/src/xenia/base/cvar.cc @@ -14,6 +14,10 @@ #define UTF_CPP_CPLUSPLUS 201703L #include "third_party/utfcpp/source/utf8.h" +#include "xenia/base/logging.h" +#include "xenia/base/main.h" +#include "xenia/base/system.h" + namespace utfcpp = utf8; using u8_citer = utfcpp::iterator; @@ -61,7 +65,14 @@ void ParseLaunchArguments(int& argc, char**& argv, auto result = options.parse(argc, argv); if (result.count("help")) { - PrintHelpAndExit(); + xe::AttachConsole(); + if (xe::has_console_attached()) { + PrintHelpAndExit(); + } else { + xe::ShowSimpleMessageBox(xe::SimpleMessageBoxType::Help, + options.help({""})); + exit(0); + } } for (auto& it : *CmdVars) { @@ -78,8 +89,16 @@ void ParseLaunchArguments(int& argc, char**& argv, } } } catch (const cxxopts::OptionException& e) { - std::cout << e.what() << std::endl; - PrintHelpAndExit(); + xe::AttachConsole(); + if (xe::has_console_attached()) { + std::cout << e.what() << std::endl; + PrintHelpAndExit(); + } else { + std::string m = + "Invalid launch options were given.\n" + options.help({""}); + xe::ShowSimpleMessageBox(xe::SimpleMessageBoxType::Error, m); + exit(0); + } } } diff --git a/src/xenia/base/debug_visualizers.natvis b/src/xenia/base/debug_visualizers.natvis index e0022ed70..8cc0aba8e 100644 --- a/src/xenia/base/debug_visualizers.natvis +++ b/src/xenia/base/debug_visualizers.natvis @@ -1,8 +1,8 @@ - - + + {(((value & 0xFF00000000000000) >> 56) | ((value & 0x00FF000000000000) >> 40) | @@ -14,7 +14,7 @@ ((value & 0x00000000000000FF) << 56))} - + {(((value & 0xFF00000000000000) >> 56) | ((value & 0x00FF000000000000) >> 40) | @@ -27,7 +27,7 @@ - + {(((value & 0xFF000000) >> 24) | ((value & 0x00FF0000) >> 8) | @@ -35,7 +35,7 @@ ((value & 0x000000FF) << 24))} - + {(((value & 0xFF000000) >> 24) | ((value & 0x00FF0000) >> 8) | @@ -44,25 +44,25 @@ - + {(((value & 0xFF00) >> 8) | ((value & 0x00FF) << 8))} - + {(((value & 0xFF00) >> 8) | ((value & 0x00FF) << 8))} - + {value} - + {value} diff --git a/src/xenia/base/logging.cc b/src/xenia/base/logging.cc index 0b195e85a..02fa787a4 100644 --- a/src/xenia/base/logging.cc +++ b/src/xenia/base/logging.cc @@ -26,6 +26,7 @@ #include "xenia/base/memory.h" #include "xenia/base/ring_buffer.h" #include "xenia/base/string.h" +#include "xenia/base/system.h" #include "xenia/base/threading.h" // For MessageBox: @@ -58,7 +59,7 @@ struct LogLine { size_t buffer_length; uint32_t thread_id; uint16_t _pad_0; // (2b) padding - uint8_t _pad_1; // (1b) padding + bool terminate; char prefix_char; }; @@ -81,8 +82,7 @@ class Logger { explicit Logger(const std::string_view app_name) : wait_strategy_(), claim_strategy_(kBlockCount, wait_strategy_), - consumed_(wait_strategy_), - running_(true) { + consumed_(wait_strategy_) { claim_strategy_.add_claim_barrier(consumed_); write_thread_ = @@ -91,7 +91,7 @@ class Logger { } ~Logger() { - running_ = false; + AppendLine(0, '\0', nullptr, 0, true); // append a terminator xe::threading::Wait(write_thread_.get(), true); } @@ -124,7 +124,6 @@ class Logger { std::vector> sinks_; - std::atomic running_; std::unique_ptr write_thread_; void Write(const char* buf, size_t size) { @@ -153,35 +152,30 @@ class Logger { auto available_sequence = claim_strategy_.wait_until_published( next_range.last(), last_sequence); - auto available_difference = - dp::difference(available_sequence, next_sequence); - size_t read_count = 0; + auto available_range = next_range; + auto available_count = available_range.size(); - if (available_difference > 0 && - static_cast(available_difference) >= desired_count) { - auto available_range = dp::sequence_range( - next_sequence, static_cast(available_difference)); - auto available_count = available_range.size(); + rb.set_write_offset(BlockOffset(available_range.end())); - rb.set_write_offset(BlockOffset(available_range.end())); + bool terminate = false; + for (size_t i = available_range.first(); i != available_range.end();) { + rb.set_read_offset(BlockOffset(i)); - for (size_t i = available_range.first(); i != available_range.end();) { - rb.set_read_offset(BlockOffset(i)); + LogLine line; + rb.Read(&line, sizeof(line)); - LogLine line; - rb.Read(&line, sizeof(line)); - - auto needed_count = BlockCount(sizeof(LogLine) + line.buffer_length); - if (read_count + needed_count > available_count) { - // More blocks are needed for a complete line. - desired_count = needed_count; - break; - } else { - // Enough blocks to read this log line, advance by that many. - read_count += needed_count; - i += needed_count; + auto needed_count = BlockCount(sizeof(LogLine) + line.buffer_length); + if (read_count + needed_count > available_count) { + // More blocks are needed for a complete line. + desired_count = needed_count; + break; + } else { + // Enough blocks to read this log line, advance by that many. + read_count += needed_count; + i += needed_count; + if (line.prefix_char) { char prefix[] = { line.prefix_char, '>', @@ -200,44 +194,53 @@ class Logger { fmt::format_to_n(prefix + 3, sizeof(prefix) - 3, "{:08X}", line.thread_id); Write(prefix, sizeof(prefix) - 1); + } - if (line.buffer_length) { - // Get access to the line data - which may be split in the ring - // buffer - and write it out in parts. - auto line_range = rb.BeginRead(line.buffer_length); - Write(reinterpret_cast(line_range.first), - line_range.first_length); - if (line_range.second_length) { - Write(reinterpret_cast(line_range.second), - line_range.second_length); - } + if (line.buffer_length) { + // Get access to the line data - which may be split in the ring + // buffer - and write it out in parts. + auto line_range = rb.BeginRead(line.buffer_length); + Write(reinterpret_cast(line_range.first), + line_range.first_length); + if (line_range.second_length) { + Write(reinterpret_cast(line_range.second), + line_range.second_length); + } - // Always ensure there is a newline. - char last_char = - line_range.second - ? line_range.second[line_range.second_length - 1] - : line_range.first[line_range.first_length - 1]; - if (last_char != '\n') { - const char suffix[1] = {'\n'}; - Write(suffix, 1); - } - - rb.EndRead(std::move(line_range)); - } else { - // Always ensure there is a newline. + // Always ensure there is a newline. + char last_char = + line_range.second + ? line_range.second[line_range.second_length - 1] + : line_range.first[line_range.first_length - 1]; + if (last_char != '\n') { const char suffix[1] = {'\n'}; Write(suffix, 1); } + + rb.EndRead(std::move(line_range)); + } else { + // Always ensure there is a newline. + const char suffix[1] = {'\n'}; + Write(suffix, 1); + } + + if (line.terminate) { + terminate = true; + break; } } } + if (terminate) { + break; + } + if (read_count) { // Advance by the number of blocks we read. auto read_range = dp::sequence_range(next_sequence, read_count); next_sequence = read_range.end(); last_sequence = read_range.last(); - consumed_.publish(read_range.last()); + consumed_.publish(last_sequence); desired_count = 1; @@ -249,9 +252,6 @@ class Logger { idle_loops = 0; } else { - if (!running_) { - break; - } if (idle_loops >= 1000) { // Introduce a waiting period. xe::threading::Sleep(std::chrono::milliseconds(50)); @@ -264,7 +264,8 @@ class Logger { public: void AppendLine(uint32_t thread_id, const char prefix_char, - const char* buffer_data, size_t buffer_length) { + const char* buffer_data, size_t buffer_length, + bool terminate = false) { size_t count = BlockCount(sizeof(LogLine) + buffer_length); auto range = claim_strategy_.claim(count); @@ -278,9 +279,12 @@ class Logger { line.buffer_length = buffer_length; line.thread_id = thread_id; line.prefix_char = prefix_char; + line.terminate = terminate; rb.Write(&line, sizeof(LogLine)); - rb.Write(buffer_data, buffer_length); + if (buffer_length) { + rb.Write(buffer_data, buffer_length); + } claim_strategy_.publish(range); } @@ -350,12 +354,10 @@ void logging::AppendLogLine(LogLevel log_level, const char prefix_char, void FatalError(const std::string_view str) { logging::AppendLogLine(LogLevel::Error, 'X', str); -#if XE_PLATFORM_WIN32 if (!xe::has_console_attached()) { - MessageBoxW(NULL, (LPCWSTR)xe::to_utf16(str).c_str(), L"Xenia Error", - MB_OK | MB_ICONERROR | MB_APPLMODAL | MB_SETFOREGROUND); + ShowSimpleMessageBox(SimpleMessageBoxType::Error, str); } -#endif // WIN32 + ShutdownLogging(); std::exit(1); } diff --git a/src/xenia/base/main.h b/src/xenia/base/main.h index c985eb4de..324abfe71 100644 --- a/src/xenia/base/main.h +++ b/src/xenia/base/main.h @@ -10,6 +10,7 @@ #ifndef XENIA_BASE_MAIN_H_ #define XENIA_BASE_MAIN_H_ +#include #include #include @@ -21,23 +22,32 @@ namespace xe { // Returns true if there is a user-visible console attached to receive stdout. bool has_console_attached(); +void AttachConsole(); + // Extern defined by user code. This must be present for the application to // launch. struct EntryInfo { std::string name; - std::string positional_usage; - std::vector positional_options; int (*entry_point)(const std::vector& args); + bool transparent_options; // no argument parsing + std::optional positional_usage; + std::optional> positional_options; }; EntryInfo GetEntryInfo(); #define DEFINE_ENTRY_POINT(name, entry_point, positional_usage, ...) \ xe::EntryInfo xe::GetEntryInfo() { \ std::initializer_list positional_options = {__VA_ARGS__}; \ - return xe::EntryInfo( \ - {name, positional_usage, \ - std::vector(std::move(positional_options)), \ - entry_point}); \ + return xe::EntryInfo{ \ + name, entry_point, false, positional_usage, \ + std::vector(std::move(positional_options))}; \ + } + +// TODO(Joel Linn): Add some way to filter consumed arguments in +// cvar::ParseLaunchArguments() +#define DEFINE_ENTRY_POINT_TRANSPARENT(name, entry_point) \ + xe::EntryInfo xe::GetEntryInfo() { \ + return xe::EntryInfo{name, entry_point, true, std::nullopt, std::nullopt}; \ } } // namespace xe diff --git a/src/xenia/base/main_posix.cc b/src/xenia/base/main_posix.cc index 673ff0ac4..d3f0ef403 100644 --- a/src/xenia/base/main_posix.cc +++ b/src/xenia/base/main_posix.cc @@ -2,11 +2,14 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ +#include +#include + #include "xenia/base/cvar.h" #include "xenia/base/main.h" @@ -16,15 +19,19 @@ namespace xe { -bool has_console_attached() { return true; } +bool has_console_attached() { return isatty(fileno(stdin)) == 1; } + +void AttachConsole() {} } // namespace xe extern "C" int main(int argc, char** argv) { auto entry_info = xe::GetEntryInfo(); - cvar::ParseLaunchArguments(argc, argv, entry_info.positional_usage, - entry_info.positional_options); + if (!entry_info.transparent_options) { + cvar::ParseLaunchArguments(argc, argv, entry_info.positional_usage.value(), + entry_info.positional_options.value()); + } std::vector args; for (int n = 0; n < argc; n++) { diff --git a/src/xenia/base/main_win.cc b/src/xenia/base/main_win.cc index d61fe607b..5d68811f1 100644 --- a/src/xenia/base/main_win.cc +++ b/src/xenia/base/main_win.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -38,8 +38,22 @@ bool has_console_attached_ = true; bool has_console_attached() { return has_console_attached_; } +bool has_shell_environment_variable() { + size_t size = 0; + // Check if SHELL exists + // If it doesn't, then we are in a Windows Terminal + auto error = getenv_s(&size, nullptr, 0, "SHELL"); + if (error) { + return false; + } + return !!size; +} + void AttachConsole() { - if (!cvars::enable_console) { + bool has_console = ::AttachConsole(ATTACH_PARENT_PROCESS) == TRUE; + if (!has_console || !has_shell_environment_variable()) { + // We weren't launched from a console, so just return. + has_console_attached_ = false; return; } @@ -104,8 +118,10 @@ static bool parse_launch_arguments(const xe::EntryInfo& entry_info, LocalFree(wargv); - cvar::ParseLaunchArguments(argc, argv, entry_info.positional_usage, - entry_info.positional_options); + if (!entry_info.transparent_options) { + cvar::ParseLaunchArguments(argc, argv, entry_info.positional_usage.value(), + entry_info.positional_options.value()); + } args.clear(); for (int n = 0; n < argc; n++) { @@ -125,7 +141,9 @@ int Main() { // Attach a console so we can write output to stdout. If the user hasn't // redirected output themselves it'll pop up a window. - xe::AttachConsole(); + if (cvars::enable_console) { + xe::AttachConsole(); + } // Setup COM on the main thread. // NOTE: this may fail if COM has already been initialized - that's OK. @@ -144,7 +162,13 @@ int Main() { } // Print version info. - XELOGI("Build: " XE_BUILD_BRANCH " / " XE_BUILD_COMMIT " on " XE_BUILD_DATE); + XELOGI( + "Build: " +#ifdef XE_BUILD_IS_PR + "PR#" XE_BUILD_PR_NUMBER " " XE_BUILD_PR_REPO " " XE_BUILD_PR_BRANCH + "@" XE_BUILD_PR_COMMIT_SHORT " against " +#endif + XE_BUILD_BRANCH "@" XE_BUILD_COMMIT_SHORT " on " XE_BUILD_DATE); // Request high performance timing. if (cvars::win32_high_freq) { diff --git a/src/xenia/base/math.h b/src/xenia/base/math.h index a2f2dc233..ac3ef8056 100644 --- a/src/xenia/base/math.h +++ b/src/xenia/base/math.h @@ -17,6 +17,16 @@ #include #include #include + +#if defined __has_include +#if __has_include() +#include +#endif +#endif +#if __cpp_lib_bitops +#include +#endif + #include "xenia/base/platform.h" #if XE_ARCH_AMD64 @@ -47,8 +57,20 @@ constexpr T round_up(T value, V multiple) { return value ? (((value + multiple - 1) / multiple) * multiple) : multiple; } -constexpr float saturate(float value) { - return std::max(std::min(1.0f, value), -1.0f); +// Using the same conventions as in shading languages, returning 0 for NaN. +// std::max is `a < b ? b : a`, thus in case of NaN, the first argument is +// always returned. Also -0 is not < +0, so +0 is also chosen for it. +template +constexpr T saturate_unsigned(T value) { + return std::min(static_cast(1.0f), std::max(static_cast(0.0f), value)); +} + +// This diverges from the GPU NaN rules for signed normalized formats (NaN +// should be converted to 0, not to -1), but this expectation is not needed most +// of time, and cannot be met for free (unlike for 0...1 clamping). +template +constexpr T saturate_signed(T value) { + return std::min(static_cast(1.0f), std::max(static_cast(-1.0f), value)); } // Gets the next power of two value that is greater than or equal to the given @@ -101,6 +123,23 @@ constexpr uint32_t select_bits(uint32_t value, uint32_t a, uint32_t b) { return (value & make_bitmask(a, b)) >> a; } +#if __cpp_lib_bitops +template +constexpr inline uint32_t bit_count(T v) { + return static_cast(std::popcount(v)); +} +#else +#if XE_COMPILER_MSVC || XE_COMPILER_INTEL +inline uint32_t bit_count(uint32_t v) { return __popcnt(v); } +inline uint32_t bit_count(uint64_t v) { + return static_cast(__popcnt64(v)); +} +#elif XE_COMPILER_GCC || XE_COMPILER_CLANG +static_assert(sizeof(unsigned int) == sizeof(uint32_t)); +static_assert(sizeof(unsigned long long) == sizeof(uint64_t)); +inline uint32_t bit_count(uint32_t v) { return __builtin_popcount(v); } +inline uint32_t bit_count(uint64_t v) { return __builtin_popcountll(v); } +#else inline uint32_t bit_count(uint32_t v) { v = v - ((v >> 1) & 0x55555555); v = (v & 0x33333333) + ((v >> 2) & 0x33333333); @@ -116,6 +155,8 @@ inline uint32_t bit_count(uint64_t v) { v = v + (v >> 32) & 0x0000007F; return static_cast(v); } +#endif +#endif // lzcnt instruction, typed for integers of all sizes. // The number of leading zero bits in the value parameter. If value is zero, the diff --git a/src/xenia/base/memory.cc b/src/xenia/base/memory.cc index 155946779..b675e059f 100644 --- a/src/xenia/base/memory.cc +++ b/src/xenia/base/memory.cc @@ -43,6 +43,16 @@ void copy_128_aligned(void* dest, const void* src, size_t count) { } #if XE_ARCH_AMD64 + +// This works around a GCC bug +// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100801 +// TODO(Joel Linn): Remove this when fixed GCC versions are common place. +#if XE_COMPILER_GNUC +#define XE_WORKAROUND_LOOP_KILL_MOD(x) \ + if ((count % (x)) == 0) __builtin_unreachable(); +#else +#define XE_WORKAROUND_LOOP_KILL_MOD(x) +#endif void copy_and_swap_16_aligned(void* dest_ptr, const void* src_ptr, size_t count) { assert_zero(reinterpret_cast(dest_ptr) & 0xF); @@ -61,6 +71,7 @@ void copy_and_swap_16_aligned(void* dest_ptr, const void* src_ptr, _mm_store_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(8); dest[i] = byte_swap(src[i]); } } @@ -80,6 +91,7 @@ void copy_and_swap_16_unaligned(void* dest_ptr, const void* src_ptr, _mm_storeu_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(8); dest[i] = byte_swap(src[i]); } } @@ -102,6 +114,7 @@ void copy_and_swap_32_aligned(void* dest_ptr, const void* src_ptr, _mm_store_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(4); dest[i] = byte_swap(src[i]); } } @@ -121,6 +134,7 @@ void copy_and_swap_32_unaligned(void* dest_ptr, const void* src_ptr, _mm_storeu_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(4); dest[i] = byte_swap(src[i]); } } @@ -143,6 +157,7 @@ void copy_and_swap_64_aligned(void* dest_ptr, const void* src_ptr, _mm_store_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(2); dest[i] = byte_swap(src[i]); } } @@ -162,6 +177,7 @@ void copy_and_swap_64_unaligned(void* dest_ptr, const void* src_ptr, _mm_storeu_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(2); dest[i] = byte_swap(src[i]); } } @@ -178,6 +194,7 @@ void copy_and_swap_16_in_32_aligned(void* dest_ptr, const void* src_ptr, _mm_store_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(4); dest[i] = (src[i] >> 16) | (src[i] << 16); } } @@ -194,6 +211,7 @@ void copy_and_swap_16_in_32_unaligned(void* dest_ptr, const void* src_ptr, _mm_storeu_si128(reinterpret_cast<__m128i*>(&dest[i]), output); } for (; i < count; ++i) { // handle residual elements + XE_WORKAROUND_LOOP_KILL_MOD(4); dest[i] = (src[i] >> 16) | (src[i] << 16); } } diff --git a/src/xenia/base/memory.h b/src/xenia/base/memory.h index 96eb9b68a..459f09db3 100644 --- a/src/xenia/base/memory.h +++ b/src/xenia/base/memory.h @@ -15,6 +15,7 @@ #include #include #include +#include #include "xenia/base/assert.h" #include "xenia/base/byte_order.h" @@ -441,6 +442,26 @@ inline void store_and_swap(void* mem, return store_and_swap(mem, value); } +using fourcc_t = uint32_t; + +// Get FourCC in host byte order +// make_fourcc('a', 'b', 'c', 'd') == 0x61626364 +constexpr inline fourcc_t make_fourcc(char a, char b, char c, char d) { + return fourcc_t((static_cast(a) << 24) | + (static_cast(b) << 16) | + (static_cast(c) << 8) | static_cast(d)); +} + +// Get FourCC in host byte order +// This overload requires fourcc.length() == 4 +// make_fourcc("abcd") == 'abcd' == 0x61626364 for most compilers +constexpr inline fourcc_t make_fourcc(const std::string_view fourcc) { + if (fourcc.length() != 4) { + throw std::runtime_error("Invalid fourcc length"); + } + return make_fourcc(fourcc[0], fourcc[1], fourcc[2], fourcc[3]); +} + } // namespace xe #endif // XENIA_BASE_MEMORY_H_ diff --git a/src/xenia/base/platform.h b/src/xenia/base/platform.h index 441d37750..04e678bd4 100644 --- a/src/xenia/base/platform.h +++ b/src/xenia/base/platform.h @@ -85,18 +85,17 @@ #endif // XE_PLATFORM_MAC #if XE_COMPILER_MSVC -#define XEPACKEDSTRUCT(name, value) \ - __pragma(pack(push, 1)) struct name value __pragma(pack(pop)); -#define XEPACKEDSTRUCTANONYMOUS(value) \ - __pragma(pack(push, 1)) struct value __pragma(pack(pop)); -#define XEPACKEDUNION(name, value) \ - __pragma(pack(push, 1)) union name value __pragma(pack(pop)); +#define _XEPACKEDSCOPE(body) __pragma(pack(push, 1)) body __pragma(pack(pop)); #else -#define XEPACKEDSTRUCT(name, value) struct __attribute__((packed)) name value; -#define XEPACKEDSTRUCTANONYMOUS(value) struct __attribute__((packed)) value; -#define XEPACKEDUNION(name, value) union __attribute__((packed)) name value; +#define _XEPACKEDSCOPE(body) \ + _Pragma("pack(push, 1)") body; \ + _Pragma("pack(pop)"); #endif // XE_PLATFORM_WIN32 +#define XEPACKEDSTRUCT(name, value) _XEPACKEDSCOPE(struct name value) +#define XEPACKEDSTRUCTANONYMOUS(value) _XEPACKEDSCOPE(struct value) +#define XEPACKEDUNION(name, value) _XEPACKEDSCOPE(union name value) + namespace xe { #if XE_PLATFORM_WIN32 diff --git a/src/xenia/base/profiling.cc b/src/xenia/base/profiling.cc index a28f6e26b..bf24d4f7d 100644 --- a/src/xenia/base/profiling.cc +++ b/src/xenia/base/profiling.cc @@ -30,6 +30,7 @@ #include "xenia/base/assert.h" #include "xenia/base/cvar.h" #include "xenia/base/profiling.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/window.h" #if XE_OPTION_PROFILING @@ -112,31 +113,35 @@ void Profiler::ThreadEnter(const char* name) { void Profiler::ThreadExit() { MicroProfileOnThreadExit(); } -bool Profiler::OnKeyDown(int key_code) { +bool Profiler::OnKeyDown(ui::VirtualKey virtual_key) { // https://msdn.microsoft.com/en-us/library/windows/desktop/dd375731(v=vs.85).aspx - switch (key_code) { - case VK_OEM_3: // ` + switch (virtual_key) { + case ui::VirtualKey::kOem3: // ` MicroProfileTogglePause(); return true; #if XE_OPTION_PROFILING_UI - case VK_TAB: + case ui::VirtualKey::kTab: MicroProfileToggleDisplayMode(); return true; - case 0x31: // 1 + case ui::VirtualKey::k1: MicroProfileModKey(1); return true; #endif // XE_OPTION_PROFILING_UI + default: + break; } return false; } -bool Profiler::OnKeyUp(int key_code) { - switch (key_code) { +bool Profiler::OnKeyUp(ui::VirtualKey virtual_key) { + switch (virtual_key) { #if XE_OPTION_PROFILING_UI - case 0x31: // 1 + case ui::VirtualKey::k1: MicroProfileModKey(0); return true; #endif // XE_OPTION_PROFILING_UI + default: + break; } return false; } @@ -219,14 +224,14 @@ void Profiler::set_window(ui::Window* window) { // Watch for toggle/mode keys and such. window_->on_key_down.AddListener([](ui::KeyEvent* e) { if (Profiler::is_visible()) { - Profiler::OnKeyDown(e->key_code()); + Profiler::OnKeyDown(e->virtual_key()); e->set_handled(true); window_->Invalidate(); } }); window_->on_key_up.AddListener([](ui::KeyEvent* e) { if (Profiler::is_visible()) { - Profiler::OnKeyUp(e->key_code()); + Profiler::OnKeyUp(e->virtual_key()); e->set_handled(true); window_->Invalidate(); } @@ -257,8 +262,8 @@ void Profiler::Shutdown() {} uint32_t Profiler::GetColor(const char* str) { return 0; } void Profiler::ThreadEnter(const char* name) {} void Profiler::ThreadExit() {} -bool Profiler::OnKeyDown(int key_code) { return false; } -bool Profiler::OnKeyUp(int key_code) { return false; } +bool Profiler::OnKeyDown(ui::VirtualKey virtual_key) { return false; } +bool Profiler::OnKeyUp(ui::VirtualKey virtual_key) { return false; } void Profiler::OnMouseDown(bool left_button, bool right_button) {} void Profiler::OnMouseUp() {} void Profiler::OnMouseMove(int x, int y) {} diff --git a/src/xenia/base/profiling.h b/src/xenia/base/profiling.h index d6cc42d41..a55600d7e 100644 --- a/src/xenia/base/profiling.h +++ b/src/xenia/base/profiling.h @@ -13,6 +13,7 @@ #include #include "xenia/base/string.h" +#include "xenia/ui/virtual_key.h" #if XE_PLATFORM_WIN32 #define XE_OPTION_PROFILING 1 @@ -171,8 +172,8 @@ class Profiler { // Deactivates the calling thread for profiling. static void ThreadExit(); - static bool OnKeyDown(int key_code); - static bool OnKeyUp(int key_code); + static bool OnKeyDown(ui::VirtualKey virtual_key); + static bool OnKeyUp(ui::VirtualKey virtual_key); static void OnMouseDown(bool left_button, bool right_button); static void OnMouseUp(); static void OnMouseMove(int x, int y); diff --git a/src/xenia/base/string_key.h b/src/xenia/base/string_key.h index adb6f827e..9b4576ded 100644 --- a/src/xenia/base/string_key.h +++ b/src/xenia/base/string_key.h @@ -87,12 +87,12 @@ struct string_key_case : internal::string_key_base { namespace std { template <> -struct std::hash { +struct hash { std::size_t operator()(const xe::string_key& t) const { return t.hash(); } }; template <> -struct std::hash { +struct hash { std::size_t operator()(const xe::string_key_case& t) const { return t.hash(); } diff --git a/src/xenia/base/string_util.h b/src/xenia/base/string_util.h index 59d6e90f6..3c73f9c65 100644 --- a/src/xenia/base/string_util.h +++ b/src/xenia/base/string_util.h @@ -221,7 +221,7 @@ inline T fpfs(const std::string_view value, bool force_hex) { } else { #if XE_COMPILER_CLANG || XE_COMPILER_GNUC auto temp = std::string(range); - result = std::strtof(temp.c_str(), nullptr); + result = std::strtod(temp.c_str(), nullptr); #else auto [p, error] = std::from_chars(range.data(), range.data() + range.size(), result, std::chars_format::general); diff --git a/src/xenia/base/system.h b/src/xenia/base/system.h index 9ffbfa88f..4bd0eac2b 100644 --- a/src/xenia/base/system.h +++ b/src/xenia/base/system.h @@ -11,15 +11,24 @@ #define XENIA_BASE_SYSTEM_H_ #include -#include +#include #include "xenia/base/string.h" namespace xe { -void LaunchWebBrowser(const std::string& url); +void LaunchWebBrowser(const std::string_view url); void LaunchFileExplorer(const std::filesystem::path& path); +enum class SimpleMessageBoxType { + Help, + Warning, + Error, +}; + +// This is expected to block the caller until the message box is closed. +void ShowSimpleMessageBox(SimpleMessageBoxType type, std::string_view message); + } // namespace xe #endif // XENIA_BASE_SYSTEM_H_ diff --git a/src/xenia/base/system_linux.cc b/src/xenia/base/system_linux.cc index 80773618a..920c9ab9e 100644 --- a/src/xenia/base/system_linux.cc +++ b/src/xenia/base/system_linux.cc @@ -7,22 +7,64 @@ ****************************************************************************** */ +#include +#include #include -#include +#include #include "xenia/base/assert.h" -#include "xenia/base/platform_linux.h" +#include "xenia/base/logging.h" #include "xenia/base/string.h" #include "xenia/base/system.h" +// Use headers in third party to not depend on system sdl headers for building +#include "third_party/SDL2/include/SDL.h" + namespace xe { -void LaunchWebBrowser(const std::string& url) { - auto cmd = "xdg-open " + url; +void LaunchWebBrowser(const std::string_view url) { + auto cmd = std::string("xdg-open "); + cmd.append(url); system(cmd.c_str()); } void LaunchFileExplorer(const std::filesystem::path& path) { assert_always(); } +void ShowSimpleMessageBox(SimpleMessageBoxType type, std::string_view message) { + void* libsdl2 = dlopen("libSDL2.so", RTLD_LAZY | RTLD_LOCAL); + assert_not_null(libsdl2); + if (libsdl2) { + auto* pSDL_ShowSimpleMessageBox = + reinterpret_cast( + dlsym(libsdl2, "SDL_ShowSimpleMessageBox")); + assert_not_null(pSDL_ShowSimpleMessageBox); + if (pSDL_ShowSimpleMessageBox) { + Uint32 flags; + const char* title; + char* message_copy = reinterpret_cast(alloca(message.size() + 1)); + std::memcpy(message_copy, message.data(), message.size()); + message_copy[message.size()] = '\0'; + + switch (type) { + default: + case SimpleMessageBoxType::Help: + title = "Xenia Help"; + flags = SDL_MESSAGEBOX_INFORMATION; + break; + case SimpleMessageBoxType::Warning: + title = "Xenia Warning"; + flags = SDL_MESSAGEBOX_WARNING; + break; + case SimpleMessageBoxType::Error: + title = "Xenia Error"; + flags = SDL_MESSAGEBOX_ERROR; + break; + } + pSDL_ShowSimpleMessageBox(flags, title, message_copy, NULL); + } + dlclose(libsdl2); + } +} + } // namespace xe diff --git a/src/xenia/base/system_win.cc b/src/xenia/base/system_win.cc index 0b6198445..ae77ae1d4 100644 --- a/src/xenia/base/system_win.cc +++ b/src/xenia/base/system_win.cc @@ -13,9 +13,9 @@ namespace xe { -void LaunchWebBrowser(const std::string& url) { - auto temp = xe::to_utf16(url); - ShellExecuteW(nullptr, L"open", reinterpret_cast(temp.c_str()), +void LaunchWebBrowser(const std::string_view url) { + auto wide_url = xe::to_utf16(url); + ShellExecuteW(nullptr, L"open", reinterpret_cast(wide_url.c_str()), nullptr, nullptr, SW_SHOWNORMAL); } @@ -24,4 +24,28 @@ void LaunchFileExplorer(const std::filesystem::path& url) { SW_SHOWNORMAL); } +void ShowSimpleMessageBox(SimpleMessageBoxType type, + const std::string_view message) { + const wchar_t* title; + std::u16string wide_message = xe::to_utf16(message); + DWORD type_flags = MB_OK | MB_APPLMODAL | MB_SETFOREGROUND; + switch (type) { + default: + case SimpleMessageBoxType::Help: + title = L"Xenia Help"; + type_flags |= MB_ICONINFORMATION; + break; + case SimpleMessageBoxType::Warning: + title = L"Xenia Warning"; + type_flags |= MB_ICONWARNING; + break; + case SimpleMessageBoxType::Error: + title = L"Xenia Error"; + type_flags |= MB_ICONERROR; + break; + } + MessageBoxW(nullptr, reinterpret_cast(wide_message.c_str()), title, + type_flags); +} + } // namespace xe diff --git a/src/xenia/base/testing/memory_test.cc b/src/xenia/base/testing/memory_test.cc index 9853989ad..f78d9c3bb 100644 --- a/src/xenia/base/testing/memory_test.cc +++ b/src/xenia/base/testing/memory_test.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2015 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -18,7 +18,7 @@ namespace xe { namespace base { namespace test { -TEST_CASE("copy_128_aligned", "Copy and Swap") { +TEST_CASE("copy_128_aligned", "[copy_and_swap]") { alignas(128) uint8_t src[256], dest[256]; for (uint8_t i = 0; i < 255; ++i) { src[i] = 255 - i; @@ -37,7 +37,7 @@ TEST_CASE("copy_128_aligned", "Copy and Swap") { REQUIRE(std::memcmp(dest, src + 1, 128)); } -TEST_CASE("copy_and_swap_16_aligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_16_aligned", "[copy_and_swap]") { alignas(16) uint16_t a = 0x1111, b = 0xABCD; copy_and_swap_16_aligned(&a, &b, 1); REQUIRE(a == 0xCDAB); @@ -93,7 +93,7 @@ TEST_CASE("copy_and_swap_16_aligned", "Copy and Swap") { REQUIRE(std::strcmp(f, "s atdnra dlagimnne.t") == 0); } -TEST_CASE("copy_and_swap_16_unaligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_16_unaligned", "[copy_and_swap]") { uint16_t a = 0x1111, b = 0xABCD; copy_and_swap_16_unaligned(&a, &b, 1); REQUIRE(a == 0xCDAB); @@ -139,7 +139,7 @@ TEST_CASE("copy_and_swap_16_unaligned", "Copy and Swap") { "noeg rhtnas atdnra dlagimnne.t") == 0); } -TEST_CASE("copy_and_swap_32_aligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_32_aligned", "[copy_and_swap]") { alignas(32) uint32_t a = 0x11111111, b = 0x89ABCDEF; copy_and_swap_32_aligned(&a, &b, 1); REQUIRE(a == 0xEFCDAB89); @@ -195,7 +195,7 @@ TEST_CASE("copy_and_swap_32_aligned", "Copy and Swap") { REQUIRE(std::strcmp(f, "ats radnla dmngi.tne") == 0); } -TEST_CASE("copy_and_swap_32_unaligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_32_unaligned", "[copy_and_swap]") { uint32_t a = 0x11111111, b = 0x89ABCDEF; copy_and_swap_32_unaligned(&a, &b, 1); REQUIRE(a == 0xEFCDAB89); @@ -259,7 +259,7 @@ TEST_CASE("copy_and_swap_32_unaligned", "Copy and Swap") { "regnahtats radnla dmngi.tne") == 0); } -TEST_CASE("copy_and_swap_64_aligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_64_aligned", "[copy_and_swap]") { alignas(64) uint64_t a = 0x1111111111111111, b = 0x0123456789ABCDEF; copy_and_swap_64_aligned(&a, &b, 1); REQUIRE(a == 0xEFCDAB8967452301); @@ -317,7 +317,7 @@ TEST_CASE("copy_and_swap_64_aligned", "Copy and Swap") { REQUIRE(std::strcmp(f, "radnats mngila d") == 0); } -TEST_CASE("copy_and_swap_64_unaligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_64_unaligned", "[copy_and_swap]") { uint64_t a = 0x1111111111111111, b = 0x0123456789ABCDEF; copy_and_swap_64_unaligned(&a, &b, 1); REQUIRE(a == 0xEFCDAB8967452301); @@ -407,12 +407,12 @@ TEST_CASE("copy_and_swap_64_unaligned", "Copy and Swap") { "regradnats mngila d") == 0); } -TEST_CASE("copy_and_swap_16_in_32_aligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_16_in_32_aligned", "[copy_and_swap]") { // TODO(bwrsandman): test once properly understood. REQUIRE(true == true); } -TEST_CASE("copy_and_swap_16_in_32_unaligned", "Copy and Swap") { +TEST_CASE("copy_and_swap_16_in_32_unaligned", "[copy_and_swap]") { // TODO(bwrsandman): test once properly understood. REQUIRE(true == true); } @@ -425,7 +425,7 @@ TEST_CASE("create_and_close_file_mapping", "Virtual Memory Mapping") { xe::memory::CloseFileMappingHandle(memory, path); } -TEST_CASE("map_view", "Virtual Memory Mapping") { +TEST_CASE("map_view", "[virtual_memory_mapping]") { auto path = fmt::format("xenia_test_{}", Clock::QueryHostTickCount()); const size_t length = 0x100; auto memory = xe::memory::CreateFileMappingHandle( @@ -442,7 +442,7 @@ TEST_CASE("map_view", "Virtual Memory Mapping") { xe::memory::CloseFileMappingHandle(memory, path); } -TEST_CASE("read_write_view", "Virtual Memory Mapping") { +TEST_CASE("read_write_view", "[virtual_memory_mapping]") { const size_t length = 0x100; auto path = fmt::format("xenia_test_{}", Clock::QueryHostTickCount()); auto memory = xe::memory::CreateFileMappingHandle( @@ -469,6 +469,40 @@ TEST_CASE("read_write_view", "Virtual Memory Mapping") { xe::memory::CloseFileMappingHandle(memory, path); } +TEST_CASE("make_fourcc", "[fourcc]") { + SECTION("'1234'") { + const uint32_t fourcc_host = 0x31323334; + constexpr fourcc_t fourcc_1 = make_fourcc('1', '2', '3', '4'); + constexpr fourcc_t fourcc_2 = make_fourcc("1234"); + REQUIRE(fourcc_1 == fourcc_host); + REQUIRE(fourcc_2 == fourcc_host); + REQUIRE(fourcc_1 == fourcc_2); + REQUIRE(fourcc_2 == fourcc_1); + } + + SECTION("'ABcd'") { + const uint32_t fourcc_host = 0x41426364; + constexpr fourcc_t fourcc_1 = make_fourcc('A', 'B', 'c', 'd'); + constexpr fourcc_t fourcc_2 = make_fourcc("ABcd"); + REQUIRE(fourcc_1 == fourcc_host); + REQUIRE(fourcc_2 == fourcc_host); + REQUIRE(fourcc_1 == fourcc_2); + REQUIRE(fourcc_2 == fourcc_1); + } + + SECTION("'XEN\\0'") { + const uint32_t fourcc_host = 0x58454E00; + constexpr fourcc_t fourcc = make_fourcc('X', 'E', 'N', '\0'); + REQUIRE(fourcc == fourcc_host); + } + + SECTION("length()!=4") { + REQUIRE_THROWS(make_fourcc("AB\0\0")); + REQUIRE_THROWS(make_fourcc("AB\0\0AB")); + REQUIRE_THROWS(make_fourcc("ABCDEFGH")); + } +} + } // namespace test } // namespace base } // namespace xe diff --git a/src/xenia/base/testing/threading_test.cc b/src/xenia/base/testing/threading_test.cc index ba6eda0db..4bb87a518 100644 --- a/src/xenia/base/testing/threading_test.cc +++ b/src/xenia/base/testing/threading_test.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** -* Copyright 2018 Ben Vanik. All rights reserved. * +* Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -84,17 +84,17 @@ TEST_CASE("Enable process to set thread affinity") { EnableAffinityConfiguration(); } -TEST_CASE("Yield Current Thread", "MaybeYield") { +TEST_CASE("Yield Current Thread", "[maybe_yield]") { // Run to see if there are any errors MaybeYield(); } -TEST_CASE("Sync with Memory Barrier", "SyncMemory") { +TEST_CASE("Sync with Memory Barrier", "[sync_memory]") { // Run to see if there are any errors SyncMemory(); } -TEST_CASE("Sleep Current Thread", "Sleep") { +TEST_CASE("Sleep Current Thread", "[sleep]") { auto wait_time = 50ms; auto start = std::chrono::steady_clock::now(); Sleep(wait_time); @@ -102,7 +102,7 @@ TEST_CASE("Sleep Current Thread", "Sleep") { REQUIRE(duration >= wait_time); } -TEST_CASE("Sleep Current Thread in Alertable State", "Sleep") { +TEST_CASE("Sleep Current Thread in Alertable State", "[sleep]") { auto wait_time = 50ms; auto start = std::chrono::steady_clock::now(); auto result = threading::AlertableSleep(wait_time); @@ -154,7 +154,7 @@ TEST_CASE("HighResolutionTimer") { // Time the actual sleep duration { const auto interval = 50ms; - std::atomic counter; + std::atomic counter(0); auto start = std::chrono::steady_clock::now(); auto cb = [&counter] { ++counter; }; auto pTimer = HighResolutionTimer::CreateRepeating(interval, cb); @@ -201,7 +201,7 @@ TEST_CASE("HighResolutionTimer") { // spawned from differing threads } -TEST_CASE("Wait on Multiple Handles", "Wait") { +TEST_CASE("Wait on Multiple Handles", "[wait]") { auto mutant = Mutant::Create(true); auto semaphore = Semaphore::Create(10, 10); auto event_ = Event::CreateManualResetEvent(false); @@ -244,7 +244,7 @@ TEST_CASE("Signal and Wait") { REQUIRE(result == WaitResult::kSuccess); } -TEST_CASE("Wait on Event", "Event") { +TEST_CASE("Wait on Event", "[event]") { auto evt = Event::CreateAutoResetEvent(false); WaitResult result; @@ -262,7 +262,7 @@ TEST_CASE("Wait on Event", "Event") { REQUIRE(result == WaitResult::kTimeout); } -TEST_CASE("Reset Event", "Event") { +TEST_CASE("Reset Event", "[event]") { auto evt = Event::CreateAutoResetEvent(false); WaitResult result; @@ -283,7 +283,7 @@ TEST_CASE("Reset Event", "Event") { REQUIRE(result == WaitResult::kSuccess); } -TEST_CASE("Wait on Multiple Events", "Event") { +TEST_CASE("Wait on Multiple Events", "[event]") { auto events = std::array, 4>{ Event::CreateAutoResetEvent(false), Event::CreateAutoResetEvent(false), @@ -348,7 +348,7 @@ TEST_CASE("Wait on Multiple Events", "Event") { // REQUIRE(order[3] == '3'); } -TEST_CASE("Wait on Semaphore", "Semaphore") { +TEST_CASE("Wait on Semaphore", "[semaphore]") { WaitResult result; std::unique_ptr sem; int previous_count = 0; @@ -406,9 +406,13 @@ TEST_CASE("Wait on Semaphore", "Semaphore") { sem = Semaphore::Create(5, 5); Sleep(10ms); // Occupy the semaphore with 5 threads - auto func = [&sem] { + std::atomic wait_count(0); + volatile bool threads_terminate(false); + auto func = [&sem, &wait_count, &threads_terminate] { auto res = Wait(sem.get(), false, 100ms); - Sleep(500ms); + wait_count++; + while (!threads_terminate) { + } if (res == WaitResult::kSuccess) { sem->Release(1, nullptr); } @@ -417,12 +421,14 @@ TEST_CASE("Wait on Semaphore", "Semaphore") { std::thread(func), std::thread(func), std::thread(func), std::thread(func), std::thread(func), }; - // Give threads time to acquire semaphore - Sleep(10ms); + // Wait for threads to finish semaphore calls + while (wait_count != 5) { + } // Attempt to acquire full semaphore with current (6th) thread result = Wait(sem.get(), false, 20ms); REQUIRE(result == WaitResult::kTimeout); // Give threads time to release semaphore + threads_terminate = true; for (auto& t : threads) { t.join(); } @@ -444,7 +450,7 @@ TEST_CASE("Wait on Semaphore", "Semaphore") { // REQUIRE(sem.get() == nullptr); } -TEST_CASE("Wait on Multiple Semaphores", "Semaphore") { +TEST_CASE("Wait on Multiple Semaphores", "[semaphore]") { WaitResult all_result; std::pair any_result; int previous_count; @@ -501,7 +507,7 @@ TEST_CASE("Wait on Multiple Semaphores", "Semaphore") { REQUIRE(previous_count == 4); } -TEST_CASE("Wait on Mutant", "Mutant") { +TEST_CASE("Wait on Mutant", "[mutant]") { WaitResult result; std::unique_ptr mut; @@ -558,7 +564,7 @@ TEST_CASE("Wait on Mutant", "Mutant") { REQUIRE(mut->Release()); } -TEST_CASE("Wait on Multiple Mutants", "Mutant") { +TEST_CASE("Wait on Multiple Mutants", "[mutant]") { WaitResult all_result; std::pair any_result; std::unique_ptr mut0, mut1; @@ -621,7 +627,7 @@ TEST_CASE("Wait on Multiple Mutants", "Mutant") { thread2.join(); } -TEST_CASE("Wait on Timer", "Timer") { +TEST_CASE("Wait on Timer", "[timer]") { WaitResult result; std::unique_ptr timer; @@ -686,7 +692,7 @@ TEST_CASE("Wait on Timer", "Timer") { REQUIRE(result == WaitResult::kTimeout); // No more signals from repeating } -TEST_CASE("Wait on Multiple Timers", "Timer") { +TEST_CASE("Wait on Multiple Timers", "[timer]") { WaitResult all_result; std::pair any_result; @@ -724,13 +730,13 @@ TEST_CASE("Wait on Multiple Timers", "Timer") { REQUIRE(any_result.second == 1); } -TEST_CASE("Create and Trigger Timer Callbacks", "Timer") { +TEST_CASE("Create and Trigger Timer Callbacks", "[timer]") { // TODO(bwrsandman): Check which thread performs callback and timing of // callback REQUIRE(true); } -TEST_CASE("Set and Test Current Thread ID", "Thread") { +TEST_CASE("Set and Test Current Thread ID", "[thread]") { // System ID auto system_id = current_thread_system_id(); REQUIRE(system_id > 0); @@ -763,71 +769,76 @@ TEST_CASE("Set and Test Current Thread Name", "Thread") { REQUIRE_NOTHROW(set_name(old_thread_name)); } -TEST_CASE("Create and Run Thread", "Thread") { +TEST_CASE("Create and Run Thread", "[thread]") { std::unique_ptr thread; WaitResult result; Thread::CreationParameters params = {}; auto func = [] { Sleep(20ms); }; - // Create most basic case of thread - thread = Thread::Create(params, func); - REQUIRE(thread->native_handle() != nullptr); - REQUIRE_NOTHROW(thread->affinity_mask()); - REQUIRE(thread->name().empty()); - result = Wait(thread.get(), false, 50ms); - REQUIRE(result == WaitResult::kSuccess); + SECTION("Create most basic case of thread") { + thread = Thread::Create(params, func); + REQUIRE(thread->native_handle() != nullptr); + REQUIRE_NOTHROW(thread->affinity_mask()); + REQUIRE(thread->name().empty()); + result = Wait(thread.get(), false, 50ms); + REQUIRE(result == WaitResult::kSuccess); + } - // Add thread name - std::string new_name = "Test thread name"; - thread = Thread::Create(params, func); - auto name = thread->name(); - INFO(name.c_str()); - REQUIRE(name.empty()); - thread->set_name(new_name); - REQUIRE(thread->name() == new_name); - result = Wait(thread.get(), false, 50ms); - REQUIRE(result == WaitResult::kSuccess); + SECTION("Add thread name") { + std::string new_name = "Test thread name"; + thread = Thread::Create(params, func); + auto name = thread->name(); + INFO(name.c_str()); + REQUIRE(name.empty()); + thread->set_name(new_name); + REQUIRE(thread->name() == new_name); + result = Wait(thread.get(), false, 50ms); + REQUIRE(result == WaitResult::kSuccess); + } - // Use Terminate to end an infinitely looping thread - thread = Thread::Create(params, [] { - while (true) { - Sleep(1ms); - } - }); - result = Wait(thread.get(), false, 50ms); - REQUIRE(result == WaitResult::kTimeout); - thread->Terminate(-1); - result = Wait(thread.get(), false, 50ms); - REQUIRE(result == WaitResult::kSuccess); + SECTION("Use Terminate to end an infinitely looping thread") { + thread = Thread::Create(params, [] { + while (true) { + Sleep(1ms); + } + }); + result = Wait(thread.get(), false, 50ms); + REQUIRE(result == WaitResult::kTimeout); + thread->Terminate(-1); + result = Wait(thread.get(), false, 50ms); + REQUIRE(result == WaitResult::kSuccess); + } - // Call Exit from inside an infinitely looping thread - thread = Thread::Create(params, [] { - while (true) { + SECTION("Call Exit from inside an infinitely looping thread") { + thread = Thread::Create(params, [] { Thread::Exit(-1); - } - }); - result = Wait(thread.get(), false, 50ms); - REQUIRE(result == WaitResult::kSuccess); + FAIL("Function must not return"); + }); + result = Wait(thread.get(), false, 50ms); + REQUIRE(result == WaitResult::kSuccess); + } - // Call timeout wait on self - result = Wait(Thread::GetCurrentThread(), false, 50ms); - REQUIRE(result == WaitResult::kTimeout); + SECTION("Call timeout wait on self") { + result = Wait(Thread::GetCurrentThread(), false, 50ms); + REQUIRE(result == WaitResult::kTimeout); + } - params.stack_size = 16 * 1024 * 1024; - thread = Thread::Create(params, [] { - while (true) { + SECTION("16kb stack size") { + params.stack_size = 16 * 1024 * 1024; + thread = Thread::Create(params, [] { Thread::Exit(-1); - } - }); - REQUIRE(thread != nullptr); - result = Wait(thread.get(), false, 50ms); - REQUIRE(result == WaitResult::kSuccess); + FAIL("Function must not return"); + }); + REQUIRE(thread != nullptr); + result = Wait(thread.get(), false, 50ms); + REQUIRE(result == WaitResult::kSuccess); + } // TODO(bwrsandman): Test with different priorities // TODO(bwrsandman): Test setting and getting thread affinity } -TEST_CASE("Test Suspending Thread", "Thread") { +TEST_CASE("Test Suspending Thread", "[thread]") { std::unique_ptr thread; WaitResult result; Thread::CreationParameters params = {}; @@ -888,7 +899,7 @@ TEST_CASE("Test Suspending Thread", "Thread") { REQUIRE(result == threading::WaitResult::kSuccess); } -TEST_CASE("Test Thread QueueUserCallback", "Thread") { +TEST_CASE("Test Thread QueueUserCallback", "[thread]") { std::unique_ptr thread; WaitResult result; Thread::CreationParameters params = {}; diff --git a/src/xenia/base/testing/utf8_test.cc b/src/xenia/base/testing/utf8_test.cc index 935f65846..356f8ad0f 100644 --- a/src/xenia/base/testing/utf8_test.cc +++ b/src/xenia/base/testing/utf8_test.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -194,7 +194,7 @@ struct example_results { }; #undef TEST_EXAMPLE_RESULT -TEST_CASE("utf8::count", "UTF-8 Count") { +TEST_CASE("UTF-8 Count", "[utf8]") { example_results results = {}; results.Danish[0] = 88; results.German[0] = 58; @@ -225,7 +225,7 @@ TEST_CASE("utf8::count", "UTF-8 Count") { // TODO(gibbed): hash_fnv1a // TODO(gibbed): hash_fnv1a_case -TEST_CASE("utf8::split", "UTF-8 Split") { +TEST_CASE("UTF-8 Split", "[utf8]") { std::vector parts; // Danish @@ -290,17 +290,17 @@ TEST_CASE("utf8::split", "UTF-8 Split") { // TODO(gibbed): Turkish } -TEST_CASE("utf8::equal_z", "UTF-8 Equal Z") { +TEST_CASE("UTF-8 Equal Z", "[utf8]") { REQUIRE(utf8::equal_z(u8"foo", u8"foo\0")); REQUIRE_FALSE(utf8::equal_z(u8"bar", u8"baz\0")); } -TEST_CASE("utf8::equal_case", "UTF-8 Equal Case") { +TEST_CASE("UTF-8 Equal Case", "[utf8]") { REQUIRE(utf8::equal_case(u8"foo", u8"foo\0")); REQUIRE_FALSE(utf8::equal_case(u8"bar", u8"baz\0")); } -TEST_CASE("utf8::equal_case_z", "UTF-8 Equal Case Z") { +TEST_CASE("UTF-8 Equal Case Z", "[utf8]") { REQUIRE(utf8::equal_case_z(u8"foo", u8"foo\0")); REQUIRE_FALSE(utf8::equal_case_z(u8"bar", u8"baz\0")); } @@ -345,7 +345,7 @@ TEST_CASE("utf8::equal_case_z", "UTF-8 Equal Case Z") { REQUIRE(func(input_values, '\\') == output_value); \ } while (0) -TEST_CASE("utf8::join_paths", "UTF-8 Join Paths") { +TEST_CASE("UTF-8 Join Paths", "[utf8]") { TEST_PATHS(utf8::join_paths, u8""); TEST_PATHS(utf8::join_paths, u8"foo", u8"foo"); TEST_PATHS(utf8::join_paths, u8"foo/bar", u8"foo", u8"bar"); @@ -355,7 +355,7 @@ TEST_CASE("utf8::join_paths", "UTF-8 Join Paths") { // TODO(gibbed): join_guest_paths -TEST_CASE("utf8::fix_path_separators", "UTF-8 Fix Path Separators") { +TEST_CASE("UTF-8 Fix Path Separators", "[utf8]") { TEST_PATH_RAW(utf8::fix_path_separators, "", ""); TEST_PATH_RAW(utf8::fix_path_separators, "\\", "/"); TEST_PATH_RAW(utf8::fix_path_separators, "/", "/"); @@ -386,22 +386,47 @@ TEST_CASE("utf8::fix_path_separators", "UTF-8 Fix Path Separators") { // TODO(gibbed): fix_guest_path_separators -TEST_CASE("utf8::find_name_from_path", "UTF-8 Find Name From Path") { +TEST_CASE("UTF-8 Find Name From Path", "[utf8]") { TEST_PATH(utf8::find_name_from_path, "/", ""); + TEST_PATH(utf8::find_name_from_path, "//", ""); + TEST_PATH(utf8::find_name_from_path, "///", ""); + TEST_PATH(utf8::find_name_from_path, "C/", "C"); + TEST_PATH(utf8::find_name_from_path, "/C/", "C"); + TEST_PATH(utf8::find_name_from_path, "C/D/", "D"); + TEST_PATH(utf8::find_name_from_path, "/C/D/E/", "E"); + TEST_PATH(utf8::find_name_from_path, "foo/bar/D/", "D"); + TEST_PATH(utf8::find_name_from_path, "/foo/bar/E/qux/", "qux"); TEST_PATH(utf8::find_name_from_path, "foo/bar/baz/qux/", "qux"); + TEST_PATH(utf8::find_name_from_path, "foo/bar/baz/qux//", "qux"); + TEST_PATH(utf8::find_name_from_path, "foo/bar/baz/qux///", "qux"); TEST_PATH(utf8::find_name_from_path, "foo/bar/baz/qux.txt", "qux.txt"); TEST_PATH(utf8::find_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげほげ"); + TEST_PATH(utf8::find_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "ほげほげ"); + TEST_PATH(utf8::find_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "ほげほげ"); TEST_PATH(utf8::find_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ.txt", "ほげほげ.txt"); + TEST_PATH(utf8::find_name_from_path, "/foo", "foo"); + TEST_PATH(utf8::find_name_from_path, "//foo", "foo"); + TEST_PATH(utf8::find_name_from_path, "///foo", "foo"); TEST_PATH(utf8::find_name_from_path, "/foo/bar/baz/qux.txt", "qux.txt"); TEST_PATH(utf8::find_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげほげ"); + TEST_PATH(utf8::find_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "ほげほげ"); + TEST_PATH(utf8::find_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "ほげほげ"); TEST_PATH(utf8::find_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ.txt", "ほげほげ.txt"); TEST_PATH(utf8::find_name_from_path, "X:/foo/bar/baz/qux.txt", "qux.txt"); TEST_PATH(utf8::find_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげほげ"); + TEST_PATH(utf8::find_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "ほげほげ"); + TEST_PATH(utf8::find_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "ほげほげ"); TEST_PATH(utf8::find_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ.txt", "ほげほげ.txt"); TEST_PATH(utf8::find_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら.ほげほげ", @@ -410,78 +435,144 @@ TEST_CASE("utf8::find_name_from_path", "UTF-8 Find Name From Path") { // TODO(gibbed): find_name_from_guest_path -TEST_CASE("utf8::find_base_name_from_path", "UTF-8 Find Base Name From Path") { +TEST_CASE("UTF-8 Find Base Name From Path", "[utf8]") { TEST_PATH(utf8::find_base_name_from_path, "foo/bar/baz/qux.txt", "qux"); TEST_PATH(utf8::find_base_name_from_path, "foo/bar/baz/qux/", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "foo/bar/baz/qux//", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "foo/bar/baz/qux///", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "C/", "C"); + TEST_PATH(utf8::find_base_name_from_path, "/C/", "C"); + TEST_PATH(utf8::find_base_name_from_path, "C/D/", "D"); + TEST_PATH(utf8::find_base_name_from_path, "/C/D/E/", "E"); + TEST_PATH(utf8::find_base_name_from_path, "foo/bar/D/", "D"); TEST_PATH(utf8::find_base_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ.txt", "ほげほげ"); TEST_PATH(utf8::find_base_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげほげ"); + TEST_PATH(utf8::find_base_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "ほげほげ"); + TEST_PATH(utf8::find_base_name_from_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "ほげほげ"); TEST_PATH(utf8::find_base_name_from_path, "ほげ/ぴよ/ふが/ほげら.ほげほげ", "ほげら"); TEST_PATH(utf8::find_base_name_from_path, "/foo/bar/baz/qux.txt", "qux"); TEST_PATH(utf8::find_base_name_from_path, "/foo/bar/baz/qux/", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "/foo/bar/baz/qux//", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "/foo/bar/baz/qux///", "qux"); TEST_PATH(utf8::find_base_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ.txt", "ほげほげ"); TEST_PATH(utf8::find_base_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげほげ"); + TEST_PATH(utf8::find_base_name_from_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "ほげほげ"); + TEST_PATH(utf8::find_base_name_from_path, + "/ほげ/ぴよ/ふが/ほげら/ほげほげ///", "ほげほげ"); TEST_PATH(utf8::find_base_name_from_path, "/ほげ/ぴよ/ふが/ほげら.ほげほげ", "ほげら"); TEST_PATH(utf8::find_base_name_from_path, "X:/foo/bar/baz/qux.txt", "qux"); TEST_PATH(utf8::find_base_name_from_path, "X:/foo/bar/baz/qux/", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "X:/foo/bar/baz/qux//", "qux"); + TEST_PATH(utf8::find_base_name_from_path, "X:/foo/bar/baz/qux///", "qux"); TEST_PATH(utf8::find_base_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ.txt", "ほげほげ"); TEST_PATH(utf8::find_base_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげほげ"); + TEST_PATH(utf8::find_base_name_from_path, + "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ//", "ほげほげ"); + TEST_PATH(utf8::find_base_name_from_path, + "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ///", "ほげほげ"); TEST_PATH(utf8::find_base_name_from_path, "X:/ほげ/ぴよ/ふが/ほげら.ほげほげ", "ほげら"); } // TODO(gibbed): find_base_name_from_guest_path -TEST_CASE("utf8::find_base_path", "UTF-8 Find Base Path") { +TEST_CASE("UTF-8 Find Base Path", "[utf8]") { TEST_PATH(utf8::find_base_path, "", ""); TEST_PATH(utf8::find_base_path, "/", ""); TEST_PATH(utf8::find_base_path, "//", ""); + TEST_PATH(utf8::find_base_path, "///", ""); TEST_PATH(utf8::find_base_path, "/foo", ""); + TEST_PATH(utf8::find_base_path, "//foo", ""); + TEST_PATH(utf8::find_base_path, "///foo", ""); TEST_PATH(utf8::find_base_path, "/foo/", ""); + TEST_PATH(utf8::find_base_path, "/foo//", ""); + TEST_PATH(utf8::find_base_path, "/foo///", ""); + TEST_PATH(utf8::find_base_path, "//foo/", ""); + TEST_PATH(utf8::find_base_path, "//foo//", ""); + TEST_PATH(utf8::find_base_path, "//foo///", ""); + TEST_PATH(utf8::find_base_path, "///foo/", ""); + TEST_PATH(utf8::find_base_path, "///foo//", ""); + TEST_PATH(utf8::find_base_path, "///foo///", ""); TEST_PATH(utf8::find_base_path, "/foo/bar", "/foo"); TEST_PATH(utf8::find_base_path, "/foo/bar/", "/foo"); + TEST_PATH(utf8::find_base_path, "/foo/bar//", "/foo"); + TEST_PATH(utf8::find_base_path, "/foo/bar///", "/foo"); TEST_PATH(utf8::find_base_path, "/foo/bar/baz/qux", "/foo/bar/baz"); TEST_PATH(utf8::find_base_path, "/foo/bar/baz/qux/", "/foo/bar/baz"); + TEST_PATH(utf8::find_base_path, "/foo/bar/baz/qux//", "/foo/bar/baz"); + TEST_PATH(utf8::find_base_path, "/foo/bar/baz/qux///", "/foo/bar/baz"); TEST_PATH(utf8::find_base_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ", "/ほげ/ぴよ/ふが/ほげら"); TEST_PATH(utf8::find_base_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ/", "/ほげ/ぴよ/ふが/ほげら"); + TEST_PATH(utf8::find_base_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "/ほげ/ぴよ/ふが/ほげら"); + TEST_PATH(utf8::find_base_path, "/ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "/ほげ/ぴよ/ふが/ほげら"); TEST_PATH(utf8::find_base_path, "foo", ""); TEST_PATH(utf8::find_base_path, "foo/", ""); + TEST_PATH(utf8::find_base_path, "foo//", ""); + TEST_PATH(utf8::find_base_path, "foo///", ""); TEST_PATH(utf8::find_base_path, "foo/bar", "foo"); TEST_PATH(utf8::find_base_path, "foo/bar/", "foo"); + TEST_PATH(utf8::find_base_path, "foo/bar//", "foo"); + TEST_PATH(utf8::find_base_path, "foo/bar///", "foo"); TEST_PATH(utf8::find_base_path, "foo/bar/baz/qux", "foo/bar/baz"); TEST_PATH(utf8::find_base_path, "foo/bar/baz/qux/", "foo/bar/baz"); + TEST_PATH(utf8::find_base_path, "foo/bar/baz/qux//", "foo/bar/baz"); + TEST_PATH(utf8::find_base_path, "foo/bar/baz/qux///", "foo/bar/baz"); TEST_PATH(utf8::find_base_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ", "ほげ/ぴよ/ふが/ほげら"); TEST_PATH(utf8::find_base_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ/", "ほげ/ぴよ/ふが/ほげら"); + TEST_PATH(utf8::find_base_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "ほげ/ぴよ/ふが/ほげら"); + TEST_PATH(utf8::find_base_path, "ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "ほげ/ぴよ/ふが/ほげら"); TEST_PATH(utf8::find_base_path, "X:", ""); TEST_PATH(utf8::find_base_path, "X:/", ""); + TEST_PATH(utf8::find_base_path, "X://", ""); + TEST_PATH(utf8::find_base_path, "X:///", ""); TEST_PATH(utf8::find_base_path, "X:/foo", "X:"); TEST_PATH(utf8::find_base_path, "X:/foo/", "X:"); + TEST_PATH(utf8::find_base_path, "X:/foo//", "X:"); + TEST_PATH(utf8::find_base_path, "X:/foo///", "X:"); TEST_PATH(utf8::find_base_path, "X:/foo/bar", "X:/foo"); TEST_PATH(utf8::find_base_path, "X:/foo/bar/", "X:/foo"); + TEST_PATH(utf8::find_base_path, "X:/foo/bar//", "X:/foo"); + TEST_PATH(utf8::find_base_path, "X:/foo/bar///", "X:/foo"); TEST_PATH(utf8::find_base_path, "X:/foo/bar/baz/qux", "X:/foo/bar/baz"); TEST_PATH(utf8::find_base_path, "X:/foo/bar/baz/qux/", "X:/foo/bar/baz"); + TEST_PATH(utf8::find_base_path, "X:/foo/bar/baz/qux//", "X:/foo/bar/baz"); + TEST_PATH(utf8::find_base_path, "X:/foo/bar/baz/qux///", "X:/foo/bar/baz"); TEST_PATH(utf8::find_base_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ", "X:/ほげ/ぴよ/ふが/ほげら"); TEST_PATH(utf8::find_base_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ/", "X:/ほげ/ぴよ/ふが/ほげら"); + TEST_PATH(utf8::find_base_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ//", + "X:/ほげ/ぴよ/ふが/ほげら"); + TEST_PATH(utf8::find_base_path, "X:/ほげ/ぴよ/ふが/ほげら/ほげほげ///", + "X:/ほげ/ぴよ/ふが/ほげら"); } // TODO(gibbed): find_base_guest_path -TEST_CASE("utf8::canonicalize_path", "UTF-8 Canonicalize Path") { +TEST_CASE("UTF-8 Canonicalize Path", "[utf8]") { TEST_PATH(utf8::canonicalize_path, "foo/bar/baz/qux", "foo/bar/baz/qux"); TEST_PATH(utf8::canonicalize_path, "foo/bar/baz/qux/", "foo/bar/baz/qux"); + TEST_PATH(utf8::canonicalize_path, "foo/bar/baz/qux//", "foo/bar/baz/qux"); + TEST_PATH(utf8::canonicalize_path, "foo/bar/baz/qux///", "foo/bar/baz/qux"); TEST_PATH(utf8::canonicalize_path, "foo/./baz/qux", "foo/baz/qux"); TEST_PATH(utf8::canonicalize_path, "foo/./baz/qux/", "foo/baz/qux"); TEST_PATH(utf8::canonicalize_path, "foo/../baz/qux", "baz/qux"); diff --git a/src/xenia/base/threading_posix.cc b/src/xenia/base/threading_posix.cc index 436e81cfb..7766df05e 100644 --- a/src/xenia/base/threading_posix.cc +++ b/src/xenia/base/threading_posix.cc @@ -155,29 +155,36 @@ bool SetTlsValue(TlsHandle handle, uintptr_t value) { class PosixHighResolutionTimer : public HighResolutionTimer { public: explicit PosixHighResolutionTimer(std::function callback) - : callback_(std::move(callback)), timer_(nullptr) {} + : callback_(std::move(callback)), valid_(false) {} ~PosixHighResolutionTimer() override { - if (timer_) timer_delete(timer_); + if (valid_) timer_delete(timer_); } bool Initialize(std::chrono::milliseconds period) { + if (valid_) { + // Double initialization + assert_always(); + return false; + } // Create timer sigevent sev{}; sev.sigev_notify = SIGEV_SIGNAL; sev.sigev_signo = GetSystemSignal(SignalType::kHighResolutionTimer); sev.sigev_value.sival_ptr = (void*)&callback_; - if (timer_create(CLOCK_REALTIME, &sev, &timer_) == -1) return false; + if (timer_create(CLOCK_MONOTONIC, &sev, &timer_) == -1) return false; // Start timer itimerspec its{}; its.it_value = DurationToTimeSpec(period); its.it_interval = its.it_value; - return timer_settime(timer_, 0, &its, nullptr) != -1; + valid_ = timer_settime(timer_, 0, &its, nullptr) != -1; + return valid_; } private: std::function callback_; timer_t timer_; + bool valid_; // all values for timer_t are legal so we need this }; std::unique_ptr HighResolutionTimer::CreateRepeating( @@ -187,7 +194,7 @@ std::unique_ptr HighResolutionTimer::CreateRepeating( if (!timer->Initialize(period)) { return nullptr; } - return std::unique_ptr(timer.release()); + return std::move(timer); } class PosixConditionBase { @@ -419,7 +426,7 @@ class PosixCondition : public PosixConditionBase { sev.sigev_notify = SIGEV_SIGNAL; sev.sigev_signo = GetSystemSignal(SignalType::kTimer); sev.sigev_value.sival_ptr = this; - if (timer_create(CLOCK_REALTIME, &sev, &timer_) == -1) return false; + if (timer_create(CLOCK_MONOTONIC, &sev, &timer_) == -1) return false; } // Start timer @@ -728,31 +735,44 @@ class PosixCondition : public PosixConditionBase { } void Terminate(int exit_code) { + bool is_current_thread = pthread_self() == thread_; { std::unique_lock lock(state_mutex_); + if (state_ == State::kFinished) { + if (is_current_thread) { + // This is really bad. Some thread must have called Terminate() on us + // just before we decided to terminate ourselves + assert_always(); + for (;;) { + // Wait for pthread_cancel() to actually happen. + } + } + return; + } state_ = State::kFinished; } - std::lock_guard lock(mutex_); - - // Sometimes the thread can call terminate twice before stopping - if (thread_ == 0) return; - auto thread = thread_; - - exit_code_ = exit_code; - signaled_ = true; - cond_.notify_all(); + { + std::lock_guard lock(mutex_); + exit_code_ = exit_code; + signaled_ = true; + cond_.notify_all(); + } + if (is_current_thread) { + pthread_exit(reinterpret_cast(exit_code)); + } else { #ifdef XE_PLATFORM_ANDROID - if (pthread_kill(thread, GetSystemSignal(SignalType::kThreadTerminate)) != - 0) { - assert_always(); - } + if (pthread_kill(thread_, + GetSystemSignal(SignalType::kThreadTerminate)) != 0) { + assert_always(); + } #else - if (pthread_cancel(thread) != 0) { - assert_always(); - } + if (pthread_cancel(thread_) != 0) { + assert_always(); + } #endif + } } void WaitStarted() const { @@ -778,7 +798,6 @@ class PosixCondition : public PosixConditionBase { inline void post_execution() override { if (thread_) { pthread_join(thread_, nullptr); - thread_ = 0; } } pthread_t thread_; @@ -1115,13 +1134,12 @@ Thread* Thread::GetCurrentThread() { void Thread::Exit(int exit_code) { if (current_thread_) { current_thread_->Terminate(exit_code); - // Sometimes the current thread keeps running after being cancelled. - // Prevent other calls from this thread from using current_thread_. - current_thread_ = nullptr; } else { // Should only happen with the main thread pthread_exit(reinterpret_cast(exit_code)); } + // Function must not return + assert_always(); } void set_name(const std::string_view name) { diff --git a/src/xenia/base/threading_win.cc b/src/xenia/base/threading_win.cc index e91cdf1ce..60c746e55 100644 --- a/src/xenia/base/threading_win.cc +++ b/src/xenia/base/threading_win.cc @@ -111,30 +111,34 @@ bool SetTlsValue(TlsHandle handle, uintptr_t value) { class Win32HighResolutionTimer : public HighResolutionTimer { public: Win32HighResolutionTimer(std::function callback) - : callback_(callback) {} + : callback_(std::move(callback)) {} ~Win32HighResolutionTimer() override { - if (handle_) { + if (valid_) { DeleteTimerQueueTimer(nullptr, handle_, INVALID_HANDLE_VALUE); handle_ = nullptr; } } bool Initialize(std::chrono::milliseconds period) { - return CreateTimerQueueTimer( - &handle_, nullptr, - [](PVOID param, BOOLEAN timer_or_wait_fired) { - auto timer = - reinterpret_cast(param); - timer->callback_(); - }, - this, 0, DWORD(period.count()), WT_EXECUTEINTIMERTHREAD) - ? true - : false; + if (valid_) { + // Double initialization + assert_always(); + return false; + } + valid_ = !!CreateTimerQueueTimer( + &handle_, nullptr, + [](PVOID param, BOOLEAN timer_or_wait_fired) { + auto timer = reinterpret_cast(param); + timer->callback_(); + }, + this, 0, DWORD(period.count()), WT_EXECUTEINTIMERTHREAD); + return valid_; } private: - HANDLE handle_ = nullptr; std::function callback_; + HANDLE handle_ = nullptr; + bool valid_ = false; // Documentation does not state which HANDLE is invalid }; std::unique_ptr HighResolutionTimer::CreateRepeating( @@ -143,7 +147,7 @@ std::unique_ptr HighResolutionTimer::CreateRepeating( if (!timer->Initialize(period)) { return nullptr; } - return std::unique_ptr(timer.release()); + return std::move(timer); } template diff --git a/src/xenia/base/utf8.cc b/src/xenia/base/utf8.cc index 308117477..3f4775b7a 100644 --- a/src/xenia/base/utf8.cc +++ b/src/xenia/base/utf8.cc @@ -582,43 +582,40 @@ std::string find_name_from_path(const std::string_view path, auto it = end; --it; - // path is padded with separator - size_t padding = 0; - if (*it == uint32_t(separator)) { + // skip trailing separators at the end of the path + while (*it == uint32_t(separator)) { if (it == begin) { + // path is all separators, name is empty return std::string(); } --it; - padding = 1; } - // path is just separator - if (it == begin) { - return std::string(); - } + // update end so it is before any trailing separators + end = std::next(it); - // search for separator - while (it != begin) { - if (*it == uint32_t(separator)) { + // skip non-separators + while (*it != uint32_t(separator)) { + if (it == begin) { break; } --it; } - // no separator -- copy entire string (except trailing separator) - if (it == begin) { - return std::string(path.substr(0, path.size() - padding)); + // if the iterator is on a separator, advance + if (*it == uint32_t(separator)) { + ++it; } - auto length = byte_length(std::next(it), end); - auto offset = path.length() - length; - return std::string(path.substr(offset, length - padding)); + auto offset = byte_length(begin, it); + auto length = byte_length(it, end); + return std::string(path.substr(offset, length)); } std::string find_base_name_from_path(const std::string_view path, char32_t separator) { auto name = find_name_from_path(path, separator); - if (!name.size()) { + if (!name.length()) { return std::string(); } @@ -653,28 +650,34 @@ std::string find_base_path(const std::string_view path, char32_t separator) { auto it = end; --it; - // skip trailing separator - if (*it == uint32_t(separator)) { + // skip trailing separators at the end of the path + while (*it == uint32_t(separator)) { if (it == begin) { return std::string(); } --it; } - while (it != begin) { - if (*it == uint32_t(separator)) { - break; + // skip non-separators + while (*it != uint32_t(separator)) { + if (it == begin) { + // there are no separators, base path is empty + return std::string(); } --it; } - if (it == begin) { - return std::string(); + // skip trailing separators at the end of the base path + while (*it == uint32_t(separator)) { + if (it == begin) { + // base path is all separators, base path is empty + return std::string(); + } + --it; } - auto length = byte_length(it, end); - auto offset = path.length() - length; - return std::string(path.substr(0, offset)); + auto length = byte_length(begin, std::next(it)); + return std::string(path.substr(0, length)); } std::string canonicalize_path(const std::string_view path, char32_t separator) { diff --git a/src/xenia/base/vec128.h b/src/xenia/base/vec128.h index 46f0527fb..cfba512a0 100644 --- a/src/xenia/base/vec128.h +++ b/src/xenia/base/vec128.h @@ -106,18 +106,6 @@ typedef struct alignas(16) vec128_s { }; }; - vec128_s() = default; - vec128_s(const vec128_s& other) { - high = other.high; - low = other.low; - } - - vec128_s& operator=(const vec128_s& b) { - high = b.high; - low = b.low; - return *this; - } - bool operator==(const vec128_s& b) const { return low == b.low && high == b.high; } diff --git a/src/xenia/config.cc b/src/xenia/config.cc index 59027e900..be19bccda 100644 --- a/src/xenia/config.cc +++ b/src/xenia/config.cc @@ -25,6 +25,14 @@ std::shared_ptr ParseFile( throw cpptoml::parse_exception(xe::path_to_utf8(filename) + " could not be opened for parsing"); } + // since cpptoml can't parse files with a UTF-8 BOM we need to skip them + char bom[3]; + file.read(bom, sizeof(bom)); + if (file.fail() || bom[0] != '\xEF' || bom[1] != '\xBB' || bom[2] != '\xBF') { + file.clear(); + file.seekg(0); + } + cpptoml::parser p(file); return p.parse(); } diff --git a/src/xenia/cpu/backend/x64/x64_backend.cc b/src/xenia/cpu/backend/x64/x64_backend.cc index 0c77034ac..130d84456 100644 --- a/src/xenia/cpu/backend/x64/x64_backend.cc +++ b/src/xenia/cpu/backend/x64/x64_backend.cc @@ -519,7 +519,7 @@ GuestToHostThunk X64ThunkEmitter::EmitGuestToHostThunk() { } // X64Emitter handles actually resolving functions. -extern "C" uint64_t ResolveFunction(void* raw_context, uint32_t target_address); +uint64_t ResolveFunction(void* raw_context, uint64_t target_address); ResolveFunctionThunk X64ThunkEmitter::EmitResolveFunctionThunk() { // ebx = target PPC address @@ -548,7 +548,7 @@ ResolveFunctionThunk X64ThunkEmitter::EmitResolveFunctionThunk() { mov(rcx, rsi); // context mov(rdx, rbx); - mov(rax, uint64_t(&ResolveFunction)); + mov(rax, reinterpret_cast(&ResolveFunction)); call(rax); EmitLoadVolatileRegs(); diff --git a/src/xenia/cpu/backend/x64/x64_emitter.cc b/src/xenia/cpu/backend/x64/x64_emitter.cc index 4076c0d65..f3419bb05 100644 --- a/src/xenia/cpu/backend/x64/x64_emitter.cc +++ b/src/xenia/cpu/backend/x64/x64_emitter.cc @@ -382,15 +382,14 @@ void X64Emitter::UnimplementedInstr(const hir::Instr* i) { } // This is used by the X64ThunkEmitter's ResolveFunctionThunk. -extern "C" uint64_t ResolveFunction(void* raw_context, - uint64_t target_address) { +uint64_t ResolveFunction(void* raw_context, uint64_t target_address) { auto thread_state = *reinterpret_cast(raw_context); // TODO(benvanik): required? assert_not_zero(target_address); - auto fn = - thread_state->processor()->ResolveFunction((uint32_t)target_address); + auto fn = thread_state->processor()->ResolveFunction( + static_cast(target_address)); assert_not_null(fn); auto x64_fn = static_cast(fn); uint64_t addr = reinterpret_cast(x64_fn->machine_code()); diff --git a/src/xenia/cpu/backend/x64/x64_op.h b/src/xenia/cpu/backend/x64/x64_op.h index f71338304..0846f9255 100644 --- a/src/xenia/cpu/backend/x64/x64_op.h +++ b/src/xenia/cpu/backend/x64/x64_op.h @@ -105,8 +105,7 @@ struct Op : OpBase { struct VoidOp : Op { protected: - template - friend struct Op; + friend struct Op; template friend struct I; void Load(const Instr::Op& op) {} @@ -116,8 +115,7 @@ struct OffsetOp : Op { uint64_t value; protected: - template - friend struct Op; + friend struct Op; template friend struct I; void Load(const Instr::Op& op) { this->value = op.offset; } @@ -127,8 +125,7 @@ struct SymbolOp : Op { Function* value; protected: - template - friend struct Op; + friend struct Op; template friend struct I; bool Load(const Instr::Op& op) { @@ -141,8 +138,7 @@ struct LabelOp : Op { hir::Label* value; protected: - template - friend struct Op; + friend struct Op; template friend struct I; void Load(const Instr::Op& op) { this->value = op.label; } diff --git a/src/xenia/cpu/compiler/passes/data_flow_analysis_pass.cc b/src/xenia/cpu/compiler/passes/data_flow_analysis_pass.cc index 622af656b..56cf1c769 100644 --- a/src/xenia/cpu/compiler/passes/data_flow_analysis_pass.cc +++ b/src/xenia/cpu/compiler/passes/data_flow_analysis_pass.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2014 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -73,14 +73,14 @@ void DataFlowAnalysisPass::AnalyzeFlow(HIRBuilder* builder, // Stash for value map. We may want to maintain this during building. auto arena = builder->arena(); auto value_map = reinterpret_cast( - arena->Alloc(sizeof(Value*) * max_value_estimate)); + arena->Alloc(sizeof(Value*) * max_value_estimate, alignof(Value))); // Allocate incoming bitvectors for use by blocks. We don't need outgoing // because they are only used during the block iteration. // Mapped by block ordinal. // TODO(benvanik): cache this list, grow as needed, etc. - auto incoming_bitvectors = - (llvm::BitVector**)arena->Alloc(sizeof(llvm::BitVector*) * block_count); + auto incoming_bitvectors = (llvm::BitVector**)arena->Alloc( + sizeof(llvm::BitVector*) * block_count, alignof(llvm::BitVector)); for (auto n = 0u; n < block_count; n++) { incoming_bitvectors[n] = new llvm::BitVector(max_value_estimate); } diff --git a/src/xenia/cpu/compiler/passes/finalization_pass.cc b/src/xenia/cpu/compiler/passes/finalization_pass.cc index ddd22a646..22b386799 100644 --- a/src/xenia/cpu/compiler/passes/finalization_pass.cc +++ b/src/xenia/cpu/compiler/passes/finalization_pass.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -45,7 +45,7 @@ bool FinalizationPass::Run(HIRBuilder* builder) { while (label) { if (!label->name) { const size_t label_len = 6 + 4; - char* name = reinterpret_cast(arena->Alloc(label_len + 1)); + char* name = reinterpret_cast(arena->Alloc(label_len + 1, 1)); assert_true(label->id <= 9999); auto end = fmt::format_to_n(name, label_len, "_label{}", label->id); name[end.size] = '\0'; diff --git a/src/xenia/cpu/export_resolver.h b/src/xenia/cpu/export_resolver.h index 5b1bdc1f8..216f47548 100644 --- a/src/xenia/cpu/export_resolver.h +++ b/src/xenia/cpu/export_resolver.h @@ -39,7 +39,7 @@ enum class ExportCategory : uint8_t { }; struct ExportTag { - typedef uint32_t type; + using type = uint32_t; // packed like so: // ll...... cccccccc ........ ..bihssi diff --git a/src/xenia/cpu/hir/hir_builder.cc b/src/xenia/cpu/hir/hir_builder.cc index b1a908791..fc64b7c2e 100644 --- a/src/xenia/cpu/hir/hir_builder.cc +++ b/src/xenia/cpu/hir/hir_builder.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -739,7 +739,7 @@ void HIRBuilder::Comment(std::string_view value) { return; } auto size = value.size(); - auto p = reinterpret_cast(arena_->Alloc(size + 1)); + auto p = reinterpret_cast(arena_->Alloc(size + 1, 1)); std::memcpy(p, value.data(), size); p[size] = '\0'; Instr* i = AppendInstr(OPCODE_COMMENT_info, 0); @@ -752,7 +752,7 @@ void HIRBuilder::Comment(const StringBuffer& value) { return; } auto size = value.length(); - auto p = reinterpret_cast(arena_->Alloc(size + 1)); + auto p = reinterpret_cast(arena_->Alloc(size + 1, 1)); std::memcpy(p, value.buffer(), size); p[size] = '\0'; Instr* i = AppendInstr(OPCODE_COMMENT_info, 0); diff --git a/src/xenia/cpu/hir/hir_builder.h b/src/xenia/cpu/hir/hir_builder.h index 00661e4c2..81c406c12 100644 --- a/src/xenia/cpu/hir/hir_builder.h +++ b/src/xenia/cpu/hir/hir_builder.h @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -75,7 +75,7 @@ class HIRBuilder { template void CommentFormat(const std::string_view format, const Args&... args) { static const uint32_t kMaxCommentSize = 1024; - char* p = reinterpret_cast(arena_->Alloc(kMaxCommentSize)); + char* p = reinterpret_cast(arena_->Alloc(kMaxCommentSize, 1)); auto result = fmt::format_to_n(p, kMaxCommentSize - 1, format, args...); p[result.size] = '\0'; size_t rewind = kMaxCommentSize - 1 - result.size; diff --git a/src/xenia/cpu/hir/value.cc b/src/xenia/cpu/hir/value.cc index 666648b03..08de8af9b 100644 --- a/src/xenia/cpu/hir/value.cc +++ b/src/xenia/cpu/hir/value.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -245,65 +245,34 @@ void Value::Convert(TypeName target_type, RoundMode round_mode) { } } +template +T __inline RoundValue(RoundMode round_mode, T value) { + switch (round_mode) { + case ROUND_TO_ZERO: + return std::trunc(value); + case ROUND_TO_NEAREST: + return std::round(value); + case ROUND_TO_MINUS_INFINITY: + return std::floor(value); + case ROUND_TO_POSITIVE_INFINITY: + return std::ceil(value); + default: + assert_unhandled_case(round_mode); + return value; + } +} + void Value::Round(RoundMode round_mode) { switch (type) { case FLOAT32_TYPE: - switch (round_mode) { - case ROUND_TO_ZERO: - constant.f32 = std::trunc(constant.f32); - break; - case ROUND_TO_NEAREST: - constant.f32 = std::round(constant.f32); - return; - case ROUND_TO_MINUS_INFINITY: - constant.f32 = std::floor(constant.f32); - break; - case ROUND_TO_POSITIVE_INFINITY: - constant.f32 = std::ceil(constant.f32); - break; - default: - assert_unhandled_case(round_mode); - return; - } + constant.f32 = RoundValue(round_mode, constant.f32); return; case FLOAT64_TYPE: - switch (round_mode) { - case ROUND_TO_ZERO: - constant.f64 = std::trunc(constant.f64); - break; - case ROUND_TO_NEAREST: - constant.f64 = std::round(constant.f64); - return; - case ROUND_TO_MINUS_INFINITY: - constant.f64 = std::floor(constant.f64); - break; - case ROUND_TO_POSITIVE_INFINITY: - constant.f64 = std::ceil(constant.f64); - break; - default: - assert_unhandled_case(round_mode); - return; - } + constant.f64 = RoundValue(round_mode, constant.f64); return; case VEC128_TYPE: for (int i = 0; i < 4; i++) { - switch (round_mode) { - case ROUND_TO_ZERO: - constant.v128.f32[i] = std::trunc(constant.v128.f32[i]); - break; - case ROUND_TO_NEAREST: - constant.v128.f32[i] = std::round(constant.v128.f32[i]); - break; - case ROUND_TO_MINUS_INFINITY: - constant.v128.f32[i] = std::floor(constant.v128.f32[i]); - break; - case ROUND_TO_POSITIVE_INFINITY: - constant.v128.f32[i] = std::ceil(constant.v128.f32[i]); - break; - default: - assert_unhandled_case(round_mode); - return; - } + constant.v128.f32[i] = RoundValue(round_mode, constant.v128.f32[i]); } return; default: diff --git a/src/xenia/cpu/ppc/ppc_emit_control.cc b/src/xenia/cpu/ppc/ppc_emit_control.cc index 4452c55ea..eafd15492 100644 --- a/src/xenia/cpu/ppc/ppc_emit_control.cc +++ b/src/xenia/cpu/ppc/ppc_emit_control.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -426,6 +426,10 @@ int InstrEmit_sc(PPCHIRBuilder& f, const InstrData& i) { // Game code should only ever use LEV=0. // LEV=2 is to signify 'call import' from Xenia. // TODO(gibbed): syscalls! + if (i.SC.LEV == 0) { + f.CallExtern(f.builtins()->syscall_handler); + return 0; + } if (i.SC.LEV == 2) { f.CallExtern(f.function()); return 0; @@ -807,5 +811,5 @@ void RegisterEmitCategoryControl() { } } // namespace cpu -} // namespace xe +} // namespace cpu } // namespace xe diff --git a/src/xenia/cpu/ppc/ppc_frontend.cc b/src/xenia/cpu/ppc/ppc_frontend.cc index 1696cadfa..33d6f892d 100644 --- a/src/xenia/cpu/ppc/ppc_frontend.cc +++ b/src/xenia/cpu/ppc/ppc_frontend.cc @@ -10,6 +10,7 @@ #include "xenia/cpu/ppc/ppc_frontend.h" #include "xenia/base/atomic.h" +#include "xenia/base/logging.h" #include "xenia/cpu/ppc/ppc_context.h" #include "xenia/cpu/ppc/ppc_emit.h" #include "xenia/cpu/ppc/ppc_opcode_info.h" @@ -78,6 +79,17 @@ void LeaveGlobalLock(PPCContext* ppc_context, void* arg0, void* arg1) { global_mutex->unlock(); } +void SyscallHandler(PPCContext* ppc_context, void* arg0, void* arg1) { + uint64_t syscall_number = ppc_context->r[0]; + switch (syscall_number) { + default: + assert_unhandled_case(syscall_number); + XELOGE("Unhandled syscall {}!", syscall_number); + break; +#pragma warning(suppress : 4065) + } +} + bool PPCFrontend::Initialize() { void* arg0 = reinterpret_cast(&xe::global_critical_region::mutex()); void* arg1 = reinterpret_cast(&builtins_.global_lock_count); @@ -87,6 +99,8 @@ bool PPCFrontend::Initialize() { processor_->DefineBuiltin("EnterGlobalLock", EnterGlobalLock, arg0, arg1); builtins_.leave_global_lock = processor_->DefineBuiltin("LeaveGlobalLock", LeaveGlobalLock, arg0, arg1); + builtins_.syscall_handler = processor_->DefineBuiltin( + "SyscallHandler", SyscallHandler, nullptr, nullptr); return true; } diff --git a/src/xenia/cpu/ppc/ppc_frontend.h b/src/xenia/cpu/ppc/ppc_frontend.h index 7a6acd63b..d2a41c76c 100644 --- a/src/xenia/cpu/ppc/ppc_frontend.h +++ b/src/xenia/cpu/ppc/ppc_frontend.h @@ -33,6 +33,7 @@ struct PPCBuiltins { Function* check_global_lock; Function* enter_global_lock; Function* leave_global_lock; + Function* syscall_handler; }; class PPCFrontend { diff --git a/src/xenia/cpu/ppc/ppc_hir_builder.cc b/src/xenia/cpu/ppc/ppc_hir_builder.cc index 902782f06..460da0894 100644 --- a/src/xenia/cpu/ppc/ppc_hir_builder.cc +++ b/src/xenia/cpu/ppc/ppc_hir_builder.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -104,8 +104,8 @@ bool PPCHIRBuilder::Emit(GuestFunction* function, uint32_t flags) { // instruction may have a label assigned to it if it hasn't been hit // yet. size_t list_size = instr_count_ * sizeof(void*); - instr_offset_list_ = (Instr**)arena_->Alloc(list_size); - label_list_ = (Label**)arena_->Alloc(list_size); + instr_offset_list_ = (Instr**)arena_->Alloc(list_size, alignof(void*)); + label_list_ = (Label**)arena_->Alloc(list_size, alignof(void*)); std::memset(instr_offset_list_, 0, list_size); std::memset(label_list_, 0, list_size); @@ -244,7 +244,7 @@ void PPCHIRBuilder::AnnotateLabel(uint32_t address, Label* label) { char name_buffer[13]; auto format_result = fmt::format_to_n(name_buffer, 12, "loc_{:08X}", address); name_buffer[format_result.size] = '\0'; - label->name = (char*)arena_->Alloc(sizeof(name_buffer)); + label->name = (char*)arena_->Alloc(sizeof(name_buffer), 1); memcpy(label->name, name_buffer, sizeof(name_buffer)); } diff --git a/src/xenia/cpu/processor.cc b/src/xenia/cpu/processor.cc index 95b016d17..6aae55a6c 100644 --- a/src/xenia/cpu/processor.cc +++ b/src/xenia/cpu/processor.cc @@ -432,12 +432,12 @@ void Processor::LowerIrql(Irql old_value) { } bool Processor::Save(ByteStream* stream) { - stream->Write('PROC'); + stream->Write(kProcessorSaveSignature); return true; } bool Processor::Restore(ByteStream* stream) { - if (stream->Read() != 'PROC') { + if (stream->Read() != kProcessorSaveSignature) { XELOGE("Processor::Restore - Invalid magic value!"); return false; } diff --git a/src/xenia/cpu/processor.h b/src/xenia/cpu/processor.h index eb395fb56..2a004548c 100644 --- a/src/xenia/cpu/processor.h +++ b/src/xenia/cpu/processor.h @@ -34,6 +34,8 @@ DECLARE_bool(debug); namespace xe { namespace cpu { +constexpr fourcc_t kProcessorSaveSignature = make_fourcc("PROC"); + class Breakpoint; class StackWalker; class XexModule; diff --git a/src/xenia/cpu/testing/util.h b/src/xenia/cpu/testing/util.h index 075903455..79ca8bc03 100644 --- a/src/xenia/cpu/testing/util.h +++ b/src/xenia/cpu/testing/util.h @@ -20,7 +20,7 @@ #include "xenia/cpu/processor.h" #include "xenia/cpu/test_module.h" -#include "third_party/catch/single_include/catch.hpp" +#include "third_party/catch/include/catch.hpp" #define XENIA_TEST_X64 1 diff --git a/src/xenia/cpu/xex_module.cc b/src/xenia/cpu/xex_module.cc index a9a1fd83c..aed4f4cb9 100644 --- a/src/xenia/cpu/xex_module.cc +++ b/src/xenia/cpu/xex_module.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -249,12 +249,11 @@ int XexModule::ApplyPatch(XexModule* module) { // Patch base XEX header uint32_t original_image_size = module->image_size(); - uint32_t header_target_size = patch_header->delta_headers_target_offset + - patch_header->delta_headers_source_size; + uint32_t header_target_size = patch_header->size_of_target_headers; if (!header_target_size) { - header_target_size = - patch_header->size_of_target_headers; // unsure which is more correct.. + header_target_size = patch_header->delta_headers_target_offset + + patch_header->delta_headers_source_size; } size_t mem_size = module->xex_header_mem_.size(); @@ -899,9 +898,9 @@ bool XexModule::Load(const std::string_view name, const std::string_view path, const void* xex_addr, size_t xex_length) { auto src_header = reinterpret_cast(xex_addr); - if (src_header->magic == 'XEX1') { + if (src_header->magic == kXEX1Signature) { xex_format_ = kFormatXex1; - } else if (src_header->magic == 'XEX2') { + } else if (src_header->magic == kXEX2Signature) { xex_format_ = kFormatXex2; } else { return false; @@ -967,6 +966,16 @@ bool XexModule::LoadContinue() { return false; } + // Parse any "unsafe" headers into safer variants + xex2_opt_generic_u32* alternate_titleids; + if (GetOptHeader(xex2_header_keys::XEX_HEADER_ALTERNATE_TITLE_IDS, + &alternate_titleids)) { + auto count = alternate_titleids->count(); + for (uint32_t i = 0; i < count; i++) { + opt_alternate_title_ids_.push_back(alternate_titleids->values[i]); + } + } + // Scan and find the low/high addresses. // All code sections are continuous, so this should be easy. auto heap = memory()->LookupHeap(base_address_); diff --git a/src/xenia/cpu/xex_module.h b/src/xenia/cpu/xex_module.h index 135eaf167..cd8fc49c5 100644 --- a/src/xenia/cpu/xex_module.h +++ b/src/xenia/cpu/xex_module.h @@ -25,6 +25,10 @@ class KernelState; namespace xe { namespace cpu { +constexpr fourcc_t kXEX1Signature = make_fourcc("XEX1"); +constexpr fourcc_t kXEX2Signature = make_fourcc("XEX2"); +constexpr fourcc_t kElfSignature = make_fourcc(0x7F, 'E', 'L', 'F'); + class Runtime; class XexModule : public xe::cpu::Module { @@ -103,6 +107,10 @@ class XexModule : public xe::cpu::Module { return retval; } + std::vector opt_alternate_title_ids() const { + return opt_alternate_title_ids_; + } + const uint32_t base_address() const { return base_address_; } const bool is_dev_kit() const { return is_dev_kit_; } @@ -194,6 +202,9 @@ class XexModule : public xe::cpu::Module { import_libs_; // pre-loaded import libraries for ease of use std::vector pe_sections_; + // XEX_HEADER_ALTERNATE_TITLE_IDS loaded into a safe std::vector + std::vector opt_alternate_title_ids_; + uint8_t session_key_[0x10]; bool is_dev_kit_ = false; diff --git a/src/xenia/emulator.cc b/src/xenia/emulator.cc index 4ee98cc24..92ddabe4f 100644 --- a/src/xenia/emulator.cc +++ b/src/xenia/emulator.cc @@ -42,6 +42,7 @@ #include "xenia/ui/imgui_dialog.h" #include "xenia/vfs/devices/disc_image_device.h" #include "xenia/vfs/devices/host_path_device.h" +#include "xenia/vfs/devices/null_device.h" #include "xenia/vfs/devices/stfs_container_device.h" #include "xenia/vfs/virtual_file_system.h" @@ -279,7 +280,7 @@ X_STATUS Emulator::LaunchXexFile(const std::filesystem::path& path) { // and then get that symlinked to game:\, so // -> game:\foo.xex - auto mount_path = "\\Device\\Harddisk0\\Partition0"; + auto mount_path = "\\Device\\Harddisk0\\Partition1"; // Register the local directory in the virtual filesystem. auto parent_path = path.parent_path(); @@ -420,7 +421,7 @@ bool Emulator::SaveToFile(const std::filesystem::path& path) { // Save the emulator state to a file ByteStream stream(map->data(), map->size()); - stream.Write('XSAV'); + stream.Write(kEmulatorSaveSignature); stream.Write(title_id_.has_value()); if (title_id_.has_value()) { stream.Write(title_id_.value()); @@ -454,7 +455,7 @@ bool Emulator::RestoreFromFile(const std::filesystem::path& path) { auto lock = global_critical_region::AcquireDirect(); ByteStream stream(map->data(), map->size()); - if (stream.Read() != 'XSAV') { + if (stream.Read() != kEmulatorSaveSignature) { return false; } @@ -672,6 +673,25 @@ static std::string format_version(xex2_version version) { X_STATUS Emulator::CompleteLaunch(const std::filesystem::path& path, const std::string_view module_path) { + // Setup NullDevices for raw HDD partition accesses + // Cache/STFC code baked into games tries reading/writing to these + // By using a NullDevice that just returns success to all IO requests it + // should allow games to believe cache/raw disk was accessed successfully + + // NOTE: this should probably be moved to xenia_main.cc, but right now we need + // to register the \Device\Harddisk0\ NullDevice _after_ the + // \Device\Harddisk0\Partition1 HostPathDevice, otherwise requests to + // Partition1 will go to this. Registering during CompleteLaunch allows us to + // make sure any HostPathDevices are ready beforehand. + // (see comment above cache:\ device registration for more info about why) + auto null_paths = {std::string("\\Partition0"), std::string("\\Cache0"), + std::string("\\Cache1")}; + auto null_device = + std::make_unique("\\Device\\Harddisk0", null_paths); + if (null_device->Initialize()) { + file_system_->RegisterDevice(std::move(null_device)); + } + // Reset state. title_id_ = std::nullopt; title_name_ = ""; diff --git a/src/xenia/emulator.h b/src/xenia/emulator.h index 3b410e889..cd86e1f81 100644 --- a/src/xenia/emulator.h +++ b/src/xenia/emulator.h @@ -44,6 +44,8 @@ class Window; namespace xe { +constexpr fourcc_t kEmulatorSaveSignature = make_fourcc("XSAV"); + // The main type that runs the whole emulator. // This is responsible for initializing and managing all the various subsystems. class Emulator { diff --git a/src/xenia/gpu/command_processor.cc b/src/xenia/gpu/command_processor.cc index 022e3929a..53af72115 100644 --- a/src/xenia/gpu/command_processor.cc +++ b/src/xenia/gpu/command_processor.cc @@ -517,6 +517,10 @@ bool CommandProcessor::ExecutePacket(RingBuffer* reader) { return true; } + if (packet == 0xCDCDCDCD) { + XELOGW("GPU packet is CDCDCDCD - probably read uninitialized memory!"); + } + switch (packet_type) { case 0x00: return ExecutePacketType0(reader, packet); @@ -824,8 +828,8 @@ bool CommandProcessor::ExecutePacketType3_XE_SWAP(RingBuffer* reader, // VdSwap will post this to tell us we need to swap the screen/fire an // interrupt. // 63 words here, but only the first has any data. - uint32_t magic = reader->ReadAndSwap(); - assert_true(magic == 'SWAP'); + uint32_t magic = reader->ReadAndSwap(); + assert_true(magic == kSwapSignature); // TODO(benvanik): only swap frontbuffer ptr. uint32_t frontbuffer_ptr = reader->ReadAndSwap(); @@ -1145,6 +1149,8 @@ bool CommandProcessor::ExecutePacketType3_EVENT_WRITE_EXT(RingBuffer* reader, bool CommandProcessor::ExecutePacketType3_EVENT_WRITE_ZPD(RingBuffer* reader, uint32_t packet, uint32_t count) { + // Set by D3D as BE but struct ABI is LE + const uint32_t kQueryFinished = xe::byte_swap(0xFFFFFEED); assert_true(count == 1); uint32_t initiator = reader->ReadAndSwap(); // Writeback initiator. @@ -1160,10 +1166,13 @@ bool CommandProcessor::ExecutePacketType3_EVENT_WRITE_ZPD(RingBuffer* reader, register_file_->values[XE_GPU_REG_RB_SAMPLE_COUNT_ADDR].u32); // 0xFFFFFEED is written to this two locations by D3D only on D3DISSUE_END // and used to detect a finished query. - bool isEnd = pSampleCounts->ZPass_A == xe::byte_swap(0xFFFFFEED) && - pSampleCounts->ZPass_B == xe::byte_swap(0xFFFFFEED); + bool is_end_via_z_pass = pSampleCounts->ZPass_A == kQueryFinished && + pSampleCounts->ZPass_B == kQueryFinished; + // Older versions of D3D also checks for ZFail (First Gears of War) + bool is_end_via_z_fail = pSampleCounts->ZFail_A == kQueryFinished && + pSampleCounts->ZFail_B == kQueryFinished; std::memset(pSampleCounts, 0, sizeof(xe_gpu_depth_sample_counts)); - if (isEnd) { + if (is_end_via_z_pass || is_end_via_z_fail) { pSampleCounts->ZPass_A = fake_sample_count; pSampleCounts->Total_A = fake_sample_count; } @@ -1172,40 +1181,77 @@ bool CommandProcessor::ExecutePacketType3_EVENT_WRITE_ZPD(RingBuffer* reader, return true; } -bool CommandProcessor::ExecutePacketType3_DRAW_INDX(RingBuffer* reader, - uint32_t packet, - uint32_t count) { - // initiate fetch of index buffer and draw - // if dword0 != 0, this is a conditional draw based on viz query. +bool CommandProcessor::ExecutePacketType3Draw(RingBuffer* reader, + uint32_t packet, + const char* opcode_name, + uint32_t viz_query_condition, + uint32_t count_remaining) { + // if viz_query_condition != 0, this is a conditional draw based on viz query. // This ID matches the one issued in PM4_VIZ_QUERY - uint32_t dword0 = reader->ReadAndSwap(); // viz query info - // uint32_t viz_id = dword0 & 0x3F; + // uint32_t viz_id = viz_query_condition & 0x3F; // when true, render conditionally based on query result - // uint32_t viz_use = dword0 & 0x100; + // uint32_t viz_use = viz_query_condition & 0x100; + assert_not_zero(count_remaining); + if (!count_remaining) { + XELOGE("{}: Packet too small, can't read VGT_DRAW_INITIATOR", opcode_name); + return false; + } reg::VGT_DRAW_INITIATOR vgt_draw_initiator; vgt_draw_initiator.value = reader->ReadAndSwap(); + --count_remaining; WriteRegister(XE_GPU_REG_VGT_DRAW_INITIATOR, vgt_draw_initiator.value); + bool success = true; + // TODO(Triang3l): Remove IndexBufferInfo and replace handling of all this + // with PrimitiveProcessor when the old Vulkan renderer is removed. bool is_indexed = false; IndexBufferInfo index_buffer_info; switch (vgt_draw_initiator.source_select) { case xenos::SourceSelect::kDMA: { // Indexed draw. is_indexed = true; - index_buffer_info.guest_base = reader->ReadAndSwap(); - uint32_t index_size = reader->ReadAndSwap(); - index_buffer_info.endianness = - static_cast(index_size >> 30); - index_size &= 0x00FFFFFF; + + // Two separate bounds checks so if there's only one missing register + // value out of two, one uint32_t will be skipped in the command buffer, + // not two. + assert_not_zero(count_remaining); + if (!count_remaining) { + XELOGE("{}: Packet too small, can't read VGT_DMA_BASE", opcode_name); + return false; + } + uint32_t vgt_dma_base = reader->ReadAndSwap(); + --count_remaining; + WriteRegister(XE_GPU_REG_VGT_DMA_BASE, vgt_dma_base); + reg::VGT_DMA_SIZE vgt_dma_size; + assert_not_zero(count_remaining); + if (!count_remaining) { + XELOGE("{}: Packet too small, can't read VGT_DMA_SIZE", opcode_name); + return false; + } + vgt_dma_size.value = reader->ReadAndSwap(); + --count_remaining; + WriteRegister(XE_GPU_REG_VGT_DMA_SIZE, vgt_dma_size.value); + + uint32_t index_size_bytes = + vgt_draw_initiator.index_size == xenos::IndexFormat::kInt16 + ? sizeof(uint16_t) + : sizeof(uint32_t); + // The base address must already be word-aligned according to the R6xx + // documentation, but for safety. + index_buffer_info.guest_base = vgt_dma_base & ~(index_size_bytes - 1); + index_buffer_info.endianness = vgt_dma_size.swap_mode; index_buffer_info.format = vgt_draw_initiator.index_size; - index_size *= - (vgt_draw_initiator.index_size == xenos::IndexFormat::kInt32) ? 4 : 2; - index_buffer_info.length = index_size; + index_buffer_info.length = vgt_dma_size.num_words * index_size_bytes; index_buffer_info.count = vgt_draw_initiator.num_indices; } break; case xenos::SourceSelect::kImmediate: { // TODO(Triang3l): VGT_IMMED_DATA. + XELOGE( + "{}: Using immediate vertex indices, which are not supported yet. " + "Report the game to Xenia developers!", + opcode_name, uint32_t(vgt_draw_initiator.source_select)); + success = false; assert_always(); } break; case xenos::SourceSelect::kAutoIndex: { @@ -1214,71 +1260,65 @@ bool CommandProcessor::ExecutePacketType3_DRAW_INDX(RingBuffer* reader, index_buffer_info.length = 0; } break; default: { - // Invalid source select. - assert_always(); + // Invalid source selection. + success = false; + assert_unhandled_case(vgt_draw_initiator.source_select); } break; } - auto viz_query = register_file_->Get(); - if (viz_query.viz_query_ena && viz_query.kill_pix_post_hi_z) { - // TODO(Triang3l): Don't drop the draw call completely if the vertex shader - // has memexport. - // TODO(Triang3l || JoelLinn): Handle this properly in the render backends. - return true; + // Skip to the next command, for example, if there are immediate indexes that + // we don't support yet. + reader->AdvanceRead(count_remaining * sizeof(uint32_t)); + + if (success) { + auto viz_query = register_file_->Get(); + if (!(viz_query.viz_query_ena && viz_query.kill_pix_post_hi_z)) { + // TODO(Triang3l): Don't drop the draw call completely if the vertex + // shader has memexport. + // TODO(Triang3l || JoelLinn): Handle this properly in the render + // backends. + success = IssueDraw( + vgt_draw_initiator.prim_type, vgt_draw_initiator.num_indices, + is_indexed ? &index_buffer_info : nullptr, + xenos::IsMajorModeExplicit(vgt_draw_initiator.major_mode, + vgt_draw_initiator.prim_type)); + if (!success) { + XELOGE("{}({}, {}, {}): Failed in backend", opcode_name, + vgt_draw_initiator.num_indices, + uint32_t(vgt_draw_initiator.prim_type), + uint32_t(vgt_draw_initiator.source_select)); + } + } } - bool success = - IssueDraw(vgt_draw_initiator.prim_type, vgt_draw_initiator.num_indices, - is_indexed ? &index_buffer_info : nullptr, - xenos::IsMajorModeExplicit(vgt_draw_initiator.major_mode, - vgt_draw_initiator.prim_type)); - if (!success) { - XELOGE("PM4_DRAW_INDX({}, {}, {}): Failed in backend", - vgt_draw_initiator.num_indices, - uint32_t(vgt_draw_initiator.prim_type), - uint32_t(vgt_draw_initiator.source_select)); - } + return success; +} - return true; +bool CommandProcessor::ExecutePacketType3_DRAW_INDX(RingBuffer* reader, + uint32_t packet, + uint32_t count) { + // "initiate fetch of index buffer and draw" + // Generally used by Xbox 360 Direct3D 9 for kDMA and kAutoIndex sources. + // With a viz query token as the first one. + uint32_t count_remaining = count; + assert_not_zero(count_remaining); + if (!count_remaining) { + XELOGE("PM4_DRAW_INDX: Packet too small, can't read the viz query token"); + return false; + } + uint32_t viz_query_condition = reader->ReadAndSwap(); + --count_remaining; + return ExecutePacketType3Draw(reader, packet, "PM4_DRAW_INDX", + viz_query_condition, count_remaining); } bool CommandProcessor::ExecutePacketType3_DRAW_INDX_2(RingBuffer* reader, uint32_t packet, uint32_t count) { - // draw using supplied indices in packet - reg::VGT_DRAW_INITIATOR vgt_draw_initiator; - vgt_draw_initiator.value = reader->ReadAndSwap(); - WriteRegister(XE_GPU_REG_VGT_DRAW_INITIATOR, vgt_draw_initiator.value); - assert_true(vgt_draw_initiator.source_select == - xenos::SourceSelect::kAutoIndex); - // Index buffer unused as automatic. - // uint32_t indices_size = - // vgt_draw_initiator.num_indices * - // (vgt_draw_initiator.index_size == xenos::IndexFormat::kInt32 ? 4 - // : 2); - // uint32_t index_ptr = reader->ptr(); - // TODO(Triang3l): VGT_IMMED_DATA. - reader->AdvanceRead((count - 1) * sizeof(uint32_t)); - - auto viz_query = register_file_->Get(); - if (viz_query.viz_query_ena && viz_query.kill_pix_post_hi_z) { - // TODO(Triang3l): Don't drop the draw call completely if the vertex shader - // has memexport. - // TODO(Triang3l || JoelLinn): Handle this properly in the render backends. - return true; - } - - bool success = IssueDraw( - vgt_draw_initiator.prim_type, vgt_draw_initiator.num_indices, nullptr, - xenos::IsMajorModeExplicit(vgt_draw_initiator.major_mode, - vgt_draw_initiator.prim_type)); - if (!success) { - XELOGE("PM4_DRAW_INDX_IMM({}, {}): Failed in backend", - vgt_draw_initiator.num_indices, - uint32_t(vgt_draw_initiator.prim_type)); - } - - return true; + // "draw using supplied indices in packet" + // Generally used by Xbox 360 Direct3D 9 for kAutoIndex source. + // No viz query token. + return ExecutePacketType3Draw(reader, packet, "PM4_DRAW_INDX_2", 0, count); } bool CommandProcessor::ExecutePacketType3_SET_CONSTANT(RingBuffer* reader, diff --git a/src/xenia/gpu/command_processor.h b/src/xenia/gpu/command_processor.h index 918b274cf..8199febcf 100644 --- a/src/xenia/gpu/command_processor.h +++ b/src/xenia/gpu/command_processor.h @@ -218,6 +218,10 @@ class CommandProcessor { uint32_t count); bool ExecutePacketType3_EVENT_WRITE_ZPD(RingBuffer* reader, uint32_t packet, uint32_t count); + bool ExecutePacketType3Draw(RingBuffer* reader, uint32_t packet, + const char* opcode_name, + uint32_t viz_query_condition, + uint32_t count_remaining); bool ExecutePacketType3_DRAW_INDX(RingBuffer* reader, uint32_t packet, uint32_t count); bool ExecutePacketType3_DRAW_INDX_2(RingBuffer* reader, uint32_t packet, diff --git a/src/xenia/gpu/d3d12/d3d12_command_processor.cc b/src/xenia/gpu/d3d12/d3d12_command_processor.cc index 56bf3322c..fca476673 100644 --- a/src/xenia/gpu/d3d12/d3d12_command_processor.cc +++ b/src/xenia/gpu/d3d12/d3d12_command_processor.cc @@ -81,7 +81,7 @@ void D3D12CommandProcessor::RequestFrameTrace( void D3D12CommandProcessor::TracePlaybackWroteMemory(uint32_t base_ptr, uint32_t length) { shared_memory_->MemoryInvalidationCallback(base_ptr, length, true); - primitive_converter_->MemoryInvalidationCallback(base_ptr, length, true); + primitive_processor_->MemoryInvalidationCallback(base_ptr, length, true); } void D3D12CommandProcessor::RestoreEdramSnapshot(const void* snapshot) { @@ -1194,6 +1194,13 @@ bool D3D12CommandProcessor::SetupContext() { return false; } + primitive_processor_ = std::make_unique( + *register_file_, *memory_, trace_writer_, *shared_memory_, *this); + if (!primitive_processor_->Initialize()) { + XELOGE("Failed to initialize the geometric primitive processor"); + return false; + } + texture_cache_ = std::make_unique( *this, *register_file_, *shared_memory_, bindless_resources_used_, render_target_cache_->GetResolutionScale()); @@ -1210,13 +1217,6 @@ bool D3D12CommandProcessor::SetupContext() { return false; } - primitive_converter_ = std::make_unique( - *this, *register_file_, *memory_, trace_writer_); - if (!primitive_converter_->Initialize()) { - XELOGE("Failed to initialize the geometric primitive converter"); - return false; - } - D3D12_HEAP_FLAGS heap_flag_create_not_zeroed = provider.GetHeapFlagCreateNotZeroed(); @@ -1529,12 +1529,12 @@ void D3D12CommandProcessor::ShutdownContext() { ui::d3d12::util::ReleaseAndNull(gamma_ramp_upload_); ui::d3d12::util::ReleaseAndNull(gamma_ramp_texture_); - primitive_converter_.reset(); - pipeline_cache_.reset(); texture_cache_.reset(); + primitive_processor_.reset(); + shared_memory_.reset(); // Shut down binding - bindless descriptors may be owned by subsystems like @@ -1822,13 +1822,13 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, uint32_t index_count, IndexBufferInfo* index_buffer_info, bool major_mode_explicit) { - auto device = GetD3D12Context().GetD3D12Provider().GetDevice(); - auto& regs = *register_file_; - #if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES SCOPE_profile_cpu_f("gpu"); #endif // XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES + ID3D12Device* device = GetD3D12Context().GetD3D12Provider().GetDevice(); + const RegisterFile& regs = *register_file_; + xenos::ModeControl edram_mode = regs.Get().edram_mode; if (edram_mode == xenos::ModeControl::kCopy) { // Special copy handling. @@ -1842,7 +1842,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, return true; } - // Vertex shader. + // Vertex shader analysis. auto vertex_shader = static_cast(active_vertex_shader()); if (!vertex_shader) { // Always need a vertex shader. @@ -1850,16 +1850,9 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, } pipeline_cache_->AnalyzeShaderUcode(*vertex_shader); bool memexport_used_vertex = vertex_shader->is_valid_memexport_used(); - DxbcShaderTranslator::Modification vertex_shader_modification; - pipeline_cache_->GetCurrentShaderModification(*vertex_shader, - vertex_shader_modification); - bool tessellated = - vertex_shader_modification.vertex.host_vertex_shader_type != - Shader::HostVertexShaderType::kVertex; - bool primitive_polygonal = - xenos::IsPrimitivePolygonal(tessellated, primitive_type); - // Pixel shader. + // Pixel shader analysis. + bool primitive_polygonal = draw_util::IsPrimitivePolygonal(regs); bool is_rasterization_done = draw_util::IsRasterizationPotentiallyDone(regs, primitive_polygonal); D3D12Shader* pixel_shader = nullptr; @@ -1884,23 +1877,31 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, return true; } } - bool memexport_used_pixel; - DxbcShaderTranslator::Modification pixel_shader_modification; - if (pixel_shader) { - memexport_used_pixel = pixel_shader->is_valid_memexport_used(); - if (!pipeline_cache_->GetCurrentShaderModification( - *pixel_shader, pixel_shader_modification)) { - return false; - } - } else { - memexport_used_pixel = false; - pixel_shader_modification = DxbcShaderTranslator::Modification(0); - } - + bool memexport_used_pixel = + pixel_shader && pixel_shader->is_valid_memexport_used(); bool memexport_used = memexport_used_vertex || memexport_used_pixel; BeginSubmission(true); + // Process primitives. + PrimitiveProcessor::ProcessingResult primitive_processing_result; + if (!primitive_processor_->Process(primitive_processing_result)) { + return false; + } + if (!primitive_processing_result.host_draw_vertex_count) { + // Nothing to draw. + return true; + } + + // Shader modifications. + DxbcShaderTranslator::Modification vertex_shader_modification = + pipeline_cache_->GetCurrentVertexShaderModification( + *vertex_shader, primitive_processing_result.host_vertex_shader_type); + DxbcShaderTranslator::Modification pixel_shader_modification = + pixel_shader + ? pipeline_cache_->GetCurrentPixelShaderModification(*pixel_shader) + : DxbcShaderTranslator::Modification(0); + // Set up the render targets - this may perform dispatches and draws. uint32_t pixel_shader_writes_color_targets = pixel_shader ? pixel_shader->writes_color_targets() : 0; @@ -1909,66 +1910,6 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, return false; } - // Set up primitive topology. - bool indexed = index_buffer_info != nullptr && index_buffer_info->guest_base; - xenos::PrimitiveType primitive_type_converted; - D3D_PRIMITIVE_TOPOLOGY primitive_topology; - if (tessellated) { - primitive_type_converted = primitive_type; - switch (primitive_type_converted) { - // TODO(Triang3l): Support all kinds of patches if found in games. - case xenos::PrimitiveType::kTriangleList: - case xenos::PrimitiveType::kTrianglePatch: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST; - break; - case xenos::PrimitiveType::kQuadList: - case xenos::PrimitiveType::kQuadPatch: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST; - break; - default: - return false; - } - } else { - primitive_type_converted = - PrimitiveConverter::GetReplacementPrimitiveType(primitive_type); - switch (primitive_type_converted) { - case xenos::PrimitiveType::kPointList: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_POINTLIST; - break; - case xenos::PrimitiveType::kLineList: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_LINELIST; - break; - case xenos::PrimitiveType::kLineStrip: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_LINESTRIP; - break; - case xenos::PrimitiveType::kTriangleList: - case xenos::PrimitiveType::kRectangleList: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST; - break; - case xenos::PrimitiveType::kTriangleStrip: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP; - break; - case xenos::PrimitiveType::kQuadList: - primitive_topology = D3D_PRIMITIVE_TOPOLOGY_LINELIST_ADJ; - break; - default: - return false; - } - } - SetPrimitiveTopology(primitive_topology); - uint32_t line_loop_closing_index; - if (primitive_type == xenos::PrimitiveType::kLineLoop && !indexed && - index_count >= 3) { - // Add a vertex to close the loop, and make the vertex shader replace its - // index (before adding the offset) with 0 to fetch the first vertex again. - // For indexed line loops, the primitive converter will add the vertex. - line_loop_closing_index = index_count; - ++index_count; - } else { - // Replace index 0 with 0 (do nothing) otherwise. - line_loop_closing_index = 0; - } - // Translate the shaders and create the pipeline if needed. D3D12Shader::D3D12Translation* vertex_shader_translation = static_cast( @@ -1987,6 +1928,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, if (host_render_targets_used) { bound_depth_and_color_render_target_bits = render_target_cache_->GetLastUpdateBoundRenderTargets( + render_target_cache_->gamma_render_target_as_srgb(), bound_depth_and_color_render_target_formats); } else { bound_depth_and_color_render_target_bits = 0; @@ -1995,9 +1937,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, ID3D12RootSignature* root_signature; if (!pipeline_cache_->ConfigurePipeline( vertex_shader_translation, pixel_shader_translation, - primitive_type_converted, - indexed ? index_buffer_info->format : xenos::IndexFormat::kInt16, - bound_depth_and_color_render_target_bits, + primitive_processing_result, bound_depth_and_color_render_target_bits, bound_depth_and_color_render_target_formats, &pipeline_handle, &root_signature)) { return false; @@ -2048,9 +1988,10 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, // Update system constants before uploading them. // TODO(Triang3l): With ROV, pass the disabled render target mask for safety. UpdateSystemConstantValues( - memexport_used, primitive_polygonal, line_loop_closing_index, - indexed ? index_buffer_info->endianness : xenos::Endian::kNone, - viewport_info, used_texture_mask, + memexport_used, primitive_polygonal, + primitive_processing_result.line_loop_closing_index, + primitive_processing_result.host_index_endian, viewport_info, + used_texture_mask, pixel_shader ? GetCurrentColorMask(pixel_shader->writes_color_targets()) : 0); @@ -2206,112 +2147,139 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, } } - // Actually draw. - if (indexed) { - uint32_t index_size = - index_buffer_info->format == xenos::IndexFormat::kInt32 - ? sizeof(uint32_t) - : sizeof(uint16_t); - assert_false(index_buffer_info->guest_base & (index_size - 1)); - uint32_t index_base = - index_buffer_info->guest_base & 0x1FFFFFFF & ~(index_size - 1); - D3D12_INDEX_BUFFER_VIEW index_buffer_view; - index_buffer_view.Format = - index_buffer_info->format == xenos::IndexFormat::kInt32 - ? DXGI_FORMAT_R32_UINT - : DXGI_FORMAT_R16_UINT; - PrimitiveConverter::ConversionResult conversion_result; - uint32_t converted_index_count; - if (tessellated) { - conversion_result = - PrimitiveConverter::ConversionResult::kConversionNotNeeded; - } else { - conversion_result = primitive_converter_->ConvertPrimitives( - primitive_type, index_buffer_info->guest_base, index_count, - index_buffer_info->format, index_buffer_info->endianness, - index_buffer_view.BufferLocation, converted_index_count); - if (conversion_result == PrimitiveConverter::ConversionResult::kFailed) { - return false; - } - if (conversion_result == - PrimitiveConverter::ConversionResult::kPrimitiveEmpty) { - return true; - } - } - ID3D12Resource* scratch_index_buffer = nullptr; - if (conversion_result == PrimitiveConverter::ConversionResult::kConverted) { - index_buffer_view.SizeInBytes = converted_index_count * index_size; - index_count = converted_index_count; - } else { - uint32_t index_buffer_size = index_buffer_info->count * index_size; - if (!shared_memory_->RequestRange(index_base, index_buffer_size)) { + // Primitive topology. + D3D_PRIMITIVE_TOPOLOGY primitive_topology; + if (primitive_processing_result.IsTessellated()) { + switch (primitive_processing_result.host_primitive_type) { + // TODO(Triang3l): Support all primitive types. + case xenos::PrimitiveType::kTriangleList: + case xenos::PrimitiveType::kTrianglePatch: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST; + break; + case xenos::PrimitiveType::kQuadList: + case xenos::PrimitiveType::kQuadPatch: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST; + break; + default: XELOGE( - "Failed to request index buffer at 0x{:08X} (size {}) in the " - "shared memory", - index_base, index_buffer_size); + "Host tessellated primitive type {} returned by the primitive " + "processor is not supported by the Direct3D 12 command processor", + uint32_t(primitive_processing_result.host_primitive_type)); + assert_unhandled_case(primitive_processing_result.host_primitive_type); return false; - } - if (memexport_used) { - // If the shared memory is a UAV, it can't be used as an index buffer - // (UAV is a read/write state, index buffer is a read-only state). Need - // to copy the indices to a buffer in the index buffer state. - scratch_index_buffer = RequestScratchGPUBuffer( - index_buffer_size, D3D12_RESOURCE_STATE_COPY_DEST); - if (scratch_index_buffer == nullptr) { - return false; - } - shared_memory_->UseAsCopySource(); - SubmitBarriers(); - deferred_command_list_.D3DCopyBufferRegion( - scratch_index_buffer, 0, shared_memory_->GetBuffer(), index_base, - index_buffer_size); - PushTransitionBarrier(scratch_index_buffer, - D3D12_RESOURCE_STATE_COPY_DEST, - D3D12_RESOURCE_STATE_INDEX_BUFFER); - index_buffer_view.BufferLocation = - scratch_index_buffer->GetGPUVirtualAddress(); - } else { - index_buffer_view.BufferLocation = - shared_memory_->GetGPUAddress() + index_base; - } - index_buffer_view.SizeInBytes = index_buffer_size; } + } else { + switch (primitive_processing_result.host_primitive_type) { + case xenos::PrimitiveType::kPointList: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_POINTLIST; + break; + case xenos::PrimitiveType::kLineList: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_LINELIST; + break; + case xenos::PrimitiveType::kLineStrip: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_LINESTRIP; + break; + case xenos::PrimitiveType::kTriangleList: + case xenos::PrimitiveType::kRectangleList: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST; + break; + case xenos::PrimitiveType::kTriangleStrip: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP; + break; + case xenos::PrimitiveType::kQuadList: + primitive_topology = D3D_PRIMITIVE_TOPOLOGY_LINELIST_ADJ; + break; + default: + XELOGE( + "Host primitive type {} returned by the primitive processor is not " + "supported by the Direct3D 12 command processor", + uint32_t(primitive_processing_result.host_primitive_type)); + assert_unhandled_case(primitive_processing_result.host_primitive_type); + return false; + } + } + SetPrimitiveTopology(primitive_topology); + // Must not call anything that may change the primitive topology from now on! + + // Draw. + if (primitive_processing_result.index_buffer_type == + PrimitiveProcessor::ProcessedIndexBufferType::kNone) { if (memexport_used) { shared_memory_->UseForWriting(); } else { shared_memory_->UseForReading(); } SubmitBarriers(); + deferred_command_list_.D3DDrawInstanced( + primitive_processing_result.host_draw_vertex_count, 1, 0, 0); + } else { + D3D12_INDEX_BUFFER_VIEW index_buffer_view; + index_buffer_view.SizeInBytes = + primitive_processing_result.host_draw_vertex_count; + if (primitive_processing_result.host_index_format == + xenos::IndexFormat::kInt16) { + index_buffer_view.SizeInBytes *= sizeof(uint16_t); + index_buffer_view.Format = DXGI_FORMAT_R16_UINT; + } else { + index_buffer_view.SizeInBytes *= sizeof(uint32_t); + index_buffer_view.Format = DXGI_FORMAT_R32_UINT; + } + ID3D12Resource* scratch_index_buffer = nullptr; + switch (primitive_processing_result.index_buffer_type) { + case PrimitiveProcessor::ProcessedIndexBufferType::kGuest: { + if (memexport_used) { + // If the shared memory is a UAV, it can't be used as an index buffer + // (UAV is a read/write state, index buffer is a read-only state). + // Need to copy the indices to a buffer in the index buffer state. + scratch_index_buffer = RequestScratchGPUBuffer( + index_buffer_view.SizeInBytes, D3D12_RESOURCE_STATE_COPY_DEST); + if (scratch_index_buffer == nullptr) { + return false; + } + shared_memory_->UseAsCopySource(); + SubmitBarriers(); + deferred_command_list_.D3DCopyBufferRegion( + scratch_index_buffer, 0, shared_memory_->GetBuffer(), + primitive_processing_result.guest_index_base, + index_buffer_view.SizeInBytes); + PushTransitionBarrier(scratch_index_buffer, + D3D12_RESOURCE_STATE_COPY_DEST, + D3D12_RESOURCE_STATE_INDEX_BUFFER); + index_buffer_view.BufferLocation = + scratch_index_buffer->GetGPUVirtualAddress(); + } else { + index_buffer_view.BufferLocation = + shared_memory_->GetGPUAddress() + + primitive_processing_result.guest_index_base; + } + } break; + case PrimitiveProcessor::ProcessedIndexBufferType::kHostConverted: + index_buffer_view.BufferLocation = + primitive_processor_->GetConvertedIndexBufferGpuAddress( + primitive_processing_result.host_index_buffer_handle); + break; + case PrimitiveProcessor::ProcessedIndexBufferType::kHostBuiltin: + index_buffer_view.BufferLocation = + primitive_processor_->GetBuiltinIndexBufferGpuAddress( + primitive_processing_result.host_index_buffer_handle); + break; + default: + assert_unhandled_case(primitive_processing_result.index_buffer_type); + return false; + } deferred_command_list_.D3DIASetIndexBuffer(&index_buffer_view); - deferred_command_list_.D3DDrawIndexedInstanced(index_count, 1, 0, 0, 0); + if (memexport_used) { + shared_memory_->UseForWriting(); + } else { + shared_memory_->UseForReading(); + } + SubmitBarriers(); + deferred_command_list_.D3DDrawIndexedInstanced( + primitive_processing_result.host_draw_vertex_count, 1, 0, 0, 0); if (scratch_index_buffer != nullptr) { ReleaseScratchGPUBuffer(scratch_index_buffer, D3D12_RESOURCE_STATE_INDEX_BUFFER); } - } else { - // Check if need to draw using a conversion index buffer. - uint32_t converted_index_count = 0; - D3D12_GPU_VIRTUAL_ADDRESS conversion_gpu_address = - tessellated ? 0 - : primitive_converter_->GetStaticIndexBuffer( - primitive_type, index_count, converted_index_count); - if (memexport_used) { - shared_memory_->UseForWriting(); - } else { - shared_memory_->UseForReading(); - } - SubmitBarriers(); - if (conversion_gpu_address) { - D3D12_INDEX_BUFFER_VIEW index_buffer_view; - index_buffer_view.BufferLocation = conversion_gpu_address; - index_buffer_view.SizeInBytes = converted_index_count * sizeof(uint16_t); - index_buffer_view.Format = DXGI_FORMAT_R16_UINT; - deferred_command_list_.D3DIASetIndexBuffer(&index_buffer_view); - deferred_command_list_.D3DDrawIndexedInstanced(converted_index_count, 1, - 0, 0, 0); - } else { - deferred_command_list_.D3DDrawInstanced(index_count, 1, 0, 0); - } } if (memexport_used) { @@ -2526,9 +2494,9 @@ void D3D12CommandProcessor::CheckSubmissionFence(uint64_t await_submission) { shared_memory_->CompletedSubmissionUpdated(); - render_target_cache_->CompletedSubmissionUpdated(); + primitive_processor_->CompletedSubmissionUpdated(); - primitive_converter_->CompletedSubmissionUpdated(); + render_target_cache_->CompletedSubmissionUpdated(); } void D3D12CommandProcessor::BeginSubmission(bool is_guest_command) { @@ -2593,11 +2561,11 @@ void D3D12CommandProcessor::BeginSubmission(bool is_guest_command) { } primitive_topology_ = D3D_PRIMITIVE_TOPOLOGY_UNDEFINED; + primitive_processor_->BeginSubmission(); + render_target_cache_->BeginSubmission(); texture_cache_->BeginSubmission(); - - primitive_converter_->BeginSubmission(); } if (is_opening_frame) { @@ -2645,9 +2613,9 @@ void D3D12CommandProcessor::BeginSubmission(bool is_guest_command) { } } - texture_cache_->BeginFrame(); + primitive_processor_->BeginFrame(); - primitive_converter_->BeginFrame(); + texture_cache_->BeginFrame(); } } @@ -2676,6 +2644,8 @@ bool D3D12CommandProcessor::EndSubmission(bool is_swap) { if (is_closing_frame) { texture_cache_->EndFrame(); + + primitive_processor_->EndFrame(); } if (submission_open_) { @@ -2762,8 +2732,6 @@ bool D3D12CommandProcessor::EndSubmission(bool is_swap) { } constant_buffer_pool_->ClearCache(); - primitive_converter_->ClearCache(); - pipeline_cache_->ClearCache(); render_target_cache_->ClearCache(); @@ -2775,6 +2743,8 @@ bool D3D12CommandProcessor::EndSubmission(bool is_swap) { } root_signatures_bindful_.clear(); + primitive_processor_->ClearCache(); + shared_memory_->ClearCache(); } } @@ -2897,7 +2867,9 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( auto rb_surface_info = regs.Get(); auto sq_context_misc = regs.Get(); auto sq_program_cntl = regs.Get(); - int32_t vgt_indx_offset = int32_t(regs[XE_GPU_REG_VGT_INDX_OFFSET].u32); + uint32_t vgt_indx_offset = regs.Get().indx_offset; + uint32_t vgt_max_vtx_indx = regs.Get().max_indx; + uint32_t vgt_min_vtx_indx = regs.Get().min_indx; bool edram_rov_used = render_target_cache_->GetPath() == RenderTargetCache::Path::kPixelShaderInterlock; @@ -3050,8 +3022,14 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( system_constants_.vertex_index_endian = index_endian; // Vertex index offset. - dirty |= system_constants_.vertex_base_index != vgt_indx_offset; - system_constants_.vertex_base_index = vgt_indx_offset; + dirty |= system_constants_.vertex_index_offset != vgt_indx_offset; + system_constants_.vertex_index_offset = vgt_indx_offset; + + // Vertex index range. + dirty |= system_constants_.vertex_index_min != vgt_min_vtx_indx; + dirty |= system_constants_.vertex_index_max != vgt_max_vtx_indx; + system_constants_.vertex_index_min = vgt_min_vtx_indx; + system_constants_.vertex_index_max = vgt_max_vtx_indx; // User clip planes (UCP_ENA_#), when not CLIP_DISABLE. if (!pa_cl_clip_cntl.clip_disable) { @@ -3082,14 +3060,14 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( float point_size_y = float(pa_su_point_size.height) * 0.125f; float point_size_min = float(pa_su_point_minmax.min_size) * 0.125f; float point_size_max = float(pa_su_point_minmax.max_size) * 0.125f; - dirty |= system_constants_.point_size[0] != point_size_x; - dirty |= system_constants_.point_size[1] != point_size_y; - dirty |= system_constants_.point_size_min_max[0] != point_size_min; - dirty |= system_constants_.point_size_min_max[1] != point_size_max; - system_constants_.point_size[0] = point_size_x; - system_constants_.point_size[1] = point_size_y; - system_constants_.point_size_min_max[0] = point_size_min; - system_constants_.point_size_min_max[1] = point_size_max; + dirty |= system_constants_.point_size_x != point_size_x; + dirty |= system_constants_.point_size_y != point_size_y; + dirty |= system_constants_.point_size_min != point_size_min; + dirty |= system_constants_.point_size_max != point_size_max; + system_constants_.point_size_x = point_size_x; + system_constants_.point_size_y = point_size_y; + system_constants_.point_size_min = point_size_min; + system_constants_.point_size_max = point_size_max; float point_screen_to_ndc_x = (/* 0.5f * 2.0f * */ float(resolution_scale)) / std::max(viewport_info.xy_extent[0], uint32_t(1)); @@ -3236,12 +3214,6 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( dirty |= system_constants_.edram_depth_base_dwords != depth_base_dwords; system_constants_.edram_depth_base_dwords = depth_base_dwords; - float depth_range_scale = viewport_info.z_max - viewport_info.z_min; - dirty |= system_constants_.edram_depth_range_scale != depth_range_scale; - system_constants_.edram_depth_range_scale = depth_range_scale; - dirty |= system_constants_.edram_depth_range_offset != viewport_info.z_min; - system_constants_.edram_depth_range_offset = viewport_info.z_min; - // For non-polygons, front polygon offset is used, and it's enabled if // POLY_OFFSET_PARA_ENABLED is set, for polygons, separate front and back // are used. @@ -3270,10 +3242,10 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( poly_offset_back_offset = poly_offset_front_offset; } } - // "slope computed in subpixels (1/12 or 1/16)" - R5xx Acceleration. Also: - // https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L943 - poly_offset_front_scale *= (1.0f / 16.0f) * resolution_scale; - poly_offset_back_scale *= (1.0f / 16.0f) * resolution_scale; + float poly_offset_scale_factor = + xenos::kPolygonOffsetScaleSubpixelUnit * resolution_scale; + poly_offset_front_scale *= poly_offset_scale_factor; + poly_offset_back_scale *= poly_offset_scale_factor; dirty |= system_constants_.edram_poly_offset_front_scale != poly_offset_front_scale; system_constants_.edram_poly_offset_front_scale = poly_offset_front_scale; diff --git a/src/xenia/gpu/d3d12/d3d12_command_processor.h b/src/xenia/gpu/d3d12/d3d12_command_processor.h index 0d90080d0..018c568d0 100644 --- a/src/xenia/gpu/d3d12/d3d12_command_processor.h +++ b/src/xenia/gpu/d3d12/d3d12_command_processor.h @@ -20,11 +20,11 @@ #include "xenia/base/assert.h" #include "xenia/gpu/command_processor.h" #include "xenia/gpu/d3d12/d3d12_graphics_system.h" +#include "xenia/gpu/d3d12/d3d12_primitive_processor.h" #include "xenia/gpu/d3d12/d3d12_render_target_cache.h" #include "xenia/gpu/d3d12/d3d12_shared_memory.h" #include "xenia/gpu/d3d12/deferred_command_list.h" #include "xenia/gpu/d3d12/pipeline_cache.h" -#include "xenia/gpu/d3d12/primitive_converter.h" #include "xenia/gpu/d3d12/texture_cache.h" #include "xenia/gpu/draw_util.h" #include "xenia/gpu/dxbc_shader.h" @@ -490,12 +490,12 @@ class D3D12CommandProcessor : public CommandProcessor { std::unique_ptr shared_memory_; + std::unique_ptr primitive_processor_; + std::unique_ptr pipeline_cache_; std::unique_ptr texture_cache_; - std::unique_ptr primitive_converter_; - // Mip 0 contains the normal gamma ramp (256 entries), mip 1 contains the PWL // ramp (128 entries). DXGI_FORMAT_R10G10B10A2_UNORM 1D. ID3D12Resource* gamma_ramp_texture_ = nullptr; diff --git a/src/xenia/gpu/d3d12/d3d12_graphics_system.cc b/src/xenia/gpu/d3d12/d3d12_graphics_system.cc index 12259a1a3..a0cc6fab6 100644 --- a/src/xenia/gpu/d3d12/d3d12_graphics_system.cc +++ b/src/xenia/gpu/d3d12/d3d12_graphics_system.cc @@ -9,6 +9,8 @@ #include "xenia/gpu/d3d12/d3d12_graphics_system.h" +#include + #include "xenia/base/logging.h" #include "xenia/base/math.h" #include "xenia/gpu/d3d12/d3d12_command_processor.h" @@ -20,10 +22,12 @@ namespace xe { namespace gpu { namespace d3d12 { -// Generated with `xb buildhlsl`. -#include "xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.h" -#include "xenia/gpu/d3d12/shaders/dxbc/stretch_ps.h" +// Generated with `xb buildshaders`. +namespace shaders { +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_tc_vs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_gamma_ps.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_ps.h" +} // namespace shaders D3D12GraphicsSystem::D3D12GraphicsSystem() {} @@ -138,10 +142,10 @@ X_STATUS D3D12GraphicsSystem::Setup(cpu::Processor* processor, // Create the stretch pipelines. D3D12_GRAPHICS_PIPELINE_STATE_DESC stretch_pipeline_desc = {}; stretch_pipeline_desc.pRootSignature = stretch_root_signature_; - stretch_pipeline_desc.VS.pShaderBytecode = fullscreen_tc_vs; - stretch_pipeline_desc.VS.BytecodeLength = sizeof(fullscreen_tc_vs); - stretch_pipeline_desc.PS.pShaderBytecode = stretch_ps; - stretch_pipeline_desc.PS.BytecodeLength = sizeof(stretch_ps); + stretch_pipeline_desc.VS.pShaderBytecode = shaders::fullscreen_tc_vs; + stretch_pipeline_desc.VS.BytecodeLength = sizeof(shaders::fullscreen_tc_vs); + stretch_pipeline_desc.PS.pShaderBytecode = shaders::stretch_ps; + stretch_pipeline_desc.PS.BytecodeLength = sizeof(shaders::stretch_ps); // The shader will set alpha to 1, don't use output-merger to preserve it. stretch_pipeline_desc.BlendState.RenderTarget[0].RenderTargetWriteMask = D3D12_COLOR_WRITE_ENABLE_ALL; @@ -165,8 +169,8 @@ X_STATUS D3D12GraphicsSystem::Setup(cpu::Processor* processor, return X_STATUS_UNSUCCESSFUL; } stretch_pipeline_desc.pRootSignature = stretch_gamma_root_signature_; - stretch_pipeline_desc.PS.pShaderBytecode = stretch_gamma_ps; - stretch_pipeline_desc.PS.BytecodeLength = sizeof(stretch_gamma_ps); + stretch_pipeline_desc.PS.pShaderBytecode = shaders::stretch_gamma_ps; + stretch_pipeline_desc.PS.BytecodeLength = sizeof(shaders::stretch_gamma_ps); if (FAILED(device->CreateGraphicsPipelineState( &stretch_pipeline_desc, IID_PPV_ARGS(&stretch_gamma_pipeline_)))) { XELOGE( diff --git a/src/xenia/gpu/d3d12/d3d12_primitive_processor.cc b/src/xenia/gpu/d3d12/d3d12_primitive_processor.cc new file mode 100644 index 000000000..c93275b95 --- /dev/null +++ b/src/xenia/gpu/d3d12/d3d12_primitive_processor.cc @@ -0,0 +1,174 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/gpu/d3d12/d3d12_primitive_processor.h" + +#include +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/base/logging.h" +#include "xenia/gpu/d3d12/d3d12_command_processor.h" +#include "xenia/gpu/d3d12/deferred_command_list.h" +#include "xenia/ui/d3d12/d3d12_provider.h" +#include "xenia/ui/d3d12/d3d12_util.h" + +namespace xe { +namespace gpu { +namespace d3d12 { + +D3D12PrimitiveProcessor::~D3D12PrimitiveProcessor() { Shutdown(true); } + +bool D3D12PrimitiveProcessor::Initialize() { + if (!InitializeCommon(true, false, false, true)) { + Shutdown(); + return false; + } + frame_index_buffer_pool_ = std::make_unique( + command_processor_.GetD3D12Context().GetD3D12Provider(), + std::max(size_t(kMinRequiredConvertedIndexBufferSize), + ui::GraphicsUploadBufferPool::kDefaultPageSize)); + return true; +} + +void D3D12PrimitiveProcessor::Shutdown(bool from_destructor) { + frame_index_buffers_.clear(); + frame_index_buffer_pool_.reset(); + builtin_index_buffer_upload_.Reset(); + builtin_index_buffer_gpu_address_ = 0; + builtin_index_buffer_.Reset(); + if (!from_destructor) { + ShutdownCommon(); + } +} + +void D3D12PrimitiveProcessor::CompletedSubmissionUpdated() { + if (builtin_index_buffer_upload_ && + command_processor_.GetCompletedSubmission() >= + builtin_index_buffer_upload_submission_) { + builtin_index_buffer_upload_.Reset(); + } +} + +void D3D12PrimitiveProcessor::BeginSubmission() { + if (builtin_index_buffer_upload_ && + builtin_index_buffer_upload_submission_ == UINT64_MAX) { + // No need to submit deferred barriers - builtin_index_buffer_ has never + // been used yet, so it's in the initial state, and + // builtin_index_buffer_upload_ is in an upload heap, so it's GENERIC_READ. + command_processor_.GetDeferredCommandList().D3DCopyResource( + builtin_index_buffer_.Get(), builtin_index_buffer_upload_.Get()); + command_processor_.PushTransitionBarrier(builtin_index_buffer_.Get(), + D3D12_RESOURCE_STATE_COPY_DEST, + D3D12_RESOURCE_STATE_INDEX_BUFFER); + builtin_index_buffer_upload_submission_ = + command_processor_.GetCurrentSubmission(); + } +} + +void D3D12PrimitiveProcessor::BeginFrame() { + frame_index_buffer_pool_->Reclaim(command_processor_.GetCompletedFrame()); +} + +void D3D12PrimitiveProcessor::EndFrame() { + ClearPerFrameCache(); + frame_index_buffers_.clear(); +} + +bool D3D12PrimitiveProcessor::InitializeBuiltin16BitIndexBuffer( + uint32_t index_count, std::function fill_callback) { + assert_not_zero(index_count); + assert_null(builtin_index_buffer_); + assert_null(builtin_index_buffer_upload_); + + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + + D3D12_RESOURCE_DESC resource_desc; + ui::d3d12::util::FillBufferResourceDesc( + resource_desc, UINT64(sizeof(uint16_t) * index_count), + D3D12_RESOURCE_FLAG_NONE); + Microsoft::WRL::ComPtr draw_resource; + if (FAILED(device->CreateCommittedResource( + &ui::d3d12::util::kHeapPropertiesDefault, + provider.GetHeapFlagCreateNotZeroed(), &resource_desc, + D3D12_RESOURCE_STATE_COPY_DEST, nullptr, + IID_PPV_ARGS(&draw_resource)))) { + XELOGE( + "D3D12 primitive processor: Failed to create the built-in index " + "buffer GPU resource with {} 16-bit indices", + index_count); + return false; + } + Microsoft::WRL::ComPtr upload_resource; + if (FAILED(device->CreateCommittedResource( + &ui::d3d12::util::kHeapPropertiesUpload, + provider.GetHeapFlagCreateNotZeroed(), &resource_desc, + D3D12_RESOURCE_STATE_GENERIC_READ, nullptr, + IID_PPV_ARGS(&upload_resource)))) { + XELOGE( + "D3D12 primitive processor: Failed to create the built-in index " + "buffer upload resource with {} 16-bit indices", + index_count); + return false; + } + + D3D12_RANGE upload_read_range = {}; + void* mapping; + if (FAILED(upload_resource->Map(0, &upload_read_range, &mapping))) { + XELOGE( + "D3D12 primitive processor: Failed to map the built-in index buffer " + "upload resource with {} 16-bit indices", + index_count); + return false; + } + fill_callback(reinterpret_cast(mapping)); + upload_resource->Unmap(0, nullptr); + + // Successfully created the buffer and wrote the data to upload. + builtin_index_buffer_ = std::move(draw_resource); + builtin_index_buffer_gpu_address_ = + builtin_index_buffer_->GetGPUVirtualAddress(); + builtin_index_buffer_upload_ = std::move(upload_resource); + // Schedule uploading in the first submission. + builtin_index_buffer_upload_submission_ = UINT64_MAX; + return true; +} + +void* D3D12PrimitiveProcessor::RequestHostConvertedIndexBufferForCurrentFrame( + xenos::IndexFormat format, uint32_t index_count, bool coalign_for_simd, + uint32_t coalignment_original_address, size_t& backend_handle_out) { + size_t index_size = format == xenos::IndexFormat::kInt16 ? sizeof(uint16_t) + : sizeof(uint32_t); + D3D12_GPU_VIRTUAL_ADDRESS gpu_address; + uint8_t* mapping = frame_index_buffer_pool_->Request( + command_processor_.GetCurrentFrame(), + index_size * index_count + + (coalign_for_simd ? XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE : 0), + index_size, nullptr, nullptr, &gpu_address); + if (!mapping) { + return false; + } + if (coalign_for_simd) { + ptrdiff_t coalignment_offset = + GetSimdCoalignmentOffset(mapping, coalignment_original_address); + mapping += coalignment_offset; + gpu_address = D3D12_GPU_VIRTUAL_ADDRESS(gpu_address + coalignment_offset); + } + backend_handle_out = frame_index_buffers_.size(); + frame_index_buffers_.push_back(gpu_address); + return mapping; +} + +} // namespace d3d12 +} // namespace gpu +} // namespace xe diff --git a/src/xenia/gpu/d3d12/d3d12_primitive_processor.h b/src/xenia/gpu/d3d12/d3d12_primitive_processor.h new file mode 100644 index 000000000..81e1812a6 --- /dev/null +++ b/src/xenia/gpu/d3d12/d3d12_primitive_processor.h @@ -0,0 +1,90 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_GPU_D3D12_D3D12_PRIMITIVE_PROCESSOR_H_ +#define XENIA_GPU_D3D12_D3D12_PRIMITIVE_PROCESSOR_H_ + +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/gpu/primitive_processor.h" +#include "xenia/ui/d3d12/d3d12_api.h" +#include "xenia/ui/d3d12/d3d12_upload_buffer_pool.h" + +namespace xe { +namespace gpu { +namespace d3d12 { + +class D3D12CommandProcessor; + +class D3D12PrimitiveProcessor final : public PrimitiveProcessor { + public: + D3D12PrimitiveProcessor(const RegisterFile& register_file, Memory& memory, + TraceWriter& trace_writer, + SharedMemory& shared_memory, + D3D12CommandProcessor& command_processor) + : PrimitiveProcessor(register_file, memory, trace_writer, shared_memory), + command_processor_(command_processor) {} + ~D3D12PrimitiveProcessor(); + + bool Initialize(); + void Shutdown(bool from_destructor = false); + void ClearCache() { frame_index_buffer_pool_->ClearCache(); } + + void CompletedSubmissionUpdated(); + void BeginSubmission(); + void BeginFrame(); + void EndFrame(); + + D3D12_GPU_VIRTUAL_ADDRESS GetBuiltinIndexBufferGpuAddress( + size_t handle) const { + assert_not_null(builtin_index_buffer_); + return D3D12_GPU_VIRTUAL_ADDRESS(builtin_index_buffer_gpu_address_ + + GetBuiltinIndexBufferOffsetBytes(handle)); + } + D3D12_GPU_VIRTUAL_ADDRESS GetConvertedIndexBufferGpuAddress( + size_t handle) const { + return frame_index_buffers_[handle]; + } + + protected: + bool InitializeBuiltin16BitIndexBuffer( + uint32_t index_count, + std::function fill_callback) override; + + void* RequestHostConvertedIndexBufferForCurrentFrame( + xenos::IndexFormat format, uint32_t index_count, bool coalign_for_simd, + uint32_t coalignment_original_address, + size_t& backend_handle_out) override; + + private: + D3D12CommandProcessor& command_processor_; + + Microsoft::WRL::ComPtr builtin_index_buffer_; + D3D12_GPU_VIRTUAL_ADDRESS builtin_index_buffer_gpu_address_ = 0; + // Temporary buffer copied in the beginning of the first submission for + // uploading to builtin_index_buffer_, destroyed when the submission when it + // was uploaded is completed. + Microsoft::WRL::ComPtr builtin_index_buffer_upload_; + // UINT64_MAX means not uploaded yet and needs uploading in the first + // submission (if the upload buffer exists at all). + uint64_t builtin_index_buffer_upload_submission_ = UINT64_MAX; + + std::unique_ptr frame_index_buffer_pool_; + // Indexed by the backend handles. + std::deque frame_index_buffers_; +}; + +} // namespace d3d12 +} // namespace gpu +} // namespace xe + +#endif // XENIA_GPU_D3D12_D3D12_PRIMITIVE_PROCESSOR_H_ diff --git a/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc b/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc index 74e413c22..53df32683 100644 --- a/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc +++ b/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc @@ -74,91 +74,108 @@ namespace xe { namespace gpu { namespace d3d12 { -// Generated with `xb buildhlsl`. -#include "xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h" -#include "xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h" +// Generated with `xb buildshaders`. +namespace shaders { +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/clear_uint2_ps.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_vs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_1xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_2xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_4xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/passthrough_position_xy_vs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_1x2xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_4xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_4xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_1x2xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_4xmsaa_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_2xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_3xres_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_cs.h" +} // namespace shaders -const std::pair +const std::pair D3D12RenderTargetCache::kResolveCopyShaders[size_t( draw_util::ResolveCopyShaderIndex::kCount)] = { - {resolve_fast_32bpp_1x2xmsaa_cs, - sizeof(resolve_fast_32bpp_1x2xmsaa_cs)}, - {resolve_fast_32bpp_4xmsaa_cs, sizeof(resolve_fast_32bpp_4xmsaa_cs)}, - {resolve_fast_32bpp_2xres_cs, sizeof(resolve_fast_32bpp_2xres_cs)}, - {resolve_fast_32bpp_3xres_1x2xmsaa_cs, - sizeof(resolve_fast_32bpp_3xres_1x2xmsaa_cs)}, - {resolve_fast_32bpp_3xres_4xmsaa_cs, - sizeof(resolve_fast_32bpp_3xres_4xmsaa_cs)}, - {resolve_fast_64bpp_1x2xmsaa_cs, - sizeof(resolve_fast_64bpp_1x2xmsaa_cs)}, - {resolve_fast_64bpp_4xmsaa_cs, sizeof(resolve_fast_64bpp_4xmsaa_cs)}, - {resolve_fast_64bpp_2xres_cs, sizeof(resolve_fast_64bpp_2xres_cs)}, - {resolve_fast_64bpp_3xres_cs, sizeof(resolve_fast_64bpp_3xres_cs)}, - {resolve_full_8bpp_cs, sizeof(resolve_full_8bpp_cs)}, - {resolve_full_8bpp_2xres_cs, sizeof(resolve_full_8bpp_2xres_cs)}, - {resolve_full_8bpp_3xres_cs, sizeof(resolve_full_8bpp_3xres_cs)}, - {resolve_full_16bpp_cs, sizeof(resolve_full_16bpp_cs)}, - {resolve_full_16bpp_2xres_cs, sizeof(resolve_full_16bpp_2xres_cs)}, - {resolve_full_16bpp_from_32bpp_3xres_cs, - sizeof(resolve_full_16bpp_from_32bpp_3xres_cs)}, - {resolve_full_16bpp_from_64bpp_3xres_cs, - sizeof(resolve_full_16bpp_from_64bpp_3xres_cs)}, - {resolve_full_32bpp_cs, sizeof(resolve_full_32bpp_cs)}, - {resolve_full_32bpp_2xres_cs, sizeof(resolve_full_32bpp_2xres_cs)}, - {resolve_full_32bpp_from_32bpp_3xres_cs, - sizeof(resolve_full_32bpp_from_32bpp_3xres_cs)}, - {resolve_full_32bpp_from_64bpp_3xres_cs, - sizeof(resolve_full_32bpp_from_64bpp_3xres_cs)}, - {resolve_full_64bpp_cs, sizeof(resolve_full_64bpp_cs)}, - {resolve_full_64bpp_2xres_cs, sizeof(resolve_full_64bpp_2xres_cs)}, - {resolve_full_64bpp_from_32bpp_3xres_cs, - sizeof(resolve_full_64bpp_from_32bpp_3xres_cs)}, - {resolve_full_64bpp_from_64bpp_3xres_cs, - sizeof(resolve_full_64bpp_from_64bpp_3xres_cs)}, - {resolve_full_128bpp_cs, sizeof(resolve_full_128bpp_cs)}, - {resolve_full_128bpp_2xres_cs, sizeof(resolve_full_128bpp_2xres_cs)}, - {resolve_full_128bpp_from_32bpp_3xres_cs, - sizeof(resolve_full_128bpp_from_32bpp_3xres_cs)}, - {resolve_full_128bpp_from_64bpp_3xres_cs, - sizeof(resolve_full_128bpp_from_64bpp_3xres_cs)}, + {shaders::resolve_fast_32bpp_1x2xmsaa_cs, + sizeof(shaders::resolve_fast_32bpp_1x2xmsaa_cs)}, + {shaders::resolve_fast_32bpp_4xmsaa_cs, + sizeof(shaders::resolve_fast_32bpp_4xmsaa_cs)}, + {shaders::resolve_fast_32bpp_2xres_cs, + sizeof(shaders::resolve_fast_32bpp_2xres_cs)}, + {shaders::resolve_fast_32bpp_3xres_1x2xmsaa_cs, + sizeof(shaders::resolve_fast_32bpp_3xres_1x2xmsaa_cs)}, + {shaders::resolve_fast_32bpp_3xres_4xmsaa_cs, + sizeof(shaders::resolve_fast_32bpp_3xres_4xmsaa_cs)}, + {shaders::resolve_fast_64bpp_1x2xmsaa_cs, + sizeof(shaders::resolve_fast_64bpp_1x2xmsaa_cs)}, + {shaders::resolve_fast_64bpp_4xmsaa_cs, + sizeof(shaders::resolve_fast_64bpp_4xmsaa_cs)}, + {shaders::resolve_fast_64bpp_2xres_cs, + sizeof(shaders::resolve_fast_64bpp_2xres_cs)}, + {shaders::resolve_fast_64bpp_3xres_cs, + sizeof(shaders::resolve_fast_64bpp_3xres_cs)}, + {shaders::resolve_full_8bpp_cs, sizeof(shaders::resolve_full_8bpp_cs)}, + {shaders::resolve_full_8bpp_2xres_cs, + sizeof(shaders::resolve_full_8bpp_2xres_cs)}, + {shaders::resolve_full_8bpp_3xres_cs, + sizeof(shaders::resolve_full_8bpp_3xres_cs)}, + {shaders::resolve_full_16bpp_cs, + sizeof(shaders::resolve_full_16bpp_cs)}, + {shaders::resolve_full_16bpp_2xres_cs, + sizeof(shaders::resolve_full_16bpp_2xres_cs)}, + {shaders::resolve_full_16bpp_from_32bpp_3xres_cs, + sizeof(shaders::resolve_full_16bpp_from_32bpp_3xres_cs)}, + {shaders::resolve_full_16bpp_from_64bpp_3xres_cs, + sizeof(shaders::resolve_full_16bpp_from_64bpp_3xres_cs)}, + {shaders::resolve_full_32bpp_cs, + sizeof(shaders::resolve_full_32bpp_cs)}, + {shaders::resolve_full_32bpp_2xres_cs, + sizeof(shaders::resolve_full_32bpp_2xres_cs)}, + {shaders::resolve_full_32bpp_from_32bpp_3xres_cs, + sizeof(shaders::resolve_full_32bpp_from_32bpp_3xres_cs)}, + {shaders::resolve_full_32bpp_from_64bpp_3xres_cs, + sizeof(shaders::resolve_full_32bpp_from_64bpp_3xres_cs)}, + {shaders::resolve_full_64bpp_cs, + sizeof(shaders::resolve_full_64bpp_cs)}, + {shaders::resolve_full_64bpp_2xres_cs, + sizeof(shaders::resolve_full_64bpp_2xres_cs)}, + {shaders::resolve_full_64bpp_from_32bpp_3xres_cs, + sizeof(shaders::resolve_full_64bpp_from_32bpp_3xres_cs)}, + {shaders::resolve_full_64bpp_from_64bpp_3xres_cs, + sizeof(shaders::resolve_full_64bpp_from_64bpp_3xres_cs)}, + {shaders::resolve_full_128bpp_cs, + sizeof(shaders::resolve_full_128bpp_cs)}, + {shaders::resolve_full_128bpp_2xres_cs, + sizeof(shaders::resolve_full_128bpp_2xres_cs)}, + {shaders::resolve_full_128bpp_from_32bpp_3xres_cs, + sizeof(shaders::resolve_full_128bpp_from_32bpp_3xres_cs)}, + {shaders::resolve_full_128bpp_from_64bpp_3xres_cs, + sizeof(shaders::resolve_full_128bpp_from_64bpp_3xres_cs)}, }; const uint32_t D3D12RenderTargetCache::kTransferUsedRootParameters[size_t( @@ -231,16 +248,22 @@ const D3D12RenderTargetCache::TransferModeInfo const std::pair D3D12RenderTargetCache::kResolveROVClear32bppShaders[3] = { - {resolve_clear_32bpp_cs, sizeof(resolve_clear_32bpp_cs)}, - {resolve_clear_32bpp_2xres_cs, sizeof(resolve_clear_32bpp_2xres_cs)}, - {resolve_clear_32bpp_3xres_cs, sizeof(resolve_clear_32bpp_3xres_cs)}, + {shaders::resolve_clear_32bpp_cs, + sizeof(shaders::resolve_clear_32bpp_cs)}, + {shaders::resolve_clear_32bpp_2xres_cs, + sizeof(shaders::resolve_clear_32bpp_2xres_cs)}, + {shaders::resolve_clear_32bpp_3xres_cs, + sizeof(shaders::resolve_clear_32bpp_3xres_cs)}, }; const std::pair D3D12RenderTargetCache::kResolveROVClear64bppShaders[3] = { - {resolve_clear_64bpp_cs, sizeof(resolve_clear_64bpp_cs)}, - {resolve_clear_64bpp_2xres_cs, sizeof(resolve_clear_64bpp_2xres_cs)}, - {resolve_clear_64bpp_3xres_cs, sizeof(resolve_clear_64bpp_3xres_cs)}, + {shaders::resolve_clear_64bpp_cs, + sizeof(shaders::resolve_clear_64bpp_cs)}, + {shaders::resolve_clear_64bpp_2xres_cs, + sizeof(shaders::resolve_clear_64bpp_2xres_cs)}, + {shaders::resolve_clear_64bpp_3xres_cs, + sizeof(shaders::resolve_clear_64bpp_3xres_cs)}, }; D3D12RenderTargetCache::~D3D12RenderTargetCache() { Shutdown(true); } @@ -459,7 +482,7 @@ bool D3D12RenderTargetCache::Initialize() { if (resolve_copy_shader_info.resolution_scale != resolution_scale_) { continue; } - const std::pair& resolve_copy_shader = + const std::pair& resolve_copy_shader = kResolveCopyShaders[i]; ID3D12PipelineState* resolve_copy_pipeline = ui::d3d12::util::CreateComputePipeline( @@ -655,8 +678,8 @@ bool D3D12RenderTargetCache::Initialize() { // 1 sample. host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k1X)] = ui::d3d12::util::CreateComputePipeline( - device, host_depth_store_1xmsaa_cs, - sizeof(host_depth_store_1xmsaa_cs), + device, shaders::host_depth_store_1xmsaa_cs, + sizeof(shaders::host_depth_store_1xmsaa_cs), host_depth_store_root_signature_); if (!host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k1X)]) { XELOGE( @@ -670,8 +693,8 @@ bool D3D12RenderTargetCache::Initialize() { // 2 samples. host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k2X)] = ui::d3d12::util::CreateComputePipeline( - device, host_depth_store_2xmsaa_cs, - sizeof(host_depth_store_2xmsaa_cs), + device, shaders::host_depth_store_2xmsaa_cs, + sizeof(shaders::host_depth_store_2xmsaa_cs), host_depth_store_root_signature_); if (!host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k2X)]) { XELOGE( @@ -685,8 +708,8 @@ bool D3D12RenderTargetCache::Initialize() { // 4 samples. host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k4X)] = ui::d3d12::util::CreateComputePipeline( - device, host_depth_store_4xmsaa_cs, - sizeof(host_depth_store_4xmsaa_cs), + device, shaders::host_depth_store_4xmsaa_cs, + sizeof(shaders::host_depth_store_4xmsaa_cs), host_depth_store_root_signature_); if (!host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k4X)]) { XELOGE( @@ -1001,10 +1024,12 @@ bool D3D12RenderTargetCache::Initialize() { D3D12_GRAPHICS_PIPELINE_STATE_DESC uint32_rtv_clear_pipeline_desc = {}; uint32_rtv_clear_pipeline_desc.pRootSignature = uint32_rtv_clear_root_signature_; - uint32_rtv_clear_pipeline_desc.VS.pShaderBytecode = fullscreen_vs; - uint32_rtv_clear_pipeline_desc.VS.BytecodeLength = sizeof(fullscreen_vs); - uint32_rtv_clear_pipeline_desc.PS.pShaderBytecode = clear_uint2_ps; - uint32_rtv_clear_pipeline_desc.PS.BytecodeLength = sizeof(clear_uint2_ps); + uint32_rtv_clear_pipeline_desc.VS.pShaderBytecode = shaders::fullscreen_vs; + uint32_rtv_clear_pipeline_desc.VS.BytecodeLength = + sizeof(shaders::fullscreen_vs); + uint32_rtv_clear_pipeline_desc.PS.pShaderBytecode = shaders::clear_uint2_ps; + uint32_rtv_clear_pipeline_desc.PS.BytecodeLength = + sizeof(shaders::clear_uint2_ps); uint32_rtv_clear_pipeline_desc.BlendState.RenderTarget[0] .RenderTargetWriteMask = D3D12_COLOR_WRITE_ENABLE_ALL; uint32_rtv_clear_pipeline_desc.RasterizerState.FillMode = @@ -1833,9 +1858,10 @@ DXGI_FORMAT D3D12RenderTargetCache::GetColorDrawDXGIFormat( xenos::ColorRenderTargetFormat format) const { switch (format) { case xenos::ColorRenderTargetFormat::k_8_8_8_8: - case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: - // sRGB is handled in a different way, not via the RenderTargetKey format. return DXGI_FORMAT_R8G8B8A8_UNORM; + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + return gamma_render_target_as_srgb_ ? DXGI_FORMAT_R8G8B8A8_UNORM_SRGB + : DXGI_FORMAT_R8G8B8A8_UNORM; case xenos::ColorRenderTargetFormat::k_16_16: return DXGI_FORMAT_R16G16_SNORM; case xenos::ColorRenderTargetFormat::k_16_16_16_16: @@ -1929,20 +1955,6 @@ DXGI_FORMAT D3D12RenderTargetCache::GetDepthSRVStencilDXGIFormat( } } -xenos::ColorRenderTargetFormat -D3D12RenderTargetCache::GetHostRelevantColorFormat( - xenos::ColorRenderTargetFormat format) const { - switch (format) { - case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: - // Currently handled in the shader (with incorrect blending), but even if - // handling is changed (to true sRGB), it will still be able to alias it - // with R8G8B8A8_UNORM. - return xenos::ColorRenderTargetFormat::k_8_8_8_8; - default: - return format; - } -} - RenderTargetCache::RenderTarget* D3D12RenderTargetCache::CreateRenderTarget( RenderTargetKey key) { ID3D12Device* device = @@ -1965,7 +1977,7 @@ RenderTargetCache::RenderTarget* D3D12RenderTargetCache::CreateRenderTarget( assert_true(resource_desc.Format != DXGI_FORMAT_UNKNOWN); if (resource_desc.Format == DXGI_FORMAT_UNKNOWN) { XELOGE("D3D12RenderTargetCache: Unknown {} render target format {}", - key.is_depth ? "depth" : "color", key.host_relevant_format); + key.is_depth ? "depth" : "color", key.resource_format); return nullptr; } if (key.msaa_samples == xenos::MsaaSamples::k2X && !msaa_2x_supported()) { @@ -2119,7 +2131,7 @@ RenderTargetCache::RenderTarget* D3D12RenderTargetCache::CreateRenderTarget( descriptor_srv.GetHandle()); return new D3D12RenderTarget( - key, *this, resource.Get(), std::move(descriptor_draw), + key, resource.Get(), std::move(descriptor_draw), std::move(descriptor_draw_srgb), std::move(descriptor_load_separate), std::move(descriptor_srv), std::move(descriptor_srv_stencil), resource_state); @@ -2203,16 +2215,16 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { bool dest_is_color = (mode.output == TransferOutput::kColor); xenos::ColorRenderTargetFormat dest_color_format = - xenos::ColorRenderTargetFormat(key.dest_host_relevant_format); + xenos::ColorRenderTargetFormat(key.dest_resource_format); xenos::DepthRenderTargetFormat dest_depth_format = - xenos::DepthRenderTargetFormat(key.dest_host_relevant_format); + xenos::DepthRenderTargetFormat(key.dest_resource_format); bool dest_is_64bpp = dest_is_color && xenos::IsColorRenderTargetFormat64bpp(dest_color_format); xenos::ColorRenderTargetFormat source_color_format = - xenos::ColorRenderTargetFormat(key.source_host_relevant_format); + xenos::ColorRenderTargetFormat(key.source_resource_format); xenos::DepthRenderTargetFormat source_depth_format = - xenos::DepthRenderTargetFormat(key.source_host_relevant_format); + xenos::DepthRenderTargetFormat(key.source_resource_format); // If not source_is_color, it's depth / stencil - 40-sample columns are // swapped as opposed to color destination. bool source_is_color = (rs & kTransferUsedRootParameterColorSRVBit) != 0; @@ -3056,10 +3068,11 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { uint32_t source_tile_pixel_x_reg = 0; uint32_t source_tile_pixel_y_reg = 0; - // First sample bit at 4x - horizontal sample. - // Second sample bit at 4x - vertical sample. - // At 2x, the vertical sample is either the first or the second bit - // depending on whether 2x is emulated as 4x. + // First sample bit at 4x in Direct3D 10.1+ - horizontal sample. + // Second sample bit at 4x in Direct3D 10.1+ - vertical sample. + // At 2x: + // - Native 2x: top is 1 in Direct3D 10.1+, bottom is 0. + // - 2x as 4x: top is 0, bottom is 3. if (!source_is_64bpp && dest_is_64bpp) { // 32bpp -> 64bpp, need two samples of the source. @@ -3088,14 +3101,15 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { // D p0,0 s1 = S p0,0 s0,1 | S p0,0 s1,1 // D p1,0 s0 = S p1,0 s0,0 | S p1,0 s1,0 // D p1,0 s1 = S p1,0 s0,1 | S p1,0 s1,1 - // Pixel index can be reused. Sample 0 should become samples 01, - // sample 1 or 3 should become samples 23. + // Pixel index can be reused. Sample 1 (for native 2x) or 0 (for 2x as + // 4x) should become samples 01, sample 0 or 3 should become samples 23. + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); if (msaa_2x_supported_) { - a.OpIShL(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(1)); + a.OpXOr(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(1)); + a.OpIShL(dxbc::Dest::R(1, 0b0100), source_sample, dxbc::Src::LU(1)); } else { a.OpAnd(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(0b10)); } - source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); } else { // 32bpp -> 64bpp, 4x -> 1x. // 1 destination horizontal pixel = 2 source horizontal samples. @@ -3176,11 +3190,14 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { // 64bpp -> 32bpp, 4x -> 2x. - // Destination vertical samples (first or second bit, depending on - // support) = source vertical samples (second bit). + // Destination vertical samples (1/0 in the first bit for native 2x or + // 0/1 in the second bit for 2x as 4x) = source vertical samples + // (second bit). if (msaa_2x_supported_) { a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), dest_sample, source_sample); + a.OpXOr(dxbc::Dest::R(1, 0b0100), source_sample, + dxbc::Src::LU(1 << 1)); } else { a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(0), source_sample, dest_sample); @@ -3219,18 +3236,21 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { // Same BPP, 4x -> 1x/2x. if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { // Same BPP, 4x -> 2x. - // Horizontal pixels to samples. Vertical sample (first or second bit, - // depending on support) to second sample bit. + // Horizontal pixels to samples. Vertical sample (1/0 in the first bit + // for native 2x or 0/1 in the second bit for 2x as 4x) to second + // sample bit. + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); if (msaa_2x_supported_) { a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(31), dxbc::Src::LU(1), dest_sample, dxbc::Src::R(0, dxbc::Src::kXXXX)); + a.OpXOr(dxbc::Dest::R(1, 0b0100), source_sample, + dxbc::Src::LU(1 << 1)); } else { a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(0), dxbc::Src::R(0, dxbc::Src::kXXXX), dest_sample); } - source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); a.OpUShR(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), dxbc::Src::LU(1)); source_tile_pixel_x_reg = 1; @@ -3267,10 +3287,12 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { if (key.source_msaa_samples == xenos::MsaaSamples::k2X) { // 2x -> 4x. // Vertical samples (second bit) of 4x destination to vertical sample - // (01 or 03, depending on support) of 2x source. + // (1, 0 for native 2x, or 0, 3 for 2x as 4x) of 2x source. a.OpUShR(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(1)); source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); - if (!msaa_2x_supported_) { + if (msaa_2x_supported_) { + a.OpXOr(dxbc::Dest::R(1, 0b0100), source_sample, dxbc::Src::LU(1)); + } else { a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), source_sample, source_sample); } @@ -3287,12 +3309,14 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { // 1x/2x -> different 1x/2x. if (key.source_msaa_samples == xenos::MsaaSamples::k2X) { // 2x -> 1x. - // Vertical pixels of 2x destination to vertical samples (01 or 03, - // depending on support) of 1x source. + // Vertical pixels of 2x destination to vertical samples (1, 0 for + // native 2x, or 0, 3 for 2x as 4x) of 1x source. a.OpAnd(dxbc::Dest::R(1, 0b0100), dxbc::Src::R(0, dxbc::Src::kYYYY), dxbc::Src::LU(1)); source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); - if (!msaa_2x_supported_) { + if (msaa_2x_supported_) { + a.OpXOr(dxbc::Dest::R(1, 0b0100), source_sample, dxbc::Src::LU(1)); + } else { a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), source_sample, source_sample); } @@ -3301,15 +3325,20 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { source_tile_pixel_y_reg = 1; } else { // 1x -> 2x. - // Vertical samples (first or second bit, depending on support) of 2x - // destination to vertical pixels of 1x source. - if (!msaa_2x_supported_) { + // Vertical samples (1/0 in the first bit for native 2x or 0/1 in the + // second bit for 2x as 4x) of 2x destination to vertical pixels of 1x + // source. + if (msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), dest_sample); + a.OpXOr(dxbc::Dest::R(1, 0b0010), dxbc::Src::R(1, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + } else { a.OpUShR(dxbc::Dest::R(1, 0b0010), dest_sample, dxbc::Src::LU(1)); + a.OpBFI(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(1, dxbc::Src::kYYYY)); } - a.OpBFI(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(31), dxbc::Src::LU(1), - dxbc::Src::R(0, dxbc::Src::kYYYY), - msaa_2x_supported_ ? dest_sample - : dxbc::Src::R(1, dxbc::Src::kYYYY)); source_tile_pixel_y_reg = 1; } } @@ -3910,13 +3939,15 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kXXXX), dest_sample); } - // Vertical sample index in bit 0 for true 2x or in bit 1 for - // 4x or for 2x emulated as 4x. + // Vertical sample index as 1 or 0 in bit 0 for true 2x or as 0 + // or 1 in bit 1 for 4x or for 2x emulated as 4x. if (key.dest_msaa_samples == xenos::MsaaSamples::k2X && msaa_2x_supported_) { a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kYYYY), dest_sample); + a.OpXOr(dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kYYYY), dxbc::Src::LU(1)); } else { // Using r0.w as a temporary. a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, @@ -3968,19 +3999,22 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { // 4x -> 1x/2x. if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { // 4x -> 2x. - // Horizontal pixels to samples. Vertical sample (first or - // second bit, depending on support) to second sample bit. + // Horizontal pixels to samples. Vertical sample (1, 0 in + // the first bit for native 2x or 0, 1 in the second bit for + // 2x as 4x) to second sample bit. + host_depth_source_sample = + dxbc::Src::R(0, dxbc::Src::kWWWW); if (msaa_2x_supported_) { a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(31), dxbc::Src::LU(1), dest_sample, dxbc::Src::R(0, dxbc::Src::kXXXX)); + a.OpXOr(dxbc::Dest::R(0, 0b1000), + host_depth_source_sample, dxbc::Src::LU(1 << 1)); } else { a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), dxbc::Src::LU(0), dxbc::Src::R(0, dxbc::Src::kXXXX), dest_sample); } - host_depth_source_sample = - dxbc::Src::R(0, dxbc::Src::kWWWW); a.OpUShR(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), dxbc::Src::LU(1)); @@ -4017,13 +4051,16 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { xenos::MsaaSamples::k2X) { // 2x -> 4x. // Vertical samples (second bit) of 4x destination to - // vertical sample (01 or 03, depending on support) of 2x - // source. + // vertical sample (1, 0 for native 2x, or 0, 3 for 2x as + // 4x) of 2x source. a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, dxbc::Src::LU(1)); host_depth_source_sample = dxbc::Src::R(0, dxbc::Src::kWWWW); - if (!msaa_2x_supported_) { + if (msaa_2x_supported_) { + a.OpXOr(dxbc::Dest::R(0, 0b1000), + host_depth_source_sample, dxbc::Src::LU(1)); + } else { a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), dxbc::Src::LU(1), host_depth_source_sample, host_depth_source_sample); @@ -4045,13 +4082,17 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { xenos::MsaaSamples::k2X) { // 2x -> 1x. // Vertical pixels of 2x destination to vertical samples - // (01 or 03, depending on support) of 1x source. + // (1, 0 for native 2x, or 0, 3 for 2x as 4x) of 1x + // source. a.OpAnd(dxbc::Dest::R(0, 0b1000), dxbc::Src::R(0, dxbc::Src::kYYYY), dxbc::Src::LU(1)); host_depth_source_sample = dxbc::Src::R(0, dxbc::Src::kWWWW); - if (!msaa_2x_supported_) { + if (msaa_2x_supported_) { + a.OpXOr(dxbc::Dest::R(0, 0b1000), + host_depth_source_sample, dxbc::Src::LU(1)); + } else { a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), dxbc::Src::LU(1), host_depth_source_sample, host_depth_source_sample); @@ -4061,21 +4102,26 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { dxbc::Src::LU(1)); } else { // 1x -> 2x. - // Vertical samples (first or second bit, depending on - // support) of 2x destination to vertical pixels of 1x - // source. + // Vertical samples (1, 0 in the first bit for native 2x + // or 0, 1 in the second bit for 2x as 4x) of 2x + // destination to vertical pixels of 1x source. // Using r0.w (not needed without source MSAA) as a // temporary. - if (!msaa_2x_supported_) { + if (msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), + dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), dest_sample); + a.OpXOr(dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + } else { a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, dxbc::Src::LU(1)); + a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), + dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(0, dxbc::Src::kWWWW)); } - a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), - dxbc::Src::LU(1), - dxbc::Src::R(0, dxbc::Src::kYYYY), - msaa_2x_supported_ - ? dest_sample - : dxbc::Src::R(0, dxbc::Src::kWWWW)); } } } @@ -4315,8 +4361,8 @@ D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { pipeline_desc.pRootSignature = transfer_root_signatures_[size_t( use_stencil_reference_output_ ? mode.root_signature_with_stencil_ref : mode.root_signature_no_stencil_ref)]; - pipeline_desc.VS.pShaderBytecode = passthrough_position_xy_vs; - pipeline_desc.VS.BytecodeLength = sizeof(passthrough_position_xy_vs); + pipeline_desc.VS.pShaderBytecode = shaders::passthrough_position_xy_vs; + pipeline_desc.VS.BytecodeLength = sizeof(shaders::passthrough_position_xy_vs); pipeline_desc.PS.pShaderBytecode = built_shader_.data(); pipeline_desc.PS.BytecodeLength = built_shader_size_bytes; if (key.dest_msaa_samples == xenos::MsaaSamples::k2X && !msaa_2x_supported_) { @@ -4558,11 +4604,8 @@ void D3D12RenderTargetCache::PerformTransfersAndResolveClears( dest_rt_key.pitch_tiles_at_32bpp; host_depth_store_render_target_constant.resolution_scale = resolution_scale_; - host_depth_store_render_target_constant.second_sample_index = - (dest_rt_key.msaa_samples == xenos::MsaaSamples::k2X && - !msaa_2x_supported_) - ? 3 - : 1; + host_depth_store_render_target_constant.msaa_2x_supported = + uint32_t(msaa_2x_supported_); command_list.D3DSetComputeRoot32BitConstants( kHostDepthStoreRootParameterRenderTargetConstant, sizeof(host_depth_store_render_target_constant) / sizeof(uint32_t), @@ -4861,8 +4904,8 @@ void D3D12RenderTargetCache::PerformTransfersAndResolveClears( uint32_t rt_sort_index = 0; TransferShaderKey new_transfer_shader_key; new_transfer_shader_key.dest_msaa_samples = dest_rt_key.msaa_samples; - new_transfer_shader_key.dest_host_relevant_format = - dest_rt_key.host_relevant_format; + new_transfer_shader_key.dest_resource_format = + dest_rt_key.resource_format; uint32_t stencil_clear_rectangle_count = 0; for (uint32_t j = 0; j <= uint32_t(need_stencil_bit_draws); ++j) { // j == 0 - color or depth. @@ -4899,8 +4942,8 @@ void D3D12RenderTargetCache::PerformTransfersAndResolveClears( RenderTargetKey source_rt_key = source_d3d12_rt.key(); new_transfer_shader_key.source_msaa_samples = source_rt_key.msaa_samples; - new_transfer_shader_key.source_host_relevant_format = - source_rt_key.host_relevant_format; + new_transfer_shader_key.source_resource_format = + source_rt_key.resource_format; bool host_depth_source_is_copy = host_depth_source_d3d12_rt == &dest_d3d12_rt; new_transfer_shader_key.host_depth_source_is_copy = @@ -6013,7 +6056,7 @@ ID3D12PipelineState* D3D12RenderTargetCache::GetOrCreateDumpPipeline( dxbc::Src::LU(xenos::kEdramTileWidthSamples >> uint32_t(format_is_64bpp)), dxbc::Src::VThreadIDInGroup(dxbc::Src::kXXXX)); - // r0.w for 4x MSAA = pixel Y in the group + // r0.w for 2x MSAA = pixel Y in the group a.OpUShR(dxbc::Dest::R(0, 0b1000), dxbc::Src::VThreadIDInGroup(dxbc::Src::kYYYY), dxbc::Src::LU(1)); // r0.w = free @@ -6042,7 +6085,7 @@ ID3D12PipelineState* D3D12RenderTargetCache::GetOrCreateDumpPipeline( if (key.msaa_samples != xenos::MsaaSamples::k1X) { // Sample index. // For 4x, bit 0 for horizontal, bit 1 for vertical. - // For 2x, only vertical - but 0 or 1 for true 2x MSAA or 0 or 3 for 2x MSAA + // For 2x, only vertical - but 1 or 0 for true 2x MSAA or 0 or 3 for 2x MSAA // via two samples of 4x. // r0.w = vertical sample index a.OpAnd(dxbc::Dest::R(0, 0b1000), @@ -6052,11 +6095,17 @@ ID3D12PipelineState* D3D12RenderTargetCache::GetOrCreateDumpPipeline( a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(31), dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kWWWW), dxbc::Src::VThreadIDInGroup(dxbc::Src::kXXXX)); - } else if (!msaa_2x_supported_) { - // r0.w = source sample 0 or 3 for 2x MSAA emulated via 4x - a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), dxbc::Src::LU(1), - dxbc::Src::R(0, dxbc::Src::kWWWW), - dxbc::Src::R(0, dxbc::Src::kWWWW)); + } else { + if (msaa_2x_supported_) { + // r0.w = source sample 1 or 0 for native 2x MSAA + a.OpXOr(dxbc::Dest::R(0, 0b1000), dxbc::Src::R(0, dxbc::Src::kWWWW), + dxbc::Src::LU(1)); + } else { + // r0.w = source sample 0 or 3 for 2x MSAA emulated via 4x + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kWWWW), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + } } } @@ -6427,7 +6476,7 @@ void D3D12RenderTargetCache::DumpRenderTargets(uint32_t dump_base, any_sources_32bpp_64bpp[size_t(rt_key.Is64bpp())] = true; DumpPipelineKey pipeline_key; pipeline_key.msaa_samples = rt_key.msaa_samples; - pipeline_key.host_relevant_format = rt_key.host_relevant_format; + pipeline_key.resource_format = rt_key.resource_format; pipeline_key.is_depth = rt_key.is_depth; dump_invocations_.emplace_back(rectangle, pipeline_key); } diff --git a/src/xenia/gpu/d3d12/d3d12_render_target_cache.h b/src/xenia/gpu/d3d12/d3d12_render_target_cache.h index 1f552e8fe..19a367bd8 100644 --- a/src/xenia/gpu/d3d12/d3d12_render_target_cache.h +++ b/src/xenia/gpu/d3d12/d3d12_render_target_cache.h @@ -15,7 +15,9 @@ #include #include #include +#include #include +#include #include #include @@ -132,8 +134,7 @@ class D3D12RenderTargetCache final : public RenderTargetCache { // floating-point formats, and to distinguish between two -1 representations // in snorm formats). D3D12RenderTarget( - RenderTargetKey key, D3D12RenderTargetCache& render_target_cache, - ID3D12Resource* resource, + RenderTargetKey key, ID3D12Resource* resource, ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_draw, ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_draw_srgb, ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& @@ -142,7 +143,6 @@ class D3D12RenderTargetCache final : public RenderTargetCache { ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_srv_stencil, D3D12_RESOURCE_STATES resource_state) : RenderTarget(key), - render_target_cache_(render_target_cache), resource_(resource), descriptor_draw_(std::move(descriptor_draw)), descriptor_draw_srgb_(std::move(descriptor_draw_srgb)), @@ -197,7 +197,6 @@ class D3D12RenderTargetCache final : public RenderTargetCache { } private: - D3D12RenderTargetCache& render_target_cache_; Microsoft::WRL::ComPtr resource_; ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_draw_; ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_draw_srgb_; @@ -222,9 +221,6 @@ class D3D12RenderTargetCache final : public RenderTargetCache { return D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION; } - xenos::ColorRenderTargetFormat GetHostRelevantColorFormat( - xenos::ColorRenderTargetFormat format) const override; - RenderTarget* CreateRenderTarget(RenderTargetKey key) override; bool IsHostDepthEncodingDifferent( @@ -294,7 +290,7 @@ class D3D12RenderTargetCache final : public RenderTargetCache { // Parameter 1 - destination (shared memory or a part of it). // Parameter 2 - source (EDRAM). ID3D12RootSignature* resolve_copy_root_signature_ = nullptr; - static const std::pair + static const std::pair kResolveCopyShaders[size_t(draw_util::ResolveCopyShaderIndex::kCount)]; ID3D12PipelineState* resolve_copy_pipelines_[size_t( draw_util::ResolveCopyShaderIndex::kCount)] = {}; @@ -416,14 +412,14 @@ class D3D12RenderTargetCache final : public RenderTargetCache { union TransferShaderKey { struct { xenos::MsaaSamples dest_msaa_samples : xenos::kMsaaSamplesBits; - uint32_t dest_host_relevant_format : xenos::kRenderTargetFormatBits; + uint32_t dest_resource_format : xenos::kRenderTargetFormatBits; xenos::MsaaSamples source_msaa_samples : xenos::kMsaaSamplesBits; // Always 1x when host_depth_source_is_copy is true not to create the same // pipeline for different MSAA sample counts as it doesn't matter in this // case. xenos::MsaaSamples host_depth_source_msaa_samples : xenos::kMsaaSamplesBits; - uint32_t source_host_relevant_format : xenos::kRenderTargetFormatBits; + uint32_t source_resource_format : xenos::kRenderTargetFormatBits; // If host depth is also fetched, whether it's pre-copied to the EDRAM // buffer (but since it's just a scratch buffer, with tiles laid out // linearly with the same pitch as in the original render target; also no @@ -537,8 +533,8 @@ class D3D12RenderTargetCache final : public RenderTargetCache { uint32_t pitch_tiles : xenos::kEdramPitchTilesBits; // 1 to 3. uint32_t resolution_scale : 2; - // For native 2x MSAA vs. 2x over 4x. - uint32_t second_sample_index : 2; + // Whether 2x MSAA is supported natively rather than through 4x. + uint32_t msaa_2x_supported : 1; }; uint32_t constant = 0; }; @@ -555,7 +551,7 @@ class D3D12RenderTargetCache final : public RenderTargetCache { union DumpPipelineKey { struct { xenos::MsaaSamples msaa_samples : 2; - uint32_t host_relevant_format : 4; + uint32_t resource_format : 4; // Last bit because this affects the root signature - after sorting, only // change it at most once. Depth buffers have an additional stencil SRV. uint32_t is_depth : 1; @@ -578,11 +574,11 @@ class D3D12RenderTargetCache final : public RenderTargetCache { xenos::ColorRenderTargetFormat GetColorFormat() const { assert_false(is_depth); - return xenos::ColorRenderTargetFormat(host_relevant_format); + return xenos::ColorRenderTargetFormat(resource_format); } xenos::DepthRenderTargetFormat GetDepthFormat() const { assert_true(is_depth); - return xenos::DepthRenderTargetFormat(host_relevant_format); + return xenos::DepthRenderTargetFormat(resource_format); } }; diff --git a/src/xenia/gpu/d3d12/pipeline_cache.cc b/src/xenia/gpu/d3d12/pipeline_cache.cc index 6f8f260e3..556c7cacf 100644 --- a/src/xenia/gpu/d3d12/pipeline_cache.cc +++ b/src/xenia/gpu/d3d12/pipeline_cache.cc @@ -36,6 +36,7 @@ #include "xenia/gpu/d3d12/d3d12_render_target_cache.h" #include "xenia/gpu/draw_util.h" #include "xenia/gpu/gpu_flags.h" +#include "xenia/gpu/xenos.h" #include "xenia/ui/d3d12/d3d12_util.h" DEFINE_bool(d3d12_dxbc_disasm, false, @@ -61,20 +62,22 @@ namespace xe { namespace gpu { namespace d3d12 { -// Generated with `xb buildhlsl`. -#include "xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h" -#include "xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.h" -#include "xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.h" +// Generated with `xb buildshaders`. +namespace shaders { +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_quad_hs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_triangle_hs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/continuous_quad_hs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/continuous_triangle_hs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/discrete_quad_hs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/discrete_triangle_hs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/float24_round_ps.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/float24_truncate_ps.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_point_list_gs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_quad_list_gs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_rectangle_list_gs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/tessellation_adaptive_vs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/tessellation_indexed_vs.h" +} // namespace shaders PipelineCache::PipelineCache(D3D12CommandProcessor& command_processor, const RegisterFile& register_file, @@ -864,146 +867,66 @@ D3D12Shader* PipelineCache::LoadShader(xenos::ShaderType shader_type, return shader; } -bool PipelineCache::GetCurrentShaderModification( +DxbcShaderTranslator::Modification +PipelineCache::GetCurrentVertexShaderModification( const Shader& shader, - DxbcShaderTranslator::Modification& modification_out) const { + Shader::HostVertexShaderType host_vertex_shader_type) const { + assert_true(shader.type() == xenos::ShaderType::kVertex); assert_true(shader.is_ucode_analyzed()); const auto& regs = register_file_; auto sq_program_cntl = regs.Get(); - if (shader.type() == xenos::ShaderType::kVertex) { - Shader::HostVertexShaderType host_vertex_shader_type = - GetCurrentHostVertexShaderTypeIfValid(); - if (host_vertex_shader_type == Shader::HostVertexShaderType(-1)) { - return false; - } - modification_out = DxbcShaderTranslator::Modification( - shader_translator_->GetDefaultVertexShaderModification( - shader.GetDynamicAddressableRegisterCount( - sq_program_cntl.vs_num_reg), - host_vertex_shader_type)); - } else { - assert_true(shader.type() == xenos::ShaderType::kPixel); - DxbcShaderTranslator::Modification pixel_shader_modification( - shader_translator_->GetDefaultPixelShaderModification( - shader.GetDynamicAddressableRegisterCount( - sq_program_cntl.ps_num_reg))); - if (render_target_cache_.GetPath() == - RenderTargetCache::Path::kHostRenderTargets) { - using DepthStencilMode = - DxbcShaderTranslator::Modification::DepthStencilMode; - RenderTargetCache::DepthFloat24Conversion depth_float24_conversion = - render_target_cache_.depth_float24_conversion(); - if ((depth_float24_conversion == - RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating || - depth_float24_conversion == - RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding) && - draw_util::GetDepthControlForCurrentEdramMode(regs).z_enable && - regs.Get().depth_format == - xenos::DepthRenderTargetFormat::kD24FS8) { - pixel_shader_modification.pixel.depth_stencil_mode = - depth_float24_conversion == - RenderTargetCache::DepthFloat24Conversion:: - kOnOutputTruncating - ? DepthStencilMode::kFloat24Truncating - : DepthStencilMode::kFloat24Rounding; - } else { - if (shader.implicit_early_z_write_allowed() && - (!shader.writes_color_target(0) || - !draw_util::DoesCoverageDependOnAlpha( - regs.Get()))) { - pixel_shader_modification.pixel.depth_stencil_mode = - DepthStencilMode::kEarlyHint; - } else { - pixel_shader_modification.pixel.depth_stencil_mode = - DepthStencilMode::kNoModifiers; - } - } - } - modification_out = pixel_shader_modification; - } - return true; + return DxbcShaderTranslator::Modification( + shader_translator_->GetDefaultVertexShaderModification( + shader.GetDynamicAddressableRegisterCount(sq_program_cntl.vs_num_reg), + host_vertex_shader_type)); } -Shader::HostVertexShaderType -PipelineCache::GetCurrentHostVertexShaderTypeIfValid() const { - // If the values this functions returns are changed, INVALIDATE THE SHADER - // STORAGE (increase kVersion for BOTH shaders and pipelines)! The exception - // is when the function originally returned "unsupported", but started to - // return a valid value (in this case the shader wouldn't be cached in the - // first place). Otherwise games will not be able to locate shaders for draws - // for which the host vertex shader type has changed! +DxbcShaderTranslator::Modification +PipelineCache::GetCurrentPixelShaderModification(const Shader& shader) const { + assert_true(shader.type() == xenos::ShaderType::kPixel); + assert_true(shader.is_ucode_analyzed()); const auto& regs = register_file_; - auto vgt_draw_initiator = regs.Get(); - if (!xenos::IsMajorModeExplicit(vgt_draw_initiator.major_mode, - vgt_draw_initiator.prim_type)) { - // VGT_OUTPUT_PATH_CNTL and HOS registers are ignored in implicit major - // mode. - return Shader::HostVertexShaderType::kVertex; - } - if (regs.Get().path_select != - xenos::VGTOutputPath::kTessellationEnable) { - return Shader::HostVertexShaderType::kVertex; - } - xenos::TessellationMode tessellation_mode = - regs.Get().tess_mode; - switch (vgt_draw_initiator.prim_type) { - case xenos::PrimitiveType::kTriangleList: - // Also supported by triangle strips and fans according to: - // https://www.khronos.org/registry/OpenGL/extensions/AMD/AMD_vertex_shader_tessellator.txt - // Would need to convert those to triangle lists, but haven't seen any - // games using tessellated strips/fans so far. - switch (tessellation_mode) { - case xenos::TessellationMode::kDiscrete: - // - Call of Duty 3 - nets above barrels in the beginning of the - // first mission (turn right after the end of the intro) - - // kTriangleList. - case xenos::TessellationMode::kContinuous: - // - Viva Pinata - tree building with a beehive in the beginning - // (visible on the start screen behind the logo), waterfall in the - // beginning - kTriangleList. - return Shader::HostVertexShaderType::kTriangleDomainCPIndexed; - default: - break; + auto sq_program_cntl = regs.Get(); + DxbcShaderTranslator::Modification modification( + shader_translator_->GetDefaultPixelShaderModification( + shader.GetDynamicAddressableRegisterCount( + sq_program_cntl.ps_num_reg))); + if (render_target_cache_.GetPath() == + RenderTargetCache::Path::kHostRenderTargets) { + using DepthStencilMode = + DxbcShaderTranslator::Modification::DepthStencilMode; + RenderTargetCache::DepthFloat24Conversion depth_float24_conversion = + render_target_cache_.depth_float24_conversion(); + if ((depth_float24_conversion == + RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating || + depth_float24_conversion == + RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding) && + draw_util::GetDepthControlForCurrentEdramMode(regs).z_enable && + regs.Get().depth_format == + xenos::DepthRenderTargetFormat::kD24FS8) { + modification.pixel.depth_stencil_mode = + depth_float24_conversion == + RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating + ? DepthStencilMode::kFloat24Truncating + : DepthStencilMode::kFloat24Rounding; + } else { + if (shader.implicit_early_z_write_allowed() && + (!shader.writes_color_target(0) || + !draw_util::DoesCoverageDependOnAlpha( + regs.Get()))) { + modification.pixel.depth_stencil_mode = DepthStencilMode::kEarlyHint; + } else { + modification.pixel.depth_stencil_mode = DepthStencilMode::kNoModifiers; } - break; - case xenos::PrimitiveType::kQuadList: - switch (tessellation_mode) { - // Also supported by quad strips according to: - // https://www.khronos.org/registry/OpenGL/extensions/AMD/AMD_vertex_shader_tessellator.txt - // Would need to convert those to quad lists, but haven't seen any games - // using tessellated strips so far. - case xenos::TessellationMode::kDiscrete: - // Not seen in games so far. - case xenos::TessellationMode::kContinuous: - // - Defender - retro screen and beams in the main menu - kQuadList. - return Shader::HostVertexShaderType::kQuadDomainCPIndexed; - default: - break; - } - break; - case xenos::PrimitiveType::kTrianglePatch: - // - Banjo-Kazooie: Nuts & Bolts - water - adaptive. - // - Halo 3 - water - adaptive. - return Shader::HostVertexShaderType::kTriangleDomainPatchIndexed; - case xenos::PrimitiveType::kQuadPatch: - // - Fable II - continuous. - // - Viva Pinata - garden ground - adaptive. - return Shader::HostVertexShaderType::kQuadDomainPatchIndexed; - default: - // TODO(Triang3l): Support line patches. - break; + } } - XELOGE( - "Unsupported tessellation mode {} for primitive type {}. Report the game " - "to Xenia developers!", - uint32_t(tessellation_mode), uint32_t(vgt_draw_initiator.prim_type)); - return Shader::HostVertexShaderType(-1); + return modification; } bool PipelineCache::ConfigurePipeline( D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, - xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, + const PrimitiveProcessor::ProcessingResult& primitive_processing_result, uint32_t bound_depth_and_color_render_target_bits, const uint32_t* bound_depth_and_color_render_target_formats, void** pipeline_handle_out, ID3D12RootSignature** root_signature_out) { @@ -1074,7 +997,7 @@ bool PipelineCache::ConfigurePipeline( PipelineRuntimeDescription runtime_description; if (!GetCurrentStateDescription( - vertex_shader, pixel_shader, primitive_type, index_format, + vertex_shader, pixel_shader, primitive_processing_result, bound_depth_and_color_render_target_bits, bound_depth_and_color_render_target_formats, runtime_description)) { return false; @@ -1340,7 +1263,7 @@ bool PipelineCache::TranslateAnalyzedShader( bool PipelineCache::GetCurrentStateDescription( D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, - xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, + const PrimitiveProcessor::ProcessingResult& primitive_processing_result, uint32_t bound_depth_and_color_render_target_bits, const uint32_t* bound_depth_and_color_render_target_formats, PipelineRuntimeDescription& runtime_description_out) { @@ -1357,12 +1280,11 @@ bool PipelineCache::GetCurrentStateDescription( // Initialize all unused fields to zero for comparison/hashing. std::memset(&runtime_description_out, 0, sizeof(runtime_description_out)); - bool tessellated = - DxbcShaderTranslator::Modification(vertex_shader->modification()) - .vertex.host_vertex_shader_type != - Shader::HostVertexShaderType::kVertex; - bool primitive_polygonal = - xenos::IsPrimitivePolygonal(tessellated, primitive_type); + assert_true(DxbcShaderTranslator::Modification(vertex_shader->modification()) + .vertex.host_vertex_shader_type == + primitive_processing_result.host_vertex_shader_type); + bool tessellated = primitive_processing_result.IsTessellated(); + bool primitive_polygonal = draw_util::IsPrimitivePolygonal(regs); bool rasterization_enabled = draw_util::IsRasterizationPotentiallyDone(regs, primitive_polygonal); // In Direct3D, rasterization (along with pixel counting) is disabled by @@ -1397,12 +1319,12 @@ bool PipelineCache::GetCurrentStateDescription( description_out.vertex_shader_modification = vertex_shader->modification(); // Index buffer strip cut value. - if (pa_su_sc_mode_cntl.multi_prim_ib_ena) { - // Not using 0xFFFF with 32-bit indices because in index buffers it will be - // 0xFFFF0000 anyway due to endianness. - description_out.strip_cut_index = index_format == xenos::IndexFormat::kInt32 - ? PipelineStripCutIndex::kFFFFFFFF - : PipelineStripCutIndex::kFFFF; + if (primitive_processing_result.host_primitive_reset_enabled) { + description_out.strip_cut_index = + primitive_processing_result.host_index_format == + xenos::IndexFormat::kInt16 + ? PipelineStripCutIndex::kFFFF + : PipelineStripCutIndex::kFFFFFFFF; } else { description_out.strip_cut_index = PipelineStripCutIndex::kNone; } @@ -1410,16 +1332,15 @@ bool PipelineCache::GetCurrentStateDescription( // Host vertex shader type and primitive topology. if (tessellated) { description_out.primitive_topology_type_or_tessellation_mode = - uint32_t(regs.Get().tess_mode); + uint32_t(primitive_processing_result.tessellation_mode); } else { - switch (primitive_type) { + switch (primitive_processing_result.host_primitive_type) { case xenos::PrimitiveType::kPointList: description_out.primitive_topology_type_or_tessellation_mode = uint32_t(PipelinePrimitiveTopologyType::kPoint); break; case xenos::PrimitiveType::kLineList: case xenos::PrimitiveType::kLineStrip: - case xenos::PrimitiveType::kLineLoop: // Quads are emulated as line lists with adjacency. case xenos::PrimitiveType::kQuadList: case xenos::PrimitiveType::k2DLineStrip: @@ -1431,7 +1352,7 @@ bool PipelineCache::GetCurrentStateDescription( uint32_t(PipelinePrimitiveTopologyType::kTriangle); break; } - switch (primitive_type) { + switch (primitive_processing_result.host_primitive_type) { case xenos::PrimitiveType::kPointList: description_out.geometry_shader = PipelineGeometryShader::kPointList; break; @@ -1523,7 +1444,7 @@ bool PipelineCache::GetCurrentStateDescription( poly_offset_scale = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_SCALE].f32; } } - if (pa_su_sc_mode_cntl.poly_mode == xenos::PolygonModeEnable::kDisabled) { + if (pa_su_sc_mode_cntl.poly_mode != xenos::PolygonModeEnable::kDualMode) { description_out.fill_mode_wireframe = 0; } } else { @@ -1536,33 +1457,18 @@ bool PipelineCache::GetCurrentStateDescription( } } if (!edram_rov_used) { - // Conversion based on the calculations in Call of Duty 4 and the values it - // writes to the registers, and also on: - // https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L943 - // Dividing the scale by 2 - Call of Duty 4 sets the constant bias of - // 1/32768 for decals, however, it's done in two steps in separate places: - // first it's divided by 65536, and then it's multiplied by 2 (which is - // consistent with what si_create_rs_state does, which multiplies the offset - // by 2 if it comes from a non-D3D9 API for 24-bit depth buffers) - and - // multiplying by 2 to the number of significand bits. Tested mostly in Call - // of Duty 4 (vehicledamage map explosion decals) and Red Dead Redemption - // (shadows - 2^17 is not enough, 2^18 hasn't been tested, but 2^19 - // eliminates the acne). - if (regs.Get().depth_format == - xenos::DepthRenderTargetFormat::kD24FS8) { - poly_offset *= float(1 << 19); - } else { - poly_offset *= float(1 << 23); - } + float poly_offset_host_scale = draw_util::GetD3D10PolygonOffsetFactor( + regs.Get().depth_format, true); // Using ceil here just in case a game wants the offset but passes a value // that is too small - it's better to apply more offset than to make depth // fighting worse or to disable the offset completely (Direct3D 12 takes an // integer value). - description_out.depth_bias = int32_t(std::ceil(std::abs(poly_offset))) * - (poly_offset < 0.0f ? -1 : 1); - // "slope computed in subpixels (1/12 or 1/16)" - R5xx Acceleration. + description_out.depth_bias = + int32_t(std::ceil(std::abs(poly_offset * poly_offset_host_scale))) * + (poly_offset < 0.0f ? -1 : 1); + // "slope computed in subpixels ([...] 1/16)" - R5xx Acceleration. description_out.depth_bias_slope_scaled = - poly_offset_scale * (1.0f / 16.0f); + poly_offset_scale * xenos::kPolygonOffsetScaleSubpixelUnit; } if (tessellated && cvars::d3d12_tessellation_wireframe) { description_out.fill_mode_wireframe = 1; @@ -1827,16 +1733,17 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( } switch (description.geometry_shader) { case PipelineGeometryShader::kPointList: - state_desc.GS.pShaderBytecode = primitive_point_list_gs; - state_desc.GS.BytecodeLength = sizeof(primitive_point_list_gs); + state_desc.GS.pShaderBytecode = shaders::primitive_point_list_gs; + state_desc.GS.BytecodeLength = sizeof(shaders::primitive_point_list_gs); break; case PipelineGeometryShader::kRectangleList: - state_desc.GS.pShaderBytecode = primitive_rectangle_list_gs; - state_desc.GS.BytecodeLength = sizeof(primitive_rectangle_list_gs); + state_desc.GS.pShaderBytecode = shaders::primitive_rectangle_list_gs; + state_desc.GS.BytecodeLength = + sizeof(shaders::primitive_rectangle_list_gs); break; case PipelineGeometryShader::kQuadList: - state_desc.GS.pShaderBytecode = primitive_quad_list_gs; - state_desc.GS.BytecodeLength = sizeof(primitive_quad_list_gs); + state_desc.GS.pShaderBytecode = shaders::primitive_quad_list_gs; + state_desc.GS.BytecodeLength = sizeof(shaders::primitive_quad_list_gs); break; default: break; @@ -1846,24 +1753,25 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( xenos::TessellationMode tessellation_mode = xenos::TessellationMode( description.primitive_topology_type_or_tessellation_mode); if (tessellation_mode == xenos::TessellationMode::kAdaptive) { - state_desc.VS.pShaderBytecode = tessellation_adaptive_vs; - state_desc.VS.BytecodeLength = sizeof(tessellation_adaptive_vs); + state_desc.VS.pShaderBytecode = shaders::tessellation_adaptive_vs; + state_desc.VS.BytecodeLength = sizeof(shaders::tessellation_adaptive_vs); } else { - state_desc.VS.pShaderBytecode = tessellation_indexed_vs; - state_desc.VS.BytecodeLength = sizeof(tessellation_indexed_vs); + state_desc.VS.pShaderBytecode = shaders::tessellation_indexed_vs; + state_desc.VS.BytecodeLength = sizeof(shaders::tessellation_indexed_vs); } switch (tessellation_mode) { case xenos::TessellationMode::kDiscrete: switch (host_vertex_shader_type) { case Shader::HostVertexShaderType::kTriangleDomainCPIndexed: case Shader::HostVertexShaderType::kTriangleDomainPatchIndexed: - state_desc.HS.pShaderBytecode = discrete_triangle_hs; - state_desc.HS.BytecodeLength = sizeof(discrete_triangle_hs); + state_desc.HS.pShaderBytecode = shaders::discrete_triangle_hs; + state_desc.HS.BytecodeLength = + sizeof(shaders::discrete_triangle_hs); break; case Shader::HostVertexShaderType::kQuadDomainCPIndexed: case Shader::HostVertexShaderType::kQuadDomainPatchIndexed: - state_desc.HS.pShaderBytecode = discrete_quad_hs; - state_desc.HS.BytecodeLength = sizeof(discrete_quad_hs); + state_desc.HS.pShaderBytecode = shaders::discrete_quad_hs; + state_desc.HS.BytecodeLength = sizeof(shaders::discrete_quad_hs); break; default: assert_unhandled_case(host_vertex_shader_type); @@ -1874,13 +1782,14 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( switch (host_vertex_shader_type) { case Shader::HostVertexShaderType::kTriangleDomainCPIndexed: case Shader::HostVertexShaderType::kTriangleDomainPatchIndexed: - state_desc.HS.pShaderBytecode = continuous_triangle_hs; - state_desc.HS.BytecodeLength = sizeof(continuous_triangle_hs); + state_desc.HS.pShaderBytecode = shaders::continuous_triangle_hs; + state_desc.HS.BytecodeLength = + sizeof(shaders::continuous_triangle_hs); break; case Shader::HostVertexShaderType::kQuadDomainCPIndexed: case Shader::HostVertexShaderType::kQuadDomainPatchIndexed: - state_desc.HS.pShaderBytecode = continuous_quad_hs; - state_desc.HS.BytecodeLength = sizeof(continuous_quad_hs); + state_desc.HS.pShaderBytecode = shaders::continuous_quad_hs; + state_desc.HS.BytecodeLength = sizeof(shaders::continuous_quad_hs); break; default: assert_unhandled_case(host_vertex_shader_type); @@ -1890,12 +1799,13 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( case xenos::TessellationMode::kAdaptive: switch (host_vertex_shader_type) { case Shader::HostVertexShaderType::kTriangleDomainPatchIndexed: - state_desc.HS.pShaderBytecode = adaptive_triangle_hs; - state_desc.HS.BytecodeLength = sizeof(adaptive_triangle_hs); + state_desc.HS.pShaderBytecode = shaders::adaptive_triangle_hs; + state_desc.HS.BytecodeLength = + sizeof(shaders::adaptive_triangle_hs); break; case Shader::HostVertexShaderType::kQuadDomainPatchIndexed: - state_desc.HS.pShaderBytecode = adaptive_quad_hs; - state_desc.HS.BytecodeLength = sizeof(adaptive_quad_hs); + state_desc.HS.pShaderBytecode = shaders::adaptive_quad_hs; + state_desc.HS.BytecodeLength = sizeof(shaders::adaptive_quad_hs); break; default: assert_unhandled_case(host_vertex_shader_type); @@ -1933,12 +1843,12 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( description.depth_format == xenos::DepthRenderTargetFormat::kD24FS8) { switch (render_target_cache_.depth_float24_conversion()) { case RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating: - state_desc.PS.pShaderBytecode = float24_truncate_ps; - state_desc.PS.BytecodeLength = sizeof(float24_truncate_ps); + state_desc.PS.pShaderBytecode = shaders::float24_truncate_ps; + state_desc.PS.BytecodeLength = sizeof(shaders::float24_truncate_ps); break; case RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding: - state_desc.PS.pShaderBytecode = float24_round_ps; - state_desc.PS.BytecodeLength = sizeof(float24_round_ps); + state_desc.PS.pShaderBytecode = shaders::float24_round_ps; + state_desc.PS.BytecodeLength = sizeof(shaders::float24_round_ps); break; default: break; diff --git a/src/xenia/gpu/d3d12/pipeline_cache.h b/src/xenia/gpu/d3d12/pipeline_cache.h index c9727b910..b5d7a4209 100644 --- a/src/xenia/gpu/d3d12/pipeline_cache.h +++ b/src/xenia/gpu/d3d12/pipeline_cache.h @@ -29,6 +29,7 @@ #include "xenia/gpu/d3d12/d3d12_shader.h" #include "xenia/gpu/dxbc_shader_translator.h" #include "xenia/gpu/gpu_flags.h" +#include "xenia/gpu/primitive_processor.h" #include "xenia/gpu/register_file.h" #include "xenia/gpu/xenos.h" #include "xenia/ui/d3d12/d3d12_api.h" @@ -67,18 +68,21 @@ class PipelineCache { shader.AnalyzeUcode(ucode_disasm_buffer_); } - // Retrieves the shader modification for the current state, and returns - // whether it is valid. The shader must have microcode analyzed. - bool PipelineCache::GetCurrentShaderModification( + // Retrieves the shader modification for the current state. The shader must + // have microcode analyzed. + DxbcShaderTranslator::Modification + PipelineCache::GetCurrentVertexShaderModification( const Shader& shader, - DxbcShaderTranslator::Modification& modification_out) const; + Shader::HostVertexShaderType host_vertex_shader_type) const; + DxbcShaderTranslator::Modification + PipelineCache::GetCurrentPixelShaderModification(const Shader& shader) const; // If draw_util::IsRasterizationPotentiallyDone is false, the pixel shader // MUST be made nullptr BEFORE calling this! bool ConfigurePipeline( D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, - xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, + const PrimitiveProcessor::ProcessingResult& primitive_processing_result, uint32_t bound_depth_and_color_render_target_bits, const uint32_t* bound_depth_and_color_render_targets_formats, void** pipeline_handle_out, ID3D12RootSignature** root_signature_out); @@ -226,10 +230,6 @@ class PipelineCache { PipelineDescription description; }; - // Returns the host vertex shader type for the current draw if it's valid and - // supported, or Shader::HostVertexShaderType(-1) if not. - Shader::HostVertexShaderType GetCurrentHostVertexShaderTypeIfValid() const; - D3D12Shader* LoadShader(xenos::ShaderType shader_type, const uint32_t* host_address, uint32_t dword_count, uint64_t data_hash); @@ -247,7 +247,7 @@ class PipelineCache { bool GetCurrentStateDescription( D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, - xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, + const PrimitiveProcessor::ProcessingResult& primitive_processing_result, uint32_t bound_depth_and_color_render_target_bits, const uint32_t* bound_depth_and_color_render_target_formats, PipelineRuntimeDescription& runtime_description_out); diff --git a/src/xenia/gpu/d3d12/premake5.lua b/src/xenia/gpu/d3d12/premake5.lua index afb18abaf..fd1baf654 100644 --- a/src/xenia/gpu/d3d12/premake5.lua +++ b/src/xenia/gpu/d3d12/premake5.lua @@ -16,7 +16,7 @@ project("xenia-gpu-d3d12") }) local_platform_files() files({ - "shaders/bin/*.h", + "../shaders/bytecode/d3d12_5_1/*.h", }) group("src") diff --git a/src/xenia/gpu/d3d12/primitive_converter.cc b/src/xenia/gpu/d3d12/primitive_converter.cc deleted file mode 100644 index 90ba11ac5..000000000 --- a/src/xenia/gpu/d3d12/primitive_converter.cc +++ /dev/null @@ -1,762 +0,0 @@ -/** - ****************************************************************************** - * Xenia : Xbox 360 Emulator Research Project * - ****************************************************************************** - * Copyright 2018 Ben Vanik. All rights reserved. * - * Released under the BSD license - see LICENSE in the root for more details. * - ****************************************************************************** - */ - -#include "xenia/gpu/d3d12/primitive_converter.h" - -#include - -#include "xenia/base/assert.h" -#include "xenia/base/cvar.h" -#include "xenia/base/logging.h" -#include "xenia/base/math.h" -#include "xenia/base/memory.h" -#include "xenia/base/platform.h" -#include "xenia/base/profiling.h" -#include "xenia/gpu/d3d12/d3d12_command_processor.h" -#include "xenia/ui/d3d12/d3d12_util.h" - -DEFINE_bool(d3d12_convert_quads_to_triangles, false, - "Convert quad lists to triangle lists on the CPU instead of using " - "a geometry shader. Not recommended for playing, for debugging " - "primarily (because PIX fails to display vertices when a geometry " - "shader is used), and this way quads can't be discarded correctly " - "when the game uses vertex kill functionality.", - "D3D12"); - -namespace xe { -namespace gpu { -namespace d3d12 { - -PrimitiveConverter::PrimitiveConverter(D3D12CommandProcessor& command_processor, - const RegisterFile& register_file, - Memory& memory, - TraceWriter& trace_writer) - : command_processor_(command_processor), - register_file_(register_file), - memory_(memory), - trace_writer_(trace_writer) { - system_page_size_ = uint32_t(memory::page_size()); -} - -PrimitiveConverter::~PrimitiveConverter() { Shutdown(); } - -bool PrimitiveConverter::Initialize() { - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - D3D12_HEAP_FLAGS heap_flag_create_not_zeroed = - provider.GetHeapFlagCreateNotZeroed(); - - // There can be at most 65535 indices in a Xenos draw call (16 bit index - // count), but they can be up to 4 bytes large, and conversion can add more - // indices (almost triple the count for triangle strips or fans, for - // instance). - buffer_pool_ = std::make_unique( - provider, std::max(sizeof(uint32_t) * 3 * 65535, - ui::d3d12::D3D12UploadBufferPool::kDefaultPageSize)); - - // Create the static index buffer for non-indexed drawing. - D3D12_RESOURCE_DESC static_ib_desc; - ui::d3d12::util::FillBufferResourceDesc( - static_ib_desc, kStaticIBTotalCount * sizeof(uint16_t), - D3D12_RESOURCE_FLAG_NONE); - if (FAILED(device->CreateCommittedResource( - &ui::d3d12::util::kHeapPropertiesUpload, heap_flag_create_not_zeroed, - &static_ib_desc, D3D12_RESOURCE_STATE_GENERIC_READ, nullptr, - IID_PPV_ARGS(&static_ib_upload_)))) { - XELOGE( - "Failed to create the upload buffer for the primitive conversion " - "static index buffer"); - Shutdown(); - return false; - } - D3D12_RANGE static_ib_read_range; - static_ib_read_range.Begin = 0; - static_ib_read_range.End = 0; - void* static_ib_mapping; - if (FAILED(static_ib_upload_->Map(0, &static_ib_read_range, - &static_ib_mapping))) { - XELOGE( - "Failed to map the upload buffer for the primitive conversion " - "static index buffer"); - Shutdown(); - return false; - } - uint16_t* static_ib_data = reinterpret_cast(static_ib_mapping); - // Triangle fans as triangle lists. - // https://docs.microsoft.com/en-us/windows/desktop/direct3d9/triangle-fans - // Ordered as (v1, v2, v0), (v2, v3, v0). - uint16_t* static_ib_data_pointer = - &static_ib_data[kStaticIBTriangleFanOffset]; - for (uint32_t i = 2; i < kMaxNonIndexedVertices; ++i) { - *(static_ib_data_pointer++) = i - 1; - *(static_ib_data_pointer++) = i; - *(static_ib_data_pointer++) = 0; - } - static_ib_data_pointer = &static_ib_data[kStaticIBQuadOffset]; - for (uint32_t i = 0; i < (kMaxNonIndexedVertices >> 2); ++i) { - uint32_t quad_index = i << 2; - *(static_ib_data_pointer++) = quad_index; - *(static_ib_data_pointer++) = quad_index + 1; - *(static_ib_data_pointer++) = quad_index + 2; - *(static_ib_data_pointer++) = quad_index; - *(static_ib_data_pointer++) = quad_index + 2; - *(static_ib_data_pointer++) = quad_index + 3; - } - static_ib_upload_->Unmap(0, nullptr); - // Not uploaded yet. - static_ib_upload_submission_ = UINT64_MAX; - if (FAILED(device->CreateCommittedResource( - &ui::d3d12::util::kHeapPropertiesDefault, heap_flag_create_not_zeroed, - &static_ib_desc, D3D12_RESOURCE_STATE_COPY_DEST, nullptr, - IID_PPV_ARGS(&static_ib_)))) { - XELOGE("Failed to create the primitive conversion static index buffer"); - Shutdown(); - return false; - } - static_ib_gpu_address_ = static_ib_->GetGPUVirtualAddress(); - - memory_regions_invalidated_.store(0ull, std::memory_order_relaxed); - memory_invalidation_callback_handle_ = - memory_.RegisterPhysicalMemoryInvalidationCallback( - MemoryInvalidationCallbackThunk, this); - - return true; -} - -void PrimitiveConverter::Shutdown() { - if (memory_invalidation_callback_handle_ != nullptr) { - memory_.UnregisterPhysicalMemoryInvalidationCallback( - memory_invalidation_callback_handle_); - memory_invalidation_callback_handle_ = nullptr; - } - ui::d3d12::util::ReleaseAndNull(static_ib_); - ui::d3d12::util::ReleaseAndNull(static_ib_upload_); - buffer_pool_.reset(); -} - -void PrimitiveConverter::ClearCache() { buffer_pool_->ClearCache(); } - -void PrimitiveConverter::CompletedSubmissionUpdated() { - if (static_ib_upload_ && command_processor_.GetCompletedSubmission() >= - static_ib_upload_submission_) { - // Completely uploaded - release the upload buffer. - static_ib_upload_->Release(); - static_ib_upload_ = nullptr; - } -} - -void PrimitiveConverter::BeginSubmission() { - // Got a command list now - upload and transition the static index buffer if - // needed. - if (static_ib_upload_ && static_ib_upload_submission_ == UINT64_MAX) { - command_processor_.GetDeferredCommandList().D3DCopyResource( - static_ib_, static_ib_upload_); - command_processor_.PushTransitionBarrier(static_ib_, - D3D12_RESOURCE_STATE_COPY_DEST, - D3D12_RESOURCE_STATE_INDEX_BUFFER); - static_ib_upload_submission_ = command_processor_.GetCurrentSubmission(); - } -} - -void PrimitiveConverter::BeginFrame() { - buffer_pool_->Reclaim(command_processor_.GetCompletedFrame()); - converted_indices_cache_.clear(); - memory_regions_used_ = 0; -} - -xenos::PrimitiveType PrimitiveConverter::GetReplacementPrimitiveType( - xenos::PrimitiveType type) { - switch (type) { - case xenos::PrimitiveType::kTriangleFan: - return xenos::PrimitiveType::kTriangleList; - case xenos::PrimitiveType::kLineLoop: - return xenos::PrimitiveType::kLineStrip; - case xenos::PrimitiveType::kQuadList: - if (cvars::d3d12_convert_quads_to_triangles) { - return xenos::PrimitiveType::kTriangleList; - } - break; - default: - break; - } - return type; -} - -PrimitiveConverter::ConversionResult PrimitiveConverter::ConvertPrimitives( - xenos::PrimitiveType source_type, uint32_t address, uint32_t index_count, - xenos::IndexFormat index_format, xenos::Endian index_endianness, - D3D12_GPU_VIRTUAL_ADDRESS& gpu_address_out, uint32_t& index_count_out) { - bool index_32bit = index_format == xenos::IndexFormat::kInt32; - const auto& regs = register_file_; - bool reset = regs.Get().multi_prim_ib_ena; - // Swap the reset index because we will be comparing unswapped values to it. - uint32_t reset_index = xenos::GpuSwap( - regs[XE_GPU_REG_VGT_MULTI_PRIM_IB_RESET_INDX].u32, index_endianness); - // If the specified reset index is the same as the one used by Direct3D 12 - // (0xFFFF or 0xFFFFFFFF - in the pipeline cache, we use the former for - // 16-bit and the latter for 32-bit indices), we can use the buffer directly. - uint32_t reset_index_host = index_32bit ? 0xFFFFFFFFu : 0xFFFFu; - - // Degenerate line loops are just lines. - if (source_type == xenos::PrimitiveType::kLineLoop && index_count <= 2) { - source_type = xenos::PrimitiveType::kLineStrip; - } - - // Check if need to convert at all. - if (source_type == xenos::PrimitiveType::kTriangleStrip || - source_type == xenos::PrimitiveType::kLineStrip) { - if (!reset || reset_index == reset_index_host) { - return ConversionResult::kConversionNotNeeded; - } - } else if (source_type == xenos::PrimitiveType::kQuadList) { - if (!cvars::d3d12_convert_quads_to_triangles) { - return ConversionResult::kConversionNotNeeded; - } - } else if (source_type != xenos::PrimitiveType::kTriangleFan && - source_type != xenos::PrimitiveType::kLineLoop) { - return ConversionResult::kConversionNotNeeded; - } - -#if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES - SCOPE_profile_cpu_f("gpu"); -#endif // XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES - - // Exit early for clearly empty draws, without even reading the memory. - uint32_t index_count_min; - if (source_type == xenos::PrimitiveType::kLineStrip || - source_type == xenos::PrimitiveType::kLineLoop) { - index_count_min = 2; - } else if (source_type == xenos::PrimitiveType::kQuadList) { - index_count_min = 4; - } else { - index_count_min = 3; - } - if (index_count < index_count_min) { - return ConversionResult::kPrimitiveEmpty; - } - - // Invalidate the cache if data behind any entry was modified. - if (memory_regions_invalidated_.exchange(0ull, std::memory_order_acquire) & - memory_regions_used_) { - converted_indices_cache_.clear(); - memory_regions_used_ = 0; - } - - address &= index_32bit ? 0x1FFFFFFC : 0x1FFFFFFE; - uint32_t index_size = index_32bit ? sizeof(uint32_t) : sizeof(uint16_t); - uint32_t index_buffer_size = index_size * index_count; - uint32_t address_last = address + index_size * (index_count - 1); - - // Create the cache entry, currently only for the key. - ConvertedIndices converted_indices; - converted_indices.key.address = address; - converted_indices.key.source_type = source_type; - converted_indices.key.format = index_format; - converted_indices.key.count = index_count; - converted_indices.key.reset = reset ? 1 : 0; - converted_indices.reset_index = reset_index; - - // Try to find the previously converted index buffer. - auto found_range = - converted_indices_cache_.equal_range(converted_indices.key.value); - for (auto iter = found_range.first; iter != found_range.second; ++iter) { - const ConvertedIndices& found_converted = iter->second; - if (reset && found_converted.reset_index != reset_index) { - continue; - } - if (found_converted.converted_index_count == 0) { - return ConversionResult::kPrimitiveEmpty; - } - if (!found_converted.gpu_address) { - return ConversionResult::kConversionNotNeeded; - } - gpu_address_out = found_converted.gpu_address; - index_count_out = found_converted.converted_index_count; - return ConversionResult::kConverted; - } - - // Get the memory usage mask for cache invalidation. - // 1 bit = (512 / 64) MB = 8 MB. - uint64_t memory_regions_used_bits = ~((1ull << (address >> 23)) - 1); - if (address_last < (63 << 23)) { - memory_regions_used_bits = (1ull << ((address_last >> 23) + 1)) - 1; - } - - union { - const void* source; - const uint8_t* source_8; - const uint16_t* source_16; - const uint32_t* source_32; - uintptr_t source_uintptr; - }; - source = memory_.TranslatePhysical(address); - - // Calculate the new index count, and also check if there's nothing to convert - // in the buffer (for instance, if not using actually primitive reset). - uint32_t converted_index_count = 0; - bool conversion_needed = false; - bool simd = false; - // Optimization specific to primitive types - if reset index not found in the - // source index buffer, can set this to false and use a faster way of copying. - bool reset_actually_used = reset; - if (source_type == xenos::PrimitiveType::kTriangleFan) { - // Triangle fans are not supported by Direct3D 12 at all. - conversion_needed = true; - trace_writer_.WriteMemoryRead(address, index_buffer_size); - if (reset) { - uint32_t current_fan_index_count = 0; - for (uint32_t i = 0; i < index_count; ++i) { - uint32_t index = index_format == xenos::IndexFormat::kInt32 - ? source_32[i] - : source_16[i]; - if (index == reset_index) { - current_fan_index_count = 0; - continue; - } - if (++current_fan_index_count >= 3) { - converted_index_count += 3; - } - } - } else { - converted_index_count = 3 * (index_count - 2); - } - } else if (source_type == xenos::PrimitiveType::kTriangleStrip || - source_type == xenos::PrimitiveType::kLineStrip) { - converted_index_count = index_count; - // Check if the restart index is used at all in this buffer because reading - // vertices from a default heap is faster than from an upload heap. - conversion_needed = false; - trace_writer_.WriteMemoryRead(address, index_buffer_size); -#if XE_ARCH_AMD64 - // Will use SIMD to copy 16-byte blocks using _mm_or_si128. - simd = true; - union { - const void* check_source; - const uint32_t* check_source_16; - const uint32_t* check_source_32; - const __m128i* check_source_128; - uintptr_t check_source_uintptr; - }; - check_source = source; - uint32_t check_indices_remaining = index_count; - alignas(16) uint64_t check_result[2]; - if (index_format == xenos::IndexFormat::kInt32) { - while (check_indices_remaining != 0 && (check_source_uintptr & 15)) { - --check_indices_remaining; - if (*(check_source_32++) == reset_index) { - conversion_needed = true; - check_indices_remaining = 0; - } - } - __m128i check_reset_index_vector = _mm_set1_epi32(reset_index); - while (check_indices_remaining >= 4) { - check_indices_remaining -= 4; - _mm_store_si128(reinterpret_cast<__m128i*>(&check_result), - _mm_cmpeq_epi32(_mm_load_si128(check_source_128++), - check_reset_index_vector)); - if (check_result[0] || check_result[1]) { - conversion_needed = true; - check_indices_remaining = 0; - } - } - while (check_indices_remaining != 0) { - --check_indices_remaining; - if (*(check_source_32++) == reset_index) { - conversion_needed = true; - check_indices_remaining = 0; - } - } - } else { - while (check_indices_remaining != 0 && (check_source_uintptr & 15)) { - --check_indices_remaining; - if (*(check_source_16++) == reset_index) { - conversion_needed = true; - check_indices_remaining = 0; - } - } - __m128i check_reset_index_vector = _mm_set1_epi16(reset_index); - while (check_indices_remaining >= 8) { - check_indices_remaining -= 8; - _mm_store_si128(reinterpret_cast<__m128i*>(&check_result), - _mm_cmpeq_epi16(_mm_load_si128(check_source_128++), - check_reset_index_vector)); - if (check_result[0] || check_result[1]) { - conversion_needed = true; - check_indices_remaining = 0; - } - } - while (check_indices_remaining != 0) { - --check_indices_remaining; - if (*(check_source_16++) == reset_index) { - conversion_needed = true; - check_indices_remaining = 0; - } - } - } -#else - if (index_format == xenos::IndexFormat::kInt32) { - for (uint32_t i = 0; i < index_count; ++i) { - if (source_32[i] == reset_index) { - conversion_needed = true; - break; - } - } - } else { - for (uint32_t i = 0; i < index_count; ++i) { - if (source_16[i] == reset_index) { - conversion_needed = true; - break; - } - } - } -#endif // XE_ARCH_AMD64 - } else if (source_type == xenos::PrimitiveType::kLineLoop) { - conversion_needed = true; - trace_writer_.WriteMemoryRead(address, index_buffer_size); - if (reset) { - reset_actually_used = false; - uint32_t current_strip_index_count = 0; - for (uint32_t i = 0; i < index_count; ++i) { - uint32_t index = index_format == xenos::IndexFormat::kInt32 - ? source_32[i] - : source_16[i]; - if (index == reset_index) { - reset_actually_used = true; - // Loop strips with more than 2 vertices. - if (current_strip_index_count > 2) { - ++converted_index_count; - } - current_strip_index_count = 0; - continue; - } - // Start a new strip if 2 vertices, add one vertex if more. - if (++current_strip_index_count >= 2) { - converted_index_count += current_strip_index_count == 2 ? 2 : 1; - } - } - } else { - converted_index_count = index_count + 1; - } - } else if (source_type == xenos::PrimitiveType::kQuadList) { - conversion_needed = true; - trace_writer_.WriteMemoryRead(address, index_buffer_size); - converted_index_count = (index_count >> 2) * 6; - } - converted_indices.converted_index_count = converted_index_count; - - // If nothing to convert, store this result so the check won't be happening - // again and again and exit. - if (!conversion_needed || converted_index_count == 0) { - converted_indices.gpu_address = 0; - converted_indices_cache_.emplace(converted_indices.key.value, - converted_indices); - memory_regions_used_ |= memory_regions_used_bits; - return converted_index_count == 0 ? ConversionResult::kPrimitiveEmpty - : ConversionResult::kConversionNotNeeded; - } - - // Convert. - - D3D12_GPU_VIRTUAL_ADDRESS gpu_address; - void* target = AllocateIndices(index_format, converted_index_count, - simd ? address & 15 : 0, gpu_address); - if (target == nullptr) { - return ConversionResult::kFailed; - } - - if (source_type == xenos::PrimitiveType::kTriangleFan) { - // https://docs.microsoft.com/en-us/windows/desktop/direct3d9/triangle-fans - // Ordered as (v1, v2, v0), (v2, v3, v0). - if (reset) { - uint32_t current_fan_index_count = 0; - uint32_t current_fan_first_index = 0; - if (index_format == xenos::IndexFormat::kInt32) { - uint32_t* target_32 = reinterpret_cast(target); - for (uint32_t i = 0; i < index_count; ++i) { - uint32_t index = source_32[i]; - if (index == reset_index) { - current_fan_index_count = 0; - continue; - } - if (current_fan_index_count == 0) { - current_fan_first_index = index; - } - if (++current_fan_index_count >= 3) { - *(target_32++) = source_32[i - 1]; - *(target_32++) = index; - *(target_32++) = current_fan_first_index; - } - } - } else { - uint16_t* target_16 = reinterpret_cast(target); - for (uint32_t i = 0; i < index_count; ++i) { - uint16_t index = source_16[i]; - if (index == reset_index) { - current_fan_index_count = 0; - continue; - } - if (current_fan_index_count == 0) { - current_fan_first_index = index; - } - if (++current_fan_index_count >= 3) { - *(target_16++) = source_16[i - 1]; - *(target_16++) = index; - *(target_16++) = uint16_t(current_fan_first_index); - } - } - } - } else { - if (index_format == xenos::IndexFormat::kInt32) { - uint32_t* target_32 = reinterpret_cast(target); - for (uint32_t i = 2; i < index_count; ++i) { - *(target_32++) = source_32[i - 1]; - *(target_32++) = source_32[i]; - *(target_32++) = source_32[0]; - } - } else { - uint16_t* target_16 = reinterpret_cast(target); - for (uint32_t i = 2; i < index_count; ++i) { - *(target_16++) = source_16[i - 1]; - *(target_16++) = source_16[i]; - *(target_16++) = source_16[0]; - } - } - } - } else if (source_type == xenos::PrimitiveType::kTriangleStrip || - source_type == xenos::PrimitiveType::kLineStrip) { -#if XE_ARCH_AMD64 - // Replace the reset index with the maximum representable value - vector OR - // gives 0 or 0xFFFF/0xFFFFFFFF, which is exactly what is needed. - // Allocations in the target index buffer are aligned with 16-byte - // granularity, and within 16-byte vectors, both the source and the target - // start at the same offset. - union { - const __m128i* source_aligned_128; - uintptr_t source_aligned_uintptr; - }; - source_aligned_uintptr = source_uintptr & ~(uintptr_t(15)); - union { - __m128i* target_aligned_128; - uintptr_t target_aligned_uintptr; - }; - target_aligned_uintptr = - reinterpret_cast(target) & ~(uintptr_t(15)); - uint32_t vector_count = (address_last >> 4) - (address >> 4) + 1; - if (index_format == xenos::IndexFormat::kInt32) { - __m128i reset_index_vector = _mm_set1_epi32(reset_index); - for (uint32_t i = 0; i < vector_count; ++i) { - __m128i indices_vector = _mm_load_si128(source_aligned_128++); - __m128i indices_are_reset_vector = - _mm_cmpeq_epi32(indices_vector, reset_index_vector); - _mm_store_si128(target_aligned_128++, - _mm_or_si128(indices_vector, indices_are_reset_vector)); - } - } else { - __m128i reset_index_vector = _mm_set1_epi16(reset_index); - for (uint32_t i = 0; i < vector_count; ++i) { - __m128i indices_vector = _mm_load_si128(source_aligned_128++); - __m128i indices_are_reset_vector = - _mm_cmpeq_epi16(indices_vector, reset_index_vector); - _mm_store_si128(target_aligned_128++, - _mm_or_si128(indices_vector, indices_are_reset_vector)); - } - } -#else - if (index_format == xenos::IndexFormat::kInt32) { - for (uint32_t i = 0; i < index_count; ++i) { - uint32_t index = source_32[i]; - reinterpret_cast(target)[i] = - index == reset_index ? 0xFFFFFFFFu : index; - } - } else { - for (uint32_t i = 0; i < index_count; ++i) { - uint16_t index = source_16[i]; - reinterpret_cast(target)[i] = - index == reset_index ? 0xFFFFu : index; - } - } -#endif // XE_ARCH_AMD64 - } else if (source_type == xenos::PrimitiveType::kLineLoop) { - if (reset_actually_used) { - uint32_t current_strip_index_count = 0; - uint32_t current_strip_first_index = 0; - if (index_format == xenos::IndexFormat::kInt32) { - uint32_t* target_32 = reinterpret_cast(target); - for (uint32_t i = 0; i < index_count; ++i) { - uint32_t index = source_32[i]; - if (index == reset_index) { - if (current_strip_index_count > 2) { - *(target_32++) = current_strip_first_index; - } - current_strip_index_count = 0; - continue; - } - if (current_strip_index_count == 0) { - current_strip_first_index = index; - } - ++current_strip_index_count; - if (current_strip_index_count >= 2) { - if (current_strip_index_count == 2) { - *(target_32++) = current_strip_first_index; - } - *(target_32++) = index; - } - } - } else { - uint16_t* target_16 = reinterpret_cast(target); - for (uint32_t i = 0; i < index_count; ++i) { - uint16_t index = source_16[i]; - if (index == reset_index) { - if (current_strip_index_count > 2) { - *(target_16++) = uint16_t(current_strip_first_index); - } - current_strip_index_count = 0; - continue; - } - if (current_strip_index_count == 0) { - current_strip_first_index = index; - } - ++current_strip_index_count; - if (current_strip_index_count >= 2) { - if (current_strip_index_count == 2) { - *(target_16++) = uint16_t(current_strip_first_index); - } - *(target_16++) = index; - } - } - } - } else { - std::memcpy(target, source, index_count * index_size); - if (converted_index_count > index_count) { - if (index_format == xenos::IndexFormat::kInt32) { - reinterpret_cast(target)[index_count] = source_32[0]; - } else { - reinterpret_cast(target)[index_count] = source_16[0]; - } - } - } - } else if (source_type == xenos::PrimitiveType::kQuadList) { - uint32_t quad_count = index_count >> 4; - if (index_format == xenos::IndexFormat::kInt32) { - uint32_t* target_32 = reinterpret_cast(target); - for (uint32_t i = 0; i < quad_count; ++i) { - uint32_t quad_index = i << 2; - *(target_32++) = source_32[quad_index]; - *(target_32++) = source_32[quad_index + 1]; - *(target_32++) = source_32[quad_index + 2]; - *(target_32++) = source_32[quad_index]; - *(target_32++) = source_32[quad_index + 2]; - *(target_32++) = source_32[quad_index + 3]; - } - } else { - uint16_t* target_16 = reinterpret_cast(target); - for (uint32_t i = 0; i < quad_count; ++i) { - uint32_t quad_index = i << 2; - *(target_16++) = source_16[quad_index]; - *(target_16++) = source_16[quad_index + 1]; - *(target_16++) = source_16[quad_index + 2]; - *(target_16++) = source_16[quad_index]; - *(target_16++) = source_16[quad_index + 2]; - *(target_16++) = source_16[quad_index + 3]; - } - } - } - - // Cache and return the indices. - converted_indices.gpu_address = gpu_address; - converted_indices_cache_.emplace(converted_indices.key.value, - converted_indices); - memory_regions_used_ |= memory_regions_used_bits; - gpu_address_out = gpu_address; - index_count_out = converted_index_count; - return ConversionResult::kConverted; -} - -void* PrimitiveConverter::AllocateIndices( - xenos::IndexFormat format, uint32_t count, uint32_t simd_offset, - D3D12_GPU_VIRTUAL_ADDRESS& gpu_address_out) { - if (count == 0) { - return nullptr; - } - uint32_t size = - count * (format == xenos::IndexFormat::kInt32 ? sizeof(uint32_t) - : sizeof(uint16_t)); - // 16-align all index data because SIMD is used to replace the reset index - // (without that, 4-alignment would be required anyway to mix 16-bit and - // 32-bit indices in one buffer page). - size = xe::align(size, uint32_t(16)); - // Add some space to align SIMD register components the same way in the source - // and the buffer. - simd_offset &= 15; - if (simd_offset != 0) { - size += 16; - } - D3D12_GPU_VIRTUAL_ADDRESS gpu_address; - uint8_t* mapping = - buffer_pool_->Request(command_processor_.GetCurrentFrame(), size, 16, - nullptr, nullptr, &gpu_address); - if (mapping == nullptr) { - XELOGE("Failed to allocate space for {} converted {}-bit vertex indices", - count, format == xenos::IndexFormat::kInt32 ? 32 : 16); - return nullptr; - } - gpu_address_out = gpu_address + simd_offset; - return mapping + simd_offset; -} - -std::pair PrimitiveConverter::MemoryInvalidationCallback( - uint32_t physical_address_start, uint32_t length, bool exact_range) { - // 1 bit = (512 / 64) MB = 8 MB. Invalidate a region of this size. - uint32_t bit_index_first = physical_address_start >> 23; - uint32_t bit_index_last = (physical_address_start + length - 1) >> 23; - uint64_t bits = ~((1ull << bit_index_first) - 1); - if (bit_index_last < 63) { - bits &= (1ull << (bit_index_last + 1)) - 1; - } - memory_regions_invalidated_ |= bits; - return std::make_pair(0, UINT32_MAX); -} - -std::pair -PrimitiveConverter::MemoryInvalidationCallbackThunk( - void* context_ptr, uint32_t physical_address_start, uint32_t length, - bool exact_range) { - return reinterpret_cast(context_ptr) - ->MemoryInvalidationCallback(physical_address_start, length, exact_range); -} - -D3D12_GPU_VIRTUAL_ADDRESS PrimitiveConverter::GetStaticIndexBuffer( - xenos::PrimitiveType source_type, uint32_t index_count, - uint32_t& index_count_out) const { - if (index_count > kMaxNonIndexedVertices) { - assert_always(); - return D3D12_GPU_VIRTUAL_ADDRESS(0); - } - if (source_type == xenos::PrimitiveType::kTriangleFan) { - index_count_out = (std::max(index_count, uint32_t(2)) - 2) * 3; - return static_ib_gpu_address_ + - kStaticIBTriangleFanOffset * sizeof(uint16_t); - } - if (source_type == xenos::PrimitiveType::kQuadList && - cvars::d3d12_convert_quads_to_triangles) { - index_count_out = (index_count >> 2) * 6; - return static_ib_gpu_address_ + kStaticIBQuadOffset * sizeof(uint16_t); - } - return D3D12_GPU_VIRTUAL_ADDRESS(0); -} - -void PrimitiveConverter::InitializeTrace() { - // WriteMemoryRead must not be skipped. - converted_indices_cache_.clear(); - memory_regions_used_ = 0; -} - -} // namespace d3d12 -} // namespace gpu -} // namespace xe diff --git a/src/xenia/gpu/d3d12/primitive_converter.h b/src/xenia/gpu/d3d12/primitive_converter.h deleted file mode 100644 index 4d5c80f2d..000000000 --- a/src/xenia/gpu/d3d12/primitive_converter.h +++ /dev/null @@ -1,189 +0,0 @@ -/** - ****************************************************************************** - * Xenia : Xbox 360 Emulator Research Project * - ****************************************************************************** - * Copyright 2018 Ben Vanik. All rights reserved. * - * Released under the BSD license - see LICENSE in the root for more details. * - ****************************************************************************** - */ - -#ifndef XENIA_GPU_D3D12_PRIMITIVE_CONVERTER_H_ -#define XENIA_GPU_D3D12_PRIMITIVE_CONVERTER_H_ - -#include -#include -#include - -#include "xenia/gpu/register_file.h" -#include "xenia/gpu/trace_writer.h" -#include "xenia/gpu/xenos.h" -#include "xenia/memory.h" -#include "xenia/ui/d3d12/d3d12_context.h" -#include "xenia/ui/d3d12/d3d12_upload_buffer_pool.h" - -namespace xe { -namespace gpu { -namespace d3d12 { - -class D3D12CommandProcessor; - -// Index buffer cache for primitive types not natively supported by Direct3D 12: -// - Triangle and line strips with non-0xFFFF/0xFFFFFFFF reset index. -// - Triangle fans. -// - Line loops (only indexed ones - non-indexed are better handled in vertex -// shaders, otherwise a whole index buffer would have to be created for every -// vertex count value). -// - Quad lists (for debugging since geometry shaders break PIX - as an -// alternative to the geometry shader). -class PrimitiveConverter { - public: - PrimitiveConverter(D3D12CommandProcessor& command_processor, - const RegisterFile& register_file, Memory& memory, - TraceWriter& trace_writer); - ~PrimitiveConverter(); - - bool Initialize(); - void Shutdown(); - void ClearCache(); - - void CompletedSubmissionUpdated(); - void BeginSubmission(); - void BeginFrame(); - - // Returns the primitive type that the original type will be converted to. - static xenos::PrimitiveType GetReplacementPrimitiveType( - xenos::PrimitiveType type); - - enum class ConversionResult { - // Converted to a transient buffer. - kConverted, - // Conversion not required - use the index buffer in shared memory. - kConversionNotNeeded, - // No errors, but nothing to render. - kPrimitiveEmpty, - // Total failure of the draw call. - kFailed - }; - - // Converts an index buffer to the primitive type returned by - // GetReplacementPrimitiveType. If conversion has been performed, the returned - // buffer will be in the GENERIC_READ state (it's in an upload heap). Only - // writing to the outputs if returning kConverted. The restart index will be - // handled internally from the register values. - ConversionResult ConvertPrimitives(xenos::PrimitiveType source_type, - uint32_t address, uint32_t index_count, - xenos::IndexFormat index_format, - xenos::Endian index_endianness, - D3D12_GPU_VIRTUAL_ADDRESS& gpu_address_out, - uint32_t& index_count_out); - - // Returns the 16-bit index buffer for drawing unsupported non-indexed - // primitives in INDEX_BUFFER state, for non-indexed drawing. Returns 0 if - // conversion is not available (can draw natively). - D3D12_GPU_VIRTUAL_ADDRESS GetStaticIndexBuffer( - xenos::PrimitiveType source_type, uint32_t index_count, - uint32_t& index_count_out) const; - - // Callback for invalidating buffers mid-frame. - std::pair MemoryInvalidationCallback( - uint32_t physical_address_start, uint32_t length, bool exact_range); - - void InitializeTrace(); - - private: - // simd_offset is source address & 15 - if SIMD is used, the source and the - // target must have the same alignment within one register. 0 is optimal when - // not using SIMD. - void* AllocateIndices(xenos::IndexFormat format, uint32_t count, - uint32_t simd_offset, - D3D12_GPU_VIRTUAL_ADDRESS& gpu_address_out); - - static std::pair MemoryInvalidationCallbackThunk( - void* context_ptr, uint32_t physical_address_start, uint32_t length, - bool exact_range); - - D3D12CommandProcessor& command_processor_; - const RegisterFile& register_file_; - Memory& memory_; - TraceWriter& trace_writer_; - - std::unique_ptr buffer_pool_; - - // Static index buffers for emulating unsupported primitive types when drawing - // without an index buffer. - // CPU-side, used only for uploading - destroyed once the copy commands have - // been completed. - ID3D12Resource* static_ib_upload_ = nullptr; - uint64_t static_ib_upload_submission_; - // GPU-side - used for drawing. - ID3D12Resource* static_ib_ = nullptr; - D3D12_GPU_VIRTUAL_ADDRESS static_ib_gpu_address_; - // In PM4 draw packets, 16 bits are used for the vertex count. - static constexpr uint32_t kMaxNonIndexedVertices = 65535; - static constexpr uint32_t kStaticIBTriangleFanOffset = 0; - static constexpr uint32_t kStaticIBTriangleFanCount = - (kMaxNonIndexedVertices - 2) * 3; - static constexpr uint32_t kStaticIBQuadOffset = - kStaticIBTriangleFanOffset + kStaticIBTriangleFanCount; - static constexpr uint32_t kStaticIBQuadCount = - (kMaxNonIndexedVertices >> 2) * 6; - static constexpr uint32_t kStaticIBTotalCount = - kStaticIBQuadOffset + kStaticIBQuadCount; - - // Not identifying the index buffer uniquely - reset index must also be - // checked if reset is enabled. - union ConvertedIndicesKey { - uint64_t value; - struct { - uint32_t address; // 32 - xenos::PrimitiveType source_type : 6; // 38 - xenos::IndexFormat format : 1; // 39 - uint32_t count : 16; // 55 - uint32_t reset : 1; // 56 - }; - - // Clearing the unused bits. - ConvertedIndicesKey() : value(0) {} - ConvertedIndicesKey(const ConvertedIndicesKey& key) : value(key.value) {} - ConvertedIndicesKey& operator=(const ConvertedIndicesKey& key) { - value = key.value; - return *this; - } - bool operator==(const ConvertedIndicesKey& key) const { - return value == key.value; - } - bool operator!=(const ConvertedIndicesKey& key) const { - return value != key.value; - } - }; - - struct ConvertedIndices { - ConvertedIndicesKey key; - // If reset is enabled, this also must be checked to find cached indices. - uint32_t reset_index; - - // Zero GPU address if conversion not needed or the resulting index buffer - // is empty. - D3D12_GPU_VIRTUAL_ADDRESS gpu_address; - // When conversion is not needed, this must be equal to the original index - // count. - uint32_t converted_index_count; - }; - - // Cache for a single frame. - std::unordered_multimap converted_indices_cache_; - - // Very coarse cache invalidation - if something is modified in a 8 MB portion - // of the physical memory and converted indices are also there, invalidate all - // the cache. - uint64_t memory_regions_used_; - std::atomic memory_regions_invalidated_ = 0; - void* memory_invalidation_callback_handle_ = nullptr; - uint32_t system_page_size_; -}; - -} // namespace d3d12 -} // namespace gpu -} // namespace xe - -#endif // XENIA_GPU_D3D12_PRIMITIVE_CONVERTER_H_ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.cso deleted file mode 100644 index fe27a7c9c..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h deleted file mode 100644 index bf8b7099f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h +++ /dev/null @@ -1,104 +0,0 @@ -// generated from `xb buildhlsl` -// source: adaptive_quad.hs.hlsl -const uint8_t adaptive_quad_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x5B, 0x72, 0xC4, 0x5D, 0x23, 0xC3, 0xD2, 0x31, - 0x9A, 0x46, 0xA8, 0xF4, 0x08, 0x84, 0x19, 0xF6, 0x01, 0x00, 0x00, 0x00, - 0xB0, 0x04, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xA4, 0x00, 0x00, 0x00, 0xDC, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, - 0xD4, 0x01, 0x00, 0x00, 0x14, 0x04, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x3C, 0x00, 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0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x04, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x70, 0x01, 0x00, - 0x33, 0x00, 0x00, 0x0C, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x90, 0xE1, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x90, 0xA1, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x04, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x70, 0x01, 0x00, 0x36, 0x00, 0x00, 0x07, 0x12, 0x20, 0xD0, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt deleted file mode 100644 index 6c8679326..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt +++ /dev/null @@ -1,81 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Patch Constant signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_TessFactor 0 x 0 QUADEDGE float x -// SV_TessFactor 1 x 1 QUADEDGE float x -// SV_TessFactor 2 x 2 QUADEDGE float x -// SV_TessFactor 3 x 3 QUADEDGE float x -// SV_InsideTessFactor 0 x 4 QUADINT float x -// SV_InsideTessFactor 1 x 5 QUADINT float x -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XETESSFACTOR 0 x 0 NONE float x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// Tessellation Domain # of control points -// -------------------- -------------------- -// Quadrilateral 4 -// -// Tessellation Output Primitive Partitioning Type -// ------------------------------ ------------------ -// Clockwise Triangles Even Fractional -// -hs_5_1 -hs_decls -dcl_input_control_point_count 4 -dcl_output_control_point_count 4 -dcl_tessellator_domain domain_quad -dcl_tessellator_partitioning partitioning_fractional_even -dcl_tessellator_output_primitive output_triangle_cw -dcl_globalFlags refactoringAllowed -hs_control_point_phase -dcl_output o0.x -mov o0.x, l(0) -ret -hs_fork_phase -dcl_hs_fork_phase_instance_count 4 -dcl_input vForkInstanceID -dcl_input vicp[4][0].x -dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor -dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor -dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor -dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor -dcl_temps 1 -dcl_indexrange o0.x 4 -iadd r0.x, vForkInstanceID.x, l(3) -and r0.x, r0.x, l(3) -mov r0.y, vForkInstanceID.x -mov o[r0.y + 0].x, vicp[r0.x + 0][0].x -ret -hs_fork_phase -dcl_hs_fork_phase_instance_count 2 -dcl_input vForkInstanceID -dcl_input vicp[4][0].x -dcl_output_siv o4.x, finalQuadUInsideTessFactor -dcl_output_siv o5.x, finalQuadVInsideTessFactor -dcl_temps 1 -dcl_indexrange o4.x 2 -ult r0.x, vForkInstanceID.x, l(1) -movc r0.x, r0.x, l(0), l(3) -ineg r0.y, vForkInstanceID.x -min r0.x, vicp[r0.y + 2][0].x, vicp[r0.x + 0][0].x -mov r0.y, vForkInstanceID.x -mov o[r0.y + 4].x, r0.x -ret -// Approximately 14 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.cso deleted file mode 100644 index 17d8df429..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h deleted file mode 100644 index b764d36c6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h +++ /dev/null @@ -1,87 +0,0 @@ -// generated from `xb buildhlsl` -// source: adaptive_triangle.hs.hlsl -const uint8_t adaptive_triangle_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x0A, 0xA5, 0x75, 0xB0, 0x13, 0x0C, 0x82, 0x6C, - 0xAB, 0x68, 0xC3, 0xA1, 0x34, 0xFB, 0x63, 0xC1, 0x01, 0x00, 0x00, 0x00, - 0xE0, 0x03, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xA4, 0x00, 0x00, 0x00, 0xDC, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, - 0xA4, 0x01, 0x00, 0x00, 0x44, 0x03, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, - 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, - 0x74, 0x20, 0x28, 0x52, 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, - 0x68, 0x61, 0x64, 0x65, 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, - 0x65, 0x72, 0x20, 0x31, 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, - 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, - 0x58, 0x45, 0x54, 0x45, 0x53, 0x53, 0x46, 0x41, 0x43, 0x54, 0x4F, 0x52, - 0x00, 0xAB, 0xAB, 0xAB, 0x4F, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x00, 0x00, 0x58, 0x45, 0x56, 0x45, - 0x52, 0x54, 0x45, 0x58, 0x49, 0x44, 0x00, 0xAB, 0x50, 0x43, 0x53, 0x47, - 0x8C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x00, 0x00, - 0x68, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x00, 0x00, - 0x68, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x00, 0x00, - 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x00, 0x00, - 0x53, 0x56, 0x5F, 0x54, 0x65, 0x73, 0x73, 0x46, 0x61, 0x63, 0x74, 0x6F, - 0x72, 0x00, 0x53, 0x56, 0x5F, 0x49, 0x6E, 0x73, 0x69, 0x64, 0x65, 0x54, - 0x65, 0x73, 0x73, 0x46, 0x61, 0x63, 0x74, 0x6F, 0x72, 0x00, 0xAB, 0xAB, - 0x53, 0x48, 0x45, 0x58, 0x98, 0x01, 0x00, 0x00, 0x51, 0x00, 0x03, 0x00, - 0x66, 0x00, 0x00, 0x00, 0x71, 0x00, 0x00, 0x01, 0x93, 0x18, 0x00, 0x01, - 0x94, 0x18, 0x00, 0x01, 0x95, 0x10, 0x00, 0x01, 0x96, 0x20, 0x00, 0x01, - 0x97, 0x18, 0x00, 0x01, 0x6A, 0x08, 0x00, 0x01, 0x72, 0x00, 0x00, 0x01, - 0x65, 0x00, 0x00, 0x03, 0x12, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x12, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x73, 0x00, 0x00, 0x01, 0x99, 0x00, 0x00, 0x02, 0x03, 0x00, 0x00, 0x00, - 0x5F, 0x00, 0x00, 0x02, 0x00, 0x70, 0x01, 0x00, 0x5F, 0x00, 0x00, 0x04, - 0x12, 0x90, 0x21, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x67, 0x00, 0x00, 0x04, 0x12, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x11, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x04, 0x12, 0x20, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x04, - 0x12, 0x20, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, - 0x68, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, 0x5B, 0x00, 0x00, 0x04, - 0x12, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x06, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x70, 0x01, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x4E, 0x00, 0x00, 0x08, 0x00, 0xD0, 0x00, 0x00, 0x12, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x04, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x70, 0x01, 0x00, - 0x36, 0x00, 0x00, 0x08, 0x12, 0x20, 0x90, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0A, 0x90, 0xA1, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x73, 0x00, 0x00, 0x01, 0x5F, 0x00, 0x00, 0x04, 0x12, 0x90, 0x21, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x04, - 0x12, 0x20, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x68, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x09, - 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x90, 0x21, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x90, 0x21, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x08, - 0x12, 0x20, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0A, 0x90, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.txt deleted file mode 100644 index 36b722759..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.txt +++ /dev/null @@ -1,70 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Patch Constant signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_TessFactor 0 x 0 TRIEDGE float x -// SV_TessFactor 1 x 1 TRIEDGE float x -// SV_TessFactor 2 x 2 TRIEDGE float x -// SV_InsideTessFactor 0 x 3 TRIINT float x -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XETESSFACTOR 0 x 0 NONE float x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// Tessellation Domain # of control points -// -------------------- -------------------- -// Triangle 3 -// -// Tessellation Output Primitive Partitioning Type -// ------------------------------ ------------------ -// Clockwise Triangles Even Fractional -// -hs_5_1 -hs_decls -dcl_input_control_point_count 3 -dcl_output_control_point_count 3 -dcl_tessellator_domain domain_tri -dcl_tessellator_partitioning partitioning_fractional_even -dcl_tessellator_output_primitive output_triangle_cw -dcl_globalFlags refactoringAllowed -hs_control_point_phase -dcl_output o0.x -mov o0.x, l(0) -ret -hs_fork_phase -dcl_hs_fork_phase_instance_count 3 -dcl_input vForkInstanceID -dcl_input vicp[3][0].x -dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor -dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor -dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor -dcl_temps 1 -dcl_indexrange o0.x 3 -iadd r0.x, vForkInstanceID.x, l(1) -udiv null, r0.x, r0.x, l(3) -mov r0.y, vForkInstanceID.x -mov o[r0.y + 0].x, vicp[r0.x + 0][0].x -ret -hs_fork_phase -dcl_input vicp[3][0].x -dcl_output_siv o3.x, finalTriInsideTessFactor -dcl_temps 1 -min r0.x, vicp[2][0].x, vicp[1][0].x -min o3.x, r0.x, vicp[0][0].x -ret -// Approximately 10 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.cso deleted file mode 100644 index dec636afb..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h deleted file mode 100644 index 9993f15d1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h +++ /dev/null @@ -1,59 +0,0 @@ -// generated from `xb buildhlsl` -// source: clear_uint2.ps.hlsl -const uint8_t clear_uint2_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0x5A, 0x4F, 0x43, 0x0F, 0x11, 0xAF, 0xD2, 0xAA, - 0xBD, 0xDE, 0xD1, 0xE4, 0x3E, 0x1F, 0x99, 0xF6, 0x01, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x58, 0x01, 0x00, 0x00, 0x68, 0x01, 0x00, 0x00, 0x9C, 0x01, 0x00, 0x00, - 0xF8, 0x01, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x1C, 0x01, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFF, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0xF4, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x58, 0x65, 0x43, 0x6C, 0x65, 0x61, 0x72, 0x43, - 0x6F, 0x6E, 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xAB, 0xAB, - 0x64, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x63, 0x6C, 0x65, 0x61, 0x72, - 0x5F, 0x76, 0x61, 0x6C, 0x75, 0x65, 0x00, 0x75, 0x69, 0x6E, 0x74, 0x32, - 0x00, 0xAB, 0xAB, 0xAB, 0x01, 0x00, 0x13, 0x00, 0x01, 0x00, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xC7, 0x00, 0x00, 0x00, 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, - 0x74, 0x20, 0x28, 0x52, 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, - 0x68, 0x61, 0x64, 0x65, 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, - 0x65, 0x72, 0x20, 0x31, 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x4F, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x0C, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x54, 0x61, 0x72, 0x67, 0x65, - 0x74, 0x00, 0xAB, 0xAB, 0x53, 0x48, 0x45, 0x58, 0x54, 0x00, 0x00, 0x00, - 0x51, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, - 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x03, 0x32, 0x20, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x07, 0x32, 0x20, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.txt deleted file mode 100644 index 53b861ce7..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.txt +++ /dev/null @@ -1,41 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeClearConstants -// { -// -// uint2 xe_clear_value; // Offset: 0 Size: 8 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// XeClearConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Target 0 xy 0 TARGET uint xy -// -ps_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_output o0.xy -mov o0.xy, CB0[0][0].xyxx -ret -// Approximately 2 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.cso deleted file mode 100644 index 86f4f0832..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.h deleted file mode 100644 index 4770750bd..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.h +++ /dev/null @@ -1,298 +0,0 @@ -// generated from `xb buildhlsl` -// source: continuous_quad.hs.hlsl -const uint8_t continuous_quad_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0xCE, 0xF4, 0xB8, 0x73, 0x74, 0x35, 0xD9, 0xE6, - 0x42, 0x49, 0xF7, 0xF8, 0xDD, 0x91, 0xC9, 0xCD, 0x01, 0x00, 0x00, 0x00, - 0xC0, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, - 0xB8, 0x0B, 0x00, 0x00, 0x24, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, - 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, - 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xE4, 0x05, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, - 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x54, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x06, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x8F, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xAC, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xD0, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 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a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.txt deleted file mode 100644 index 6220f1d0f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.txt +++ /dev/null @@ -1,117 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer xe_system_cbuffer -// { -// -// uint xe_flags; // Offset: 0 Size: 4 [unused] -// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 -// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] -// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] -// int xe_vertex_base_index; // Offset: 20 Size: 4 [unused] -// float2 xe_point_size; // Offset: 24 Size: 8 [unused] -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 [unused] -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 [unused] -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Patch Constant signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_TessFactor 0 x 0 QUADEDGE float x -// SV_TessFactor 1 x 1 QUADEDGE float x -// SV_TessFactor 2 x 2 QUADEDGE float x -// SV_TessFactor 3 x 3 QUADEDGE float x -// SV_InsideTessFactor 0 x 4 QUADINT float x -// SV_InsideTessFactor 1 x 5 QUADINT float x -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// Tessellation Domain # of control points -// -------------------- -------------------- -// Quadrilateral 4 -// -// Tessellation Output Primitive Partitioning Type -// ------------------------------ ------------------ -// Clockwise Triangles Even Fractional -// -hs_5_1 -hs_decls -dcl_input_control_point_count 4 -dcl_output_control_point_count 4 -dcl_tessellator_domain domain_quad -dcl_tessellator_partitioning partitioning_fractional_even -dcl_tessellator_output_primitive output_triangle_cw -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -hs_fork_phase -dcl_hs_fork_phase_instance_count 4 -dcl_input vForkInstanceID -dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor -dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor -dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor -dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor -dcl_temps 1 -dcl_indexrange o0.x 4 -mov r0.x, vForkInstanceID.x -mov o[r0.x + 0].x, CB0[0][0].z -ret -hs_fork_phase -dcl_hs_fork_phase_instance_count 2 -dcl_input vForkInstanceID -dcl_output_siv o4.x, finalQuadUInsideTessFactor -dcl_output_siv o5.x, finalQuadVInsideTessFactor -dcl_temps 1 -dcl_indexrange o4.x 2 -mov r0.x, vForkInstanceID.x -mov o[r0.x + 4].x, CB0[0][0].z -ret -// Approximately 6 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.cso deleted file mode 100644 index 05b842149..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h deleted file mode 100644 index 85eac200f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h +++ /dev/null @@ -1,286 +0,0 @@ -// generated from `xb buildhlsl` -// source: continuous_triangle.hs.hlsl -const uint8_t continuous_triangle_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x02, 0xE3, 0x19, 0x10, 0x92, 0x76, 0xA5, 0xD1, - 0xC7, 0x74, 0x34, 0xD8, 0x2B, 0x4E, 0x20, 0xE1, 0x01, 0x00, 0x00, 0x00, - 0x30, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, - 0x88, 0x0B, 0x00, 0x00, 0x94, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, - 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, - 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 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xe_vertex_base_index; // Offset: 20 Size: 4 [unused] -// float2 xe_point_size; // Offset: 24 Size: 8 [unused] -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 [unused] -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 [unused] -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Patch Constant signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_TessFactor 0 x 0 TRIEDGE float x -// SV_TessFactor 1 x 1 TRIEDGE float x -// SV_TessFactor 2 x 2 TRIEDGE float x -// SV_InsideTessFactor 0 x 3 TRIINT float x -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// Tessellation Domain # of control points -// -------------------- -------------------- -// Triangle 3 -// -// Tessellation Output Primitive Partitioning Type -// ------------------------------ ------------------ -// Clockwise Triangles Even Fractional -// -hs_5_1 -hs_decls -dcl_input_control_point_count 3 -dcl_output_control_point_count 3 -dcl_tessellator_domain domain_tri -dcl_tessellator_partitioning partitioning_fractional_even -dcl_tessellator_output_primitive output_triangle_cw -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -hs_fork_phase -dcl_hs_fork_phase_instance_count 3 -dcl_input vForkInstanceID -dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor -dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor -dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor -dcl_temps 1 -dcl_indexrange o0.x 3 -mov r0.x, vForkInstanceID.x -mov o[r0.x + 0].x, CB0[0][0].z -ret -hs_fork_phase -dcl_output_siv o3.x, finalTriInsideTessFactor -mov o3.x, CB0[0][0].z -ret -// Approximately 5 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.cso deleted file mode 100644 index 73102e1b9..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h deleted file mode 100644 index d2130b9d6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h +++ /dev/null @@ -1,298 +0,0 @@ -// generated from `xb buildhlsl` -// source: discrete_quad.hs.hlsl -const uint8_t discrete_quad_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC6, 0x8B, 0x46, 0x52, 0x9F, 0x04, 0x6C, 0x5E, - 0xD9, 0x89, 0xC1, 0xE5, 0xD0, 0x7D, 0x1C, 0x47, 0x01, 0x00, 0x00, 0x00, - 0xC0, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, - 0xB8, 0x0B, 0x00, 0x00, 0x24, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, - 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, - 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xE4, 0x05, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, - 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x54, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x06, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x8F, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xAC, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xD0, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, - 0x9C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x29, 0x07, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x37, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x47, 0x07, 0x00, 0x00, - 0xB0, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x8C, 0x07, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xA1, 0x07, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBC, 0x07, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x07, 0x00, 0x00, - 0xDC, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x24, 0x08, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x38, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5C, 0x08, 0x00, 0x00, 0xF0, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x6D, 0x08, 0x00, 0x00, - 0xF4, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x82, 0x08, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x97, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 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0xD0, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x80, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt deleted file mode 100644 index c996f805f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt +++ /dev/null @@ -1,117 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer xe_system_cbuffer -// { -// -// uint xe_flags; // Offset: 0 Size: 4 [unused] -// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 -// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] -// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] -// int xe_vertex_base_index; // Offset: 20 Size: 4 [unused] -// float2 xe_point_size; // Offset: 24 Size: 8 [unused] -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 [unused] -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 [unused] -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Patch Constant signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_TessFactor 0 x 0 QUADEDGE float x -// SV_TessFactor 1 x 1 QUADEDGE float x -// SV_TessFactor 2 x 2 QUADEDGE float x -// SV_TessFactor 3 x 3 QUADEDGE float x -// SV_InsideTessFactor 0 x 4 QUADINT float x -// SV_InsideTessFactor 1 x 5 QUADINT float x -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// Tessellation Domain # of control points -// -------------------- -------------------- -// Quadrilateral 4 -// -// Tessellation Output Primitive Partitioning Type -// ------------------------------ ------------------ -// Clockwise Triangles Integer -// -hs_5_1 -hs_decls -dcl_input_control_point_count 4 -dcl_output_control_point_count 4 -dcl_tessellator_domain domain_quad -dcl_tessellator_partitioning partitioning_integer -dcl_tessellator_output_primitive output_triangle_cw -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -hs_fork_phase -dcl_hs_fork_phase_instance_count 4 -dcl_input vForkInstanceID -dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor -dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor -dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor -dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor -dcl_temps 1 -dcl_indexrange o0.x 4 -mov r0.x, vForkInstanceID.x -mov o[r0.x + 0].x, CB0[0][0].z -ret -hs_fork_phase -dcl_hs_fork_phase_instance_count 2 -dcl_input vForkInstanceID -dcl_output_siv o4.x, finalQuadUInsideTessFactor -dcl_output_siv o5.x, finalQuadVInsideTessFactor -dcl_temps 1 -dcl_indexrange o4.x 2 -mov r0.x, vForkInstanceID.x -mov o[r0.x + 4].x, CB0[0][0].z -ret -// Approximately 6 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.cso deleted file mode 100644 index fa5efe849..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h deleted file mode 100644 index ac1aa4b54..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h +++ /dev/null @@ -1,286 +0,0 @@ -// generated from `xb buildhlsl` -// source: discrete_triangle.hs.hlsl -const uint8_t discrete_triangle_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0xA7, 0x04, 0xF9, 0x77, 0xFF, 0x2F, 0x33, 0xB2, - 0x42, 0xCA, 0x54, 0x8E, 0x20, 0xE8, 0xA3, 0x34, 0x01, 0x00, 0x00, 0x00, - 0x30, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, - 0x88, 0x0B, 0x00, 0x00, 0x94, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, - 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, - 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 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xe_tessellation_factor_range;// Offset: 4 Size: 8 -// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] -// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] -// int xe_vertex_base_index; // Offset: 20 Size: 4 [unused] -// float2 xe_point_size; // Offset: 24 Size: 8 [unused] -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 [unused] -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 [unused] -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Patch Constant signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_TessFactor 0 x 0 TRIEDGE float x -// SV_TessFactor 1 x 1 TRIEDGE float x -// SV_TessFactor 2 x 2 TRIEDGE float x -// SV_InsideTessFactor 0 x 3 TRIINT float x -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -// Tessellation Domain # of control points -// -------------------- -------------------- -// Triangle 3 -// -// Tessellation Output Primitive Partitioning Type -// ------------------------------ ------------------ -// Clockwise Triangles Integer -// -hs_5_1 -hs_decls -dcl_input_control_point_count 3 -dcl_output_control_point_count 3 -dcl_tessellator_domain domain_tri -dcl_tessellator_partitioning partitioning_integer -dcl_tessellator_output_primitive output_triangle_cw -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -hs_fork_phase -dcl_hs_fork_phase_instance_count 3 -dcl_input vForkInstanceID -dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor -dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor -dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor -dcl_temps 1 -dcl_indexrange o0.x 3 -mov r0.x, vForkInstanceID.x -mov o[r0.x + 0].x, CB0[0][0].z -ret -hs_fork_phase -dcl_output_siv o3.x, finalTriInsideTessFactor -mov o3.x, CB0[0][0].z -ret -// Approximately 5 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.cso deleted file mode 100644 index dc2c363ab..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h deleted file mode 100644 index 13a643d2d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h +++ /dev/null @@ -1,156 +0,0 @@ -// generated from `xb buildhlsl` -// source: float24_round.ps.hlsl -const uint8_t float24_round_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0x43, 0xE5, 0x61, 0xEC, 0x0F, 0x49, 0x76, 0x10, - 0xA9, 0xDD, 0x83, 0xEB, 0xC5, 0x2D, 0x6F, 0xF0, 0x01, 0x00, 0x00, 0x00, - 0x20, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0xC4, 0x02, 0x00, 0x00, - 0x84, 0x06, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, - 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt deleted file mode 100644 index 6ecef007a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt +++ /dev/null @@ -1,74 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float -// TEXCOORD 1 xyzw 1 NONE float -// TEXCOORD 2 xyzw 2 NONE float -// TEXCOORD 3 xyzw 3 NONE float -// TEXCOORD 4 xyzw 4 NONE float -// TEXCOORD 5 xyzw 5 NONE float -// TEXCOORD 6 xyzw 6 NONE float -// TEXCOORD 7 xyzw 7 NONE float -// TEXCOORD 8 xyzw 8 NONE float -// TEXCOORD 9 xyzw 9 NONE float -// TEXCOORD 10 xyzw 10 NONE float -// TEXCOORD 11 xyzw 11 NONE float -// TEXCOORD 12 xyzw 12 NONE float -// TEXCOORD 13 xyzw 13 NONE float -// TEXCOORD 14 xyzw 14 NONE float -// TEXCOORD 15 xyzw 15 NONE float -// TEXCOORD 16 xyz 16 NONE float -// TEXCOORD 17 xy 17 NONE float -// SV_Position 0 xyzw 18 POS float z -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Depth 0 N/A oDepth DEPTH float YES -// -// Pixel Shader runs at sample frequency -// -ps_5_1 -dcl_globalFlags refactoringAllowed -dcl_input_ps_siv linear noperspective sample v18.z, position -dcl_output oDepth -dcl_temps 2 -mul_sat [precise(x)] r0.x, v18.z, l(2.000000) -uge [precise(y)] r0.y, l(0x7fffffff), r0.x -and [precise(x)] r0.x, r0.x, r0.y -umin [precise(x)] r0.x, r0.x, l(0x3ffffff8) -bfi [precise(y)] r0.y, l(23), l(0), r0.x, l(0x00800000) -ushr [precise(z)] r0.z, r0.x, l(23) -iadd [precise(z)] r0.z, -r0.z, l(113) -umin [precise(z)] r0.z, r0.z, l(24) -ushr [precise(y)] r0.y, r0.y, r0.z -ult [precise(z)] r0.z, r0.x, l(0x38800000) -iadd [precise(x)] r0.x, r0.x, l(0xc8000000) -movc [precise(x)] r0.x, r0.z, r0.y, r0.x -iadd [precise(y)] r0.y, r0.x, l(3) -ubfe [precise(x)] r0.x, l(1), l(3), r0.x -iadd [precise(x)] r0.x, r0.x, r0.y -ubfe [precise(xyz)] r0.xyz, l(24, 20, 4, 0), l(3, 3, 23, 0), r0.xxxx -firstbit_hi [precise(w)] r0.w, r0.y -iadd [precise(w)] r0.w, r0.w, l(-11) -movc [precise(w)] r0.w, r0.y, r0.w, l(21) -iadd [precise(x)] r1.x, -r0.w, l(1) -movc [precise(x)] r1.x, r0.z, r0.z, r1.x -ishl [precise(w)] r0.w, r0.y, r0.w -and [precise(w)] r0.w, r0.w, l(0x000fffff) -movc [precise(y)] r0.y, r0.z, r0.y, r0.w -ishl [precise(z)] r0.z, r1.x, l(23) -iadd [precise(z)] r0.z, r0.z, l(0x37800000) -ishl [precise(y)] r0.y, r0.y, l(3) -iadd [precise(y)] r0.y, r0.z, r0.y -movc [precise(x)] oDepth, r0.x, r0.y, l(0) -ret -// Approximately 30 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.cso deleted file mode 100644 index bf3336db6..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.h deleted file mode 100644 index 33d99127a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.h +++ /dev/null @@ -1,103 +0,0 @@ -// generated from `xb buildhlsl` -// source: float24_truncate.ps.hlsl -const uint8_t float24_truncate_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0xD2, 0x84, 0x34, 0xF5, 0xD7, 0xE0, 0x74, 0xDC, - 0x81, 0x7E, 0x06, 0xD0, 0xD8, 0x16, 0x1B, 0xC7, 0x01, 0x00, 0x00, 0x00, - 0xA4, 0x04, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0xCC, 0x02, 0x00, 0x00, - 0x08, 0x04, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFF, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x08, 0x0B, - 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x01, 0x36, 0x00, 0x08, 0x05, - 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, 0x38, 0x00, 0x08, 0x06, - 0x01, 0x70, 0x02, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x3E, 0x00, 0x00, 0x01, - 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.txt deleted file mode 100644 index c2170112a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.txt +++ /dev/null @@ -1,56 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float -// TEXCOORD 1 xyzw 1 NONE float -// TEXCOORD 2 xyzw 2 NONE float -// TEXCOORD 3 xyzw 3 NONE float -// TEXCOORD 4 xyzw 4 NONE float -// TEXCOORD 5 xyzw 5 NONE float -// TEXCOORD 6 xyzw 6 NONE float -// TEXCOORD 7 xyzw 7 NONE float -// TEXCOORD 8 xyzw 8 NONE float -// TEXCOORD 9 xyzw 9 NONE float -// TEXCOORD 10 xyzw 10 NONE float -// TEXCOORD 11 xyzw 11 NONE float -// TEXCOORD 12 xyzw 12 NONE float -// TEXCOORD 13 xyzw 13 NONE float -// TEXCOORD 14 xyzw 14 NONE float -// TEXCOORD 15 xyzw 15 NONE float -// TEXCOORD 16 xyz 16 NONE float -// TEXCOORD 17 xy 17 NONE float -// SV_Position 0 xyzw 18 POS float z -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_DepthLessEqual 0 N/A oDepthLE DEPTHLE float YES -// -// Pixel Shader runs at sample frequency -// -ps_5_1 -dcl_globalFlags refactoringAllowed -dcl_input_ps_siv linear noperspective sample v18.z, position -dcl_output oDepthLE -dcl_temps 1 -mul_sat [precise(x)] r0.x, v18.z, l(2.000000) -uge [precise(y)] r0.y, r0.x, l(0x2e800000) -if_nz r0.y - ubfe [precise(y)] r0.y, l(8), l(23), r0.x - iadd [precise(y)] r0.y, -r0.y, l(116) - imax [precise(y)] r0.y, r0.y, l(3) - bfi [precise(x)] r0.x, r0.y, l(0), l(0), r0.x -else - mov [precise(x)] r0.x, l(0) -endif -mul [precise(x)] oDepthLE, r0.x, l(0.500000) -ret -// Approximately 12 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.cso deleted file mode 100644 index 8b13728d2..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h deleted file mode 100644 index 1a308e32c..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h +++ /dev/null @@ -1,67 +0,0 @@ -// generated from `xb buildhlsl` -// source: fullscreen_tc.vs.hlsl -const uint8_t fullscreen_tc_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC8, 0x08, 0xCC, 0x41, 0x31, 0xE3, 0x4F, 0xEB, - 0x8F, 0xB9, 0xCA, 0xA7, 0x9E, 0xCB, 0xE6, 0x3C, 0x01, 0x00, 0x00, 0x00, - 0xF0, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0x2C, 0x01, 0x00, 0x00, - 0x54, 0x02, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52, - 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65, - 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31, - 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x56, - 0x65, 0x72, 0x74, 0x65, 0x78, 0x49, 0x44, 0x00, 0x4F, 0x53, 0x47, 0x4E, - 0x50, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0C, 0x00, 0x00, - 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x54, 0x45, 0x58, 0x43, 0x4F, 0x4F, 0x52, 0x44, 0x00, 0x53, 0x56, 0x5F, - 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, 0x00, 0xAB, 0xAB, 0xAB, - 0x53, 0x48, 0x45, 0x58, 0x20, 0x01, 0x00, 0x00, 0x51, 0x00, 0x01, 0x00, - 0x48, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x60, 0x00, 0x00, 0x04, - 0x12, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x65, 0x00, 0x00, 0x03, 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x67, 0x00, 0x00, 0x04, 0xF2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, - 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0A, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x0A, 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x32, 0x00, 0x00, 0x0F, 0x32, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, - 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x08, 0xC2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x36, 0x00, 0x00, 0x05, - 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.txt deleted file mode 100644 index 5c052f2c8..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.txt +++ /dev/null @@ -1,34 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_VertexID 0 x 0 VERTID uint x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xy 0 NONE float xy -// SV_Position 0 xyzw 1 POS float xyzw -// -vs_5_1 -dcl_globalFlags refactoringAllowed -dcl_input_sgv v0.x, vertex_id -dcl_output o0.xy -dcl_output_siv o1.xyzw, position -dcl_temps 1 -ishl r0.y, v0.x, l(1) -mov r0.x, v0.x -and r0.xy, r0.xyxx, l(2, 2, 0, 0) -utof r0.xy, r0.xyxx -mad o1.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000) -mov o1.zw, l(0,0,0,1.000000) -mov o0.xy, r0.xyxx -ret -// Approximately 8 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.cso deleted file mode 100644 index 123c02a0e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h deleted file mode 100644 index ffd08d3aa..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h +++ /dev/null @@ -1,61 +0,0 @@ -// generated from `xb buildhlsl` -// source: fullscreen.vs.hlsl -const uint8_t fullscreen_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0x6F, 0x47, 0xEA, 0x2B, 0xEE, 0x46, 0xA8, 0x72, - 0x11, 0x91, 0x8B, 0x91, 0x98, 0x7C, 0xBE, 0xB4, 0x01, 0x00, 0x00, 0x00, - 0xAC, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 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0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt deleted file mode 100644 index 568c30dc5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt +++ /dev/null @@ -1,31 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_VertexID 0 x 0 VERTID uint x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Position 0 xyzw 0 POS float xyzw -// -vs_5_1 -dcl_globalFlags refactoringAllowed -dcl_input_sgv v0.x, vertex_id -dcl_output_siv o0.xyzw, position -dcl_temps 1 -ushr r0.y, v0.x, l(1) -mov r0.x, v0.x -and r0.xy, r0.xyxx, l(1, 1, 0, 0) -utof r0.xy, r0.xyxx -mad o0.xy, r0.xyxx, l(4.000000, 4.000000, 0.000000, 0.000000), l(-1.000000, -1.000000, 0.000000, 0.000000) -mov o0.zw, l(0,0,0,1.000000) -ret -// Approximately 7 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.cso deleted file mode 100644 index a278d8619..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.h deleted file mode 100644 index 4592198e6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.h +++ /dev/null @@ -1,205 +0,0 @@ -// generated from `xb buildhlsl` -// source: host_depth_store_1xmsaa.cs.hlsl -const uint8_t host_depth_store_1xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x06, 0x8B, 0xC6, 0xDF, 0xF2, 0x58, 0x10, 0xB2, - 0xB6, 0xCC, 0xA8, 0x05, 0x1A, 0xA6, 0xF4, 0xA1, 0x01, 0x00, 0x00, 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-// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeHostDepthStoreRectangleConstants -// { -// -// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 -// -// } -// -// cbuffer XeHostDepthStoreRenderTargetConstants -// { -// -// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_host_depth_store_source texture float 2d T0 t0 1 -// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 -// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 -// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 -dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 4 -dcl_thread_group 8, 8, 1 -ubfe r0.x, l(2), l(10), CB1[1][0].x -ubfe r0.y, l(10), l(20), CB0[0][0].x -imul null, r0.y, r0.x, r0.y -ult r0.y, r0.y, vThreadID.x -if_nz r0.y - ret -endif -ushr r1.y, CB0[0][0].x, l(10) -mov r1.x, CB0[0][0].x -bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) -ishl r1.x, vThreadID.x, l(3) -mov r1.y, vThreadID.y -imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx -and r0.y, CB1[1][0].x, l(1023) -imul null, r0.xz, r0.xxxx, l(80, 0, 16, 0) -udiv r2.xy, null, r1.xyxx, r0.xzxx -imad r0.y, r2.y, r0.y, r2.x -imad r2.xy, -r2.xyxx, r0.xzxx, r1.xyxx -imul null, r0.z, r0.z, r0.x -imad r0.x, r2.y, r0.x, r2.x -imad r0.x, r0.y, r0.z, r0.x -ushr r0.x, r0.x, l(2) -mov r1.zw, l(0,0,0,0) -ld r2.x, r1.xyww, T0[0].xyzw -iadd r3.xyzw, r1.xyww, l(1, 0, 0, 0) -ld r2.y, r3.xyzw, T0[0].yxzw -iadd r3.xyzw, r1.xyww, l(2, 0, 0, 0) -ld r2.z, r3.xyzw, T0[0].yzxw -iadd r3.xyzw, r1.xyww, l(3, 0, 0, 0) -ld r2.w, r3.xyzw, T0[0].yzwx -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.y, r0.x, l(1) -iadd r2.xyzw, r1.xyww, l(4, 0, 0, 0) -ld r2.x, r2.xyzw, T0[0].xyzw -iadd r3.xyzw, r1.xyww, l(5, 0, 0, 0) -ld r2.y, r3.xyzw, T0[0].yxzw -iadd r3.xyzw, r1.xyww, l(6, 0, 0, 0) -ld r2.z, r3.xyzw, T0[0].yzxw -iadd r1.xyzw, r1.xyzw, l(7, 0, 0, 0) -ld r2.w, r1.xyzw, T0[0].yzwx -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw -ret -// Approximately 42 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.cso deleted file mode 100644 index c104a3c0f..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.h deleted file mode 100644 index 53b4835a0..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.h +++ /dev/null @@ -1,238 +0,0 @@ -// generated from `xb buildhlsl` -// source: host_depth_store_2xmsaa.cs.hlsl -const uint8_t host_depth_store_2xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF2, 0xD0, 0x6F, 0x9B, 0x1F, 0xED, 0x91, 0x9A, - 0x07, 0xF0, 0x42, 0x45, 0x4E, 0xB2, 0x31, 0x94, 0x01, 0x00, 0x00, 0x00, - 0xF8, 0x0A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xAC, 0x02, 0x00, 0x00, 0xBC, 0x02, 0x00, 0x00, 0xCC, 0x02, 0x00, 0x00, - 0x5C, 0x0A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x70, 0x02, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x5C, 0x01, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x3C, 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b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.txt deleted file mode 100644 index cebf51288..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.txt +++ /dev/null @@ -1,108 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeHostDepthStoreRectangleConstants -// { -// -// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 -// -// } -// -// cbuffer XeHostDepthStoreRenderTargetConstants -// { -// -// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_host_depth_store_source texture float 2dMS T0 t0 1 -// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 -// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 -// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 -dcl_resource_texture2dms(0) (float,float,float,float) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 5 -dcl_thread_group 8, 8, 1 -ubfe r0.x, l(2), l(10), CB1[1][0].x -ubfe r0.y, l(10), l(20), CB0[0][0].x -imul null, r0.y, r0.x, r0.y -ult r0.y, r0.y, vThreadID.x -if_nz r0.y - ret -endif -ushr r1.y, CB0[0][0].x, l(10) -mov r1.x, CB0[0][0].x -bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) -ishl r1.x, vThreadID.x, l(3) -ushr r1.y, vThreadID.y, l(1) -imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx -and r2.y, vThreadID.y, l(1) -and r0.y, CB1[1][0].x, l(1023) -ishl r1.z, r1.y, l(1) -mov r2.x, l(0) -iadd r0.zw, r1.xxxz, r2.xxxy -imul null, r2.xz, r0.xxxx, l(80, 0, 16, 0) -udiv r3.xy, null, r0.zwzz, r2.xzxx -imad r0.x, r3.y, r0.y, r3.x -imad r0.yz, -r3.xxyx, r2.xxzx, r0.zzwz -imul null, r0.w, r2.z, r2.x -imad r0.y, r0.z, r2.x, r0.y -imad r0.x, r0.x, r0.w, r0.y -ushr r0.x, r0.x, l(2) -ubfe r0.y, l(2), l(12), CB1[1][0].x -movc r0.y, r2.y, r0.y, l(0) -mov r1.w, l(0) -ldms r2.x, r1.xyww, T0[0].xyzw, r0.y -iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0) -mov r4.xy, r3.zwzz -mov r4.zw, l(0,0,0,0) -ldms r2.y, r4.xyzw, T0[0].yxzw, r0.y -mov r3.zw, l(0,0,0,0) -ldms r2.z, r3.xyzw, T0[0].yzxw, r0.y -iadd r3.xyzw, r1.xyxy, l(4, 0, 3, 0) -mov r4.xy, r3.zwzz -mov r4.zw, l(0,0,0,0) -ldms r2.w, r4.xyzw, T0[0].yzwx, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.z, r0.x, l(1) -mov r3.zw, l(0,0,0,0) -ldms r2.x, r3.xyzw, T0[0].xyzw, r0.y -iadd r3.xyzw, r1.xyxy, l(6, 0, 5, 0) -mov r4.xy, r3.zwzz -mov r4.zw, l(0,0,0,0) -ldms r2.y, r4.xyzw, T0[0].yxzw, r0.y -mov r3.zw, l(0,0,0,0) -ldms r2.z, r3.xyzw, T0[0].yzxw, r0.y -iadd r1.xy, r1.xyxx, l(7, 0, 0, 0) -mov r1.zw, l(0,0,0,0) -ldms r2.w, r1.xyzw, T0[0].yzwx, r0.y -store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw -ret -// Approximately 55 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.cso deleted file mode 100644 index ab063be02..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.h deleted file mode 100644 index 6a8c7047f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.h +++ /dev/null @@ -1,216 +0,0 @@ -// generated from `xb buildhlsl` -// source: host_depth_store_4xmsaa.cs.hlsl -const uint8_t host_depth_store_4xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xAB, 0x0D, 0x4C, 0xFE, 0x62, 0x70, 0xC8, 0xCC, - 0x3F, 0x1F, 0x92, 0x18, 0xE5, 0x2A, 0xA4, 0x16, 0x01, 0x00, 0x00, 0x00, - 0xE8, 0x09, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xAC, 0x02, 0x00, 0x00, 0xBC, 0x02, 0x00, 0x00, 0xCC, 0x02, 0x00, 0x00, - 0x4C, 0x09, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x70, 0x02, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x5C, 0x01, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x46, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xDC, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 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0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.txt deleted file mode 100644 index 5f2773c66..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.txt +++ /dev/null @@ -1,97 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeHostDepthStoreRectangleConstants -// { -// -// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 -// -// } -// -// cbuffer XeHostDepthStoreRenderTargetConstants -// { -// -// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_host_depth_store_source texture float 2dMS T0 t0 1 -// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 -// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 -// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 -dcl_resource_texture2dms(0) (float,float,float,float) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 5 -dcl_thread_group 8, 8, 1 -ubfe r0.x, l(2), l(10), CB1[1][0].x -ushr r0.y, vThreadID.x, l(1) -ubfe r0.z, l(10), l(20), CB0[0][0].x -imul null, r0.z, r0.x, r0.z -ult r0.y, r0.z, r0.y -if_nz r0.y - ret -endif -ushr r1.y, CB0[0][0].x, l(10) -mov r1.x, CB0[0][0].x -bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) -ishl r1.x, vThreadID.x, l(2) -ushr r1.y, vThreadID.y, l(1) -imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx -bfi r0.yz, l(0, 31, 31, 0), l(0, 1, 1, 0), r1.xxyx, vThreadID.xxyx -and r0.w, CB1[1][0].x, l(1023) -imul null, r2.xy, r0.xxxx, l(80, 16, 0, 0) -udiv r2.zw, null, r0.yyyz, r2.xxxy -imad r0.x, r2.w, r0.w, r2.z -imad r0.yz, -r2.zzwz, r2.xxyx, r0.yyzy -imul null, r0.w, r2.y, r2.x -imad r0.y, r0.z, r2.x, r0.y -imad r0.x, r0.x, r0.w, r0.y -ushr r0.x, r0.x, l(2) -bfi r0.y, l(1), l(1), vThreadID.y, l(0) -iadd r0.zw, r0.yyyx, l(0, 0, 1, 1) -mov r1.zw, l(0,0,0,0) -ldms r2.x, r1.xyww, T0[0].xyzw, r0.y -ldms r2.y, r1.xyzw, T0[0].yxzw, r0.z -iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0) -mov r4.xy, r3.zwzz -mov r4.zw, l(0,0,0,0) -ldms r2.z, r4.xyww, T0[0].yzxw, r0.y -ldms r2.w, r4.xyzw, T0[0].yzwx, r0.z -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -mov r3.zw, l(0,0,0,0) -ldms r2.x, r3.xyww, T0[0].xyzw, r0.y -ldms r2.y, r3.xyzw, T0[0].yxzw, r0.z -iadd r1.xy, r1.xyxx, l(3, 0, 0, 0) -mov r1.zw, l(0,0,0,0) -ldms r2.z, r1.xyww, T0[0].yzxw, r0.y -ldms r2.w, r1.xyzw, T0[0].yzwx, r0.z -store_uav_typed U0[0].xyzw, r0.wwww, r2.xyzw -ret -// Approximately 44 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.cso deleted file mode 100644 index d0f834ec7..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h deleted file mode 100644 index 7f0493fd5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h +++ /dev/null @@ -1,48 +0,0 @@ -// generated from `xb buildhlsl` -// source: passthrough_position_xy.vs.hlsl -const uint8_t passthrough_position_xy_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0x5C, 0xDC, 0x00, 0xC7, 0xBE, 0x43, 0xB7, 0x99, - 0xAB, 0xC0, 0x04, 0x27, 0x43, 0x37, 0xD7, 0xFF, 0x01, 0x00, 0x00, 0x00, - 0x0C, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00, 0x00, - 0x70, 0x01, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52, - 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65, - 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31, - 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x50, 0x4F, 0x53, 0x49, - 0x54, 0x49, 0x4F, 0x4E, 0x00, 0xAB, 0xAB, 0xAB, 0x4F, 0x53, 0x47, 0x4E, - 0x2C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x53, 0x56, 0x5F, 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x60, 0x00, 0x00, 0x00, 0x51, 0x00, 0x01, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x5F, 0x00, 0x00, 0x03, - 0x32, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x04, - 0xF2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, - 0xC2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x80, 0x3F, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.txt deleted file mode 100644 index 3037421c3..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.txt +++ /dev/null @@ -1,26 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// POSITION 0 xy 0 NONE float xy -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Position 0 xyzw 0 POS float xyzw -// -vs_5_1 -dcl_globalFlags refactoringAllowed -dcl_input v0.xy -dcl_output_siv o0.xyzw, position -mov o0.xy, v0.xyxx -mov o0.zw, l(0,0,0,1.000000) -ret -// Approximately 3 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso deleted file mode 100644 index ca4d5d837..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h deleted file mode 100644 index 83c1341cf..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h +++ /dev/null @@ -1,641 +0,0 @@ -// generated from `xb buildhlsl` -// source: primitive_point_list.gs.hlsl -const uint8_t primitive_point_list_gs[] = { - 0x44, 0x58, 0x42, 0x43, 0xDA, 0xEE, 0xAF, 0xCE, 0x4F, 0x67, 0x31, 0x3B, - 0x54, 0xC9, 0x28, 0xF2, 0x80, 0xF9, 0x4B, 0x5C, 0x01, 0x00, 0x00, 0x00, - 0xD8, 0x1D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x88, 0x0A, 0x00, 0x00, 0xE0, 0x0C, 0x00, 0x00, 0x64, 0x0F, 0x00, 0x00, - 0x3C, 0x1D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x4C, 0x0A, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x47, 0x00, 0x05, 0x00, 0x00, - 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, - 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, 0x72, 0x00, 0xAB, 0xAB, - 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x05, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 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0x2B, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt deleted file mode 100644 index 21fecd733..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt +++ /dev/null @@ -1,276 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer xe_system_cbuffer -// { -// -// uint xe_flags; // Offset: 0 Size: 4 [unused] -// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 [unused] -// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] -// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] -// int xe_vertex_base_index; // Offset: 20 Size: 4 [unused] -// float2 xe_point_size; // Offset: 24 Size: 8 -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float xyzw -// TEXCOORD 1 xyzw 1 NONE float xyzw -// TEXCOORD 2 xyzw 2 NONE float xyzw -// TEXCOORD 3 xyzw 3 NONE float xyzw -// TEXCOORD 4 xyzw 4 NONE float xyzw -// TEXCOORD 5 xyzw 5 NONE float xyzw -// TEXCOORD 6 xyzw 6 NONE float xyzw -// TEXCOORD 7 xyzw 7 NONE float xyzw -// TEXCOORD 8 xyzw 8 NONE float xyzw -// TEXCOORD 9 xyzw 9 NONE float xyzw -// TEXCOORD 10 xyzw 10 NONE float xyzw -// TEXCOORD 11 xyzw 11 NONE float xyzw -// TEXCOORD 12 xyzw 12 NONE float xyzw -// TEXCOORD 13 xyzw 13 NONE float xyzw -// TEXCOORD 14 xyzw 14 NONE float xyzw -// TEXCOORD 15 xyzw 15 NONE float xyzw -// TEXCOORD 16 xyz 16 NONE float z -// TEXCOORD 17 xy 17 NONE float xy -// SV_Position 0 xyzw 18 POS float xyzw -// SV_ClipDistance 0 xyzw 19 CLIPDST float xyzw -// SV_ClipDistance 1 xy 20 CLIPDST float xy -// SV_CullDistance 0 z 20 CULLDST float z -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float xyzw -// TEXCOORD 1 xyzw 1 NONE float xyzw -// TEXCOORD 2 xyzw 2 NONE float xyzw -// TEXCOORD 3 xyzw 3 NONE float xyzw -// TEXCOORD 4 xyzw 4 NONE float xyzw -// TEXCOORD 5 xyzw 5 NONE float xyzw -// TEXCOORD 6 xyzw 6 NONE float xyzw -// TEXCOORD 7 xyzw 7 NONE float xyzw -// TEXCOORD 8 xyzw 8 NONE float xyzw -// TEXCOORD 9 xyzw 9 NONE float xyzw -// TEXCOORD 10 xyzw 10 NONE float xyzw -// TEXCOORD 11 xyzw 11 NONE float xyzw -// TEXCOORD 12 xyzw 12 NONE float xyzw -// TEXCOORD 13 xyzw 13 NONE float xyzw -// TEXCOORD 14 xyzw 14 NONE float xyzw -// TEXCOORD 15 xyzw 15 NONE float xyzw -// TEXCOORD 16 xyz 16 NONE float xyz -// TEXCOORD 17 xy 17 NONE float xy -// SV_Position 0 xyzw 18 POS float xyzw -// SV_ClipDistance 0 xyzw 19 CLIPDST float xyzw -// SV_ClipDistance 1 xy 20 CLIPDST float xy -// -gs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_input v[1][0].xyzw -dcl_input v[1][1].xyzw -dcl_input v[1][2].xyzw -dcl_input v[1][3].xyzw -dcl_input v[1][4].xyzw -dcl_input v[1][5].xyzw -dcl_input v[1][6].xyzw -dcl_input v[1][7].xyzw -dcl_input v[1][8].xyzw -dcl_input v[1][9].xyzw -dcl_input v[1][10].xyzw -dcl_input v[1][11].xyzw -dcl_input v[1][12].xyzw -dcl_input v[1][13].xyzw -dcl_input v[1][14].xyzw -dcl_input v[1][15].xyzw -dcl_input v[1][16].xyz -dcl_input v[1][17].xy -dcl_input_siv v[1][18].xyzw, position -dcl_input v[1][19].xyzw -dcl_input v[1][20].xy -dcl_input v[1][20].z -dcl_temps 3 -dcl_inputprimitive point -dcl_stream m0 -dcl_outputtopology trianglestrip -dcl_output o0.xyzw -dcl_output o1.xyzw -dcl_output o2.xyzw -dcl_output o3.xyzw -dcl_output o4.xyzw -dcl_output o5.xyzw -dcl_output o6.xyzw -dcl_output o7.xyzw -dcl_output o8.xyzw -dcl_output o9.xyzw -dcl_output o10.xyzw -dcl_output o11.xyzw -dcl_output o12.xyzw -dcl_output o13.xyzw -dcl_output o14.xyzw -dcl_output o15.xyzw -dcl_output o16.xyz -dcl_output o17.xy -dcl_output_siv o18.xyzw, position -dcl_output_siv o19.xyzw, clip_distance -dcl_output_siv o20.xy, clip_distance -dcl_maxout 4 -lt [precise(x)] r0.x, v[0][20].z, l(0.000000) -ne [precise] r1.xyzw, v[0][18].xyzw, v[0][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -if_nz r0.x - ret -endif -lt [precise(x)] r0.x, l(0.000000), v[0][16].z -movc [precise(xy)] r0.xy, r0.xxxx, v[0][16].zzzz, CB0[0][1].zwzz -max [precise(xy)] r0.xy, r0.xyxx, CB0[0][2].xxxx -min [precise(xy)] r0.xy, r0.xyxx, CB0[0][2].yyyy -mul [precise(xy)] r0.xy, r0.xyxx, CB0[0][2].zwzz -mul [precise(xy)] r0.xy, r0.xyxx, v[0][18].wwww -mov [precise(xyz)] r1.xyz, -r0.xxyx -mov [precise(w)] r1.w, r0.y -add [precise] r2.xyzw, r1.xwyz, v[0][18].xyxy -mov o0.xyzw, v[0][0].xyzw -mov o1.xyzw, v[0][1].xyzw -mov o2.xyzw, v[0][2].xyzw -mov o3.xyzw, v[0][3].xyzw -mov o4.xyzw, v[0][4].xyzw -mov o5.xyzw, v[0][5].xyzw -mov o6.xyzw, v[0][6].xyzw -mov o7.xyzw, v[0][7].xyzw -mov o8.xyzw, v[0][8].xyzw -mov o9.xyzw, v[0][9].xyzw -mov o10.xyzw, v[0][10].xyzw -mov o11.xyzw, v[0][11].xyzw -mov o12.xyzw, v[0][12].xyzw -mov o13.xyzw, v[0][13].xyzw -mov o14.xyzw, v[0][14].xyzw -mov o15.xyzw, v[0][15].xyzw -mov o16.xy, l(0,0,0,0) -mov o16.z, v[0][16].z -mov o17.xy, v[0][17].xyxx -mov o18.xy, r2.xyxx -mov o18.zw, v[0][18].zzzw -mov o19.xyzw, v[0][19].xyzw -mov o20.xy, v[0][20].xyxx -emit_stream m0 -mov o0.xyzw, v[0][0].xyzw -mov o1.xyzw, v[0][1].xyzw -mov o2.xyzw, v[0][2].xyzw -mov o3.xyzw, v[0][3].xyzw -mov o4.xyzw, v[0][4].xyzw -mov o5.xyzw, v[0][5].xyzw -mov o6.xyzw, v[0][6].xyzw -mov o7.xyzw, v[0][7].xyzw -mov o8.xyzw, v[0][8].xyzw -mov o9.xyzw, v[0][9].xyzw -mov o10.xyzw, v[0][10].xyzw -mov o11.xyzw, v[0][11].xyzw -mov o12.xyzw, v[0][12].xyzw -mov o13.xyzw, v[0][13].xyzw -mov o14.xyzw, v[0][14].xyzw -mov o15.xyzw, v[0][15].xyzw -mov o16.xy, l(0,1.000000,0,0) -mov o16.z, v[0][16].z -mov o17.xy, v[0][17].xyxx -mov o18.xy, r2.zwzz -mov o18.zw, v[0][18].zzzw -mov o19.xyzw, v[0][19].xyzw -mov o20.xy, v[0][20].xyxx -emit_stream m0 -add [precise(yw)] r0.yw, r0.xxxy, v[0][18].xxxy -mov o0.xyzw, v[0][0].xyzw -mov o1.xyzw, v[0][1].xyzw -mov o2.xyzw, v[0][2].xyzw -mov o3.xyzw, v[0][3].xyzw -mov o4.xyzw, v[0][4].xyzw -mov o5.xyzw, v[0][5].xyzw -mov o6.xyzw, v[0][6].xyzw -mov o7.xyzw, v[0][7].xyzw -mov o8.xyzw, v[0][8].xyzw -mov o9.xyzw, v[0][9].xyzw -mov o10.xyzw, v[0][10].xyzw -mov o11.xyzw, v[0][11].xyzw -mov o12.xyzw, v[0][12].xyzw -mov o13.xyzw, v[0][13].xyzw -mov o14.xyzw, v[0][14].xyzw -mov o15.xyzw, v[0][15].xyzw -mov o16.xy, l(1.000000,0,0,0) -mov o16.z, v[0][16].z -mov o17.xy, v[0][17].xyxx -mov o18.xy, r0.ywyy -mov o18.zw, v[0][18].zzzw -mov o19.xyzw, v[0][19].xyzw -mov o20.xy, v[0][20].xyxx -emit_stream m0 -mov [precise(z)] r0.z, r1.z -add [precise(xy)] r0.xy, r0.xzxx, v[0][18].xyxx -mov o0.xyzw, v[0][0].xyzw -mov o1.xyzw, v[0][1].xyzw -mov o2.xyzw, v[0][2].xyzw -mov o3.xyzw, v[0][3].xyzw -mov o4.xyzw, v[0][4].xyzw -mov o5.xyzw, v[0][5].xyzw -mov o6.xyzw, v[0][6].xyzw -mov o7.xyzw, v[0][7].xyzw -mov o8.xyzw, v[0][8].xyzw -mov o9.xyzw, v[0][9].xyzw -mov o10.xyzw, v[0][10].xyzw -mov o11.xyzw, v[0][11].xyzw -mov o12.xyzw, v[0][12].xyzw -mov o13.xyzw, v[0][13].xyzw -mov o14.xyzw, v[0][14].xyzw -mov o15.xyzw, v[0][15].xyzw -mov o16.xy, l(1.000000,1.000000,0,0) -mov o16.z, v[0][16].z -mov o17.xy, v[0][17].xyxx -mov o18.xy, r0.xyxx -mov o18.zw, v[0][18].zzzw -mov o19.xyzw, v[0][19].xyzw -mov o20.xy, v[0][20].xyxx -emit_stream m0 -cut_stream m0 -ret -// Approximately 118 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.cso deleted file mode 100644 index 9bb7d3cb9..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.h b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.h deleted file mode 100644 index 14e27e6d2..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_quad_list_gs.h +++ /dev/null @@ -1,416 +0,0 @@ -// generated from `xb buildhlsl` -// source: primitive_quad_list.gs.hlsl -const uint8_t primitive_quad_list_gs[] = { - 0x44, 0x58, 0x42, 0x43, 0xB9, 0x08, 0x47, 0x01, 0xBF, 0xBC, 0x0E, 0x49, - 0x29, 0xE1, 0x81, 0xD8, 0x7C, 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TEXCOORD 2 xyzw 2 NONE float xyzw -// TEXCOORD 3 xyzw 3 NONE float xyzw -// TEXCOORD 4 xyzw 4 NONE float xyzw -// TEXCOORD 5 xyzw 5 NONE float xyzw -// TEXCOORD 6 xyzw 6 NONE float xyzw -// TEXCOORD 7 xyzw 7 NONE float xyzw -// TEXCOORD 8 xyzw 8 NONE float xyzw -// TEXCOORD 9 xyzw 9 NONE float xyzw -// TEXCOORD 10 xyzw 10 NONE float xyzw -// TEXCOORD 11 xyzw 11 NONE float xyzw -// TEXCOORD 12 xyzw 12 NONE float xyzw -// TEXCOORD 13 xyzw 13 NONE float xyzw -// TEXCOORD 14 xyzw 14 NONE float xyzw -// TEXCOORD 15 xyzw 15 NONE float xyzw -// TEXCOORD 16 xyz 16 NONE float xyz -// TEXCOORD 17 xy 17 NONE float xy -// SV_Position 0 xyzw 18 POS float xyzw -// SV_ClipDistance 0 xyzw 19 CLIPDST float xyzw -// SV_ClipDistance 1 xy 20 CLIPDST float xy -// SV_CullDistance 0 z 20 CULLDST float z -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float xyzw -// TEXCOORD 1 xyzw 1 NONE float xyzw -// TEXCOORD 2 xyzw 2 NONE float xyzw -// TEXCOORD 3 xyzw 3 NONE float xyzw -// TEXCOORD 4 xyzw 4 NONE float xyzw -// TEXCOORD 5 xyzw 5 NONE float xyzw -// TEXCOORD 6 xyzw 6 NONE float xyzw -// TEXCOORD 7 xyzw 7 NONE float xyzw -// TEXCOORD 8 xyzw 8 NONE float xyzw -// TEXCOORD 9 xyzw 9 NONE float xyzw -// TEXCOORD 10 xyzw 10 NONE float xyzw -// TEXCOORD 11 xyzw 11 NONE float xyzw -// TEXCOORD 12 xyzw 12 NONE float xyzw -// TEXCOORD 13 xyzw 13 NONE float xyzw -// TEXCOORD 14 xyzw 14 NONE float xyzw -// TEXCOORD 15 xyzw 15 NONE float xyzw -// TEXCOORD 16 xyz 16 NONE float xyz -// TEXCOORD 17 xy 17 NONE float xy -// SV_Position 0 xyzw 18 POS float xyzw -// SV_ClipDistance 0 xyzw 19 CLIPDST float xyzw -// SV_ClipDistance 1 xy 20 CLIPDST float xy -// -gs_5_1 -dcl_globalFlags refactoringAllowed -dcl_input v[4][0].xyzw -dcl_input v[4][1].xyzw -dcl_input v[4][2].xyzw -dcl_input v[4][3].xyzw -dcl_input v[4][4].xyzw -dcl_input v[4][5].xyzw -dcl_input v[4][6].xyzw -dcl_input v[4][7].xyzw -dcl_input v[4][8].xyzw -dcl_input v[4][9].xyzw -dcl_input v[4][10].xyzw -dcl_input v[4][11].xyzw -dcl_input v[4][12].xyzw -dcl_input v[4][13].xyzw -dcl_input v[4][14].xyzw -dcl_input v[4][15].xyzw -dcl_input v[4][16].xyz -dcl_input v[4][17].xy -dcl_input_siv v[4][18].xyzw, position -dcl_input v[4][19].xyzw -dcl_input v[4][20].xy -dcl_input v[4][20].z -dcl_temps 2 -dcl_inputprimitive lineadj -dcl_stream m0 -dcl_outputtopology trianglestrip -dcl_output o0.xyzw -dcl_output o1.xyzw -dcl_output o2.xyzw -dcl_output o3.xyzw -dcl_output o4.xyzw -dcl_output o5.xyzw -dcl_output o6.xyzw -dcl_output o7.xyzw -dcl_output o8.xyzw -dcl_output o9.xyzw -dcl_output o10.xyzw -dcl_output o11.xyzw -dcl_output o12.xyzw -dcl_output o13.xyzw -dcl_output o14.xyzw -dcl_output o15.xyzw -dcl_output o16.xyz -dcl_output o17.xy -dcl_output_siv o18.xyzw, position -dcl_output_siv o19.xyzw, clip_distance -dcl_output_siv o20.xy, clip_distance -dcl_maxout 4 -max [precise(x)] r0.x, v[1][20].z, v[0][20].z -max [precise(y)] r0.y, v[3][20].z, v[2][20].z -max [precise(x)] r0.x, r0.y, r0.x -lt [precise(x)] r0.x, r0.x, l(0.000000) -ne [precise] r1.xyzw, v[0][18].xyzw, v[0][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -ne [precise] r1.xyzw, v[1][18].xyzw, v[1][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -ne [precise] r1.xyzw, v[2][18].xyzw, v[2][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -ne [precise] r1.xyzw, v[3][18].xyzw, v[3][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -if_nz r0.x - ret -endif -mov o0.xyzw, v[0][0].xyzw -mov o1.xyzw, v[0][1].xyzw -mov o2.xyzw, v[0][2].xyzw -mov o3.xyzw, v[0][3].xyzw -mov o4.xyzw, v[0][4].xyzw -mov o5.xyzw, v[0][5].xyzw -mov o6.xyzw, v[0][6].xyzw -mov o7.xyzw, v[0][7].xyzw -mov o8.xyzw, v[0][8].xyzw -mov o9.xyzw, v[0][9].xyzw -mov o10.xyzw, v[0][10].xyzw -mov o11.xyzw, v[0][11].xyzw -mov o12.xyzw, v[0][12].xyzw -mov o13.xyzw, v[0][13].xyzw -mov o14.xyzw, v[0][14].xyzw -mov o15.xyzw, v[0][15].xyzw -mov o16.xyz, v[0][16].xyzx -mov o17.xy, v[0][17].xyxx -mov o18.xyzw, v[0][18].xyzw -mov o19.xyzw, v[0][19].xyzw -mov o20.xy, v[0][20].xyxx -emit_stream m0 -mov o0.xyzw, v[1][0].xyzw -mov o1.xyzw, v[1][1].xyzw -mov o2.xyzw, v[1][2].xyzw -mov o3.xyzw, v[1][3].xyzw -mov o4.xyzw, v[1][4].xyzw -mov o5.xyzw, v[1][5].xyzw -mov o6.xyzw, v[1][6].xyzw -mov o7.xyzw, v[1][7].xyzw -mov o8.xyzw, v[1][8].xyzw -mov o9.xyzw, v[1][9].xyzw -mov o10.xyzw, v[1][10].xyzw -mov o11.xyzw, v[1][11].xyzw -mov o12.xyzw, v[1][12].xyzw -mov o13.xyzw, v[1][13].xyzw -mov o14.xyzw, v[1][14].xyzw -mov o15.xyzw, v[1][15].xyzw -mov o16.xyz, v[1][16].xyzx -mov o17.xy, v[1][17].xyxx -mov o18.xyzw, v[1][18].xyzw -mov o19.xyzw, v[1][19].xyzw -mov o20.xy, v[1][20].xyxx -emit_stream m0 -mov o0.xyzw, v[3][0].xyzw -mov o1.xyzw, v[3][1].xyzw -mov o2.xyzw, v[3][2].xyzw -mov o3.xyzw, v[3][3].xyzw -mov o4.xyzw, v[3][4].xyzw -mov o5.xyzw, v[3][5].xyzw -mov o6.xyzw, v[3][6].xyzw -mov o7.xyzw, v[3][7].xyzw -mov o8.xyzw, v[3][8].xyzw -mov o9.xyzw, v[3][9].xyzw -mov o10.xyzw, v[3][10].xyzw -mov o11.xyzw, v[3][11].xyzw -mov o12.xyzw, v[3][12].xyzw -mov o13.xyzw, v[3][13].xyzw -mov o14.xyzw, v[3][14].xyzw -mov o15.xyzw, v[3][15].xyzw -mov o16.xyz, v[3][16].xyzx -mov o17.xy, v[3][17].xyxx -mov o18.xyzw, v[3][18].xyzw -mov o19.xyzw, v[3][19].xyzw -mov o20.xy, v[3][20].xyxx -emit_stream m0 -mov o0.xyzw, v[2][0].xyzw -mov o1.xyzw, v[2][1].xyzw -mov o2.xyzw, v[2][2].xyzw -mov o3.xyzw, v[2][3].xyzw -mov o4.xyzw, v[2][4].xyzw -mov o5.xyzw, v[2][5].xyzw -mov o6.xyzw, v[2][6].xyzw -mov o7.xyzw, v[2][7].xyzw -mov o8.xyzw, v[2][8].xyzw -mov o9.xyzw, v[2][9].xyzw -mov o10.xyzw, v[2][10].xyzw -mov o11.xyzw, v[2][11].xyzw -mov o12.xyzw, v[2][12].xyzw -mov o13.xyzw, v[2][13].xyzw -mov o14.xyzw, v[2][14].xyzw -mov o15.xyzw, v[2][15].xyzw -mov o16.xyz, v[2][16].xyzx -mov o17.xy, v[2][17].xyxx -mov o18.xyzw, v[2][18].xyzw -mov o19.xyzw, v[2][19].xyzw -mov o20.xy, v[2][20].xyxx -emit_stream m0 -cut_stream m0 -ret -// Approximately 113 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.cso deleted file mode 100644 index cdbd636d1..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.h b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.h deleted file mode 100644 index 44ee8ea33..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.h +++ /dev/null @@ -1,899 +0,0 @@ -// generated from `xb buildhlsl` -// source: primitive_rectangle_list.gs.hlsl -const uint8_t primitive_rectangle_list_gs[] = { - 0x44, 0x58, 0x42, 0x43, 0x7F, 0x6E, 0x72, 0xAD, 0xB7, 0x12, 0x6A, 0xEF, - 0xF8, 0x9C, 0x1E, 0xB8, 0x48, 0xE4, 0xAF, 0xF6, 0x01, 0x00, 0x00, 0x00, - 0xF0, 0x29, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0xF8, 0x02, 0x00, 0x00, 0x7C, 0x05, 0x00, 0x00, - 0x54, 0x29, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x47, 0x00, 0x05, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52, - 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65, - 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31, - 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x50, 0x02, 0x00, 0x00, - 0x16, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x18, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.txt deleted file mode 100644 index a00b81246..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.txt +++ /dev/null @@ -1,438 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float xyzw -// TEXCOORD 1 xyzw 1 NONE float xyzw -// TEXCOORD 2 xyzw 2 NONE float xyzw -// TEXCOORD 3 xyzw 3 NONE float xyzw -// TEXCOORD 4 xyzw 4 NONE float xyzw -// TEXCOORD 5 xyzw 5 NONE float xyzw -// TEXCOORD 6 xyzw 6 NONE float xyzw -// TEXCOORD 7 xyzw 7 NONE float xyzw -// TEXCOORD 8 xyzw 8 NONE float xyzw -// TEXCOORD 9 xyzw 9 NONE float xyzw -// TEXCOORD 10 xyzw 10 NONE float xyzw -// TEXCOORD 11 xyzw 11 NONE float xyzw -// TEXCOORD 12 xyzw 12 NONE float xyzw -// TEXCOORD 13 xyzw 13 NONE float xyzw -// TEXCOORD 14 xyzw 14 NONE float xyzw -// TEXCOORD 15 xyzw 15 NONE float xyzw -// TEXCOORD 16 xyz 16 NONE float xyz -// TEXCOORD 17 xy 17 NONE float xy -// SV_Position 0 xyzw 18 POS float xyzw -// SV_ClipDistance 0 xyzw 19 CLIPDST float xyzw -// SV_ClipDistance 1 xy 20 CLIPDST float xy -// SV_CullDistance 0 z 20 CULLDST float z -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xyzw 0 NONE float xyzw -// TEXCOORD 1 xyzw 1 NONE float xyzw -// TEXCOORD 2 xyzw 2 NONE float xyzw -// TEXCOORD 3 xyzw 3 NONE float xyzw -// TEXCOORD 4 xyzw 4 NONE float xyzw -// TEXCOORD 5 xyzw 5 NONE float xyzw -// TEXCOORD 6 xyzw 6 NONE float xyzw -// TEXCOORD 7 xyzw 7 NONE float xyzw -// TEXCOORD 8 xyzw 8 NONE float xyzw -// TEXCOORD 9 xyzw 9 NONE float xyzw -// TEXCOORD 10 xyzw 10 NONE float xyzw -// TEXCOORD 11 xyzw 11 NONE float xyzw -// TEXCOORD 12 xyzw 12 NONE float xyzw -// TEXCOORD 13 xyzw 13 NONE float xyzw -// TEXCOORD 14 xyzw 14 NONE float xyzw -// TEXCOORD 15 xyzw 15 NONE float xyzw -// TEXCOORD 16 xyz 16 NONE float xyz -// TEXCOORD 17 xy 17 NONE float xy -// SV_Position 0 xyzw 18 POS float xyzw -// SV_ClipDistance 0 xyzw 19 CLIPDST float xyzw -// SV_ClipDistance 1 xy 20 CLIPDST float xy -// -gs_5_1 -dcl_globalFlags refactoringAllowed -dcl_input v[3][0].xyzw -dcl_input v[3][1].xyzw -dcl_input v[3][2].xyzw -dcl_input v[3][3].xyzw -dcl_input v[3][4].xyzw -dcl_input v[3][5].xyzw -dcl_input v[3][6].xyzw -dcl_input v[3][7].xyzw -dcl_input v[3][8].xyzw -dcl_input v[3][9].xyzw -dcl_input v[3][10].xyzw -dcl_input v[3][11].xyzw -dcl_input v[3][12].xyzw -dcl_input v[3][13].xyzw -dcl_input v[3][14].xyzw -dcl_input v[3][15].xyzw -dcl_input v[3][16].xyz -dcl_input v[3][17].xy -dcl_input_siv v[3][18].xyzw, position -dcl_input v[3][19].xyzw -dcl_input v[3][20].xy -dcl_input v[3][20].z -dcl_temps 21 -dcl_inputprimitive triangle -dcl_stream m0 -dcl_outputtopology trianglestrip -dcl_output o0.xyzw -dcl_output o1.xyzw -dcl_output o2.xyzw -dcl_output o3.xyzw -dcl_output o4.xyzw -dcl_output o5.xyzw -dcl_output o6.xyzw -dcl_output o7.xyzw -dcl_output o8.xyzw -dcl_output o9.xyzw -dcl_output o10.xyzw -dcl_output o11.xyzw -dcl_output o12.xyzw -dcl_output o13.xyzw -dcl_output o14.xyzw -dcl_output o15.xyzw -dcl_output o16.xyz -dcl_output o17.xy -dcl_output_siv o18.xyzw, position -dcl_output_siv o19.xyzw, clip_distance -dcl_output_siv o20.xy, clip_distance -dcl_maxout 6 -max [precise(x)] r0.x, v[1][20].z, v[0][20].z -max [precise(x)] r0.x, r0.x, v[2][20].z -lt [precise(x)] r0.x, r0.x, l(0.000000) -ne [precise] r1.xyzw, v[0][18].xyzw, v[0][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -ne [precise] r1.xyzw, v[1][18].xyzw, v[1][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -ne [precise] r1.xyzw, v[2][18].xyzw, v[2][18].xyzw -or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx -or [precise(y)] r0.y, r0.z, r0.y -or [precise(x)] r0.x, r0.y, r0.x -if_nz r0.x - ret -endif -mov o0.xyzw, v[0][0].xyzw -mov o1.xyzw, v[0][1].xyzw -mov o2.xyzw, v[0][2].xyzw -mov o3.xyzw, v[0][3].xyzw -mov o4.xyzw, v[0][4].xyzw -mov o5.xyzw, v[0][5].xyzw -mov o6.xyzw, v[0][6].xyzw -mov o7.xyzw, v[0][7].xyzw -mov o8.xyzw, v[0][8].xyzw -mov o9.xyzw, v[0][9].xyzw -mov o10.xyzw, v[0][10].xyzw -mov o11.xyzw, v[0][11].xyzw -mov o12.xyzw, v[0][12].xyzw -mov o13.xyzw, v[0][13].xyzw -mov o14.xyzw, v[0][14].xyzw -mov o15.xyzw, v[0][15].xyzw -mov o16.xyz, v[0][16].xyzx -mov o17.xy, v[0][17].xyxx -mov o18.xyzw, v[0][18].xyzw -mov o19.xyzw, v[0][19].xyzw -mov o20.xy, v[0][20].xyxx -emit_stream m0 -mov o0.xyzw, v[1][0].xyzw -mov o1.xyzw, v[1][1].xyzw -mov o2.xyzw, v[1][2].xyzw -mov o3.xyzw, v[1][3].xyzw -mov o4.xyzw, v[1][4].xyzw -mov o5.xyzw, v[1][5].xyzw -mov o6.xyzw, v[1][6].xyzw -mov o7.xyzw, v[1][7].xyzw -mov o8.xyzw, v[1][8].xyzw -mov o9.xyzw, v[1][9].xyzw -mov o10.xyzw, v[1][10].xyzw -mov o11.xyzw, v[1][11].xyzw -mov o12.xyzw, v[1][12].xyzw -mov o13.xyzw, v[1][13].xyzw -mov o14.xyzw, v[1][14].xyzw -mov o15.xyzw, v[1][15].xyzw -mov o16.xyz, v[1][16].xyzx -mov o17.xy, v[1][17].xyxx -mov o18.xyzw, v[1][18].xyzw -mov o19.xyzw, v[1][19].xyzw -mov o20.xy, v[1][20].xyxx -emit_stream m0 -mov o0.xyzw, v[2][0].xyzw -mov o1.xyzw, v[2][1].xyzw -mov o2.xyzw, v[2][2].xyzw -mov o3.xyzw, v[2][3].xyzw -mov o4.xyzw, v[2][4].xyzw -mov o5.xyzw, v[2][5].xyzw -mov o6.xyzw, v[2][6].xyzw -mov o7.xyzw, v[2][7].xyzw -mov o8.xyzw, v[2][8].xyzw -mov o9.xyzw, v[2][9].xyzw -mov o10.xyzw, v[2][10].xyzw -mov o11.xyzw, v[2][11].xyzw -mov o12.xyzw, v[2][12].xyzw -mov o13.xyzw, v[2][13].xyzw -mov o14.xyzw, v[2][14].xyzw -mov o15.xyzw, v[2][15].xyzw -mov o16.xyz, v[2][16].xyzx -mov o17.xy, v[2][17].xyxx -mov o18.xyzw, v[2][18].xyzw -mov o19.xyzw, v[2][19].xyzw -mov o20.xy, v[2][20].xyxx -emit_stream m0 -cut_stream m0 -add [precise(xyz)] r0.xyz, -v[0][18].xyzx, v[1][18].xyzx -add [precise(xyz)] r1.xyz, -v[0][18].xyzx, v[2][18].xyzx -add [precise(xyz)] r2.xyz, -v[1][18].xyzx, v[2][18].xyzx -dp3 [precise(x)] r0.x, r0.xyzx, r0.xyzx -dp3 [precise(y)] r0.y, r1.xyzx, r1.xyzx -dp3 [precise(z)] r0.z, r2.xyzx, r2.xyzx -lt [precise(w)] r0.w, r0.x, r0.z -lt [precise(x)] r1.x, r0.y, r0.z -and [precise(w)] r0.w, r0.w, r1.x -if_nz r0.w - mov o0.xyzw, v[2][0].xyzw - mov o1.xyzw, v[2][1].xyzw - mov o2.xyzw, v[2][2].xyzw - mov o3.xyzw, v[2][3].xyzw - mov o4.xyzw, v[2][4].xyzw - mov o5.xyzw, v[2][5].xyzw - mov o6.xyzw, v[2][6].xyzw - mov o7.xyzw, v[2][7].xyzw - mov o8.xyzw, v[2][8].xyzw - mov o9.xyzw, v[2][9].xyzw - mov o10.xyzw, v[2][10].xyzw - mov o11.xyzw, v[2][11].xyzw - mov o12.xyzw, v[2][12].xyzw - mov o13.xyzw, v[2][13].xyzw - mov o14.xyzw, v[2][14].xyzw - mov o15.xyzw, v[2][15].xyzw - mov o16.xyz, v[2][16].xyzx - mov o17.xy, v[2][17].xyxx - mov o18.xyzw, v[2][18].xyzw - mov o19.xyzw, v[2][19].xyzw - mov o20.xy, v[2][20].xyxx - emit_stream m0 - mov o0.xyzw, v[1][0].xyzw - mov o1.xyzw, v[1][1].xyzw - mov o2.xyzw, v[1][2].xyzw - mov o3.xyzw, v[1][3].xyzw - mov o4.xyzw, v[1][4].xyzw - mov o5.xyzw, v[1][5].xyzw - mov o6.xyzw, v[1][6].xyzw - mov o7.xyzw, v[1][7].xyzw - mov o8.xyzw, v[1][8].xyzw - mov o9.xyzw, v[1][9].xyzw - mov o10.xyzw, v[1][10].xyzw - mov o11.xyzw, v[1][11].xyzw - mov o12.xyzw, v[1][12].xyzw - mov o13.xyzw, v[1][13].xyzw - mov o14.xyzw, v[1][14].xyzw - mov o15.xyzw, v[1][15].xyzw - mov o16.xyz, v[1][16].xyzx - mov o17.xy, v[1][17].xyxx - mov o18.xyzw, v[1][18].xyzw - mov o19.xyzw, v[1][19].xyzw - mov o20.xy, v[1][20].xyxx - emit_stream m0 - mov [precise(xyz)] r0.xyz, l(1.000000,1.000000,-1.000000,0) -else - lt [precise(x)] r0.x, r0.x, r0.y - lt [precise(y)] r0.y, r0.z, r0.y - and [precise(x)] r0.x, r0.y, r0.x - if_nz r0.x - mov o0.xyzw, v[0][0].xyzw - mov o1.xyzw, v[0][1].xyzw - mov o2.xyzw, v[0][2].xyzw - mov o3.xyzw, v[0][3].xyzw - mov o4.xyzw, v[0][4].xyzw - mov o5.xyzw, v[0][5].xyzw - mov o6.xyzw, v[0][6].xyzw - mov o7.xyzw, v[0][7].xyzw - mov o8.xyzw, v[0][8].xyzw - mov o9.xyzw, v[0][9].xyzw - mov o10.xyzw, v[0][10].xyzw - mov o11.xyzw, v[0][11].xyzw - mov o12.xyzw, v[0][12].xyzw - mov o13.xyzw, v[0][13].xyzw - mov o14.xyzw, v[0][14].xyzw - mov o15.xyzw, v[0][15].xyzw - mov o16.xyz, v[0][16].xyzx - mov o17.xy, v[0][17].xyxx - mov o18.xyzw, v[0][18].xyzw - mov o19.xyzw, v[0][19].xyzw - mov o20.xy, v[0][20].xyxx - emit_stream m0 - mov o0.xyzw, v[2][0].xyzw - mov o1.xyzw, v[2][1].xyzw - mov o2.xyzw, v[2][2].xyzw - mov o3.xyzw, v[2][3].xyzw - mov o4.xyzw, v[2][4].xyzw - mov o5.xyzw, v[2][5].xyzw - mov o6.xyzw, v[2][6].xyzw - mov o7.xyzw, v[2][7].xyzw - mov o8.xyzw, v[2][8].xyzw - mov o9.xyzw, v[2][9].xyzw - mov o10.xyzw, v[2][10].xyzw - mov o11.xyzw, v[2][11].xyzw - mov o12.xyzw, v[2][12].xyzw - mov o13.xyzw, v[2][13].xyzw - mov o14.xyzw, v[2][14].xyzw - mov o15.xyzw, v[2][15].xyzw - mov o16.xyz, v[2][16].xyzx - mov o17.xy, v[2][17].xyxx - mov o18.xyzw, v[2][18].xyzw - mov o19.xyzw, v[2][19].xyzw - mov o20.xy, v[2][20].xyxx - emit_stream m0 - mov [precise(xy)] r0.xy, l(-1.000000,1.000000,0,0) - else - mov o0.xyzw, v[1][0].xyzw - mov o1.xyzw, v[1][1].xyzw - mov o2.xyzw, v[1][2].xyzw - mov o3.xyzw, v[1][3].xyzw - mov o4.xyzw, v[1][4].xyzw - mov o5.xyzw, v[1][5].xyzw - mov o6.xyzw, v[1][6].xyzw - mov o7.xyzw, v[1][7].xyzw - mov o8.xyzw, v[1][8].xyzw - mov o9.xyzw, v[1][9].xyzw - mov o10.xyzw, v[1][10].xyzw - mov o11.xyzw, v[1][11].xyzw - mov o12.xyzw, v[1][12].xyzw - mov o13.xyzw, v[1][13].xyzw - mov o14.xyzw, v[1][14].xyzw - mov o15.xyzw, v[1][15].xyzw - mov o16.xyz, v[1][16].xyzx - mov o17.xy, v[1][17].xyxx - mov o18.xyzw, v[1][18].xyzw - mov o19.xyzw, v[1][19].xyzw - mov o20.xy, v[1][20].xyxx - emit_stream m0 - mov o0.xyzw, v[0][0].xyzw - mov o1.xyzw, v[0][1].xyzw - mov o2.xyzw, v[0][2].xyzw - mov o3.xyzw, v[0][3].xyzw - mov o4.xyzw, v[0][4].xyzw - mov o5.xyzw, v[0][5].xyzw - mov o6.xyzw, v[0][6].xyzw - mov o7.xyzw, v[0][7].xyzw - mov o8.xyzw, v[0][8].xyzw - mov o9.xyzw, v[0][9].xyzw - mov o10.xyzw, v[0][10].xyzw - mov o11.xyzw, v[0][11].xyzw - mov o12.xyzw, v[0][12].xyzw - mov o13.xyzw, v[0][13].xyzw - mov o14.xyzw, v[0][14].xyzw - mov o15.xyzw, v[0][15].xyzw - mov o16.xyz, v[0][16].xyzx - mov o17.xy, v[0][17].xyxx - mov o18.xyzw, v[0][18].xyzw - mov o19.xyzw, v[0][19].xyzw - mov o20.xy, v[0][20].xyxx - emit_stream m0 - mov [precise(xy)] r0.xy, l(1.000000,-1.000000,0,0) - endif - mov [precise(z)] r0.z, l(1.000000) -endif -mul r1.xyzw, r0.xxxx, v[1][0].xyzw -mad r1.xyzw, r0.zzzz, v[0][0].xyzw, r1.xyzw -mad r1.xyzw, r0.yyyy, v[2][0].xyzw, r1.xyzw -mul r2.xyzw, r0.xxxx, v[1][1].xyzw -mad r2.xyzw, r0.zzzz, v[0][1].xyzw, r2.xyzw -mad r2.xyzw, r0.yyyy, v[2][1].xyzw, r2.xyzw -mul r3.xyzw, r0.xxxx, v[1][2].xyzw -mad r3.xyzw, r0.zzzz, v[0][2].xyzw, r3.xyzw -mad r3.xyzw, r0.yyyy, v[2][2].xyzw, r3.xyzw -mul r4.xyzw, r0.xxxx, v[1][3].xyzw -mad r4.xyzw, r0.zzzz, v[0][3].xyzw, r4.xyzw -mad r4.xyzw, r0.yyyy, v[2][3].xyzw, r4.xyzw -mul r5.xyzw, r0.xxxx, v[1][4].xyzw -mad r5.xyzw, r0.zzzz, v[0][4].xyzw, r5.xyzw -mad r5.xyzw, r0.yyyy, v[2][4].xyzw, r5.xyzw -mul r6.xyzw, r0.xxxx, v[1][5].xyzw -mad r6.xyzw, r0.zzzz, v[0][5].xyzw, r6.xyzw -mad r6.xyzw, r0.yyyy, v[2][5].xyzw, r6.xyzw -mul r7.xyzw, r0.xxxx, v[1][6].xyzw -mad r7.xyzw, r0.zzzz, v[0][6].xyzw, r7.xyzw -mad r7.xyzw, r0.yyyy, v[2][6].xyzw, r7.xyzw -mul r8.xyzw, r0.xxxx, v[1][7].xyzw -mad r8.xyzw, r0.zzzz, v[0][7].xyzw, r8.xyzw -mad r8.xyzw, r0.yyyy, v[2][7].xyzw, r8.xyzw -mul r9.xyzw, r0.xxxx, v[1][8].xyzw -mad r9.xyzw, r0.zzzz, v[0][8].xyzw, r9.xyzw -mad r9.xyzw, r0.yyyy, v[2][8].xyzw, r9.xyzw -mul r10.xyzw, r0.xxxx, v[1][9].xyzw -mad r10.xyzw, r0.zzzz, v[0][9].xyzw, r10.xyzw -mad r10.xyzw, r0.yyyy, v[2][9].xyzw, r10.xyzw -mul r11.xyzw, r0.xxxx, v[1][10].xyzw -mad r11.xyzw, r0.zzzz, v[0][10].xyzw, r11.xyzw -mad r11.xyzw, r0.yyyy, v[2][10].xyzw, r11.xyzw -mul r12.xyzw, r0.xxxx, v[1][11].xyzw -mad r12.xyzw, r0.zzzz, v[0][11].xyzw, r12.xyzw -mad r12.xyzw, r0.yyyy, v[2][11].xyzw, r12.xyzw -mul r13.xyzw, r0.xxxx, v[1][12].xyzw -mad r13.xyzw, r0.zzzz, v[0][12].xyzw, r13.xyzw -mad r13.xyzw, r0.yyyy, v[2][12].xyzw, r13.xyzw -mul r14.xyzw, r0.xxxx, v[1][13].xyzw -mad r14.xyzw, r0.zzzz, v[0][13].xyzw, r14.xyzw -mad r14.xyzw, r0.yyyy, v[2][13].xyzw, r14.xyzw -mul r15.xyzw, r0.xxxx, v[1][14].xyzw -mad r15.xyzw, r0.zzzz, v[0][14].xyzw, r15.xyzw -mad r15.xyzw, r0.yyyy, v[2][14].xyzw, r15.xyzw -mul r16.xyzw, r0.xxxx, v[1][15].xyzw -mad r16.xyzw, r0.zzzz, v[0][15].xyzw, r16.xyzw -mad r16.xyzw, r0.yyyy, v[2][15].xyzw, r16.xyzw -mul r17.xyz, r0.xxxx, v[1][16].xyzx -mad r17.xyz, r0.zzzz, v[0][16].xyzx, r17.xyzx -mad r17.xyz, r0.yyyy, v[2][16].xyzx, r17.xyzx -mul r18.xy, r0.xxxx, v[1][17].xyxx -mad r18.xy, r0.zzzz, v[0][17].xyxx, r18.xyxx -mad r18.xy, r0.yyyy, v[2][17].xyxx, r18.xyxx -mul [precise] r19.xyzw, r0.zzzz, v[0][18].xyzw -mul [precise] r20.xyzw, r0.xxxx, v[1][18].xyzw -add [precise] r19.xyzw, r19.xyzw, r20.xyzw -mul [precise] r20.xyzw, r0.yyyy, v[2][18].xyzw -add [precise] r19.xyzw, r19.xyzw, r20.xyzw -mul r20.xyzw, r0.xxxx, v[1][19].xyzw -mad r20.xyzw, r0.zzzz, v[0][19].xyzw, r20.xyzw -mad r20.xyzw, r0.yyyy, v[2][19].xyzw, r20.xyzw -mul r0.xw, r0.xxxx, v[1][20].xxxy -mad r0.xz, r0.zzzz, v[0][20].xxyx, r0.xxwx -mad r0.xy, r0.yyyy, v[2][20].xyxx, r0.xzxx -mov o0.xyzw, r1.xyzw -mov o1.xyzw, r2.xyzw -mov o2.xyzw, r3.xyzw -mov o3.xyzw, r4.xyzw -mov o4.xyzw, r5.xyzw -mov o5.xyzw, r6.xyzw -mov o6.xyzw, r7.xyzw -mov o7.xyzw, r8.xyzw -mov o8.xyzw, r9.xyzw -mov o9.xyzw, r10.xyzw -mov o10.xyzw, r11.xyzw -mov o11.xyzw, r12.xyzw -mov o12.xyzw, r13.xyzw -mov o13.xyzw, r14.xyzw -mov o14.xyzw, r15.xyzw -mov o15.xyzw, r16.xyzw -mov o16.xyz, r17.xyzx -mov o17.xy, r18.xyxx -mov o18.xyzw, r19.xyzw -mov o19.xyzw, r20.xyzw -mov o20.xy, r0.xyxx -emit_stream m0 -cut_stream m0 -ret -// Approximately 328 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.cso deleted file mode 100644 index fd2517300..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h deleted file mode 100644 index 6f0de93dd..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h +++ /dev/null @@ -1,186 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_clear_32bpp_2xres.cs.hlsl -const uint8_t resolve_clear_32bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x7C, 0xBD, 0xCB, 0x69, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt deleted file mode 100644 index d3b04ecc8..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt +++ /dev/null @@ -1,83 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 -// uint xe_resolve_edram_info; // Offset: 8 Size: 4 -// uint xe_resolve_address_info; // Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 3 -dcl_thread_group 8, 8, 1 -ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz -uge r0.xz, r0.xxxx, l(2, 0, 1, 0) -and r0.w, r0.x, l(1) -ishl r0.y, r0.y, r0.w -uge r0.y, vThreadID.x, r0.y -if_nz r0.y - ret -endif -ishl r1.x, vThreadID.x, l(3) -ushr r2.y, CB0[0][0].w, l(5) -movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) -mov r2.x, CB0[0][0].w -bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) -mov r1.y, vThreadID.y -iadd r0.xy, r0.xyxx, r1.xyxx -ubfe r0.z, l(12), l(13), CB0[0][0].z -and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) -udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) -imad r0.w, r1.w, r1.x, r1.z -iadd r0.z, r0.w, r0.z -imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx -if_nz r1.y - uge r0.w, r0.x, l(40) - movc r0.w, r0.w, l(-40), l(40) - iadd r0.x, r0.w, r0.x -endif -imad r0.x, r0.y, l(80), r0.x -imad r0.x, r0.z, l(1280), r0.x -store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx -iadd r0.yzw, r0.xxxx, l(0, 1, 3, 7) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx -iadd r1.xyzw, r0.xxxx, l(2, 4, 5, 6) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r0.wwww, CB0[0][0].xxxx -ret -// Approximately 39 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.cso deleted file mode 100644 index 5987ca312..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h deleted file mode 100644 index 34d1e4144..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h +++ /dev/null @@ -1,233 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_clear_32bpp_3xres.cs.hlsl -const uint8_t resolve_clear_32bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x85, 0x58, 0x1C, 0x7C, 0x6F, 0xCB, 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0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0F, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.txt deleted file mode 100644 index d850ff911..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.txt +++ /dev/null @@ -1,98 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 -// uint xe_resolve_edram_info; // Offset: 8 Size: 4 -// uint xe_resolve_address_info; // Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 3 -dcl_thread_group 8, 8, 1 -ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz -uge r0.xz, r0.xxxx, l(2, 0, 1, 0) -and r0.w, r0.x, l(1) -ishl r0.y, r0.y, r0.w -uge r0.y, vThreadID.x, r0.y -if_nz r0.y - ret -endif -ishl r1.x, vThreadID.x, l(3) -ushr r2.y, CB0[0][0].w, l(5) -movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) -mov r2.x, CB0[0][0].w -bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) -mov r1.y, vThreadID.y -iadd r0.xy, r0.xyxx, r1.xyxx -ubfe r0.z, l(12), l(13), CB0[0][0].z -and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) -udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) -imad r0.w, r1.w, r1.x, r1.z -iadd r0.z, r0.w, r0.z -imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx -if_nz r1.y - uge r0.w, r0.x, l(40) - movc r0.w, r0.w, l(-40), l(40) - iadd r0.x, r0.w, r0.x -endif -imad r0.x, r0.y, l(80), r0.x -imad r0.x, r0.z, l(1280), r0.x -imul null, r0.x, r0.x, l(9) -ushr r0.x, r0.x, l(2) -store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx -iadd r0.y, r0.x, l(1) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx -iadd r1.xyzw, r0.xxxx, l(2, 3, 4, 5) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx -iadd r1.xyzw, r0.xxxx, l(6, 7, 8, 9) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx -iadd r1.xyzw, r0.xxxx, l(10, 11, 12, 13) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx -iadd r1.xyzw, r0.xxxx, l(14, 15, 16, 17) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx -ret -// Approximately 54 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.cso deleted file mode 100644 index e9ebc126e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h deleted file mode 100644 index 4eee48cc1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h +++ /dev/null @@ -1,164 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_clear_32bpp.cs.hlsl -const uint8_t resolve_clear_32bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xE2, 0xF7, 0x7D, 0xA0, 0x39, 0xC3, 0x76, 0xE2, - 0x34, 0x8A, 0xFA, 0x94, 0x67, 0x5A, 0x5B, 0xD5, 0x01, 0x00, 0x00, 0x00, - 0x78, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0xDC, 0x06, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 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b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.txt deleted file mode 100644 index c6c8e99d1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.txt +++ /dev/null @@ -1,77 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 -// uint xe_resolve_edram_info; // Offset: 8 Size: 4 -// uint xe_resolve_address_info; // Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 3 -dcl_thread_group 8, 8, 1 -ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz -uge r0.xz, r0.xxxx, l(2, 0, 1, 0) -and r0.w, r0.x, l(1) -ishl r0.y, r0.y, r0.w -uge r0.y, vThreadID.x, r0.y -if_nz r0.y - ret -endif -ishl r1.x, vThreadID.x, l(3) -ushr r2.y, CB0[0][0].w, l(5) -movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) -mov r2.x, CB0[0][0].w -bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) -mov r1.y, vThreadID.y -iadd r0.xy, r0.xyxx, r1.xyxx -ubfe r0.z, l(12), l(13), CB0[0][0].z -and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) -udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) -imad r0.w, r1.w, r1.x, r1.z -iadd r0.z, r0.w, r0.z -imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx -if_nz r1.y - uge r0.w, r0.x, l(40) - movc r0.w, r0.w, l(-40), l(40) - iadd r0.x, r0.w, r0.x -endif -imad r0.x, r0.y, l(80), r0.x -imad r0.x, r0.z, l(1280), r0.x -ushr r0.x, r0.x, l(2) -store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx -iadd r0.y, r0.x, l(1) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx -ret -// Approximately 33 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.cso deleted file mode 100644 index 82abb06d0..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h deleted file mode 100644 index e04fba236..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h +++ /dev/null @@ -1,214 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_clear_64bpp_2xres.cs.hlsl -const uint8_t resolve_clear_64bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xE2, 0xEF, 0x7D, 0x2F, 0x16, 0x26, 0x66, 0x0E, - 0xAB, 0xA1, 0x63, 0xFC, 0x2F, 0xF1, 0xDC, 0x3B, 0x01, 0x00, 0x00, 0x00, - 0xD0, 0x09, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x34, 0x09, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.txt deleted file mode 100644 index 2b8731ef8..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.txt +++ /dev/null @@ -1,90 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 -// uint xe_resolve_edram_info; // Offset: 8 Size: 4 -// uint xe_resolve_address_info; // Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 3 -dcl_thread_group 8, 8, 1 -ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz -uge r0.xz, r0.xxxx, l(2, 0, 1, 0) -and r0.w, r0.x, l(1) -ishl r0.y, r0.y, r0.w -uge r0.y, vThreadID.x, r0.y -if_nz r0.y - ret -endif -ishl r1.x, vThreadID.x, l(3) -ushr r2.y, CB0[0][0].w, l(5) -movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) -mov r2.x, CB0[0][0].w -bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) -mov r1.y, vThreadID.y -iadd r0.xy, r0.xyxx, r1.xyxx -ubfe r0.z, l(12), l(13), CB0[0][0].z -and r0.w, CB0[0][0].z, l(1023) -udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) -ishl r1.z, r1.x, l(1) -imad r0.w, r1.y, r0.w, r1.z -iadd r0.z, r0.w, r0.z -imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx -imad r0.x, r0.y, l(80), r0.x -ishl r0.x, r0.x, l(1) -imad r0.x, r0.z, l(1280), r0.x -store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(1, 3, 7, 15) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -iadd r2.xyzw, r0.xxxx, l(2, 4, 5, 6) -store_uav_typed U0[0].xyzw, r2.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r2.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r2.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r2.wwww, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -iadd r2.xyzw, r0.xxxx, l(8, 9, 10, 11) -store_uav_typed U0[0].xyzw, r2.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r2.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r2.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r2.wwww, CB0[0][0].xyxy -iadd r0.yzw, r0.xxxx, l(0, 12, 13, 14) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r0.wwww, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -ret -// Approximately 46 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.cso deleted file mode 100644 index 0dda8fd57..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h deleted file mode 100644 index 65ae14da6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h +++ /dev/null @@ -1,304 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_clear_64bpp_3xres.cs.hlsl -const uint8_t resolve_clear_64bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xAB, 0x6C, 0x04, 0x78, 0xA3, 0x68, 0x50, 0xF9, - 0x9D, 0x04, 0x6F, 0x9E, 0xB8, 0xBA, 0xD5, 0x90, 0x01, 0x00, 0x00, 0x00, - 0x10, 0x0E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x74, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.txt deleted file mode 100644 index f03943efb..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.txt +++ /dev/null @@ -1,118 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 -// uint xe_resolve_edram_info; // Offset: 8 Size: 4 -// uint xe_resolve_address_info; // Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 3 -dcl_thread_group 8, 8, 1 -ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz -uge r0.xz, r0.xxxx, l(2, 0, 1, 0) -and r0.w, r0.x, l(1) -ishl r0.y, r0.y, r0.w -uge r0.y, vThreadID.x, r0.y -if_nz r0.y - ret -endif -ishl r1.x, vThreadID.x, l(3) -ushr r2.y, CB0[0][0].w, l(5) -movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) -mov r2.x, CB0[0][0].w -bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) -mov r1.y, vThreadID.y -iadd r0.xy, r0.xyxx, r1.xyxx -ubfe r0.z, l(12), l(13), CB0[0][0].z -and r0.w, CB0[0][0].z, l(1023) -udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) -ishl r1.z, r1.x, l(1) -imad r0.w, r1.y, r0.w, r1.z -iadd r0.z, r0.w, r0.z -imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx -imad r0.x, r0.y, l(80), r0.x -ishl r0.x, r0.x, l(1) -imad r0.x, r0.z, l(1280), r0.x -imul null, r0.x, r0.x, l(9) -ushr r0.x, r0.x, l(2) -store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy -iadd r0.yz, r0.xxxx, l(0, 1, 3, 0) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy -iadd r0.y, r0.x, l(2) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(4, 5, 6, 7) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(8, 9, 10, 11) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(12, 13, 14, 15) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(16, 17, 18, 19) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(20, 21, 22, 23) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(24, 25, 26, 27) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(28, 29, 30, 31) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -iadd r1.xyzw, r0.xxxx, l(32, 33, 34, 35) -store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy -ret -// Approximately 74 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.cso deleted file mode 100644 index 6c24420a3..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h deleted file mode 100644 index cec89a963..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h +++ /dev/null @@ -1,168 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_clear_64bpp.cs.hlsl -const uint8_t resolve_clear_64bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x2A, 0x4D, 0x56, 0x50, 0xA6, 0x3C, 0x90, 0x9D, - 0x2B, 0x86, 0xE0, 0x95, 0x6C, 0x1B, 0xA4, 0x59, 0x01, 0x00, 0x00, 0x00, - 0xB0, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x14, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x72, - 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, - 0x58, 0x65, 0x52, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0x9C, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt deleted file mode 100644 index 4bb271bfa..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt +++ /dev/null @@ -1,77 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 -// uint xe_resolve_edram_info; // Offset: 8 Size: 4 -// uint xe_resolve_address_info; // Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 3 -dcl_thread_group 8, 8, 1 -ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz -uge r0.xz, r0.xxxx, l(2, 0, 1, 0) -and r0.w, r0.x, l(1) -ishl r0.y, r0.y, r0.w -uge r0.y, vThreadID.x, r0.y -if_nz r0.y - ret -endif -ishl r1.x, vThreadID.x, l(3) -ushr r2.y, CB0[0][0].w, l(5) -movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) -mov r2.x, CB0[0][0].w -bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) -mov r1.y, vThreadID.y -iadd r0.xy, r0.xyxx, r1.xyxx -ubfe r0.z, l(12), l(13), CB0[0][0].z -and r0.w, CB0[0][0].z, l(1023) -udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) -ishl r1.z, r1.x, l(1) -imad r0.w, r1.y, r0.w, r1.z -iadd r0.z, r0.w, r0.z -imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx -imad r0.x, r0.y, l(80), r0.x -ishl r0.x, r0.x, l(1) -imad r0.x, r0.z, l(1280), r0.x -ushr r0.x, r0.x, l(2) -store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy -iadd r0.yz, r0.xxxx, l(0, 1, 3, 0) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy -iadd r0.y, r0.x, l(2) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy -store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy -ret -// Approximately 33 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.cso deleted file mode 100644 index 32901f943..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h deleted file mode 100644 index 1240501d2..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h +++ /dev/null @@ -1,529 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_32bpp_1x2xmsaa.cs.hlsl -const uint8_t resolve_fast_32bpp_1x2xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x58, 0xEA, 0x1A, 0x7E, 0xDD, 0x54, 0xC5, 0xD6, - 0xC8, 0xC6, 0xFE, 0x36, 0x10, 0xD5, 0x9D, 0x44, 0x01, 0x00, 0x00, 0x00, - 0x9C, 0x18, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 0x00, - 0x00, 0x18, 0x00, 0x00, 0x52, 0x44, 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-// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 7 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx -and r3.xyzw, CB0[0][0].xxzz, l(1023, 4096, 0x01000000, 7) -uge r1.w, l(3), r1.y -if_nz r1.w - mov r4.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.yw, r2.wwww, l(0, 2, 0, 1) -and r1.yw, r1.yyyw, l(0, 1, 0, 1) -ishl r1.yw, r2.xxxy, r1.yyyw -ushr r4.x, r4.y, l(1) -and r2.xy, r4.xyxx, l(1, 1, 0, 0) -iadd r1.yw, r1.yyyw, r2.xxxy -udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) -imad r2.w, r2.y, r3.x, r2.x -iadd r2.z, r2.w, r2.z -imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw -if_nz r3.y - uge r2.x, r1.y, l(40) - movc r2.x, r2.x, l(-40), l(40) - iadd r1.y, r1.y, r2.x -endif -imad r1.y, r1.w, l(80), r1.y -imad r1.y, r2.z, l(1280), r1.y -ushr r1.y, r1.y, l(2) -ld r2.xyzw, r1.yyyy, T0[0].xyzw -iadd r1.y, r1.y, l(1) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r3.z - ubfe r1.y, l(4), l(25), CB0[0][0].x - switch r1.y - case l(0) - case l(1) - and r5.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r5.xyzw - ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw - iadd r2.xyzw, r5.xyzw, r6.xyzw - and r5.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r5.xyzw - ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw - iadd r4.xyzw, r5.xyzw, r6.xyzw - break - case l(2) - case l(3) - case l(10) - case l(12) - and r5.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r5.xyzw - ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw - iadd r2.xyzw, r5.xyzw, r6.xyzw - and r5.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r5.xyzw - ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw - iadd r4.xyzw, r5.xyzw, r6.xyzw - break - default - break - endswitch -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -and r1.y, CB0[0][0].z, l(8) -if_nz r1.y - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r5.x - ushr r3.x, r1.x, l(5) - imad r1.z, r1.z, r3.x, r5.y - ishl r3.x, r0.z, l(10) - ishr r3.x, r3.x, l(6) - and r3.x, r3.x, l(96) - iadd r1.w, r1.w, r5.z - bfi r3.y, l(1), l(1), r1.w, l(0) - iadd r3.y, r3.y, r5.w - bfi r3.y, l(2), l(1), r3.y, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.y - bfi r3.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r1.zzzz, l(0, 0, 0, 0) - imad r3.xy, r3.xxxx, l(2, 16, 0, 0), r3.yzyy - bfi r1.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r1.yyyy, r3.xxyx - bfi r3.x, l(1), l(4), r0.z, l(0) - ubfe r3.y, l(3), l(6), r1.y - and r3.z, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.y, l(32), r1.w - imad r1.w, r3.z, l(4), r1.w - bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.xxxx, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r0.yw, r0.zzzz, l(0, 5, 0, 7) - and r0.yw, r0.yyyw, l(0, 448, 0, 2048) - bfi r1.x, l(23), l(9), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r1.x, r1.x, r0.z - ishl r1.zw, r0.yyyy, l(0, 0, 3, 2) - bfi r0.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r0.xxxx, r1.zwzz - imad r0.xy, r0.zzzz, l(8, 4, 0, 0), r0.xyxx - bfi r0.x, l(12), l(0), r0.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r5.z, l(2) - iadd r0.y, r5.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.y, l(6), l(0), r1.x, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ieq r0.yzw, r3.wwww, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.x, r0.x, l(2) -if_nz r0.y - ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r1.xyzw, r2.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ret -// Approximately 163 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.cso deleted file mode 100644 index 100408f9f..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h deleted file mode 100644 index 9f5aaa739..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h +++ /dev/null @@ -1,573 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_32bpp_2xres.cs.hlsl -const uint8_t resolve_fast_32bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x7A, 0x1A, 0x6C, 0xDC, 0x11, 0x81, 0x28, 0x4B, - 0xD8, 0xF5, 0x95, 0x3D, 0x1F, 0xC6, 0x5D, 0xD9, 0x01, 0x00, 0x00, 0x00, - 0xAC, 0x1A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x10, 0x1A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 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0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt deleted file mode 100644 index 7683d180a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt +++ /dev/null @@ -1,236 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 7 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -ubfe r2.zw, l(0, 0, 2, 12), l(0, 0, 10, 13), CB0[0][0].xxxx -and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) -uge r1.w, l(3), r1.y -if_nz r1.w - mov r4.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.yw, r2.zzzz, l(0, 2, 0, 1) -and r4.zw, r1.yyyw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r4.zwzz -ushr r4.x, r4.y, l(1) -and r4.xy, r4.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r4.xyxx -udiv r4.xy, null, r2.xyxx, l(80, 16, 0, 0) -imad r1.w, r4.y, r3.x, r4.x -iadd r1.w, r1.w, r2.w -imad r2.xy, -r4.xyxx, l(80, 16, 0, 0), r2.xyxx -if_nz r3.y - uge r2.z, r2.x, l(40) - movc r2.z, r2.z, l(-40), l(40) - iadd r2.x, r2.z, r2.x -endif -imad r2.x, r2.y, l(80), r2.x -imad r1.w, r1.w, l(1280), r2.x -ld r2.xyzw, r1.wwww, T0[0].xyzw -movc r1.y, r1.y, l(2), l(1) -iadd r1.y, r1.y, r1.w -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r3.z - ubfe r1.y, l(4), l(25), CB0[0][0].x - switch r1.y - case l(0) - case l(1) - and r5.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r5.xyzw - ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw - iadd r2.xyzw, r5.xyzw, r6.xyzw - and r5.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r5.xyzw - ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw - iadd r4.xyzw, r5.xyzw, r6.xyzw - break - case l(2) - case l(3) - case l(10) - case l(12) - and r5.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r5.xyzw - ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw - iadd r2.xyzw, r5.xyzw, r6.xyzw - and r5.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r5.xyzw - ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw - iadd r4.xyzw, r5.xyzw, r6.xyzw - break - default - break - endswitch - mov r5.yzw, r2.xxyz -else - mov r5.yzw, r2.xxyz -endif -if_nz r3.w - if_z r0.w - mov r5.x, r5.z - mov r2.z, r2.w - else - mov r5.x, r5.y - mov r2.z, r5.w - endif - if_z vThreadID.y - mov r2.xy, r2.zwzz - mov r4.xy, r4.zwzz - else - mov r2.xy, r5.xzxx - endif -else - mov r2.xyz, r5.yzwy -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -and r1.yz, CB0[0][0].zzzz, l(0, 7, 8, 0) -if_nz r1.z - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r1.w, CB0[0][0].w, l(10) - ishl r1.w, r1.w, l(5) - ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r5.x, r1.z, l(2) - ushr r1.w, r1.w, l(4) - and r1.w, r1.w, l(0x00007ffe) - imad r1.w, r5.x, r1.w, r3.x - ushr r3.x, r1.x, l(5) - imad r1.w, r1.w, r3.x, r3.y - ishl r3.x, r0.z, l(10) - and r3.x, r3.x, l(6144) - bfi r3.x, l(3), l(8), r0.w, r3.x - ishr r3.x, r3.x, l(6) - iadd r3.y, r3.z, r5.x - bfi r3.z, l(1), l(1), r3.y, l(0) - iadd r3.z, r3.z, r3.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r3.y, l(1), l(0), r3.y, r3.z - and r3.z, r3.x, l(112) - bfi r5.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r1.wwww, l(0, 0, 0, 0) - imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r5.xxxy - bfi r3.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r3.xxxx, r3.zzwz - bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 8, 11), r1.zzzz, r3.xxxz - ubfe r3.x, l(3), l(6), r1.z - and r3.z, r3.y, l(6) - bfi r3.y, l(1), l(8), r3.y, l(0) - imad r3.x, r3.x, l(32), r3.y - imad r3.x, r3.z, l(4), r3.x - bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r1.zzzw - bfi r1.w, l(9), l(3), r3.x, r1.w - bfi r1.z, l(6), l(0), r1.z, r1.w -else - ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r3.y, r0.x, r3.x - ishl r1.xw, r0.zzzz, l(4, 0, 0, 7) - and r1.xw, r1.xxxw, l(224, 0, 0, 2048) - bfi r0.y, l(3), l(2), r0.w, r1.x - ishl r1.x, r1.x, l(1) - bfi r0.w, l(3), l(3), r0.w, r1.x - and r0.w, r0.w, l(480) - bfi r1.x, l(23), l(9), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r3.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r1.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r3.z, l(2) - iadd r0.y, r3.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.z, l(6), l(0), r1.x, r0.x -endif -ushr r0.x, r1.z, l(2) -ieq r0.yzw, r1.yyyy, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.w, r0.x, l(1) -if_nz r0.y - ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r1.xyzw, r2.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.wwww, r4.xyzw -ret -// Approximately 189 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.cso deleted file mode 100644 index 189fb6259..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h deleted file mode 100644 index a2e3307c0..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h +++ /dev/null @@ -1,801 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl -const uint8_t resolve_fast_32bpp_3xres_1x2xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xDC, 0x72, 0xF2, 0x94, 0xF8, 0xCE, 0x44, 0x33, - 0xFB, 0x59, 0xFF, 0x0F, 0xD3, 0x83, 0x87, 0xE8, 0x01, 0x00, 0x00, 0x00, - 0x58, 0x25, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, 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0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.txt deleted file mode 100644 index d476e0f33..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.txt +++ /dev/null @@ -1,308 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 9 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx -and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) -uge r1.w, l(3), r1.y -if_nz r1.w - mov r4.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.yw, r2.wwww, l(0, 2, 0, 1) -and r1.yw, r1.yyyw, l(0, 1, 0, 1) -ishl r1.yw, r2.xxxy, r1.yyyw -ushr r4.x, r4.y, l(1) -and r2.xy, r4.xyxx, l(1, 1, 0, 0) -iadd r1.yw, r1.yyyw, r2.xxxy -udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) -imad r2.w, r2.y, r3.x, r2.x -iadd r2.z, r2.w, r2.z -imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw -if_nz r3.y - uge r2.x, r1.y, l(40) - movc r2.x, r2.x, l(-40), l(40) - iadd r1.y, r1.y, r2.x -endif -imad r1.y, r1.w, l(80), r1.y -imad r1.y, r2.z, l(1280), r1.y -imul null, r1.y, r1.y, l(9) -ushr r1.y, r1.y, l(1) -ld r2.xy, r1.yyyy, T0[0].xyzw -iadd r4.xyzw, r1.yyyy, l(1, 2, 3, 4) -ld r2.zw, r4.xxxx, T0[0].zwxy -ld r5.xy, r4.yyyy, T0[0].xywz -ld r5.zw, r4.zzzz, T0[0].zwxy -ld r4.xy, r4.wwww, T0[0].yxzw -iadd r6.xyzw, r1.yyyy, l(5, 6, 7, 8) -ld r4.zw, r6.xxxx, T0[0].zwxy -ld r7.xy, r6.yyyy, T0[0].xyzw -ld r7.zw, r6.zzzz, T0[0].zwxy -ld r1.yw, r6.wwww, T0[0].zxwy -if_nz r3.z - ubfe r3.x, l(4), l(25), CB0[0][0].x - switch r3.x - case l(0) - case l(1) - and r6.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r6.xyzw - ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw - iadd r2.xyzw, r6.xyzw, r8.xyzw - and r6.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw, r6.xyzw - ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw - iadd r5.xyzw, r6.xyzw, r8.xyzw - mov r4.xyzw, r4.yxzw - and r6.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r6.xyzw - ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw - iadd r4.xyzw, r6.yxzw, r8.yxzw - and r6.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw, r6.xyzw - ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw - iadd r7.xyzw, r6.xyzw, r8.xyzw - and r3.xy, r1.ywyy, l(0xff00ff00, 0xff00ff00, 0, 0) - bfi r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r1.ywyy, r3.xyxx - ubfe r6.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r1.ywyy - iadd r1.yw, r3.xxxy, r6.xxxy - break - case l(2) - case l(3) - case l(10) - case l(12) - and r6.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r6.xyzw - ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw - iadd r2.xyzw, r6.xyzw, r8.xyzw - and r6.xyzw, r5.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw, r6.xyzw - ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw - iadd r5.xyzw, r6.xyzw, r8.xyzw - mov r4.xyzw, r4.yxzw - and r6.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r6.xyzw - ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw - iadd r4.xyzw, r6.yxzw, r8.yxzw - and r6.xyzw, r7.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw, r6.xyzw - ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw - iadd r7.xyzw, r6.xyzw, r8.xyzw - and r3.xy, r1.ywyy, l(0xc00ffc00, 0xc00ffc00, 0, 0) - bfi r3.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r1.ywyy, r3.xyxx - ubfe r6.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r1.ywyy - iadd r1.yw, r3.xxxy, r6.xxxy - break - default - break - endswitch -endif -if_nz r3.w - if_z r0.w - mov r2.x, r2.y - mov r5.z, r5.x - mov r3.x, r5.w - else - mov r3.x, r5.z - mov r5.z, r2.w - endif - if_z vThreadID.y - mov r2.xyz, r5.zxyz - mov r4.xzw, r7.xxyz - endif - mov r2.w, r5.z - mov r5.z, r3.x -endif -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r3.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -and r3.xy, CB0[0][0].zzzz, l(7, 8, 0, 0) -if_nz r3.y - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r3.y, CB0[0][0].w, l(10) - ishl r3.y, r3.y, l(5) - ishr r6.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r3.z, r1.z, l(2) - ushr r3.y, r3.y, l(4) - and r3.y, r3.y, l(0x00007ffe) - imad r3.y, r3.z, r3.y, r6.x - ushr r3.w, r1.x, l(5) - imad r3.y, r3.y, r3.w, r6.y - ishl r3.w, r0.z, l(10) - and r3.w, r3.w, l(6144) - bfi r3.w, l(3), l(8), r0.w, r3.w - ishr r3.w, r3.w, l(6) - iadd r3.z, r3.z, r6.z - bfi r6.xyz, l(1, 20, 20, 0), l(1, 10, 13, 0), r3.zyyz, l(0, 0, 0, 0) - iadd r6.x, r6.x, r6.w - bfi r6.x, l(2), l(1), r6.x, l(0) - bfi r3.z, l(1), l(0), r3.z, r6.x - and r6.x, r3.w, l(112) - imad r6.xy, r6.xxxx, l(2, 16, 0, 0), r6.yzyy - bfi r3.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r3.wwww, r6.xxxy - bfi r3.yw, l(0, 2, 0, 2), l(0, 8, 0, 11), r1.zzzz, r3.yyyw - ubfe r1.z, l(3), l(6), r3.y - and r6.x, r3.z, l(6) - bfi r3.z, l(1), l(8), r3.z, l(0) - imad r1.z, r1.z, l(32), r3.z - imad r1.z, r6.x, l(4), r1.z - bfi r3.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r3.yywy - bfi r1.z, l(9), l(3), r1.z, r3.z - bfi r1.z, l(6), l(0), r3.y, r1.z -else - ishr r6.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r6.y, r0.x, r6.x - ishl r3.yz, r0.zzzz, l(0, 4, 7, 0) - and r3.yz, r3.yyzy, l(0, 224, 2048, 0) - bfi r0.y, l(3), l(2), r0.w, r3.y - ishl r1.x, r3.y, l(1) - bfi r0.w, l(3), l(3), r0.w, r1.x - and r0.w, r0.w, l(480) - bfi r1.x, l(23), l(9), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r3.yw, r0.wwww, l(0, 3, 0, 2) - bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.yyyw - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r3.z, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r6.z, l(2) - iadd r0.y, r6.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.z, l(6), l(0), r1.x, r0.x -endif -imul null, r0.x, r1.z, l(9) -ushr r0.x, r0.x, l(3) -ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r6.xyzw -endif -if_nz r0.z - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -if_nz r0.y - ishl r3.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r3.xyzw, r6.xyzw -endif -if_nz r0.z - ushr r3.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r3.xyzw -endif -if_nz r0.y - ishl r3.xyzw, r4.yxzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.yxzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r3.yxzw, r6.yxzw -endif -if_nz r0.z - ushr r3.xyzw, r4.yxzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.yxzw -endif -if_nz r0.y - ishl r3.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r7.xyzw, r3.xyzw, r6.xyzw -endif -if_nz r0.z - ushr r3.xyzw, r7.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r3.xyzw -endif -if_nz r0.y - ishl r0.yw, r1.yyyw, l(0, 8, 0, 8) - and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r1.xz, r1.yywy, l(8, 0, 8, 0) - and r1.xz, r1.xxzx, l(0x00ff00ff, 0, 0x00ff00ff, 0) - iadd r1.yw, r0.yyyw, r1.xxxz -endif -if_nz r0.z - ushr r0.yz, r1.yywy, l(0, 16, 16, 0) - bfi r1.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r1.yyyw, r0.yyyz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyxx -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r3.xxxx, r2.zwzz -store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyxx -store_uav_typed U0[0].xyzw, r3.zzzz, r5.zwzz -store_uav_typed U0[0].xyzw, r3.wwww, r4.yxyy -iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) -store_uav_typed U0[0].xyzw, r2.xxxx, r4.zwzz -store_uav_typed U0[0].xyzw, r2.yyyy, r7.xyxx -store_uav_typed U0[0].xyzw, r2.zzzz, r7.zwzz -store_uav_typed U0[0].xyzw, r2.wwww, r1.ywyy -ret -// Approximately 261 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.cso deleted file mode 100644 index e8052410e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.h deleted file mode 100644 index d02601119..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.h +++ /dev/null @@ -1,854 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl -const uint8_t resolve_fast_32bpp_3xres_4xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xE6, 0x29, 0x94, 0x13, 0x4E, 0xEF, 0xF0, 0xDD, - 0xA2, 0x91, 0xC5, 0x1B, 0xB0, 0xC5, 0x83, 0x04, 0x01, 0x00, 0x00, 0x00, - 0xD8, 0x27, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x3C, 0x27, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, - 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, - 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, - 0x52, 0x65, 0x73, 0x6F, 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0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.txt deleted file mode 100644 index 565b4abd2..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.txt +++ /dev/null @@ -1,331 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 10 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -ubfe r1.w, l(12), l(13), CB0[0][0].x -and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) -uge r2.z, l(3), r1.y -if_nz r2.z - mov r4.y, r1.y -else - ieq r2.z, r1.y, l(5) - if_nz r2.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) -ushr r4.x, r4.y, l(1) -bfi r2.xy, l(2, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx -udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) -imad r3.x, r2.w, r3.x, r2.z -iadd r1.w, r1.w, r3.x -imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx -if_nz r3.y - uge r2.z, r2.x, l(40) - movc r2.z, r2.z, l(-40), l(40) - iadd r2.x, r2.z, r2.x -endif -imad r2.x, r2.y, l(80), r2.x -imad r1.w, r1.w, l(1280), r2.x -imul null, r1.w, r1.w, l(9) -ushr r1.w, r1.w, l(1) -ine r2.xy, r1.yyyy, l(2, 3, 0, 0) -and r1.y, r2.y, r2.x -if_nz r1.y - ld r2.yz, r1.wwww, T0[0].wxyz - iadd r1.y, r1.w, l(1) - ld r2.xw, r1.yyyy, T0[0].yzwx - iadd r4.xyzw, r1.wwww, l(2, 3, 4, 9) - ld r5.xy, r4.xxxx, T0[0].xyzw - ld r5.zw, r4.yyyy, T0[0].zwxy - ld r6.x, r4.zzzz, T0[0].xyzw - ld r6.yz, r4.wwww, T0[0].zxyw - iadd r4.xyzw, r1.wwww, l(10, 11, 12, 13) - ld r3.xy, r4.xxxx, T0[0].xyzw - ld r7.yz, r4.yyyy, T0[0].zxyw - ld r4.xy, r4.zzzz, T0[0].xyzw - ld r4.w, r4.wwww, T0[0].zwyx - mov r6.w, r3.x - mov r7.x, r3.y - mov r7.w, r4.x - mov r4.zw, r4.yyyw -else - iadd r8.xyzw, r1.wwww, l(4, 5, 6, 7) - ld r2.y, r8.xxxx, T0[0].wyxz - ld r2.zw, r8.yyyy, T0[0].wzxy - ld r8.xy, r8.zzzz, T0[0].xyzw - ld r5.yz, r8.wwww, T0[0].zxyw - iadd r9.xyzw, r1.wwww, l(8, 13, 14, 15) - ld r8.zw, r9.xxxx, T0[0].zwxy - ld r6.y, r9.yyyy, T0[0].xyzw - ld r6.zw, r9.zzzz, T0[0].zwxy - ld r7.xy, r9.wwww, T0[0].xyzw - iadd r1.yw, r1.wwww, l(0, 16, 0, 17) - ld r7.zw, r1.yyyy, T0[0].zwxy - ld r4.zw, r1.wwww, T0[0].zwxy - mov r2.x, r8.x - mov r5.xw, r8.yyyz - mov r6.x, r8.w -endif -if_nz r3.z - ubfe r1.y, l(4), l(25), CB0[0][0].x - switch r1.y - case l(0) - case l(1) - and r8.xyzw, r2.yzwx, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.yzwx, r8.xyzw - ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.yzwx - iadd r2.xyzw, r8.wxyz, r9.wxyz - and r8.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw, r8.xyzw - ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw - iadd r5.xyzw, r8.xyzw, r9.xyzw - and r8.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r6.xyzw, r8.xyzw - ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r6.xyzw - iadd r6.xyzw, r8.xyzw, r9.xyzw - and r8.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw, r8.xyzw - ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw - iadd r7.xyzw, r8.xyzw, r9.xyzw - and r1.yw, r4.zzzw, l(0, 0xff00ff00, 0, 0xff00ff00) - bfi r1.yw, l(0, 8, 0, 8), l(0, 16, 0, 16), r4.zzzw, r1.yyyw - ubfe r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r4.zwzz - iadd r4.zw, r1.yyyw, r3.xxxy - break - case l(2) - case l(3) - case l(10) - case l(12) - and r8.xyzw, r2.yzwx, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.yzwx, r8.xyzw - ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.yzwx - iadd r2.xyzw, r8.wxyz, r9.wxyz - and r8.xyzw, r5.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw, r8.xyzw - ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw - iadd r5.xyzw, r8.xyzw, r9.xyzw - and r8.xyzw, r6.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r6.xyzw, r8.xyzw - ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r6.xyzw - iadd r6.xyzw, r8.xyzw, r9.xyzw - and r8.xyzw, r7.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw, r8.xyzw - ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw - iadd r7.xyzw, r8.xyzw, r9.xyzw - and r1.yw, r4.zzzw, l(0, 0xc00ffc00, 0, 0xc00ffc00) - bfi r1.yw, l(0, 10, 0, 10), l(0, 20, 0, 20), r4.zzzw, r1.yyyw - ubfe r3.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r4.zwzz - iadd r4.zw, r1.yyyw, r3.xxxy - break - default - break - endswitch -endif -if_nz r3.w - if_z r0.w - mov r2.y, r2.z - mov r5.z, r5.x - mov r1.y, r5.w - else - mov r1.y, r5.z - mov r5.z, r2.x - endif - if_z vThreadID.y - mov r2.yzw, r5.zzxy - mov r6.yzw, r7.xxyz - endif - mov r2.x, r5.z - mov r5.z, r1.y -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -and r1.yz, CB0[0][0].zzzz, l(0, 7, 8, 0) -if_nz r1.z - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r1.w, CB0[0][0].w, l(10) - ishl r1.w, r1.w, l(5) - ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r4.x, r1.z, l(2) - ushr r1.w, r1.w, l(4) - and r1.w, r1.w, l(0x00007ffe) - imad r1.w, r4.x, r1.w, r3.x - ushr r3.x, r1.x, l(5) - imad r1.w, r1.w, r3.x, r3.y - ishl r3.x, r0.z, l(10) - and r3.x, r3.x, l(6144) - bfi r3.x, l(3), l(8), r0.w, r3.x - ishr r3.x, r3.x, l(6) - iadd r3.y, r3.z, r4.x - bfi r3.z, l(1), l(1), r3.y, l(0) - iadd r3.z, r3.z, r3.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r3.y, l(1), l(0), r3.y, r3.z - and r3.z, r3.x, l(112) - bfi r4.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r1.wwww, l(0, 0, 0, 0) - imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r4.xxxy - bfi r3.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r3.xxxx, r3.zzwz - bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 8, 11), r1.zzzz, r3.xxxz - ubfe r3.x, l(3), l(6), r1.z - and r3.z, r3.y, l(6) - bfi r3.y, l(1), l(8), r3.y, l(0) - imad r3.x, r3.x, l(32), r3.y - imad r3.x, r3.z, l(4), r3.x - bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r1.zzzw - bfi r1.w, l(9), l(3), r3.x, r1.w - bfi r1.z, l(6), l(0), r1.z, r1.w -else - ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r3.y, r0.x, r3.x - ishl r1.xw, r0.zzzz, l(4, 0, 0, 7) - and r1.xw, r1.xxxw, l(224, 0, 0, 2048) - bfi r0.y, l(3), l(2), r0.w, r1.x - ishl r1.x, r1.x, l(1) - bfi r0.w, l(3), l(3), r0.w, r1.x - and r0.w, r0.w, l(480) - bfi r1.x, l(23), l(9), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r3.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r1.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r3.z, l(2) - iadd r0.y, r3.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.z, l(6), l(0), r1.x, r0.x -endif -imul null, r0.x, r1.z, l(9) -ushr r0.x, r0.x, l(3) -ieq r0.yzw, r1.yyyy, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r2.yzwx, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r2.yzwx, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.wxyz, r3.wxyz -endif -if_nz r0.z - ushr r1.xyzw, r2.yzwx, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.wxyz -endif -if_nz r0.y - ishl r1.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw -endif -if_nz r0.y - ishl r1.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r1.xyzw -endif -if_nz r0.y - ishl r1.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r7.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r7.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r1.xyzw -endif -if_nz r0.y - ishl r0.yw, r4.zzzw, l(0, 8, 0, 8) - and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r1.xy, r4.zwzz, l(8, 8, 0, 0) - and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.zw, r0.yyyw, r1.xxxy -endif -if_nz r0.z - ushr r0.yz, r4.zzwz, l(0, 16, 16, 0) - bfi r4.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r4.zzzw, r0.yyyz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.yzyy -iadd r1.xyzw, r0.xxxx, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r1.xxxx, r2.wxww -store_uav_typed U0[0].xyzw, r1.yyyy, r5.xyxx -store_uav_typed U0[0].xyzw, r1.zzzz, r5.zwzz -store_uav_typed U0[0].xyzw, r1.wwww, r6.xyxx -iadd r1.xyzw, r0.xxxx, l(5, 6, 7, 8) -store_uav_typed U0[0].xyzw, r1.xxxx, r6.zwzz -store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyxx -store_uav_typed U0[0].xyzw, r1.zzzz, r7.zwzz -store_uav_typed U0[0].xyzw, r1.wwww, r4.zwzz -ret -// Approximately 284 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.cso deleted file mode 100644 index d9a2b0348..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h deleted file mode 100644 index 6686a0e8a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h +++ /dev/null @@ -1,554 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_32bpp_4xmsaa.cs.hlsl -const uint8_t resolve_fast_32bpp_4xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x03, 0x5F, 0x7C, 0x66, 0x80, 0x0D, 0x34, 0x87, - 0x81, 0xDF, 0xAF, 0x98, 0x9C, 0x62, 0x81, 0xE3, 0x01, 0x00, 0x00, 0x00, - 0xC4, 0x19, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 0x00, - 0x28, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x6C, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, - 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, - 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, - 0x52, 0x65, 0x73, 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--git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt deleted file mode 100644 index ab12b24ff..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt +++ /dev/null @@ -1,222 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 7 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -ubfe r1.w, l(12), l(13), CB0[0][0].x -and r3.xyzw, CB0[0][0].xxzz, l(1023, 4096, 0x01000000, 7) -uge r2.z, l(3), r1.y -if_nz r2.z - mov r4.y, r1.y -else - ieq r2.z, r1.y, l(5) - if_nz r2.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) -ushr r4.x, r4.y, l(1) -bfi r2.xy, l(4, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx -udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) -imad r3.x, r2.w, r3.x, r2.z -iadd r1.w, r1.w, r3.x -imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx -if_nz r3.y - uge r2.z, r2.x, l(40) - movc r2.z, r2.z, l(-40), l(40) - iadd r2.x, r2.z, r2.x -endif -imad r2.x, r2.y, l(80), r2.x -imad r1.w, r1.w, l(1280), r2.x -ushr r1.w, r1.w, l(2) -ine r2.xy, r1.yyyy, l(2, 3, 0, 0) -and r1.y, r2.y, r2.x -if_nz r1.y - ld r2.xy, r1.wwww, T0[0].xzyw - iadd r1.y, r1.w, l(1) - ld r2.zw, r1.yyyy, T0[0].ywxz - iadd r3.xy, r1.wwww, l(2, 3, 0, 0) - ld r4.xy, r3.xxxx, T0[0].xzyw - ld r4.zw, r3.yyyy, T0[0].ywxz -else - ld r2.xy, r1.wwww, T0[0].ywxz - iadd r1.y, r1.w, l(1) - ld r2.zw, r1.yyyy, T0[0].xzyw - iadd r1.yw, r1.wwww, l(0, 2, 0, 3) - ld r4.xy, r1.yyyy, T0[0].ywxz - ld r4.zw, r1.wwww, T0[0].xzyw -endif -if_nz r3.z - ubfe r1.y, l(4), l(25), CB0[0][0].x - switch r1.y - case l(0) - case l(1) - and r5.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r5.xyzw - ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw - iadd r2.xyzw, r5.xyzw, r6.xyzw - and r5.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r5.xyzw - ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw - iadd r4.xyzw, r5.xyzw, r6.xyzw - break - case l(2) - case l(3) - case l(10) - case l(12) - and r5.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r5.xyzw - ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw - iadd r2.xyzw, r5.xyzw, r6.xyzw - and r5.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) - bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r5.xyzw - ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw - iadd r4.xyzw, r5.xyzw, r6.xyzw - break - default - break - endswitch -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -and r1.y, CB0[0][0].z, l(8) -if_nz r1.y - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r5.x - ushr r3.x, r1.x, l(5) - imad r1.z, r1.z, r3.x, r5.y - ishl r3.x, r0.z, l(10) - ishr r3.x, r3.x, l(6) - and r3.x, r3.x, l(96) - iadd r1.w, r1.w, r5.z - bfi r3.y, l(1), l(1), r1.w, l(0) - iadd r3.y, r3.y, r5.w - bfi r3.y, l(2), l(1), r3.y, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.y - bfi r3.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r1.zzzz, l(0, 0, 0, 0) - imad r3.xy, r3.xxxx, l(2, 16, 0, 0), r3.yzyy - bfi r1.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r1.yyyy, r3.xxyx - bfi r3.x, l(1), l(4), r0.z, l(0) - ubfe r3.y, l(3), l(6), r1.y - and r3.z, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.y, l(32), r1.w - imad r1.w, r3.z, l(4), r1.w - bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.xxxx, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r0.yw, r0.zzzz, l(0, 5, 0, 7) - and r0.yw, r0.yyyw, l(0, 448, 0, 2048) - bfi r1.x, l(23), l(9), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r1.x, r1.x, r0.z - ishl r1.zw, r0.yyyy, l(0, 0, 3, 2) - bfi r0.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r0.xxxx, r1.zwzz - imad r0.xy, r0.zzzz, l(8, 4, 0, 0), r0.xyxx - bfi r0.x, l(12), l(0), r0.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r5.z, l(2) - iadd r0.y, r5.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.y, l(6), l(0), r1.x, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ieq r0.yzw, r3.wwww, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.x, r0.x, l(2) -if_nz r0.y - ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r1.xyzw, r2.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ret -// Approximately 174 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.cso deleted file mode 100644 index 246ca9605..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h deleted file mode 100644 index 91dffebc2..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h +++ /dev/null @@ -1,499 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_64bpp_1x2xmsaa.cs.hlsl -const uint8_t resolve_fast_64bpp_1x2xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF9, 0x6D, 0xEC, 0x63, 0x71, 0xFA, 0xBA, 0xE7, - 0x4C, 0xC6, 0x5D, 0x02, 0x94, 0xD6, 0x77, 0xB7, 0x01, 0x00, 0x00, 0x00, - 0x2C, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 0x00, - 0x90, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x6C, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.txt deleted file mode 100644 index 497d6daf1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.txt +++ /dev/null @@ -1,201 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 6 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) -ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r4.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.yw, r2.wwww, l(0, 2, 0, 1) -and r1.yw, r1.yyyw, l(0, 1, 0, 1) -ishl r1.yw, r2.xxxy, r1.yyyw -ushr r4.x, r4.y, l(1) -and r2.xy, r4.xyxx, l(1, 1, 0, 0) -iadd r1.yw, r1.yyyw, r2.xxxy -udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) -ishl r2.w, r2.x, l(1) -imad r2.w, r2.y, r3.y, r2.w -iadd r2.z, r2.w, r2.z -imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw -imad r1.y, r1.w, l(80), r1.y -ishl r1.y, r1.y, l(1) -imad r1.y, r2.z, l(1280), r1.y -ushr r1.y, r1.y, l(2) -ld r2.xyzw, r1.yyyy, T0[0].xyzw -iadd r1.y, r1.y, l(1) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r3.z - ubfe r1.y, l(4), l(25), CB0[0][0].x - ieq r1.yw, r1.yyyy, l(0, 5, 0, 7) - or r1.y, r1.w, r1.y - if_nz r1.y - bfi r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r2.yxwz, r2.xyzw - bfi r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.yxwz, r4.xyzw - endif -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r5.x - ushr r3.y, r1.x, l(5) - imad r1.z, r1.z, r3.y, r5.y - ishl r3.y, r0.z, l(11) - and r3.y, r3.y, l(0x00003000) - bfi r3.y, l(3), l(9), r0.w, r3.y - ishr r3.y, r3.y, l(6) - iadd r1.w, r1.w, r5.z - bfi r3.z, l(1), l(1), r1.w, l(0) - iadd r3.z, r3.z, r5.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.z - bfi r3.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r1.zzzz, l(0, 0, 0, 0) - imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz - bfi r1.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r1.yyyy, r3.yyzy - bfi r3.y, l(1), l(4), r0.z, l(0) - ubfe r3.z, l(3), l(6), r1.y - and r3.w, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.z, l(32), r1.w - imad r1.w, r3.w, l(4), r1.w - bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r1.xz, r0.zzzz, l(6, 0, 7, 0) - and r1.xz, r1.xxzx, l(896, 0, 2048, 0) - bfi r0.y, l(3), l(4), r0.w, r1.x - bfi r0.y, l(22), l(10), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r0.y, r0.y, r0.z - ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) - bfi r1.xw, l(3, 0, 0, 3), l(7, 0, 0, 6), r0.wwww, r1.xxxw - bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r1.xxxw - imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.z, r0.z, l(1792) - iadd r0.x, r0.x, r0.z - and r0.z, r5.z, l(2) - iadd r0.z, r5.w, r0.z - bfi r0.z, l(2), l(6), r0.z, l(0) - iadd r0.x, r0.x, r0.z - bfi r1.y, l(6), l(0), r0.y, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ieq r0.y, r3.x, l(4) -if_nz r0.y - mov r2.xyzw, r2.yxwz - mov r0.z, l(2) -else - mov r0.z, r3.x -endif -ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) -or r0.zw, r1.yyyz, r1.xxxy -if_nz r0.z - ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xyzw, r5.xyzw -endif -if_nz r0.w - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.x, r0.x, l(2) -if_nz r0.y - mov r4.xyzw, r4.yxwz - mov r3.x, l(2) -endif -ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r1.xyzw, r2.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ret -// Approximately 153 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.cso deleted file mode 100644 index 8ea4dfbc5..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.h deleted file mode 100644 index d5ad1c981..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.h +++ /dev/null @@ -1,512 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_64bpp_2xres.cs.hlsl -const uint8_t resolve_fast_64bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x71, 0xDA, 0x35, 0x8F, 0x7B, 0x2F, 0x94, 0xBC, - 0x26, 0x27, 0x59, 0xAA, 0xE5, 0xC6, 0x1E, 0x35, 0x01, 0x00, 0x00, 0x00, - 0xC8, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x2C, 0x17, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.txt deleted file mode 100644 index 7524b4b51..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.txt +++ /dev/null @@ -1,211 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 6 -dcl_thread_group 8, 8, 1 -ushr r0.x, CB0[0][0].y, l(7) -bfi r0.x, l(11), l(3), r0.x, l(0) -uge r0.x, vThreadID.x, r0.x -if_nz r0.x - ret -endif -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000) -ubfe r1.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r3.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r3.y, l(2) - else - mov r3.y, l(0) - endif -endif -uge r0.yw, r1.wwww, l(0, 2, 0, 1) -and r0.yw, r0.yyyw, l(0, 1, 0, 1) -ishl r0.yw, r1.xxxy, r0.yyyw -ushr r3.x, r3.y, l(1) -and r1.xy, r3.xyxx, l(1, 1, 0, 0) -iadd r0.yw, r0.yyyw, r1.xxxy -udiv r1.xy, null, r0.ywyy, l(80, 16, 0, 0) -ishl r1.w, r1.x, l(1) -imad r1.w, r1.y, r2.y, r1.w -iadd r1.z, r1.w, r1.z -imad r0.yw, -r1.xxxy, l(0, 80, 0, 16), r0.yyyw -imad r0.y, r0.w, l(80), r0.y -ishl r0.y, r0.y, l(1) -imad r0.y, r1.z, l(1280), r0.y -ld r1.xyzw, r0.yyyy, T0[0].xyzw -iadd r0.y, r0.y, l(1) -ld r3.xyzw, r0.yyyy, T0[0].xyzw -if_nz r2.z - ubfe r0.y, l(4), l(25), CB0[0][0].x - ieq r0.yw, r0.yyyy, l(0, 5, 0, 7) - or r0.y, r0.w, r0.y - if_nz r0.y - bfi r1.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r1.yxwz, r1.xyzw - bfi r3.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r3.yxwz, r3.xyzw - endif -endif -if_nz r2.w - if_z vThreadID.x - mov r1.xy, r1.zwzz - mov r3.xy, r3.zwzz - endif - if_z vThreadID.y - mov r1.xyzw, r3.xyzw - endif -endif -bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, vThreadID.xyyx -bfi r2.y, l(10), l(5), CB0[0][0].w, l(0) -and r2.z, CB0[0][0].z, l(8) -if_nz r2.z - ubfe r2.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r5.x, r2.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r5.x, r2.w, r4.x - ushr r4.x, r2.y, l(5) - imad r2.w, r2.w, r4.x, r4.y - ishl r4.x, r0.z, l(11) - and r4.x, r4.x, l(0x00003000) - bfi r4.x, l(3), l(9), r0.w, r4.x - ishr r4.x, r4.x, l(6) - iadd r4.y, r4.z, r5.x - bfi r4.z, l(1), l(1), r4.y, l(0) - iadd r4.z, r4.z, r4.w - bfi r4.z, l(2), l(1), r4.z, l(0) - bfi r4.y, l(1), l(0), r4.y, r4.z - and r4.z, r4.x, l(240) - bfi r5.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy - bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz - bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r2.zzzz, r4.xxxz - ubfe r4.x, l(3), l(6), r2.z - and r4.z, r4.y, l(6) - bfi r4.y, l(1), l(8), r4.y, l(0) - imad r4.x, r4.x, l(32), r4.y - imad r4.x, r4.z, l(4), r4.x - bfi r2.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r2.zzzw - bfi r2.w, l(9), l(3), r4.x, r2.w - bfi r2.z, l(6), l(0), r2.z, r2.w -else - ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r2.y, l(5) - imad r0.x, r4.y, r0.x, r4.x - ishl r2.yw, r0.zzzz, l(0, 5, 0, 7) - and r2.yw, r2.yyyw, l(0, 448, 0, 2048) - bfi r0.y, l(3), l(3), r0.w, r2.y - ishl r2.y, r2.y, l(1) - bfi r0.w, l(3), l(4), r0.w, r2.y - and r0.w, r0.w, l(992) - bfi r2.y, l(22), l(10), r0.x, r0.w - bfi r2.y, l(4), l(0), r0.y, r2.y - bfi r2.y, l(1), l(4), r0.z, r2.y - ishl r4.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r4.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r2.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r4.z, l(2) - iadd r0.y, r4.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r2.z, l(6), l(0), r2.y, r0.x -endif -ushr r0.x, r2.z, l(2) -ieq r0.y, r2.x, l(4) -if_nz r0.y - mov r1.xyzw, r1.yxwz - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) -or r0.zw, r2.zzzw, r2.yyyz -if_nz r0.z - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r0.w - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -iadd r0.z, r0.x, l(1) -if_nz r0.y - mov r3.zw, r3.wwwz - mov r3.xyzw, r3.yxzw - mov r2.x, l(2) -endif -ieq r1.xyz, r2.xxxx, l(1, 2, 3, 0) -or r0.yw, r1.yyyz, r1.xxxy -if_nz r0.y - ishl r1.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r1.xyzw, r2.xyzw -endif -if_nz r0.w - ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r3.xyzw -ret -// Approximately 164 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.cso deleted file mode 100644 index e69be7b88..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.h deleted file mode 100644 index 5bf18c38c..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.h +++ /dev/null @@ -1,977 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_64bpp_3xres.cs.hlsl -const uint8_t resolve_fast_64bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x48, 0xCC, 0x19, 0xF5, 0xC9, 0x74, 0x00, 0x03, - 0x8D, 0x31, 0x2F, 0xB2, 0xB5, 0x18, 0xF8, 0xE6, 0x01, 0x00, 0x00, 0x00, - 0x94, 0x2D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 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0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.txt deleted file mode 100644 index 8c5df5852..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.txt +++ /dev/null @@ -1,415 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 6 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].zxxz, l(7, 1023, 0x40000000, 8) -ubfe r1.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r3.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r3.y, l(2) - else - mov r3.y, l(0) - endif -endif -uge r0.yw, r1.wwww, l(0, 2, 0, 1) -and r0.yw, r0.yyyw, l(0, 1, 0, 1) -ishl r0.yw, r1.xxxy, r0.yyyw -ushr r3.x, r3.y, l(1) -and r1.xy, r3.xyxx, l(1, 1, 0, 0) -iadd r0.yw, r0.yyyw, r1.xxxy -udiv r1.xy, null, r0.ywyy, l(80, 16, 0, 0) -ishl r1.w, r1.x, l(1) -imad r1.w, r1.y, r2.y, r1.w -iadd r1.z, r1.w, r1.z -imad r0.yw, -r1.xxxy, l(0, 80, 0, 16), r0.yyyw -imad r0.y, r0.w, l(80), r0.y -ishl r0.y, r0.y, l(1) -imad r0.y, r1.z, l(1280), r0.y -imul null, r0.y, r0.y, l(9) -movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) -movc r1.xy, r2.zzzz, r1.xyxx, l(0,0,0,0) -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r3.xyzw, r3.xyzw, vThreadID.xyyx -bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r2.w - ubfe r0.z, l(3), l(4), CB0[0][0].z - ushr r0.w, CB0[0][0].w, l(10) - ishl r0.w, r0.w, l(5) - ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) - ishr r1.z, r0.z, l(2) - ushr r0.w, r0.w, l(4) - and r0.w, r0.w, l(0x00007ffe) - imad r0.w, r1.z, r0.w, r4.x - ushr r1.w, r0.x, l(5) - imad r0.w, r0.w, r1.w, r4.y - ishl r1.w, r3.z, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r3.w, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.z, r1.z, r4.z - bfi r2.y, l(1), l(1), r1.z, l(0) - iadd r2.y, r2.y, r4.w - bfi r2.y, l(2), l(1), r2.y, l(0) - bfi r1.z, l(1), l(0), r1.z, r2.y - and r2.y, r1.w, l(240) - bfi r2.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r0.wwww, l(0, 0, 0, 0) - imad r2.yz, r2.yyyy, l(0, 2, 16, 0), r2.zzwz - bfi r2.yz, l(0, 4, 4, 0), l(0, 0, 3, 0), r1.wwww, r2.yyzy - bfi r0.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r0.zzzz, r2.yyyz - ubfe r1.w, l(3), l(6), r0.z - and r2.y, r1.z, l(6) - bfi r1.z, l(1), l(8), r1.z, l(0) - imad r1.z, r1.w, l(32), r1.z - imad r1.z, r2.y, l(4), r1.z - bfi r0.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r3.zzzz, r0.zzzw - bfi r0.w, l(9), l(3), r1.z, r0.w - bfi r0.z, l(6), l(0), r0.z, r0.w -else - ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) - ushr r0.x, r0.x, l(5) - imad r0.x, r4.y, r0.x, r4.x - ishl r1.zw, r3.zzzz, l(0, 0, 5, 7) - and r1.zw, r1.zzzw, l(0, 0, 448, 2048) - bfi r0.w, l(3), l(3), r3.w, r1.z - ishl r1.z, r1.z, l(1) - bfi r1.z, l(3), l(4), r3.w, r1.z - and r1.z, r1.z, l(992) - bfi r2.y, l(22), l(10), r0.x, r1.z - bfi r2.y, l(4), l(0), r0.w, r2.y - bfi r2.y, l(1), l(4), r3.z, r2.y - ishl r2.zw, r1.zzzz, l(0, 0, 3, 2) - bfi r2.zw, l(0, 0, 22, 22), l(0, 0, 13, 12), r0.xxxx, r2.zzzw - bfi r0.xw, l(4, 0, 0, 4), l(3, 0, 0, 2), r0.wwww, r2.zzzw - bfi r0.xw, l(1, 0, 0, 1), l(7, 0, 0, 6), r3.zzzz, r0.xxxw - bfi r0.x, l(12), l(0), r1.w, r0.x - and r0.w, r0.w, l(1792) - iadd r0.x, r0.x, r0.w - and r0.w, r4.z, l(2) - iadd r0.w, r4.w, r0.w - bfi r0.w, l(2), l(6), r0.w, l(0) - iadd r0.x, r0.x, r0.w - bfi r0.z, l(6), l(0), r2.y, r0.x -endif -imul null, r0.x, r0.z, l(9) -ushr r0.xy, r0.xyxx, l(3, 1, 0, 0) -imad r0.z, r1.y, l(3), r0.y -iadd r0.w, r1.x, r0.z -ld r1.yz, r0.wwww, T0[0].zxyw -and r0.w, CB0[0][0].z, l(0x01000000) -if_nz r0.w - ubfe r1.w, l(4), l(25), CB0[0][0].x - ieq r2.yz, r1.wwww, l(0, 5, 7, 0) - or r1.w, r2.z, r2.y - if_nz r1.w - bfi r1.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r1.zzyz, r1.yyzy - endif -endif -ieq r1.w, r2.x, l(4) -if_nz r1.w - mov r1.yz, r1.zzyz - mov r2.y, l(2) -else - mov r2.y, r2.x -endif -ieq r2.yzw, r2.yyyy, l(0, 1, 2, 3) -or r2.yz, r2.zzwz, r2.yyzy -if_nz r2.y - ishl r2.yw, r1.yyyz, l(0, 8, 0, 8) - and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.yywy, r3.xxyx -endif -if_nz r2.z - ushr r2.yz, r1.yyzy, l(0, 16, 16, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.yyzy -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -iadd r1.yz, r0.zzzz, l(0, 1, 2, 0) -ld r2.yz, r1.yyyy, T0[0].zxyw -if_nz r0.w - ubfe r0.z, l(4), l(25), CB0[0][0].x - ieq r4.xy, r0.zzzz, l(5, 7, 0, 0) - or r0.z, r4.y, r4.x - if_nz r0.z - bfi r2.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r2.zzyz, r2.yyzy - endif -endif -if_nz r1.w - mov r2.yz, r2.zzyz - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r4.xyz, r0.zzzz, l(1, 2, 3, 0) -or r4.xy, r4.yzyy, r4.xyxx -if_nz r4.x - ishl r4.xz, r2.yyzy, l(8, 0, 8, 0) - and r4.xz, r4.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r5.xy, r2.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.yz, r4.xxzx, r5.xxyx -endif -if_nz r4.y - ushr r4.xy, r2.yzyy, l(16, 16, 0, 0) - bfi r2.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r2.yyzy, r4.xxyx -endif -store_uav_typed U0[0].xyzw, r3.xxxx, r2.yzyy -ld r1.yz, r1.zzzz, T0[0].zxyw -if_nz r0.w - ubfe r0.z, l(4), l(25), CB0[0][0].x - ieq r2.yz, r0.zzzz, l(0, 5, 7, 0) - or r0.z, r2.z, r2.y - if_nz r0.z - bfi r1.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r1.zzyz, r1.yyzy - endif -endif -if_nz r1.w - mov r1.yz, r1.zzyz - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) -or r2.yz, r2.zzwz, r2.yyzy -if_nz r2.y - ishl r2.yw, r1.yyyz, l(0, 8, 0, 8) - and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.yywy, r4.xxyx -endif -if_nz r2.z - ushr r2.yz, r1.yyzy, l(0, 16, 16, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.yyzy -endif -store_uav_typed U0[0].xyzw, r3.yyyy, r1.yzyy -iadd r0.z, r1.x, r0.y -iadd r1.xy, r0.zzzz, l(3, 6, 0, 0) -ld r1.xz, r1.xxxx, T0[0].xzyw -if_nz r0.w - ubfe r0.z, l(4), l(25), CB0[0][0].x - ieq r2.yz, r0.zzzz, l(0, 5, 7, 0) - or r0.z, r2.z, r2.y - if_nz r0.z - bfi r1.xz, l(16, 0, 16, 0), l(0, 0, 0, 0), r1.zzxz, r1.xxzx - endif -endif -if_nz r1.w - mov r1.xz, r1.zzxz - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) -or r2.yz, r2.zzwz, r2.yyzy -if_nz r2.y - ishl r2.yw, r1.xxxz, l(0, 8, 0, 8) - and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r3.xy, r1.xzxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.xz, r2.yywy, r3.xxyx -endif -if_nz r2.z - ushr r2.yz, r1.xxzx, l(0, 16, 16, 0) - bfi r1.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r1.xxzx, r2.yyzy -endif -store_uav_typed U0[0].xyzw, r3.zzzz, r1.xzxx -iadd r4.xyzw, r0.yyyy, l(4, 5, 7, 8) -ld r0.yz, r4.xxxx, T0[0].zxyw -if_nz r0.w - ubfe r1.x, l(4), l(25), CB0[0][0].x - ieq r1.xz, r1.xxxx, l(5, 0, 7, 0) - or r1.x, r1.z, r1.x - if_nz r1.x - bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy - endif -endif -if_nz r1.w - mov r0.yz, r0.zzyz - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r2.yzw, r1.xxxx, l(0, 1, 2, 3) -or r1.xz, r2.zzwz, r2.yyzy -if_nz r1.x - ishl r2.yz, r0.yyzy, l(0, 8, 8, 0) - and r2.yz, r2.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r3.xy, r0.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r0.yz, r2.yyzy, r3.xxyx -endif -if_nz r1.z - ushr r1.xz, r0.yyzy, l(16, 0, 16, 0) - bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxzx -endif -store_uav_typed U0[0].xyzw, r3.wwww, r0.yzyy -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r0.yz, r4.yyyy, T0[0].zxyw -if_nz r0.w - ubfe r1.x, l(4), l(25), CB0[0][0].x - ieq r1.xz, r1.xxxx, l(5, 0, 7, 0) - or r1.x, r1.z, r1.x - if_nz r1.x - bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy - endif -endif -if_nz r1.w - mov r0.yz, r0.zzyz - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r2.yzw, r1.xxxx, l(0, 1, 2, 3) -or r1.xz, r2.zzwz, r2.yyzy -if_nz r1.x - ishl r2.yz, r0.yyzy, l(0, 8, 8, 0) - and r2.yz, r2.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r4.xy, r0.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r0.yz, r2.yyzy, r4.xxyx -endif -if_nz r1.z - ushr r1.xz, r0.yyzy, l(16, 0, 16, 0) - bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxzx -endif -store_uav_typed U0[0].xyzw, r3.xxxx, r0.yzyy -ld r0.yz, r1.yyyy, T0[0].zxyw -if_nz r0.w - ubfe r1.x, l(4), l(25), CB0[0][0].x - ieq r1.xy, r1.xxxx, l(5, 7, 0, 0) - or r1.x, r1.y, r1.x - if_nz r1.x - bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy - endif -endif -if_nz r1.w - mov r0.yz, r0.zzyz - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r1.xz, r0.yyzy, l(8, 0, 8, 0) - and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r2.yz, r0.yyzy, l(0, 8, 8, 0) - and r2.yz, r2.yyzy, l(0, 0x00ff00ff, 0x00ff00ff, 0) - iadd r0.yz, r1.xxzx, r2.yyzy -endif -if_nz r1.y - ushr r1.xy, r0.yzyy, l(16, 16, 0, 0) - bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxyx -endif -store_uav_typed U0[0].xyzw, r3.yyyy, r0.yzyy -ld r0.yz, r4.zzzz, T0[0].zxyw -if_nz r0.w - ubfe r1.x, l(4), l(25), CB0[0][0].x - ieq r1.xy, r1.xxxx, l(5, 7, 0, 0) - or r1.x, r1.y, r1.x - if_nz r1.x - bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy - endif -endif -if_nz r1.w - mov r0.yz, r0.zzyz - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r1.xz, r0.yyzy, l(8, 0, 8, 0) - and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r2.yz, r0.yyzy, l(0, 8, 8, 0) - and r2.yz, r2.yyzy, l(0, 0x00ff00ff, 0x00ff00ff, 0) - iadd r0.yz, r1.xxzx, r2.yyzy -endif -if_nz r1.y - ushr r1.xy, r0.yzyy, l(16, 16, 0, 0) - bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxyx -endif -store_uav_typed U0[0].xyzw, r3.zzzz, r0.yzyy -ld r0.yz, r4.wwww, T0[0].zxyw -if_nz r0.w - ubfe r0.w, l(4), l(25), CB0[0][0].x - ieq r1.xy, r0.wwww, l(5, 7, 0, 0) - or r0.w, r1.y, r1.x - if_nz r0.w - bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy - endif -endif -if_nz r1.w - mov r0.yz, r0.zzyz - mov r2.x, l(2) -endif -ieq r1.xyz, r2.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r1.xz, r0.yyzy, l(8, 0, 8, 0) - and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r2.xy, r0.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r0.yz, r1.xxzx, r2.xxyx -endif -if_nz r1.y - ushr r1.xy, r0.yzyy, l(16, 16, 0, 0) - bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxyx -endif -store_uav_typed U0[0].xyzw, r3.wwww, r0.yzyy -ret -// Approximately 368 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.cso deleted file mode 100644 index 469e34084..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h deleted file mode 100644 index 7029a3605..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h +++ /dev/null @@ -1,501 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_fast_64bpp_4xmsaa.cs.hlsl -const uint8_t resolve_fast_64bpp_4xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x0E, 0x47, 0x43, 0x3B, 0x70, 0x79, 0x6D, 0x3C, - 0xF2, 0x2C, 0xB0, 0x53, 0x89, 0x62, 0xB0, 0x6F, 0x01, 0x00, 0x00, 0x00, - 0x44, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 0x00, - 0xA8, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 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0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x46, 0x0B, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x15, 0x00, 0x00, 0x01, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x0B, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0x9A, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt deleted file mode 100644 index f84345e28..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt +++ /dev/null @@ -1,202 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 6 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -ubfe r1.w, l(12), l(13), CB0[0][0].x -and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) -uge r2.z, l(3), r1.y -if_nz r2.z - mov r4.y, r1.y -else - ieq r2.z, r1.y, l(5) - if_nz r2.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) -ushr r4.x, r4.y, l(1) -bfi r2.xy, l(3, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx -udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) -ishl r1.y, r2.z, l(1) -imad r1.y, r2.w, r3.y, r1.y -iadd r1.y, r1.y, r1.w -imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx -imad r1.w, r2.y, l(80), r2.x -ishl r1.w, r1.w, l(1) -imad r1.y, r1.y, l(1280), r1.w -ushr r1.y, r1.y, l(1) -ld r2.xy, r1.yyyy, T0[0].xywz -iadd r4.xyz, r1.yyyy, l(2, 4, 6, 0) -ld r2.zw, r4.xxxx, T0[0].zwyx -ld r5.xy, r4.yyyy, T0[0].xywz -ld r5.zw, r4.zzzz, T0[0].zwyx -if_nz r3.z - ubfe r1.y, l(4), l(25), CB0[0][0].x - ieq r1.yw, r1.yyyy, l(0, 5, 0, 7) - or r1.y, r1.w, r1.y - if_nz r1.y - mov r2.xyzw, r2.yxzw - bfi r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r2.xywz, r2.yxzw - mov r5.xyzw, r5.yxzw - bfi r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xywz, r5.yxzw - endif -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r4.x - ushr r3.y, r1.x, l(5) - imad r1.z, r1.z, r3.y, r4.y - ishl r3.y, r0.z, l(11) - and r3.y, r3.y, l(0x00003000) - bfi r3.y, l(3), l(9), r0.w, r3.y - ishr r3.y, r3.y, l(6) - iadd r1.w, r1.w, r4.z - bfi r3.z, l(1), l(1), r1.w, l(0) - iadd r3.z, r3.z, r4.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.z - bfi r3.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r1.zzzz, l(0, 0, 0, 0) - imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz - bfi r1.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r1.yyyy, r3.yyzy - bfi r3.y, l(1), l(4), r0.z, l(0) - ubfe r3.z, l(3), l(6), r1.y - and r3.w, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.z, l(32), r1.w - imad r1.w, r3.w, l(4), r1.w - bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r4.y, r0.x, r4.x - ishl r1.xz, r0.zzzz, l(6, 0, 7, 0) - and r1.xz, r1.xxzx, l(896, 0, 2048, 0) - bfi r0.y, l(3), l(4), r0.w, r1.x - bfi r0.y, l(22), l(10), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r0.y, r0.y, r0.z - ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) - bfi r1.xw, l(3, 0, 0, 3), l(7, 0, 0, 6), r0.wwww, r1.xxxw - bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r1.xxxw - imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.z, r0.z, l(1792) - iadd r0.x, r0.x, r0.z - and r0.z, r4.z, l(2) - iadd r0.z, r4.w, r0.z - bfi r0.z, l(2), l(6), r0.z, l(0) - iadd r0.x, r0.x, r0.z - bfi r1.y, l(6), l(0), r0.y, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ieq r0.y, r3.x, l(4) -if_nz r0.y - mov r2.xyzw, r2.yxwz - mov r0.z, l(2) -else - mov r0.z, r3.x -endif -ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) -or r0.zw, r1.yyyz, r1.xxxy -if_nz r0.z - ishl r1.xyzw, r2.xywz, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xywz, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xywz, r4.xywz -endif -if_nz r0.w - ushr r1.xyzw, r2.xywz, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xywz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xywz -iadd r0.x, r0.x, l(2) -if_nz r0.y - mov r5.xyzw, r5.yxwz - mov r3.x, l(2) -endif -ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r5.xywz, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r5.xywz, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r1.xywz, r2.xywz -endif -if_nz r0.z - ushr r1.xyzw, r5.xywz, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xywz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xywz -ret -// Approximately 154 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.cso deleted file mode 100644 index 56fa02f68..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.h deleted file mode 100644 index 3dd42abc1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.h +++ /dev/null @@ -1,2980 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_128bpp_2xres.cs.hlsl -const uint8_t resolve_full_128bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC7, 0x18, 0x5D, 0xC4, 0xEA, 0x1F, 0xC8, 0xF2, - 0xFF, 0xB5, 0x9A, 0x33, 0xC3, 0x01, 0xC9, 0x1B, 0x01, 0x00, 0x00, 0x00, - 0x80, 0x8B, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0xE4, 0x8A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 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0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.txt deleted file mode 100644 index ea92c7129..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.txt +++ /dev/null @@ -1,1216 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 21 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000) -ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r4.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.zw, r3.yyyy, l(0, 0, 2, 1) -and r1.zw, r1.zzzw, l(0, 0, 1, 1) -ishl r1.xy, r1.xyxx, r1.zwzz -ushr r4.x, r4.y, l(1) -and r1.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r1.xy, r1.zwzz, r1.xyxx -udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) -movc r0.w, r3.z, l(1), l(0) -ishl r3.y, r1.z, r0.w -imad r2.y, r1.w, r2.y, r3.y -iadd r2.y, r2.y, r3.x -imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx -imad r1.x, r1.y, l(80), r1.x -ishl r0.w, r1.x, r0.w -imad r0.w, r2.y, l(1280), r0.w -ld r1.xyzw, r0.wwww, T0[0].xzyw -if_nz r3.z - iadd r2.y, r0.w, l(1) - ld r4.xyzw, r2.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r1.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r1.xz, r8.zzwz - ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r4.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.xz, r1.xxzx - f16tof32 r5.yw, r8.xxxy - f16tof32 r6.xz, r1.yywy - f16tof32 r6.yw, r8.zzzw - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r7.xz, r4.xxzx - f16tof32 r7.yw, r8.xxxy - f16tof32 r1.zw, r4.wwwy - f16tof32 r1.xy, r8.zwzz - break - default - mov r5.xy, r1.xzxx - mov r5.zw, l(0,0,0,0) - mov r6.xy, r1.ywyy - mov r6.zw, l(0,0,0,0) - mov r7.xy, r4.xzxx - mov r7.zw, l(0,0,0,0) - mov r1.xw, r4.wwwy - mov r1.yz, l(0,0,0,0) - break - endswitch -else - switch r3.w - case l(0) - case l(1) - ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) - and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) - and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) - mov r8.x, r1.x - mov r8.yz, r4.xxyx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - utof r3.xy, r4.zwzz - ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) - mov r8.x, r1.z - mov r8.yz, r4.xxwx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r4.x, r1.y - and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r9.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r11.xyz, r9.xyzx - iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) - movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) - iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) - movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx - ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) - iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r9.xyzx, r4.xyzx - movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) - utof r8.xy, r4.xwxx - mov r4.x, r1.w - and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r10.xyzx, r4.xyzx - movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) - mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r5.w, r3.x - mov r6.w, r3.y - mov r7.w, r4.x - mov r1.y, r4.y - break - case l(4) - ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r8.xz, r4.xxyx - mov r8.yw, r1.xxxz - ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r1.xz, r4.zzwz - ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.x, r1.x - f16tof32 r5.y, r4.x - f16tof32 r6.x, r1.z - f16tof32 r6.y, r4.y - f16tof32 r7.x, r1.y - f16tof32 r7.y, r4.z - f16tof32 r1.w, r1.w - f16tof32 r1.x, r4.w - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - default - mov r5.x, r1.x - mov r5.yzw, l(0,0,0,0) - mov r6.x, r1.z - mov r6.yzw, l(0,0,0,0) - mov r7.x, r1.y - mov r7.yzw, l(0,0,0,0) - mov r1.xyz, l(0,0,0,0) - break - endswitch -endif -ibfe r2.y, l(6), l(16), CB0[0][0].z -ishl r2.y, r2.y, l(23) -iadd r2.y, r2.y, l(0x3f800000) -uge r3.x, r0.y, l(4) -if_nz r3.x - mul r3.x, r2.y, l(0.500000) - ishl r3.y, l(80), r3.z - iadd r3.y, r0.w, r3.y - ld r4.xyzw, r3.yyyy, T0[0].xzyw - if_nz r3.z - iadd r3.y, r0.w, l(161) - ld r8.xyzw, r3.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r4.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r12.zzwz - ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.xz, r4.xxzx - f16tof32 r9.yw, r12.xxxy - f16tof32 r10.xz, r4.yywy - f16tof32 r10.yw, r12.zzzw - ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r11.xz, r8.xxzx - f16tof32 r11.yw, r12.xxxy - f16tof32 r4.zw, r8.wwwy - f16tof32 r4.xy, r12.zwzz - break - default - mov r9.xy, r4.xzxx - mov r9.zw, l(0,0,0,0) - mov r10.xy, r4.ywyy - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.xzxx - mov r11.zw, l(0,0,0,0) - mov r4.xw, r8.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r12.x, r4.x - mov r12.yz, r8.xxyx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - utof r8.xy, r8.zwzz - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r13.x, r4.z - mov r13.yz, r12.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mov r12.x, r4.y - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r8.zw, r12.xxxw - mov r12.x, r4.w - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) - mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r9.w, r8.x - mov r10.w, r8.y - mov r11.w, r8.z - mov r4.y, r8.w - break - case l(4) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r12.xz, r8.xxyx - mov r12.yw, r4.xxxz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.x, r4.x - f16tof32 r9.y, r8.x - f16tof32 r10.x, r4.z - f16tof32 r10.y, r8.y - f16tof32 r11.x, r4.y - f16tof32 r11.y, r8.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r8.w - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r9.x, r4.x - mov r9.yzw, l(0,0,0,0) - mov r10.x, r4.z - mov r10.yzw, l(0,0,0,0) - mov r11.x, r4.y - mov r11.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r5.xyzw, r9.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - add r7.xyzw, r7.xyzw, r11.xyzw - add r1.xyzw, r1.xyzw, r4.xyzw - uge r0.y, r0.y, l(6) - if_nz r0.y - mul r2.y, r2.y, l(0.250000) - ishl r4.xy, l(1, 81, 0, 0), r3.zzzz - iadd r4.xy, r0.wwww, r4.xyxx - ld r8.xyzw, r4.xxxx, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(3) - ld r9.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r8.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r13.zzwz - ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r9.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r9.xz, r13.zzwz - ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.xz, r8.xxzx - f16tof32 r10.yw, r13.xxxy - f16tof32 r11.xz, r8.yywy - f16tof32 r11.yw, r13.zzzw - ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - f16tof32 r12.xz, r9.xxzx - f16tof32 r12.yw, r13.xxxy - f16tof32 r8.zw, r9.wwwy - f16tof32 r8.xy, r13.zwzz - break - default - mov r10.xy, r8.xzxx - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.ywyy - mov r11.zw, l(0,0,0,0) - mov r12.xy, r9.xzxx - mov r12.zw, l(0,0,0,0) - mov r8.xw, r9.wwwy - mov r8.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) - and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) - and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) - mov r13.x, r8.x - mov r13.yz, r9.xxyx - and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) - utof r4.xz, r9.zzwz - ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) - mov r13.x, r8.z - mov r13.yz, r9.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r9.x, r8.y - and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r14.xyzx, r9.xyzx - movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) - utof r13.xy, r9.xwxx - mov r9.x, r8.w - and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r15.xyzx, r9.xyzx - movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) - mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r10.w, r4.x - mov r11.w, r4.z - mov r12.w, r9.x - mov r8.y, r9.y - break - case l(4) - ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r9.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.xz, r9.zzwz - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.x, r8.x - f16tof32 r10.y, r9.x - f16tof32 r11.x, r8.z - f16tof32 r11.y, r9.y - f16tof32 r12.x, r8.y - f16tof32 r12.y, r9.z - f16tof32 r8.w, r8.w - f16tof32 r8.x, r9.w - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - default - mov r10.x, r8.x - mov r10.yzw, l(0,0,0,0) - mov r11.x, r8.z - mov r11.yzw, l(0,0,0,0) - mov r12.x, r8.y - mov r12.yzw, l(0,0,0,0) - mov r8.xyz, l(0,0,0,0) - break - endswitch - endif - add r9.xyzw, r5.xyzw, r10.xyzw - add r10.xyzw, r6.xyzw, r11.xyzw - add r11.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r1.wxzy, r8.wxzy - ld r4.xyzw, r4.yyyy, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(163) - ld r12.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r4.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r16.zzwz - ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r12.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r12.xz, r16.zzwz - ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.xz, r4.xxzx - f16tof32 r13.yw, r16.xxxy - f16tof32 r14.xz, r4.yywy - f16tof32 r14.yw, r16.zzzw - ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - f16tof32 r15.xz, r12.xxzx - f16tof32 r15.yw, r16.xxxy - f16tof32 r4.zw, r12.wwwy - f16tof32 r4.xy, r16.zwzz - break - default - mov r13.xy, r4.xzxx - mov r13.zw, l(0,0,0,0) - mov r14.xy, r4.ywyy - mov r14.zw, l(0,0,0,0) - mov r15.xy, r12.xzxx - mov r15.zw, l(0,0,0,0) - mov r4.xw, r12.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r16.x, r4.x - mov r16.yz, r12.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r0.yw, r12.zzzw - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r16.x, r4.z - mov r16.yz, r12.xxwx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r12.x, r4.y - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r16.xyzx, r12.xyzx - movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r3.yz, r12.xxwx - mov r12.x, r4.w - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r17.xyzx, r12.xyzx - movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r13.w, r0.y - mov r14.w, r0.w - mov r15.w, r3.y - mov r4.y, r3.z - break - case l(4) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r16.xz, r12.xxyx - mov r16.yw, r4.xxxz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.x, r4.x - f16tof32 r13.y, r12.x - f16tof32 r14.x, r4.z - f16tof32 r14.y, r12.y - f16tof32 r15.x, r4.y - f16tof32 r15.y, r12.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r12.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r13.x, r4.x - mov r13.yzw, l(0,0,0,0) - mov r14.x, r4.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r4.y - mov r15.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r9.xyzw, r13.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - add r7.xyzw, r11.xyzw, r15.xyzw - add r1.xyzw, r4.xyzw, r8.ywzx - else - mov r2.y, r3.x - endif -endif -mul r3.xyzw, r2.yyyy, r5.xyzw -mul r4.xyzw, r2.yyyy, r6.xyzw -mul r5.xyzw, r2.yyyy, r7.xyzw -mul r1.xyzw, r1.wxzy, r2.yyyy -if_nz r2.z - mov r3.xz, r3.zzxz - mov r4.xz, r4.zzxz - mov r5.xz, r5.zzxz - mov r6.xy, r1.zxzz -else - mov r6.xy, r1.xzxx -endif -if_nz r2.w - if_z vThreadID.x - mov r3.xyzw, r4.xyzw - mov r6.zw, r1.yyyw - mov r5.xyzw, r6.xzyw - endif - if_z vThreadID.y - mov r3.xyzw, r5.xyzw - mov r4.xz, r6.xxyx - mov r4.yw, r1.yyyw - endif -endif -bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, vThreadID.xyyx -bfi r2.y, l(10), l(5), CB0[0][0].w, l(0) -and r2.z, CB0[0][0].z, l(8) -if_nz r2.z - ubfe r2.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r7.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r6.z, r2.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r6.z, r2.w, r7.x - ushr r6.w, r2.y, l(5) - imad r2.w, r2.w, r6.w, r7.y - ishl r6.w, r0.z, l(12) - and r6.w, r6.w, l(0x00006000) - bfi r6.w, l(3), l(10), r0.w, r6.w - ishr r6.w, r6.w, l(6) - iadd r6.z, r6.z, r7.z - bfi r7.x, l(1), l(1), r6.z, l(0) - iadd r7.x, r7.x, r7.w - bfi r7.x, l(2), l(1), r7.x, l(0) - bfi r6.z, l(1), l(0), r6.z, r7.x - bfi r7.xy, l(18, 18, 0, 0), l(12, 15, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r7.xy, r6.wwww, l(2, 16, 0, 0), r7.xyxx - bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 10, 13), r2.zzzz, r7.xxxy - bfi r6.w, l(1), l(4), r0.z, l(0) - ubfe r7.x, l(3), l(6), r2.z - and r7.y, r6.z, l(6) - bfi r6.z, l(1), l(8), r6.z, l(0) - imad r6.z, r7.x, l(32), r6.z - imad r6.z, r7.y, l(4), r6.z - bfi r2.zw, l(0, 0, 5, 5), l(0, 0, 0, 3), r6.wwww, r2.zzzw - bfi r2.w, l(9), l(3), r6.z, r2.w - bfi r2.z, l(6), l(0), r2.z, r2.w -else - ishr r7.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r2.y, l(5) - imad r0.x, r7.y, r0.x, r7.x - ishl r0.y, r0.z, l(7) - and r2.yw, r0.yyyy, l(0, 1792, 0, 2048) - bfi r0.y, l(3), l(5), r0.w, r2.y - bfi r0.y, l(21), l(11), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r0.y, r0.y, r0.z - ishl r6.zw, r2.yyyy, l(0, 0, 3, 2) - bfi r6.zw, l(0, 0, 3, 3), l(0, 0, 8, 7), r0.wwww, r6.zzzw - bfi r0.xw, l(21, 0, 0, 21), l(14, 0, 0, 13), r0.xxxx, r6.zzzw - imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx - bfi r0.x, l(12), l(0), r2.w, r0.x - and r0.z, r0.z, l(1792) - iadd r0.x, r0.x, r0.z - and r0.z, r7.z, l(2) - iadd r0.z, r7.w, r0.z - bfi r0.z, l(2), l(6), r0.z, l(0) - iadd r0.x, r0.x, r0.z - bfi r2.z, l(6), l(0), r0.y, r0.x -endif -ushr r0.x, r2.z, l(2) -ieq r0.y, r2.x, l(5) -if_nz r0.y - mov r3.xyzw, r3.wzyx - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r0.w, r0.z, l(4) -if_nz r0.w - mov r3.xyzw, r3.yxwz - mov r0.z, l(2) -endif -ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) -or r0.zw, r2.zzzw, r2.yyyz -if_nz r0.z - ishl r7.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r0.w - ushr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r7.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw -iadd r0.zw, r0.xxxx, l(0, 0, 1, 3) -if_nz r0.y - mov r4.xyzw, r4.wzyx - mov r2.y, l(2) -else - mov r2.y, r2.x -endif -ieq r2.z, r2.y, l(4) -if_nz r2.z - mov r4.xyzw, r4.yxwz - mov r2.y, l(2) -endif -ieq r2.yzw, r2.yyyy, l(0, 1, 2, 3) -or r2.yz, r2.zzwz, r2.yyzy -if_nz r2.y - ishl r3.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r3.xyzw, r7.xyzw -endif -if_nz r2.z - ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r4.xyzw -iadd r0.z, r0.x, l(2) -if_nz r0.y - mov r5.xyzw, r5.wzyx - mov r2.y, l(2) -else - mov r2.y, r2.x -endif -ieq r2.z, r2.y, l(4) -if_nz r2.z - mov r5.xyzw, r5.yxwz - mov r2.y, l(2) -endif -ieq r2.yzw, r2.yyyy, l(0, 1, 2, 3) -or r2.yz, r2.zzwz, r2.yyzy -if_nz r2.y - ishl r3.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.z - ushr r3.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r5.xyzw -if_nz r0.y - mov r1.xz, r1.wwyw - mov r1.yw, r6.yyyx - mov r2.x, l(2) -else - mov r1.xz, r6.xxyx -endif -ieq r0.y, r2.x, l(4) -if_nz r0.y - mov r1.xyzw, r1.yxwz - mov r2.x, l(2) -endif -ieq r2.xyz, r2.xxxx, l(1, 2, 3, 0) -or r0.yz, r2.yyzy, r2.xxyx -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -ret -// Approximately 1169 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.cso deleted file mode 100644 index dee545a04..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.h deleted file mode 100644 index 05f3b3d67..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.h +++ /dev/null @@ -1,1854 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_128bpp.cs.hlsl -const uint8_t resolve_full_128bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x81, 0x4D, 0xF9, 0x6C, 0x1A, 0xC1, 0xAA, 0xD2, - 0xFE, 0x1B, 0x68, 0x49, 0x42, 0x80, 0x9E, 0xDC, 0x01, 0x00, 0x00, 0x00, - 0xB4, 0x56, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 0x00, - 0x18, 0x56, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x6C, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, - 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, - 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, - 0x52, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x43, 0x6F, 0x6E, 0x73, 0x74, - 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xAB, 0xAB, 0xD6, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC, 0x01, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 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a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.txt deleted file mode 100644 index 3fba393f5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.txt +++ /dev/null @@ -1,793 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 15 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) -ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r2.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r2.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -movc r1.w, r4.z, l(1), l(0) -ishl r2.w, r5.x, r1.w -imad r2.w, r5.y, r3.y, r2.w -iadd r2.w, r2.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r1.w, r2.x, r1.w -imad r1.w, r2.w, l(1280), r1.w -iadd r2.x, r2.z, r4.z -ishl r2.x, l(4), r2.x -ishl r1.w, r1.w, l(2) -if_nz r4.z - ieq r2.y, r2.x, l(8) - if_nz r2.y - ld_raw r5.xyzw, r1.w, T0[0].zwxy - mov r6.xy, r5.zwzz - else - ld_raw r6.xy, r1.w, T0[0].xyxx - iadd r2.y, r2.x, r1.w - ld_raw r5.xy, r2.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) - ishr r7.xyzw, r6.zxwy, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) - ishr r7.xyzw, r5.zxwy, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yz, r6.xxyx, l(0, 16, 16, 0) - f16tof32 r6.xz, r6.xxyx - f16tof32 r6.yw, r2.yyyz - ushr r2.yz, r5.xxyx, l(0, 16, 16, 0) - f16tof32 r5.xz, r5.xxyx - f16tof32 r5.yw, r2.yyyz - break - default - mov r6.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - endswitch -else - ieq r2.y, r2.x, l(4) - if_nz r2.y - ld_raw r5.xy, r1.w, T0[0].yxxx - mov r6.x, r5.y - else - ld_raw r6.x, r1.w, T0[0].xxxx - iadd r2.y, r2.x, r1.w - ld_raw r5.x, r2.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r7.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r7.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r2.yzw, r6.xxyz, l(0, 1023, 1023, 1023) - and r7.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r8.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r9.xyz, r7.xyzx - iadd r9.xyz, r9.xyzx, l(-24, -24, -24, 0) - movc r9.xyz, r7.xyzx, r9.xyzx, l(8,8,8,0) - iadd r10.xyz, -r9.xyzx, l(1, 1, 1, 0) - movc r10.xyz, r8.xyzx, r8.xyzx, r10.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r9.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r7.xyz, r8.xyzx, r7.xyzx, r9.xyzx - ishl r8.xyz, r10.xyzx, l(23, 23, 23, 0) - iadd r8.xyz, r8.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r7.xyz, r7.xyzx, l(16, 16, 16, 0) - iadd r7.xyz, r8.xyzx, r7.xyzx - movc r6.xyz, r2.yzwy, r7.xyzx, l(0,0,0,0) - utof r2.y, r6.w - mul r6.w, r2.y, l(0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r2.yzw, r5.xxyz, l(0, 1023, 1023, 1023) - and r7.xyz, r5.xyzx, l(127, 127, 127, 0) - ubfe r8.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx - firstbit_hi r9.xyz, r7.xyzx - iadd r9.xyz, r9.xyzx, l(-24, -24, -24, 0) - movc r9.xyz, r7.xyzx, r9.xyzx, l(8,8,8,0) - iadd r10.xyz, -r9.xyzx, l(1, 1, 1, 0) - movc r10.xyz, r8.xyzx, r8.xyzx, r10.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r9.xyzx, r5.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r7.xyz, r8.xyzx, r7.xyzx, r9.xyzx - ishl r8.xyz, r10.xyzx, l(23, 23, 23, 0) - iadd r8.xyz, r8.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r7.xyz, r7.xyzx, l(16, 16, 16, 0) - iadd r7.xyz, r8.xyzx, r7.xyzx - movc r5.xyz, r2.yzwy, r7.xyzx, l(0,0,0,0) - utof r2.y, r5.w - mul r5.w, r2.y, l(0.333333) - break - case l(4) - ishl r6.y, r6.x, l(16) - ishr r2.yz, r6.yyxy, l(0, 16, 16, 0) - itof r2.yz, r2.yyzy - mul r2.yz, r2.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r6.xy, r2.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r5.y, r5.x, l(16) - ishr r2.yz, r5.yyxy, l(0, 16, 16, 0) - itof r2.yz, r2.yyzy - mul r2.yz, r2.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r5.xy, r2.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r2.y, r6.x, l(16) - f16tof32 r6.x, r6.x - f16tof32 r6.y, r2.y - ushr r2.y, r5.x, l(16) - f16tof32 r5.x, r5.x - f16tof32 r5.y, r2.y - mov r6.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break - endswitch -endif -ibfe r2.y, l(6), l(16), CB0[0][0].z -ishl r2.y, r2.y, l(23) -iadd r2.y, r2.y, l(0x3f800000) -uge r2.z, r1.y, l(4) -if_nz r2.z - mul r2.z, r2.y, l(0.500000) - ishl r2.w, l(320), r4.z - iadd r2.w, r1.w, r2.w - if_nz r4.z - ieq r3.y, r2.x, l(8) - if_nz r3.y - ld_raw r7.xyzw, r2.w, T0[0].zwxy - mov r8.xy, r7.zwzz - else - ld_raw r8.xy, r2.w, T0[0].xyxx - iadd r3.y, r2.x, r2.w - ld_raw r7.xy, r3.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.xyxx, l(16, 16, 0, 0) - f16tof32 r8.xz, r8.xxyx - f16tof32 r8.yw, r4.xxxy - ushr r4.xy, r7.xyxx, l(16, 16, 0, 0) - f16tof32 r7.xz, r7.xxyx - f16tof32 r7.yw, r4.xxxy - break - default - mov r8.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - endswitch - else - ieq r3.y, r2.x, l(4) - if_nz r3.y - ld_raw r7.xy, r2.w, T0[0].yxxx - mov r8.x, r7.y - else - ld_raw r8.x, r2.w, T0[0].xxxx - iadd r2.w, r2.x, r2.w - ld_raw r7.x, r2.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r8.yzw, r8.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx - ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r8.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) - utof r2.w, r8.w - mul r8.w, r2.w, l(0.333333) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r9.xyz, r7.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r7.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r7.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx - ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r7.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) - utof r2.w, r7.w - mul r7.w, r2.w, l(0.333333) - break - case l(4) - ishl r8.y, r8.x, l(16) - ishr r4.xy, r8.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r8.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r7.y, r7.x, l(16) - ishr r4.xy, r7.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - case l(6) - ushr r2.w, r8.x, l(16) - f16tof32 r8.x, r8.x - f16tof32 r8.y, r2.w - ushr r2.w, r7.x, l(16) - f16tof32 r7.x, r7.x - f16tof32 r7.y, r2.w - mov r8.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - default - mov r8.yzw, l(0,0,0,0) - mov r7.yzw, l(0,0,0,0) - break - endswitch - endif - add r6.xyzw, r6.xyzw, r8.xyzw - add r5.xyzw, r5.xyzw, r7.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r2.y, r2.y, l(0.250000) - ishl r4.xy, l(4, 324, 0, 0), r4.zzzz - iadd r1.yw, r1.wwww, r4.xxxy - if_nz r4.z - ieq r2.w, r2.x, l(8) - if_nz r2.w - ld_raw r7.xyzw, r1.y, T0[0].zwxy - mov r8.xy, r7.zwzz - else - ld_raw r8.xy, r1.y, T0[0].xyxx - iadd r2.w, r2.x, r1.y - ld_raw r7.xy, r2.w, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.xyxx, l(16, 16, 0, 0) - f16tof32 r8.xz, r8.xxyx - f16tof32 r8.yw, r4.xxxy - ushr r4.xy, r7.xyxx, l(16, 16, 0, 0) - f16tof32 r7.xz, r7.xxyx - f16tof32 r7.yw, r4.xxxy - break - default - mov r8.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - endswitch - else - ieq r2.w, r2.x, l(4) - if_nz r2.w - ld_raw r7.xy, r1.y, T0[0].yxxx - mov r8.x, r7.y - else - ld_raw r8.x, r1.y, T0[0].xxxx - iadd r1.y, r2.x, r1.y - ld_raw r7.x, r1.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r8.yzw, r8.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx - ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r8.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) - utof r1.y, r8.w - mul r8.w, r1.y, l(0.333333) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r9.xyz, r7.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r7.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r7.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx - ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r7.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) - utof r1.y, r7.w - mul r7.w, r1.y, l(0.333333) - break - case l(4) - ishl r8.y, r8.x, l(16) - ishr r4.xy, r8.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r8.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r7.y, r7.x, l(16) - ishr r4.xy, r7.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - case l(6) - ushr r1.y, r8.x, l(16) - f16tof32 r8.x, r8.x - f16tof32 r8.y, r1.y - ushr r1.y, r7.x, l(16) - f16tof32 r7.x, r7.x - f16tof32 r7.y, r1.y - mov r8.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - default - mov r8.yzw, l(0,0,0,0) - mov r7.yzw, l(0,0,0,0) - break - endswitch - endif - add r8.xyzw, r6.xyzw, r8.xyzw - add r7.xyzw, r5.xyzw, r7.xyzw - if_nz r4.z - ieq r1.y, r2.x, l(8) - if_nz r1.y - ld_raw r9.xyzw, r1.w, T0[0].zwxy - mov r10.xy, r9.zwzz - else - ld_raw r10.xy, r1.w, T0[0].xyxx - iadd r1.y, r2.x, r1.w - ld_raw r9.xy, r1.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r11.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r11.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - break - default - mov r10.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - endswitch - else - ieq r1.y, r2.x, l(4) - if_nz r1.y - ld_raw r9.xy, r1.w, T0[0].yxxx - mov r10.x, r9.y - else - ld_raw r10.x, r1.w, T0[0].xxxx - iadd r1.y, r2.x, r1.w - ld_raw r9.x, r1.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r4.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r10.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r4.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r9.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r4.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r10.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r4.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r9.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r4.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx - ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r12.xyzx, r11.xyzx - movc r10.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) - utof r1.y, r10.w - mul r10.w, r1.y, l(0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r4.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx - ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r12.xyzx, r11.xyzx - movc r9.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) - utof r1.y, r9.w - mul r9.w, r1.y, l(0.333333) - break - case l(4) - ishl r10.y, r10.x, l(16) - ishr r1.yw, r10.yyyx, l(0, 16, 0, 16) - itof r1.yw, r1.yyyw - mul r1.yw, r1.yyyw, l(0.000000, 0.000977, 0.000000, 0.000977) - max r10.xy, r1.ywyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r9.y, r9.x, l(16) - ishr r1.yw, r9.yyyx, l(0, 16, 0, 16) - itof r1.yw, r1.yyyw - mul r1.yw, r1.yyyw, l(0.000000, 0.000977, 0.000000, 0.000977) - max r9.xy, r1.ywyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r1.y, r10.x, l(16) - f16tof32 r10.x, r10.x - f16tof32 r10.y, r1.y - ushr r1.y, r9.x, l(16) - f16tof32 r9.x, r9.x - f16tof32 r9.y, r1.y - mov r10.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r10.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - endif - add r6.xyzw, r8.xyzw, r10.xyzw - add r5.xyzw, r7.xyzw, r9.xyzw - else - mov r2.y, r2.z - endif -endif -mul r4.xyzw, r2.yyyy, r6.xyzw -mul r2.xyzw, r2.yyyy, r5.xyzw -if_nz r3.z - mov r4.xz, r4.zzxz - mov r2.xz, r2.zzxz -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r5.x - ushr r3.y, r1.x, l(5) - imad r1.z, r1.z, r3.y, r5.y - ishl r3.y, r0.z, l(12) - and r3.y, r3.y, l(0x00006000) - bfi r3.y, l(3), l(10), r0.w, r3.y - ishr r3.y, r3.y, l(6) - iadd r1.w, r1.w, r5.z - bfi r3.z, l(1), l(1), r1.w, l(0) - iadd r3.z, r3.z, r5.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.z - bfi r3.zw, l(0, 0, 18, 18), l(0, 0, 12, 15), r1.zzzz, l(0, 0, 0, 0) - imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz - bfi r1.yz, l(0, 2, 2, 0), l(0, 10, 13, 0), r1.yyyy, r3.yyzy - bfi r3.y, l(1), l(4), r0.z, l(0) - ubfe r3.z, l(3), l(6), r1.y - and r3.w, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.z, l(32), r1.w - imad r1.w, r3.w, l(4), r1.w - bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r0.y, r0.z, l(7) - and r1.xz, r0.yyyy, l(1792, 0, 2048, 0) - bfi r0.y, l(3), l(5), r0.w, r1.x - bfi r0.y, l(21), l(11), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r0.y, r0.y, r0.z - ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) - bfi r1.xw, l(3, 0, 0, 3), l(8, 0, 0, 7), r0.wwww, r1.xxxw - bfi r0.xw, l(21, 0, 0, 21), l(14, 0, 0, 13), r0.xxxx, r1.xxxw - imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.z, r0.z, l(1792) - iadd r0.x, r0.x, r0.z - and r0.z, r5.z, l(2) - iadd r0.z, r5.w, r0.z - bfi r0.z, l(2), l(6), r0.z, l(0) - iadd r0.x, r0.x, r0.z - bfi r1.y, l(6), l(0), r0.y, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ieq r0.y, r3.x, l(5) -if_nz r0.y - mov r4.yw, r4.wwwy - mov r4.xyzw, r4.yzwx - mov r0.z, l(2) -else - mov r0.z, r3.x -endif -ieq r0.w, r0.z, l(4) -if_nz r0.w - mov r4.xyzw, r4.yxwz - mov r0.z, l(2) -endif -ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) -or r0.zw, r1.yyyz, r1.xxxy -if_nz r0.z - ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r1.xyzw, r5.xyzw -endif -if_nz r0.w - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -iadd r0.x, r0.x, l(2) -if_nz r0.y - mov r2.yw, r2.wwwy - mov r2.xyzw, r2.yzwx - mov r3.x, l(2) -endif -ieq r0.y, r3.x, l(4) -if_nz r0.y - mov r2.xyzw, r2.yxwz - mov r3.x, l(2) -endif -ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -ret -// Approximately 745 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.cso deleted file mode 100644 index ed02dd16a..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h deleted file mode 100644 index e3fe6834f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h +++ /dev/null @@ -1,5095 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_128bpp_from_32bpp_3xres.cs.hlsl -const uint8_t resolve_full_128bpp_from_32bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x2C, 0xBE, 0xEB, 0x0D, 0xB7, 0x0A, 0x3A, 0x6C, - 0x41, 0x1C, 0xE9, 0x4A, 0x6C, 0x83, 0x71, 0x78, 0x01, 0x00, 0x00, 0x00, - 0x9C, 0xEE, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 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2c19efdea..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.txt +++ /dev/null @@ -1,1914 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 25 -dcl_thread_group 8, 8, 1 -and r0.xyzw, CB0[0][0].zxzx, l(7, 0x40000000, 8, 1023) -ieq r1.xy, vThreadID.xyxx, l(0, 0, 0, 0) -movc r1.xy, r0.yyyy, r1.xyxx, l(0,0,0,0) -ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r2.z, CB0[0][0].y -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) -iadd r3.xyzw, r3.xyzw, vThreadID.xyyx -bfi r0.y, l(10), l(5), CB0[0][0].w, l(0) -if_nz r0.z - ubfe r0.z, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) - ishr r1.w, r0.z, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r4.x - ushr r2.w, r0.y, l(5) - imad r1.z, r1.z, r2.w, r4.y - ishl r2.w, r3.z, l(12) - and r2.w, r2.w, l(0x00006000) - bfi r2.w, l(3), l(10), r3.w, r2.w - ishr r2.w, r2.w, l(6) - iadd r1.w, r1.w, r4.z - bfi r4.x, l(1), l(1), r1.w, l(0) - iadd r4.x, r4.x, r4.w - bfi r4.x, l(2), l(1), r4.x, l(0) - bfi r1.w, l(1), l(0), r1.w, r4.x - bfi r4.xy, l(18, 18, 0, 0), l(12, 15, 0, 0), r1.zzzz, l(0, 0, 0, 0) - imad r4.xy, r2.wwww, l(2, 16, 0, 0), r4.xyxx - bfi r4.xy, l(2, 2, 0, 0), l(10, 13, 0, 0), r0.zzzz, r4.xyxx - bfi r0.z, l(1), l(4), r3.z, l(0) - ubfe r1.z, l(3), l(6), r4.x - and r2.w, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.z, r1.z, l(32), r1.w - imad r1.z, r2.w, l(4), r1.z - bfi r4.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r0.zzzz, r4.xyxx - bfi r0.z, l(9), l(3), r1.z, r4.y - bfi r0.z, l(6), l(0), r4.x, r0.z -else - ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) - ushr r0.y, r0.y, l(5) - imad r0.y, r4.y, r0.y, r4.x - ishl r1.z, r3.z, l(7) - and r1.zw, r1.zzzz, l(0, 0, 1792, 2048) - bfi r2.w, l(3), l(5), r3.w, r1.z - bfi r2.w, l(21), l(11), r0.y, r2.w - bfi r3.x, l(1), l(4), r3.z, l(0) - iadd r2.w, r2.w, r3.x - ishl r3.yz, r1.zzzz, l(0, 3, 2, 0) - bfi r3.yz, l(0, 3, 3, 0), l(0, 8, 7, 0), r3.wwww, r3.yyzy - bfi r3.yz, l(0, 21, 21, 0), l(0, 14, 13, 0), r0.yyyy, r3.yyzy - imad r3.xy, r3.xxxx, l(8, 4, 0, 0), r3.yzyy - bfi r0.y, l(12), l(0), r1.w, r3.x - and r1.z, r3.y, l(1792) - iadd r0.y, r0.y, r1.z - and r1.z, r4.z, l(2) - iadd r1.z, r4.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r0.y, r0.y, r1.z - bfi r0.z, l(6), l(0), r2.w, r0.y -endif -imul null, r0.y, r0.z, l(9) -ushr r0.y, r0.y, l(4) -bfi r1.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) -iadd r1.zw, r1.zzzw, vThreadID.xxxy -ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r0.z, l(3), r2.y -if_nz r0.z - mov r4.y, r2.y -else - ieq r0.z, r2.y, l(5) - if_nz r0.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r2.xz, r3.yyyy, l(2, 0, 1, 0) -and r2.xz, r2.xxzx, l(1, 0, 1, 0) -ishl r1.zw, r1.zzzw, r2.xxxz -ushr r4.x, r4.y, l(1) -and r2.xz, r4.xxyx, l(1, 0, 1, 0) -iadd r1.zw, r1.zzzw, r2.xxxz -udiv r2.xz, null, r1.zzwz, l(80, 0, 16, 0) -movc r0.z, r3.z, l(1), l(0) -ishl r2.w, r2.x, r0.z -imad r0.w, r2.z, r0.w, r2.w -iadd r0.w, r0.w, r3.x -imad r1.zw, -r2.xxxz, l(0, 0, 80, 16), r1.zzzw -imad r1.z, r1.w, l(80), r1.z -ishl r0.z, r1.z, r0.z -imad r0.z, r0.w, l(1280), r0.z -imul null, r0.w, r0.z, l(36) -ld_raw r4.xyzw, r0.w, T0[0].wxyz -imad r1.zw, r0.zzzz, l(0, 0, 36, 36), l(0, 0, 16, 20) -ld_raw r5.x, r1.z, T0[0].xxxx -switch r3.w - case l(0) - case l(1) - ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r3.x, r4.y - mov r3.yz, r9.xxyx - and r2.xzw, r3.xxyz, l(1023, 0, 1023, 1023) - and r10.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r12.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r11.xyzx, r10.xyzx, r3.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r10.xyzx, r3.xyzx - movc r6.xyz, r2.xzwx, r3.xyzx, l(0,0,0,0) - utof r2.xz, r9.zzwz - ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r3.x, r4.z - mov r3.yz, r9.xxwx - and r10.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r11.xyzx, r3.xyzx - movc r7.xyz, r10.xyzx, r3.xyzx, l(0,0,0,0) - mul r2.xz, r2.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r9.x, r4.w - and r3.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r12.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r11.xyzx, r10.xyzx, r9.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r10.xyzx, r9.xyzx - movc r8.xyz, r3.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r3.xy, r9.xwxx - mov r9.x, r4.x - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyz, r5.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r5.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r5.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx - ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r5.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) - utof r0.w, r5.w - mul r5.w, r0.w, l(0.333333) - mov r6.w, r2.x - mov r7.w, r2.z - mov r8.w, r3.x - mov r4.w, r3.y - break - case l(4) - ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r4.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r9.zzwz - ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r5.y, r5.x, l(16) - ishr r2.xz, r5.yyxy, l(16, 0, 16, 0) - itof r2.xz, r2.xxzx - mul r2.xz, r2.xxzx, l(0.000977, 0.000000, 0.000977, 0.000000) - max r5.xy, r2.xzxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r4.y - f16tof32 r6.y, r9.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r4.w - f16tof32 r8.y, r9.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r9.w - ushr r0.w, r5.x, l(16) - f16tof32 r5.x, r5.x - f16tof32 r5.y, r0.w - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.x, r4.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r4.w - mov r8.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -ibfe r0.w, l(6), l(16), CB0[0][0].z -ishl r0.w, r0.w, l(23) -iadd r0.w, r0.w, l(0x3f800000) -uge r1.z, r2.y, l(4) -if_nz r1.z - mul r2.x, r0.w, l(0.500000) - imad r2.zw, r0.zzzz, l(0, 0, 36, 36), l(0, 0, 2880, 2896) - ld_raw r9.xyzw, r2.z, T0[0].wxyz - ld_raw r10.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r3.x, r9.y - mov r3.yz, r14.xxyx - and r15.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r18.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r17.xyzx, r16.xyzx, r3.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r16.xyzx, r3.xyzx - movc r11.xyz, r15.xyzx, r3.xyzx, l(0,0,0,0) - utof r2.zw, r14.zzzw - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r3.x, r9.z - mov r3.yz, r14.xxwx - and r15.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r18.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r17.xyzx, r16.xyzx, r3.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r16.xyzx, r3.xyzx - movc r12.xyz, r15.xyzx, r3.xyzx, l(0,0,0,0) - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r14.x, r9.w - and r3.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r13.xyz, r3.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r3.xy, r14.xwxx - mov r14.x, r9.x - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r17.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r16.xyzx, r15.xyzx, r17.xyzx - ishl r16.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r10.xyz, r14.xyzx, r15.xyzx, l(0,0,0,0) - utof r3.z, r10.w - mul r10.w, r3.z, l(0.333333) - mov r11.w, r2.z - mov r12.w, r2.w - mov r13.w, r3.x - mov r9.w, r3.y - break - case l(4) - ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r9.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r14.zzwz - ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r10.y, r10.x, l(16) - ishr r2.zw, r10.yyyx, l(0, 0, 16, 16) - itof r2.zw, r2.zzzw - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) - max r10.xy, r2.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r9.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r9.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r9.w - f16tof32 r13.y, r14.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r14.w - ushr r2.z, r10.x, l(16) - f16tof32 r10.x, r10.x - f16tof32 r10.y, r2.z - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r9.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r9.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r9.w - mov r13.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r11.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r8.xyzw, r13.xyzw - add r4.xyzw, r4.xyzw, r9.xyzw - add r5.xyzw, r5.xyzw, r10.xyzw - uge r2.z, r2.y, l(6) - if_nz r2.z - mul r2.x, r0.w, l(0.250000) - imad r9.xyzw, r0.zzzz, l(36, 36, 36, 36), l(36, 52, 2916, 2932) - ld_raw r10.xyzw, r9.x, T0[0].wxyz - ld_raw r11.x, r9.y, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r3.x, r10.y - mov r3.yz, r15.xxyx - and r16.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r19.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r18.xyzx, r17.xyzx, r3.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r17.xyzx, r3.xyzx - movc r12.xyz, r16.xyzx, r3.xyzx, l(0,0,0,0) - utof r2.zw, r15.zzzw - ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r3.x, r10.z - mov r3.yz, r15.xxwx - and r16.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r19.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r18.xyzx, r17.xyzx, r3.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r17.xyzx, r3.xyzx - movc r13.xyz, r16.xyzx, r3.xyzx, l(0,0,0,0) - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r15.x, r10.w - and r3.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r14.xyz, r3.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r3.xy, r15.xwxx - mov r15.x, r10.x - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.z, r11.w - mul r11.w, r3.z, l(0.333333) - mov r12.w, r2.z - mov r13.w, r2.w - mov r14.w, r3.x - mov r10.w, r3.y - break - case l(4) - ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r10.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r15.zzwz - ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r11.y, r11.x, l(16) - ishr r2.zw, r11.yyyx, l(0, 0, 16, 16) - itof r2.zw, r2.zzzw - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) - max r11.xy, r2.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r10.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r10.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r10.w - f16tof32 r14.y, r15.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r15.w - ushr r2.z, r11.x, l(16) - f16tof32 r11.x, r11.x - f16tof32 r11.y, r2.z - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r12.x, r10.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.w - mov r14.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r12.xyzw, r6.xyzw, r12.xyzw - add r13.xyzw, r7.xyzw, r13.xyzw - add r14.xyzw, r8.xyzw, r14.xyzw - add r10.xyzw, r4.xyzw, r10.xyzw - add r11.xyzw, r5.xyzw, r11.xyzw - ld_raw r15.xyzw, r9.z, T0[0].wxyz - ld_raw r9.x, r9.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) - mov r3.x, r15.y - mov r3.yz, r19.xxyx - and r20.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r23.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r22.xyzx, r21.xyzx, r3.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r21.xyzx, r3.xyzx - movc r16.xyz, r20.xyzx, r3.xyzx, l(0,0,0,0) - utof r2.zw, r19.zzzw - ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) - mov r3.x, r15.z - mov r3.yz, r19.xxwx - and r20.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r23.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r22.xyzx, r21.xyzx, r3.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r21.xyzx, r3.xyzx - movc r17.xyz, r20.xyzx, r3.xyzx, l(0,0,0,0) - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r19.x, r15.w - and r3.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r20.xyzx, r19.xyzx - movc r18.xyz, r3.xyzx, r19.xyzx, l(0,0,0,0) - ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) - utof r3.xy, r19.xwxx - mov r19.x, r15.x - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r19.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r22.xyz, l(7, 7, 7, 0), r22.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r22.xyz, r22.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r21.xyzx, r20.xyzx, r22.xyzx - ishl r21.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r9.xyz, r19.xyzx, r20.xyzx, l(0,0,0,0) - utof r3.z, r9.w - mul r9.w, r3.z, l(0.333333) - mov r16.w, r2.z - mov r17.w, r2.w - mov r18.w, r3.x - mov r15.w, r3.y - break - case l(4) - ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - mov r20.xz, r19.xxyx - mov r20.yw, r15.yyyz - ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.yz, r19.zzwz - ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r9.y, r9.x, l(16) - ishr r2.zw, r9.yyyx, l(0, 0, 16, 16) - itof r2.zw, r2.zzzw - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) - max r9.xy, r2.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - f16tof32 r16.x, r15.y - f16tof32 r16.y, r19.x - f16tof32 r17.x, r15.z - f16tof32 r17.y, r19.y - f16tof32 r18.x, r15.w - f16tof32 r18.y, r19.z - f16tof32 r15.x, r15.x - f16tof32 r15.y, r19.w - ushr r2.z, r9.x, l(16) - f16tof32 r9.x, r9.x - f16tof32 r9.y, r2.z - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r16.x, r15.y - mov r16.yzw, l(0,0,0,0) - mov r17.x, r15.z - mov r17.yzw, l(0,0,0,0) - mov r18.x, r15.w - mov r18.yzw, l(0,0,0,0) - mov r15.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r12.xyzw, r16.xyzw - add r7.xyzw, r13.xyzw, r17.xyzw - add r8.xyzw, r14.xyzw, r18.xyzw - add r4.xyzw, r10.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r11.xyzw - endif -else - mov r2.x, r0.w -endif -mul r6.xyzw, r2.xxxx, r6.xyzw -mul r7.xyzw, r2.xxxx, r7.xyzw -mul r8.xyzw, r2.xxxx, r8.xzyw -mul r4.xyzw, r2.xxxx, r4.xyzw -mul r5.xyzw, r2.xxxx, r5.xyzw -and r2.x, CB0[0][0].z, l(0x01000000) -if_nz r2.x - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz - mov r8.xy, r8.yxyy - mov r4.xz, r4.zzxz - mov r9.xy, r5.zxzz -else - mov r9.xy, r5.xzxx -endif -if_nz r1.x - mov r6.xyzw, r7.xyzw - mov r9.zw, r5.yyyw - mov r4.xyzw, r9.xzyw -endif -if_nz r1.y - mov r6.xyzw, r4.xyzw - mov r7.xz, r9.xxyx - mov r7.yw, r5.yyyw -endif -ieq r2.z, r0.x, l(5) -if_nz r2.z - mov r6.xyzw, r6.wzyx - mov r7.xyzw, r7.wzyx - mov r4.xyzw, r4.wzyx - mov r5.xz, r5.wwyw - mov r5.yw, r9.yyyx - mov r2.w, l(2) -else - mov r5.xz, r9.xxyx - mov r2.w, r0.x -endif -ieq r3.x, r2.w, l(4) -if_nz r3.x - mov r6.xyzw, r6.yxwz - mov r7.xyzw, r7.yxwz - mov r4.xyzw, r4.yxwz - mov r5.xyzw, r5.yxwz - mov r2.w, l(2) -endif -ieq r3.xyz, r2.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r9.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r10.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r9.xyzw, r10.xyzw - ishl r9.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r10.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r7.xyzw, r9.xyzw, r10.xyzw - ishl r9.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r10.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r9.xyzw, r10.xyzw - ishl r9.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r10.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r9.xyzw, r10.xyzw -endif -if_nz r3.y - ushr r9.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r9.xyzw - ushr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r9.xyzw - ushr r9.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r9.xyzw - ushr r9.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r9.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw -iadd r6.xyzw, r0.yyyy, l(1, 3, 4, 2) -store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw -store_uav_typed U0[0].xyzw, r6.yyyy, r4.xyzw -store_uav_typed U0[0].xyzw, r6.zzzz, r5.xyzw -ld_raw r4.xyzw, r1.w, T0[0].wxyz -switch r3.w - case l(0) - case l(1) - ushr r10.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r10.x, r4.y - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r10.x, r4.z - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r4.wwww, l(0, 8, 16, 24) - mov r10.x, r4.w - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r10.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r4.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r10.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r10.x, r4.y - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r10.x, r4.z - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r4.wwww, l(0, 10, 20, 30) - mov r10.x, r4.w - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r10.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r4.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r10.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r3.x, r4.y - mov r3.yz, r10.xxyx - and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r11.xyzx, r3.xyzx - movc r5.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) - utof r3.xy, r10.zwzz - ushr r10.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r6.x, r4.z - mov r6.yz, r10.xxwx - and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r13.xyzx, r12.xyzx, r6.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r12.xyzx, r6.xyzx - movc r7.xyz, r11.xyzx, r6.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r10.x, r4.w - and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r9.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) - ushr r10.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r6.xy, r10.xwxx - mov r10.x, r4.x - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r4.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r5.w, r3.x - mov r7.w, r3.y - mov r9.w, r6.x - mov r4.w, r6.y - break - case l(4) - ishl r10.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r11.xz, r10.xxyx - mov r11.yw, r4.yyyz - ishr r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r10.zzwz - ishr r10.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - break - case l(6) - ushr r10.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r5.x, r4.y - f16tof32 r5.y, r10.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r10.y - f16tof32 r9.x, r4.w - f16tof32 r9.y, r10.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r10.w - mov r5.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - break - default - mov r5.x, r4.y - mov r5.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r9.x, r4.w - mov r9.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.z - mul r1.z, r0.w, l(0.500000) - imad r1.w, r0.z, l(36), l(2900) - ld_raw r10.xyzw, r1.w, T0[0].wxyz - switch r3.w - case l(0) - case l(1) - ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r3.x, r10.y - mov r3.yz, r14.xxyx - and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r15.xyzx, r3.xyzx - movc r11.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) - utof r3.xy, r14.zwzz - ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r6.x, r10.z - mov r6.yz, r14.xxwx - and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r16.xyzx, r6.xyzx - movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r14.x, r10.w - and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r6.xy, r14.xwxx - mov r14.x, r10.x - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r3.x - mov r12.w, r3.y - mov r13.w, r6.x - mov r10.w, r6.y - break - case l(4) - ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r10.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r14.zzwz - ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r10.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r10.w - f16tof32 r13.y, r14.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r14.w - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r10.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.w - mov r13.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r11.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - add r9.xyzw, r9.xyzw, r13.xyzw - add r4.xyzw, r4.xyzw, r10.xyzw - uge r1.w, r2.y, l(6) - if_nz r1.w - mul r0.w, r0.w, l(0.250000) - imad r2.yw, r0.zzzz, l(0, 36, 0, 36), l(0, 56, 0, 2936) - ld_raw r10.xyzw, r2.y, T0[0].wxyz - switch r3.w - case l(0) - case l(1) - ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r3.x, r10.y - mov r3.yz, r14.xxyx - and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r3.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) - and r3.xyz, r3.xyzx, l(127, 127, 127, 0) - movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) - iadd r3.xyz, r15.xyzx, r3.xyzx - movc r11.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) - utof r3.xy, r14.zwzz - ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r6.x, r10.z - mov r6.yz, r14.xxwx - and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r16.xyzx, r6.xyzx - movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r14.x, r10.w - and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r6.xy, r14.xwxx - mov r14.x, r10.x - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r3.x - mov r12.w, r3.y - mov r13.w, r6.x - mov r10.w, r6.y - break - case l(4) - ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r10.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r14.zzwz - ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r10.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r10.w - f16tof32 r13.y, r14.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r14.w - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r10.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.w - mov r13.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r11.xyzw, r5.xyzw, r11.xyzw - add r12.xyzw, r7.xyzw, r12.xyzw - add r13.xyzw, r9.xyzw, r13.xyzw - add r10.xyzw, r4.xyzw, r10.xyzw - ld_raw r14.xyzw, r2.w, T0[0].wxyz - switch r3.w - case l(0) - case l(1) - ushr r17.yzw, r14.yyyy, l(0, 8, 16, 24) - mov r17.x, r14.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r3.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r14.zzzz, l(0, 8, 16, 24) - mov r17.x, r14.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r14.wwww, l(0, 8, 16, 24) - mov r17.x, r14.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r14.yyyy, l(0, 10, 20, 30) - mov r17.x, r14.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r3.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r14.zzzz, l(0, 10, 20, 30) - mov r17.x, r14.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r14.wwww, l(0, 10, 20, 30) - mov r17.x, r14.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r14.yyyz, l(10, 20, 30, 30) - mov r6.x, r14.y - mov r6.yz, r17.xxyx - and r18.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r19.xyzx, r6.xyzx - movc r3.xyz, r18.xyzx, r6.xyzx, l(0,0,0,0) - utof r2.yw, r17.zzzw - ushr r17.xyzw, r14.zwwz, l(10, 10, 20, 20) - mov r6.x, r14.z - mov r6.yz, r17.xxwx - and r18.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r19.xyzx, r6.xyzx - movc r15.xyz, r18.xyzx, r6.xyzx, l(0,0,0,0) - mul r2.yw, r2.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r17.x, r14.w - and r6.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r16.xyz, r6.xyzx, r17.xyzx, l(0,0,0,0) - ushr r17.xyzw, r14.wxxx, l(30, 10, 20, 30) - utof r6.xy, r17.xwxx - mov r17.x, r14.x - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r3.w, r2.y - mov r15.w, r2.w - mov r16.w, r6.x - mov r14.w, r6.y - break - case l(4) - ishl r17.xyzw, r14.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r14.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.yz, r17.zzwz - ishr r17.xyzw, r14.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r3.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r14.yzwx, l(16, 16, 16, 16) - f16tof32 r3.x, r14.y - f16tof32 r3.y, r17.x - f16tof32 r15.x, r14.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r14.w - f16tof32 r16.y, r17.z - f16tof32 r14.x, r14.x - f16tof32 r14.y, r17.w - mov r3.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r3.x, r14.y - mov r3.yzw, l(0,0,0,0) - mov r15.x, r14.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r14.w - mov r16.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - add r5.xyzw, r3.xyzw, r11.xyzw - add r7.xyzw, r12.xyzw, r15.xyzw - add r9.xyzw, r13.xyzw, r16.xyzw - add r4.xyzw, r10.xyzw, r14.xyzw - else - mov r0.w, r1.z - endif -endif -mul r3.xyzw, r0.wwww, r5.xyzw -mul r5.xyzw, r0.wwww, r7.xzyw -mul r7.xyzw, r0.wwww, r9.xyzw -mul r4.xyzw, r0.wwww, r4.xyzw -if_nz r2.x - mov r3.xz, r3.zzxz - mov r5.xy, r5.yxyy - mov r7.xz, r7.zzxz - mov r4.xz, r4.zzxz -endif -movc r8.xyzw, r1.yyyy, r3.xyzw, r8.xzyw -movc r1.xyzw, r1.xxxx, r7.xyzw, r5.xzyw -if_nz r2.z - mov r8.xyzw, r8.wzyx - mov r3.xyzw, r3.wzyx - mov r1.xyzw, r1.wzyx - mov r7.xyzw, r7.wzyx - mov r4.yw, r4.wwwy - mov r4.xyzw, r4.yzwx - mov r0.x, l(2) -endif -ieq r0.z, r0.x, l(4) -if_nz r0.z - mov r8.xyzw, r8.yxwz - mov r3.xyzw, r3.yxwz - mov r1.xyzw, r1.yxwz - mov r7.xyzw, r7.yxwz - mov r4.xyzw, r4.yxwz - mov r0.x, l(2) -endif -ieq r0.xzw, r0.xxxx, l(1, 0, 2, 3) -or r0.xz, r0.zzwz, r0.xxzx -if_nz r0.x - ishl r2.xyzw, r8.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r8.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r8.xyzw, r2.xyzw, r5.xyzw - ishl r2.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r2.xyzw, r5.xyzw - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r5.xyzw - ishl r2.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r7.xyzw, r2.xyzw, r5.xyzw - ishl r2.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r2.xyzw, r5.xyzw -endif -if_nz r0.z - ushr r2.xyzw, r8.xyzw, l(16, 16, 16, 16) - bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.xyzw - ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw - ushr r2.xyzw, r7.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r2.xyzw - ushr r2.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r2.xyzw -endif -store_uav_typed U0[0].xyzw, r6.wwww, r8.xyzw -iadd r2.xyzw, r0.yyyy, l(5, 6, 7, 8) -store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r1.xyzw -store_uav_typed U0[0].xyzw, r2.zzzz, r7.xyzw -store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw -ret -// Approximately 1867 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.cso deleted file mode 100644 index 1457c1c53..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.h deleted file mode 100644 index 91dfcd451..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.h +++ /dev/null @@ -1,2273 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_128bpp_from_64bpp_3xres.cs.hlsl -const uint8_t resolve_full_128bpp_from_64bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xDB, 0x1E, 0x3A, 0xF1, 0x24, 0xDC, 0x6F, 0x76, - 0x98, 0xDF, 0xA0, 0xA1, 0x2B, 0x5B, 0x5C, 0x9D, 0x01, 0x00, 0x00, 0x00, - 0x54, 0x6A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0xB8, 0x69, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.txt deleted file mode 100644 index 1bca2a223..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.txt +++ /dev/null @@ -1,1198 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 10 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].zxxz, l(7, 1023, 0x40000000, 8) -ubfe r3.xyz, l(12, 2, 4, 0), l(13, 10, 25, 0), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r4.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.zw, r3.yyyy, l(0, 0, 2, 1) -and r1.zw, r1.zzzw, l(0, 0, 1, 1) -ishl r1.xy, r1.xyxx, r1.zwzz -ushr r4.x, r4.y, l(1) -and r1.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r1.xy, r1.zwzz, r1.xyxx -udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) -ishl r0.w, r1.z, l(1) -imad r0.w, r1.w, r2.y, r0.w -iadd r0.w, r0.w, r3.x -imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx -imad r1.x, r1.y, l(80), r1.x -ishl r1.x, r1.x, l(1) -imad r0.w, r0.w, l(1280), r1.x -imul null, r0.w, r0.w, l(9) -movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) -movc r1.xy, r2.zzzz, r1.xyxx, l(0,0,0,0) -bfi r4.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r4.xyzw, r4.xyzw, vThreadID.xyyx -bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r2.w - ubfe r0.z, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r5.xyzw, r4.zwzw, l(4, 5, 3, 3) - ishr r1.w, r0.z, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r5.x - ushr r2.y, r0.x, l(5) - imad r1.z, r1.z, r2.y, r5.y - ishl r2.y, r4.z, l(12) - and r2.y, r2.y, l(0x00006000) - bfi r2.y, l(3), l(10), r4.w, r2.y - ishr r2.y, r2.y, l(6) - iadd r1.w, r1.w, r5.z - bfi r2.z, l(1), l(1), r1.w, l(0) - iadd r2.z, r2.z, r5.w - bfi r2.z, l(2), l(1), r2.z, l(0) - bfi r1.w, l(1), l(0), r1.w, r2.z - bfi r2.zw, l(0, 0, 18, 18), l(0, 0, 12, 15), r1.zzzz, l(0, 0, 0, 0) - imad r2.yz, r2.yyyy, l(0, 2, 16, 0), r2.zzwz - bfi r2.yz, l(0, 2, 2, 0), l(0, 10, 13, 0), r0.zzzz, r2.yyzy - bfi r0.z, l(1), l(4), r4.z, l(0) - ubfe r1.z, l(3), l(6), r2.y - and r2.w, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.z, r1.z, l(32), r1.w - imad r1.z, r2.w, l(4), r1.z - bfi r2.yz, l(0, 5, 5, 0), l(0, 0, 3, 0), r0.zzzz, r2.yyzy - bfi r0.z, l(9), l(3), r1.z, r2.z - bfi r0.z, l(6), l(0), r2.y, r0.z -else - ishr r5.xyzw, r4.xyzw, l(5, 5, 2, 3) - ushr r0.x, r0.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r1.z, r4.z, l(7) - and r1.zw, r1.zzzz, l(0, 0, 1792, 2048) - bfi r2.y, l(3), l(5), r4.w, r1.z - bfi r2.y, l(21), l(11), r0.x, r2.y - bfi r2.z, l(1), l(4), r4.z, l(0) - iadd r2.y, r2.y, r2.z - ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r4.wwww, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r0.xxxx, r3.xyxx - imad r2.zw, r2.zzzz, l(0, 0, 8, 4), r3.xxxy - bfi r0.x, l(12), l(0), r1.w, r2.z - and r1.z, r2.w, l(1792) - iadd r0.x, r0.x, r1.z - and r1.z, r5.z, l(2) - iadd r1.z, r5.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r0.x, r0.x, r1.z - bfi r0.z, l(6), l(0), r2.y, r0.x -endif -imul null, r0.x, r0.z, l(9) -ushr r0.xw, r0.xxxw, l(4, 0, 0, 1) -imad r0.z, r1.y, l(3), r0.w -iadd r1.y, r1.x, r0.z -ld r4.yw, r1.yyyy, T0[0].zxwy -switch r3.z - case l(5) - ishl r4.xz, r4.yywy, l(16, 0, 16, 0) - ishr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.zw, r4.yyyw, l(0, 0, 16, 16) - f16tof32 r4.xy, r4.wyww - f16tof32 r4.zw, r1.wwwz - break - default - mov r4.xz, l(0,0,0,0) - break -endswitch -ibfe r1.z, l(6), l(16), CB0[0][0].z -ishl r1.z, r1.z, l(23) -iadd r1.z, r1.z, l(0x3f800000) -uge r1.w, r0.y, l(4) -if_nz r1.w - mul r2.y, r1.z, l(0.500000) - iadd r2.z, r1.y, l(720) - ld r5.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r4.xyzw, r4.xyzw, r5.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r2.y, r1.z, l(0.250000) - iadd r2.zw, r1.yyyy, l(0, 0, 9, 729) - ld r5.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r4.ywxz, r5.ywxz - ld r6.yw, r2.wwww, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r4.xyzw, r5.zxwy, r6.xyzw - endif -else - mov r2.y, r1.z -endif -mul r4.xyzw, r2.yyyy, r4.ywxz -and r1.y, CB0[0][0].z, l(0x01000000) -if_nz r1.y - mov r4.xz, r4.zzxz -endif -ieq r2.y, r2.x, l(5) -if_nz r2.y - mov r4.yw, r4.wwwy - mov r4.xyzw, r4.yzwx - mov r2.z, l(2) -else - mov r2.z, r2.x -endif -ieq r2.w, r2.z, l(4) -if_nz r2.w - mov r4.xyzw, r4.yxwz - mov r2.z, l(2) -endif -ieq r3.xyw, r2.zzzz, l(1, 2, 0, 3) -or r2.zw, r3.yyyw, r3.xxxy -if_nz r2.z - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r2.w - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -iadd r4.xyzw, r0.xxxx, l(1, 2, 3, 4) -iadd r2.zw, r0.zzzz, l(0, 0, 1, 2) -ld r5.yw, r2.zzzz, T0[0].zxwy -switch r3.z - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.z, r1.z, l(0.500000) - iadd r3.x, r0.z, l(721) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r3.x, r0.y, l(6) - if_nz r3.x - mul r2.z, r1.z, l(0.250000) - iadd r3.xy, r0.zzzz, l(10, 730, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.z, r1.z -endif -mul r5.xyzw, r2.zzzz, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -if_nz r2.y - mov r5.yw, r5.wwwy - mov r5.xyzw, r5.yzwx - mov r2.z, l(2) -else - mov r2.z, r2.x -endif -ieq r3.x, r2.z, l(4) -if_nz r3.x - mov r5.xyzw, r5.yxwz - mov r2.z, l(2) -endif -ieq r3.xyw, r2.zzzz, l(1, 2, 0, 3) -or r3.xy, r3.ywyy, r3.xyxx -if_nz r3.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw -endif -store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw -ld r5.yw, r2.wwww, T0[0].zxwy -switch r3.z - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.z, r1.z, l(0.500000) - iadd r2.w, r0.z, l(722) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r0.y, l(6) - if_nz r2.w - mul r2.z, r1.z, l(0.250000) - iadd r3.xy, r0.zzzz, l(11, 731, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.z, r1.z -endif -mul r5.xyzw, r2.zzzz, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -if_nz r2.y - mov r5.yw, r5.wwwy - mov r5.xyzw, r5.yzwx - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r2.z, r0.z, l(4) -if_nz r2.z - mov r5.xyzw, r5.yxwz - mov r0.z, l(2) -endif -ieq r3.xyw, r0.zzzz, l(1, 2, 0, 3) -or r2.zw, r3.yyyw, r3.xxxy -if_nz r2.z - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r2.w - ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw -endif -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw -iadd r0.z, r1.x, r0.w -iadd r2.zw, r0.zzzz, l(0, 0, 3, 6) -ld r5.yw, r2.zzzz, T0[0].zxwy -switch r3.z - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.z, l(723) - ld r6.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r3.xy, r0.zzzz, l(12, 732, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.x, r1.z -endif -mul r5.xyzw, r1.xxxx, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -if_nz r2.y - mov r5.yw, r5.wwwy - mov r5.xyzw, r5.yzwx - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r2.z, r1.x, l(4) -if_nz r2.z - mov r5.xyzw, r5.yxwz - mov r1.x, l(2) -endif -ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) -or r3.xy, r3.ywyy, r3.xyxx -if_nz r3.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw -endif -store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyzw -iadd r5.xyzw, r0.wwww, l(4, 5, 7, 8) -ld r6.yw, r5.xxxx, T0[0].zxwy -switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.w, l(724) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r3.xy, r0.wwww, l(13, 733, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r3.z - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.x, r1.z -endif -mul r6.xyzw, r1.xxxx, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -if_nz r2.y - mov r6.yw, r6.wwwy - mov r6.xyzw, r6.yzwx - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r2.z, r1.x, l(4) -if_nz r2.z - mov r6.xyzw, r6.yxwz - mov r1.x, l(2) -endif -ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) -or r3.xy, r3.ywyy, r3.xyxx -if_nz r3.x - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r3.y - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw -endif -store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw -iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r6.yw, r5.yyyy, T0[0].zxwy -switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.w, l(725) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r3.xy, r0.wwww, l(14, 734, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r3.z - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.x, r1.z -endif -mul r6.xyzw, r1.xxxx, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -if_nz r2.y - mov r6.yw, r6.wwwy - mov r6.xyzw, r6.yzwx - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r2.z, r1.x, l(4) -if_nz r2.z - mov r6.xyzw, r6.yxwz - mov r1.x, l(2) -endif -ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) -or r3.xy, r3.ywyy, r3.xyxx -if_nz r3.x - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r3.y - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw -endif -store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw -ld r6.yw, r2.wwww, T0[0].zxwy -switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.z, l(726) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r2.zw, r0.zzzz, l(0, 0, 15, 735) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r2.wwww, T0[0].zxwy - switch r3.z - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.x, r1.z -endif -mul r6.xyzw, r1.xxxx, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -if_nz r2.y - mov r6.yw, r6.wwwy - mov r6.xyzw, r6.yzwx - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r1.x, r0.z, l(4) -if_nz r1.x - mov r6.xyzw, r6.yxwz - mov r0.z, l(2) -endif -ieq r3.xyw, r0.zzzz, l(1, 2, 0, 3) -or r2.zw, r3.yyyw, r3.xxxy -if_nz r2.z - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r2.w - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw -endif -store_uav_typed U0[0].xyzw, r4.yyyy, r6.xyzw -ld r6.yw, r5.zzzz, T0[0].zxwy -switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r1.z, l(0.500000) - iadd r1.x, r0.w, l(727) - ld r7.yw, r1.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r1.x, r0.y, l(6) - if_nz r1.x - mul r0.z, r1.z, l(0.250000) - iadd r2.zw, r0.wwww, l(0, 0, 16, 736) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r2.wwww, T0[0].zxwy - switch r3.z - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r0.z, r1.z -endif -mul r6.xyzw, r0.zzzz, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -if_nz r2.y - mov r6.yw, r6.wwwy - mov r6.xyzw, r6.yzwx - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r1.x, r0.z, l(4) -if_nz r1.x - mov r6.xyzw, r6.yxwz - mov r0.z, l(2) -endif -ieq r3.xyw, r0.zzzz, l(1, 2, 0, 3) -or r2.zw, r3.yyyw, r3.xxxy -if_nz r2.z - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r2.w - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw -endif -store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw -ld r5.yw, r5.wwww, T0[0].zxwy -switch r3.z - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r1.z, l(0.500000) - iadd r1.x, r0.w, l(728) - ld r6.yw, r1.xxxx, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r1.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r0.y, r0.y, l(6) - if_nz r0.y - mul r1.z, r1.z, l(0.250000) - iadd r0.yw, r0.wwww, l(0, 17, 0, 737) - ld r6.yw, r0.yyyy, T0[0].zxwy - switch r3.z - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r1.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r0.wwww, T0[0].zxwy - switch r3.z - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r3.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r3.xyzw, r3.xyzw - mul r3.xyzw, r3.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r3.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r0.yw, r7.yyyw, l(0, 16, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r0.wwwy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - else - mov r1.z, r0.z - endif -endif -mul r3.xyzw, r1.zzzz, r5.ywxz -if_nz r1.y - mov r3.xz, r3.zzxz -endif -if_nz r2.y - mov r3.yw, r3.wwwy - mov r3.xyzw, r3.yzwx - mov r2.x, l(2) -endif -ieq r0.y, r2.x, l(4) -if_nz r0.y - mov r3.xyzw, r3.yxwz - mov r2.x, l(2) -endif -ieq r0.yzw, r2.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r1.xyzw, r2.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r4.wwww, r3.xyzw -ret -// Approximately 1151 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.cso deleted file mode 100644 index 3ca116919..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h deleted file mode 100644 index 6da670627..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h +++ /dev/null @@ -1,3178 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_16bpp_2xres.cs.hlsl -const uint8_t resolve_full_16bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x91, 0xA5, 0xD4, 0x1D, 0x93, 0x89, 0xF5, 0xD0, - 0xD9, 0x7E, 0x50, 0xB3, 0x4B, 0xF8, 0x01, 0xC0, 0x01, 0x00, 0x00, 0x00, - 0xC0, 0x94, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 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deleted file mode 100644 index 99319beec..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.txt +++ /dev/null @@ -1,1266 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 21 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].xzxz, l(1023, 0x01000000, 0x40000000, 8) -ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r4.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.zw, r3.yyyy, l(0, 0, 2, 1) -and r1.zw, r1.zzzw, l(0, 0, 1, 1) -ishl r1.xy, r1.xyxx, r1.zwzz -ushr r4.x, r4.y, l(1) -and r1.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r1.xy, r1.zwzz, r1.xyxx -udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) -movc r0.w, r3.z, l(1), l(0) -ishl r3.y, r1.z, r0.w -imad r2.x, r1.w, r2.x, r3.y -iadd r2.x, r2.x, r3.x -imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx -imad r1.x, r1.y, l(80), r1.x -ishl r0.w, r1.x, r0.w -imad r0.w, r2.x, l(1280), r0.w -ld r1.xyzw, r0.wwww, T0[0].xzyw -if_nz r3.z - iadd r2.x, r0.w, l(1) - ld r4.xyzw, r2.xxxx, T0[0].xzyw - switch r3.w - case l(5) - ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r1.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r1.xz, r8.zzwz - ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r4.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.xz, r1.xxzx - f16tof32 r5.yw, r8.xxxy - f16tof32 r6.xz, r1.yywy - f16tof32 r6.yw, r8.zzzw - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r7.xz, r4.xxzx - f16tof32 r7.yw, r8.xxxy - f16tof32 r1.zw, r4.wwwy - f16tof32 r1.xy, r8.zwzz - break - default - mov r5.xy, r1.xzxx - mov r5.zw, l(0,0,0,0) - mov r6.xy, r1.ywyy - mov r6.zw, l(0,0,0,0) - mov r7.xy, r4.xzxx - mov r7.zw, l(0,0,0,0) - mov r1.xw, r4.wwwy - mov r1.yz, l(0,0,0,0) - break - endswitch -else - switch r3.w - case l(0) - case l(1) - ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) - and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) - and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) - mov r8.x, r1.x - mov r8.yz, r4.xxyx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - utof r3.xy, r4.zwzz - ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) - mov r8.x, r1.z - mov r8.yz, r4.xxwx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r4.x, r1.y - and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r9.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r11.xyz, r9.xyzx - iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) - movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) - iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) - movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx - ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) - iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r9.xyzx, r4.xyzx - movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) - utof r8.xy, r4.xwxx - mov r4.x, r1.w - and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r10.xyzx, r4.xyzx - movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) - mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r5.w, r3.x - mov r6.w, r3.y - mov r7.w, r4.x - mov r1.y, r4.y - break - case l(4) - ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r8.xz, r4.xxyx - mov r8.yw, r1.xxxz - ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r1.xz, r4.zzwz - ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.x, r1.x - f16tof32 r5.y, r4.x - f16tof32 r6.x, r1.z - f16tof32 r6.y, r4.y - f16tof32 r7.x, r1.y - f16tof32 r7.y, r4.z - f16tof32 r1.w, r1.w - f16tof32 r1.x, r4.w - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - default - mov r5.x, r1.x - mov r5.yzw, l(0,0,0,0) - mov r6.x, r1.z - mov r6.yzw, l(0,0,0,0) - mov r7.x, r1.y - mov r7.yzw, l(0,0,0,0) - mov r1.xyz, l(0,0,0,0) - break - endswitch -endif -ibfe r2.x, l(6), l(16), CB0[0][0].z -ishl r2.x, r2.x, l(23) -iadd r2.x, r2.x, l(0x3f800000) -uge r3.x, r0.y, l(4) -if_nz r3.x - mul r3.x, r2.x, l(0.500000) - ishl r3.y, l(80), r3.z - iadd r3.y, r0.w, r3.y - ld r4.xyzw, r3.yyyy, T0[0].xzyw - if_nz r3.z - iadd r3.y, r0.w, l(161) - ld r8.xyzw, r3.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r4.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r12.zzwz - ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.xz, r4.xxzx - f16tof32 r9.yw, r12.xxxy - f16tof32 r10.xz, r4.yywy - f16tof32 r10.yw, r12.zzzw - ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r11.xz, r8.xxzx - f16tof32 r11.yw, r12.xxxy - f16tof32 r4.zw, r8.wwwy - f16tof32 r4.xy, r12.zwzz - break - default - mov r9.xy, r4.xzxx - mov r9.zw, l(0,0,0,0) - mov r10.xy, r4.ywyy - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.xzxx - mov r11.zw, l(0,0,0,0) - mov r4.xw, r8.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r12.x, r4.x - mov r12.yz, r8.xxyx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - utof r8.xy, r8.zwzz - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r13.x, r4.z - mov r13.yz, r12.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mov r12.x, r4.y - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r8.zw, r12.xxxw - mov r12.x, r4.w - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) - mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r9.w, r8.x - mov r10.w, r8.y - mov r11.w, r8.z - mov r4.y, r8.w - break - case l(4) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r12.xz, r8.xxyx - mov r12.yw, r4.xxxz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.x, r4.x - f16tof32 r9.y, r8.x - f16tof32 r10.x, r4.z - f16tof32 r10.y, r8.y - f16tof32 r11.x, r4.y - f16tof32 r11.y, r8.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r8.w - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r9.x, r4.x - mov r9.yzw, l(0,0,0,0) - mov r10.x, r4.z - mov r10.yzw, l(0,0,0,0) - mov r11.x, r4.y - mov r11.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r5.xyzw, r9.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - add r7.xyzw, r7.xyzw, r11.xyzw - add r1.xyzw, r1.xyzw, r4.xyzw - uge r0.y, r0.y, l(6) - if_nz r0.y - mul r2.x, r2.x, l(0.250000) - ishl r4.xy, l(1, 81, 0, 0), r3.zzzz - iadd r4.xy, r0.wwww, r4.xyxx - ld r8.xyzw, r4.xxxx, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(3) - ld r9.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r8.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r13.zzwz - ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r9.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r9.xz, r13.zzwz - ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.xz, r8.xxzx - f16tof32 r10.yw, r13.xxxy - f16tof32 r11.xz, r8.yywy - f16tof32 r11.yw, r13.zzzw - ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - f16tof32 r12.xz, r9.xxzx - f16tof32 r12.yw, r13.xxxy - f16tof32 r8.zw, r9.wwwy - f16tof32 r8.xy, r13.zwzz - break - default - mov r10.xy, r8.xzxx - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.ywyy - mov r11.zw, l(0,0,0,0) - mov r12.xy, r9.xzxx - mov r12.zw, l(0,0,0,0) - mov r8.xw, r9.wwwy - mov r8.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) - and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) - and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) - mov r13.x, r8.x - mov r13.yz, r9.xxyx - and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) - utof r4.xz, r9.zzwz - ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) - mov r13.x, r8.z - mov r13.yz, r9.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r9.x, r8.y - and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r14.xyzx, r9.xyzx - movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) - utof r13.xy, r9.xwxx - mov r9.x, r8.w - and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r15.xyzx, r9.xyzx - movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) - mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r10.w, r4.x - mov r11.w, r4.z - mov r12.w, r9.x - mov r8.y, r9.y - break - case l(4) - ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r9.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.xz, r9.zzwz - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.x, r8.x - f16tof32 r10.y, r9.x - f16tof32 r11.x, r8.z - f16tof32 r11.y, r9.y - f16tof32 r12.x, r8.y - f16tof32 r12.y, r9.z - f16tof32 r8.w, r8.w - f16tof32 r8.x, r9.w - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - default - mov r10.x, r8.x - mov r10.yzw, l(0,0,0,0) - mov r11.x, r8.z - mov r11.yzw, l(0,0,0,0) - mov r12.x, r8.y - mov r12.yzw, l(0,0,0,0) - mov r8.xyz, l(0,0,0,0) - break - endswitch - endif - add r9.xyzw, r5.xyzw, r10.xyzw - add r10.xyzw, r6.xyzw, r11.xyzw - add r11.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r1.wxzy, r8.wxzy - ld r4.xyzw, r4.yyyy, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(163) - ld r12.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r4.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r16.zzwz - ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r12.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r12.xz, r16.zzwz - ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.xz, r4.xxzx - f16tof32 r13.yw, r16.xxxy - f16tof32 r14.xz, r4.yywy - f16tof32 r14.yw, r16.zzzw - ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - f16tof32 r15.xz, r12.xxzx - f16tof32 r15.yw, r16.xxxy - f16tof32 r4.zw, r12.wwwy - f16tof32 r4.xy, r16.zwzz - break - default - mov r13.xy, r4.xzxx - mov r13.zw, l(0,0,0,0) - mov r14.xy, r4.ywyy - mov r14.zw, l(0,0,0,0) - mov r15.xy, r12.xzxx - mov r15.zw, l(0,0,0,0) - mov r4.xw, r12.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r16.x, r4.x - mov r16.yz, r12.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r0.yw, r12.zzzw - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r16.x, r4.z - mov r16.yz, r12.xxwx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r12.x, r4.y - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r16.xyzx, r12.xyzx - movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r3.yz, r12.xxwx - mov r12.x, r4.w - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r17.xyzx, r12.xyzx - movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r13.w, r0.y - mov r14.w, r0.w - mov r15.w, r3.y - mov r4.y, r3.z - break - case l(4) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r16.xz, r12.xxyx - mov r16.yw, r4.xxxz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.x, r4.x - f16tof32 r13.y, r12.x - f16tof32 r14.x, r4.z - f16tof32 r14.y, r12.y - f16tof32 r15.x, r4.y - f16tof32 r15.y, r12.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r12.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r13.x, r4.x - mov r13.yzw, l(0,0,0,0) - mov r14.x, r4.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r4.y - mov r15.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r9.xyzw, r13.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - add r7.xyzw, r11.xyzw, r15.xyzw - add r1.xyzw, r4.xyzw, r8.ywzx - else - mov r2.x, r3.x - endif -endif -mul r3.xyzw, r2.xxxx, r5.xyzw -mul r4.xyzw, r2.xxxx, r6.xyzw -mul r5.xyzw, r2.xxxx, r7.xyzw -mul r1.xyzw, r1.wxzy, r2.xxxx -if_nz r2.y - mov r3.xz, r3.zzxz - mov r4.xz, r4.zzxz - mov r5.xz, r5.zzxz - mov r1.xz, r1.zzxz -endif -ubfe r0.y, l(6), l(7), CB0[0][0].z -switch r0.y - case l(3) - mov_sat r3.xyzw, r3.xyzw - mad r6.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.x, r6.y, l(32), r6.x - imad r2.x, r6.z, l(1024), r2.x - imad r2.x, r6.w, l(0x00008000), r2.x - mov_sat r4.xyzw, r4.xyzw - mad r6.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.y, r6.y, l(32), r6.x - imad r2.y, r6.z, l(1024), r2.y - ishl r6.x, r6.w, l(31) - imad r2.y, r2.y, l(0x00010000), r6.x - iadd r0.y, r2.y, r2.x - mov_sat r5.xyzw, r5.xyzw - mad r6.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.x, r6.y, l(32), r6.x - imad r2.x, r6.z, l(1024), r2.x - imad r2.x, r6.w, l(0x00008000), r2.x - mov_sat r1.xyzw, r1.xyzw - mad r6.xyzw, r1.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.y, r6.y, l(32), r6.x - imad r2.y, r6.z, l(1024), r2.y - ishl r6.x, r6.w, l(31) - imad r2.y, r2.y, l(0x00010000), r6.x - iadd r0.w, r2.y, r2.x - break - case l(4) - mov_sat r3.xyz, r3.xyzx - mad r6.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.x, r6.y, l(32), r6.x - imad r2.x, r6.z, l(2048), r2.x - mov_sat r4.xyz, r4.xyzx - mad r6.xyz, r4.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.y, r6.y, l(32), r6.x - ishl r6.x, r6.z, l(27) - imad r2.y, r2.y, l(0x00010000), r6.x - iadd r0.y, r2.y, r2.x - mov_sat r5.xyz, r5.xyzx - mad r6.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.x, r6.y, l(32), r6.x - imad r2.x, r6.z, l(2048), r2.x - mov_sat r1.xyz, r1.xyzx - mad r6.xyz, r1.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.y, r6.y, l(32), r6.x - ishl r6.x, r6.z, l(27) - imad r2.y, r2.y, l(0x00010000), r6.x - iadd r0.w, r2.y, r2.x - break - case l(5) - mov_sat r3.xyz, r3.xyzx - mad r6.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.x, r6.y, l(32), r6.x - imad r2.x, r6.z, l(1024), r2.x - mov_sat r4.xyz, r4.xyzx - mad r6.xyz, r4.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.y, r6.y, l(32), r6.x - ishl r6.x, r6.z, l(26) - imad r2.y, r2.y, l(0x00010000), r6.x - iadd r0.y, r2.y, r2.x - mov_sat r5.xyz, r5.xyzx - mad r6.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.x, r6.y, l(32), r6.x - imad r2.x, r6.z, l(1024), r2.x - mov_sat r1.xyz, r1.xyzx - mad r6.xyz, r1.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r6.xyz, r6.xyzx - imad r2.y, r6.y, l(32), r6.x - ishl r6.x, r6.z, l(26) - imad r2.y, r2.y, l(0x00010000), r6.x - iadd r0.w, r2.y, r2.x - break - case l(10) - mov_sat r3.xy, r3.xyxx - mov_sat r3.zw, r4.xxxy - mad r6.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.x, r6.y, l(256), r6.x - imad r2.x, r6.z, l(0x00010000), r2.x - imad r0.y, r6.w, l(0x01000000), r2.x - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r1.xxxy - mad r6.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.x, r6.y, l(256), r6.x - imad r2.x, r6.z, l(0x00010000), r2.x - imad r0.w, r6.w, l(0x01000000), r2.x - break - case l(15) - mov_sat r3.xyzw, r3.xyzw - mad r6.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.x, r6.y, l(16), r6.x - imad r2.x, r6.z, l(256), r2.x - imad r2.x, r6.w, l(4096), r2.x - mov_sat r4.xyzw, r4.xyzw - mad r6.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.y, r6.y, l(16), r6.x - imad r2.y, r6.z, l(256), r2.y - ishl r3.y, r6.w, l(28) - imad r2.y, r2.y, l(0x00010000), r3.y - iadd r0.y, r2.y, r2.x - mov_sat r5.xyzw, r5.xyzw - mad r6.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.x, r6.y, l(16), r6.x - imad r2.x, r6.z, l(256), r2.x - imad r2.x, r6.w, l(4096), r2.x - mov_sat r1.xyzw, r1.xyzw - mad r6.xyzw, r1.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r2.y, r6.y, l(16), r6.x - imad r2.y, r6.z, l(256), r2.y - ishl r3.y, r6.w, l(28) - imad r2.y, r2.y, l(0x00010000), r3.y - iadd r0.w, r2.y, r2.x - break - case l(24) - mov_sat r1.z, r3.x - mov_sat r1.y, r4.x - mov_sat r1.w, r5.x - mov_sat r1.x, r1.x - mad r6.xyzw, r1.zywx, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r0.yw, r6.yyyw, l(0, 0x00010000, 0, 0x00010000), r6.xxxz - break - default - f32tof16 r2.x, r3.x - f32tof16 r2.y, r5.x - f32tof16 r3.x, r4.x - f32tof16 r3.y, r1.x - imad r0.yw, r3.xxxy, l(0, 0x00010000, 0, 0x00010000), r2.xxxy - break -endswitch -if_nz r2.z - if_z vThreadID.x - ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) - bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r1.xxxy, r0.yyyw - endif - if_z vThreadID.y - mov r0.y, r0.w - endif -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r1.xyzw, r1.xyzw, vThreadID.xyyx -bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r2.w - ubfe r0.z, l(3), l(4), CB0[0][0].z - ushr r2.x, CB0[0][0].w, l(10) - ishl r2.x, r2.x, l(5) - ishr r3.xyzw, r1.zwzw, l(4, 5, 3, 3) - ishr r2.y, r0.z, l(2) - ushr r2.x, r2.x, l(4) - and r2.x, r2.x, l(0x00007ffe) - imad r2.x, r2.y, r2.x, r3.x - ushr r2.z, r0.x, l(5) - imad r2.x, r2.x, r2.z, r3.y - ishl r2.z, r1.z, l(9) - and r2.z, r2.z, l(3072) - bfi r2.z, l(3), l(7), r1.w, r2.z - ishr r2.z, r2.z, l(6) - iadd r2.y, r2.y, r3.z - bfi r2.w, l(1), l(1), r2.y, l(0) - iadd r2.w, r2.w, r3.w - bfi r2.w, l(2), l(1), r2.w, l(0) - bfi r2.y, l(1), l(0), r2.y, r2.w - and r2.w, r2.z, l(48) - bfi r3.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.xxxx, l(0, 0, 0, 0) - imad r2.xw, r2.wwww, l(2, 0, 0, 16), r3.xxxy - bfi r2.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r2.zzzz, r2.xxwx - bfi r2.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), r0.zzzz, r2.xxzx - ubfe r0.z, l(3), l(6), r2.x - and r2.w, r2.y, l(6) - bfi r2.y, l(1), l(8), r2.y, l(0) - imad r0.z, r0.z, l(32), r2.y - imad r0.z, r2.w, l(4), r0.z - bfi r2.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r1.zzzz, r2.xzxx - bfi r0.z, l(9), l(3), r0.z, r2.y - bfi r0.z, l(6), l(0), r2.x, r0.z -else - ishr r2.xyzw, r1.xyzw, l(5, 5, 2, 3) - ushr r0.x, r0.x, l(5) - imad r0.x, r2.y, r0.x, r2.x - ishl r1.xy, r1.zzzz, l(3, 7, 0, 0) - and r1.xy, r1.xyxx, l(112, 2048, 0, 0) - bfi r2.x, l(3), l(1), r1.w, r1.x - ishl r1.x, r1.x, l(1) - bfi r1.x, l(3), l(2), r1.w, r1.x - and r1.x, r1.x, l(224) - bfi r1.w, l(24), l(8), r0.x, r1.x - bfi r1.w, l(4), l(0), r2.x, r1.w - bfi r1.w, l(1), l(4), r1.z, r1.w - ishl r3.xy, r1.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(24, 24, 0, 0), l(11, 10, 0, 0), r0.xxxx, r3.xyxx - bfi r2.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r2.xxxx, r3.xyxx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r1.zzzz, r2.xxyx - bfi r0.x, l(12), l(0), r1.y, r1.x - and r1.x, r1.z, l(1792) - iadd r0.x, r0.x, r1.x - and r1.x, r2.z, l(2) - iadd r1.x, r2.w, r1.x - bfi r1.x, l(2), l(6), r1.x, l(0) - iadd r0.x, r0.x, r1.x - bfi r0.z, l(6), l(0), r1.w, r0.x -endif -ushr r0.x, r0.z, l(1) -and r0.z, CB0[0][0].z, l(7) -ieq r0.z, r0.z, l(1) -if_nz r0.z - ishl r1.xy, r0.ywyy, l(8, 8, 0, 0) - ushr r1.zw, r0.yyyw, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.yw, r1.zzzw, r1.xxxy -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r0.ywyy -ret -// Approximately 1219 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.cso deleted file mode 100644 index 224e03591..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.h deleted file mode 100644 index 510e96632..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.h +++ /dev/null @@ -1,3386 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_16bpp.cs.hlsl -const uint8_t resolve_full_16bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xA9, 0x59, 0x81, 0x7A, 0xE3, 0x6D, 0x28, 0x5C, - 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xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 23 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].xzzz, l(1023, 0x01000000, 8, 7) -ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r2.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r2.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -movc r1.w, r4.z, l(1), l(0) -ishl r2.w, r5.x, r1.w -imad r2.w, r5.y, r3.x, r2.w -iadd r2.w, r2.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r1.w, r2.x, r1.w -imad r1.w, r2.w, l(1280), r1.w -iadd r2.x, r2.z, r4.z -ishl r2.y, l(4), r2.x -ishl r1.w, r1.w, l(2) -if_nz r4.z - ieq r2.z, r2.y, l(8) - if_nz r2.z - ld_raw r5.xyzw, r1.w, T0[0].zwxy - iadd r2.z, r1.w, l(16) - ld_raw r6.xyzw, r2.z, T0[0].zwxy - mov r7.xy, r5.zwzz - mov r8.xy, r6.zwzz - else - ld_raw r7.xy, r1.w, T0[0].xyxx - iadd r2.z, r2.y, r1.w - ld_raw r5.xy, r2.z, T0[0].xyxx - ishl r2.zw, l(0, 0, 8, 12), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r8.xy, r2.z, T0[0].xyxx - ld_raw r6.xy, r2.w, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r5.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r6.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.xxxy, l(0, 0, 16, 16) - f16tof32 r7.xz, r7.xxyx - f16tof32 r7.yw, r2.zzzw - ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) - f16tof32 r5.xz, r5.xxyx - f16tof32 r5.yw, r2.zzzw - ushr r2.zw, r8.xxxy, l(0, 0, 16, 16) - f16tof32 r8.xz, r8.xxyx - f16tof32 r8.yw, r2.zzzw - ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) - f16tof32 r6.xz, r6.xxyx - f16tof32 r6.yw, r2.zzzw - break - default - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - endswitch -else - ieq r2.z, r2.y, l(4) - if_nz r2.z - ld_raw r6.xyzw, r1.w, T0[0].wxyz - else - ld_raw r6.y, r1.w, T0[0].xxxx - iadd r2.z, r2.y, r1.w - ld_raw r6.z, r2.z, T0[0].xxxx - ishl r2.zw, l(0, 0, 8, 12), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r6.w, r2.z, T0[0].xxxx - ld_raw r6.x, r2.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r9.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r9.x, r6.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r9.x, r6.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r6.wwww, l(0, 8, 16, 24) - mov r9.x, r6.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r9.x, r6.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r9.x, r6.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r6.wwww, l(0, 10, 20, 30) - mov r9.x, r6.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r10.x, r6.y - mov r10.yz, r9.xxyx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - utof r2.zw, r9.zzzw - ushr r9.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r10.x, r6.z - mov r10.yz, r9.xxwx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r5.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r9.x, r6.w - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r4.xy, r9.xwxx - mov r9.x, r6.x - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r6.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r7.w, r2.z - mov r5.w, r2.w - mov r8.w, r4.x - mov r6.w, r4.y - break - case l(4) - ishl r9.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r6.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r9.zzwz - ishr r9.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r6.y - f16tof32 r7.y, r9.x - f16tof32 r5.x, r6.z - f16tof32 r5.y, r9.y - f16tof32 r8.x, r6.w - f16tof32 r8.y, r9.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r9.w - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r6.y - mov r7.yzw, l(0,0,0,0) - mov r5.x, r6.z - mov r5.yzw, l(0,0,0,0) - mov r8.x, r6.w - mov r8.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break - endswitch -endif -ibfe r2.z, l(6), l(16), CB0[0][0].z -ishl r2.z, r2.z, l(23) -iadd r2.z, r2.z, l(0x3f800000) -uge r2.w, r1.y, l(4) -if_nz r2.w - mul r2.w, r2.z, l(0.500000) - ishl r3.x, l(320), r4.z - iadd r3.x, r1.w, r3.x - if_nz r4.z - ieq r4.x, r2.y, l(8) - if_nz r4.x - ld_raw r9.xyzw, r3.x, T0[0].zwxy - iadd r4.x, r3.x, l(16) - ld_raw r10.xyzw, r4.x, T0[0].zwxy - mov r11.xy, r9.zwzz - mov r12.xy, r10.zwzz - else - ld_raw r11.xy, r3.x, T0[0].xyxx - iadd r4.x, r2.y, r3.x - ld_raw r9.xy, r4.x, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r3.xxxx, r4.xyxx - ld_raw r12.xy, r4.x, T0[0].xyxx - ld_raw r10.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) - f16tof32 r11.xz, r11.xxyx - f16tof32 r11.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) - f16tof32 r12.xz, r12.xxyx - f16tof32 r12.yw, r4.xxxy - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - break - default - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - endswitch - else - ieq r4.x, r2.y, l(4) - if_nz r4.x - ld_raw r10.xyzw, r3.x, T0[0].wxyz - else - ld_raw r10.y, r3.x, T0[0].xxxx - iadd r4.x, r2.y, r3.x - ld_raw r10.z, r4.x, T0[0].xxxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r3.xxxx, r4.xyxx - ld_raw r10.w, r4.x, T0[0].xxxx - ld_raw r10.x, r4.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r14.x, r10.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r4.xy, r13.zwzz - ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r14.x, r10.z - mov r14.yz, r13.xxwx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r13.x, r10.w - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r14.xy, r13.xwxx - mov r13.x, r10.x - and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r16.xyzx, r13.xyzx - movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) - mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r4.x - mov r9.w, r4.y - mov r12.w, r13.x - mov r10.w, r13.y - break - case l(4) - ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r10.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r13.zzwz - ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r13.x - f16tof32 r9.x, r10.z - f16tof32 r9.y, r13.y - f16tof32 r12.x, r10.w - f16tof32 r12.y, r13.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r13.w - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r9.x, r10.z - mov r9.yzw, l(0,0,0,0) - mov r12.x, r10.w - mov r12.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - endif - add r7.xyzw, r7.xyzw, r11.xyzw - add r5.xyzw, r5.xyzw, r9.xyzw - add r8.xyzw, r8.xyzw, r12.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r2.z, r2.z, l(0.250000) - ishl r4.xy, l(4, 324, 0, 0), r4.zzzz - iadd r1.yw, r1.wwww, r4.xxxy - if_nz r4.z - ieq r3.x, r2.y, l(8) - if_nz r3.x - ld_raw r9.xyzw, r1.y, T0[0].zwxy - iadd r3.x, r1.y, l(16) - ld_raw r10.xyzw, r3.x, T0[0].zwxy - mov r11.xy, r9.zwzz - mov r12.xy, r10.zwzz - else - ld_raw r11.xy, r1.y, T0[0].xyxx - iadd r3.x, r2.y, r1.y - ld_raw r9.xy, r3.x, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r12.xy, r4.x, T0[0].xyxx - ld_raw r10.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) - f16tof32 r11.xz, r11.xxyx - f16tof32 r11.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) - f16tof32 r12.xz, r12.xxyx - f16tof32 r12.yw, r4.xxxy - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - break - default - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - endswitch - else - ieq r3.x, r2.y, l(4) - if_nz r3.x - ld_raw r10.xyzw, r1.y, T0[0].wxyz - else - ld_raw r10.y, r1.y, T0[0].xxxx - iadd r3.x, r2.y, r1.y - ld_raw r10.z, r3.x, T0[0].xxxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r10.w, r4.x, T0[0].xxxx - ld_raw r10.x, r4.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r14.x, r10.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r4.xy, r13.zwzz - ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r14.x, r10.z - mov r14.yz, r13.xxwx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r13.x, r10.w - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r14.xy, r13.xwxx - mov r13.x, r10.x - and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r16.xyzx, r13.xyzx - movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) - mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r4.x - mov r9.w, r4.y - mov r12.w, r13.x - mov r10.w, r13.y - break - case l(4) - ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r10.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r13.zzwz - ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r13.x - f16tof32 r9.x, r10.z - f16tof32 r9.y, r13.y - f16tof32 r12.x, r10.w - f16tof32 r12.y, r13.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r13.w - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r9.x, r10.z - mov r9.yzw, l(0,0,0,0) - mov r12.x, r10.w - mov r12.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - endif - add r11.xyzw, r7.xyzw, r11.xyzw - add r9.xyzw, r5.xyzw, r9.xyzw - add r12.xyzw, r8.xyzw, r12.xyzw - add r10.xyzw, r6.xyzw, r10.xyzw - if_nz r4.z - ieq r1.y, r2.y, l(8) - if_nz r1.y - ld_raw r13.xyzw, r1.w, T0[0].zwxy - iadd r1.y, r1.w, l(16) - ld_raw r14.xyzw, r1.y, T0[0].zwxy - mov r15.xy, r13.zwzz - mov r16.xy, r14.zwzz - else - ld_raw r15.xy, r1.w, T0[0].xyxx - iadd r1.y, r2.y, r1.w - ld_raw r13.xy, r1.y, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.wwww, r4.xyxx - ld_raw r16.xy, r4.x, T0[0].xyxx - ld_raw r14.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r15.zw, r15.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r15.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.zw, r13.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r13.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.zw, r16.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r16.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r14.zw, r14.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r14.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r15.xyxx, l(16, 16, 0, 0) - f16tof32 r15.xz, r15.xxyx - f16tof32 r15.yw, r4.xxxy - ushr r4.xy, r13.xyxx, l(16, 16, 0, 0) - f16tof32 r13.xz, r13.xxyx - f16tof32 r13.yw, r4.xxxy - ushr r4.xy, r16.xyxx, l(16, 16, 0, 0) - f16tof32 r16.xz, r16.xxyx - f16tof32 r16.yw, r4.xxxy - ushr r4.xy, r14.xyxx, l(16, 16, 0, 0) - f16tof32 r14.xz, r14.xxyx - f16tof32 r14.yw, r4.xxxy - break - default - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - endswitch - else - ieq r1.y, r2.y, l(4) - if_nz r1.y - ld_raw r14.xyzw, r1.w, T0[0].wxyz - else - ld_raw r14.y, r1.w, T0[0].xxxx - iadd r1.y, r2.y, r1.w - ld_raw r14.z, r1.y, T0[0].xxxx - ishl r2.xy, l(8, 12, 0, 0), r2.xxxx - iadd r1.yw, r1.wwww, r2.xxxy - ld_raw r14.w, r1.y, T0[0].xxxx - ld_raw r14.x, r1.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r4.yzw, r14.yyyy, l(0, 8, 16, 24) - mov r4.x, r14.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r14.zzzz, l(0, 8, 16, 24) - mov r4.x, r14.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r13.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r14.wwww, l(0, 8, 16, 24) - mov r4.x, r14.w - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r16.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r4.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r14.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r14.yyyy, l(0, 10, 20, 30) - mov r4.x, r14.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r14.zzzz, l(0, 10, 20, 30) - mov r4.x, r14.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r13.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r14.wwww, l(0, 10, 20, 30) - mov r4.x, r14.w - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r16.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r4.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r14.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r4.xyzw, r14.yyyz, l(10, 20, 30, 30) - mov r17.x, r14.y - mov r17.yz, r4.xxyx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r15.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - utof r1.yw, r4.zzzw - ushr r4.xyzw, r14.zwwz, l(10, 10, 20, 20) - mov r17.x, r14.z - mov r17.yz, r4.xxwx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r4.x, r14.w - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r16.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r14.wxxx, l(30, 10, 20, 30) - utof r2.xy, r4.xwxx - mov r4.x, r14.x - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r15.w, r1.y - mov r13.w, r1.w - mov r16.w, r2.x - mov r14.w, r2.y - break - case l(4) - ishl r4.xyzw, r14.yzwx, l(16, 16, 16, 16) - mov r17.xz, r4.xxyx - mov r17.yw, r14.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.yz, r4.zzwz - ishr r4.xyzw, r14.ywzx, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r4.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r14.yzwx, l(16, 16, 16, 16) - f16tof32 r15.x, r14.y - f16tof32 r15.y, r4.x - f16tof32 r13.x, r14.z - f16tof32 r13.y, r4.y - f16tof32 r16.x, r14.w - f16tof32 r16.y, r4.z - f16tof32 r14.x, r14.x - f16tof32 r14.y, r4.w - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r15.x, r14.y - mov r15.yzw, l(0,0,0,0) - mov r13.x, r14.z - mov r13.yzw, l(0,0,0,0) - mov r16.x, r14.w - mov r16.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - endif - add r7.xyzw, r11.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r13.xyzw - add r8.xyzw, r12.xyzw, r16.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - else - mov r2.z, r2.w - endif -endif -mul r4.xyzw, r2.zzzz, r7.xyzw -mul r5.xyzw, r2.zzzz, r5.xyzw -mul r7.xyzw, r2.zzzz, r8.xyzw -mul r2.xyzw, r2.zzzz, r6.xyzw -if_nz r3.y - mov r4.xz, r4.zzxz - mov r5.xz, r5.zzxz - mov r7.xz, r7.zzxz - mov r2.xz, r2.zzxz -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.z - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r6.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r6.x - ushr r3.x, r1.x, l(5) - imad r1.z, r1.z, r3.x, r6.y - ishl r3.x, r0.z, l(9) - and r3.x, r3.x, l(3072) - bfi r3.x, l(3), l(7), r0.w, r3.x - ishr r3.x, r3.x, l(6) - iadd r1.w, r1.w, r6.z - bfi r3.y, l(1), l(1), r1.w, l(0) - iadd r3.y, r3.y, r6.w - bfi r3.y, l(2), l(1), r3.y, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.y - and r3.y, r3.x, l(48) - bfi r6.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r1.zzzz, l(0, 0, 0, 0) - imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r6.xxyx - bfi r3.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r3.xxxx, r3.yzyy - bfi r1.yz, l(0, 2, 2, 0), l(0, 7, 10, 0), r1.yyyy, r3.xxyx - ubfe r3.x, l(3), l(6), r1.y - and r3.y, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.x, l(32), r1.w - imad r1.w, r3.y, l(4), r1.w - bfi r1.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r6.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r6.y, r0.x, r6.x - ishl r1.xz, r0.zzzz, l(3, 0, 7, 0) - and r1.xz, r1.xxzx, l(112, 0, 2048, 0) - bfi r0.y, l(3), l(1), r0.w, r1.x - ishl r1.x, r1.x, l(1) - bfi r0.w, l(3), l(2), r0.w, r1.x - and r0.w, r0.w, l(224) - bfi r1.x, l(24), l(8), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r3.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(24, 0, 0, 24), l(11, 0, 0, 10), r0.xxxx, r3.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r6.z, l(2) - iadd r0.y, r6.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.y, l(6), l(0), r1.x, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(3) -ubfe r0.y, l(6), l(7), CB0[0][0].z -switch r0.y - case l(3) - mov_sat r4.xyzw, r4.xyzw - mad r1.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.w, r1.y, l(32), r1.x - imad r0.w, r1.z, l(1024), r0.w - imad r0.w, r1.w, l(0x00008000), r0.w - mov_sat r5.xyzw, r5.xyzw - mad r1.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r1.x, r1.y, l(32), r1.x - imad r1.x, r1.z, l(1024), r1.x - ishl r1.y, r1.w, l(31) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.y, r0.w, r1.x - mov_sat r7.xyzw, r7.xyzw - mad r1.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.w, r1.y, l(32), r1.x - imad r0.w, r1.z, l(1024), r0.w - imad r0.w, r1.w, l(0x00008000), r0.w - mov_sat r2.xyzw, r2.xyzw - mad r1.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r1.x, r1.y, l(32), r1.x - imad r1.x, r1.z, l(1024), r1.x - ishl r1.y, r1.w, l(31) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.z, r0.w, r1.x - break - case l(4) - mov_sat r4.xyz, r4.xyzx - mad r1.xyz, r4.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r0.w, r1.y, l(32), r1.x - imad r0.w, r1.z, l(2048), r0.w - mov_sat r5.xyz, r5.xyzx - mad r1.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r1.x, r1.y, l(32), r1.x - ishl r1.y, r1.z, l(27) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.y, r0.w, r1.x - mov_sat r7.xyz, r7.xyzx - mad r1.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r0.w, r1.y, l(32), r1.x - imad r0.w, r1.z, l(2048), r0.w - mov_sat r2.xyz, r2.xyzx - mad r1.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r1.x, r1.y, l(32), r1.x - ishl r1.y, r1.z, l(27) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.z, r0.w, r1.x - break - case l(5) - mov_sat r4.xyz, r4.xyzx - mad r1.xyz, r4.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r0.w, r1.y, l(32), r1.x - imad r0.w, r1.z, l(1024), r0.w - mov_sat r5.xyz, r5.xyzx - mad r1.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r1.x, r1.y, l(32), r1.x - ishl r1.y, r1.z, l(26) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.y, r0.w, r1.x - mov_sat r7.xyz, r7.xyzx - mad r1.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r0.w, r1.y, l(32), r1.x - imad r0.w, r1.z, l(1024), r0.w - mov_sat r2.xyz, r2.xyzx - mad r1.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r1.xyz, r1.xyzx - imad r1.x, r1.y, l(32), r1.x - ishl r1.y, r1.z, l(26) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.z, r0.w, r1.x - break - case l(10) - mov_sat r4.xy, r4.xyxx - mov_sat r4.zw, r5.xxxy - mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.w, r1.y, l(256), r1.x - imad r0.w, r1.z, l(0x00010000), r0.w - imad r0.y, r1.w, l(0x01000000), r0.w - mov_sat r7.xy, r7.xyxx - mov_sat r7.zw, r2.xxxy - mad r1.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.w, r1.y, l(256), r1.x - imad r0.w, r1.z, l(0x00010000), r0.w - imad r0.z, r1.w, l(0x01000000), r0.w - break - case l(15) - mov_sat r4.xyzw, r4.xyzw - mad r1.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.w, r1.y, l(16), r1.x - imad r0.w, r1.z, l(256), r0.w - imad r0.w, r1.w, l(4096), r0.w - mov_sat r5.xyzw, r5.xyzw - mad r1.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r1.x, r1.y, l(16), r1.x - imad r1.x, r1.z, l(256), r1.x - ishl r1.y, r1.w, l(28) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.y, r0.w, r1.x - mov_sat r7.xyzw, r7.xyzw - mad r1.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.w, r1.y, l(16), r1.x - imad r0.w, r1.z, l(256), r0.w - imad r0.w, r1.w, l(4096), r0.w - mov_sat r2.xyzw, r2.xyzw - mad r1.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r1.x, r1.y, l(16), r1.x - imad r1.x, r1.z, l(256), r1.x - ishl r1.y, r1.w, l(28) - imad r1.x, r1.x, l(0x00010000), r1.y - iadd r0.z, r0.w, r1.x - break - case l(24) - mov_sat r2.z, r4.x - mov_sat r2.y, r5.x - mov_sat r2.w, r7.x - mov_sat r2.x, r2.x - mad r1.xyzw, r2.zywx, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.yz, r1.yywy, l(0, 0x00010000, 0x00010000, 0), r1.xxzx - break - default - f32tof16 r1.x, r4.x - f32tof16 r1.y, r7.x - f32tof16 r3.x, r5.x - f32tof16 r3.y, r2.x - imad r0.yz, r3.xxyx, l(0, 0x00010000, 0x00010000, 0), r1.xxyx - break -endswitch -ieq r0.w, r3.w, l(1) -if_nz r0.w - ishl r1.xy, r0.yzyy, l(8, 8, 0, 0) - ushr r1.zw, r0.yyyz, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.yz, r1.zzwz, r1.xxyx -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r0.yzyy -ret -// Approximately 1298 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.cso deleted file mode 100644 index 118b681ab..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h deleted file mode 100644 index 3286823fb..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h +++ /dev/null @@ -1,21224 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_16bpp_from_32bpp_3xres.cs.hlsl -const uint8_t resolve_full_16bpp_from_32bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xE4, 0x44, 0xFB, 0xB4, 0x2D, 0xB7, 0x76, 0x41, - 0x32, 0xA6, 0x33, 0xA8, 0x5D, 0x50, 0x85, 0x8D, 0x01, 0x00, 0x00, 0x00, - 0xA8, 0xE2, 0x03, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x0C, 0xE2, 0x03, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, - 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, - 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, - 0x52, 0x65, 0x73, 0x6F, 0x6C, 0x76, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.txt deleted file mode 100644 index 2628283ba..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.txt +++ /dev/null @@ -1,8018 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 28 -dcl_thread_group 8, 8, 1 -ishl r0.x, vThreadID.x, l(2) -ushr r0.z, CB0[0][0].y, l(7) -bfi r0.z, l(11), l(3), r0.z, l(0) -uge r0.z, r0.x, r0.z -if_nz r0.z - ret -endif -and r1.xyzw, CB0[0][0].xzzx, l(0x40000000, 7, 8, 1023) -mov r0.y, vThreadID.y -ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) -movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) -ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r2.z, CB0[0][0].y -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) -iadd r3.xyzw, r0.xyyx, r3.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r1.z - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) - ishr r5.x, r1.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r5.x, r2.w, r4.x - ushr r4.x, r1.x, l(5) - imad r2.w, r2.w, r4.x, r4.y - ishl r4.x, r3.z, l(9) - and r4.x, r4.x, l(3072) - bfi r4.x, l(3), l(7), r3.w, r4.x - ishr r4.x, r4.x, l(6) - iadd r4.y, r4.z, r5.x - bfi r4.z, l(1), l(1), r4.y, l(0) - iadd r4.z, r4.z, r4.w - bfi r4.z, l(2), l(1), r4.z, l(0) - bfi r4.y, l(1), l(0), r4.y, r4.z - and r4.z, r4.x, l(48) - bfi r5.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy - bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz - bfi r4.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), r1.zzzz, r4.xxzx - ubfe r1.z, l(3), l(6), r4.x - and r2.w, r4.y, l(6) - bfi r4.y, l(1), l(8), r4.y, l(0) - imad r1.z, r1.z, l(32), r4.y - imad r1.z, r2.w, l(4), r1.z - bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xzxx - bfi r1.z, l(9), l(3), r1.z, r4.y - bfi r1.z, l(6), l(0), r4.x, r1.z -else - ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) - ushr r1.x, r1.x, l(5) - imad r1.x, r4.y, r1.x, r4.x - ishl r3.xy, r3.zzzz, l(3, 7, 0, 0) - and r3.xy, r3.xyxx, l(112, 2048, 0, 0) - bfi r2.w, l(3), l(1), r3.w, r3.x - ishl r3.x, r3.x, l(1) - bfi r3.x, l(3), l(2), r3.w, r3.x - and r3.x, r3.x, l(224) - bfi r3.w, l(24), l(8), r1.x, r3.x - bfi r3.w, l(4), l(0), r2.w, r3.w - bfi r3.w, l(1), l(4), r3.z, r3.w - ishl r4.xy, r3.xxxx, l(3, 2, 0, 0) - bfi r4.xy, l(24, 24, 0, 0), l(11, 10, 0, 0), r1.xxxx, r4.xyxx - bfi r4.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r2.wwww, r4.xyxx - bfi r3.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r3.zzzz, r4.xxyx - bfi r1.x, l(12), l(0), r3.y, r3.x - and r2.w, r3.z, l(1792) - iadd r1.x, r1.x, r2.w - and r2.w, r4.z, l(2) - iadd r2.w, r4.w, r2.w - bfi r2.w, l(2), l(6), r2.w, l(0) - iadd r1.x, r1.x, r2.w - bfi r1.z, l(6), l(0), r3.w, r1.x -endif -imul null, r1.x, r1.z, l(9) -ushr r1.x, r1.x, l(3) -bfi r2.xz, l(5, 0, 2, 0), l(3, 0, 3, 0), r2.zzxz, l(0, 0, 0, 0) -iadd r0.xy, r0.xyxx, r2.xzxx -ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx -uge r1.z, l(3), r2.y -if_nz r1.z - mov r4.y, r2.y -else - ieq r1.z, r2.y, l(5) - if_nz r1.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r2.xz, r3.zzzz, l(2, 0, 1, 0) -and r2.zw, r2.xxxz, l(0, 0, 1, 1) -ishl r0.xy, r0.xyxx, r2.zwzz -ushr r4.x, r4.y, l(1) -and r2.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r0.xy, r0.xyxx, r2.zwzz -udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) -movc r1.z, r3.w, l(1), l(0) -ishl r3.z, r2.z, r1.z -imad r1.w, r2.w, r1.w, r3.z -iadd r1.w, r1.w, r3.y -imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx -imad r0.x, r0.y, l(80), r0.x -ishl r0.x, r0.x, r1.z -imad r0.x, r1.w, l(1280), r0.x -imul null, r0.y, r0.x, l(36) -ubfe r1.z, l(4), l(25), CB0[0][0].x -ld_raw r4.xyzw, r0.y, T0[0].wxyz -imad r2.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 16, 20) -ld_raw r5.x, r2.z, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r10.x, r4.y - mov r10.yz, r9.xxyx - and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) - utof r3.yz, r9.zzwz - ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r10.x, r4.z - mov r10.yz, r9.xxwx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r9.x, r4.w - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r10.xy, r9.xwxx - mov r9.x, r4.x - and r11.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r12.xyzx, r9.xyzx - movc r4.xyz, r11.xyzx, r9.xyzx, l(0,0,0,0) - mul r9.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r10.xyz, r5.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r5.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r5.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx - ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r12.xyzx, r11.xyzx - movc r5.xyz, r10.xyzx, r11.xyzx, l(0,0,0,0) - utof r0.y, r5.w - mul r5.w, r0.y, l(0.333333) - mov r6.w, r3.y - mov r7.w, r3.z - mov r8.w, r9.x - mov r4.w, r9.y - break - case l(4) - ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r4.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r9.zzwz - ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r5.y, r5.x, l(16) - ishr r3.yz, r5.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r5.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r4.y - f16tof32 r6.y, r9.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r4.w - f16tof32 r8.y, r9.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r9.w - ushr r0.y, r5.x, l(16) - f16tof32 r5.x, r5.x - f16tof32 r5.y, r0.y - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.x, r4.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r4.w - mov r8.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -ibfe r0.y, l(6), l(16), CB0[0][0].z -ishl r0.y, r0.y, l(23) -iadd r0.y, r0.y, l(0x3f800000) -uge r1.w, r2.y, l(4) -if_nz r1.w - mul r2.z, r0.y, l(0.500000) - imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 2880, 2896, 0) - ld_raw r9.xyzw, r3.y, T0[0].wxyz - ld_raw r10.x, r3.z, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r15.x, r9.y - mov r15.yz, r14.xxyx - and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) - utof r3.yz, r14.zzwz - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r15.x, r9.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r14.x, r9.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r15.xy, r14.xwxx - mov r14.x, r9.x - and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r17.xyzx, r14.xyzx - movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) - mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.w, r10.w - mul r10.w, r3.w, l(0.333333) - mov r11.w, r3.y - mov r12.w, r3.z - mov r13.w, r14.x - mov r9.w, r14.y - break - case l(4) - ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r9.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r14.zzwz - ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r10.y, r10.x, l(16) - ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r9.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r9.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r9.w - f16tof32 r13.y, r14.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r14.w - ushr r3.y, r10.x, l(16) - f16tof32 r10.x, r10.x - f16tof32 r10.y, r3.y - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r9.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r9.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r9.w - mov r13.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r11.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r8.xyzw, r13.xyzw - add r4.xyzw, r4.xyzw, r9.xyzw - add r5.xyzw, r5.xyzw, r10.xyzw - uge r3.y, r2.y, l(6) - if_nz r3.y - mul r2.z, r0.y, l(0.250000) - imad r9.xyzw, r0.xxxx, l(36, 36, 36, 36), l(36, 52, 2916, 2932) - ld_raw r10.xyzw, r9.x, T0[0].wxyz - ld_raw r11.x, r9.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r16.x, r10.y - mov r16.yz, r15.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r3.yz, r15.zzwz - ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r16.x, r10.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r15.x, r10.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r9.xy, r15.xwxx - mov r15.x, r10.x - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.w, r11.w - mul r11.w, r3.w, l(0.333333) - mov r12.w, r3.y - mov r13.w, r3.z - mov r14.w, r9.x - mov r10.w, r9.y - break - case l(4) - ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r10.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r15.zzwz - ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r11.y, r11.x, l(16) - ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r10.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r10.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r10.w - f16tof32 r14.y, r15.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r15.w - ushr r3.y, r11.x, l(16) - f16tof32 r11.x, r11.x - f16tof32 r11.y, r3.y - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r12.x, r10.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.w - mov r14.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r12.xyzw, r6.xyzw, r12.xyzw - add r13.xyzw, r7.xyzw, r13.xyzw - add r14.xyzw, r8.xyzw, r14.xyzw - add r10.xyzw, r4.xyzw, r10.xyzw - add r11.xyzw, r5.xyzw, r11.xyzw - ld_raw r15.xyzw, r9.z, T0[0].wxyz - ld_raw r9.x, r9.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) - mov r20.x, r15.y - mov r20.yz, r19.xxyx - and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) - and r21.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) - utof r3.yz, r19.zzwz - ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) - mov r20.x, r15.z - mov r20.yz, r19.xxwx - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r19.x, r15.w - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) - utof r20.xy, r19.xwxx - mov r19.x, r15.x - and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r22.xyzx, r19.xyzx - movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) - mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r23.xyz, r23.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx - ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r22.xyzx, r21.xyzx - movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) - utof r3.w, r9.w - mul r9.w, r3.w, l(0.333333) - mov r16.w, r3.y - mov r17.w, r3.z - mov r18.w, r19.x - mov r15.w, r19.y - break - case l(4) - ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - mov r20.xz, r19.xxyx - mov r20.yw, r15.yyyz - ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.yz, r19.zzwz - ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r9.y, r9.x, l(16) - ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - f16tof32 r16.x, r15.y - f16tof32 r16.y, r19.x - f16tof32 r17.x, r15.z - f16tof32 r17.y, r19.y - f16tof32 r18.x, r15.w - f16tof32 r18.y, r19.z - f16tof32 r15.x, r15.x - f16tof32 r15.y, r19.w - ushr r3.y, r9.x, l(16) - f16tof32 r9.x, r9.x - f16tof32 r9.y, r3.y - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r16.x, r15.y - mov r16.yzw, l(0,0,0,0) - mov r17.x, r15.z - mov r17.yzw, l(0,0,0,0) - mov r18.x, r15.w - mov r18.yzw, l(0,0,0,0) - mov r15.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r12.xyzw, r16.xyzw - add r7.xyzw, r13.xyzw, r17.xyzw - add r8.xyzw, r14.xyzw, r18.xyzw - add r4.xyzw, r10.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r11.xyzw - endif -else - mov r2.z, r0.y -endif -mul r6.xyzw, r2.zzzz, r6.xyzw -mul r7.xyzw, r2.zzzz, r7.xyzw -mul r8.xyzw, r2.zzzz, r8.xyzw -mul r4.xyzw, r2.zzzz, r4.xyzw -mul r5.xyzw, r2.zzzz, r5.xyzw -and r2.z, CB0[0][0].z, l(0x01000000) -if_nz r2.z - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r4.xz, r4.zzxz - mov r5.xz, r5.zzxz -endif -switch r3.x - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r11.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(32), r11.x - imad r3.y, r11.z, l(1024), r3.y - imad r9.x, r11.w, l(0x00008000), r3.y - mov_sat r7.xyzw, r7.xyzw - mad r11.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(32), r11.x - imad r3.y, r11.z, l(1024), r3.y - imad r9.z, r11.w, l(0x00008000), r3.y - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(32), r11.x - imad r3.y, r11.z, l(1024), r3.y - imad r9.w, r11.w, l(0x00008000), r3.y - mov_sat r4.xyzw, r4.xyzw - mad r11.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(32), r11.x - imad r3.y, r11.z, l(1024), r3.y - imad r9.y, r11.w, l(0x00008000), r3.y - mov_sat r5.xyzw, r5.xyzw - mad r11.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(32), r11.x - imad r3.y, r11.z, l(1024), r3.y - imad r10.x, r11.w, l(0x00008000), r3.y - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.x, r3.w, l(2048), r3.y - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.z, r3.w, l(2048), r3.y - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.w, r3.w, l(2048), r3.y - mov_sat r4.xyz, r4.xyzx - mad r3.yzw, r4.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.y, r3.w, l(2048), r3.y - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r10.x, r3.w, l(2048), r3.y - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.x, r3.w, l(1024), r3.y - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.z, r3.w, l(1024), r3.y - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.w, r3.w, l(1024), r3.y - mov_sat r4.xyz, r4.xyzx - mad r3.yzw, r4.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r9.y, r3.w, l(1024), r3.y - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(32), r3.y - imad r10.x, r3.w, l(1024), r3.y - break - case l(10) - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.x, r3.z, l(256), r3.y - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.z, r3.z, l(256), r3.y - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.w, r3.z, l(256), r3.y - mov_sat r4.xy, r4.xyxx - mad r3.yz, r4.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.y, r3.z, l(256), r3.y - mov_sat r5.xy, r5.xyxx - mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.x, r3.z, l(256), r3.y - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r11.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(16), r11.x - imad r3.y, r11.z, l(256), r3.y - imad r9.x, r11.w, l(4096), r3.y - mov_sat r7.xyzw, r7.xyzw - mad r11.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(16), r11.x - imad r3.y, r11.z, l(256), r3.y - imad r9.z, r11.w, l(4096), r3.y - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(16), r11.x - imad r3.y, r11.z, l(256), r3.y - imad r9.w, r11.w, l(4096), r3.y - mov_sat r4.xyzw, r4.xyzw - mad r11.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(16), r11.x - imad r3.y, r11.z, l(256), r3.y - imad r9.y, r11.w, l(4096), r3.y - mov_sat r5.xyzw, r5.xyzw - mad r11.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(16), r11.x - imad r3.y, r11.z, l(256), r3.y - imad r10.x, r11.w, l(4096), r3.y - break - case l(24) - mov_sat r6.x, r6.x - mad r3.y, r6.x, l(65535.000000), l(0.500000) - ftou r9.x, r3.y - mov_sat r7.x, r7.x - mad r3.y, r7.x, l(65535.000000), l(0.500000) - ftou r9.z, r3.y - mov_sat r8.x, r8.x - mad r3.y, r8.x, l(65535.000000), l(0.500000) - ftou r9.w, r3.y - mov_sat r4.x, r4.x - mad r3.y, r4.x, l(65535.000000), l(0.500000) - ftou r9.y, r3.y - mov_sat r5.x, r5.x - mad r3.y, r5.x, l(65535.000000), l(0.500000) - ftou r10.x, r3.y - break - default - f32tof16 r9.x, r6.x - f32tof16 r9.z, r7.x - f32tof16 r9.w, r8.x - f32tof16 r9.y, r4.x - f32tof16 r10.x, r5.x - break -endswitch -ieq r1.y, r1.y, l(1) -if_nz r1.y - bfi r4.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r9.xzwy, l(0, 0, 0, 0) - ushr r5.xyzw, r9.xzwy, l(8, 8, 8, 8) - iadd r9.xyzw, r4.xwyz, r5.xwyz - bfi r3.y, l(8), l(8), r10.x, l(0) - ushr r3.z, r10.x, l(8) - iadd r10.x, r3.y, r3.z - mov r4.xy, r9.xwxx - mov r9.xy, r9.zyzz -else - mov r4.xy, r9.xwxx - mov r9.xy, r9.zyzz -endif -ld_raw r5.xyzw, r2.w, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r11.yzw, r5.yyyy, l(0, 8, 16, 24) - mov r11.x, r5.y - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r5.zzzz, l(0, 8, 16, 24) - mov r11.x, r5.z - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r5.wwww, l(0, 8, 16, 24) - mov r11.x, r5.w - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r11.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r5.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r11.yzw, r5.yyyy, l(0, 10, 20, 30) - mov r11.x, r5.y - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r5.zzzz, l(0, 10, 20, 30) - mov r11.x, r5.z - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r5.wwww, l(0, 10, 20, 30) - mov r11.x, r5.w - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r11.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r5.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r11.xyzw, r5.yyyz, l(10, 20, 30, 30) - mov r12.x, r5.y - mov r12.yz, r11.xxyx - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r13.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r13.xyzx, r12.xyzx - movc r6.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - utof r3.yz, r11.zzwz - ushr r11.xyzw, r5.zwwz, l(10, 10, 20, 20) - mov r12.x, r5.z - mov r12.yz, r11.xxwx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r7.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r11.x, r5.w - and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r8.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) - ushr r11.xyzw, r5.wxxx, l(30, 10, 20, 30) - utof r4.zw, r11.xxxw - mov r11.x, r5.x - and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r5.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r6.w, r3.y - mov r7.w, r3.z - mov r8.w, r4.z - mov r5.w, r4.w - break - case l(4) - ishl r11.xyzw, r5.yzwx, l(16, 16, 16, 16) - mov r12.xz, r11.xxyx - mov r12.yw, r5.yyyz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.yz, r11.zzwz - ishr r11.xyzw, r5.ywzx, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r11.xyzw, r5.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r5.y - f16tof32 r6.y, r11.x - f16tof32 r7.x, r5.z - f16tof32 r7.y, r11.y - f16tof32 r8.x, r5.w - f16tof32 r8.y, r11.z - f16tof32 r5.x, r5.x - f16tof32 r5.y, r11.w - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.x, r5.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r5.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r5.w - mov r8.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.w, r0.y, l(0.500000) - imad r3.y, r0.x, l(36), l(2900) - ld_raw r11.xyzw, r3.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r11.yyyy, l(0, 8, 16, 24) - mov r15.x, r11.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r11.zzzz, l(0, 8, 16, 24) - mov r15.x, r11.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r11.wwww, l(0, 8, 16, 24) - mov r15.x, r11.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r11.yyyy, l(0, 10, 20, 30) - mov r15.x, r11.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r11.zzzz, l(0, 10, 20, 30) - mov r15.x, r11.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r11.wwww, l(0, 10, 20, 30) - mov r15.x, r11.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r11.yyyz, l(10, 20, 30, 30) - mov r16.x, r11.y - mov r16.yz, r15.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r3.yz, r15.zzwz - ushr r15.xyzw, r11.zwwz, l(10, 10, 20, 20) - mov r16.x, r11.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r15.x, r11.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r11.wxxx, l(30, 10, 20, 30) - utof r4.zw, r15.xxxw - mov r15.x, r11.x - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r12.w, r3.y - mov r13.w, r3.z - mov r14.w, r4.z - mov r11.w, r4.w - break - case l(4) - ishl r15.xyzw, r11.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r11.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.yz, r15.zzwz - ishr r15.xyzw, r11.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r11.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r11.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r11.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r11.w - f16tof32 r14.y, r15.z - f16tof32 r11.x, r11.x - f16tof32 r11.y, r15.w - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r12.x, r11.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r11.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r11.w - mov r14.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r12.xyzw - add r7.xyzw, r7.xyzw, r13.xyzw - add r8.xyzw, r8.xyzw, r14.xyzw - add r5.xyzw, r5.xyzw, r11.xyzw - uge r3.y, r2.y, l(6) - if_nz r3.y - mul r2.w, r0.y, l(0.250000) - imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 56, 2936, 0) - ld_raw r11.xyzw, r3.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r11.yyyy, l(0, 8, 16, 24) - mov r15.x, r11.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r11.zzzz, l(0, 8, 16, 24) - mov r15.x, r11.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r11.wwww, l(0, 8, 16, 24) - mov r15.x, r11.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r11.yyyy, l(0, 10, 20, 30) - mov r15.x, r11.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r11.zzzz, l(0, 10, 20, 30) - mov r15.x, r11.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r11.wwww, l(0, 10, 20, 30) - mov r15.x, r11.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r11.yyyz, l(10, 20, 30, 30) - mov r16.x, r11.y - mov r16.yz, r15.xxyx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.yw, r15.zzzw - ushr r15.xyzw, r11.zwwz, l(10, 10, 20, 20) - mov r16.x, r11.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yw, r3.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r15.x, r11.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r11.wxxx, l(30, 10, 20, 30) - utof r4.zw, r15.xxxw - mov r15.x, r11.x - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r12.w, r3.y - mov r13.w, r3.w - mov r14.w, r4.z - mov r11.w, r4.w - break - case l(4) - ishl r15.xyzw, r11.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r11.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.yz, r15.zzwz - ishr r15.xyzw, r11.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r11.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r11.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r11.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r11.w - f16tof32 r14.y, r15.z - f16tof32 r11.x, r11.x - f16tof32 r11.y, r15.w - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r12.x, r11.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r11.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r11.w - mov r14.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r12.xyzw, r6.xyzw, r12.xyzw - add r13.xyzw, r7.xyzw, r13.xyzw - add r14.xyzw, r8.xyzw, r14.xyzw - add r11.xyzw, r5.xyzw, r11.xyzw - ld_raw r15.xyzw, r3.z, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) - mov r20.x, r15.y - mov r20.yz, r19.xxyx - and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) - and r21.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) - utof r3.yz, r19.zzwz - ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) - mov r20.x, r15.z - mov r20.yz, r19.xxwx - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r19.x, r15.w - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) - utof r4.zw, r19.xxxw - mov r19.x, r15.x - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r16.w, r3.y - mov r17.w, r3.z - mov r18.w, r4.z - mov r15.w, r4.w - break - case l(4) - ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - mov r20.xz, r19.xxyx - mov r20.yw, r15.yyyz - ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.yz, r19.zzwz - ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - break - case l(6) - ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - f16tof32 r16.x, r15.y - f16tof32 r16.y, r19.x - f16tof32 r17.x, r15.z - f16tof32 r17.y, r19.y - f16tof32 r18.x, r15.w - f16tof32 r18.y, r19.z - f16tof32 r15.x, r15.x - f16tof32 r15.y, r19.w - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - break - default - mov r16.x, r15.y - mov r16.yzw, l(0,0,0,0) - mov r17.x, r15.z - mov r17.yzw, l(0,0,0,0) - mov r18.x, r15.w - mov r18.yzw, l(0,0,0,0) - mov r15.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r12.xyzw, r16.xyzw - add r7.xyzw, r13.xyzw, r17.xyzw - add r8.xyzw, r14.xyzw, r18.xyzw - add r5.xyzw, r11.xyzw, r15.xyzw - endif -else - mov r2.w, r0.y -endif -mul r6.xyzw, r2.wwww, r6.xyzw -mul r7.xyzw, r2.wwww, r7.xyzw -mul r8.xyzw, r2.wwww, r8.xyzw -mul r5.xyzw, r2.wwww, r5.xyzw -if_nz r2.z - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r5.xz, r5.zzxz -endif -switch r3.x - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r11.y, r12.w, l(0x00008000), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r11.z, r12.w, l(0x00008000), r2.w - mov_sat r8.xyzw, r8.xyzw - mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r11.w, r12.w, l(0x00008000), r2.w - mov_sat r5.xyzw, r5.xyzw - mad r12.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r11.x, r12.w, l(0x00008000), r2.w - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.y, r3.w, l(2048), r2.w - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.z, r3.w, l(2048), r2.w - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.w, r3.w, l(2048), r2.w - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.x, r3.w, l(2048), r2.w - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.y, r3.w, l(1024), r2.w - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.z, r3.w, l(1024), r2.w - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.w, r3.w, l(1024), r2.w - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r11.x, r3.w, l(1024), r2.w - break - case l(10) - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.y, r3.z, l(256), r3.y - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.z, r3.z, l(256), r3.y - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.w, r3.z, l(256), r3.y - mov_sat r5.xy, r5.xyxx - mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.x, r3.z, l(256), r3.y - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r11.y, r12.w, l(4096), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r11.z, r12.w, l(4096), r2.w - mov_sat r8.xyzw, r8.xyzw - mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r11.w, r12.w, l(4096), r2.w - mov_sat r5.xyzw, r5.xyzw - mad r12.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r11.x, r12.w, l(4096), r2.w - break - case l(24) - mov_sat r6.x, r6.x - mad r2.w, r6.x, l(65535.000000), l(0.500000) - ftou r11.y, r2.w - mov_sat r7.x, r7.x - mad r2.w, r7.x, l(65535.000000), l(0.500000) - ftou r11.z, r2.w - mov_sat r8.x, r8.x - mad r2.w, r8.x, l(65535.000000), l(0.500000) - ftou r11.w, r2.w - mov_sat r5.x, r5.x - mad r2.w, r5.x, l(65535.000000), l(0.500000) - ftou r11.x, r2.w - break - default - f32tof16 r11.y, r6.x - f32tof16 r11.z, r7.x - f32tof16 r11.w, r8.x - f32tof16 r11.x, r5.x - break -endswitch -if_nz r1.y - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.yzwx, l(0, 0, 0, 0) - ushr r6.xyzw, r11.yzwx, l(8, 8, 8, 8) - iadd r11.xyzw, r5.wxyz, r6.wxyz - mov r9.zw, r11.yyyw - mov r10.y, r11.z -else - mov r9.zw, r11.yyyw - mov r10.y, r11.z -endif -if_nz r0.z - mov r4.x, r9.x - mov r9.y, r10.x - mov r10.y, r9.w -endif -if_nz r0.w - mov r4.xy, r9.yzyy - mov r9.x, r10.x -endif -imad r4.xyzw, r9.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r4.xyxx -store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw -iadd r4.xyzw, r1.xxxx, l(1, 2, 3, 4) -imad r5.xyzw, r9.zwzz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.xyxx -store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw -movc r0.z, r2.x, l(72), l(36) -imad r0.x, r0.x, l(36), r0.z -ld_raw r5.xyzw, r0.x, T0[0].wxyz -iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) -ld_raw r6.x, r2.x, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r10.yzw, r5.yyyy, l(0, 8, 16, 24) - mov r10.x, r5.y - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r5.zzzz, l(0, 8, 16, 24) - mov r10.x, r5.z - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r5.wwww, l(0, 8, 16, 24) - mov r10.x, r5.w - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r10.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r10.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r6.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r10.yzw, r5.yyyy, l(0, 10, 20, 30) - mov r10.x, r5.y - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r5.zzzz, l(0, 10, 20, 30) - mov r10.x, r5.z - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r5.wwww, l(0, 10, 20, 30) - mov r10.x, r5.w - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r10.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r10.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r6.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r10.xyzw, r5.yyyz, l(10, 20, 30, 30) - mov r12.x, r5.y - mov r12.yz, r10.xxyx - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r13.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r13.xyzx, r12.xyzx - movc r7.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - utof r3.yz, r10.zzwz - ushr r10.xyzw, r5.zwwz, l(10, 10, 20, 20) - mov r12.x, r5.z - mov r12.yz, r10.xxwx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r10.x, r5.w - and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r13.xyzx, r10.xyzx - movc r9.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) - ushr r10.xyzw, r5.wxxx, l(30, 10, 20, 30) - utof r11.zw, r10.xxxw - mov r10.x, r5.x - and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r13.xyzx, r10.xyzx - movc r5.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) - mul r10.xy, r11.zwzz, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r12.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r15.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r14.xyzx, r13.xyzx, r15.xyzx - ishl r14.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r6.xyz, r12.xyzx, r13.xyzx, l(0,0,0,0) - utof r2.x, r6.w - mul r6.w, r2.x, l(0.333333) - mov r7.w, r3.y - mov r8.w, r3.z - mov r9.w, r10.x - mov r5.w, r10.y - break - case l(4) - ishl r10.xyzw, r5.yzwx, l(16, 16, 16, 16) - mov r12.xz, r10.xxyx - mov r12.yw, r5.yyyz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.yz, r10.zzwz - ishr r10.xyzw, r5.ywzx, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r6.y, r6.x, l(16) - ishr r3.yz, r6.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r6.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r10.xyzw, r5.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r5.y - f16tof32 r7.y, r10.x - f16tof32 r8.x, r5.z - f16tof32 r8.y, r10.y - f16tof32 r9.x, r5.w - f16tof32 r9.y, r10.z - f16tof32 r5.x, r5.x - f16tof32 r5.y, r10.w - ushr r2.x, r6.x, l(16) - f16tof32 r6.x, r6.x - f16tof32 r6.y, r2.x - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r5.y - mov r7.yzw, l(0,0,0,0) - mov r8.x, r5.z - mov r8.yzw, l(0,0,0,0) - mov r9.x, r5.w - mov r9.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.x, r0.y, l(0.500000) - iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) - ld_raw r10.xyzw, r3.y, T0[0].wxyz - ld_raw r12.x, r3.z, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r16.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r16.x, r10.y - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r16.x, r10.z - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r10.wwww, l(0, 8, 16, 24) - mov r16.x, r10.w - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r10.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r16.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r16.x, r10.y - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r16.x, r10.z - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r10.wwww, l(0, 10, 20, 30) - mov r16.x, r10.w - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r10.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r16.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r17.x, r10.y - mov r17.yz, r16.xxyx - and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) - utof r3.yz, r16.zzwz - ushr r16.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r17.x, r10.z - mov r17.yz, r16.xxwx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r16.x, r10.w - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - ushr r16.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r11.zw, r16.xxxw - mov r16.x, r10.x - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r10.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx - ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) - utof r3.w, r12.w - mul r12.w, r3.w, l(0.333333) - mov r13.w, r3.y - mov r14.w, r3.z - mov r15.w, r11.z - mov r10.w, r11.w - break - case l(4) - ishl r16.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r10.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r16.zzwz - ishr r16.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r12.y, r12.x, l(16) - ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - case l(6) - ushr r16.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r13.x, r10.y - f16tof32 r13.y, r16.x - f16tof32 r14.x, r10.z - f16tof32 r14.y, r16.y - f16tof32 r15.x, r10.w - f16tof32 r15.y, r16.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r16.w - ushr r3.y, r12.x, l(16) - f16tof32 r12.x, r12.x - f16tof32 r12.y, r3.y - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - default - mov r13.x, r10.y - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r10.w - mov r15.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r13.xyzw - add r8.xyzw, r8.xyzw, r14.xyzw - add r9.xyzw, r9.xyzw, r15.xyzw - add r5.xyzw, r5.xyzw, r10.xyzw - add r6.xyzw, r6.xyzw, r12.xyzw - uge r3.y, r2.y, l(6) - if_nz r3.y - mul r2.x, r0.y, l(0.250000) - iadd r10.xyzw, r0.xxxx, l(36, 52, 2916, 2932) - ld_raw r12.xyzw, r10.x, T0[0].wxyz - ld_raw r13.x, r10.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) - mov r18.x, r12.y - mov r18.yz, r17.xxyx - and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) - and r19.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r14.xyz, r3.yzwy, r18.xyzx, l(0,0,0,0) - utof r3.yz, r17.zzwz - ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) - mov r18.x, r12.z - mov r18.yz, r17.xxwx - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r17.x, r12.w - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) - utof r10.xy, r17.xwxx - mov r17.x, r12.x - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx - ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) - utof r3.w, r13.w - mul r13.w, r3.w, l(0.333333) - mov r14.w, r3.y - mov r15.w, r3.z - mov r16.w, r10.x - mov r12.w, r10.y - break - case l(4) - ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r12.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.yz, r17.zzwz - ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r13.y, r13.x, l(16) - ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - f16tof32 r14.x, r12.y - f16tof32 r14.y, r17.x - f16tof32 r15.x, r12.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r12.w - f16tof32 r16.y, r17.z - f16tof32 r12.x, r12.x - f16tof32 r12.y, r17.w - ushr r3.y, r13.x, l(16) - f16tof32 r13.x, r13.x - f16tof32 r13.y, r3.y - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - default - mov r14.x, r12.y - mov r14.yzw, l(0,0,0,0) - mov r15.x, r12.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r12.w - mov r16.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - mov r13.yzw, l(0,0,0,0) - break - endswitch - add r14.xyzw, r7.xyzw, r14.xyzw - add r15.xyzw, r8.xyzw, r15.xyzw - add r16.xyzw, r9.xyzw, r16.xyzw - add r12.xyzw, r5.xyzw, r12.xyzw - add r13.xyzw, r6.xyzw, r13.xyzw - ld_raw r17.xyzw, r10.z, T0[0].wxyz - ld_raw r10.x, r10.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) - mov r21.x, r17.y - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) - mov r21.x, r17.z - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) - mov r21.x, r17.w - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) - and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r21.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r10.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) - mov r21.x, r17.y - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) - mov r21.x, r17.z - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) - mov r21.x, r17.w - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) - and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r21.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r10.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) - mov r22.x, r17.y - mov r22.yz, r21.xxyx - and r3.yzw, r22.xxyz, l(0, 1023, 1023, 1023) - and r23.xyz, r22.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r22.xyz, l(7, 7, 7, 0), r25.xyzx, r22.xyzx, l(0, 0, 0, 0) - and r22.xyz, r22.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r24.xyzx, r23.xyzx, r22.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r23.xyzx, r22.xyzx - movc r18.xyz, r3.yzwy, r22.xyzx, l(0,0,0,0) - utof r3.yz, r21.zzwz - ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) - mov r22.x, r17.z - mov r22.yz, r21.xxwx - and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) - and r24.xyz, r22.xyzx, l(127, 127, 127, 0) - ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx - firstbit_hi r26.xyz, r24.xyzx - iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) - movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) - iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) - movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx - bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) - and r22.xyz, r22.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx - ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) - iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r24.xyzx, r22.xyzx - movc r19.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r21.x, r17.w - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r20.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) - utof r11.zw, r21.xxxw - mov r21.x, r17.x - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r21.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r24.xyz, r24.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx - ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r23.xyzx, r22.xyzx - movc r10.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) - utof r3.w, r10.w - mul r10.w, r3.w, l(0.333333) - mov r18.w, r3.y - mov r19.w, r3.z - mov r20.w, r11.z - mov r17.w, r11.w - break - case l(4) - ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) - mov r22.xz, r21.xxyx - mov r22.yw, r17.yyyz - ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) - itof r22.xyzw, r22.xyzw - mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r17.yz, r21.zzwz - ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) - itof r21.xyzw, r21.xyzw - mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r10.y, r10.x, l(16) - ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) - f16tof32 r18.x, r17.y - f16tof32 r18.y, r21.x - f16tof32 r19.x, r17.z - f16tof32 r19.y, r21.y - f16tof32 r20.x, r17.w - f16tof32 r20.y, r21.z - f16tof32 r17.x, r17.x - f16tof32 r17.y, r21.w - ushr r3.y, r10.x, l(16) - f16tof32 r10.x, r10.x - f16tof32 r10.y, r3.y - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r18.x, r17.y - mov r18.yzw, l(0,0,0,0) - mov r19.x, r17.z - mov r19.yzw, l(0,0,0,0) - mov r20.x, r17.w - mov r20.yzw, l(0,0,0,0) - mov r17.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r14.xyzw, r18.xyzw - add r8.xyzw, r15.xyzw, r19.xyzw - add r9.xyzw, r16.xyzw, r20.xyzw - add r5.xyzw, r12.xyzw, r17.xyzw - add r6.xyzw, r10.xyzw, r13.xyzw - endif -else - mov r2.x, r0.y -endif -mul r7.xyzw, r2.xxxx, r7.xyzw -mul r8.xyzw, r2.xxxx, r8.xyzw -mul r9.xyzw, r2.xxxx, r9.xyzw -mul r5.xyzw, r2.xxxx, r5.xyzw -mul r6.xyzw, r2.xxxx, r6.xyzw -if_nz r2.z - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r9.xz, r9.zzxz - mov r5.xz, r5.zzxz - mov r6.xz, r6.zzxz -endif -switch r3.x - case l(3) - mov_sat r7.xyzw, r7.xyzw - mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r10.y, r13.w, l(0x00008000), r2.x - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r10.z, r13.w, l(0x00008000), r2.x - mov_sat r9.xyzw, r9.xyzw - mad r13.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r10.w, r13.w, l(0x00008000), r2.x - mov_sat r5.xyzw, r5.xyzw - mad r13.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r10.x, r13.w, l(0x00008000), r2.x - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r12.x, r13.w, l(0x00008000), r2.x - break - case l(4) - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.y, r3.w, l(2048), r2.x - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.z, r3.w, l(2048), r2.x - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.w, r3.w, l(2048), r2.x - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.x, r3.w, l(2048), r2.x - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r12.x, r3.w, l(2048), r2.x - break - case l(5) - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.y, r3.w, l(1024), r2.x - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.z, r3.w, l(1024), r2.x - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.w, r3.w, l(1024), r2.x - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r10.x, r3.w, l(1024), r2.x - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r12.x, r3.w, l(1024), r2.x - break - case l(10) - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.y, r3.z, l(256), r3.y - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.z, r3.z, l(256), r3.y - mov_sat r9.xy, r9.xyxx - mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.w, r3.z, l(256), r3.y - mov_sat r5.xy, r5.xyxx - mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.x, r3.z, l(256), r3.y - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r12.x, r3.z, l(256), r3.y - break - case l(15) - mov_sat r7.xyzw, r7.xyzw - mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r10.y, r13.w, l(4096), r2.x - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r10.z, r13.w, l(4096), r2.x - mov_sat r9.xyzw, r9.xyzw - mad r13.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r10.w, r13.w, l(4096), r2.x - mov_sat r5.xyzw, r5.xyzw - mad r13.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r10.x, r13.w, l(4096), r2.x - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r12.x, r13.w, l(4096), r2.x - break - case l(24) - mov_sat r7.x, r7.x - mad r2.x, r7.x, l(65535.000000), l(0.500000) - ftou r10.y, r2.x - mov_sat r8.x, r8.x - mad r2.x, r8.x, l(65535.000000), l(0.500000) - ftou r10.z, r2.x - mov_sat r9.x, r9.x - mad r2.x, r9.x, l(65535.000000), l(0.500000) - ftou r10.w, r2.x - mov_sat r5.x, r5.x - mad r2.x, r5.x, l(65535.000000), l(0.500000) - ftou r10.x, r2.x - mov_sat r6.x, r6.x - mad r2.x, r6.x, l(65535.000000), l(0.500000) - ftou r12.x, r2.x - break - default - f32tof16 r10.y, r7.x - f32tof16 r10.z, r8.x - f32tof16 r10.w, r9.x - f32tof16 r10.x, r5.x - f32tof16 r12.x, r6.x - break -endswitch -if_nz r1.y - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.yzwx, l(0, 0, 0, 0) - ushr r6.xyzw, r10.yzwx, l(8, 8, 8, 8) - iadd r10.xyzw, r5.wxyz, r6.wxyz - bfi r2.x, l(8), l(8), r12.x, l(0) - ushr r3.y, r12.x, l(8) - iadd r12.x, r2.x, r3.y - mov r3.yz, r10.yywy - mov r11.y, r10.z -else - mov r3.yz, r10.yywy - mov r11.y, r10.z -endif -ld_raw r5.xyzw, r2.w, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r9.yzw, r5.yyyy, l(0, 8, 16, 24) - mov r9.x, r5.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r5.zzzz, l(0, 8, 16, 24) - mov r9.x, r5.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r5.wwww, l(0, 8, 16, 24) - mov r9.x, r5.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r5.yyyy, l(0, 10, 20, 30) - mov r9.x, r5.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r5.zzzz, l(0, 10, 20, 30) - mov r9.x, r5.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r5.wwww, l(0, 10, 20, 30) - mov r9.x, r5.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r5.yyyz, l(10, 20, 30, 30) - mov r13.x, r5.y - mov r13.yz, r9.xxyx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r6.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - utof r2.xw, r9.zzzw - ushr r9.xyzw, r5.zwwz, l(10, 10, 20, 20) - mov r13.x, r5.z - mov r13.yz, r9.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r7.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r9.x, r5.w - and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r14.xyzx, r9.xyzx - movc r8.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r5.wxxx, l(30, 10, 20, 30) - utof r10.zw, r9.xxxw - mov r9.x, r5.x - and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r14.xyzx, r9.xyzx - movc r5.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) - mul r9.xy, r10.zwzz, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r6.w, r2.x - mov r7.w, r2.w - mov r8.w, r9.x - mov r5.w, r9.y - break - case l(4) - ishl r9.xyzw, r5.yzwx, l(16, 16, 16, 16) - mov r13.xz, r9.xxyx - mov r13.yw, r5.yyyz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.yz, r9.zzwz - ishr r9.xyzw, r5.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r5.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r5.y - f16tof32 r6.y, r9.x - f16tof32 r7.x, r5.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r5.w - f16tof32 r8.y, r9.z - f16tof32 r5.x, r5.x - f16tof32 r5.y, r9.w - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.x, r5.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r5.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r5.w - mov r8.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.x, r0.y, l(0.500000) - iadd r2.w, r0.x, l(2900) - ld_raw r9.xyzw, r2.w, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r16.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r16.x, r9.y - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r16.x, r9.z - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r9.wwww, l(0, 8, 16, 24) - mov r16.x, r9.w - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r9.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r16.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r16.x, r9.y - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r16.x, r9.z - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r9.wwww, l(0, 10, 20, 30) - mov r16.x, r9.w - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r9.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r16.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r17.x, r9.y - mov r17.yz, r16.xxyx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - utof r10.zw, r16.zzzw - ushr r16.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r17.x, r9.z - mov r17.yz, r16.xxwx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r16.x, r9.w - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - ushr r16.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r11.zw, r16.xxxw - mov r16.x, r9.x - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r9.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r13.w, r10.z - mov r14.w, r10.w - mov r15.w, r11.z - mov r9.w, r11.w - break - case l(4) - ishl r16.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r9.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r16.zzwz - ishr r16.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r16.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r13.x, r9.y - f16tof32 r13.y, r16.x - f16tof32 r14.x, r9.z - f16tof32 r14.y, r16.y - f16tof32 r15.x, r9.w - f16tof32 r15.y, r16.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r16.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r13.x, r9.y - mov r13.yzw, l(0,0,0,0) - mov r14.x, r9.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r9.w - mov r15.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r13.xyzw - add r7.xyzw, r7.xyzw, r14.xyzw - add r8.xyzw, r8.xyzw, r15.xyzw - add r5.xyzw, r5.xyzw, r9.xyzw - uge r2.w, r2.y, l(6) - if_nz r2.w - mul r2.x, r0.y, l(0.250000) - iadd r9.xy, r0.xxxx, l(56, 2936, 0, 0) - ld_raw r13.xyzw, r9.x, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r17.yzw, r13.yyyy, l(0, 8, 16, 24) - mov r17.x, r13.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r13.zzzz, l(0, 8, 16, 24) - mov r17.x, r13.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r13.wwww, l(0, 8, 16, 24) - mov r17.x, r13.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r13.yyyy, l(0, 10, 20, 30) - mov r17.x, r13.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r13.zzzz, l(0, 10, 20, 30) - mov r17.x, r13.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r13.wwww, l(0, 10, 20, 30) - mov r17.x, r13.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r13.yyyz, l(10, 20, 30, 30) - mov r18.x, r13.y - mov r18.yz, r17.xxyx - and r9.xzw, r18.xxyz, l(1023, 0, 1023, 1023) - and r19.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r14.xyz, r9.xzwx, r18.xyzx, l(0,0,0,0) - utof r9.xz, r17.zzwz - ushr r17.xyzw, r13.zwwz, l(10, 10, 20, 20) - mov r18.x, r13.z - mov r18.yz, r17.xxwx - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - mul r9.xz, r9.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r17.x, r13.w - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - ushr r17.xyzw, r13.wxxx, l(30, 10, 20, 30) - utof r10.zw, r17.xxxw - mov r17.x, r13.x - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r14.w, r9.x - mov r15.w, r9.z - mov r16.w, r10.z - mov r13.w, r10.w - break - case l(4) - ishl r17.xyzw, r13.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r13.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.yz, r17.zzwz - ishr r17.xyzw, r13.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r13.yzwx, l(16, 16, 16, 16) - f16tof32 r14.x, r13.y - f16tof32 r14.y, r17.x - f16tof32 r15.x, r13.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r13.w - f16tof32 r16.y, r17.z - f16tof32 r13.x, r13.x - f16tof32 r13.y, r17.w - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - default - mov r14.x, r13.y - mov r14.yzw, l(0,0,0,0) - mov r15.x, r13.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r13.w - mov r16.yzw, l(0,0,0,0) - mov r13.yzw, l(0,0,0,0) - break - endswitch - add r14.xyzw, r6.xyzw, r14.xyzw - add r15.xyzw, r7.xyzw, r15.xyzw - add r16.xyzw, r8.xyzw, r16.xyzw - add r13.xyzw, r5.xyzw, r13.xyzw - ld_raw r9.xyzw, r9.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r20.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r20.x, r9.y - and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r17.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r20.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r20.x, r9.z - and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r18.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r20.yzw, r9.wwww, l(0, 8, 16, 24) - mov r20.x, r9.w - and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r19.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r20.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r9.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r20.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r20.x, r9.y - and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r17.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r20.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r20.x, r9.z - and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r18.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r20.yzw, r9.wwww, l(0, 10, 20, 30) - mov r20.x, r9.w - and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r19.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r20.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r9.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r20.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r21.x, r9.y - mov r21.yz, r20.xxyx - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - utof r10.zw, r20.zzzw - ushr r20.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r21.x, r9.z - mov r21.yz, r20.xxwx - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r18.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r20.x, r9.w - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r19.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - ushr r20.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r11.zw, r20.xxxw - mov r20.x, r9.x - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r9.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r17.w, r10.z - mov r18.w, r10.w - mov r19.w, r11.z - mov r9.w, r11.w - break - case l(4) - ishl r20.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r21.xz, r20.xxyx - mov r21.yw, r9.yyyz - ishr r21.xyzw, r21.xyzw, l(16, 16, 16, 16) - itof r21.xyzw, r21.xyzw - mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r17.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r18.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r20.zzwz - ishr r20.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r19.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r20.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r17.x, r9.y - f16tof32 r17.y, r20.x - f16tof32 r18.x, r9.z - f16tof32 r18.y, r20.y - f16tof32 r19.x, r9.w - f16tof32 r19.y, r20.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r20.w - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r17.x, r9.y - mov r17.yzw, l(0,0,0,0) - mov r18.x, r9.z - mov r18.yzw, l(0,0,0,0) - mov r19.x, r9.w - mov r19.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r14.xyzw, r17.xyzw - add r7.xyzw, r15.xyzw, r18.xyzw - add r8.xyzw, r16.xyzw, r19.xyzw - add r5.xyzw, r9.xyzw, r13.xyzw - endif -else - mov r2.x, r0.y -endif -mul r6.xyzw, r2.xxxx, r6.xyzw -mul r7.xyzw, r2.xxxx, r7.xyzw -mul r8.xyzw, r2.xxxx, r8.xyzw -mul r5.xyzw, r2.xxxx, r5.xyzw -if_nz r2.z - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r5.xz, r5.zzxz -endif -switch r3.x - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r9.z, r13.w, l(0x00008000), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r9.w, r13.w, l(0x00008000), r2.x - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r9.x, r13.w, l(0x00008000), r2.x - mov_sat r5.xyzw, r5.xyzw - mad r13.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(32), r13.x - imad r2.x, r13.z, l(1024), r2.x - imad r9.y, r13.w, l(0x00008000), r2.x - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r13.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.z, r13.z, l(2048), r2.x - mov_sat r7.xyz, r7.xyzx - mad r13.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.w, r13.z, l(2048), r2.x - mov_sat r8.xyz, r8.xyzx - mad r13.xyz, r8.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.x, r13.z, l(2048), r2.x - mov_sat r5.xyz, r5.xyzx - mad r13.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.y, r13.z, l(2048), r2.x - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r13.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.z, r13.z, l(1024), r2.x - mov_sat r7.xyz, r7.xyzx - mad r13.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.w, r13.z, l(1024), r2.x - mov_sat r8.xyz, r8.xyzx - mad r13.xyz, r8.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.x, r13.z, l(1024), r2.x - mov_sat r5.xyz, r5.xyzx - mad r13.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r13.xyz, r13.xyzx - imad r2.x, r13.y, l(32), r13.x - imad r9.y, r13.z, l(1024), r2.x - break - case l(10) - mov_sat r6.xy, r6.xyxx - mad r2.xw, r6.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r2.xw, r2.xxxw - imad r9.z, r2.w, l(256), r2.x - mov_sat r7.xy, r7.xyxx - mad r2.xw, r7.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r2.xw, r2.xxxw - imad r9.w, r2.w, l(256), r2.x - mov_sat r8.xy, r8.xyxx - mad r2.xw, r8.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r2.xw, r2.xxxw - imad r9.x, r2.w, l(256), r2.x - mov_sat r5.xy, r5.xyxx - mad r2.xw, r5.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r2.xw, r2.xxxw - imad r9.y, r2.w, l(256), r2.x - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r9.z, r13.w, l(4096), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r9.w, r13.w, l(4096), r2.x - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r9.x, r13.w, l(4096), r2.x - mov_sat r5.xyzw, r5.xyzw - mad r13.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r2.x, r13.y, l(16), r13.x - imad r2.x, r13.z, l(256), r2.x - imad r9.y, r13.w, l(4096), r2.x - break - case l(24) - mov_sat r6.x, r6.x - mad r2.x, r6.x, l(65535.000000), l(0.500000) - ftou r9.z, r2.x - mov_sat r7.x, r7.x - mad r2.x, r7.x, l(65535.000000), l(0.500000) - ftou r9.w, r2.x - mov_sat r8.x, r8.x - mad r2.x, r8.x, l(65535.000000), l(0.500000) - ftou r9.x, r2.x - mov_sat r5.x, r5.x - mad r2.x, r5.x, l(65535.000000), l(0.500000) - ftou r9.y, r2.x - break - default - f32tof16 r9.z, r6.x - f32tof16 r9.w, r7.x - f32tof16 r9.x, r8.x - f32tof16 r9.y, r5.x - break -endswitch -if_nz r1.y - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r9.zwxy, l(0, 0, 0, 0) - ushr r6.xyzw, r9.zwxy, l(8, 8, 8, 8) - iadd r9.xyzw, r5.zwxy, r6.zwxy - mov r10.y, r9.z - mov r12.y, r9.w -else - mov r10.y, r9.z - mov r12.y, r9.w -endif -if_nz r0.w - mov r3.yz, r10.xxyx - mov r11.y, r12.x -endif -imad r5.xyzw, r3.yzyy, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyxx -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw -imad r5.xyzw, r12.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.xyxx -store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyzw -imad r5.xzw, r9.yyyy, l(0x00010000, 0, 0x00010000, 0x00010000), r9.xxxx -iadd r0.x, r0.z, r0.x -ld_raw r6.xyzw, r0.x, T0[0].wxyz -iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) -ld_raw r7.x, r2.x, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r11.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r11.x, r6.y - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r11.x, r6.z - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r6.wwww, l(0, 8, 16, 24) - mov r11.x, r6.w - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) - and r11.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r11.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r11.x, r6.y - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r11.x, r6.z - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r6.wwww, l(0, 10, 20, 30) - mov r11.x, r6.w - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r11.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r11.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r4.x, r6.y - mov r4.yz, r11.xxyx - and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) - and r12.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r14.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r13.xyzx, r12.xyzx, r4.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r12.xyzx, r4.xyzx - movc r8.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) - utof r3.yz, r11.zzwz - ushr r11.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r4.x, r6.z - mov r4.yz, r11.xxwx - and r12.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r15.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r14.xyzx, r13.xyzx, r4.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r13.xyzx, r4.xyzx - movc r9.xyz, r12.xyzx, r4.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r11.x, r6.w - and r4.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r14.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r13.xyzx, r12.xyzx, r11.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r12.xyzx, r11.xyzx - movc r10.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) - ushr r11.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r4.xy, r11.xwxx - mov r11.x, r6.x - and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r6.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r11.xyz, r7.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r7.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r14.xyzx, r7.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r13.xyzx, r12.xyzx, r14.xyzx - ishl r13.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r13.xyzx, r12.xyzx - movc r7.xyz, r11.xyzx, r12.xyzx, l(0,0,0,0) - utof r2.x, r7.w - mul r7.w, r2.x, l(0.333333) - mov r8.w, r3.y - mov r9.w, r3.z - mov r10.w, r4.x - mov r6.w, r4.y - break - case l(4) - ishl r11.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r12.xz, r11.xxyx - mov r12.yw, r6.yyyz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r11.zzwz - ishr r11.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r7.y, r7.x, l(16) - ishr r3.yz, r7.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r7.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - case l(6) - ushr r11.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r8.x, r6.y - f16tof32 r8.y, r11.x - f16tof32 r9.x, r6.z - f16tof32 r9.y, r11.y - f16tof32 r10.x, r6.w - f16tof32 r10.y, r11.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r11.w - ushr r2.x, r7.x, l(16) - f16tof32 r7.x, r7.x - f16tof32 r7.y, r2.x - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - default - mov r8.x, r6.y - mov r8.yzw, l(0,0,0,0) - mov r9.x, r6.z - mov r9.yzw, l(0,0,0,0) - mov r10.x, r6.w - mov r10.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - mov r7.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.x, r0.y, l(0.500000) - iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) - ld_raw r11.xyzw, r3.y, T0[0].wxyz - ld_raw r12.x, r3.z, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) - mov r4.x, r11.y - mov r4.yz, r16.xxyx - and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r19.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r18.xyzx, r17.xyzx, r4.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r17.xyzx, r4.xyzx - movc r13.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) - utof r3.yz, r16.zzwz - ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) - mov r4.x, r11.z - mov r4.yz, r16.xxwx - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r16.x, r11.w - and r4.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r15.xyz, r4.xyzx, r16.xyzx, l(0,0,0,0) - ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) - utof r4.xy, r16.xwxx - mov r16.x, r11.x - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx - ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) - utof r3.w, r12.w - mul r12.w, r3.w, l(0.333333) - mov r13.w, r3.y - mov r14.w, r3.z - mov r15.w, r4.x - mov r11.w, r4.y - break - case l(4) - ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r11.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.yz, r16.zzwz - ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r12.y, r12.x, l(16) - ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - case l(6) - ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - f16tof32 r13.x, r11.y - f16tof32 r13.y, r16.x - f16tof32 r14.x, r11.z - f16tof32 r14.y, r16.y - f16tof32 r15.x, r11.w - f16tof32 r15.y, r16.z - f16tof32 r11.x, r11.x - f16tof32 r11.y, r16.w - ushr r3.y, r12.x, l(16) - f16tof32 r12.x, r12.x - f16tof32 r12.y, r3.y - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - default - mov r13.x, r11.y - mov r13.yzw, l(0,0,0,0) - mov r14.x, r11.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r11.w - mov r15.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - break - endswitch - add r8.xyzw, r8.xyzw, r13.xyzw - add r9.xyzw, r9.xyzw, r14.xyzw - add r10.xyzw, r10.xyzw, r15.xyzw - add r6.xyzw, r6.xyzw, r11.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - uge r3.y, r2.y, l(6) - if_nz r3.y - mul r2.x, r0.y, l(0.250000) - iadd r11.xyzw, r0.xxxx, l(36, 52, 2916, 2932) - ld_raw r12.xyzw, r11.x, T0[0].wxyz - ld_raw r13.x, r11.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) - mov r4.x, r12.y - mov r4.yz, r17.xxyx - and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r14.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) - utof r3.yz, r17.zzwz - ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) - mov r4.x, r12.z - mov r4.yz, r17.xxwx - and r18.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r21.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r20.xyzx, r19.xyzx, r4.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r19.xyzx, r4.xyzx - movc r15.xyz, r18.xyzx, r4.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r17.x, r12.w - and r4.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r16.xyz, r4.xyzx, r17.xyzx, l(0,0,0,0) - ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) - utof r4.xy, r17.xwxx - mov r17.x, r12.x - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx - ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) - utof r3.w, r13.w - mul r13.w, r3.w, l(0.333333) - mov r14.w, r3.y - mov r15.w, r3.z - mov r16.w, r4.x - mov r12.w, r4.y - break - case l(4) - ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r12.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.yz, r17.zzwz - ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r13.y, r13.x, l(16) - ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - f16tof32 r14.x, r12.y - f16tof32 r14.y, r17.x - f16tof32 r15.x, r12.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r12.w - f16tof32 r16.y, r17.z - f16tof32 r12.x, r12.x - f16tof32 r12.y, r17.w - ushr r3.y, r13.x, l(16) - f16tof32 r13.x, r13.x - f16tof32 r13.y, r3.y - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - default - mov r14.x, r12.y - mov r14.yzw, l(0,0,0,0) - mov r15.x, r12.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r12.w - mov r16.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - mov r13.yzw, l(0,0,0,0) - break - endswitch - add r14.xyzw, r8.xyzw, r14.xyzw - add r15.xyzw, r9.xyzw, r15.xyzw - add r16.xyzw, r10.xyzw, r16.xyzw - add r12.xyzw, r6.xyzw, r12.xyzw - add r13.xyzw, r7.xyzw, r13.xyzw - ld_raw r17.xyzw, r11.z, T0[0].wxyz - ld_raw r11.x, r11.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) - mov r21.x, r17.y - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) - mov r21.x, r17.z - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) - mov r21.x, r17.w - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) - and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r21.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r11.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) - mov r21.x, r17.y - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) - mov r21.x, r17.z - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) - mov r21.x, r17.w - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) - and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r21.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r11.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) - mov r4.x, r17.y - mov r4.yz, r21.xxyx - and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) - and r22.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r24.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r23.xyzx, r22.xyzx, r4.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r22.xyzx, r4.xyzx - movc r18.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) - utof r3.yz, r21.zzwz - ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) - mov r4.x, r17.z - mov r4.yz, r21.xxwx - and r22.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r25.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r24.xyzx, r23.xyzx, r4.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r23.xyzx, r4.xyzx - movc r19.xyz, r22.xyzx, r4.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r21.x, r17.w - and r4.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r24.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r23.xyzx, r22.xyzx, r21.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r22.xyzx, r21.xyzx - movc r20.xyz, r4.xyzx, r21.xyzx, l(0,0,0,0) - ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) - utof r4.xy, r21.xwxx - mov r21.x, r17.x - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r21.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r24.xyz, r24.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx - ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r23.xyzx, r22.xyzx - movc r11.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) - utof r3.w, r11.w - mul r11.w, r3.w, l(0.333333) - mov r18.w, r3.y - mov r19.w, r3.z - mov r20.w, r4.x - mov r17.w, r4.y - break - case l(4) - ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) - mov r22.xz, r21.xxyx - mov r22.yw, r17.yyyz - ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) - itof r22.xyzw, r22.xyzw - mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r17.yz, r21.zzwz - ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) - itof r21.xyzw, r21.xyzw - mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r11.y, r11.x, l(16) - ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) - f16tof32 r18.x, r17.y - f16tof32 r18.y, r21.x - f16tof32 r19.x, r17.z - f16tof32 r19.y, r21.y - f16tof32 r20.x, r17.w - f16tof32 r20.y, r21.z - f16tof32 r17.x, r17.x - f16tof32 r17.y, r21.w - ushr r3.y, r11.x, l(16) - f16tof32 r11.x, r11.x - f16tof32 r11.y, r3.y - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r18.x, r17.y - mov r18.yzw, l(0,0,0,0) - mov r19.x, r17.z - mov r19.yzw, l(0,0,0,0) - mov r20.x, r17.w - mov r20.yzw, l(0,0,0,0) - mov r17.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r8.xyzw, r14.xyzw, r18.xyzw - add r9.xyzw, r15.xyzw, r19.xyzw - add r10.xyzw, r16.xyzw, r20.xyzw - add r6.xyzw, r12.xyzw, r17.xyzw - add r7.xyzw, r11.xyzw, r13.xyzw - endif -else - mov r2.x, r0.y -endif -mul r8.xyzw, r2.xxxx, r8.xyzw -mul r9.xyzw, r2.xxxx, r9.xyzw -mul r10.xyzw, r2.xxxx, r10.xyzw -mul r6.xyzw, r2.xxxx, r6.xyzw -mul r7.xyzw, r2.xxxx, r7.xyzw -if_nz r2.z - mov r8.xz, r8.zzxz - mov r9.xz, r9.zzxz - mov r10.xz, r10.zzxz - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz -endif -switch r3.x - case l(3) - mov_sat r8.xyzw, r8.xyzw - mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(32), r12.x - imad r2.x, r12.z, l(1024), r2.x - imad r11.y, r12.w, l(0x00008000), r2.x - mov_sat r9.xyzw, r9.xyzw - mad r12.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(32), r12.x - imad r2.x, r12.z, l(1024), r2.x - imad r11.x, r12.w, l(0x00008000), r2.x - mov_sat r10.xyzw, r10.xyzw - mad r12.xyzw, r10.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(32), r12.x - imad r2.x, r12.z, l(1024), r2.x - imad r11.z, r12.w, l(0x00008000), r2.x - mov_sat r6.xyzw, r6.xyzw - mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(32), r12.x - imad r2.x, r12.z, l(1024), r2.x - imad r11.w, r12.w, l(0x00008000), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(32), r12.x - imad r2.x, r12.z, l(1024), r2.x - imad r4.y, r12.w, l(0x00008000), r2.x - break - case l(4) - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.y, r3.w, l(2048), r2.x - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.x, r3.w, l(2048), r2.x - mov_sat r10.xyz, r10.xyzx - mad r3.yzw, r10.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.z, r3.w, l(2048), r2.x - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.w, r3.w, l(2048), r2.x - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r4.y, r3.w, l(2048), r2.x - break - case l(5) - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.y, r3.w, l(1024), r2.x - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.x, r3.w, l(1024), r2.x - mov_sat r10.xyz, r10.xyzx - mad r3.yzw, r10.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.z, r3.w, l(1024), r2.x - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r11.w, r3.w, l(1024), r2.x - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.x, r3.z, l(32), r3.y - imad r4.y, r3.w, l(1024), r2.x - break - case l(10) - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.y, r3.z, l(256), r3.y - mov_sat r9.xy, r9.xyxx - mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.x, r3.z, l(256), r3.y - mov_sat r10.xy, r10.xyxx - mad r3.yz, r10.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.z, r3.z, l(256), r3.y - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r11.w, r3.z, l(256), r3.y - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r4.y, r3.z, l(256), r3.y - break - case l(15) - mov_sat r8.xyzw, r8.xyzw - mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(16), r12.x - imad r2.x, r12.z, l(256), r2.x - imad r11.y, r12.w, l(4096), r2.x - mov_sat r9.xyzw, r9.xyzw - mad r12.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(16), r12.x - imad r2.x, r12.z, l(256), r2.x - imad r11.x, r12.w, l(4096), r2.x - mov_sat r10.xyzw, r10.xyzw - mad r12.xyzw, r10.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(16), r12.x - imad r2.x, r12.z, l(256), r2.x - imad r11.z, r12.w, l(4096), r2.x - mov_sat r6.xyzw, r6.xyzw - mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(16), r12.x - imad r2.x, r12.z, l(256), r2.x - imad r11.w, r12.w, l(4096), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.x, r12.y, l(16), r12.x - imad r2.x, r12.z, l(256), r2.x - imad r4.y, r12.w, l(4096), r2.x - break - case l(24) - mov_sat r8.x, r8.x - mad r2.x, r8.x, l(65535.000000), l(0.500000) - ftou r11.y, r2.x - mov_sat r9.x, r9.x - mad r2.x, r9.x, l(65535.000000), l(0.500000) - ftou r11.x, r2.x - mov_sat r10.x, r10.x - mad r2.x, r10.x, l(65535.000000), l(0.500000) - ftou r11.z, r2.x - mov_sat r6.x, r6.x - mad r2.x, r6.x, l(65535.000000), l(0.500000) - ftou r11.w, r2.x - mov_sat r7.x, r7.x - mad r2.x, r7.x, l(65535.000000), l(0.500000) - ftou r4.y, r2.x - break - default - f32tof16 r11.y, r8.x - f32tof16 r11.x, r9.x - f32tof16 r11.z, r10.x - f32tof16 r11.w, r6.x - f32tof16 r4.y, r7.x - break -endswitch -if_nz r1.y - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.yxzw, l(0, 0, 0, 0) - ushr r7.xyzw, r11.yxzw, l(8, 8, 8, 8) - iadd r11.xyzw, r6.yxzw, r7.yxzw - bfi r2.x, l(8), l(8), r4.y, l(0) - ushr r3.y, r4.y, l(8) - iadd r4.y, r2.x, r3.y - mov r2.x, r11.y - mov r4.x, r11.z -else - mov r2.x, r11.y - mov r4.x, r11.z -endif -ld_raw r6.xyzw, r2.w, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r10.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r10.x, r6.y - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r10.x, r6.z - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r6.wwww, l(0, 8, 16, 24) - mov r10.x, r6.w - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r10.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r6.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r10.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r10.x, r6.y - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r10.x, r6.z - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r6.wwww, l(0, 10, 20, 30) - mov r10.x, r6.w - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r10.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r6.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r10.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r12.x, r6.y - mov r12.yz, r10.xxyx - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r13.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r13.xyzx, r12.xyzx - movc r7.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - utof r3.yz, r10.zzwz - ushr r10.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r12.x, r6.z - mov r12.yz, r10.xxwx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r10.x, r6.w - and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r13.xyzx, r10.xyzx - movc r9.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) - ushr r10.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r12.xy, r10.xwxx - mov r10.x, r6.x - and r13.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r16.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r15.xyzx, r14.xyzx, r10.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r14.xyzx, r10.xyzx - movc r6.xyz, r13.xyzx, r10.xyzx, l(0,0,0,0) - mul r10.xy, r12.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r7.w, r3.y - mov r8.w, r3.z - mov r9.w, r10.x - mov r6.w, r10.y - break - case l(4) - ishl r10.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r12.xz, r10.xxyx - mov r12.yw, r6.yyyz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r10.zzwz - ishr r10.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r10.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r6.y - f16tof32 r7.y, r10.x - f16tof32 r8.x, r6.z - f16tof32 r8.y, r10.y - f16tof32 r9.x, r6.w - f16tof32 r9.y, r10.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r10.w - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r6.y - mov r7.yzw, l(0,0,0,0) - mov r8.x, r6.z - mov r8.yzw, l(0,0,0,0) - mov r9.x, r6.w - mov r9.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.w, r0.y, l(0.500000) - iadd r3.y, r0.x, l(2900) - ld_raw r10.xyzw, r3.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r16.x, r10.y - mov r16.yz, r15.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r3.yz, r15.zzwz - ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r16.x, r10.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r15.x, r10.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r16.xy, r15.xwxx - mov r15.x, r10.x - and r17.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r20.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r19.xyzx, r18.xyzx, r15.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r18.xyzx, r15.xyzx - movc r10.xyz, r17.xyzx, r15.xyzx, l(0,0,0,0) - mul r15.xy, r16.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r12.w, r3.y - mov r13.w, r3.z - mov r14.w, r15.x - mov r10.w, r15.y - break - case l(4) - ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r10.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r15.zzwz - ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r10.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r10.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r10.w - f16tof32 r14.y, r15.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r15.w - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r12.x, r10.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.w - mov r14.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r8.xyzw, r13.xyzw - add r9.xyzw, r9.xyzw, r14.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - uge r3.y, r2.y, l(6) - if_nz r3.y - mul r2.w, r0.y, l(0.250000) - iadd r3.yz, r0.xxxx, l(0, 56, 2936, 0) - ld_raw r10.xyzw, r3.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r16.x, r10.y - mov r16.yz, r15.xxyx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.yw, r15.zzzw - ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r16.x, r10.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yw, r3.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r15.x, r10.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r16.xy, r15.xwxx - mov r15.x, r10.x - and r17.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r20.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r19.xyzx, r18.xyzx, r15.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r18.xyzx, r15.xyzx - movc r10.xyz, r17.xyzx, r15.xyzx, l(0,0,0,0) - mul r15.xy, r16.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r12.w, r3.y - mov r13.w, r3.w - mov r14.w, r15.x - mov r10.w, r15.y - break - case l(4) - ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r10.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r15.zzwz - ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r10.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r10.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r10.w - f16tof32 r14.y, r15.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r15.w - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r12.x, r10.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.w - mov r14.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r12.xyzw, r7.xyzw, r12.xyzw - add r13.xyzw, r8.xyzw, r13.xyzw - add r14.xyzw, r9.xyzw, r14.xyzw - add r10.xyzw, r6.xyzw, r10.xyzw - ld_raw r15.xyzw, r3.z, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) - mov r20.x, r15.y - mov r20.yz, r19.xxyx - and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) - and r21.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) - utof r3.yz, r19.zzwz - ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) - mov r20.x, r15.z - mov r20.yz, r19.xxwx - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r19.x, r15.w - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) - utof r20.xy, r19.xwxx - mov r19.x, r15.x - and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r22.xyzx, r19.xyzx - movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) - mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r16.w, r3.y - mov r17.w, r3.z - mov r18.w, r19.x - mov r15.w, r19.y - break - case l(4) - ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - mov r20.xz, r19.xxyx - mov r20.yw, r15.yyyz - ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.yz, r19.zzwz - ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - break - case l(6) - ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - f16tof32 r16.x, r15.y - f16tof32 r16.y, r19.x - f16tof32 r17.x, r15.z - f16tof32 r17.y, r19.y - f16tof32 r18.x, r15.w - f16tof32 r18.y, r19.z - f16tof32 r15.x, r15.x - f16tof32 r15.y, r19.w - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - break - default - mov r16.x, r15.y - mov r16.yzw, l(0,0,0,0) - mov r17.x, r15.z - mov r17.yzw, l(0,0,0,0) - mov r18.x, r15.w - mov r18.yzw, l(0,0,0,0) - mov r15.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r12.xyzw, r16.xyzw - add r8.xyzw, r13.xyzw, r17.xyzw - add r9.xyzw, r14.xyzw, r18.xyzw - add r6.xyzw, r10.xyzw, r15.xyzw - endif -else - mov r2.w, r0.y -endif -mul r7.xyzw, r2.wwww, r7.xyzw -mul r8.xyzw, r2.wwww, r8.xyzw -mul r9.xyzw, r2.wwww, r9.xyzw -mul r6.xyzw, r2.wwww, r6.xyzw -if_nz r2.z - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r9.xz, r9.zzxz - mov r6.xz, r6.zzxz -endif -switch r3.x - case l(3) - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r10.w, r12.w, l(0x00008000), r2.w - mov_sat r8.xyzw, r8.xyzw - mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r10.x, r12.w, l(0x00008000), r2.w - mov_sat r9.xyzw, r9.xyzw - mad r12.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r10.y, r12.w, l(0x00008000), r2.w - mov_sat r6.xyzw, r6.xyzw - mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(32), r12.x - imad r2.w, r12.z, l(1024), r2.w - imad r10.z, r12.w, l(0x00008000), r2.w - break - case l(4) - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.w, r3.w, l(2048), r2.w - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.x, r3.w, l(2048), r2.w - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.y, r3.w, l(2048), r2.w - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.z, r3.w, l(2048), r2.w - break - case l(5) - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.w, r3.w, l(1024), r2.w - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.x, r3.w, l(1024), r2.w - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.y, r3.w, l(1024), r2.w - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r2.w, r3.z, l(32), r3.y - imad r10.z, r3.w, l(1024), r2.w - break - case l(10) - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.w, r3.z, l(256), r3.y - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.x, r3.z, l(256), r3.y - mov_sat r9.xy, r9.xyxx - mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.y, r3.z, l(256), r3.y - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.z, r3.z, l(256), r3.y - break - case l(15) - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r10.w, r12.w, l(4096), r2.w - mov_sat r8.xyzw, r8.xyzw - mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r10.x, r12.w, l(4096), r2.w - mov_sat r9.xyzw, r9.xyzw - mad r12.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r10.y, r12.w, l(4096), r2.w - mov_sat r6.xyzw, r6.xyzw - mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r2.w, r12.y, l(16), r12.x - imad r2.w, r12.z, l(256), r2.w - imad r10.z, r12.w, l(4096), r2.w - break - case l(24) - mov_sat r7.x, r7.x - mad r2.w, r7.x, l(65535.000000), l(0.500000) - ftou r10.w, r2.w - mov_sat r8.x, r8.x - mad r2.w, r8.x, l(65535.000000), l(0.500000) - ftou r10.x, r2.w - mov_sat r9.x, r9.x - mad r2.w, r9.x, l(65535.000000), l(0.500000) - ftou r10.y, r2.w - mov_sat r6.x, r6.x - mad r2.w, r6.x, l(65535.000000), l(0.500000) - ftou r10.z, r2.w - break - default - f32tof16 r10.w, r7.x - f32tof16 r10.x, r8.x - f32tof16 r10.y, r9.x - f32tof16 r10.z, r6.x - break -endswitch -if_nz r1.y - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.wxyz, l(0, 0, 0, 0) - ushr r7.xyzw, r10.wxyz, l(8, 8, 8, 8) - iadd r10.xyzw, r6.yzwx, r7.yzwx - mov r11.y, r10.w -else - mov r11.y, r10.w -endif -if_nz r0.w - mov r2.x, r11.w - mov r11.x, r4.y - mov r4.x, r11.y -endif -imad r5.y, r11.x, l(0x00010000), r2.x -store_uav_typed U0[0].xyzw, r4.wwww, r5.xyzw -iadd r5.xyzw, r1.xxxx, l(5, 6, 7, 8) -imad r4.xyzw, r11.wyww, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r4.xyxx -store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw -imad r4.xzw, r10.yyyy, l(0x00010000, 0, 0x00010000, 0x00010000), r10.xxxx -iadd r0.x, r0.z, r0.x -ld_raw r6.xyzw, r0.x, T0[0].wxyz -iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) -ld_raw r7.x, r2.x, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r12.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r12.x, r6.y - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r8.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r12.x, r6.z - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r9.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r6.wwww, l(0, 8, 16, 24) - mov r12.x, r6.w - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r12.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r6.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) - and r12.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r7.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r12.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r12.x, r6.y - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r8.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r12.x, r6.z - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r9.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r6.wwww, l(0, 10, 20, 30) - mov r12.x, r6.w - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r12.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r6.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r12.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r7.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r12.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r13.x, r6.y - mov r13.yz, r12.xxyx - and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) - and r10.xyw, r13.xyxz, l(127, 127, 0, 127) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r15.xyz, r10.xywx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r10.xywx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r15.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r10.xyw, r14.xyxz, r10.xyxw, r13.xyxz - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) - iadd r10.xyw, r13.xyxz, r10.xyxw - movc r8.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) - utof r3.yz, r12.zzwz - ushr r12.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r13.x, r6.z - mov r13.yz, r12.xxwx - and r10.xyw, r13.xyxz, l(1023, 1023, 0, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r9.xyz, r10.xywx, r13.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r12.x, r6.w - and r10.xyw, r12.xyxz, l(1023, 1023, 0, 1023) - and r13.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r13.xyzx, r12.xyzx - movc r11.xyz, r10.xywx, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r10.xy, r12.xwxx - mov r12.x, r6.x - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r6.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) - and r12.xyz, r7.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r7.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r15.xyzx, r7.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r14.xyzx, r13.xyzx, r15.xyzx - ishl r14.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r7.xyz, r12.xyzx, r13.xyzx, l(0,0,0,0) - utof r0.z, r7.w - mul r7.w, r0.z, l(0.333333) - mov r8.w, r3.y - mov r9.w, r3.z - mov r11.w, r10.x - mov r6.w, r10.y - break - case l(4) - ishl r12.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r6.yyyz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r12.zzwz - ishr r12.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r7.y, r7.x, l(16) - ishr r3.yz, r7.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r7.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - case l(6) - ushr r12.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r8.x, r6.y - f16tof32 r8.y, r12.x - f16tof32 r9.x, r6.z - f16tof32 r9.y, r12.y - f16tof32 r11.x, r6.w - f16tof32 r11.y, r12.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r12.w - ushr r0.z, r7.x, l(16) - f16tof32 r7.x, r7.x - f16tof32 r7.y, r0.z - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - break - default - mov r8.x, r6.y - mov r8.yzw, l(0,0,0,0) - mov r9.x, r6.z - mov r9.yzw, l(0,0,0,0) - mov r11.x, r6.w - mov r11.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - mov r7.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r0.y, l(0.500000) - iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) - ld_raw r12.xyzw, r3.y, T0[0].wxyz - ld_raw r13.x, r3.z, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) - mov r18.x, r12.y - mov r18.yz, r17.xxyx - and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) - and r10.xyw, r18.xyxz, l(127, 127, 0, 127) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r20.xyz, r10.xywx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r10.xywx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r20.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r10.xyw, r19.xyxz, r10.xyxw, r18.xyxz - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) - iadd r10.xyw, r18.xyxz, r10.xyxw - movc r14.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) - utof r3.yz, r17.zzwz - ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) - mov r18.x, r12.z - mov r18.yz, r17.xxwx - and r10.xyw, r18.xyxz, l(1023, 1023, 0, 1023) - and r19.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r15.xyz, r10.xywx, r18.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r17.x, r12.w - and r10.xyw, r17.xyxz, l(1023, 1023, 0, 1023) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r16.xyz, r10.xywx, r17.xyzx, l(0,0,0,0) - ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) - utof r10.xy, r17.xwxx - mov r17.x, r12.x - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx - ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) - utof r2.x, r13.w - mul r13.w, r2.x, l(0.333333) - mov r14.w, r3.y - mov r15.w, r3.z - mov r16.w, r10.x - mov r12.w, r10.y - break - case l(4) - ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r12.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.yz, r17.zzwz - ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r13.y, r13.x, l(16) - ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - f16tof32 r14.x, r12.y - f16tof32 r14.y, r17.x - f16tof32 r15.x, r12.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r12.w - f16tof32 r16.y, r17.z - f16tof32 r12.x, r12.x - f16tof32 r12.y, r17.w - ushr r2.x, r13.x, l(16) - f16tof32 r13.x, r13.x - f16tof32 r13.y, r2.x - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - default - mov r14.x, r12.y - mov r14.yzw, l(0,0,0,0) - mov r15.x, r12.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r12.w - mov r16.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - mov r13.yzw, l(0,0,0,0) - break - endswitch - add r8.xyzw, r8.xyzw, r14.xyzw - add r9.xyzw, r9.xyzw, r15.xyzw - add r11.xyzw, r11.xyzw, r16.xyzw - add r6.xyzw, r6.xyzw, r12.xyzw - add r7.xyzw, r7.xyzw, r13.xyzw - uge r2.x, r2.y, l(6) - if_nz r2.x - mul r0.z, r0.y, l(0.250000) - iadd r12.xyzw, r0.xxxx, l(36, 52, 2916, 2932) - ld_raw r13.xyzw, r12.x, T0[0].wxyz - ld_raw r14.x, r12.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r18.yzw, r13.yyyy, l(0, 8, 16, 24) - mov r18.x, r13.y - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r13.zzzz, l(0, 8, 16, 24) - mov r18.x, r13.z - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r13.wwww, l(0, 8, 16, 24) - mov r18.x, r13.w - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) - and r18.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r13.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r18.yzw, r13.yyyy, l(0, 10, 20, 30) - mov r18.x, r13.y - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r13.zzzz, l(0, 10, 20, 30) - mov r18.x, r13.z - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r13.wwww, l(0, 10, 20, 30) - mov r18.x, r13.w - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r18.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r13.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r18.xyzw, r13.yyyz, l(10, 20, 30, 30) - mov r19.x, r13.y - mov r19.yz, r18.xxyx - and r3.yzw, r19.xxyz, l(0, 1023, 1023, 1023) - and r10.xyw, r19.xyxz, l(127, 127, 0, 127) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r21.xyz, r10.xywx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r10.xywx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r21.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r10.xyw, r20.xyxz, r10.xyxw, r19.xyxz - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) - iadd r10.xyw, r19.xyxz, r10.xyxw - movc r15.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) - utof r3.yz, r18.zzwz - ushr r18.xyzw, r13.zwwz, l(10, 10, 20, 20) - mov r19.x, r13.z - mov r19.yz, r18.xxwx - and r10.xyw, r19.xyxz, l(1023, 1023, 0, 1023) - and r20.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r20.xyzx, r19.xyzx - movc r16.xyz, r10.xywx, r19.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r18.x, r13.w - and r10.xyw, r18.xyxz, l(1023, 1023, 0, 1023) - and r19.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r17.xyz, r10.xywx, r18.xyzx, l(0,0,0,0) - ushr r18.xyzw, r13.wxxx, l(30, 10, 20, 30) - utof r10.xy, r18.xwxx - mov r18.x, r13.x - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r13.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r18.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r21.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r20.xyzx, r19.xyzx, r21.xyzx - ishl r20.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r20.xyzx, r19.xyzx - movc r14.xyz, r18.xyzx, r19.xyzx, l(0,0,0,0) - utof r2.x, r14.w - mul r14.w, r2.x, l(0.333333) - mov r15.w, r3.y - mov r16.w, r3.z - mov r17.w, r10.x - mov r13.w, r10.y - break - case l(4) - ishl r18.xyzw, r13.yzwx, l(16, 16, 16, 16) - mov r19.xz, r18.xxyx - mov r19.yw, r13.yyyz - ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.yz, r18.zzwz - ishr r18.xyzw, r13.ywzx, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r14.y, r14.x, l(16) - ishr r3.yz, r14.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r14.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r18.xyzw, r13.yzwx, l(16, 16, 16, 16) - f16tof32 r15.x, r13.y - f16tof32 r15.y, r18.x - f16tof32 r16.x, r13.z - f16tof32 r16.y, r18.y - f16tof32 r17.x, r13.w - f16tof32 r17.y, r18.z - f16tof32 r13.x, r13.x - f16tof32 r13.y, r18.w - ushr r2.x, r14.x, l(16) - f16tof32 r14.x, r14.x - f16tof32 r14.y, r2.x - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r15.x, r13.y - mov r15.yzw, l(0,0,0,0) - mov r16.x, r13.z - mov r16.yzw, l(0,0,0,0) - mov r17.x, r13.w - mov r17.yzw, l(0,0,0,0) - mov r13.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - add r15.xyzw, r8.xyzw, r15.xyzw - add r16.xyzw, r9.xyzw, r16.xyzw - add r17.xyzw, r11.xyzw, r17.xyzw - add r13.xyzw, r6.xyzw, r13.xyzw - add r14.xyzw, r7.xyzw, r14.xyzw - ld_raw r18.xyzw, r12.z, T0[0].wxyz - ld_raw r12.x, r12.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r22.yzw, r18.yyyy, l(0, 8, 16, 24) - mov r22.x, r18.y - and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) - utof r22.xyzw, r22.xyzw - mul r19.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r22.yzw, r18.zzzz, l(0, 8, 16, 24) - mov r22.x, r18.z - and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) - utof r22.xyzw, r22.xyzw - mul r20.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r22.yzw, r18.wwww, l(0, 8, 16, 24) - mov r22.x, r18.w - and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) - utof r22.xyzw, r22.xyzw - mul r21.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r18.xxxx, l(0, 8, 16, 24) - and r22.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r22.xyzw, r22.xyzw - mul r18.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r22.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r22.xyzw, r22.xyzw - mul r12.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r22.yzw, r18.yyyy, l(0, 10, 20, 30) - mov r22.x, r18.y - and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) - utof r22.xyzw, r22.xyzw - mul r19.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r22.yzw, r18.zzzz, l(0, 10, 20, 30) - mov r22.x, r18.z - and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) - utof r22.xyzw, r22.xyzw - mul r20.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r22.yzw, r18.wwww, l(0, 10, 20, 30) - mov r22.x, r18.w - and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) - utof r22.xyzw, r22.xyzw - mul r21.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r18.xxxx, l(0, 10, 20, 30) - and r22.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r22.xyzw, r22.xyzw - mul r18.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r22.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r22.xyzw, r22.xyzw - mul r12.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r22.xyzw, r18.yyyz, l(10, 20, 30, 30) - mov r23.x, r18.y - mov r23.yz, r22.xxyx - and r3.yzw, r23.xxyz, l(0, 1023, 1023, 1023) - and r10.xyw, r23.xyxz, l(127, 127, 0, 127) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r23.xyzx - firstbit_hi r25.xyz, r10.xywx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r10.xywx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r23.xyz, l(7, 7, 7, 0), r25.xyzx, r23.xyzx, l(0, 0, 0, 0) - and r23.xyz, r23.xyzx, l(127, 127, 127, 0) - movc r10.xyw, r24.xyxz, r10.xyxw, r23.xyxz - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) - iadd r10.xyw, r23.xyxz, r10.xyxw - movc r19.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) - utof r3.yz, r22.zzwz - ushr r22.xyzw, r18.zwwz, l(10, 10, 20, 20) - mov r23.x, r18.z - mov r23.yz, r22.xxwx - and r10.xyw, r23.xyxz, l(1023, 1023, 0, 1023) - and r24.xyz, r23.xyzx, l(127, 127, 127, 0) - ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r23.xyzx - firstbit_hi r26.xyz, r24.xyzx - iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) - movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) - iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) - movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx - bfi r23.xyz, l(7, 7, 7, 0), r26.xyzx, r23.xyzx, l(0, 0, 0, 0) - and r23.xyz, r23.xyzx, l(127, 127, 127, 0) - movc r23.xyz, r25.xyzx, r24.xyzx, r23.xyzx - ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) - iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r23.xyz, r23.xyzx, l(16, 16, 16, 0) - iadd r23.xyz, r24.xyzx, r23.xyzx - movc r20.xyz, r10.xywx, r23.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r22.x, r18.w - and r10.xyw, r22.xyxz, l(1023, 1023, 0, 1023) - and r23.xyz, r22.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r22.xyz, l(7, 7, 7, 0), r25.xyzx, r22.xyzx, l(0, 0, 0, 0) - and r22.xyz, r22.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r24.xyzx, r23.xyzx, r22.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r23.xyzx, r22.xyzx - movc r21.xyz, r10.xywx, r22.xyzx, l(0,0,0,0) - ushr r22.xyzw, r18.wxxx, l(30, 10, 20, 30) - utof r10.xy, r22.xwxx - mov r22.x, r18.x - and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) - and r24.xyz, r22.xyzx, l(127, 127, 127, 0) - ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx - firstbit_hi r26.xyz, r24.xyzx - iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) - movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) - iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) - movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx - bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) - and r22.xyz, r22.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx - ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) - iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r24.xyzx, r22.xyzx - movc r18.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) - mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r22.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r25.xyz, l(7, 7, 7, 0), r25.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r25.xyz, r25.xyzx, l(127, 127, 127, 0) - movc r23.xyz, r24.xyzx, r23.xyzx, r25.xyzx - ishl r24.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r23.xyz, r23.xyzx, l(16, 16, 16, 0) - iadd r23.xyz, r24.xyzx, r23.xyzx - movc r12.xyz, r22.xyzx, r23.xyzx, l(0,0,0,0) - utof r2.x, r12.w - mul r12.w, r2.x, l(0.333333) - mov r19.w, r3.y - mov r20.w, r3.z - mov r21.w, r10.x - mov r18.w, r10.y - break - case l(4) - ishl r22.xyzw, r18.yzwx, l(16, 16, 16, 16) - mov r23.xz, r22.xxyx - mov r23.yw, r18.yyyz - ishr r23.xyzw, r23.xyzw, l(16, 16, 16, 16) - itof r23.xyzw, r23.xyzw - mul r23.xyzw, r23.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r19.xy, r23.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r20.xy, r23.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r18.yz, r22.zzwz - ishr r22.xyzw, r18.ywzx, l(16, 16, 16, 16) - itof r22.xyzw, r22.xyzw - mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r21.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r18.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r12.y, r12.x, l(16) - ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r21.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - case l(6) - ushr r22.xyzw, r18.yzwx, l(16, 16, 16, 16) - f16tof32 r19.x, r18.y - f16tof32 r19.y, r22.x - f16tof32 r20.x, r18.z - f16tof32 r20.y, r22.y - f16tof32 r21.x, r18.w - f16tof32 r21.y, r22.z - f16tof32 r18.x, r18.x - f16tof32 r18.y, r22.w - ushr r2.x, r12.x, l(16) - f16tof32 r12.x, r12.x - f16tof32 r12.y, r2.x - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r21.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - default - mov r19.x, r18.y - mov r19.yzw, l(0,0,0,0) - mov r20.x, r18.z - mov r20.yzw, l(0,0,0,0) - mov r21.x, r18.w - mov r21.yzw, l(0,0,0,0) - mov r18.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - break - endswitch - add r8.xyzw, r15.xyzw, r19.xyzw - add r9.xyzw, r16.xyzw, r20.xyzw - add r11.xyzw, r17.xyzw, r21.xyzw - add r6.xyzw, r13.xyzw, r18.xyzw - add r7.xyzw, r12.xyzw, r14.xyzw - endif -else - mov r0.z, r0.y -endif -mul r8.xyzw, r0.zzzz, r8.xyzw -mul r9.xyzw, r0.zzzz, r9.xyzw -mul r11.xyzw, r0.zzzz, r11.xyzw -mul r6.xyzw, r0.zzzz, r6.xyzw -mul r7.xyzw, r0.zzzz, r7.xyzw -if_nz r2.z - mov r8.xz, r8.zzxz - mov r9.xz, r9.zzxz - mov r11.xz, r11.zzxz - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz -endif -switch r3.x - case l(3) - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(32), r13.x - imad r0.z, r13.z, l(1024), r0.z - imad r12.x, r13.w, l(0x00008000), r0.z - mov_sat r9.xyzw, r9.xyzw - mad r13.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(32), r13.x - imad r0.z, r13.z, l(1024), r0.z - imad r12.z, r13.w, l(0x00008000), r0.z - mov_sat r11.xyzw, r11.xyzw - mad r13.xyzw, r11.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(32), r13.x - imad r0.z, r13.z, l(1024), r0.z - imad r12.w, r13.w, l(0x00008000), r0.z - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(32), r13.x - imad r0.z, r13.z, l(1024), r0.z - imad r12.y, r13.w, l(0x00008000), r0.z - mov_sat r7.xyzw, r7.xyzw - mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(32), r13.x - imad r0.z, r13.z, l(1024), r0.z - imad r10.y, r13.w, l(0x00008000), r0.z - break - case l(4) - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.x, r3.w, l(2048), r0.z - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.z, r3.w, l(2048), r0.z - mov_sat r11.xyz, r11.xyzx - mad r3.yzw, r11.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.w, r3.w, l(2048), r0.z - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.y, r3.w, l(2048), r0.z - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r10.y, r3.w, l(2048), r0.z - break - case l(5) - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.x, r3.w, l(1024), r0.z - mov_sat r9.xyz, r9.xyzx - mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.z, r3.w, l(1024), r0.z - mov_sat r11.xyz, r11.xyzx - mad r3.yzw, r11.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.w, r3.w, l(1024), r0.z - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r12.y, r3.w, l(1024), r0.z - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r0.z, r3.z, l(32), r3.y - imad r10.y, r3.w, l(1024), r0.z - break - case l(10) - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r12.x, r3.z, l(256), r3.y - mov_sat r9.xy, r9.xyxx - mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r12.z, r3.z, l(256), r3.y - mov_sat r11.xy, r11.xyxx - mad r3.yz, r11.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r12.w, r3.z, l(256), r3.y - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r12.y, r3.z, l(256), r3.y - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r10.y, r3.z, l(256), r3.y - break - case l(15) - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(16), r13.x - imad r0.z, r13.z, l(256), r0.z - imad r12.x, r13.w, l(4096), r0.z - mov_sat r9.xyzw, r9.xyzw - mad r13.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(16), r13.x - imad r0.z, r13.z, l(256), r0.z - imad r12.z, r13.w, l(4096), r0.z - mov_sat r11.xyzw, r11.xyzw - mad r13.xyzw, r11.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(16), r13.x - imad r0.z, r13.z, l(256), r0.z - imad r12.w, r13.w, l(4096), r0.z - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(16), r13.x - imad r0.z, r13.z, l(256), r0.z - imad r12.y, r13.w, l(4096), r0.z - mov_sat r7.xyzw, r7.xyzw - mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(16), r13.x - imad r0.z, r13.z, l(256), r0.z - imad r10.y, r13.w, l(4096), r0.z - break - case l(24) - mov_sat r8.x, r8.x - mad r0.z, r8.x, l(65535.000000), l(0.500000) - ftou r12.x, r0.z - mov_sat r9.x, r9.x - mad r0.z, r9.x, l(65535.000000), l(0.500000) - ftou r12.z, r0.z - mov_sat r11.x, r11.x - mad r0.z, r11.x, l(65535.000000), l(0.500000) - ftou r12.w, r0.z - mov_sat r6.x, r6.x - mad r0.z, r6.x, l(65535.000000), l(0.500000) - ftou r12.y, r0.z - mov_sat r7.x, r7.x - mad r0.z, r7.x, l(65535.000000), l(0.500000) - ftou r10.y, r0.z - break - default - f32tof16 r12.x, r8.x - f32tof16 r12.z, r9.x - f32tof16 r12.w, r11.x - f32tof16 r12.y, r6.x - f32tof16 r10.y, r7.x - break -endswitch -if_nz r1.y - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r12.xzwy, l(0, 0, 0, 0) - ushr r7.xyzw, r12.xzwy, l(8, 8, 8, 8) - iadd r12.xyzw, r6.xwyz, r7.xwyz - bfi r0.z, l(8), l(8), r10.y, l(0) - ushr r2.x, r10.y, l(8) - iadd r10.y, r0.z, r2.x - mov r0.z, r12.x - mov r10.x, r12.w - mov r12.xy, r12.zyzz -else - mov r0.z, r12.x - mov r10.x, r12.w - mov r12.xy, r12.zyzz -endif -ld_raw r6.xyzw, r2.w, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r11.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r11.x, r6.y - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r11.x, r6.z - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r6.wwww, l(0, 8, 16, 24) - mov r11.x, r6.w - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r11.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r11.x, r6.y - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r11.x, r6.z - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r6.wwww, l(0, 10, 20, 30) - mov r11.x, r6.w - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r11.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r13.x, r6.y - mov r13.yz, r11.xxyx - and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r7.xyz, r3.yzwy, r13.xyzx, l(0,0,0,0) - utof r2.xw, r11.zzzw - ushr r11.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r13.x, r6.z - mov r13.yz, r11.xxwx - and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r8.xyz, r3.yzwy, r13.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r11.x, r6.w - and r3.yzw, r11.xxyz, l(0, 1023, 1023, 1023) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r9.xyz, r3.yzwy, r11.xyzx, l(0,0,0,0) - ushr r11.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r3.yz, r11.xxwx - mov r11.x, r6.x - and r13.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r16.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r15.xyzx, r14.xyzx, r11.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r14.xyzx, r11.xyzx - movc r6.xyz, r13.xyzx, r11.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r7.w, r2.x - mov r8.w, r2.w - mov r9.w, r3.y - mov r6.w, r3.z - break - case l(4) - ishl r11.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r13.xz, r11.xxyx - mov r13.yw, r6.yyyz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r11.zzwz - ishr r11.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r11.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r6.y - f16tof32 r7.y, r11.x - f16tof32 r8.x, r6.z - f16tof32 r8.y, r11.y - f16tof32 r9.x, r6.w - f16tof32 r9.y, r11.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r11.w - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r6.y - mov r7.yzw, l(0,0,0,0) - mov r8.x, r6.z - mov r8.yzw, l(0,0,0,0) - mov r9.x, r6.w - mov r9.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.w, r0.y, l(0.500000) - iadd r2.x, r0.x, l(2900) - ld_raw r11.xyzw, r2.x, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) - mov r17.x, r11.y - mov r17.yz, r16.xxyx - and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) - utof r2.xw, r16.zzzw - ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) - mov r17.x, r11.z - mov r17.yz, r16.xxwx - and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r14.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r16.x, r11.w - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r15.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) - utof r3.yz, r16.xxwx - mov r16.x, r11.x - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r13.w, r2.x - mov r14.w, r2.w - mov r15.w, r3.y - mov r11.w, r3.z - break - case l(4) - ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r11.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.yz, r16.zzwz - ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - f16tof32 r13.x, r11.y - f16tof32 r13.y, r16.x - f16tof32 r14.x, r11.z - f16tof32 r14.y, r16.y - f16tof32 r15.x, r11.w - f16tof32 r15.y, r16.z - f16tof32 r11.x, r11.x - f16tof32 r11.y, r16.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r13.x, r11.y - mov r13.yzw, l(0,0,0,0) - mov r14.x, r11.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r11.w - mov r15.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r13.xyzw - add r8.xyzw, r8.xyzw, r14.xyzw - add r9.xyzw, r9.xyzw, r15.xyzw - add r6.xyzw, r6.xyzw, r11.xyzw - uge r2.x, r2.y, l(6) - if_nz r2.x - mul r0.y, r0.y, l(0.250000) - iadd r2.xy, r0.xxxx, l(56, 2936, 0, 0) - ld_raw r11.xyzw, r2.x, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) - mov r17.x, r11.y - mov r17.yz, r16.xxyx - and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) - utof r2.xw, r16.zzzw - ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) - mov r17.x, r11.z - mov r17.yz, r16.xxwx - and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) - and r18.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r14.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r16.x, r11.w - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r15.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) - utof r3.yz, r16.xxwx - mov r16.x, r11.x - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r13.w, r2.x - mov r14.w, r2.w - mov r15.w, r3.y - mov r11.w, r3.z - break - case l(4) - ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r11.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.yz, r16.zzwz - ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - f16tof32 r13.x, r11.y - f16tof32 r13.y, r16.x - f16tof32 r14.x, r11.z - f16tof32 r14.y, r16.y - f16tof32 r15.x, r11.w - f16tof32 r15.y, r16.z - f16tof32 r11.x, r11.x - f16tof32 r11.y, r16.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r13.x, r11.y - mov r13.yzw, l(0,0,0,0) - mov r14.x, r11.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r11.w - mov r15.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r13.xyzw, r7.xyzw, r13.xyzw - add r14.xyzw, r8.xyzw, r14.xyzw - add r15.xyzw, r9.xyzw, r15.xyzw - add r11.xyzw, r6.xyzw, r11.xyzw - ld_raw r16.xyzw, r2.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r20.yzw, r16.yyyy, l(0, 8, 16, 24) - mov r20.x, r16.y - and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r17.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r20.yzw, r16.zzzz, l(0, 8, 16, 24) - mov r20.x, r16.z - and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r18.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r20.yzw, r16.wwww, l(0, 8, 16, 24) - mov r20.x, r16.w - and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r19.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r16.xxxx, l(0, 8, 16, 24) - and r20.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r20.xyzw, r20.xyzw - mul r16.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r20.yzw, r16.yyyy, l(0, 10, 20, 30) - mov r20.x, r16.y - and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r17.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r20.yzw, r16.zzzz, l(0, 10, 20, 30) - mov r20.x, r16.z - and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r18.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r20.yzw, r16.wwww, l(0, 10, 20, 30) - mov r20.x, r16.w - and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r19.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r16.xxxx, l(0, 10, 20, 30) - and r20.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r20.xyzw, r20.xyzw - mul r16.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r20.xyzw, r16.yyyz, l(10, 20, 30, 30) - mov r21.x, r16.y - mov r21.yz, r20.xxyx - and r2.xyw, r21.xyxz, l(1023, 1023, 0, 1023) - and r3.yzw, r21.xxyz, l(0, 127, 127, 127) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r23.xyz, r3.yzwy - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r3.yzwy, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r23.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r3.yzw, r22.xxyz, r3.yyzw, r21.xxyz - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r3.yzw, r3.yyzw, l(0, 16, 16, 16) - iadd r3.yzw, r21.xxyz, r3.yyzw - movc r17.xyz, r2.xywx, r3.yzwy, l(0,0,0,0) - utof r2.xy, r20.zwzz - ushr r20.xyzw, r16.zwwz, l(10, 10, 20, 20) - mov r21.x, r16.z - mov r21.yz, r20.xxwx - and r3.yzw, r21.xxyz, l(0, 1023, 1023, 1023) - and r22.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r24.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r23.xyzx, r22.xyzx, r21.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r22.xyzx, r21.xyzx - movc r18.xyz, r3.yzwy, r21.xyzx, l(0,0,0,0) - mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r20.x, r16.w - and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) - and r21.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r19.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) - ushr r20.xyzw, r16.wxxx, l(30, 10, 20, 30) - utof r3.yz, r20.xxwx - mov r20.x, r16.x - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r16.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r17.w, r2.x - mov r18.w, r2.y - mov r19.w, r3.y - mov r16.w, r3.z - break - case l(4) - ishl r20.xyzw, r16.yzwx, l(16, 16, 16, 16) - mov r21.xz, r20.xxyx - mov r21.yw, r16.yyyz - ishr r21.xyzw, r21.xyzw, l(16, 16, 16, 16) - itof r21.xyzw, r21.xyzw - mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r17.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r18.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.yz, r20.zzwz - ishr r20.xyzw, r16.ywzx, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r19.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r16.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - break - case l(6) - ushr r20.xyzw, r16.yzwx, l(16, 16, 16, 16) - f16tof32 r17.x, r16.y - f16tof32 r17.y, r20.x - f16tof32 r18.x, r16.z - f16tof32 r18.y, r20.y - f16tof32 r19.x, r16.w - f16tof32 r19.y, r20.z - f16tof32 r16.x, r16.x - f16tof32 r16.y, r20.w - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - break - default - mov r17.x, r16.y - mov r17.yzw, l(0,0,0,0) - mov r18.x, r16.z - mov r18.yzw, l(0,0,0,0) - mov r19.x, r16.w - mov r19.yzw, l(0,0,0,0) - mov r16.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r13.xyzw, r17.xyzw - add r8.xyzw, r14.xyzw, r18.xyzw - add r9.xyzw, r15.xyzw, r19.xyzw - add r6.xyzw, r11.xyzw, r16.xyzw - else - mov r0.y, r1.w - endif -endif -mul r7.xyzw, r0.yyyy, r7.xyzw -mul r8.xyzw, r0.yyyy, r8.xyzw -mul r9.xyzw, r0.yyyy, r9.xyzw -mul r6.xyzw, r0.yyyy, r6.xyzw -if_nz r2.z - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r9.xz, r9.zzxz - mov r6.xz, r6.zzxz -endif -switch r3.x - case l(3) - mov_sat r7.xyzw, r7.xyzw - mad r3.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(32), r3.x - imad r0.x, r3.z, l(1024), r0.x - imad r2.x, r3.w, l(0x00008000), r0.x - mov_sat r8.xyzw, r8.xyzw - mad r3.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(32), r3.x - imad r0.x, r3.z, l(1024), r0.x - imad r2.z, r3.w, l(0x00008000), r0.x - mov_sat r9.xyzw, r9.xyzw - mad r3.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(32), r3.x - imad r0.x, r3.z, l(1024), r0.x - imad r2.y, r3.w, l(0x00008000), r0.x - mov_sat r6.xyzw, r6.xyzw - mad r3.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(32), r3.x - imad r0.x, r3.z, l(1024), r0.x - imad r2.w, r3.w, l(0x00008000), r0.x - break - case l(4) - mov_sat r7.xyz, r7.xyzx - mad r3.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.x, r3.z, l(2048), r0.x - mov_sat r8.xyz, r8.xyzx - mad r3.xyz, r8.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.z, r3.z, l(2048), r0.x - mov_sat r9.xyz, r9.xyzx - mad r3.xyz, r9.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.y, r3.z, l(2048), r0.x - mov_sat r6.xyz, r6.xyzx - mad r3.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.w, r3.z, l(2048), r0.x - break - case l(5) - mov_sat r7.xyz, r7.xyzx - mad r3.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.x, r3.z, l(1024), r0.x - mov_sat r8.xyz, r8.xyzx - mad r3.xyz, r8.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.z, r3.z, l(1024), r0.x - mov_sat r9.xyz, r9.xyzx - mad r3.xyz, r9.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.y, r3.z, l(1024), r0.x - mov_sat r6.xyz, r6.xyzx - mad r3.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r3.xyz, r3.xyzx - imad r0.x, r3.y, l(32), r3.x - imad r2.w, r3.z, l(1024), r0.x - break - case l(10) - mov_sat r7.xy, r7.xyxx - mad r0.xy, r7.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.x, r0.y, l(256), r0.x - mov_sat r8.xy, r8.xyxx - mad r0.xy, r8.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.z, r0.y, l(256), r0.x - mov_sat r9.xy, r9.xyxx - mad r0.xy, r9.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.y, r0.y, l(256), r0.x - mov_sat r6.xy, r6.xyxx - mad r0.xy, r6.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.w, r0.y, l(256), r0.x - break - case l(15) - mov_sat r7.xyzw, r7.xyzw - mad r3.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(16), r3.x - imad r0.x, r3.z, l(256), r0.x - imad r2.x, r3.w, l(4096), r0.x - mov_sat r8.xyzw, r8.xyzw - mad r3.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(16), r3.x - imad r0.x, r3.z, l(256), r0.x - imad r2.z, r3.w, l(4096), r0.x - mov_sat r9.xyzw, r9.xyzw - mad r3.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(16), r3.x - imad r0.x, r3.z, l(256), r0.x - imad r2.y, r3.w, l(4096), r0.x - mov_sat r6.xyzw, r6.xyzw - mad r3.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r0.x, r3.y, l(16), r3.x - imad r0.x, r3.z, l(256), r0.x - imad r2.w, r3.w, l(4096), r0.x - break - case l(24) - mov_sat r7.x, r7.x - mad r0.x, r7.x, l(65535.000000), l(0.500000) - ftou r2.x, r0.x - mov_sat r8.x, r8.x - mad r0.x, r8.x, l(65535.000000), l(0.500000) - ftou r2.z, r0.x - mov_sat r9.x, r9.x - mad r0.x, r9.x, l(65535.000000), l(0.500000) - ftou r2.y, r0.x - mov_sat r6.x, r6.x - mad r0.x, r6.x, l(65535.000000), l(0.500000) - ftou r2.w, r0.x - break - default - f32tof16 r2.x, r7.x - f32tof16 r2.z, r8.x - f32tof16 r2.y, r9.x - f32tof16 r2.w, r6.x - break -endswitch -if_nz r1.y - bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r2.xzyw, l(0, 0, 0, 0) - ushr r6.xyzw, r2.xzyw, l(8, 8, 8, 8) - iadd r2.xyzw, r3.xzyw, r6.xzyw -endif -if_nz r0.w - mov r0.z, r12.y - mov r12.x, r10.y - mov r10.x, r2.x -endif -imad r4.y, r0.z, l(0x00010000), r10.z -store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw -imad r0.xyzw, r10.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r12.xyxx -store_uav_typed U0[0].xyzw, r5.zzzz, r0.xyzw -imad r0.xyzw, r2.zwzz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r2.xyxx -store_uav_typed U0[0].xyzw, r5.wwww, r0.xyzw -ret -// Approximately 7971 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.cso deleted file mode 100644 index 9a87bbf59..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.h deleted file mode 100644 index 15ed09755..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.h +++ /dev/null @@ -1,9790 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_16bpp_from_64bpp_3xres.cs.hlsl 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a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.txt deleted file mode 100644 index 76a70df9e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.txt +++ /dev/null @@ -1,4995 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 11 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].xxzz, l(1023, 0x40000000, 7, 8) -ubfe r4.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r5.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r5.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -ishl r1.w, r5.x, l(1) -imad r1.w, r5.y, r3.x, r1.w -iadd r1.w, r1.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r2.x, r2.x, l(1) -imad r1.w, r1.w, l(1280), r2.x -imul null, r1.w, r1.w, l(9) -ushr r1.w, r1.w, l(1) -movc r2.x, r2.z, l(18), l(9) -movc r2.yz, r0.wwzw, l(0,0,0,0), l(0,1,1,0) -movc r2.yz, r3.yyyy, r2.yyzy, l(0,0,0,0) -bfi r5.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r5.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r3.x, r1.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r3.x, r2.w, r5.x - ushr r3.y, r1.x, l(5) - imad r2.w, r2.w, r3.y, r5.y - ishl r3.y, r0.z, l(9) - and r3.y, r3.y, l(3072) - bfi r3.y, l(3), l(7), r0.w, r3.y - ishr r3.y, r3.y, l(6) - iadd r3.x, r3.x, r5.z - bfi r3.w, l(1), l(1), r3.x, l(0) - iadd r3.w, r3.w, r5.w - bfi r3.w, l(2), l(1), r3.w, l(0) - bfi r3.x, l(1), l(0), r3.x, r3.w - and r3.w, r3.y, l(48) - bfi r4.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r4.xy, r3.wwww, l(2, 16, 0, 0), r4.xyxx - bfi r3.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r3.yyyy, r4.xxxy - bfi r3.yw, l(0, 2, 0, 2), l(0, 7, 0, 10), r1.zzzz, r3.yyyw - ubfe r1.z, l(3), l(6), r3.y - and r2.w, r3.x, l(6) - bfi r3.x, l(1), l(8), r3.x, l(0) - imad r1.z, r1.z, l(32), r3.x - imad r1.z, r2.w, l(4), r1.z - bfi r3.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r0.zzzz, r3.ywyy - bfi r1.z, l(9), l(3), r1.z, r3.y - bfi r1.z, l(6), l(0), r3.x, r1.z -else - ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r3.xy, r0.zzzz, l(3, 7, 0, 0) - and r3.xy, r3.xyxx, l(112, 2048, 0, 0) - bfi r0.y, l(3), l(1), r0.w, r3.x - ishl r1.x, r3.x, l(1) - bfi r0.w, l(3), l(2), r0.w, r1.x - and r0.w, r0.w, l(224) - bfi r1.x, l(24), l(8), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r3.xw, r0.wwww, l(3, 0, 0, 2) - bfi r0.xw, l(24, 0, 0, 24), l(11, 0, 0, 10), r0.xxxx, r3.xxxw - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r3.y, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r5.z, l(2) - iadd r0.y, r5.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.z, l(6), l(0), r1.x, r0.x -endif -imul null, r0.x, r1.z, l(9) -ushr r0.x, r0.x, l(3) -imad r0.y, r2.z, l(3), r1.w -iadd r0.z, r2.y, r0.y -ld r5.yw, r0.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.xz, r5.yywy, l(16, 0, 16, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r1.zzzx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -ibfe r0.w, l(6), l(16), CB0[0][0].z -ishl r0.w, r0.w, l(23) -iadd r0.w, r0.w, l(0x3f800000) -uge r1.x, r1.y, l(4) -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.z, l(720) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.xy, r0.zzzz, l(9, 729, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.z, r0.w -endif -mul r5.xyzw, r1.zzzz, r5.ywxz -and r0.z, CB0[0][0].z, l(0x01000000) -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r3.xy, r0.yyyy, l(1, 2, 0, 0) -ld r6.yw, r3.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(721) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.xw, r0.yyyy, l(10, 0, 0, 730) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.z, r0.w -endif -mul r6.xyzw, r1.zzzz, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(32), r7.x - imad r1.z, r7.z, l(1024), r1.z - imad r1.z, r7.w, l(0x00008000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - ishl r3.x, r7.w, l(31) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.x, r1.z, r2.w - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(32), r7.x - imad r1.z, r7.z, l(2048), r1.z - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.x, r7.z, l(27) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.x, r1.z, r2.w - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(32), r7.x - imad r1.z, r7.z, l(1024), r1.z - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.x, r7.z, l(26) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.x, r1.z, r2.w - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r6.xxxy - mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(256), r7.x - imad r1.z, r7.z, l(0x00010000), r1.z - imad r4.x, r7.w, l(0x01000000), r1.z - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(16), r7.x - imad r1.z, r7.z, l(256), r1.z - imad r1.z, r7.w, l(4096), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - ishl r3.x, r7.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.x, r1.z, r2.w - break - case l(24) - mov_sat r6.z, r5.x - mov_sat r6.x, r6.x - mad r3.xw, r6.zzzx, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r3.xw, r3.xxxw - imad r4.x, r3.w, l(0x00010000), r3.x - break - default - f32tof16 r1.z, r5.x - f32tof16 r2.w, r6.x - imad r4.x, r2.w, l(0x00010000), r1.z - break -endswitch -ld r5.yw, r3.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(722) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.xy, r0.yyyy, l(11, 731, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.z, r0.w -endif -mul r5.xyzw, r1.zzzz, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r0.y, r1.w, r2.y -iadd r3.xy, r0.yyyy, l(3, 6, 0, 0) -ld r6.yw, r3.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(723) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.xw, r0.yyyy, l(12, 0, 0, 732) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.z, r0.w -endif -mul r6.xyzw, r1.zzzz, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(32), r7.x - imad r1.z, r7.z, l(1024), r1.z - imad r1.z, r7.w, l(0x00008000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - ishl r3.x, r7.w, l(31) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.z, r2.w - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(32), r7.x - imad r1.z, r7.z, l(2048), r1.z - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.x, r7.z, l(27) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.z, r2.w - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(32), r7.x - imad r1.z, r7.z, l(1024), r1.z - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.x, r7.z, l(26) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.z, r2.w - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r6.xxxy - mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(256), r7.x - imad r1.z, r7.z, l(0x00010000), r1.z - imad r4.y, r7.w, l(0x01000000), r1.z - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(16), r7.x - imad r1.z, r7.z, l(256), r1.z - imad r1.z, r7.w, l(4096), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - ishl r3.x, r7.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.z, r2.w - break - case l(24) - mov_sat r6.z, r5.x - mov_sat r6.x, r6.x - mad r3.xw, r6.zzzx, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r3.xw, r3.xxxw - imad r4.y, r3.w, l(0x00010000), r3.x - break - default - f32tof16 r1.z, r5.x - f32tof16 r2.w, r6.x - imad r4.y, r2.w, l(0x00010000), r1.z - break -endswitch -ieq r1.z, r3.z, l(1) -if_nz r1.z - ishl r3.xz, r4.xxyx, l(8, 0, 8, 0) - and r3.xz, r3.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r3.xzxx, r5.xyxx -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx -iadd r5.xyzw, r1.wwww, l(4, 5, 7, 8) -ld r6.yw, r5.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r6.yywy, l(16, 0, 16, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.zzzx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(724) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r3.xz, r1.wwww, l(13, 0, 733, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.w, r0.w -endif -mul r6.xyzw, r2.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -ld r7.yw, r5.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(725) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r3.xz, r1.wwww, l(14, 0, 734, 0) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r3.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r9.yywy, l(16, 0, 16, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.zzzx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.w, r0.w -endif -mul r7.xyzw, r2.wwww, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - imad r2.w, r8.w, l(0x00008000), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r3.x, r8.y, l(32), r8.x - imad r3.x, r8.z, l(1024), r3.x - ishl r3.z, r8.w, l(31) - imad r3.x, r3.x, l(0x00010000), r3.z - iadd r4.x, r2.w, r3.x - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r3.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r3.xzw, r3.xxzw - imad r2.w, r3.z, l(32), r3.x - imad r2.w, r3.w, l(2048), r2.w - mov_sat r7.xyz, r7.xyzx - mad r3.xzw, r7.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r3.xzw, r3.xxzw - imad r3.x, r3.z, l(32), r3.x - ishl r3.z, r3.w, l(27) - imad r3.x, r3.x, l(0x00010000), r3.z - iadd r4.x, r2.w, r3.x - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r3.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r3.xzw, r3.xxzw - imad r2.w, r3.z, l(32), r3.x - imad r2.w, r3.w, l(1024), r2.w - mov_sat r7.xyz, r7.xyzx - mad r3.xzw, r7.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r3.xzw, r3.xxzw - imad r3.x, r3.z, l(32), r3.x - ishl r3.z, r3.w, l(26) - imad r3.x, r3.x, l(0x00010000), r3.z - iadd r4.x, r2.w, r3.x - break - case l(10) - mov_sat r6.xy, r6.xyxx - mov_sat r6.zw, r7.xxxy - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(256), r8.x - imad r2.w, r8.z, l(0x00010000), r2.w - imad r4.x, r8.w, l(0x01000000), r2.w - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(16), r8.x - imad r2.w, r8.z, l(256), r2.w - imad r2.w, r8.w, l(4096), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r3.x, r8.y, l(16), r8.x - imad r3.x, r8.z, l(256), r3.x - ishl r3.z, r8.w, l(28) - imad r3.x, r3.x, l(0x00010000), r3.z - iadd r4.x, r2.w, r3.x - break - case l(24) - mov_sat r7.z, r6.x - mov_sat r7.x, r7.x - mad r3.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r3.xz, r3.xxzx - imad r4.x, r3.z, l(0x00010000), r3.x - break - default - f32tof16 r2.w, r6.x - f32tof16 r3.x, r7.x - imad r4.x, r3.x, l(0x00010000), r2.w - break -endswitch -ld r3.yw, r3.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r5.yyyx - break - default - mov r3.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r5.x, r0.y, l(726) - ld r6.yw, r5.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r3.xyzw, r6.xyzw - uge r5.x, r1.y, l(6) - if_nz r5.x - mul r2.w, r0.w, l(0.250000) - iadd r5.xy, r0.yyyy, l(15, 735, 0, 0) - ld r6.yw, r5.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r3.ywxz, r6.ywxz - ld r7.yw, r5.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.w, r0.w -endif -mul r3.xyzw, r2.wwww, r3.ywxz -if_nz r0.z - mov r3.xz, r3.zzxz -endif -ld r6.yw, r5.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r0.y, r0.w, l(0.500000) - iadd r2.w, r1.w, l(727) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r0.y, r0.w, l(0.250000) - iadd r5.xy, r1.wwww, l(16, 736, 0, 0) - ld r7.yw, r5.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r5.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r5.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r0.y, r0.w -endif -mul r6.xyzw, r0.yyyy, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r0.y, r7.y, l(32), r7.x - imad r0.y, r7.z, l(1024), r0.y - imad r0.y, r7.w, l(0x00008000), r0.y - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - ishl r5.x, r7.w, l(31) - imad r2.w, r2.w, l(0x00010000), r5.x - iadd r4.y, r0.y, r2.w - break - case l(4) - mov_sat r3.xyz, r3.xyzx - mad r5.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r0.y, r5.y, l(32), r5.x - imad r0.y, r5.z, l(2048), r0.y - mov_sat r6.xyz, r6.xyzx - mad r5.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r2.w, r5.y, l(32), r5.x - ishl r5.x, r5.z, l(27) - imad r2.w, r2.w, l(0x00010000), r5.x - iadd r4.y, r0.y, r2.w - break - case l(5) - mov_sat r3.xyz, r3.xyzx - mad r5.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r0.y, r5.y, l(32), r5.x - imad r0.y, r5.z, l(1024), r0.y - mov_sat r6.xyz, r6.xyzx - mad r5.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r2.w, r5.y, l(32), r5.x - ishl r5.x, r5.z, l(26) - imad r2.w, r2.w, l(0x00010000), r5.x - iadd r4.y, r0.y, r2.w - break - case l(10) - mov_sat r3.xy, r3.xyxx - mov_sat r3.zw, r6.xxxy - mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r0.y, r7.y, l(256), r7.x - imad r0.y, r7.z, l(0x00010000), r0.y - imad r4.y, r7.w, l(0x01000000), r0.y - break - case l(15) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r0.y, r7.y, l(16), r7.x - imad r0.y, r7.z, l(256), r0.y - imad r0.y, r7.w, l(4096), r0.y - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - ishl r3.y, r7.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.y - iadd r4.y, r0.y, r2.w - break - case l(24) - mov_sat r6.z, r3.x - mov_sat r6.x, r6.x - mad r3.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r4.y, r3.z, l(0x00010000), r3.y - break - default - f32tof16 r0.y, r3.x - f32tof16 r2.w, r6.x - imad r4.y, r2.w, l(0x00010000), r0.y - break -endswitch -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -if_nz r1.z - ishl r5.xy, r4.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r4.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r5.xyxx, r6.xyxx -endif -store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyxx -ld r5.yw, r5.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r4.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r0.y, r0.w, l(0.500000) - iadd r2.w, r1.w, l(728) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r0.y, r0.w, l(0.250000) - iadd r4.xy, r1.wwww, l(17, 737, 0, 0) - ld r6.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r0.y, r0.w -endif -mul r5.xyzw, r0.yyyy, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r0.y, r1.w, r2.x -imad r1.w, r2.z, l(3), r0.y -iadd r2.w, r2.y, r1.w -ld r6.yw, r2.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r3.x, r0.w, l(0.500000) - iadd r4.x, r2.w, l(720) - ld r7.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r4.x, r1.y, l(6) - if_nz r4.x - mul r3.x, r0.w, l(0.250000) - iadd r4.xy, r2.wwww, l(9, 729, 0, 0) - ld r7.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r3.x, r0.w -endif -mul r6.xyzw, r3.xxxx, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - imad r2.w, r7.w, l(0x00008000), r2.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r3.x, r7.y, l(32), r7.x - imad r3.x, r7.z, l(1024), r3.x - ishl r7.x, r7.w, l(31) - imad r3.x, r3.x, l(0x00010000), r7.x - iadd r4.x, r2.w, r3.x - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(2048), r2.w - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r3.x, r7.y, l(32), r7.x - ishl r7.x, r7.z, l(27) - imad r3.x, r3.x, l(0x00010000), r7.x - iadd r4.x, r2.w, r3.x - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r3.x, r7.y, l(32), r7.x - ishl r7.x, r7.z, l(26) - imad r3.x, r3.x, l(0x00010000), r7.x - iadd r4.x, r2.w, r3.x - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r6.xxxy - mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(256), r7.x - imad r2.w, r7.z, l(0x00010000), r2.w - imad r4.x, r7.w, l(0x01000000), r2.w - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - imad r2.w, r7.w, l(4096), r2.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r3.x, r7.y, l(16), r7.x - imad r3.x, r7.z, l(256), r3.x - ishl r5.y, r7.w, l(28) - imad r3.x, r3.x, l(0x00010000), r5.y - iadd r4.x, r2.w, r3.x - break - case l(24) - mov_sat r6.z, r5.x - mov_sat r6.x, r6.x - mad r5.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r5.yz, r5.yyzy - imad r4.x, r5.z, l(0x00010000), r5.y - break - default - f32tof16 r2.w, r5.x - f32tof16 r3.x, r6.x - imad r4.x, r3.x, l(0x00010000), r2.w - break -endswitch -iadd r5.xy, r1.wwww, l(1, 2, 0, 0) -ld r6.yw, r5.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xz, r6.yywy, l(16, 0, 16, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.zzzx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(721) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r5.xz, r1.wwww, l(10, 0, 730, 0) - ld r7.yw, r5.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r5.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r5.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.w, r0.w -endif -mul r6.xyzw, r2.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -ld r5.yw, r5.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r7.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(722) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r7.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r7.xy, r1.wwww, l(11, 731, 0, 0) - ld r8.yw, r7.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r7.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r5.ywxz, r8.ywxz - ld r7.yw, r7.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r9.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r9.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r7.xyzw, r8.zxwy - endif -else - mov r2.w, r0.w -endif -mul r5.xyzw, r2.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -switch r4.z - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(1024), r1.w - imad r1.w, r7.w, l(0x00008000), r1.w - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - ishl r3.x, r7.w, l(31) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(2048), r1.w - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.x, r7.z, l(27) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(1024), r1.w - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.x, r7.z, l(26) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(10) - mov_sat r6.xy, r6.xyxx - mov_sat r6.zw, r5.xxxy - mad r7.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(256), r7.x - imad r1.w, r7.z, l(0x00010000), r1.w - imad r4.y, r7.w, l(0x01000000), r1.w - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(16), r7.x - imad r1.w, r7.z, l(256), r1.w - imad r1.w, r7.w, l(4096), r1.w - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - ishl r3.x, r7.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(24) - mov_sat r5.z, r6.x - mov_sat r5.x, r5.x - mad r5.yz, r5.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r5.yz, r5.yyzy - imad r4.y, r5.z, l(0x00010000), r5.y - break - default - f32tof16 r1.w, r6.x - f32tof16 r2.w, r5.x - imad r4.y, r2.w, l(0x00010000), r1.w - break -endswitch -if_nz r1.z - ishl r5.xy, r4.xyxx, l(8, 8, 0, 0) - ushr r5.zw, r4.xxxy, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r4.xy, r5.zwzz, r5.xyxx -endif -store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyxx -iadd r1.w, r2.y, r0.y -iadd r3.xy, r1.wwww, l(3, 6, 0, 0) -ld r5.yw, r3.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r4.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(723) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r4.xy, r1.wwww, l(12, 732, 0, 0) - ld r6.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.w, r0.w -endif -mul r5.xyzw, r2.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) -ld r7.yw, r6.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r0.y, l(724) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r4.xy, r0.yyyy, l(13, 733, 0, 0) - ld r8.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r9.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r9.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r4.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.w, r0.w -endif -mul r7.xyzw, r2.wwww, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - imad r2.w, r8.w, l(0x00008000), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r3.x, r8.y, l(32), r8.x - imad r3.x, r8.z, l(1024), r3.x - ishl r6.x, r8.w, l(31) - imad r3.x, r3.x, l(0x00010000), r6.x - iadd r4.x, r2.w, r3.x - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(2048), r2.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r3.x, r8.y, l(32), r8.x - ishl r6.x, r8.z, l(27) - imad r3.x, r3.x, l(0x00010000), r6.x - iadd r4.x, r2.w, r3.x - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r3.x, r8.y, l(32), r8.x - ishl r6.x, r8.z, l(26) - imad r3.x, r3.x, l(0x00010000), r6.x - iadd r4.x, r2.w, r3.x - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r7.xxxy - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(256), r8.x - imad r2.w, r8.z, l(0x00010000), r2.w - imad r4.x, r8.w, l(0x01000000), r2.w - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(16), r8.x - imad r2.w, r8.z, l(256), r2.w - imad r2.w, r8.w, l(4096), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r3.x, r8.y, l(16), r8.x - imad r3.x, r8.z, l(256), r3.x - ishl r5.y, r8.w, l(28) - imad r3.x, r3.x, l(0x00010000), r5.y - iadd r4.x, r2.w, r3.x - break - case l(24) - mov_sat r7.z, r5.x - mov_sat r7.x, r7.x - mad r5.yz, r7.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r5.yz, r5.yyzy - imad r4.x, r5.z, l(0x00010000), r5.y - break - default - f32tof16 r2.w, r5.x - f32tof16 r3.x, r7.x - imad r4.x, r3.x, l(0x00010000), r2.w - break -endswitch -ld r5.yw, r6.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r6.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r0.y, l(725) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r6.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r7.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r6.xy, r0.yyyy, l(14, 734, 0, 0) - ld r7.yw, r6.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r5.ywxz, r7.ywxz - ld r8.yw, r6.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r6.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.w, r0.w -endif -mul r5.xyzw, r2.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -ld r7.yw, r3.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(726) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r3.xy, r1.wwww, l(15, 735, 0, 0) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r6.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.w, r0.w -endif -mul r7.xyzw, r2.wwww, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(32), r8.x - imad r1.w, r8.z, l(1024), r1.w - imad r1.w, r8.w, l(0x00008000), r1.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - ishl r3.x, r8.w, l(31) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.w, r8.y, l(32), r8.x - imad r1.w, r8.z, l(2048), r1.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - ishl r3.x, r8.z, l(27) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.w, r8.y, l(32), r8.x - imad r1.w, r8.z, l(1024), r1.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - ishl r3.x, r8.z, l(26) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r7.xxxy - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(256), r8.x - imad r1.w, r8.z, l(0x00010000), r1.w - imad r4.y, r8.w, l(0x01000000), r1.w - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(16), r8.x - imad r1.w, r8.z, l(256), r1.w - imad r1.w, r8.w, l(4096), r1.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(16), r8.x - imad r2.w, r8.z, l(256), r2.w - ishl r3.x, r8.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.x - iadd r4.y, r1.w, r2.w - break - case l(24) - mov_sat r7.z, r5.x - mov_sat r7.x, r7.x - mad r3.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r3.xy, r3.xyxx - imad r4.y, r3.y, l(0x00010000), r3.x - break - default - f32tof16 r1.w, r5.x - f32tof16 r2.w, r7.x - imad r4.y, r2.w, l(0x00010000), r1.w - break -endswitch -if_nz r1.z - ishl r3.xy, r4.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r3.xyxx, r5.xyxx -endif -store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyxx -ld r5.yw, r6.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.w, r0.y, l(727) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.w, r0.w, l(0.250000) - iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r5.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.w, r0.w -endif -mul r5.xyzw, r1.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -ld r6.yw, r6.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.w, r0.y, l(728) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.w, r0.w, l(0.250000) - iadd r3.xy, r0.yyyy, l(17, 737, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.w, r0.w -endif -mul r6.xyzw, r1.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(1024), r1.w - imad r1.w, r7.w, l(0x00008000), r1.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - ishl r3.z, r7.w, l(31) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(2048), r1.w - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.z, r7.z, l(27) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(1024), r1.w - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - ishl r3.z, r7.z, l(26) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r6.xxxy - mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(256), r7.x - imad r1.w, r7.z, l(0x00010000), r1.w - imad r3.x, r7.w, l(0x01000000), r1.w - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(16), r7.x - imad r1.w, r7.z, l(256), r1.w - imad r1.w, r7.w, l(4096), r1.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - ishl r3.z, r7.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(24) - mov_sat r6.z, r5.x - mov_sat r6.x, r6.x - mad r4.xy, r6.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r3.x, r4.y, l(0x00010000), r4.x - break - default - f32tof16 r1.w, r5.x - f32tof16 r2.w, r6.x - imad r3.x, r2.w, l(0x00010000), r1.w - break -endswitch -iadd r0.y, r2.x, r0.y -imad r1.w, r2.z, l(3), r0.y -iadd r2.w, r2.y, r1.w -ld r5.yw, r2.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r4.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r3.z, r0.w, l(0.500000) - iadd r4.x, r2.w, l(720) - ld r6.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r4.x, r1.y, l(6) - if_nz r4.x - mul r3.z, r0.w, l(0.250000) - iadd r4.xy, r2.wwww, l(9, 729, 0, 0) - ld r6.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r3.z, r0.w -endif -mul r5.xyzw, r3.zzzz, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r4.xy, r1.wwww, l(1, 2, 0, 0) -ld r6.yw, r4.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.z, r1.w, l(721) - ld r7.yw, r3.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r3.z, r1.y, l(6) - if_nz r3.z - mul r2.w, r0.w, l(0.250000) - iadd r7.xy, r1.wwww, l(10, 730, 0, 0) - ld r8.yw, r7.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r7.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r6.ywxz, r8.ywxz - ld r7.yw, r7.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r9.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r9.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.xyzw, r8.zxwy - endif -else - mov r2.w, r0.w -endif -mul r6.xyzw, r2.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - imad r2.w, r7.w, l(0x00008000), r2.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r3.z, r7.y, l(32), r7.x - imad r3.z, r7.z, l(1024), r3.z - ishl r4.x, r7.w, l(31) - imad r3.z, r3.z, l(0x00010000), r4.x - iadd r3.y, r2.w, r3.z - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(2048), r2.w - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r3.z, r7.y, l(32), r7.x - ishl r4.x, r7.z, l(27) - imad r3.z, r3.z, l(0x00010000), r4.x - iadd r3.y, r2.w, r3.z - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r3.z, r7.y, l(32), r7.x - ishl r4.x, r7.z, l(26) - imad r3.z, r3.z, l(0x00010000), r4.x - iadd r3.y, r2.w, r3.z - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r6.xxxy - mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(256), r7.x - imad r2.w, r7.z, l(0x00010000), r2.w - imad r3.y, r7.w, l(0x01000000), r2.w - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - imad r2.w, r7.w, l(4096), r2.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r3.z, r7.y, l(16), r7.x - imad r3.z, r7.z, l(256), r3.z - ishl r4.x, r7.w, l(28) - imad r3.z, r3.z, l(0x00010000), r4.x - iadd r3.y, r2.w, r3.z - break - case l(24) - mov_sat r6.z, r5.x - mov_sat r6.x, r6.x - mad r5.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r5.yz, r5.yyzy - imad r3.y, r5.z, l(0x00010000), r5.y - break - default - f32tof16 r2.w, r5.x - f32tof16 r3.z, r6.x - imad r3.y, r3.z, l(0x00010000), r2.w - break -endswitch -if_nz r1.z - ishl r5.xy, r3.xyxx, l(8, 8, 0, 0) - ushr r5.zw, r3.xxxy, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r3.xy, r5.zwzz, r5.xyxx -endif -store_uav_typed U0[0].xyzw, r3.wwww, r3.xyxx -ld r3.yw, r4.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r5.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r3.ywyy, l(16, 16, 0, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r4.yyyx - break - default - mov r3.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r4.x, r1.w, l(722) - ld r5.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r4.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r3.xyzw, r5.xyzw - uge r4.x, r1.y, l(6) - if_nz r4.x - mul r2.w, r0.w, l(0.250000) - iadd r4.xy, r1.wwww, l(11, 731, 0, 0) - ld r5.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r6.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r3.ywxz, r5.ywxz - ld r6.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r5.zxwy, r6.xyzw - endif -else - mov r2.w, r0.w -endif -mul r3.xyzw, r2.wwww, r3.ywxz -if_nz r0.z - mov r3.xz, r3.zzxz -endif -iadd r1.w, r2.y, r0.y -iadd r4.xy, r1.wwww, l(3, 6, 0, 0) -ld r5.yw, r4.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r6.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r4.x, r1.w, l(723) - ld r6.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r4.x, r1.y, l(6) - if_nz r4.x - mul r2.w, r0.w, l(0.250000) - iadd r6.xy, r1.wwww, l(12, 732, 0, 0) - ld r7.yw, r6.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r6.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r5.ywxz, r7.ywxz - ld r6.yw, r6.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r8.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.xyzw, r7.zxwy - endif -else - mov r2.w, r0.w -endif -mul r5.xyzw, r2.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -switch r4.z - case l(3) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - imad r2.w, r7.w, l(0x00008000), r2.w - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r4.x, r7.y, l(32), r7.x - imad r4.x, r7.z, l(1024), r4.x - ishl r6.z, r7.w, l(31) - imad r4.x, r4.x, l(0x00010000), r6.z - iadd r6.x, r2.w, r4.x - break - case l(4) - mov_sat r3.xyz, r3.xyzx - mad r7.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(2048), r2.w - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r4.x, r7.y, l(32), r7.x - ishl r6.z, r7.z, l(27) - imad r4.x, r4.x, l(0x00010000), r6.z - iadd r6.x, r2.w, r4.x - break - case l(5) - mov_sat r3.xyz, r3.xyzx - mad r7.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r2.w, r7.y, l(32), r7.x - imad r2.w, r7.z, l(1024), r2.w - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r4.x, r7.y, l(32), r7.x - ishl r6.z, r7.z, l(26) - imad r4.x, r4.x, l(0x00010000), r6.z - iadd r6.x, r2.w, r4.x - break - case l(10) - mov_sat r3.xy, r3.xyxx - mov_sat r3.zw, r5.xxxy - mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(256), r7.x - imad r2.w, r7.z, l(0x00010000), r2.w - imad r6.x, r7.w, l(0x01000000), r2.w - break - case l(15) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.w, r7.y, l(16), r7.x - imad r2.w, r7.z, l(256), r2.w - imad r2.w, r7.w, l(4096), r2.w - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r3.y, r7.y, l(16), r7.x - imad r3.y, r7.z, l(256), r3.y - ishl r3.z, r7.w, l(28) - imad r3.y, r3.y, l(0x00010000), r3.z - iadd r6.x, r2.w, r3.y - break - case l(24) - mov_sat r5.z, r3.x - mov_sat r5.x, r5.x - mad r3.yz, r5.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r6.x, r3.z, l(0x00010000), r3.y - break - default - f32tof16 r2.w, r3.x - f32tof16 r3.x, r5.x - imad r6.x, r3.x, l(0x00010000), r2.w - break -endswitch -iadd r3.xyzw, r0.yyyy, l(4, 5, 7, 8) -ld r5.yw, r3.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r6.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r0.y, l(724) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r6.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r7.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r6.zw, r0.yyyy, l(0, 0, 13, 733) - ld r7.yw, r6.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r5.ywxz, r7.ywxz - ld r8.yw, r6.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r6.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.w, r0.w -endif -mul r5.xyzw, r2.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -ld r7.yw, r3.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r0.y, l(725) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r3.xy, r0.yyyy, l(14, 734, 0, 0) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r6.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r6.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.w, r0.w -endif -mul r7.xyzw, r2.wwww, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - imad r2.w, r8.w, l(0x00008000), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r3.x, r8.y, l(32), r8.x - imad r3.x, r8.z, l(1024), r3.x - ishl r3.y, r8.w, l(31) - imad r3.x, r3.x, l(0x00010000), r3.y - iadd r6.y, r2.w, r3.x - break - case l(4) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(2048), r2.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r3.x, r8.y, l(32), r8.x - ishl r3.y, r8.z, l(27) - imad r3.x, r3.x, l(0x00010000), r3.y - iadd r6.y, r2.w, r3.x - break - case l(5) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r3.x, r8.y, l(32), r8.x - ishl r3.y, r8.z, l(26) - imad r3.x, r3.x, l(0x00010000), r3.y - iadd r6.y, r2.w, r3.x - break - case l(10) - mov_sat r5.xy, r5.xyxx - mov_sat r5.zw, r7.xxxy - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(256), r8.x - imad r2.w, r8.z, l(0x00010000), r2.w - imad r6.y, r8.w, l(0x01000000), r2.w - break - case l(15) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(16), r8.x - imad r2.w, r8.z, l(256), r2.w - imad r2.w, r8.w, l(4096), r2.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r3.x, r8.y, l(16), r8.x - imad r3.x, r8.z, l(256), r3.x - ishl r3.y, r8.w, l(28) - imad r3.x, r3.x, l(0x00010000), r3.y - iadd r6.y, r2.w, r3.x - break - case l(24) - mov_sat r7.z, r5.x - mov_sat r7.x, r7.x - mad r3.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r3.xy, r3.xyxx - imad r6.y, r3.y, l(0x00010000), r3.x - break - default - f32tof16 r2.w, r5.x - f32tof16 r3.x, r7.x - imad r6.y, r3.x, l(0x00010000), r2.w - break -endswitch -iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) -if_nz r1.z - ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r3.xyxx, r6.zwzz -endif -store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyxx -ld r6.yw, r4.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.w, r0.w, l(0.500000) - iadd r3.x, r1.w, l(726) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r2.w, r0.w, l(0.250000) - iadd r3.xy, r1.wwww, l(15, 735, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.w, r0.w -endif -mul r6.xyzw, r2.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -ld r7.yw, r3.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.w, r0.y, l(727) - ld r8.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.w, r0.w, l(0.250000) - iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) - ld r8.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r1.w, r0.w -endif -mul r7.xyzw, r1.wwww, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(32), r8.x - imad r1.w, r8.z, l(1024), r1.w - imad r1.w, r8.w, l(0x00008000), r1.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(32), r8.x - imad r2.w, r8.z, l(1024), r2.w - ishl r3.z, r8.w, l(31) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r8.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.w, r8.y, l(32), r8.x - imad r1.w, r8.z, l(2048), r1.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - ishl r3.z, r8.z, l(27) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r8.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.w, r8.y, l(32), r8.x - imad r1.w, r8.z, l(1024), r1.w - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.w, r8.y, l(32), r8.x - ishl r3.z, r8.z, l(26) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(10) - mov_sat r6.xy, r6.xyxx - mov_sat r6.zw, r7.xxxy - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(256), r8.x - imad r1.w, r8.z, l(0x00010000), r1.w - imad r3.x, r8.w, l(0x01000000), r1.w - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(16), r8.x - imad r1.w, r8.z, l(256), r1.w - imad r1.w, r8.w, l(4096), r1.w - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.w, r8.y, l(16), r8.x - imad r2.w, r8.z, l(256), r2.w - ishl r3.z, r8.w, l(28) - imad r2.w, r2.w, l(0x00010000), r3.z - iadd r3.x, r1.w, r2.w - break - case l(24) - mov_sat r7.z, r6.x - mov_sat r7.x, r7.x - mad r4.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r3.x, r4.y, l(0x00010000), r4.x - break - default - f32tof16 r1.w, r6.x - f32tof16 r2.w, r7.x - imad r3.x, r2.w, l(0x00010000), r1.w - break -endswitch -ld r6.yw, r3.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.w, r0.y, l(728) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.w, r0.w, l(0.250000) - iadd r3.zw, r0.yyyy, l(0, 0, 17, 737) - ld r7.yw, r3.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.w, r0.w -endif -mul r6.xyzw, r1.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -iadd r0.y, r2.x, r0.y -imad r1.w, r2.z, l(3), r0.y -iadd r2.x, r2.y, r1.w -ld r7.yw, r2.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.z, r0.w, l(0.500000) - iadd r2.w, r2.x, l(720) - ld r8.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r2.z, r0.w, l(0.250000) - iadd r2.xw, r2.xxxx, l(9, 0, 0, 729) - ld r8.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xw, r9.yyyw, l(16, 0, 0, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r2.wwwx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.z, r0.w -endif -mul r7.xyzw, r2.zzzz, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.x, r8.y, l(32), r8.x - imad r2.x, r8.z, l(1024), r2.x - imad r2.x, r8.w, l(0x00008000), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.z, r8.y, l(32), r8.x - imad r2.z, r8.z, l(1024), r2.z - ishl r2.w, r8.w, l(31) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r3.y, r2.z, r2.x - break - case l(4) - mov_sat r6.xyz, r6.xyzx - mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r2.x, r2.z, l(32), r2.x - imad r2.x, r2.w, l(2048), r2.x - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.z, r8.y, l(32), r8.x - ishl r2.w, r8.z, l(27) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r3.y, r2.z, r2.x - break - case l(5) - mov_sat r6.xyz, r6.xyzx - mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r2.x, r2.z, l(32), r2.x - imad r2.x, r2.w, l(1024), r2.x - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.z, r8.y, l(32), r8.x - ishl r2.w, r8.z, l(26) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r3.y, r2.z, r2.x - break - case l(10) - mov_sat r6.xy, r6.xyxx - mov_sat r6.zw, r7.xxxy - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.x, r8.y, l(256), r8.x - imad r2.x, r8.z, l(0x00010000), r2.x - imad r3.y, r8.w, l(0x01000000), r2.x - break - case l(15) - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.x, r8.y, l(16), r8.x - imad r2.x, r8.z, l(256), r2.x - imad r2.x, r8.w, l(4096), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.z, r8.y, l(16), r8.x - imad r2.z, r8.z, l(256), r2.z - ishl r2.w, r8.w, l(28) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r3.y, r2.z, r2.x - break - case l(24) - mov_sat r7.z, r6.x - mov_sat r7.x, r7.x - mad r2.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r2.xz, r2.xxzx - imad r3.y, r2.z, l(0x00010000), r2.x - break - default - f32tof16 r2.x, r6.x - f32tof16 r2.z, r7.x - imad r3.y, r2.z, l(0x00010000), r2.x - break -endswitch -if_nz r1.z - ishl r2.xz, r3.xxyx, l(8, 0, 8, 0) - and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r3.xy, r2.xzxx, r3.zwzz -endif -store_uav_typed U0[0].xyzw, r5.yyyy, r3.xyxx -iadd r2.xz, r1.wwww, l(1, 0, 2, 0) -ld r3.yw, r2.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xw, r3.yyyw, l(16, 0, 0, 16) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r2.wwwx - break - default - mov r3.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.x, r0.w, l(0.500000) - iadd r2.w, r1.w, l(721) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r3.xyzw, r6.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r2.x, r0.w, l(0.250000) - iadd r4.xy, r1.wwww, l(10, 730, 0, 0) - ld r6.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r3.ywxz, r6.ywxz - ld r7.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.x, r0.w -endif -mul r3.xyzw, r2.xxxx, r3.ywxz -if_nz r0.z - mov r3.xz, r3.zzxz -endif -ld r6.yw, r2.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r6.yywy, l(16, 0, 16, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.zzzx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.x, r0.w, l(0.500000) - iadd r2.z, r1.w, l(722) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r1.y, l(6) - if_nz r2.z - mul r2.x, r0.w, l(0.250000) - iadd r2.zw, r1.wwww, l(0, 0, 11, 731) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.x, r0.w -endif -mul r6.xyzw, r2.xxxx, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(3) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(1024), r1.w - imad r1.w, r7.w, l(0x00008000), r1.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.x, r7.y, l(32), r7.x - imad r2.x, r7.z, l(1024), r2.x - ishl r2.z, r7.w, l(31) - imad r2.x, r2.x, l(0x00010000), r2.z - iadd r4.x, r1.w, r2.x - break - case l(4) - mov_sat r3.xyz, r3.xyzx - mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r1.w, r2.z, l(32), r2.x - imad r1.w, r2.w, l(2048), r1.w - mov_sat r6.xyz, r6.xyzx - mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r2.x, r2.z, l(32), r2.x - ishl r2.z, r2.w, l(27) - imad r2.x, r2.x, l(0x00010000), r2.z - iadd r4.x, r1.w, r2.x - break - case l(5) - mov_sat r3.xyz, r3.xyzx - mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r1.w, r2.z, l(32), r2.x - imad r1.w, r2.w, l(1024), r1.w - mov_sat r6.xyz, r6.xyzx - mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r2.x, r2.z, l(32), r2.x - ishl r2.z, r2.w, l(26) - imad r2.x, r2.x, l(0x00010000), r2.z - iadd r4.x, r1.w, r2.x - break - case l(10) - mov_sat r3.xy, r3.xyxx - mov_sat r3.zw, r6.xxxy - mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(256), r7.x - imad r1.w, r7.z, l(0x00010000), r1.w - imad r4.x, r7.w, l(0x01000000), r1.w - break - case l(15) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(16), r7.x - imad r1.w, r7.z, l(256), r1.w - imad r1.w, r7.w, l(4096), r1.w - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.x, r7.y, l(16), r7.x - imad r2.x, r7.z, l(256), r2.x - ishl r2.z, r7.w, l(28) - imad r2.x, r2.x, l(0x00010000), r2.z - iadd r4.x, r1.w, r2.x - break - case l(24) - mov_sat r6.z, r3.x - mov_sat r6.x, r6.x - mad r2.xz, r6.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r2.xz, r2.xxzx - imad r4.x, r2.z, l(0x00010000), r2.x - break - default - f32tof16 r1.w, r3.x - f32tof16 r2.x, r6.x - imad r4.x, r2.x, l(0x00010000), r1.w - break -endswitch -iadd r1.w, r2.y, r0.y -iadd r2.xy, r1.wwww, l(3, 6, 0, 0) -ld r3.yw, r2.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r3.yywy, l(16, 0, 16, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r2.zzzx - break - default - mov r3.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.x, r0.w, l(0.500000) - iadd r2.z, r1.w, l(723) - ld r6.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r3.xyzw, r6.xyzw - uge r2.z, r1.y, l(6) - if_nz r2.z - mul r2.x, r0.w, l(0.250000) - iadd r2.zw, r1.wwww, l(0, 0, 12, 732) - ld r6.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r3.ywxz, r6.ywxz - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.x, r0.w -endif -mul r3.xyzw, r2.xxxx, r3.ywxz -if_nz r0.z - mov r3.xz, r3.zzxz -endif -iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) -ld r7.yw, r6.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.x, r0.w, l(0.500000) - iadd r2.z, r0.y, l(724) - ld r8.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r8.xyzw - uge r2.z, r1.y, l(6) - if_nz r2.z - mul r2.x, r0.w, l(0.250000) - iadd r2.zw, r0.yyyy, l(0, 0, 13, 733) - ld r8.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r5.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r7.ywxz, r8.ywxz - ld r9.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r9.yyyw, l(0, 0, 16, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r2.wwwz - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.x, r0.w -endif -mul r7.xyzw, r2.xxxx, r7.ywxz -if_nz r0.z - mov r7.xz, r7.zzxz -endif -switch r4.z - case l(3) - mov_sat r3.xyzw, r3.xyzw - mad r8.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.x, r8.y, l(32), r8.x - imad r2.x, r8.z, l(1024), r2.x - imad r2.x, r8.w, l(0x00008000), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.z, r8.y, l(32), r8.x - imad r2.z, r8.z, l(1024), r2.z - ishl r2.w, r8.w, l(31) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r4.y, r2.z, r2.x - break - case l(4) - mov_sat r3.xyz, r3.xyzx - mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r2.x, r2.z, l(32), r2.x - imad r2.x, r2.w, l(2048), r2.x - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.z, r8.y, l(32), r8.x - ishl r2.w, r8.z, l(27) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r4.y, r2.z, r2.x - break - case l(5) - mov_sat r3.xyz, r3.xyzx - mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r2.x, r2.z, l(32), r2.x - imad r2.x, r2.w, l(1024), r2.x - mov_sat r7.xyz, r7.xyzx - mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r2.z, r8.y, l(32), r8.x - ishl r2.w, r8.z, l(26) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r4.y, r2.z, r2.x - break - case l(10) - mov_sat r3.xy, r3.xyxx - mov_sat r3.zw, r7.xxxy - mad r8.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.x, r8.y, l(256), r8.x - imad r2.x, r8.z, l(0x00010000), r2.x - imad r4.y, r8.w, l(0x01000000), r2.x - break - case l(15) - mov_sat r3.xyzw, r3.xyzw - mad r8.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.x, r8.y, l(16), r8.x - imad r2.x, r8.z, l(256), r2.x - imad r2.x, r8.w, l(4096), r2.x - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r2.z, r8.y, l(16), r8.x - imad r2.z, r8.z, l(256), r2.z - ishl r2.w, r8.w, l(28) - imad r2.z, r2.z, l(0x00010000), r2.w - iadd r4.y, r2.z, r2.x - break - case l(24) - mov_sat r7.z, r3.x - mov_sat r7.x, r7.x - mad r2.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r2.xz, r2.xxzx - imad r4.y, r2.z, l(0x00010000), r2.x - break - default - f32tof16 r2.x, r3.x - f32tof16 r2.z, r7.x - imad r4.y, r2.z, l(0x00010000), r2.x - break -endswitch -if_nz r1.z - ishl r2.xz, r4.xxyx, l(8, 0, 8, 0) - and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r3.xy, r4.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r2.xzxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyxx -ld r3.yw, r6.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r3.yywy, l(16, 0, 16, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r2.zzzx - break - default - mov r3.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.x, r0.w, l(0.500000) - iadd r2.z, r0.y, l(725) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r3.xyzw, r7.xyzw - uge r2.z, r1.y, l(6) - if_nz r2.z - mul r2.x, r0.w, l(0.250000) - iadd r2.zw, r0.yyyy, l(0, 0, 14, 734) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r3.ywxz, r7.ywxz - ld r8.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r2.x, r0.w -endif -mul r3.xyzw, r2.xxxx, r3.ywxz -if_nz r0.z - mov r3.xz, r3.zzxz -endif -ld r2.yw, r2.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r2.xz, r2.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r2.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r2.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r2.ywyy, l(16, 16, 0, 0) - f16tof32 r2.xy, r2.wyww - f16tof32 r2.zw, r4.yyyx - break - default - mov r2.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r4.x, r0.w, l(0.500000) - iadd r4.y, r1.w, l(726) - ld r7.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r2.xyzw, r7.xyzw - uge r4.y, r1.y, l(6) - if_nz r4.y - mul r4.x, r0.w, l(0.250000) - iadd r5.xy, r1.wwww, l(15, 735, 0, 0) - ld r7.yw, r5.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r2.ywxz, r7.ywxz - ld r8.yw, r5.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r5.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r4.x, r0.w -endif -mul r2.xyzw, r2.ywxz, r4.xxxx -if_nz r0.z - mov r2.xz, r2.zzxz -endif -switch r4.z - case l(3) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(32), r7.x - imad r1.w, r7.z, l(1024), r1.w - imad r1.w, r7.w, l(0x00008000), r1.w - mov_sat r2.xyzw, r2.xyzw - mad r7.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r5.x, r7.y, l(32), r7.x - imad r5.x, r7.z, l(1024), r5.x - ishl r5.y, r7.w, l(31) - imad r5.x, r5.x, l(0x00010000), r5.y - iadd r4.x, r1.w, r5.x - break - case l(4) - mov_sat r3.xyz, r3.xyzx - mad r5.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r1.w, r5.y, l(32), r5.x - imad r1.w, r5.z, l(2048), r1.w - mov_sat r2.xyz, r2.xyzx - mad r5.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r5.x, r5.y, l(32), r5.x - ishl r5.y, r5.z, l(27) - imad r5.x, r5.x, l(0x00010000), r5.y - iadd r4.x, r1.w, r5.x - break - case l(5) - mov_sat r3.xyz, r3.xyzx - mad r5.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r1.w, r5.y, l(32), r5.x - imad r1.w, r5.z, l(1024), r1.w - mov_sat r2.xyz, r2.xyzx - mad r5.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r5.x, r5.y, l(32), r5.x - ishl r5.y, r5.z, l(26) - imad r5.x, r5.x, l(0x00010000), r5.y - iadd r4.x, r1.w, r5.x - break - case l(10) - mov_sat r3.xy, r3.xyxx - mov_sat r3.zw, r2.xxxy - mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(256), r7.x - imad r1.w, r7.z, l(0x00010000), r1.w - imad r4.x, r7.w, l(0x01000000), r1.w - break - case l(15) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.w, r7.y, l(16), r7.x - imad r1.w, r7.z, l(256), r1.w - imad r1.w, r7.w, l(4096), r1.w - mov_sat r2.xyzw, r2.xyzw - mad r7.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r2.y, r7.y, l(16), r7.x - imad r2.y, r7.z, l(256), r2.y - ishl r2.w, r7.w, l(28) - imad r2.y, r2.y, l(0x00010000), r2.w - iadd r4.x, r1.w, r2.y - break - case l(24) - mov_sat r2.z, r3.x - mov_sat r2.x, r2.x - mad r2.yz, r2.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r2.yz, r2.yyzy - imad r4.x, r2.z, l(0x00010000), r2.y - break - default - f32tof16 r1.w, r3.x - f32tof16 r2.x, r2.x - imad r4.x, r2.x, l(0x00010000), r1.w - break -endswitch -ld r2.yw, r6.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r2.xz, r2.yywy, l(16, 0, 16, 0) - ishr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - itof r3.xyzw, r3.xyzw - mul r3.xyzw, r3.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r2.xyzw, r3.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r2.ywyy, l(16, 16, 0, 0) - f16tof32 r2.xy, r2.wyww - f16tof32 r2.zw, r3.yyyx - break - default - mov r2.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r3.x, r0.y, l(727) - ld r3.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r5.yyyx - break - default - mov r3.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r2.xyzw, r3.xyzw - uge r3.x, r1.y, l(6) - if_nz r3.x - mul r1.w, r0.w, l(0.250000) - iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xz, r7.yywy, l(16, 0, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.zzzx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r2.ywxz, r7.ywxz - ld r3.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r5.yyyx - break - default - mov r3.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r3.xyzw, r7.zxwy - endif -else - mov r1.w, r0.w -endif -mul r2.xyzw, r1.wwww, r2.ywxz -if_nz r0.z - mov r2.xz, r2.zzxz -endif -ld r3.yw, r6.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r3.xz, r3.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) - f16tof32 r3.xy, r3.wyww - f16tof32 r3.zw, r5.yyyx - break - default - mov r3.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.x, r0.w, l(0.500000) - iadd r1.w, r0.y, l(728) - ld r6.yw, r1.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r3.xyzw, r6.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r0.w, r0.w, l(0.250000) - iadd r1.yw, r0.yyyy, l(0, 17, 0, 737) - ld r6.yw, r1.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r5.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r3.ywxz, r6.ywxz - ld r7.yw, r1.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.yw, r7.yyyw, l(0, 16, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r1.wwwy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r3.xyzw, r6.zxwy, r7.xyzw - else - mov r0.w, r1.x - endif -endif -mul r3.xyzw, r0.wwww, r3.ywxz -if_nz r0.z - mov r3.xz, r3.zzxz -endif -switch r4.z - case l(3) - mov_sat r2.xyzw, r2.xyzw - mad r6.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r0.y, r6.y, l(32), r6.x - imad r0.y, r6.z, l(1024), r0.y - imad r0.y, r6.w, l(0x00008000), r0.y - mov_sat r3.xyzw, r3.xyzw - mad r6.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r0.z, r6.y, l(32), r6.x - imad r0.z, r6.z, l(1024), r0.z - ishl r0.w, r6.w, l(31) - imad r0.z, r0.z, l(0x00010000), r0.w - iadd r4.y, r0.z, r0.y - break - case l(4) - mov_sat r2.xyz, r2.xyzx - mad r0.yzw, r2.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(32), r0.y - imad r0.y, r0.w, l(2048), r0.y - mov_sat r3.xyz, r3.xyzx - mad r1.xyw, r3.xyxz, l(31.000000, 63.000000, 0.000000, 31.000000), l(0.500000, 0.500000, 0.000000, 0.500000) - ftou r1.xyw, r1.xyxw - imad r0.z, r1.y, l(32), r1.x - ishl r0.w, r1.w, l(27) - imad r0.z, r0.z, l(0x00010000), r0.w - iadd r4.y, r0.z, r0.y - break - case l(5) - mov_sat r2.xyz, r2.xyzx - mad r0.yzw, r2.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(32), r0.y - imad r0.y, r0.w, l(1024), r0.y - mov_sat r3.xyz, r3.xyzx - mad r1.xyw, r3.xyxz, l(31.000000, 31.000000, 0.000000, 63.000000), l(0.500000, 0.500000, 0.000000, 0.500000) - ftou r1.xyw, r1.xyxw - imad r0.z, r1.y, l(32), r1.x - ishl r0.w, r1.w, l(26) - imad r0.z, r0.z, l(0x00010000), r0.w - iadd r4.y, r0.z, r0.y - break - case l(10) - mov_sat r2.xy, r2.xyxx - mov_sat r2.zw, r3.xxxy - mad r6.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r0.y, r6.y, l(256), r6.x - imad r0.y, r6.z, l(0x00010000), r0.y - imad r4.y, r6.w, l(0x01000000), r0.y - break - case l(15) - mov_sat r2.xyzw, r2.xyzw - mad r6.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r0.y, r6.y, l(16), r6.x - imad r0.y, r6.z, l(256), r0.y - imad r0.y, r6.w, l(4096), r0.y - mov_sat r3.xyzw, r3.xyzw - mad r6.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r0.z, r6.y, l(16), r6.x - imad r0.z, r6.z, l(256), r0.z - ishl r0.w, r6.w, l(28) - imad r0.z, r0.z, l(0x00010000), r0.w - iadd r4.y, r0.z, r0.y - break - case l(24) - mov_sat r3.z, r2.x - mov_sat r3.x, r3.x - mad r0.yz, r3.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r4.y, r0.z, l(0x00010000), r0.y - break - default - f32tof16 r0.y, r2.x - f32tof16 r0.z, r3.x - imad r4.y, r0.z, l(0x00010000), r0.y - break -endswitch -if_nz r1.z - ishl r0.yz, r4.xxyx, l(0, 8, 8, 0) - and r0.yz, r0.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r1.xy, r4.xyxx, l(8, 8, 0, 0) - and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r0.yzyy, r1.xyxx -endif -store_uav_typed U0[0].xyzw, r5.wwww, r4.xyxx -ret -// Approximately 4948 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.cso deleted file mode 100644 index eb954663e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h deleted file mode 100644 index f4c727bb5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h +++ /dev/null @@ -1,3183 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_32bpp_2xres.cs.hlsl -const uint8_t resolve_full_32bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xB0, 0x63, 0x4E, 0xF3, 0xDA, 0x52, 0x2B, 0x1C, - 0xBA, 0x24, 0x9C, 0x10, 0x15, 0x06, 0x14, 0x57, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x95, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x64, 0x94, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, - 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, - 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, - 0x52, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x43, 0x6F, 0x6E, 0x73, 0x74, - 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xAB, 0xAB, 0xD6, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x10, 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0x40, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x76, 0x08, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, 0xA4, 0x00, 0x00, 0x08, - 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x03, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0xD2, 0x04, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x85, 0x00, 0x00, 0x00, - 0xDE, 0x00, 0x00, 0x00, 0xA5, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF1, 0x00, 0x00, 0x00, - 0x41, 0x00, 0x00, 0x00, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.txt deleted file mode 100644 index 4bd180d33..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.txt +++ /dev/null @@ -1,1281 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 21 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].xzxz, l(1023, 0x01000000, 0x40000000, 8) -ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r4.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.zw, r3.yyyy, l(0, 0, 2, 1) -and r1.zw, r1.zzzw, l(0, 0, 1, 1) -ishl r1.xy, r1.xyxx, r1.zwzz -ushr r4.x, r4.y, l(1) -and r1.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r1.xy, r1.zwzz, r1.xyxx -udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) -movc r0.w, r3.z, l(1), l(0) -ishl r3.y, r1.z, r0.w -imad r2.x, r1.w, r2.x, r3.y -iadd r2.x, r2.x, r3.x -imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx -imad r1.x, r1.y, l(80), r1.x -ishl r0.w, r1.x, r0.w -imad r0.w, r2.x, l(1280), r0.w -ld r1.xyzw, r0.wwww, T0[0].xzyw -if_nz r3.z - iadd r2.x, r0.w, l(1) - ld r4.xyzw, r2.xxxx, T0[0].xzyw - switch r3.w - case l(5) - ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r1.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r1.xz, r8.zzwz - ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r4.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.xz, r1.xxzx - f16tof32 r5.yw, r8.xxxy - f16tof32 r6.xz, r1.yywy - f16tof32 r6.yw, r8.zzzw - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r7.xz, r4.xxzx - f16tof32 r7.yw, r8.xxxy - f16tof32 r1.zw, r4.wwwy - f16tof32 r1.xy, r8.zwzz - break - default - mov r5.xy, r1.xzxx - mov r5.zw, l(0,0,0,0) - mov r6.xy, r1.ywyy - mov r6.zw, l(0,0,0,0) - mov r7.xy, r4.xzxx - mov r7.zw, l(0,0,0,0) - mov r1.xw, r4.wwwy - mov r1.yz, l(0,0,0,0) - break - endswitch -else - switch r3.w - case l(0) - case l(1) - ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) - and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) - and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) - mov r8.x, r1.x - mov r8.yz, r4.xxyx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - utof r3.xy, r4.zwzz - ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) - mov r8.x, r1.z - mov r8.yz, r4.xxwx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r4.x, r1.y - and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r9.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r11.xyz, r9.xyzx - iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) - movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) - iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) - movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx - ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) - iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r9.xyzx, r4.xyzx - movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) - utof r8.xy, r4.xwxx - mov r4.x, r1.w - and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r10.xyzx, r4.xyzx - movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) - mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r5.w, r3.x - mov r6.w, r3.y - mov r7.w, r4.x - mov r1.y, r4.y - break - case l(4) - ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r8.xz, r4.xxyx - mov r8.yw, r1.xxxz - ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r1.xz, r4.zzwz - ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.x, r1.x - f16tof32 r5.y, r4.x - f16tof32 r6.x, r1.z - f16tof32 r6.y, r4.y - f16tof32 r7.x, r1.y - f16tof32 r7.y, r4.z - f16tof32 r1.w, r1.w - f16tof32 r1.x, r4.w - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - default - mov r5.x, r1.x - mov r5.yzw, l(0,0,0,0) - mov r6.x, r1.z - mov r6.yzw, l(0,0,0,0) - mov r7.x, r1.y - mov r7.yzw, l(0,0,0,0) - mov r1.xyz, l(0,0,0,0) - break - endswitch -endif -ibfe r2.x, l(6), l(16), CB0[0][0].z -ishl r2.x, r2.x, l(23) -iadd r2.x, r2.x, l(0x3f800000) -uge r3.x, r0.y, l(4) -if_nz r3.x - mul r3.x, r2.x, l(0.500000) - ishl r3.y, l(80), r3.z - iadd r3.y, r0.w, r3.y - ld r4.xyzw, r3.yyyy, T0[0].xzyw - if_nz r3.z - iadd r3.y, r0.w, l(161) - ld r8.xyzw, r3.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r4.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r12.zzwz - ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.xz, r4.xxzx - f16tof32 r9.yw, r12.xxxy - f16tof32 r10.xz, r4.yywy - f16tof32 r10.yw, r12.zzzw - ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r11.xz, r8.xxzx - f16tof32 r11.yw, r12.xxxy - f16tof32 r4.zw, r8.wwwy - f16tof32 r4.xy, r12.zwzz - break - default - mov r9.xy, r4.xzxx - mov r9.zw, l(0,0,0,0) - mov r10.xy, r4.ywyy - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.xzxx - mov r11.zw, l(0,0,0,0) - mov r4.xw, r8.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r12.x, r4.x - mov r12.yz, r8.xxyx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - utof r8.xy, r8.zwzz - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r13.x, r4.z - mov r13.yz, r12.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mov r12.x, r4.y - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r8.zw, r12.xxxw - mov r12.x, r4.w - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) - mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r9.w, r8.x - mov r10.w, r8.y - mov r11.w, r8.z - mov r4.y, r8.w - break - case l(4) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r12.xz, r8.xxyx - mov r12.yw, r4.xxxz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.x, r4.x - f16tof32 r9.y, r8.x - f16tof32 r10.x, r4.z - f16tof32 r10.y, r8.y - f16tof32 r11.x, r4.y - f16tof32 r11.y, r8.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r8.w - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r9.x, r4.x - mov r9.yzw, l(0,0,0,0) - mov r10.x, r4.z - mov r10.yzw, l(0,0,0,0) - mov r11.x, r4.y - mov r11.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r5.xyzw, r9.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - add r7.xyzw, r7.xyzw, r11.xyzw - add r1.xyzw, r1.xyzw, r4.xyzw - uge r0.y, r0.y, l(6) - if_nz r0.y - mul r2.x, r2.x, l(0.250000) - ishl r4.xy, l(1, 81, 0, 0), r3.zzzz - iadd r4.xy, r0.wwww, r4.xyxx - ld r8.xyzw, r4.xxxx, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(3) - ld r9.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r8.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r13.zzwz - ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r9.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r9.xz, r13.zzwz - ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.xz, r8.xxzx - f16tof32 r10.yw, r13.xxxy - f16tof32 r11.xz, r8.yywy - f16tof32 r11.yw, r13.zzzw - ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - f16tof32 r12.xz, r9.xxzx - f16tof32 r12.yw, r13.xxxy - f16tof32 r8.zw, r9.wwwy - f16tof32 r8.xy, r13.zwzz - break - default - mov r10.xy, r8.xzxx - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.ywyy - mov r11.zw, l(0,0,0,0) - mov r12.xy, r9.xzxx - mov r12.zw, l(0,0,0,0) - mov r8.xw, r9.wwwy - mov r8.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) - and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) - and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) - mov r13.x, r8.x - mov r13.yz, r9.xxyx - and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) - utof r4.xz, r9.zzwz - ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) - mov r13.x, r8.z - mov r13.yz, r9.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r9.x, r8.y - and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r14.xyzx, r9.xyzx - movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) - utof r13.xy, r9.xwxx - mov r9.x, r8.w - and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r15.xyzx, r9.xyzx - movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) - mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r10.w, r4.x - mov r11.w, r4.z - mov r12.w, r9.x - mov r8.y, r9.y - break - case l(4) - ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r9.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.xz, r9.zzwz - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.x, r8.x - f16tof32 r10.y, r9.x - f16tof32 r11.x, r8.z - f16tof32 r11.y, r9.y - f16tof32 r12.x, r8.y - f16tof32 r12.y, r9.z - f16tof32 r8.w, r8.w - f16tof32 r8.x, r9.w - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - default - mov r10.x, r8.x - mov r10.yzw, l(0,0,0,0) - mov r11.x, r8.z - mov r11.yzw, l(0,0,0,0) - mov r12.x, r8.y - mov r12.yzw, l(0,0,0,0) - mov r8.xyz, l(0,0,0,0) - break - endswitch - endif - add r9.xyzw, r5.xyzw, r10.xyzw - add r10.xyzw, r6.xyzw, r11.xyzw - add r11.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r1.wxzy, r8.wxzy - ld r4.xyzw, r4.yyyy, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(163) - ld r12.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r4.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r16.zzwz - ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r12.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r12.xz, r16.zzwz - ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.xz, r4.xxzx - f16tof32 r13.yw, r16.xxxy - f16tof32 r14.xz, r4.yywy - f16tof32 r14.yw, r16.zzzw - ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - f16tof32 r15.xz, r12.xxzx - f16tof32 r15.yw, r16.xxxy - f16tof32 r4.zw, r12.wwwy - f16tof32 r4.xy, r16.zwzz - break - default - mov r13.xy, r4.xzxx - mov r13.zw, l(0,0,0,0) - mov r14.xy, r4.ywyy - mov r14.zw, l(0,0,0,0) - mov r15.xy, r12.xzxx - mov r15.zw, l(0,0,0,0) - mov r4.xw, r12.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r16.x, r4.x - mov r16.yz, r12.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r0.yw, r12.zzzw - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r16.x, r4.z - mov r16.yz, r12.xxwx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r12.x, r4.y - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r16.xyzx, r12.xyzx - movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r3.yz, r12.xxwx - mov r12.x, r4.w - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r17.xyzx, r12.xyzx - movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r13.w, r0.y - mov r14.w, r0.w - mov r15.w, r3.y - mov r4.y, r3.z - break - case l(4) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r16.xz, r12.xxyx - mov r16.yw, r4.xxxz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.x, r4.x - f16tof32 r13.y, r12.x - f16tof32 r14.x, r4.z - f16tof32 r14.y, r12.y - f16tof32 r15.x, r4.y - f16tof32 r15.y, r12.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r12.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r13.x, r4.x - mov r13.yzw, l(0,0,0,0) - mov r14.x, r4.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r4.y - mov r15.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r9.xyzw, r13.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - add r7.xyzw, r11.xyzw, r15.xyzw - add r1.xyzw, r4.xyzw, r8.ywzx - else - mov r2.x, r3.x - endif -endif -mul r3.xyzw, r2.xxxx, r5.xyzw -mul r4.xyzw, r2.xxxx, r6.xyzw -mul r5.xyzw, r2.xxxx, r7.xyzw -mul r1.xyzw, r1.wxzy, r2.xxxx -if_nz r2.y - mov r3.xz, r3.zzxz - mov r4.xz, r4.zzxz - mov r6.xz, r5.zzxz - mov r1.xz, r1.zzxz -else - mov r6.xz, r5.xxzx -endif -ubfe r0.y, l(6), l(7), CB0[0][0].z -switch r0.y - case l(6) - case l(14) - case l(50) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r0.y, r7.y, l(256), r7.x - imad r0.y, r7.z, l(0x00010000), r0.y - imad r7.x, r7.w, l(0x01000000), r0.y - mov_sat r4.xyzw, r4.xyzw - mad r8.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(256), r8.x - imad r0.y, r8.z, l(0x00010000), r0.y - imad r7.y, r8.w, l(0x01000000), r0.y - mov r6.yw, r5.yyyw - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(256), r8.x - imad r0.y, r8.z, l(0x00010000), r0.y - imad r7.z, r8.w, l(0x01000000), r0.y - mov_sat r1.xyzw, r1.xyzw - mad r8.xyzw, r1.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(256), r8.x - imad r0.y, r8.z, l(0x00010000), r0.y - imad r1.x, r8.w, l(0x01000000), r0.y - mov r6.xyz, r7.zyxz - break - case l(7) - case l(54) - mov_sat r3.xyzw, r3.xyzw - mad r7.xyzw, r3.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r0.y, r7.y, l(1024), r7.x - imad r0.y, r7.z, l(0x00100000), r0.y - imad r7.x, r7.w, l(0x40000000), r0.y - mov_sat r4.xyzw, r4.xyzw - mad r8.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(1024), r8.x - imad r0.y, r8.z, l(0x00100000), r0.y - imad r7.y, r8.w, l(0x40000000), r0.y - mov_sat r5.xz, r6.xxzx - mov_sat r5.yw, r5.yyyw - mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(1024), r8.x - imad r0.y, r8.z, l(0x00100000), r0.y - imad r7.z, r8.w, l(0x40000000), r0.y - mov_sat r1.xyzw, r1.xyzw - mad r8.xyzw, r1.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(1024), r8.x - imad r0.y, r8.z, l(0x00100000), r0.y - imad r1.x, r8.w, l(0x40000000), r0.y - mov r6.xyz, r7.zyxz - break - case l(16) - case l(55) - mov_sat r3.xyz, r3.xyzx - mad r7.xyz, r3.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r0.y, r7.y, l(2048), r7.x - imad r7.x, r7.z, l(0x00400000), r0.y - mov_sat r4.xyz, r4.xyzx - mad r8.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r0.y, r8.y, l(2048), r8.x - imad r7.y, r8.z, l(0x00400000), r0.y - mov_sat r5.xz, r6.xxzx - mov_sat r5.y, r5.y - mad r8.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r0.y, r8.y, l(2048), r8.x - imad r7.z, r8.z, l(0x00400000), r0.y - mov_sat r1.xyz, r1.xyzx - mad r8.xyz, r1.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r0.y, r8.y, l(2048), r8.x - imad r1.x, r8.z, l(0x00400000), r0.y - mov r6.xyz, r7.zyxz - break - case l(17) - case l(56) - mov_sat r3.xyz, r3.xyzx - mad r7.xyz, r3.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r0.y, r7.y, l(1024), r7.x - imad r7.x, r7.z, l(0x00200000), r0.y - mov_sat r4.xyz, r4.xyzx - mad r8.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r0.y, r8.y, l(1024), r8.x - imad r7.y, r8.z, l(0x00200000), r0.y - mov_sat r5.xz, r6.xxzx - mov_sat r5.y, r5.y - mad r8.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r0.y, r8.y, l(1024), r8.x - imad r7.z, r8.z, l(0x00200000), r0.y - mov_sat r1.xyz, r1.xyzx - mad r8.xyz, r1.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r0.y, r8.y, l(1024), r8.x - imad r1.x, r8.z, l(0x00200000), r0.y - mov r6.xyz, r7.zyxz - break - case l(25) - mov_sat r3.xy, r3.xyxx - mad r0.yw, r3.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) - ftou r0.yw, r0.yyyw - imad r6.z, r0.w, l(0x00010000), r0.y - mov_sat r4.xy, r4.xyxx - mad r0.yw, r4.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) - ftou r0.yw, r0.yyyw - imad r6.y, r0.w, l(0x00010000), r0.y - mov_sat r5.x, r6.x - mov_sat r5.y, r5.y - mad r0.yw, r5.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) - ftou r0.yw, r0.yyyw - imad r6.x, r0.w, l(0x00010000), r0.y - mov_sat r1.xy, r1.xyxx - mad r0.yw, r1.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) - ftou r0.yw, r0.yyyw - imad r1.x, r0.w, l(0x00010000), r0.y - break - case l(31) - f32tof16 r7.x, r3.x - f32tof16 r7.y, r4.x - f32tof16 r7.z, r6.x - f32tof16 r7.w, r1.x - f32tof16 r8.x, r3.y - f32tof16 r8.y, r4.y - f32tof16 r8.z, r5.y - f32tof16 r8.w, r1.y - imad r1.xyzw, r8.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r7.wyxz - mov r6.xyz, r1.wyzw - break - default - mov r6.z, r3.x - mov r6.y, r4.x - break -endswitch -if_nz r2.z - if_z vThreadID.x - mov r6.w, r6.y - mov r1.w, r1.x - else - mov r6.w, r6.z - mov r1.w, r6.x - endif - if_z vThreadID.y - mov r1.yz, r1.xxwx - else - mov r1.yz, r6.yywy - endif -else - mov r1.yzw, r6.yyzx -endif -bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, vThreadID.xyyx -bfi r2.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r2.w - ubfe r2.y, l(3), l(4), CB0[0][0].z - ushr r2.z, CB0[0][0].w, l(10) - ishl r2.z, r2.z, l(5) - ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r2.w, r2.y, l(2) - ushr r2.z, r2.z, l(4) - and r2.z, r2.z, l(0x00007ffe) - imad r2.z, r2.w, r2.z, r3.x - ushr r3.x, r2.x, l(5) - imad r2.z, r2.z, r3.x, r3.y - ishl r3.x, r0.z, l(10) - and r3.x, r3.x, l(6144) - bfi r3.x, l(3), l(8), r0.w, r3.x - ishr r3.x, r3.x, l(6) - iadd r2.w, r2.w, r3.z - bfi r3.y, l(1), l(1), r2.w, l(0) - iadd r3.y, r3.y, r3.w - bfi r3.y, l(2), l(1), r3.y, l(0) - bfi r2.w, l(1), l(0), r2.w, r3.y - and r3.y, r3.x, l(112) - bfi r3.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r2.zzzz, l(0, 0, 0, 0) - imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz - bfi r3.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r3.xxxx, r3.yzyy - bfi r2.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r2.yyyy, r3.xxyx - ubfe r3.x, l(3), l(6), r2.y - and r3.y, r2.w, l(6) - bfi r2.w, l(1), l(8), r2.w, l(0) - imad r2.w, r3.x, l(32), r2.w - imad r2.w, r3.y, l(4), r2.w - bfi r2.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r2.yyzy - bfi r2.z, l(9), l(3), r2.w, r2.z - bfi r2.y, l(6), l(0), r2.y, r2.z -else - ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r2.x, l(5) - imad r0.x, r3.y, r0.x, r3.x - ishl r2.xz, r0.zzzz, l(4, 0, 7, 0) - and r2.xz, r2.xxzx, l(224, 0, 2048, 0) - bfi r0.y, l(3), l(2), r0.w, r2.x - ishl r2.x, r2.x, l(1) - bfi r0.w, l(3), l(3), r0.w, r2.x - and r0.w, r0.w, l(480) - bfi r2.x, l(23), l(9), r0.x, r0.w - bfi r2.x, l(4), l(0), r0.y, r2.x - bfi r2.x, l(1), l(4), r0.z, r2.x - ishl r3.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r2.z, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r3.z, l(2) - iadd r0.y, r3.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r2.y, l(6), l(0), r2.x, r0.x -endif -ushr r0.x, r2.y, l(2) -and r0.y, CB0[0][0].z, l(7) -ieq r0.yzw, r0.yyyy, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r2.xyzw, r1.zywx, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.zywx, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.wyxz, r3.wyxz -endif -if_nz r0.z - ushr r2.xyzw, r1.zywx, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.wyxz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r1.zywx -ret -// Approximately 1234 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.cso deleted file mode 100644 index c305b197f..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.h deleted file mode 100644 index 54f021001..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.h +++ /dev/null @@ -1,3374 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_32bpp.cs.hlsl -const uint8_t resolve_full_32bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC9, 0xA5, 0x06, 0x35, 0x38, 0x6C, 0xB4, 0xC6, - 0x18, 0xFD, 0xA3, 0xAF, 0x04, 0x8C, 0xB5, 0x24, 0x01, 0x00, 0x00, 0x00, - 0xF4, 0x9D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 0x00, - 0x58, 0x9D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x6C, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 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HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 23 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].xzzz, l(1023, 0x01000000, 8, 7) -ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r2.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r2.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -movc r1.w, r4.z, l(1), l(0) -ishl r2.w, r5.x, r1.w -imad r2.w, r5.y, r3.x, r2.w -iadd r2.w, r2.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r1.w, r2.x, r1.w -imad r1.w, r2.w, l(1280), r1.w -iadd r2.x, r2.z, r4.z -ishl r2.y, l(4), r2.x -ishl r1.w, r1.w, l(2) -if_nz r4.z - ieq r2.z, r2.y, l(8) - if_nz r2.z - ld_raw r5.xyzw, r1.w, T0[0].zwxy - iadd r2.z, r1.w, l(16) - ld_raw r6.xyzw, r2.z, T0[0].zwxy - mov r7.xy, r5.zwzz - mov r8.xy, r6.zwzz - else - ld_raw r7.xy, r1.w, T0[0].xyxx - iadd r2.z, r2.y, r1.w - ld_raw r5.xy, r2.z, T0[0].xyxx - ishl r2.zw, l(0, 0, 8, 12), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r8.xy, r2.z, T0[0].xyxx - ld_raw r6.xy, r2.w, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r5.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r6.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.xxxy, l(0, 0, 16, 16) - f16tof32 r7.xz, r7.xxyx - f16tof32 r7.yw, r2.zzzw - ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) - f16tof32 r5.xz, r5.xxyx - f16tof32 r5.yw, r2.zzzw - ushr r2.zw, r8.xxxy, l(0, 0, 16, 16) - f16tof32 r8.xz, r8.xxyx - f16tof32 r8.yw, r2.zzzw - ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) - f16tof32 r6.xz, r6.xxyx - f16tof32 r6.yw, r2.zzzw - break - default - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - endswitch -else - ieq r2.z, r2.y, l(4) - if_nz r2.z - ld_raw r6.xyzw, r1.w, T0[0].wxyz - else - ld_raw r6.y, r1.w, T0[0].xxxx - iadd r2.z, r2.y, r1.w - ld_raw r6.z, r2.z, T0[0].xxxx - ishl r2.zw, l(0, 0, 8, 12), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r6.w, r2.z, T0[0].xxxx - ld_raw r6.x, r2.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r9.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r9.x, r6.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r9.x, r6.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r6.wwww, l(0, 8, 16, 24) - mov r9.x, r6.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r9.x, r6.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r9.x, r6.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r6.wwww, l(0, 10, 20, 30) - mov r9.x, r6.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r10.x, r6.y - mov r10.yz, r9.xxyx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - utof r2.zw, r9.zzzw - ushr r9.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r10.x, r6.z - mov r10.yz, r9.xxwx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r5.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r9.x, r6.w - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r4.xy, r9.xwxx - mov r9.x, r6.x - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r6.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r7.w, r2.z - mov r5.w, r2.w - mov r8.w, r4.x - mov r6.w, r4.y - break - case l(4) - ishl r9.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r6.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r9.zzwz - ishr r9.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r6.y - f16tof32 r7.y, r9.x - f16tof32 r5.x, r6.z - f16tof32 r5.y, r9.y - f16tof32 r8.x, r6.w - f16tof32 r8.y, r9.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r9.w - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r6.y - mov r7.yzw, l(0,0,0,0) - mov r5.x, r6.z - mov r5.yzw, l(0,0,0,0) - mov r8.x, r6.w - mov r8.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break - endswitch -endif -ibfe r2.z, l(6), l(16), CB0[0][0].z -ishl r2.z, r2.z, l(23) -iadd r2.z, r2.z, l(0x3f800000) -uge r2.w, r1.y, l(4) -if_nz r2.w - mul r2.w, r2.z, l(0.500000) - ishl r3.x, l(320), r4.z - iadd r3.x, r1.w, r3.x - if_nz r4.z - ieq r4.x, r2.y, l(8) - if_nz r4.x - ld_raw r9.xyzw, r3.x, T0[0].zwxy - iadd r4.x, r3.x, l(16) - ld_raw r10.xyzw, r4.x, T0[0].zwxy - mov r11.xy, r9.zwzz - mov r12.xy, r10.zwzz - else - ld_raw r11.xy, r3.x, T0[0].xyxx - iadd r4.x, r2.y, r3.x - ld_raw r9.xy, r4.x, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r3.xxxx, r4.xyxx - ld_raw r12.xy, r4.x, T0[0].xyxx - ld_raw r10.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) - f16tof32 r11.xz, r11.xxyx - f16tof32 r11.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) - f16tof32 r12.xz, r12.xxyx - f16tof32 r12.yw, r4.xxxy - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - break - default - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - endswitch - else - ieq r4.x, r2.y, l(4) - if_nz r4.x - ld_raw r10.xyzw, r3.x, T0[0].wxyz - else - ld_raw r10.y, r3.x, T0[0].xxxx - iadd r4.x, r2.y, r3.x - ld_raw r10.z, r4.x, T0[0].xxxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r3.xxxx, r4.xyxx - ld_raw r10.w, r4.x, T0[0].xxxx - ld_raw r10.x, r4.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r14.x, r10.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r4.xy, r13.zwzz - ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r14.x, r10.z - mov r14.yz, r13.xxwx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r13.x, r10.w - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r14.xy, r13.xwxx - mov r13.x, r10.x - and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r16.xyzx, r13.xyzx - movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) - mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r4.x - mov r9.w, r4.y - mov r12.w, r13.x - mov r10.w, r13.y - break - case l(4) - ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r10.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r13.zzwz - ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r13.x - f16tof32 r9.x, r10.z - f16tof32 r9.y, r13.y - f16tof32 r12.x, r10.w - f16tof32 r12.y, r13.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r13.w - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r9.x, r10.z - mov r9.yzw, l(0,0,0,0) - mov r12.x, r10.w - mov r12.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - endif - add r7.xyzw, r7.xyzw, r11.xyzw - add r5.xyzw, r5.xyzw, r9.xyzw - add r8.xyzw, r8.xyzw, r12.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r2.z, r2.z, l(0.250000) - ishl r4.xy, l(4, 324, 0, 0), r4.zzzz - iadd r1.yw, r1.wwww, r4.xxxy - if_nz r4.z - ieq r3.x, r2.y, l(8) - if_nz r3.x - ld_raw r9.xyzw, r1.y, T0[0].zwxy - iadd r3.x, r1.y, l(16) - ld_raw r10.xyzw, r3.x, T0[0].zwxy - mov r11.xy, r9.zwzz - mov r12.xy, r10.zwzz - else - ld_raw r11.xy, r1.y, T0[0].xyxx - iadd r3.x, r2.y, r1.y - ld_raw r9.xy, r3.x, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r12.xy, r4.x, T0[0].xyxx - ld_raw r10.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) - f16tof32 r11.xz, r11.xxyx - f16tof32 r11.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) - f16tof32 r12.xz, r12.xxyx - f16tof32 r12.yw, r4.xxxy - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - break - default - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - endswitch - else - ieq r3.x, r2.y, l(4) - if_nz r3.x - ld_raw r10.xyzw, r1.y, T0[0].wxyz - else - ld_raw r10.y, r1.y, T0[0].xxxx - iadd r3.x, r2.y, r1.y - ld_raw r10.z, r3.x, T0[0].xxxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r10.w, r4.x, T0[0].xxxx - ld_raw r10.x, r4.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r14.x, r10.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r4.xy, r13.zwzz - ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r14.x, r10.z - mov r14.yz, r13.xxwx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r13.x, r10.w - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r14.xy, r13.xwxx - mov r13.x, r10.x - and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r16.xyzx, r13.xyzx - movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) - mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r4.x - mov r9.w, r4.y - mov r12.w, r13.x - mov r10.w, r13.y - break - case l(4) - ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r10.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r13.zzwz - ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r13.x - f16tof32 r9.x, r10.z - f16tof32 r9.y, r13.y - f16tof32 r12.x, r10.w - f16tof32 r12.y, r13.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r13.w - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r9.x, r10.z - mov r9.yzw, l(0,0,0,0) - mov r12.x, r10.w - mov r12.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - endif - add r11.xyzw, r7.xyzw, r11.xyzw - add r9.xyzw, r5.xyzw, r9.xyzw - add r12.xyzw, r8.xyzw, r12.xyzw - add r10.xyzw, r6.xyzw, r10.xyzw - if_nz r4.z - ieq r1.y, r2.y, l(8) - if_nz r1.y - ld_raw r13.xyzw, r1.w, T0[0].zwxy - iadd r1.y, r1.w, l(16) - ld_raw r14.xyzw, r1.y, T0[0].zwxy - mov r15.xy, r13.zwzz - mov r16.xy, r14.zwzz - else - ld_raw r15.xy, r1.w, T0[0].xyxx - iadd r1.y, r2.y, r1.w - ld_raw r13.xy, r1.y, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.wwww, r4.xyxx - ld_raw r16.xy, r4.x, T0[0].xyxx - ld_raw r14.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r15.zw, r15.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r15.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.zw, r13.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r13.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.zw, r16.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r16.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r14.zw, r14.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r14.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r15.xyxx, l(16, 16, 0, 0) - f16tof32 r15.xz, r15.xxyx - f16tof32 r15.yw, r4.xxxy - ushr r4.xy, r13.xyxx, l(16, 16, 0, 0) - f16tof32 r13.xz, r13.xxyx - f16tof32 r13.yw, r4.xxxy - ushr r4.xy, r16.xyxx, l(16, 16, 0, 0) - f16tof32 r16.xz, r16.xxyx - f16tof32 r16.yw, r4.xxxy - ushr r4.xy, r14.xyxx, l(16, 16, 0, 0) - f16tof32 r14.xz, r14.xxyx - f16tof32 r14.yw, r4.xxxy - break - default - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - endswitch - else - ieq r1.y, r2.y, l(4) - if_nz r1.y - ld_raw r14.xyzw, r1.w, T0[0].wxyz - else - ld_raw r14.y, r1.w, T0[0].xxxx - iadd r1.y, r2.y, r1.w - ld_raw r14.z, r1.y, T0[0].xxxx - ishl r2.xy, l(8, 12, 0, 0), r2.xxxx - iadd r1.yw, r1.wwww, r2.xxxy - ld_raw r14.w, r1.y, T0[0].xxxx - ld_raw r14.x, r1.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r4.yzw, r14.yyyy, l(0, 8, 16, 24) - mov r4.x, r14.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r14.zzzz, l(0, 8, 16, 24) - mov r4.x, r14.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r13.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r14.wwww, l(0, 8, 16, 24) - mov r4.x, r14.w - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r16.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r4.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r14.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r14.yyyy, l(0, 10, 20, 30) - mov r4.x, r14.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r14.zzzz, l(0, 10, 20, 30) - mov r4.x, r14.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r13.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r14.wwww, l(0, 10, 20, 30) - mov r4.x, r14.w - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r16.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r4.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r14.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r4.xyzw, r14.yyyz, l(10, 20, 30, 30) - mov r17.x, r14.y - mov r17.yz, r4.xxyx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r15.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - utof r1.yw, r4.zzzw - ushr r4.xyzw, r14.zwwz, l(10, 10, 20, 20) - mov r17.x, r14.z - mov r17.yz, r4.xxwx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r4.x, r14.w - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r16.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r14.wxxx, l(30, 10, 20, 30) - utof r2.xy, r4.xwxx - mov r4.x, r14.x - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r15.w, r1.y - mov r13.w, r1.w - mov r16.w, r2.x - mov r14.w, r2.y - break - case l(4) - ishl r4.xyzw, r14.yzwx, l(16, 16, 16, 16) - mov r17.xz, r4.xxyx - mov r17.yw, r14.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.yz, r4.zzwz - ishr r4.xyzw, r14.ywzx, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r4.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r14.yzwx, l(16, 16, 16, 16) - f16tof32 r15.x, r14.y - f16tof32 r15.y, r4.x - f16tof32 r13.x, r14.z - f16tof32 r13.y, r4.y - f16tof32 r16.x, r14.w - f16tof32 r16.y, r4.z - f16tof32 r14.x, r14.x - f16tof32 r14.y, r4.w - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r15.x, r14.y - mov r15.yzw, l(0,0,0,0) - mov r13.x, r14.z - mov r13.yzw, l(0,0,0,0) - mov r16.x, r14.w - mov r16.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - endif - add r7.xyzw, r11.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r13.xyzw - add r8.xyzw, r12.xyzw, r16.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - else - mov r2.z, r2.w - endif -endif -mul r4.xyzw, r2.zzzz, r7.xyzw -mul r5.xyzw, r2.zzzz, r5.xyzw -mul r7.xyzw, r2.zzzz, r8.xyzw -mul r2.xyzw, r2.zzzz, r6.xyzw -if_nz r3.y - mov r4.xz, r4.zzxz - mov r5.xz, r5.zzxz - mov r7.xz, r7.zzxz - mov r6.xz, r2.zzxz -else - mov r6.xz, r2.xxzx -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.z - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r8.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r8.x - ushr r3.x, r1.x, l(5) - imad r1.z, r1.z, r3.x, r8.y - ishl r3.x, r0.z, l(10) - and r3.x, r3.x, l(6144) - bfi r3.x, l(3), l(8), r0.w, r3.x - ishr r3.x, r3.x, l(6) - iadd r1.w, r1.w, r8.z - bfi r3.y, l(1), l(1), r1.w, l(0) - iadd r3.y, r3.y, r8.w - bfi r3.y, l(2), l(1), r3.y, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.y - bfi r3.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r1.zzzz, l(0, 0, 0, 0) - imad r3.xy, r3.xxxx, l(2, 16, 0, 0), r3.yzyy - bfi r1.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r1.yyyy, r3.xxyx - bfi r3.x, l(1), l(4), r0.z, l(0) - ubfe r3.y, l(3), l(6), r1.y - and r3.z, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.y, l(32), r1.w - imad r1.w, r3.z, l(4), r1.w - bfi r1.yz, l(0, 5, 5, 0), l(0, 0, 3, 0), r3.xxxx, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r8.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r8.y, r0.x, r8.x - ishl r1.xz, r0.zzzz, l(5, 0, 7, 0) - and r1.xz, r1.xxzx, l(448, 0, 2048, 0) - bfi r0.y, l(3), l(3), r0.w, r1.x - bfi r0.y, l(23), l(9), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r0.y, r0.y, r0.z - ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) - bfi r1.xw, l(3, 0, 0, 3), l(6, 0, 0, 5), r0.wwww, r1.xxxw - bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r1.xxxw - imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.z, r0.z, l(1792) - iadd r0.x, r0.x, r0.z - and r0.z, r8.z, l(2) - iadd r0.z, r8.w, r0.z - bfi r0.z, l(2), l(6), r0.z, l(0) - iadd r0.x, r0.x, r0.z - bfi r1.y, l(6), l(0), r0.y, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ubfe r0.y, l(6), l(7), CB0[0][0].z -switch r0.y - case l(6) - case l(14) - case l(50) - mov_sat r4.xyzw, r4.xyzw - mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.y, r1.y, l(256), r1.x - imad r0.y, r1.z, l(0x00010000), r0.y - imad r1.x, r1.w, l(0x01000000), r0.y - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(256), r8.x - imad r0.y, r8.z, l(0x00010000), r0.y - imad r1.y, r8.w, l(0x01000000), r0.y - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(256), r8.x - imad r0.y, r8.z, l(0x00010000), r0.y - imad r1.z, r8.w, l(0x01000000), r0.y - mov r6.yw, r2.yyyw - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(256), r8.x - imad r0.y, r8.z, l(0x00010000), r0.y - imad r1.w, r8.w, l(0x01000000), r0.y - mov r6.xyzw, r1.wyxz - break - case l(7) - case l(54) - mov_sat r4.xyzw, r4.xyzw - mad r1.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r0.y, r1.y, l(1024), r1.x - imad r0.y, r1.z, l(0x00100000), r0.y - imad r1.x, r1.w, l(0x40000000), r0.y - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(1024), r8.x - imad r0.y, r8.z, l(0x00100000), r0.y - imad r1.y, r8.w, l(0x40000000), r0.y - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(1024), r8.x - imad r0.y, r8.z, l(0x00100000), r0.y - imad r1.z, r8.w, l(0x40000000), r0.y - mov_sat r2.xz, r6.xxzx - mov_sat r2.yw, r2.yyyw - mad r8.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r0.y, r8.y, l(1024), r8.x - imad r0.y, r8.z, l(0x00100000), r0.y - imad r1.w, r8.w, l(0x40000000), r0.y - mov r6.xyzw, r1.wyxz - break - case l(16) - case l(55) - mov_sat r4.xyz, r4.xyzx - mad r0.yzw, r4.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(2048), r0.y - imad r1.x, r0.w, l(0x00400000), r0.y - mov_sat r5.xyz, r5.xyzx - mad r0.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(2048), r0.y - imad r1.y, r0.w, l(0x00400000), r0.y - mov_sat r7.xyz, r7.xyzx - mad r0.yzw, r7.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(2048), r0.y - imad r1.z, r0.w, l(0x00400000), r0.y - mov_sat r2.xz, r6.xxzx - mov_sat r2.y, r2.y - mad r0.yzw, r2.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(2048), r0.y - imad r1.w, r0.w, l(0x00400000), r0.y - mov r6.xyzw, r1.wyxz - break - case l(17) - case l(56) - mov_sat r4.xyz, r4.xyzx - mad r0.yzw, r4.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(1024), r0.y - imad r1.x, r0.w, l(0x00200000), r0.y - mov_sat r5.xyz, r5.xyzx - mad r0.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(1024), r0.y - imad r1.y, r0.w, l(0x00200000), r0.y - mov_sat r7.xyz, r7.xyzx - mad r0.yzw, r7.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(1024), r0.y - imad r1.z, r0.w, l(0x00200000), r0.y - mov_sat r2.xz, r6.xxzx - mov_sat r2.y, r2.y - mad r0.yzw, r2.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(1024), r0.y - imad r1.w, r0.w, l(0x00200000), r0.y - mov r6.xyzw, r1.wyxz - break - case l(25) - mov_sat r4.xy, r4.xyxx - mad r0.yz, r4.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r6.z, r0.z, l(0x00010000), r0.y - mov_sat r5.xy, r5.xyxx - mad r0.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r6.y, r0.z, l(0x00010000), r0.y - mov_sat r7.xy, r7.xyxx - mad r0.yz, r7.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r6.w, r0.z, l(0x00010000), r0.y - mov_sat r2.x, r6.x - mov_sat r2.y, r2.y - mad r0.yz, r2.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r6.x, r0.z, l(0x00010000), r0.y - break - case l(31) - f32tof16 r1.x, r4.x - f32tof16 r1.y, r5.x - f32tof16 r1.z, r7.x - f32tof16 r1.w, r6.x - f32tof16 r8.x, r4.y - f32tof16 r8.y, r5.y - f32tof16 r8.z, r7.y - f32tof16 r8.w, r2.y - imad r6.xyzw, r8.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r1.wyxz - break - default - mov r6.z, r4.x - mov r6.y, r5.x - mov r6.w, r7.x - break -endswitch -ieq r0.yzw, r3.wwww, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r6.zywx, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r2.xyzw, r6.zywx, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r1.wyxz, r2.wyxz -endif -if_nz r0.z - ushr r1.xyzw, r6.zywx, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r1.wyxz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r6.zywx -ret -// Approximately 1302 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.cso deleted file mode 100644 index 5aa75b51c..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.h deleted file mode 100644 index dcdf786c6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.h +++ /dev/null @@ -1,10935 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_32bpp_from_32bpp_3xres.cs.hlsl -const uint8_t resolve_full_32bpp_from_32bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x18, 0x69, 0xD5, 0xC6, 0x71, 0xE8, 0xB5, 0xE5, - 0xAD, 0x9A, 0x3C, 0x10, 0x9D, 0x58, 0xE3, 0x83, 0x01, 0x00, 0x00, 0x00, - 0x60, 0x00, 0x02, 0x00, 0x05, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5, 0x02, 0x00, 0x00, - 0x23, 0x01, 0x00, 0x00, 0x3A, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.txt deleted file mode 100644 index c55d91dd5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.txt +++ /dev/null @@ -1,4171 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 28 -dcl_thread_group 8, 8, 1 -ishl r0.x, vThreadID.x, l(1) -ushr r0.z, CB0[0][0].y, l(7) -bfi r0.z, l(11), l(3), r0.z, l(0) -uge r0.z, r0.x, r0.z -if_nz r0.z - ret -endif -and r1.xyzw, CB0[0][0].xzzx, l(0x40000000, 7, 8, 1023) -mov r0.y, vThreadID.y -ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) -movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) -ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r2.z, CB0[0][0].y -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) -iadd r3.xyzw, r0.xyyx, r3.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r1.z - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) - ishr r5.x, r1.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r5.x, r2.w, r4.x - ushr r4.x, r1.x, l(5) - imad r2.w, r2.w, r4.x, r4.y - ishl r4.x, r3.z, l(10) - and r4.x, r4.x, l(6144) - bfi r4.x, l(3), l(8), r3.w, r4.x - ishr r4.x, r4.x, l(6) - iadd r4.y, r4.z, r5.x - bfi r4.z, l(1), l(1), r4.y, l(0) - iadd r4.z, r4.z, r4.w - bfi r4.z, l(2), l(1), r4.z, l(0) - bfi r4.y, l(1), l(0), r4.y, r4.z - and r4.z, r4.x, l(112) - bfi r5.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy - bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz - bfi r4.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), r1.zzzz, r4.xxzx - ubfe r1.z, l(3), l(6), r4.x - and r2.w, r4.y, l(6) - bfi r4.y, l(1), l(8), r4.y, l(0) - imad r1.z, r1.z, l(32), r4.y - imad r1.z, r2.w, l(4), r1.z - bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xzxx - bfi r1.z, l(9), l(3), r1.z, r4.y - bfi r1.z, l(6), l(0), r4.x, r1.z -else - ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) - ushr r1.x, r1.x, l(5) - imad r1.x, r4.y, r1.x, r4.x - ishl r3.xy, r3.zzzz, l(4, 7, 0, 0) - and r3.xy, r3.xyxx, l(224, 2048, 0, 0) - bfi r2.w, l(3), l(2), r3.w, r3.x - ishl r3.x, r3.x, l(1) - bfi r3.x, l(3), l(3), r3.w, r3.x - and r3.x, r3.x, l(480) - bfi r3.w, l(23), l(9), r1.x, r3.x - bfi r3.w, l(4), l(0), r2.w, r3.w - bfi r3.w, l(1), l(4), r3.z, r3.w - ishl r4.xy, r3.xxxx, l(3, 2, 0, 0) - bfi r4.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.xxxx, r4.xyxx - bfi r4.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r2.wwww, r4.xyxx - bfi r3.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r3.zzzz, r4.xxyx - bfi r1.x, l(12), l(0), r3.y, r3.x - and r2.w, r3.z, l(1792) - iadd r1.x, r1.x, r2.w - and r2.w, r4.z, l(2) - iadd r2.w, r4.w, r2.w - bfi r2.w, l(2), l(6), r2.w, l(0) - iadd r1.x, r1.x, r2.w - bfi r1.z, l(6), l(0), r3.w, r1.x -endif -imul null, r1.x, r1.z, l(9) -ushr r1.x, r1.x, l(3) -bfi r2.xz, l(5, 0, 2, 0), l(3, 0, 3, 0), r2.zzxz, l(0, 0, 0, 0) -iadd r0.xy, r0.xyxx, r2.xzxx -ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx -uge r1.z, l(3), r2.y -if_nz r1.z - mov r4.y, r2.y -else - ieq r1.z, r2.y, l(5) - if_nz r1.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r2.xz, r3.zzzz, l(2, 0, 1, 0) -and r2.zw, r2.xxxz, l(0, 0, 1, 1) -ishl r0.xy, r0.xyxx, r2.zwzz -ushr r4.x, r4.y, l(1) -and r2.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r0.xy, r0.xyxx, r2.zwzz -udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) -movc r1.z, r3.w, l(1), l(0) -ishl r3.z, r2.z, r1.z -imad r1.w, r2.w, r1.w, r3.z -iadd r1.w, r1.w, r3.y -imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx -imad r0.x, r0.y, l(80), r0.x -ishl r0.x, r0.x, r1.z -imad r0.x, r1.w, l(1280), r0.x -imul null, r0.y, r0.x, l(36) -ubfe r1.z, l(4), l(25), CB0[0][0].x -ld_raw r4.xyzw, r0.y, T0[0].wxyz -imad r2.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 16, 20) -ld_raw r5.x, r2.z, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r10.x, r4.y - mov r10.yz, r9.xxyx - and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) - utof r3.yz, r9.zzwz - ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r10.x, r4.z - mov r10.yz, r9.xxwx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r9.x, r4.w - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r10.xy, r9.xwxx - mov r9.x, r4.x - and r11.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r12.xyzx, r9.xyzx - movc r4.xyz, r11.xyzx, r9.xyzx, l(0,0,0,0) - mul r9.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r10.xyz, r5.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r5.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r5.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx - ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r12.xyzx, r11.xyzx - movc r5.xyz, r10.xyzx, r11.xyzx, l(0,0,0,0) - utof r0.y, r5.w - mul r5.w, r0.y, l(0.333333) - mov r6.w, r3.y - mov r7.w, r3.z - mov r8.w, r9.x - mov r4.w, r9.y - break - case l(4) - ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r4.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r9.zzwz - ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r5.y, r5.x, l(16) - ishr r3.yz, r5.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r5.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r4.y - f16tof32 r6.y, r9.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r4.w - f16tof32 r8.y, r9.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r9.w - ushr r0.y, r5.x, l(16) - f16tof32 r5.x, r5.x - f16tof32 r5.y, r0.y - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.x, r4.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r4.w - mov r8.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -ibfe r0.y, l(6), l(16), CB0[0][0].z -ishl r0.y, r0.y, l(23) -iadd r0.y, r0.y, l(0x3f800000) -uge r1.w, r2.y, l(4) -if_nz r1.w - mul r2.z, r0.y, l(0.500000) - imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 2880, 2896, 0) - ld_raw r9.xyzw, r3.y, T0[0].wxyz - ld_raw r10.x, r3.z, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r15.x, r9.y - mov r15.yz, r14.xxyx - and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) - utof r3.yz, r14.zzwz - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r15.x, r9.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r14.x, r9.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r15.xy, r14.xwxx - mov r14.x, r9.x - and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r17.xyzx, r14.xyzx - movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) - mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.w, r10.w - mul r10.w, r3.w, l(0.333333) - mov r11.w, r3.y - mov r12.w, r3.z - mov r13.w, r14.x - mov r9.w, r14.y - break - case l(4) - ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r9.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r14.zzwz - ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r10.y, r10.x, l(16) - ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r9.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r9.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r9.w - f16tof32 r13.y, r14.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r14.w - ushr r3.y, r10.x, l(16) - f16tof32 r10.x, r10.x - f16tof32 r10.y, r3.y - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r9.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r9.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r9.w - mov r13.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r11.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r8.xyzw, r13.xyzw - add r4.xyzw, r4.xyzw, r9.xyzw - add r5.xyzw, r5.xyzw, r10.xyzw - uge r3.y, r2.y, l(6) - if_nz r3.y - mul r2.z, r0.y, l(0.250000) - imad r9.xyzw, r0.xxxx, l(36, 36, 36, 36), l(36, 52, 2916, 2932) - ld_raw r10.xyzw, r9.x, T0[0].wxyz - ld_raw r11.x, r9.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r16.x, r10.y - mov r16.yz, r15.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r3.yz, r15.zzwz - ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r16.x, r10.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r15.x, r10.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r9.xy, r15.xwxx - mov r15.x, r10.x - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r3.w, r11.w - mul r11.w, r3.w, l(0.333333) - mov r12.w, r3.y - mov r13.w, r3.z - mov r14.w, r9.x - mov r10.w, r9.y - break - case l(4) - ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r10.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r15.zzwz - ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r11.y, r11.x, l(16) - ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r10.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r10.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r10.w - f16tof32 r14.y, r15.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r15.w - ushr r3.y, r11.x, l(16) - f16tof32 r11.x, r11.x - f16tof32 r11.y, r3.y - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r12.x, r10.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.w - mov r14.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r12.xyzw, r6.xyzw, r12.xyzw - add r13.xyzw, r7.xyzw, r13.xyzw - add r14.xyzw, r8.xyzw, r14.xyzw - add r10.xyzw, r4.xyzw, r10.xyzw - add r11.xyzw, r5.xyzw, r11.xyzw - ld_raw r15.xyzw, r9.z, T0[0].wxyz - ld_raw r9.x, r9.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) - mov r20.x, r15.y - mov r20.yz, r19.xxyx - and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) - and r21.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) - utof r3.yz, r19.zzwz - ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) - mov r20.x, r15.z - mov r20.yz, r19.xxwx - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r19.x, r15.w - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) - utof r20.xy, r19.xwxx - mov r19.x, r15.x - and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r22.xyzx, r19.xyzx - movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) - mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r23.xyz, r23.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx - ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r22.xyzx, r21.xyzx - movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) - utof r3.w, r9.w - mul r9.w, r3.w, l(0.333333) - mov r16.w, r3.y - mov r17.w, r3.z - mov r18.w, r19.x - mov r15.w, r19.y - break - case l(4) - ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - mov r20.xz, r19.xxyx - mov r20.yw, r15.yyyz - ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.yz, r19.zzwz - ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r9.y, r9.x, l(16) - ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - f16tof32 r16.x, r15.y - f16tof32 r16.y, r19.x - f16tof32 r17.x, r15.z - f16tof32 r17.y, r19.y - f16tof32 r18.x, r15.w - f16tof32 r18.y, r19.z - f16tof32 r15.x, r15.x - f16tof32 r15.y, r19.w - ushr r3.y, r9.x, l(16) - f16tof32 r9.x, r9.x - f16tof32 r9.y, r3.y - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r16.x, r15.y - mov r16.yzw, l(0,0,0,0) - mov r17.x, r15.z - mov r17.yzw, l(0,0,0,0) - mov r18.x, r15.w - mov r18.yzw, l(0,0,0,0) - mov r15.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r12.xyzw, r16.xyzw - add r7.xyzw, r13.xyzw, r17.xyzw - add r8.xyzw, r14.xyzw, r18.xyzw - add r4.xyzw, r10.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r11.xyzw - endif -else - mov r2.z, r0.y -endif -mul r6.xyzw, r2.zzzz, r6.xyzw -mul r7.xyzw, r2.zzzz, r7.xyzw -mul r8.xyzw, r2.zzzz, r8.xyzw -mul r4.xyzw, r2.zzzz, r4.xyzw -mul r5.xyzw, r2.zzzz, r5.xyzw -and r2.z, CB0[0][0].z, l(0x01000000) -if_nz r2.z - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r9.xz, r4.zzxz - mov r5.xz, r5.zzxz -else - mov r9.xz, r4.xxzx -endif -switch r3.x - case l(6) - case l(14) - case l(50) - mov_sat r6.xyzw, r6.xyzw - mad r10.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r3.y, r10.y, l(256), r10.x - imad r3.y, r10.z, l(0x00010000), r3.y - imad r10.x, r10.w, l(0x01000000), r3.y - mov_sat r7.xyzw, r7.xyzw - mad r11.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(256), r11.x - imad r3.y, r11.z, l(0x00010000), r3.y - imad r10.y, r11.w, l(0x01000000), r3.y - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(256), r11.x - imad r3.y, r11.z, l(0x00010000), r3.y - imad r10.z, r11.w, l(0x01000000), r3.y - mov r9.yw, r4.yyyw - mov_sat r9.xyzw, r9.xyzw - mad r11.xyzw, r9.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(256), r11.x - imad r3.y, r11.z, l(0x00010000), r3.y - imad r10.w, r11.w, l(0x01000000), r3.y - mov_sat r5.xyzw, r5.xyzw - mad r11.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(256), r11.x - imad r3.y, r11.z, l(0x00010000), r3.y - imad r5.x, r11.w, l(0x01000000), r3.y - mov r9.xyzw, r10.wyxz - break - case l(7) - case l(54) - mov_sat r6.xyzw, r6.xyzw - mad r10.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r3.y, r10.y, l(1024), r10.x - imad r3.y, r10.z, l(0x00100000), r3.y - imad r10.x, r10.w, l(0x40000000), r3.y - mov_sat r7.xyzw, r7.xyzw - mad r11.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(1024), r11.x - imad r3.y, r11.z, l(0x00100000), r3.y - imad r10.y, r11.w, l(0x40000000), r3.y - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(1024), r11.x - imad r3.y, r11.z, l(0x00100000), r3.y - imad r10.z, r11.w, l(0x40000000), r3.y - mov_sat r4.xz, r9.xxzx - mov_sat r4.yw, r4.yyyw - mad r11.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(1024), r11.x - imad r3.y, r11.z, l(0x00100000), r3.y - imad r10.w, r11.w, l(0x40000000), r3.y - mov_sat r5.xyzw, r5.xyzw - mad r11.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r3.y, r11.y, l(1024), r11.x - imad r3.y, r11.z, l(0x00100000), r3.y - imad r5.x, r11.w, l(0x40000000), r3.y - mov r9.xyzw, r10.wyxz - break - case l(16) - case l(55) - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(2048), r3.y - imad r10.x, r3.w, l(0x00400000), r3.y - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(2048), r3.y - imad r10.y, r3.w, l(0x00400000), r3.y - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(2048), r3.y - imad r10.z, r3.w, l(0x00400000), r3.y - mov_sat r4.xz, r9.xxzx - mov_sat r4.y, r4.y - mad r3.yzw, r4.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(2048), r3.y - imad r10.w, r3.w, l(0x00400000), r3.y - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(2048), r3.y - imad r5.x, r3.w, l(0x00400000), r3.y - mov r9.xyzw, r10.wyxz - break - case l(17) - case l(56) - mov_sat r6.xyz, r6.xyzx - mad r3.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(1024), r3.y - imad r10.x, r3.w, l(0x00200000), r3.y - mov_sat r7.xyz, r7.xyzx - mad r3.yzw, r7.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(1024), r3.y - imad r10.y, r3.w, l(0x00200000), r3.y - mov_sat r8.xyz, r8.xyzx - mad r3.yzw, r8.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(1024), r3.y - imad r10.z, r3.w, l(0x00200000), r3.y - mov_sat r4.xz, r9.xxzx - mov_sat r4.y, r4.y - mad r3.yzw, r4.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(1024), r3.y - imad r10.w, r3.w, l(0x00200000), r3.y - mov_sat r5.xyz, r5.xyzx - mad r3.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r3.yzw, r3.yyzw - imad r3.y, r3.z, l(1024), r3.y - imad r5.x, r3.w, l(0x00200000), r3.y - mov r9.xyzw, r10.wyxz - break - case l(25) - mov_sat r6.xy, r6.xyxx - mad r3.yz, r6.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.z, r3.z, l(0x00010000), r3.y - mov_sat r7.xy, r7.xyxx - mad r3.yz, r7.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.y, r3.z, l(0x00010000), r3.y - mov_sat r8.xy, r8.xyxx - mad r3.yz, r8.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.w, r3.z, l(0x00010000), r3.y - mov_sat r4.x, r9.x - mov_sat r4.y, r4.y - mad r3.yz, r4.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r9.x, r3.z, l(0x00010000), r3.y - mov_sat r5.xy, r5.xyxx - mad r3.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r3.yz, r3.yyzy - imad r5.x, r3.z, l(0x00010000), r3.y - break - case l(31) - f32tof16 r10.x, r6.x - f32tof16 r10.y, r7.x - f32tof16 r10.z, r8.x - f32tof16 r10.w, r9.x - f32tof16 r11.x, r6.y - f32tof16 r11.y, r7.y - f32tof16 r11.z, r8.y - f32tof16 r11.w, r4.y - imad r9.xyzw, r11.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.wyxz - f32tof16 r3.yz, r5.xxyx - imad r5.x, r3.z, l(0x00010000), r3.y - break - default - mov r9.z, r6.x - mov r9.y, r7.x - mov r9.w, r8.x - break -endswitch -ieq r3.yzw, r1.yyyy, l(0, 1, 2, 3) -or r3.yz, r3.zzwz, r3.yyzy -if_nz r3.y - ishl r4.xyzw, r9.zywx, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r9.zywx, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r9.xyzw, r4.wyxz, r6.wyxz - ishl r1.y, r5.x, l(8) - and r1.y, r1.y, l(0xff00ff00) - ushr r3.w, r5.x, l(8) - and r3.w, r3.w, l(0x00ff00ff) - iadd r5.x, r1.y, r3.w -endif -if_nz r3.z - ushr r4.xyzw, r9.zywx, l(16, 16, 16, 16) - bfi r9.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r9.xyzw, r4.wyxz - ushr r1.y, r5.x, l(16) - bfi r5.x, l(16), l(16), r5.x, r1.y - mov r5.yz, r9.xxwx -else - mov r5.yz, r9.xxwx -endif -if_nz r0.z - mov r9.z, r9.y - mov r5.y, r5.x -endif -if_nz r0.w - mov r9.yz, r5.xxyx -endif -store_uav_typed U0[0].xyzw, r1.xxxx, r9.zyzz -ld_raw r4.xyzw, r2.w, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r10.x, r4.y - mov r10.yz, r9.xxyx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r6.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - utof r9.xy, r9.zwzz - ushr r10.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r11.x, r4.z - mov r11.yz, r10.xxwx - and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r7.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) - mov r10.x, r4.w - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r8.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - ushr r10.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r9.zw, r10.xxxw - mov r10.x, r4.x - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r4.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r9.xyzw, r9.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r6.w, r9.x - mov r7.w, r9.y - mov r8.w, r9.z - mov r4.w, r9.w - break - case l(4) - ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r4.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r9.zzwz - ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r4.y - f16tof32 r6.y, r9.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r4.w - f16tof32 r8.y, r9.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r9.w - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - break - default - mov r6.x, r4.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r4.w - mov r8.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.y, r0.y, l(0.500000) - imad r2.w, r0.x, l(36), l(2900) - ld_raw r9.xyzw, r2.w, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r13.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r13.x, r9.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r13.x, r9.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r9.wwww, l(0, 8, 16, 24) - mov r13.x, r9.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r13.x, r9.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r13.x, r9.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r9.wwww, l(0, 10, 20, 30) - mov r13.x, r9.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r14.x, r9.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r13.xy, r13.zwzz - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r15.x, r9.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mov r14.x, r9.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r12.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r13.zw, r14.xxxw - mov r14.x, r9.x - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r13.xyzw, r13.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r10.w, r13.x - mov r11.w, r13.y - mov r12.w, r13.z - mov r9.w, r13.w - break - case l(4) - ishl r13.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r9.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r13.zzwz - ishr r13.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r10.x, r9.y - f16tof32 r10.y, r13.x - f16tof32 r11.x, r9.z - f16tof32 r11.y, r13.y - f16tof32 r12.x, r9.w - f16tof32 r12.y, r13.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r13.w - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r10.x, r9.y - mov r10.yzw, l(0,0,0,0) - mov r11.x, r9.z - mov r11.yzw, l(0,0,0,0) - mov r12.x, r9.w - mov r12.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r10.xyzw - add r7.xyzw, r7.xyzw, r11.xyzw - add r8.xyzw, r8.xyzw, r12.xyzw - add r4.xyzw, r4.xyzw, r9.xyzw - uge r2.w, r2.y, l(6) - if_nz r2.w - mul r1.y, r0.y, l(0.250000) - imad r9.xy, r0.xxxx, l(36, 36, 0, 0), l(56, 2936, 0, 0) - ld_raw r10.xyzw, r9.x, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r15.x, r10.y - mov r15.yz, r14.xxyx - and r9.xzw, r15.xxyz, l(1023, 0, 1023, 1023) - and r16.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r11.xyz, r9.xzwx, r15.xyzx, l(0,0,0,0) - utof r9.xz, r14.zzwz - ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r15.x, r10.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r9.xz, r9.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r14.x, r10.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r15.xy, r14.xwxx - mov r14.x, r10.x - and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r17.xyzx, r14.xyzx - movc r10.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) - mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r9.x - mov r12.w, r9.z - mov r13.w, r14.x - mov r10.w, r14.y - break - case l(4) - ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r10.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r14.zzwz - ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r10.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r10.w - f16tof32 r13.y, r14.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r14.w - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r10.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.w - mov r13.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r11.xyzw, r6.xyzw, r11.xyzw - add r12.xyzw, r7.xyzw, r12.xyzw - add r13.xyzw, r8.xyzw, r13.xyzw - add r10.xyzw, r4.xyzw, r10.xyzw - ld_raw r9.xyzw, r9.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r17.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r17.x, r9.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r17.x, r9.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r9.wwww, l(0, 8, 16, 24) - mov r17.x, r9.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r9.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r17.x, r9.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r17.x, r9.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r9.wwww, l(0, 10, 20, 30) - mov r17.x, r9.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r9.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r18.x, r9.y - mov r18.yz, r17.xxyx - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r14.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - utof r17.xy, r17.zwzz - ushr r18.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r19.x, r9.z - mov r19.yz, r18.xxwx - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - mov r18.x, r9.w - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r16.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - ushr r18.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r17.zw, r18.xxxw - mov r18.x, r9.x - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r9.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - mul r17.xyzw, r17.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r14.w, r17.x - mov r15.w, r17.y - mov r16.w, r17.z - mov r9.w, r17.w - break - case l(4) - ishl r17.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r9.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r17.zzwz - ishr r17.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r14.x, r9.y - f16tof32 r14.y, r17.x - f16tof32 r15.x, r9.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r9.w - f16tof32 r16.y, r17.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r17.w - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r14.x, r9.y - mov r14.yzw, l(0,0,0,0) - mov r15.x, r9.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r9.w - mov r16.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r11.xyzw, r14.xyzw - add r7.xyzw, r12.xyzw, r15.xyzw - add r8.xyzw, r13.xyzw, r16.xyzw - add r4.xyzw, r9.xyzw, r10.xyzw - endif -else - mov r1.y, r0.y -endif -mul r6.xyzw, r1.yyyy, r6.xyzw -mul r7.xyzw, r1.yyyy, r7.xyzw -mul r8.xyzw, r1.yyyy, r8.xyzw -mul r4.xyzw, r1.yyyy, r4.xyzw -if_nz r2.z - mov r6.xz, r6.zzxz - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r9.xz, r4.zzxz -else - mov r9.xz, r4.xxzx -endif -switch r3.x - case l(6) - case l(14) - case l(50) - mov_sat r6.xyzw, r6.xyzw - mad r10.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r1.y, r10.y, l(256), r10.x - imad r1.y, r10.z, l(0x00010000), r1.y - imad r10.x, r10.w, l(0x01000000), r1.y - mov_sat r7.xyzw, r7.xyzw - mad r11.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r1.y, r11.y, l(256), r11.x - imad r1.y, r11.z, l(0x00010000), r1.y - imad r10.y, r11.w, l(0x01000000), r1.y - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r1.y, r11.y, l(256), r11.x - imad r1.y, r11.z, l(0x00010000), r1.y - imad r10.z, r11.w, l(0x01000000), r1.y - mov r9.yw, r4.yyyw - mov_sat r9.xyzw, r9.xyzw - mad r11.xyzw, r9.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r1.y, r11.y, l(256), r11.x - imad r1.y, r11.z, l(0x00010000), r1.y - imad r10.w, r11.w, l(0x01000000), r1.y - mov r9.xyzw, r10.wyxz - break - case l(7) - case l(54) - mov_sat r6.xyzw, r6.xyzw - mad r10.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r1.y, r10.y, l(1024), r10.x - imad r1.y, r10.z, l(0x00100000), r1.y - imad r10.x, r10.w, l(0x40000000), r1.y - mov_sat r7.xyzw, r7.xyzw - mad r11.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r1.y, r11.y, l(1024), r11.x - imad r1.y, r11.z, l(0x00100000), r1.y - imad r10.y, r11.w, l(0x40000000), r1.y - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r1.y, r11.y, l(1024), r11.x - imad r1.y, r11.z, l(0x00100000), r1.y - imad r10.z, r11.w, l(0x40000000), r1.y - mov_sat r4.xz, r9.xxzx - mov_sat r4.yw, r4.yyyw - mad r11.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r1.y, r11.y, l(1024), r11.x - imad r1.y, r11.z, l(0x00100000), r1.y - imad r10.w, r11.w, l(0x40000000), r1.y - mov r9.xyzw, r10.wyxz - break - case l(16) - case l(55) - mov_sat r6.xyz, r6.xyzx - mad r10.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r10.xyz, r10.xyzx - imad r1.y, r10.y, l(2048), r10.x - imad r10.x, r10.z, l(0x00400000), r1.y - mov_sat r7.xyz, r7.xyzx - mad r11.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r11.xyz, r11.xyzx - imad r1.y, r11.y, l(2048), r11.x - imad r10.y, r11.z, l(0x00400000), r1.y - mov_sat r8.xyz, r8.xyzx - mad r11.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r11.xyz, r11.xyzx - imad r1.y, r11.y, l(2048), r11.x - imad r10.z, r11.z, l(0x00400000), r1.y - mov_sat r4.xz, r9.xxzx - mov_sat r4.y, r4.y - mad r11.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r11.xyz, r11.xyzx - imad r1.y, r11.y, l(2048), r11.x - imad r10.w, r11.z, l(0x00400000), r1.y - mov r9.xyzw, r10.wyxz - break - case l(17) - case l(56) - mov_sat r6.xyz, r6.xyzx - mad r10.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r10.xyz, r10.xyzx - imad r1.y, r10.y, l(1024), r10.x - imad r10.x, r10.z, l(0x00200000), r1.y - mov_sat r7.xyz, r7.xyzx - mad r11.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r11.xyz, r11.xyzx - imad r1.y, r11.y, l(1024), r11.x - imad r10.y, r11.z, l(0x00200000), r1.y - mov_sat r8.xyz, r8.xyzx - mad r11.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r11.xyz, r11.xyzx - imad r1.y, r11.y, l(1024), r11.x - imad r10.z, r11.z, l(0x00200000), r1.y - mov_sat r4.xz, r9.xxzx - mov_sat r4.y, r4.y - mad r11.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r11.xyz, r11.xyzx - imad r1.y, r11.y, l(1024), r11.x - imad r10.w, r11.z, l(0x00200000), r1.y - mov r9.xyzw, r10.wyxz - break - case l(25) - mov_sat r6.xy, r6.xyxx - mad r4.zw, r6.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r4.zw, r4.zzzw - imad r9.z, r4.w, l(0x00010000), r4.z - mov_sat r7.xy, r7.xyxx - mad r4.zw, r7.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r4.zw, r4.zzzw - imad r9.y, r4.w, l(0x00010000), r4.z - mov_sat r8.xy, r8.xyxx - mad r4.zw, r8.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r4.zw, r4.zzzw - imad r9.w, r4.w, l(0x00010000), r4.z - mov_sat r4.x, r9.x - mov_sat r4.y, r4.y - mad r4.xz, r4.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r4.xz, r4.xxzx - imad r9.x, r4.z, l(0x00010000), r4.x - break - case l(31) - f32tof16 r10.x, r6.x - f32tof16 r10.y, r7.x - f32tof16 r10.z, r8.x - f32tof16 r10.w, r9.x - f32tof16 r11.x, r6.y - f32tof16 r11.y, r7.y - f32tof16 r11.z, r8.y - f32tof16 r11.w, r4.y - imad r9.xyzw, r11.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.wyxz - break - default - mov r9.z, r6.x - mov r9.y, r7.x - mov r9.w, r8.x - break -endswitch -if_nz r3.y - ishl r4.xyzw, r9.zywx, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r9.zywx, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r9.xyzw, r4.wyxz, r6.wyxz -endif -if_nz r3.z - ushr r4.xyzw, r9.zywx, l(16, 16, 16, 16) - bfi r9.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r9.xyzw, r4.wyxz - mov r5.w, r9.z - mov r9.xzw, r9.xxyw -else - mov r5.w, r9.z - mov r9.xzw, r9.xxyw -endif -if_nz r0.z - mov r9.z, r9.w -endif -if_nz r0.w - mov r5.z, r5.w -endif -iadd r4.xyzw, r1.xxxx, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r4.xxxx, r5.zyzz -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xwxx -store_uav_typed U0[0].xyzw, r4.zzzz, r9.zwzz -movc r0.z, r2.x, l(72), l(36) -imad r0.x, r0.x, l(36), r0.z -ld_raw r5.xyzw, r0.x, T0[0].wxyz -iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) -ld_raw r6.x, r2.x, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r11.yzw, r5.yyyy, l(0, 8, 16, 24) - mov r11.x, r5.y - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r5.zzzz, l(0, 8, 16, 24) - mov r11.x, r5.z - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r5.wwww, l(0, 8, 16, 24) - mov r11.x, r5.w - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r11.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r5.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r11.yzw, r5.yyyy, l(0, 10, 20, 30) - mov r11.x, r5.y - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r5.zzzz, l(0, 10, 20, 30) - mov r11.x, r5.z - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r5.wwww, l(0, 10, 20, 30) - mov r11.x, r5.w - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r11.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r5.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r11.xyzw, r11.xyzw - mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r11.xyzw, r5.yyyz, l(10, 20, 30, 30) - mov r4.x, r5.y - mov r4.yz, r11.xxyx - and r12.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r15.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r14.xyzx, r13.xyzx, r4.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r13.xyzx, r4.xyzx - movc r7.xyz, r12.xyzx, r4.xyzx, l(0,0,0,0) - utof r4.xy, r11.zwzz - ushr r11.xyzw, r5.zwwz, l(10, 10, 20, 20) - mov r12.x, r5.z - mov r12.yz, r11.xxwx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.x, r5.w - and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r10.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) - ushr r11.xyzw, r5.wxxx, l(30, 10, 20, 30) - utof r9.yw, r11.xxxw - mov r11.x, r5.x - and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r11.xyz, r11.xyzx, l(127, 127, 127, 0) - movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) - iadd r11.xyz, r13.xyzx, r11.xyzx - movc r5.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) - mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r13.xyzx, r12.xyzx, r14.xyzx - ishl r13.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r13.xyzx, r12.xyzx - movc r6.xyz, r11.xyzx, r12.xyzx, l(0,0,0,0) - utof r0.z, r6.w - mul r6.w, r0.z, l(0.333333) - mov r7.w, r4.x - mov r8.w, r4.y - mov r10.w, r9.y - mov r5.w, r9.w - break - case l(4) - ishl r11.xyzw, r5.yzwx, l(16, 16, 16, 16) - mov r12.xz, r11.xxyx - mov r12.yw, r5.yyyz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.yz, r11.zzwz - ishr r11.xyzw, r5.ywzx, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r6.y, r6.x, l(16) - ishr r4.xy, r6.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r6.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r11.xyzw, r5.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r5.y - f16tof32 r7.y, r11.x - f16tof32 r8.x, r5.z - f16tof32 r8.y, r11.y - f16tof32 r10.x, r5.w - f16tof32 r10.y, r11.z - f16tof32 r5.x, r5.x - f16tof32 r5.y, r11.w - ushr r0.z, r6.x, l(16) - f16tof32 r6.x, r6.x - f16tof32 r6.y, r0.z - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r5.y - mov r7.yzw, l(0,0,0,0) - mov r8.x, r5.z - mov r8.yzw, l(0,0,0,0) - mov r10.x, r5.w - mov r10.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r0.y, l(0.500000) - iadd r4.xy, r0.xxxx, l(2880, 2896, 0, 0) - ld_raw r11.xyzw, r4.x, T0[0].wxyz - ld_raw r12.x, r4.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r16.xyzw, r16.xyzw - mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) - mov r16.x, r11.y - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) - mov r16.x, r11.z - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) - mov r16.x, r11.w - and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r16.xyzw, r16.xyzw - mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) - mov r4.x, r11.y - mov r4.yz, r16.xxyx - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r13.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - utof r4.xy, r16.zwzz - ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) - mov r17.x, r11.z - mov r17.yz, r16.xxwx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r16.x, r11.w - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) - utof r9.yw, r16.xxxw - mov r16.x, r11.x - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx - ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r18.xyzx, r17.xyzx - movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) - utof r1.y, r12.w - mul r12.w, r1.y, l(0.333333) - mov r13.w, r4.x - mov r14.w, r4.y - mov r15.w, r9.y - mov r11.w, r9.w - break - case l(4) - ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r11.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.yz, r16.zzwz - ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r12.y, r12.x, l(16) - ishr r4.xy, r12.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r12.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - case l(6) - ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) - f16tof32 r13.x, r11.y - f16tof32 r13.y, r16.x - f16tof32 r14.x, r11.z - f16tof32 r14.y, r16.y - f16tof32 r15.x, r11.w - f16tof32 r15.y, r16.z - f16tof32 r11.x, r11.x - f16tof32 r11.y, r16.w - ushr r1.y, r12.x, l(16) - f16tof32 r12.x, r12.x - f16tof32 r12.y, r1.y - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - break - default - mov r13.x, r11.y - mov r13.yzw, l(0,0,0,0) - mov r14.x, r11.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r11.w - mov r15.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r13.xyzw - add r8.xyzw, r8.xyzw, r14.xyzw - add r10.xyzw, r10.xyzw, r15.xyzw - add r5.xyzw, r5.xyzw, r11.xyzw - add r6.xyzw, r6.xyzw, r12.xyzw - uge r1.y, r2.y, l(6) - if_nz r1.y - mul r0.z, r0.y, l(0.250000) - iadd r11.xyzw, r0.xxxx, l(36, 52, 2916, 2932) - ld_raw r12.xyzw, r11.x, T0[0].wxyz - ld_raw r13.x, r11.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) - and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) - mov r17.x, r12.y - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) - mov r17.x, r12.z - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) - mov r17.x, r12.w - and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r17.xyzw, r17.xyzw - mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) - mov r4.x, r12.y - mov r4.yz, r17.xxyx - and r18.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r21.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r20.xyzx, r19.xyzx, r4.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r19.xyzx, r4.xyzx - movc r14.xyz, r18.xyzx, r4.xyzx, l(0,0,0,0) - utof r4.xy, r17.zwzz - ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) - mov r18.x, r12.z - mov r18.yz, r17.xxwx - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r17.x, r12.w - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) - utof r9.yw, r17.xxxw - mov r17.x, r12.x - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) - and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx - ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) - utof r1.y, r13.w - mul r13.w, r1.y, l(0.333333) - mov r14.w, r4.x - mov r15.w, r4.y - mov r16.w, r9.y - mov r12.w, r9.w - break - case l(4) - ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - mov r18.xz, r17.xxyx - mov r18.yw, r12.yyyz - ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.yz, r17.zzwz - ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r13.y, r13.x, l(16) - ishr r4.xy, r13.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r13.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - case l(6) - ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) - f16tof32 r14.x, r12.y - f16tof32 r14.y, r17.x - f16tof32 r15.x, r12.z - f16tof32 r15.y, r17.y - f16tof32 r16.x, r12.w - f16tof32 r16.y, r17.z - f16tof32 r12.x, r12.x - f16tof32 r12.y, r17.w - ushr r1.y, r13.x, l(16) - f16tof32 r13.x, r13.x - f16tof32 r13.y, r1.y - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - break - default - mov r14.x, r12.y - mov r14.yzw, l(0,0,0,0) - mov r15.x, r12.z - mov r15.yzw, l(0,0,0,0) - mov r16.x, r12.w - mov r16.yzw, l(0,0,0,0) - mov r12.yzw, l(0,0,0,0) - mov r13.yzw, l(0,0,0,0) - break - endswitch - add r14.xyzw, r7.xyzw, r14.xyzw - add r15.xyzw, r8.xyzw, r15.xyzw - add r16.xyzw, r10.xyzw, r16.xyzw - add r12.xyzw, r5.xyzw, r12.xyzw - add r13.xyzw, r6.xyzw, r13.xyzw - ld_raw r17.xyzw, r11.z, T0[0].wxyz - ld_raw r11.x, r11.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) - mov r21.x, r17.y - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) - mov r21.x, r17.z - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) - mov r21.x, r17.w - and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) - and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r21.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r21.xyzw, r21.xyzw - mul r11.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) - mov r21.x, r17.y - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) - mov r21.x, r17.z - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) - mov r21.x, r17.w - and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) - and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r21.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r21.xyzw, r21.xyzw - mul r11.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) - mov r4.x, r17.y - mov r4.yz, r21.xxyx - and r22.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r25.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r24.xyzx, r23.xyzx, r4.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r23.xyzx, r4.xyzx - movc r18.xyz, r22.xyzx, r4.xyzx, l(0,0,0,0) - utof r4.xy, r21.zwzz - ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) - mov r22.x, r17.z - mov r22.yz, r21.xxwx - and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) - and r24.xyz, r22.xyzx, l(127, 127, 127, 0) - ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx - firstbit_hi r26.xyz, r24.xyzx - iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) - movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) - iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) - movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx - bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) - and r22.xyz, r22.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx - ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) - iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r24.xyzx, r22.xyzx - movc r19.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r21.x, r17.w - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r20.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) - utof r9.yw, r21.xxxw - mov r21.x, r17.x - and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) - and r23.xyz, r21.xyzx, l(127, 127, 127, 0) - ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx - firstbit_hi r25.xyz, r23.xyzx - iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) - movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) - iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) - movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx - bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) - and r21.xyz, r21.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx - ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r23.xyzx, r21.xyzx - movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) - mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r21.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r24.xyz, r24.xyzx, l(127, 127, 127, 0) - movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx - ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) - iadd r22.xyz, r23.xyzx, r22.xyzx - movc r11.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) - utof r1.y, r11.w - mul r11.w, r1.y, l(0.333333) - mov r18.w, r4.x - mov r19.w, r4.y - mov r20.w, r9.y - mov r17.w, r9.w - break - case l(4) - ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) - mov r22.xz, r21.xxyx - mov r22.yw, r17.yyyz - ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) - itof r22.xyzw, r22.xyzw - mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r17.yz, r21.zzwz - ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) - itof r21.xyzw, r21.xyzw - mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r11.y, r11.x, l(16) - ishr r4.xy, r11.yxyy, l(16, 16, 0, 0) - itof r4.xy, r4.xyxx - mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) - max r11.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) - f16tof32 r18.x, r17.y - f16tof32 r18.y, r21.x - f16tof32 r19.x, r17.z - f16tof32 r19.y, r21.y - f16tof32 r20.x, r17.w - f16tof32 r20.y, r21.z - f16tof32 r17.x, r17.x - f16tof32 r17.y, r21.w - ushr r1.y, r11.x, l(16) - f16tof32 r11.x, r11.x - f16tof32 r11.y, r1.y - mov r18.zw, l(0,0,0,0) - mov r19.zw, l(0,0,0,0) - mov r20.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r18.x, r17.y - mov r18.yzw, l(0,0,0,0) - mov r19.x, r17.z - mov r19.yzw, l(0,0,0,0) - mov r20.x, r17.w - mov r20.yzw, l(0,0,0,0) - mov r17.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r14.xyzw, r18.xyzw - add r8.xyzw, r15.xyzw, r19.xyzw - add r10.xyzw, r16.xyzw, r20.xyzw - add r5.xyzw, r12.xyzw, r17.xyzw - add r6.xyzw, r11.xyzw, r13.xyzw - endif -else - mov r0.z, r0.y -endif -mul r7.xyzw, r0.zzzz, r7.xyzw -mul r8.xyzw, r0.zzzz, r8.xyzw -mul r10.xyzw, r0.zzzz, r10.xyzw -mul r5.xyzw, r0.zzzz, r5.xyzw -mul r6.xyzw, r0.zzzz, r6.xyzw -if_nz r2.z - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r10.xz, r10.zzxz - mov r11.xz, r5.zzxz - mov r6.xz, r6.zzxz -else - mov r11.xz, r5.xxzx -endif -switch r3.x - case l(6) - case l(14) - case l(50) - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r0.z, r12.y, l(256), r12.x - imad r0.z, r12.z, l(0x00010000), r0.z - imad r12.x, r12.w, l(0x01000000), r0.z - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(256), r13.x - imad r0.z, r13.z, l(0x00010000), r0.z - imad r12.y, r13.w, l(0x01000000), r0.z - mov_sat r10.xyzw, r10.xyzw - mad r13.xyzw, r10.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(256), r13.x - imad r0.z, r13.z, l(0x00010000), r0.z - imad r12.z, r13.w, l(0x01000000), r0.z - mov r11.yw, r5.yyyw - mov_sat r11.xyzw, r11.xyzw - mad r13.xyzw, r11.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(256), r13.x - imad r0.z, r13.z, l(0x00010000), r0.z - imad r12.w, r13.w, l(0x01000000), r0.z - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(256), r13.x - imad r0.z, r13.z, l(0x00010000), r0.z - imad r6.x, r13.w, l(0x01000000), r0.z - mov r11.xyzw, r12.wyxz - break - case l(7) - case l(54) - mov_sat r7.xyzw, r7.xyzw - mad r12.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r12.xyzw, r12.xyzw - imad r0.z, r12.y, l(1024), r12.x - imad r0.z, r12.z, l(0x00100000), r0.z - imad r12.x, r12.w, l(0x40000000), r0.z - mov_sat r8.xyzw, r8.xyzw - mad r13.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(1024), r13.x - imad r0.z, r13.z, l(0x00100000), r0.z - imad r12.y, r13.w, l(0x40000000), r0.z - mov_sat r10.xyzw, r10.xyzw - mad r13.xyzw, r10.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(1024), r13.x - imad r0.z, r13.z, l(0x00100000), r0.z - imad r12.z, r13.w, l(0x40000000), r0.z - mov_sat r5.xz, r11.xxzx - mov_sat r5.yw, r5.yyyw - mad r13.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(1024), r13.x - imad r0.z, r13.z, l(0x00100000), r0.z - imad r12.w, r13.w, l(0x40000000), r0.z - mov_sat r6.xyzw, r6.xyzw - mad r13.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r13.xyzw, r13.xyzw - imad r0.z, r13.y, l(1024), r13.x - imad r0.z, r13.z, l(0x00100000), r0.z - imad r6.x, r13.w, l(0x40000000), r0.z - mov r11.xyzw, r12.wyxz - break - case l(16) - case l(55) - mov_sat r7.xyz, r7.xyzx - mad r4.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(2048), r4.x - imad r12.x, r4.z, l(0x00400000), r0.z - mov_sat r8.xyz, r8.xyzx - mad r4.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(2048), r4.x - imad r12.y, r4.z, l(0x00400000), r0.z - mov_sat r10.xyz, r10.xyzx - mad r4.xyz, r10.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(2048), r4.x - imad r12.z, r4.z, l(0x00400000), r0.z - mov_sat r5.xz, r11.xxzx - mov_sat r5.y, r5.y - mad r4.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(2048), r4.x - imad r12.w, r4.z, l(0x00400000), r0.z - mov_sat r6.xyz, r6.xyzx - mad r4.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(2048), r4.x - imad r6.x, r4.z, l(0x00400000), r0.z - mov r11.xyzw, r12.wyxz - break - case l(17) - case l(56) - mov_sat r7.xyz, r7.xyzx - mad r4.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(1024), r4.x - imad r12.x, r4.z, l(0x00200000), r0.z - mov_sat r8.xyz, r8.xyzx - mad r4.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(1024), r4.x - imad r12.y, r4.z, l(0x00200000), r0.z - mov_sat r10.xyz, r10.xyzx - mad r4.xyz, r10.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(1024), r4.x - imad r12.z, r4.z, l(0x00200000), r0.z - mov_sat r5.xz, r11.xxzx - mov_sat r5.y, r5.y - mad r4.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(1024), r4.x - imad r12.w, r4.z, l(0x00200000), r0.z - mov_sat r6.xyz, r6.xyzx - mad r4.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r4.xyz, r4.xyzx - imad r0.z, r4.y, l(1024), r4.x - imad r6.x, r4.z, l(0x00200000), r0.z - mov r11.xyzw, r12.wyxz - break - case l(25) - mov_sat r7.xy, r7.xyxx - mad r4.xy, r7.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r11.z, r4.y, l(0x00010000), r4.x - mov_sat r8.xy, r8.xyxx - mad r4.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r11.y, r4.y, l(0x00010000), r4.x - mov_sat r10.xy, r10.xyxx - mad r4.xy, r10.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r11.w, r4.y, l(0x00010000), r4.x - mov_sat r5.x, r11.x - mov_sat r5.y, r5.y - mad r4.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r11.x, r4.y, l(0x00010000), r4.x - mov_sat r6.xy, r6.xyxx - mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r6.x, r4.y, l(0x00010000), r4.x - break - case l(31) - f32tof16 r12.x, r7.x - f32tof16 r12.y, r8.x - f32tof16 r12.z, r10.x - f32tof16 r12.w, r11.x - f32tof16 r13.x, r7.y - f32tof16 r13.y, r8.y - f32tof16 r13.z, r10.y - f32tof16 r13.w, r5.y - imad r11.xyzw, r13.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r12.wyxz - f32tof16 r0.z, r6.x - f32tof16 r1.y, r6.y - imad r6.x, r1.y, l(0x00010000), r0.z - break - default - mov r11.z, r7.x - mov r11.y, r8.x - mov r11.w, r10.x - break -endswitch -if_nz r3.y - ishl r5.xyzw, r11.zywx, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r11.zywx, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r11.xyzw, r5.wyxz, r7.wyxz - ishl r0.z, r6.x, l(8) - and r0.z, r0.z, l(0xff00ff00) - ushr r1.y, r6.x, l(8) - and r1.y, r1.y, l(0x00ff00ff) - iadd r6.x, r0.z, r1.y -endif -if_nz r3.z - ushr r5.xyzw, r11.zywx, l(16, 16, 16, 16) - bfi r11.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r11.xyzw, r5.wyxz - ushr r0.z, r6.x, l(16) - bfi r6.x, l(16), l(16), r6.x, r0.z - mov r9.z, r11.z - mov r11.zw, r11.yyyw - mov r6.z, r11.x -else - mov r9.z, r11.z - mov r11.zw, r11.yyyw - mov r6.z, r11.x -endif -if_nz r0.w - mov r9.z, r6.z - mov r11.z, r6.x -endif -store_uav_typed U0[0].xyzw, r4.wwww, r9.xzxx -ld_raw r4.xyzw, r2.w, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r10.x, r4.y - mov r10.yz, r9.xxyx - and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r13.xyzx, r10.xyzx - movc r5.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) - utof r2.xw, r9.zzzw - ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r10.x, r4.z - mov r10.yz, r9.xxwx - and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r13.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r15.xyz, r13.xyzx - iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) - movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) - iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) - movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx - ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) - iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r13.xyzx, r10.xyzx - movc r7.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r9.x, r4.w - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r12.xyzx, r9.xyzx - movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r6.yw, r9.xxxw - mov r9.x, r4.x - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r12.xyzx, r9.xyzx - movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r5.w, r2.x - mov r7.w, r2.w - mov r8.w, r6.y - mov r4.w, r6.w - break - case l(4) - ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r4.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r9.zzwz - ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r5.x, r4.y - f16tof32 r5.y, r9.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r4.w - f16tof32 r8.y, r9.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r9.w - mov r5.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - break - default - mov r5.x, r4.y - mov r5.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r4.w - mov r8.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r0.y, l(0.500000) - iadd r1.y, r0.x, l(2900) - ld_raw r9.xyzw, r1.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r15.x, r9.y - mov r15.yz, r14.xxyx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - utof r1.yw, r14.zzzw - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r15.x, r9.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r14.x, r9.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r2.xw, r14.xxxw - mov r14.x, r9.x - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r10.w, r1.y - mov r12.w, r1.w - mov r13.w, r2.x - mov r9.w, r2.w - break - case l(4) - ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r9.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r14.zzwz - ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r10.x, r9.y - f16tof32 r10.y, r14.x - f16tof32 r12.x, r9.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r9.w - f16tof32 r13.y, r14.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r14.w - mov r10.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r10.x, r9.y - mov r10.yzw, l(0,0,0,0) - mov r12.x, r9.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r9.w - mov r13.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r10.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r8.xyzw, r13.xyzw - add r4.xyzw, r4.xyzw, r9.xyzw - uge r1.y, r2.y, l(6) - if_nz r1.y - mul r0.y, r0.y, l(0.250000) - iadd r1.yw, r0.xxxx, l(0, 56, 0, 2936) - ld_raw r9.xyzw, r1.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r15.x, r9.y - mov r15.yz, r14.xxyx - and r2.xyw, r15.xyxz, l(1023, 1023, 0, 1023) - and r16.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r10.xyz, r2.xywx, r15.xyzx, l(0,0,0,0) - utof r2.xy, r14.zwzz - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r15.x, r9.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r14.x, r9.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r6.yw, r14.xxxw - mov r14.x, r9.x - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r10.w, r2.x - mov r12.w, r2.y - mov r13.w, r6.y - mov r9.w, r6.w - break - case l(4) - ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r9.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r14.zzwz - ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r10.x, r9.y - f16tof32 r10.y, r14.x - f16tof32 r12.x, r9.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r9.w - f16tof32 r13.y, r14.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r14.w - mov r10.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r10.x, r9.y - mov r10.yzw, l(0,0,0,0) - mov r12.x, r9.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r9.w - mov r13.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r10.xyzw, r5.xyzw, r10.xyzw - add r12.xyzw, r7.xyzw, r12.xyzw - add r13.xyzw, r8.xyzw, r13.xyzw - add r9.xyzw, r4.xyzw, r9.xyzw - ld_raw r14.xyzw, r1.w, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r18.yzw, r14.yyyy, l(0, 8, 16, 24) - mov r18.x, r14.y - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r14.zzzz, l(0, 8, 16, 24) - mov r18.x, r14.z - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r14.wwww, l(0, 8, 16, 24) - mov r18.x, r14.w - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r18.yzw, r14.yyyy, l(0, 10, 20, 30) - mov r18.x, r14.y - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r14.zzzz, l(0, 10, 20, 30) - mov r18.x, r14.z - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r14.wwww, l(0, 10, 20, 30) - mov r18.x, r14.w - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r18.xyzw, r14.yyyz, l(10, 20, 30, 30) - mov r19.x, r14.y - mov r19.yz, r18.xxyx - and r1.yzw, r19.xxyz, l(0, 1023, 1023, 1023) - and r2.xyw, r19.xyxz, l(127, 127, 0, 127) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r21.xyz, r2.xywx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r2.xywx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r21.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r2.xyw, r20.xyxz, r2.xyxw, r19.xyxz - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r2.xyw, r2.xyxw, l(16, 16, 0, 16) - iadd r2.xyw, r19.xyxz, r2.xyxw - movc r15.xyz, r1.yzwy, r2.xywx, l(0,0,0,0) - utof r1.yz, r18.zzwz - ushr r18.xyzw, r14.zwwz, l(10, 10, 20, 20) - mov r19.x, r14.z - mov r19.yz, r18.xxwx - and r2.xyw, r19.xyxz, l(1023, 1023, 0, 1023) - and r20.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r20.xyzx, r19.xyzx - movc r16.xyz, r2.xywx, r19.xyzx, l(0,0,0,0) - mul r1.yz, r1.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r18.x, r14.w - and r2.xyw, r18.xyxz, l(1023, 1023, 0, 1023) - and r19.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r17.xyz, r2.xywx, r18.xyzx, l(0,0,0,0) - ushr r18.xyzw, r14.wxxx, l(30, 10, 20, 30) - utof r2.xy, r18.xwxx - mov r18.x, r14.x - and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r20.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r22.xyz, r20.xyzx - iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) - movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) - iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) - movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx - ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) - iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r20.xyzx, r18.xyzx - movc r14.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) - mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r15.w, r1.y - mov r16.w, r1.z - mov r17.w, r2.x - mov r14.w, r2.y - break - case l(4) - ishl r18.xyzw, r14.yzwx, l(16, 16, 16, 16) - mov r19.xz, r18.xxyx - mov r19.yw, r14.yyyz - ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.yz, r18.zzwz - ishr r18.xyzw, r14.ywzx, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r18.xyzw, r14.yzwx, l(16, 16, 16, 16) - f16tof32 r15.x, r14.y - f16tof32 r15.y, r18.x - f16tof32 r16.x, r14.z - f16tof32 r16.y, r18.y - f16tof32 r17.x, r14.w - f16tof32 r17.y, r18.z - f16tof32 r14.x, r14.x - f16tof32 r14.y, r18.w - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r15.x, r14.y - mov r15.yzw, l(0,0,0,0) - mov r16.x, r14.z - mov r16.yzw, l(0,0,0,0) - mov r17.x, r14.w - mov r17.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - add r5.xyzw, r10.xyzw, r15.xyzw - add r7.xyzw, r12.xyzw, r16.xyzw - add r8.xyzw, r13.xyzw, r17.xyzw - add r4.xyzw, r9.xyzw, r14.xyzw - else - mov r0.y, r0.z - endif -endif -mul r5.xyzw, r0.yyyy, r5.xyzw -mul r7.xyzw, r0.yyyy, r7.xyzw -mul r8.xyzw, r0.yyyy, r8.xyzw -mul r4.xyzw, r0.yyyy, r4.xyzw -if_nz r2.z - mov r5.xz, r5.zzxz - mov r7.xz, r7.zzxz - mov r8.xz, r8.zzxz - mov r2.xz, r4.zzxz -else - mov r2.xz, r4.xxzx -endif -switch r3.x - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r9.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r0.x, r9.y, l(256), r9.x - imad r0.x, r9.z, l(0x00010000), r0.x - imad r9.x, r9.w, l(0x01000000), r0.x - mov_sat r7.xyzw, r7.xyzw - mad r10.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r0.x, r10.y, l(256), r10.x - imad r0.x, r10.z, l(0x00010000), r0.x - imad r9.y, r10.w, l(0x01000000), r0.x - mov_sat r8.xyzw, r8.xyzw - mad r10.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r0.x, r10.y, l(256), r10.x - imad r0.x, r10.z, l(0x00010000), r0.x - imad r9.z, r10.w, l(0x01000000), r0.x - mov r2.yw, r4.yyyw - mov_sat r2.xyzw, r2.xyzw - mad r10.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r0.x, r10.y, l(256), r10.x - imad r0.x, r10.z, l(0x00010000), r0.x - imad r9.w, r10.w, l(0x01000000), r0.x - mov r2.xyzw, r9.wyxz - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r9.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r0.x, r9.y, l(1024), r9.x - imad r0.x, r9.z, l(0x00100000), r0.x - imad r9.x, r9.w, l(0x40000000), r0.x - mov_sat r7.xyzw, r7.xyzw - mad r10.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r0.x, r10.y, l(1024), r10.x - imad r0.x, r10.z, l(0x00100000), r0.x - imad r9.y, r10.w, l(0x40000000), r0.x - mov_sat r8.xyzw, r8.xyzw - mad r10.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r0.x, r10.y, l(1024), r10.x - imad r0.x, r10.z, l(0x00100000), r0.x - imad r9.z, r10.w, l(0x40000000), r0.x - mov_sat r4.xz, r2.xxzx - mov_sat r4.yw, r4.yyyw - mad r10.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r10.xyzw, r10.xyzw - imad r0.x, r10.y, l(1024), r10.x - imad r0.x, r10.z, l(0x00100000), r0.x - imad r9.w, r10.w, l(0x40000000), r0.x - mov r2.xyzw, r9.wyxz - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r0.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(2048), r0.x - imad r9.x, r0.z, l(0x00400000), r0.x - mov_sat r7.xyz, r7.xyzx - mad r0.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(2048), r0.x - imad r9.y, r0.z, l(0x00400000), r0.x - mov_sat r8.xyz, r8.xyzx - mad r0.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(2048), r0.x - imad r9.z, r0.z, l(0x00400000), r0.x - mov_sat r4.xz, r2.xxzx - mov_sat r4.y, r4.y - mad r0.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(2048), r0.x - imad r9.w, r0.z, l(0x00400000), r0.x - mov r2.xyzw, r9.wyxz - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r0.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(1024), r0.x - imad r9.x, r0.z, l(0x00200000), r0.x - mov_sat r7.xyz, r7.xyzx - mad r0.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(1024), r0.x - imad r9.y, r0.z, l(0x00200000), r0.x - mov_sat r8.xyz, r8.xyzx - mad r0.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(1024), r0.x - imad r9.z, r0.z, l(0x00200000), r0.x - mov_sat r4.xz, r2.xxzx - mov_sat r4.y, r4.y - mad r0.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r0.xyz, r0.xyzx - imad r0.x, r0.y, l(1024), r0.x - imad r9.w, r0.z, l(0x00200000), r0.x - mov r2.xyzw, r9.wyxz - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r0.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.z, r0.y, l(0x00010000), r0.x - mov_sat r7.xy, r7.xyxx - mad r0.xy, r7.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.y, r0.y, l(0x00010000), r0.x - mov_sat r8.xy, r8.xyxx - mad r0.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.w, r0.y, l(0x00010000), r0.x - mov_sat r4.x, r2.x - mov_sat r4.y, r4.y - mad r0.xy, r4.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r0.xy, r0.xyxx - imad r2.x, r0.y, l(0x00010000), r0.x - break - case l(31) - f32tof16 r9.x, r5.x - f32tof16 r9.y, r7.x - f32tof16 r9.z, r8.x - f32tof16 r9.w, r2.x - f32tof16 r10.x, r5.y - f32tof16 r10.y, r7.y - f32tof16 r10.z, r8.y - f32tof16 r10.w, r4.y - imad r2.xyzw, r10.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.wyxz - break - default - mov r2.z, r5.x - mov r2.y, r7.x - mov r2.w, r8.x - break -endswitch -if_nz r3.y - ishl r4.xyzw, r2.zywx, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.zywx, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.wyxz, r5.wyxz -endif -if_nz r3.z - ushr r3.xyzw, r2.zywx, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.wyxz -endif -if_nz r0.w - mov r11.w, r2.z -endif -iadd r0.xyzw, r1.xxxx, l(5, 6, 7, 8) -store_uav_typed U0[0].xyzw, r0.xxxx, r11.zwzz -store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz -store_uav_typed U0[0].xyzw, r0.zzzz, r2.zyzz -store_uav_typed U0[0].xyzw, r0.wwww, r2.wxww -ret -// Approximately 4124 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.cso deleted file mode 100644 index 62dcea943..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.h deleted file mode 100644 index 139ae7ca7..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.h +++ /dev/null @@ -1,5203 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_32bpp_from_64bpp_3xres.cs.hlsl -const uint8_t resolve_full_32bpp_from_64bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xD1, 0xF8, 0x4F, 0xAE, 0x4C, 0x15, 0xB8, 0x4F, - 0x92, 0xD0, 0xD0, 0x93, 0xDB, 0xDC, 0x57, 0x3C, 0x01, 0x00, 0x00, 0x00, - 0xB0, 0xF3, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x14, 0xF3, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 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0x9D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0xA2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.txt deleted file mode 100644 index 229a576d1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.txt +++ /dev/null @@ -1,2653 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 12 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].xxzz, l(1023, 0x40000000, 7, 8) -ubfe r4.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r5.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r5.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -ishl r1.w, r5.x, l(1) -imad r1.w, r5.y, r3.x, r1.w -iadd r1.w, r1.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r2.x, r2.x, l(1) -imad r1.w, r1.w, l(1280), r2.x -imul null, r1.w, r1.w, l(9) -ushr r1.w, r1.w, l(1) -movc r2.xy, r0.wzww, l(0,0,0,0), l(1,1,0,0) -movc r2.xy, r3.yyyy, r2.xyxx, l(0,0,0,0) -bfi r5.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r5.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r3.x, r1.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r3.x, r2.w, r5.x - ushr r3.y, r1.x, l(5) - imad r2.w, r2.w, r3.y, r5.y - ishl r3.y, r0.z, l(10) - and r3.y, r3.y, l(6144) - bfi r3.y, l(3), l(8), r0.w, r3.y - ishr r3.y, r3.y, l(6) - iadd r3.x, r3.x, r5.z - bfi r3.w, l(1), l(1), r3.x, l(0) - iadd r3.w, r3.w, r5.w - bfi r3.w, l(2), l(1), r3.w, l(0) - bfi r3.x, l(1), l(0), r3.x, r3.w - and r3.w, r3.y, l(112) - bfi r4.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r4.xy, r3.wwww, l(2, 16, 0, 0), r4.xyxx - bfi r3.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r3.yyyy, r4.xxxy - bfi r3.yw, l(0, 2, 0, 2), l(0, 8, 0, 11), r1.zzzz, r3.yyyw - ubfe r1.z, l(3), l(6), r3.y - and r2.w, r3.x, l(6) - bfi r3.x, l(1), l(8), r3.x, l(0) - imad r1.z, r1.z, l(32), r3.x - imad r1.z, r2.w, l(4), r1.z - bfi r3.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r0.zzzz, r3.ywyy - bfi r1.z, l(9), l(3), r1.z, r3.y - bfi r1.z, l(6), l(0), r3.x, r1.z -else - ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r3.xy, r0.zzzz, l(4, 7, 0, 0) - and r3.xy, r3.xyxx, l(224, 2048, 0, 0) - bfi r0.y, l(3), l(2), r0.w, r3.x - ishl r1.x, r3.x, l(1) - bfi r0.w, l(3), l(3), r0.w, r1.x - and r0.w, r0.w, l(480) - bfi r1.x, l(23), l(9), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r3.xw, r0.wwww, l(3, 0, 0, 2) - bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxw - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r3.y, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r5.z, l(2) - iadd r0.y, r5.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.z, l(6), l(0), r1.x, r0.x -endif -imul null, r0.x, r1.z, l(9) -ushr r0.x, r0.x, l(3) -imad r0.y, r2.y, l(3), r1.w -iadd r0.z, r2.x, r0.y -ld r5.yw, r0.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.xz, r5.yywy, l(16, 0, 16, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r1.zzzx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -ibfe r0.w, l(6), l(16), CB0[0][0].z -ishl r0.w, r0.w, l(23) -iadd r0.w, r0.w, l(0x3f800000) -uge r1.x, r1.y, l(4) -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.z, l(720) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.xy, r0.zzzz, l(9, 729, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.z, r0.w -endif -mul r5.xyzw, r1.zzzz, r5.ywxz -and r0.z, CB0[0][0].z, l(0x01000000) -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r3.xy, r0.yyyy, l(1, 2, 0, 0) -ld r6.yw, r3.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(721) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.xw, r0.yyyy, l(10, 0, 0, 730) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.z, r0.w -endif -mul r6.xyzw, r1.zzzz, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(256), r7.x - imad r1.z, r7.z, l(0x00010000), r1.z - imad r4.x, r7.w, l(0x01000000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(256), r7.x - imad r1.z, r7.z, l(0x00010000), r1.z - imad r4.y, r7.w, l(0x01000000), r1.z - mov r6.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r7.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(1024), r7.x - imad r1.z, r7.z, l(0x00100000), r1.z - imad r4.x, r7.w, l(0x40000000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r1.z, r7.y, l(1024), r7.x - imad r1.z, r7.z, l(0x00100000), r1.z - imad r4.y, r7.w, l(0x40000000), r1.z - mov r6.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(2048), r7.x - imad r4.x, r7.z, l(0x00400000), r1.z - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(2048), r7.x - imad r4.y, r7.z, l(0x00400000), r1.z - mov r6.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r7.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(1024), r7.x - imad r4.x, r7.z, l(0x00200000), r1.z - mov_sat r6.xyz, r6.xyzx - mad r7.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r7.xyz, r7.xyzx - imad r1.z, r7.y, l(1024), r7.x - imad r4.y, r7.z, l(0x00200000), r1.z - mov r6.xz, r4.yyxy - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r3.xw, r5.xxxy, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r3.xw, r3.xxxw - imad r6.z, r3.w, l(0x00010000), r3.x - mov_sat r6.xy, r6.xyxx - mad r3.xw, r6.xxxy, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) - ftou r3.xw, r3.xxxw - imad r6.x, r3.w, l(0x00010000), r3.x - break - case l(31) - f32tof16 r4.x, r5.x - f32tof16 r4.y, r6.x - f32tof16 r7.x, r5.y - f32tof16 r7.y, r6.y - imad r6.xz, r7.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r6.z, r5.x - break -endswitch -ieq r3.xzw, r3.zzzz, l(1, 0, 2, 3) -or r3.xz, r3.zzwz, r3.xxzx -if_nz r3.x - ishl r4.xy, r6.zxzz, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r6.zxzz, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xz, r4.yyxy, r5.yyxy -endif -if_nz r3.z - ushr r4.xy, r6.zxzz, l(16, 16, 0, 0) - bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r4.yyxy -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r6.zxzz -ld r5.yw, r3.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r5.yyyw, l(0, 16, 0, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.wwwy - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(722) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwy - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.yw, r0.yyyy, l(0, 11, 0, 731) - ld r6.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r7.yyyw, l(0, 16, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.wwwy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.z, r0.w -endif -mul r5.xyzw, r1.zzzz, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r0.y, r1.w, r2.x -iadd r3.yw, r0.yyyy, l(0, 3, 0, 6) -ld r6.yw, r3.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(723) - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r4.xy, r0.yyyy, l(12, 732, 0, 0) - ld r7.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r8.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.z, r0.w -endif -mul r6.xyzw, r1.zzzz, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -iadd r7.xyzw, r0.xxxx, l(1, 2, 3, 4) -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(256), r8.x - imad r1.z, r8.z, l(0x00010000), r1.z - imad r4.x, r8.w, l(0x01000000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(256), r8.x - imad r1.z, r8.z, l(0x00010000), r1.z - imad r4.y, r8.w, l(0x01000000), r1.z - mov r6.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(1024), r8.x - imad r1.z, r8.z, l(0x00100000), r1.z - imad r4.x, r8.w, l(0x40000000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(1024), r8.x - imad r1.z, r8.z, l(0x00100000), r1.z - imad r4.y, r8.w, l(0x40000000), r1.z - mov r6.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(2048), r8.x - imad r4.x, r8.z, l(0x00400000), r1.z - mov_sat r6.xyz, r6.xyzx - mad r8.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(2048), r8.x - imad r4.y, r8.z, l(0x00400000), r1.z - mov r6.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(1024), r8.x - imad r4.x, r8.z, l(0x00200000), r1.z - mov_sat r6.xyz, r6.xyzx - mad r8.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(1024), r8.x - imad r4.y, r8.z, l(0x00200000), r1.z - mov r6.xz, r4.yyxy - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r4.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r6.z, r4.y, l(0x00010000), r4.x - mov_sat r6.xy, r6.xyxx - mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r6.x, r4.y, l(0x00010000), r4.x - break - case l(31) - f32tof16 r4.x, r5.x - f32tof16 r4.y, r6.x - f32tof16 r8.x, r5.y - f32tof16 r8.y, r6.y - imad r6.xz, r8.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r6.z, r5.x - break -endswitch -if_nz r3.x - ishl r4.xy, r6.zxzz, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r6.zxzz, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xz, r4.yyxy, r5.yyxy -endif -if_nz r3.z - ushr r4.xy, r6.zxzz, l(16, 16, 0, 0) - bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r4.yyxy -endif -store_uav_typed U0[0].xyzw, r7.xxxx, r6.zxzz -iadd r5.xyzw, r1.wwww, l(4, 5, 7, 8) -ld r6.yw, r5.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r1.w, l(724) - ld r8.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r8.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r4.xy, r1.wwww, l(13, 733, 0, 0) - ld r8.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r9.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r9.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r6.ywxz, r8.ywxz - ld r9.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r4.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r1.z, r0.w -endif -mul r6.xyzw, r1.zzzz, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -ld r8.yw, r5.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r1.w, l(725) - ld r9.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r4.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r8.xyzw, r9.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r4.xy, r1.wwww, l(14, 734, 0, 0) - ld r9.yw, r4.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r5.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r9.xyzw, r8.ywxz, r9.ywxz - ld r10.yw, r4.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r10.xz, r10.yywy, l(16, 0, 16, 0) - ishr r11.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r10.ywyy, l(16, 16, 0, 0) - f16tof32 r10.xy, r10.wyww - f16tof32 r10.zw, r4.yyyx - break - default - mov r10.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r9.zxwy, r10.xyzw - endif -else - mov r1.z, r0.w -endif -mul r8.xyzw, r1.zzzz, r8.ywxz -if_nz r0.z - mov r8.xz, r8.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r6.xyzw, r6.xyzw - mad r9.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.z, r9.y, l(256), r9.x - imad r1.z, r9.z, l(0x00010000), r1.z - imad r4.x, r9.w, l(0x01000000), r1.z - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.z, r9.y, l(256), r9.x - imad r1.z, r9.z, l(0x00010000), r1.z - imad r4.y, r9.w, l(0x01000000), r1.z - mov r8.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r6.xyzw, r6.xyzw - mad r9.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.z, r9.y, l(1024), r9.x - imad r1.z, r9.z, l(0x00100000), r1.z - imad r4.x, r9.w, l(0x40000000), r1.z - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.z, r9.y, l(1024), r9.x - imad r1.z, r9.z, l(0x00100000), r1.z - imad r4.y, r9.w, l(0x40000000), r1.z - mov r8.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r6.xyz, r6.xyzx - mad r9.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r9.xyz, r9.xyzx - imad r1.z, r9.y, l(2048), r9.x - imad r4.x, r9.z, l(0x00400000), r1.z - mov_sat r8.xyz, r8.xyzx - mad r9.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r9.xyz, r9.xyzx - imad r1.z, r9.y, l(2048), r9.x - imad r4.y, r9.z, l(0x00400000), r1.z - mov r8.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r6.xyz, r6.xyzx - mad r9.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r9.xyz, r9.xyzx - imad r1.z, r9.y, l(1024), r9.x - imad r4.x, r9.z, l(0x00200000), r1.z - mov_sat r8.xyz, r8.xyzx - mad r9.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r9.xyz, r9.xyzx - imad r1.z, r9.y, l(1024), r9.x - imad r4.y, r9.z, l(0x00200000), r1.z - mov r8.xz, r4.yyxy - break - case l(25) - mov_sat r6.xy, r6.xyxx - mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r8.z, r4.y, l(0x00010000), r4.x - mov_sat r8.xy, r8.xyxx - mad r4.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) - ftou r4.xy, r4.xyxx - imad r8.x, r4.y, l(0x00010000), r4.x - break - case l(31) - f32tof16 r4.x, r6.x - f32tof16 r4.y, r8.x - f32tof16 r5.x, r6.y - f32tof16 r5.y, r8.y - imad r8.xz, r5.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r8.z, r6.x - break -endswitch -if_nz r3.x - ishl r4.xy, r8.zxzz, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r8.zxzz, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r8.xz, r4.yyxy, r5.yyxy -endif -if_nz r3.z - ushr r4.xy, r8.zxzz, l(16, 16, 0, 0) - bfi r8.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r8.xxzx, r4.yyxy -endif -store_uav_typed U0[0].xyzw, r7.yyyy, r8.zxzz -ld r6.yw, r3.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwy - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r2.w, r0.y, l(726) - ld r8.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r8.xyzw - uge r2.w, r1.y, l(6) - if_nz r2.w - mul r1.z, r0.w, l(0.250000) - iadd r3.yw, r0.yyyy, l(0, 15, 0, 735) - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r6.ywxz, r8.ywxz - ld r9.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r9.yyyw, l(0, 16, 0, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.wwwy - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r1.z, r0.w -endif -mul r6.xyzw, r1.zzzz, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -ld r8.yw, r5.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwy - break - default - mov r8.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r0.y, r0.w, l(0.500000) - iadd r1.z, r1.w, l(727) - ld r9.yw, r1.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r9.yyyw, l(0, 16, 0, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.wwwy - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r8.xyzw, r9.xyzw - uge r1.z, r1.y, l(6) - if_nz r1.z - mul r0.y, r0.w, l(0.250000) - iadd r3.yw, r1.wwww, l(0, 16, 0, 736) - ld r9.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r4.yyyx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r9.xyzw, r8.ywxz, r9.ywxz - ld r10.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r10.xz, r10.yywy, l(16, 0, 16, 0) - ishr r11.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r10.yyyw, l(0, 16, 0, 16) - f16tof32 r10.xy, r10.wyww - f16tof32 r10.zw, r3.wwwy - break - default - mov r10.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r9.zxwy, r10.xyzw - endif -else - mov r0.y, r0.w -endif -mul r8.xyzw, r0.yyyy, r8.ywxz -if_nz r0.z - mov r8.xz, r8.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r6.xyzw, r6.xyzw - mad r9.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r0.y, r9.y, l(256), r9.x - imad r0.y, r9.z, l(0x00010000), r0.y - imad r4.x, r9.w, l(0x01000000), r0.y - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r0.y, r9.y, l(256), r9.x - imad r0.y, r9.z, l(0x00010000), r0.y - imad r4.y, r9.w, l(0x01000000), r0.y - mov r8.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r6.xyzw, r6.xyzw - mad r9.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r0.y, r9.y, l(1024), r9.x - imad r0.y, r9.z, l(0x00100000), r0.y - imad r4.x, r9.w, l(0x40000000), r0.y - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r0.y, r9.y, l(1024), r9.x - imad r0.y, r9.z, l(0x00100000), r0.y - imad r4.y, r9.w, l(0x40000000), r0.y - mov r8.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r6.xyz, r6.xyzx - mad r5.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r0.y, r5.y, l(2048), r5.x - imad r4.x, r5.z, l(0x00400000), r0.y - mov_sat r8.xyz, r8.xyzx - mad r5.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r0.y, r5.y, l(2048), r5.x - imad r4.y, r5.z, l(0x00400000), r0.y - mov r8.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r6.xyz, r6.xyzx - mad r5.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r0.y, r5.y, l(1024), r5.x - imad r4.x, r5.z, l(0x00200000), r0.y - mov_sat r8.xyz, r8.xyzx - mad r5.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r5.xyz, r5.xyzx - imad r0.y, r5.y, l(1024), r5.x - imad r4.y, r5.z, l(0x00200000), r0.y - mov r8.xz, r4.yyxy - break - case l(25) - mov_sat r6.xy, r6.xyxx - mad r3.yw, r6.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) - ftou r3.yw, r3.yyyw - imad r8.z, r3.w, l(0x00010000), r3.y - mov_sat r8.xy, r8.xyxx - mad r3.yw, r8.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) - ftou r3.yw, r3.yyyw - imad r8.x, r3.w, l(0x00010000), r3.y - break - case l(31) - f32tof16 r4.x, r6.x - f32tof16 r4.y, r8.x - f32tof16 r5.x, r6.y - f32tof16 r5.y, r8.y - imad r8.xz, r5.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r8.z, r6.x - break -endswitch -if_nz r3.x - ishl r3.yw, r8.zzzx, l(0, 8, 0, 8) - and r3.yw, r3.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r4.xy, r8.zxzz, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r8.xz, r3.wwyw, r4.yyxy -endif -if_nz r3.z - ushr r3.yw, r8.zzzx, l(0, 16, 0, 16) - bfi r8.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r8.xxzx, r3.wwyw -endif -store_uav_typed U0[0].xyzw, r7.zzzz, r8.zxzz -ld r5.yw, r5.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r5.yyyw, l(0, 16, 0, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.wwwy - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r0.y, r0.w, l(0.500000) - iadd r1.z, r1.w, l(728) - ld r6.yw, r1.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwy - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r1.z, r1.y, l(6) - if_nz r1.z - mul r0.y, r0.w, l(0.250000) - iadd r3.yw, r1.wwww, l(0, 17, 0, 737) - ld r6.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r8.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r8.xyzw - endif -else - mov r0.y, r0.w -endif -mul r5.xyzw, r0.yyyy, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -movc r0.y, r2.z, l(18), l(9) -iadd r0.y, r0.y, r1.w -imad r1.z, r2.y, l(3), r0.y -iadd r1.w, r2.x, r1.z -ld r6.yw, r1.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yz, r6.yywy, l(0, 16, 16, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.zzzy - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r2.y, r0.w, l(0.500000) - iadd r2.z, r1.w, l(720) - ld r8.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r8.xyzw - uge r2.z, r1.y, l(6) - if_nz r2.z - mul r2.y, r0.w, l(0.250000) - iadd r2.zw, r1.wwww, l(0, 0, 9, 729) - ld r8.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r6.ywxz, r8.ywxz - ld r9.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r9.yyyw, l(0, 0, 16, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r2.wwwz - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r2.y, r0.w -endif -mul r6.xyzw, r2.yyyy, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(256), r8.x - imad r1.w, r8.z, l(0x00010000), r1.w - imad r4.x, r8.w, l(0x01000000), r1.w - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(256), r8.x - imad r1.w, r8.z, l(0x00010000), r1.w - imad r4.y, r8.w, l(0x01000000), r1.w - mov r6.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(1024), r8.x - imad r1.w, r8.z, l(0x00100000), r1.w - imad r4.x, r8.w, l(0x40000000), r1.w - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.w, r8.y, l(1024), r8.x - imad r1.w, r8.z, l(0x00100000), r1.w - imad r4.y, r8.w, l(0x40000000), r1.w - mov r6.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r2.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.w, r2.z, l(2048), r2.y - imad r4.x, r2.w, l(0x00400000), r1.w - mov_sat r6.xyz, r6.xyzx - mad r2.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.w, r2.z, l(2048), r2.y - imad r4.y, r2.w, l(0x00400000), r1.w - mov r6.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r2.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.w, r2.z, l(1024), r2.y - imad r4.x, r2.w, l(0x00200000), r1.w - mov_sat r6.xyz, r6.xyzx - mad r2.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.w, r2.z, l(1024), r2.y - imad r4.y, r2.w, l(0x00200000), r1.w - mov r6.xz, r4.yyxy - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r2.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r2.yz, r2.yyzy - imad r6.z, r2.z, l(0x00010000), r2.y - mov_sat r6.xy, r6.xyxx - mad r2.yz, r6.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r2.yz, r2.yyzy - imad r6.x, r2.z, l(0x00010000), r2.y - break - case l(31) - f32tof16 r4.x, r5.x - f32tof16 r4.y, r6.x - f32tof16 r7.x, r5.y - f32tof16 r7.y, r6.y - imad r6.xz, r7.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r6.z, r5.x - break -endswitch -if_nz r3.x - ishl r2.yz, r6.zzxz, l(0, 8, 8, 0) - and r2.yz, r2.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r3.yw, r6.zzzx, l(0, 8, 0, 8) - and r3.yw, r3.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) - iadd r6.xz, r2.zzyz, r3.wwyw -endif -if_nz r3.z - ushr r2.yz, r6.zzxz, l(0, 16, 16, 0) - bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r2.zzyz -endif -store_uav_typed U0[0].xyzw, r7.wwww, r6.zxzz -iadd r2.yz, r1.zzzz, l(0, 1, 2, 0) -ld r5.yw, r2.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yw, r5.yyyw, l(0, 16, 0, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwy - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.y, r1.z, l(721) - ld r6.yw, r2.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yw, r6.yyyw, l(0, 16, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwy - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.y, r1.y, l(6) - if_nz r2.y - mul r1.w, r0.w, l(0.250000) - iadd r2.yw, r1.zzzz, l(0, 10, 0, 730) - ld r6.yw, r2.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.wwwy - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r2.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yw, r7.yyyw, l(0, 16, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.w, r0.w -endif -mul r5.xyzw, r1.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -ld r6.yw, r2.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yz, r6.yywy, l(0, 16, 16, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.zzzy - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.y, r1.z, l(722) - ld r7.yw, r2.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yz, r7.yywy, l(0, 16, 16, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.zzzy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.y, r1.y, l(6) - if_nz r2.y - mul r1.w, r0.w, l(0.250000) - iadd r2.yz, r1.zzzz, l(0, 11, 731, 0) - ld r7.yw, r2.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yw, r7.yyyw, l(0, 16, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.yz, r8.yywy, l(0, 16, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.zzzy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.w, r0.w -endif -mul r6.xyzw, r1.wwww, r6.ywxz -if_nz r0.z - mov r6.xz, r6.zzxz -endif -iadd r7.xyzw, r0.xxxx, l(5, 6, 7, 8) -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(256), r8.x - imad r1.z, r8.z, l(0x00010000), r1.z - imad r4.x, r8.w, l(0x01000000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(256), r8.x - imad r1.z, r8.z, l(0x00010000), r1.z - imad r4.y, r8.w, l(0x01000000), r1.z - mov r6.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(1024), r8.x - imad r1.z, r8.z, l(0x00100000), r1.z - imad r4.x, r8.w, l(0x40000000), r1.z - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(1024), r8.x - imad r1.z, r8.z, l(0x00100000), r1.z - imad r4.y, r8.w, l(0x40000000), r1.z - mov r6.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r2.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.z, r2.z, l(2048), r2.y - imad r4.x, r2.w, l(0x00400000), r1.z - mov_sat r6.xyz, r6.xyzx - mad r2.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.z, r2.z, l(2048), r2.y - imad r4.y, r2.w, l(0x00400000), r1.z - mov r6.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r2.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.z, r2.z, l(1024), r2.y - imad r4.x, r2.w, l(0x00200000), r1.z - mov_sat r6.xyz, r6.xyzx - mad r2.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r2.yzw, r2.yyzw - imad r1.z, r2.z, l(1024), r2.y - imad r4.y, r2.w, l(0x00200000), r1.z - mov r6.xz, r4.yyxy - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r1.zw, r5.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r1.zw, r1.zzzw - imad r6.z, r1.w, l(0x00010000), r1.z - mov_sat r6.xy, r6.xyxx - mad r1.zw, r6.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r1.zw, r1.zzzw - imad r6.x, r1.w, l(0x00010000), r1.z - break - case l(31) - f32tof16 r4.x, r5.x - f32tof16 r4.y, r6.x - f32tof16 r8.x, r5.y - f32tof16 r8.y, r6.y - imad r6.xz, r8.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r6.z, r5.x - break -endswitch -if_nz r3.x - ishl r1.zw, r6.zzzx, l(0, 0, 8, 8) - and r1.zw, r1.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r2.yz, r6.zzxz, l(0, 8, 8, 0) - and r2.yz, r2.yyzy, l(0, 0x00ff00ff, 0x00ff00ff, 0) - iadd r6.xz, r1.wwzw, r2.zzyz -endif -if_nz r3.z - ushr r1.zw, r6.zzzx, l(0, 0, 16, 16) - bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r1.wwzw -endif -store_uav_typed U0[0].xyzw, r7.xxxx, r6.zxzz -iadd r1.z, r2.x, r0.y -iadd r2.xy, r1.zzzz, l(3, 6, 0, 0) -ld r5.yw, r2.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r5.yywy, l(16, 0, 16, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.zzzx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.x, r1.z, l(723) - ld r6.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r6.yywy, l(16, 0, 16, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.zzzx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.x, r1.y, l(6) - if_nz r2.x - mul r1.w, r0.w, l(0.250000) - iadd r2.xz, r1.zzzz, l(12, 0, 732, 0) - ld r6.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r8.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r8.xyzw - endif -else - mov r1.w, r0.w -endif -mul r5.xyzw, r1.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) -ld r8.yw, r6.xxxx, T0[0].zxwy -switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.x, r0.y, l(724) - ld r9.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r9.yywy, l(16, 0, 16, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r2.zzzx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r8.xyzw, r9.xyzw - uge r2.x, r1.y, l(6) - if_nz r2.x - mul r1.w, r0.w, l(0.250000) - iadd r2.xz, r0.yyyy, l(13, 0, 733, 0) - ld r9.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xw, r9.yyyw, l(16, 0, 0, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r2.wwwx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r9.xyzw, r8.ywxz, r9.ywxz - ld r10.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r10.xz, r10.yywy, l(16, 0, 16, 0) - ishr r11.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r10.yywy, l(16, 0, 16, 0) - f16tof32 r10.xy, r10.wyww - f16tof32 r10.zw, r2.zzzx - break - default - mov r10.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r9.zxwy, r10.xyzw - endif -else - mov r1.w, r0.w -endif -mul r8.xyzw, r1.wwww, r8.ywxz -if_nz r0.z - mov r8.xz, r8.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r9.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.w, r9.y, l(256), r9.x - imad r1.w, r9.z, l(0x00010000), r1.w - imad r4.x, r9.w, l(0x01000000), r1.w - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.w, r9.y, l(256), r9.x - imad r1.w, r9.z, l(0x00010000), r1.w - imad r4.y, r9.w, l(0x01000000), r1.w - mov r8.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r9.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.w, r9.y, l(1024), r9.x - imad r1.w, r9.z, l(0x00100000), r1.w - imad r4.x, r9.w, l(0x40000000), r1.w - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r1.w, r9.y, l(1024), r9.x - imad r1.w, r9.z, l(0x00100000), r1.w - imad r4.y, r9.w, l(0x40000000), r1.w - mov r8.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r2.xzw, r5.xxyz, l(2047.000000, 0.000000, 2047.000000, 1023.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r1.w, r2.z, l(2048), r2.x - imad r4.x, r2.w, l(0x00400000), r1.w - mov_sat r8.xyz, r8.xyzx - mad r2.xzw, r8.xxyz, l(2047.000000, 0.000000, 2047.000000, 1023.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r1.w, r2.z, l(2048), r2.x - imad r4.y, r2.w, l(0x00400000), r1.w - mov r8.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r2.xzw, r5.xxyz, l(1023.000000, 0.000000, 2047.000000, 2047.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r1.w, r2.z, l(1024), r2.x - imad r4.x, r2.w, l(0x00200000), r1.w - mov_sat r8.xyz, r8.xyzx - mad r2.xzw, r8.xxyz, l(1023.000000, 0.000000, 2047.000000, 2047.000000), l(0.500000, 0.000000, 0.500000, 0.500000) - ftou r2.xzw, r2.xxzw - imad r1.w, r2.z, l(1024), r2.x - imad r4.y, r2.w, l(0x00200000), r1.w - mov r8.xz, r4.yyxy - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r2.xz, r5.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r2.xz, r2.xxzx - imad r8.z, r2.z, l(0x00010000), r2.x - mov_sat r8.xy, r8.xyxx - mad r2.xz, r8.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) - ftou r2.xz, r2.xxzx - imad r8.x, r2.z, l(0x00010000), r2.x - break - case l(31) - f32tof16 r4.x, r5.x - f32tof16 r4.y, r8.x - f32tof16 r9.x, r5.y - f32tof16 r9.y, r8.y - imad r8.xz, r9.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r8.z, r5.x - break -endswitch -if_nz r3.x - ishl r2.xz, r8.zzxz, l(8, 0, 8, 0) - and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) - ushr r3.yw, r8.zzzx, l(0, 8, 0, 8) - and r3.yw, r3.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) - iadd r8.xz, r2.zzxz, r3.wwyw -endif -if_nz r3.z - ushr r2.xz, r8.zzxz, l(16, 0, 16, 0) - bfi r8.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r8.xxzx, r2.zzxz -endif -store_uav_typed U0[0].xyzw, r7.yyyy, r8.zxzz -ld r5.yw, r6.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r5.yywy, l(16, 0, 16, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.zzzx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r2.x, r0.y, l(725) - ld r8.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r8.yywy, l(16, 0, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.zzzx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r8.xyzw - uge r2.x, r1.y, l(6) - if_nz r2.x - mul r1.w, r0.w, l(0.250000) - iadd r2.xz, r0.yyyy, l(14, 0, 734, 0) - ld r8.yw, r2.xxxx, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xw, r8.yyyw, l(16, 0, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r5.ywxz, r8.ywxz - ld r9.yw, r2.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.xz, r9.yywy, l(16, 0, 16, 0) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r2.zzzx - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r1.w, r0.w -endif -mul r5.xyzw, r1.wwww, r5.ywxz -if_nz r0.z - mov r5.xz, r5.zzxz -endif -ld r2.yw, r2.yyyy, T0[0].zxwy -switch r4.w - case l(5) - ishl r2.xz, r2.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r2.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r2.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r2.yyyw, l(0, 16, 0, 16) - f16tof32 r2.xy, r2.wyww - f16tof32 r2.zw, r3.wwwy - break - default - mov r2.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.w, r0.w, l(0.500000) - iadd r3.y, r1.z, l(726) - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r2.xyzw, r8.xyzw - uge r3.y, r1.y, l(6) - if_nz r3.y - mul r1.w, r0.w, l(0.250000) - iadd r3.yw, r1.zzzz, l(0, 15, 0, 735) - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r4.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r8.xyzw, r2.ywxz, r8.ywxz - ld r9.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r9.xz, r9.yywy, l(16, 0, 16, 0) - ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r9.yyyw, l(0, 16, 0, 16) - f16tof32 r9.xy, r9.wyww - f16tof32 r9.zw, r3.wwwy - break - default - mov r9.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r8.zxwy, r9.xyzw - endif -else - mov r1.w, r0.w -endif -mul r2.xyzw, r1.wwww, r2.ywxz -if_nz r0.z - mov r2.xz, r2.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(256), r8.x - imad r1.z, r8.z, l(0x00010000), r1.z - imad r4.x, r8.w, l(0x01000000), r1.z - mov_sat r2.xyzw, r2.xyzw - mad r8.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(256), r8.x - imad r1.z, r8.z, l(0x00010000), r1.z - imad r4.y, r8.w, l(0x01000000), r1.z - mov r2.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(1024), r8.x - imad r1.z, r8.z, l(0x00100000), r1.z - imad r4.x, r8.w, l(0x40000000), r1.z - mov_sat r2.xyzw, r2.xyzw - mad r8.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.z, r8.y, l(1024), r8.x - imad r1.z, r8.z, l(0x00100000), r1.z - imad r4.y, r8.w, l(0x40000000), r1.z - mov r2.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(2048), r8.x - imad r4.x, r8.z, l(0x00400000), r1.z - mov_sat r2.xyz, r2.xyzx - mad r8.xyz, r2.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(2048), r8.x - imad r4.y, r8.z, l(0x00400000), r1.z - mov r2.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r5.xyz, r5.xyzx - mad r8.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(1024), r8.x - imad r4.x, r8.z, l(0x00200000), r1.z - mov_sat r2.xyz, r2.xyzx - mad r8.xyz, r2.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) - ftou r8.xyz, r8.xyzx - imad r1.z, r8.y, l(1024), r8.x - imad r4.y, r8.z, l(0x00200000), r1.z - mov r2.xz, r4.yyxy - break - case l(25) - mov_sat r5.xy, r5.xyxx - mad r1.zw, r5.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r1.zw, r1.zzzw - imad r2.z, r1.w, l(0x00010000), r1.z - mov_sat r2.xy, r2.xyxx - mad r1.zw, r2.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) - ftou r1.zw, r1.zzzw - imad r2.x, r1.w, l(0x00010000), r1.z - break - case l(31) - f32tof16 r4.x, r5.x - f32tof16 r4.y, r2.x - f32tof16 r6.x, r5.y - f32tof16 r6.y, r2.y - imad r2.xz, r6.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r2.z, r5.x - break -endswitch -if_nz r3.x - ishl r1.zw, r2.zzzx, l(0, 0, 8, 8) - and r1.zw, r1.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r2.yw, r2.zzzx, l(0, 8, 0, 8) - and r2.yw, r2.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) - iadd r2.xz, r1.wwzw, r2.wwyw -endif -if_nz r3.z - ushr r1.zw, r2.zzzx, l(0, 0, 16, 16) - bfi r2.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r2.xxzx, r1.wwzw -endif -store_uav_typed U0[0].xyzw, r7.zzzz, r2.zxzz -ld r2.yw, r6.zzzz, T0[0].zxwy -switch r4.w - case l(5) - ishl r2.xz, r2.yywy, l(16, 0, 16, 0) - ishr r5.xyzw, r2.xyzw, l(16, 16, 16, 16) - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r2.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.zw, r2.yyyw, l(0, 0, 16, 16) - f16tof32 r2.xy, r2.wyww - f16tof32 r2.zw, r1.wwwz - break - default - mov r2.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.z, r0.w, l(0.500000) - iadd r1.w, r0.y, l(727) - ld r5.yw, r1.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r5.yyyw, l(0, 16, 0, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.wwwy - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r2.xyzw, r5.xyzw - uge r1.w, r1.y, l(6) - if_nz r1.w - mul r1.z, r0.w, l(0.250000) - iadd r3.yw, r0.yyyy, l(0, 16, 0, 736) - ld r5.yw, r3.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r4.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r2.ywxz, r5.ywxz - ld r8.yw, r3.wwww, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.wwwy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r2.xyzw, r5.zxwy, r8.xyzw - endif -else - mov r1.z, r0.w -endif -mul r2.xyzw, r1.zzzz, r2.ywxz -if_nz r0.z - mov r2.xz, r2.zzxz -endif -ld r5.yw, r6.wwww, T0[0].zxwy -switch r4.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r1.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.x - mul r1.x, r0.w, l(0.500000) - iadd r1.z, r0.y, l(728) - ld r6.yw, r1.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r1.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r0.w, r0.w, l(0.250000) - iadd r1.yz, r0.yyyy, l(0, 17, 737, 0) - ld r6.yw, r1.yyyy, T0[0].zxwy - switch r4.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.yw, r6.yyyw, l(0, 16, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r1.wwwy - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r8.yw, r1.zzzz, T0[0].zxwy - switch r4.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.yz, r8.yywy, l(0, 16, 16, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r1.zzzy - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r8.xyzw - else - mov r0.w, r1.x - endif -endif -mul r1.xyzw, r0.wwww, r5.ywxz -if_nz r0.z - mov r1.xz, r1.zzxz -endif -switch r4.z - case l(6) - case l(14) - case l(50) - mov_sat r2.xyzw, r2.xyzw - mad r4.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r4.xyzw, r4.xyzw - imad r0.y, r4.y, l(256), r4.x - imad r0.y, r4.z, l(0x00010000), r0.y - imad r4.x, r4.w, l(0x01000000), r0.y - mov_sat r1.xyzw, r1.xyzw - mad r5.xyzw, r1.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r5.xyzw, r5.xyzw - imad r0.y, r5.y, l(256), r5.x - imad r0.y, r5.z, l(0x00010000), r0.y - imad r4.y, r5.w, l(0x01000000), r0.y - mov r1.xz, r4.yyxy - break - case l(7) - case l(54) - mov_sat r2.xyzw, r2.xyzw - mad r4.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r4.xyzw, r4.xyzw - imad r0.y, r4.y, l(1024), r4.x - imad r0.y, r4.z, l(0x00100000), r0.y - imad r4.x, r4.w, l(0x40000000), r0.y - mov_sat r1.xyzw, r1.xyzw - mad r5.xyzw, r1.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r5.xyzw, r5.xyzw - imad r0.y, r5.y, l(1024), r5.x - imad r0.y, r5.z, l(0x00100000), r0.y - imad r4.y, r5.w, l(0x40000000), r0.y - mov r1.xz, r4.yyxy - break - case l(16) - case l(55) - mov_sat r2.xyz, r2.xyzx - mad r0.yzw, r2.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(2048), r0.y - imad r4.x, r0.w, l(0x00400000), r0.y - mov_sat r1.xyz, r1.xyzx - mad r0.yzw, r1.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(2048), r0.y - imad r4.y, r0.w, l(0x00400000), r0.y - mov r1.xz, r4.yyxy - break - case l(17) - case l(56) - mov_sat r2.xyz, r2.xyzx - mad r0.yzw, r2.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(1024), r0.y - imad r4.x, r0.w, l(0x00200000), r0.y - mov_sat r1.xyz, r1.xyzx - mad r0.yzw, r1.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) - ftou r0.yzw, r0.yyzw - imad r0.y, r0.z, l(1024), r0.y - imad r4.y, r0.w, l(0x00200000), r0.y - mov r1.xz, r4.yyxy - break - case l(25) - mov_sat r2.xy, r2.xyxx - mad r0.yz, r2.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r1.z, r0.z, l(0x00010000), r0.y - mov_sat r1.xy, r1.xyxx - mad r0.yz, r1.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) - ftou r0.yz, r0.yyzy - imad r1.x, r0.z, l(0x00010000), r0.y - break - case l(31) - f32tof16 r4.x, r2.x - f32tof16 r4.y, r1.x - f32tof16 r5.x, r2.y - f32tof16 r5.y, r1.y - imad r1.xz, r5.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy - break - default - mov r1.z, r2.x - break -endswitch -if_nz r3.x - ishl r0.yz, r1.zzxz, l(0, 8, 8, 0) - and r0.yz, r0.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r1.yw, r1.zzzx, l(0, 8, 0, 8) - and r1.yw, r1.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) - iadd r1.xz, r0.zzyz, r1.wwyw -endif -if_nz r3.z - ushr r0.yz, r1.zzxz, l(0, 16, 16, 0) - bfi r1.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r1.xxzx, r0.zzyz -endif -store_uav_typed U0[0].xyzw, r7.wwww, r1.zxzz -ret -// Approximately 2606 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.cso deleted file mode 100644 index 6c4901766..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h deleted file mode 100644 index 6cbb73102..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h +++ /dev/null @@ -1,2965 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_64bpp_2xres.cs.hlsl -const uint8_t resolve_full_64bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x2E, 0x42, 0xBC, 0x78, 0xC6, 0xC5, 0x2F, 0xC2, - 0x88, 0x5F, 0x92, 0x5D, 0xF4, 0xC3, 0x84, 0x43, 0x01, 0x00, 0x00, 0x00, - 0xC4, 0x8A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x28, 0x8A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 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a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.txt deleted file mode 100644 index 97fac02c5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.txt +++ /dev/null @@ -1,1196 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 21 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000) -ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r4.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.zw, r3.yyyy, l(0, 0, 2, 1) -and r1.zw, r1.zzzw, l(0, 0, 1, 1) -ishl r1.xy, r1.xyxx, r1.zwzz -ushr r4.x, r4.y, l(1) -and r1.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r1.xy, r1.zwzz, r1.xyxx -udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) -movc r0.w, r3.z, l(1), l(0) -ishl r3.y, r1.z, r0.w -imad r2.y, r1.w, r2.y, r3.y -iadd r2.y, r2.y, r3.x -imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx -imad r1.x, r1.y, l(80), r1.x -ishl r0.w, r1.x, r0.w -imad r0.w, r2.y, l(1280), r0.w -ld r1.xyzw, r0.wwww, T0[0].xzyw -if_nz r3.z - iadd r2.y, r0.w, l(1) - ld r4.xyzw, r2.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r1.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r1.xz, r8.zzwz - ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r9.xz, r8.xxyx - mov r9.yw, r4.xxxz - ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.xz, r1.xxzx - f16tof32 r5.yw, r8.xxxy - f16tof32 r6.xz, r1.yywy - f16tof32 r6.yw, r8.zzzw - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r7.xz, r4.xxzx - f16tof32 r7.yw, r8.xxxy - f16tof32 r1.zw, r4.wwwy - f16tof32 r1.xy, r8.zwzz - break - default - mov r5.xy, r1.xzxx - mov r5.zw, l(0,0,0,0) - mov r6.xy, r1.ywyy - mov r6.zw, l(0,0,0,0) - mov r7.xy, r4.xzxx - mov r7.zw, l(0,0,0,0) - mov r1.xw, r4.wwwy - mov r1.yz, l(0,0,0,0) - break - endswitch -else - switch r3.w - case l(0) - case l(1) - ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) - and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) - mov r4.x, r1.x - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) - mov r4.x, r1.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) - mov r4.x, r1.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) - and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) - mov r8.x, r1.x - mov r8.yz, r4.xxyx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - utof r3.xy, r4.zwzz - ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) - mov r8.x, r1.z - mov r8.yz, r4.xxwx - and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r8.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) - and r8.xyz, r8.xyzx, l(127, 127, 127, 0) - movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) - iadd r8.xyz, r10.xyzx, r8.xyzx - movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) - mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r4.x, r1.y - and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r9.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r11.xyz, r9.xyzx - iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) - movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) - iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) - movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx - ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) - iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r9.xyzx, r4.xyzx - movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) - utof r8.xy, r4.xwxx - mov r4.x, r1.w - and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r10.xyzx, r4.xyzx - movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) - mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r5.w, r3.x - mov r6.w, r3.y - mov r7.w, r4.x - mov r1.y, r4.y - break - case l(4) - ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - mov r8.xz, r4.xxyx - mov r8.yw, r1.xxxz - ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r1.xz, r4.zzwz - ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) - f16tof32 r5.x, r1.x - f16tof32 r5.y, r4.x - f16tof32 r6.x, r1.z - f16tof32 r6.y, r4.y - f16tof32 r7.x, r1.y - f16tof32 r7.y, r4.z - f16tof32 r1.w, r1.w - f16tof32 r1.x, r4.w - mov r5.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r1.yz, l(0,0,0,0) - break - default - mov r5.x, r1.x - mov r5.yzw, l(0,0,0,0) - mov r6.x, r1.z - mov r6.yzw, l(0,0,0,0) - mov r7.x, r1.y - mov r7.yzw, l(0,0,0,0) - mov r1.xyz, l(0,0,0,0) - break - endswitch -endif -ibfe r2.y, l(6), l(16), CB0[0][0].z -ishl r2.y, r2.y, l(23) -iadd r2.y, r2.y, l(0x3f800000) -uge r3.x, r0.y, l(4) -if_nz r3.x - mul r3.x, r2.y, l(0.500000) - ishl r3.y, l(80), r3.z - iadd r3.y, r0.w, r3.y - ld r4.xyzw, r3.yyyy, T0[0].xzyw - if_nz r3.z - iadd r3.y, r0.w, l(161) - ld r8.xyzw, r3.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r4.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r12.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r12.zzwz - ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.xz, r4.xxzx - f16tof32 r9.yw, r12.xxxy - f16tof32 r10.xz, r4.yywy - f16tof32 r10.yw, r12.zzzw - ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r11.xz, r8.xxzx - f16tof32 r11.yw, r12.xxxy - f16tof32 r4.zw, r8.wwwy - f16tof32 r4.xy, r12.zwzz - break - default - mov r9.xy, r4.xzxx - mov r9.zw, l(0,0,0,0) - mov r10.xy, r4.ywyy - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.xzxx - mov r11.zw, l(0,0,0,0) - mov r4.xw, r8.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r8.x, r4.x - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r8.x, r4.z - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r8.x, r4.y - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r8.xyzw, r8.xyzw - mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r12.x, r4.x - mov r12.yz, r8.xxyx - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - utof r8.xy, r8.zwzz - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r13.x, r4.z - mov r13.yz, r12.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mov r12.x, r4.y - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r8.zw, r12.xxxw - mov r12.x, r4.w - and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r14.xyzx, r12.xyzx - movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) - mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) - mov r9.w, r8.x - mov r10.w, r8.y - mov r11.w, r8.z - mov r4.y, r8.w - break - case l(4) - ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r12.xz, r8.xxyx - mov r12.yw, r4.xxxz - ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r8.zzwz - ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r9.x, r4.x - f16tof32 r9.y, r8.x - f16tof32 r10.x, r4.z - f16tof32 r10.y, r8.y - f16tof32 r11.x, r4.y - f16tof32 r11.y, r8.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r8.w - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r9.x, r4.x - mov r9.yzw, l(0,0,0,0) - mov r10.x, r4.z - mov r10.yzw, l(0,0,0,0) - mov r11.x, r4.y - mov r11.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r5.xyzw, r9.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - add r7.xyzw, r7.xyzw, r11.xyzw - add r1.xyzw, r1.xyzw, r4.xyzw - uge r0.y, r0.y, l(6) - if_nz r0.y - mul r2.y, r2.y, l(0.250000) - ishl r4.xy, l(1, 81, 0, 0), r3.zzzz - iadd r4.xy, r0.wwww, r4.xyxx - ld r8.xyzw, r4.xxxx, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(3) - ld r9.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r8.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r8.xz, r13.zzwz - ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r9.xxxz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r9.xz, r13.zzwz - ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.xz, r8.xxzx - f16tof32 r10.yw, r13.xxxy - f16tof32 r11.xz, r8.yywy - f16tof32 r11.yw, r13.zzzw - ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) - f16tof32 r12.xz, r9.xxzx - f16tof32 r12.yw, r13.xxxy - f16tof32 r8.zw, r9.wwwy - f16tof32 r8.xy, r13.zwzz - break - default - mov r10.xy, r8.xzxx - mov r10.zw, l(0,0,0,0) - mov r11.xy, r8.ywyy - mov r11.zw, l(0,0,0,0) - mov r12.xy, r9.xzxx - mov r12.zw, l(0,0,0,0) - mov r8.xw, r9.wwwy - mov r8.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) - and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) - mov r9.x, r8.x - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) - mov r9.x, r8.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) - mov r9.x, r8.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) - and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) - mov r13.x, r8.x - mov r13.yz, r9.xxyx - and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) - and r14.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r14.xyzx, r13.xyzx - movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) - utof r4.xz, r9.zzwz - ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) - mov r13.x, r8.z - mov r13.yz, r9.xxwx - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) - mov r9.x, r8.y - and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r14.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r16.xyz, r14.xyzx - iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) - movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) - iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) - movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx - ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) - iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r14.xyzx, r9.xyzx - movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) - utof r13.xy, r9.xwxx - mov r9.x, r8.w - and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r15.xyzx, r9.xyzx - movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) - mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r10.w, r4.x - mov r11.w, r4.z - mov r12.w, r9.x - mov r8.y, r9.y - break - case l(4) - ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - mov r13.xz, r9.xxyx - mov r13.yw, r8.xxxz - ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r8.xz, r9.zzwz - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) - f16tof32 r10.x, r8.x - f16tof32 r10.y, r9.x - f16tof32 r11.x, r8.z - f16tof32 r11.y, r9.y - f16tof32 r12.x, r8.y - f16tof32 r12.y, r9.z - f16tof32 r8.w, r8.w - f16tof32 r8.x, r9.w - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r8.yz, l(0,0,0,0) - break - default - mov r10.x, r8.x - mov r10.yzw, l(0,0,0,0) - mov r11.x, r8.z - mov r11.yzw, l(0,0,0,0) - mov r12.x, r8.y - mov r12.yzw, l(0,0,0,0) - mov r8.xyz, l(0,0,0,0) - break - endswitch - endif - add r9.xyzw, r5.xyzw, r10.xyzw - add r10.xyzw, r6.xyzw, r11.xyzw - add r11.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r1.wxzy, r8.wxzy - ld r4.xyzw, r4.yyyy, T0[0].xzyw - if_nz r3.z - iadd r0.y, r0.w, l(163) - ld r12.xyzw, r0.yyyy, T0[0].xzyw - switch r3.w - case l(5) - ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r4.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r4.xz, r16.zzwz - ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - mov r17.xz, r16.xxyx - mov r17.yw, r12.xxxz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r12.xz, r16.zzwz - ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.xz, r4.xxzx - f16tof32 r13.yw, r16.xxxy - f16tof32 r14.xz, r4.yywy - f16tof32 r14.yw, r16.zzzw - ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) - f16tof32 r15.xz, r12.xxzx - f16tof32 r15.yw, r16.xxxy - f16tof32 r4.zw, r12.wwwy - f16tof32 r4.xy, r16.zwzz - break - default - mov r13.xy, r4.xzxx - mov r13.zw, l(0,0,0,0) - mov r14.xy, r4.ywyy - mov r14.zw, l(0,0,0,0) - mov r15.xy, r12.xzxx - mov r15.zw, l(0,0,0,0) - mov r4.xw, r12.wwwy - mov r4.yz, l(0,0,0,0) - break - endswitch - else - switch r3.w - case l(0) - case l(1) - ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) - and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) - mov r12.x, r4.x - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r12.x, r4.z - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r12.x, r4.y - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) - and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) - utof r12.xyzw, r12.xyzw - mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) - break - case l(3) - case l(12) - ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) - mov r16.x, r4.x - mov r16.yz, r12.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r0.yw, r12.zzzw - ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) - mov r16.x, r4.z - mov r16.yz, r12.xxwx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r12.x, r4.y - and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r16.xyzx, r12.xyzx - movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) - ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) - utof r3.yz, r12.xxwx - mov r12.x, r4.w - and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r12.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) - iadd r12.xyz, r17.xyzx, r12.xyzx - movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r13.w, r0.y - mov r14.w, r0.w - mov r15.w, r3.y - mov r4.y, r3.z - break - case l(4) - ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - mov r16.xz, r12.xxyx - mov r16.yw, r4.xxxz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.xz, r12.zzwz - ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - case l(6) - ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) - f16tof32 r13.x, r4.x - f16tof32 r13.y, r12.x - f16tof32 r14.x, r4.z - f16tof32 r14.y, r12.y - f16tof32 r15.x, r4.y - f16tof32 r15.y, r12.z - f16tof32 r4.w, r4.w - f16tof32 r4.x, r12.w - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r4.yz, l(0,0,0,0) - break - default - mov r13.x, r4.x - mov r13.yzw, l(0,0,0,0) - mov r14.x, r4.z - mov r14.yzw, l(0,0,0,0) - mov r15.x, r4.y - mov r15.yzw, l(0,0,0,0) - mov r4.xyz, l(0,0,0,0) - break - endswitch - endif - add r5.xyzw, r9.xyzw, r13.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - add r7.xyzw, r11.xyzw, r15.xyzw - add r1.xyzw, r4.xyzw, r8.ywzx - else - mov r2.y, r3.x - endif -endif -mul r3.xyzw, r2.yyyy, r5.xyzw -mul r4.xyzw, r2.yyyy, r6.xzwy -mul r5.xyzw, r2.yyyy, r7.xyzw -mul r1.xyzw, r1.wzyx, r2.yyyy -if_nz r2.z - mov r3.xz, r3.zzxz - mov r6.xz, r4.yyxy - mov r5.xz, r5.zzxz - mov r7.xz, r1.yyxy -else - mov r6.xz, r4.xxyx - mov r7.xz, r1.xxyx -endif -ubfe r0.y, l(6), l(7), CB0[0][0].z -switch r0.y - case l(26) - mov_sat r3.xyzw, r3.xyzw - mad r8.xyzw, r3.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r4.xy, r8.ywyy, l(0x00010000, 0x00010000, 0, 0), r8.xzxx - mov r6.yw, r4.wwwz - mov_sat r6.xyzw, r6.xyzw - mad r8.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r4.zw, r8.yyyw, l(0, 0, 0x00010000, 0x00010000), r8.xxxz - mov_sat r5.xyzw, r5.xyzw - mad r8.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.xy, r8.ywyy, l(0x00010000, 0x00010000, 0, 0), r8.xzxx - mov r7.yw, r1.wwwz - mov_sat r7.xyzw, r7.xyzw - mad r8.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r8.xyzw, r8.xyzw - imad r1.zw, r8.yyyw, l(0, 0, 0x00010000, 0x00010000), r8.xxxz - break - case l(32) - f32tof16 r8.xy, r3.xzxx - f32tof16 r8.zw, r6.xxxz - f32tof16 r9.xy, r3.ywyy - f32tof16 r9.zw, r4.wwwz - imad r4.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r8.xyzw - f32tof16 r8.xy, r5.xzxx - f32tof16 r8.zw, r7.xxxz - f32tof16 r9.xy, r5.ywyy - f32tof16 r9.zw, r1.wwwz - imad r1.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r8.xyzw - break - default - mov r4.xy, r3.xyxx - mov r4.z, r6.x - mov r1.xy, r5.xyxx - mov r1.z, r7.x - break -endswitch -if_nz r2.w - if_z vThreadID.x - mov r4.xy, r4.zwzz - mov r1.xy, r1.zwzz - endif - if_z vThreadID.y - mov r4.xyzw, r1.xyzw - endif -endif -bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, vThreadID.xyyx -bfi r2.y, l(10), l(5), CB0[0][0].w, l(0) -and r2.z, CB0[0][0].z, l(8) -if_nz r2.z - ubfe r2.z, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r5.x, r2.z, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r5.x, r2.w, r3.x - ushr r3.x, r2.y, l(5) - imad r2.w, r2.w, r3.x, r3.y - ishl r3.x, r0.z, l(11) - and r3.x, r3.x, l(0x00003000) - bfi r3.x, l(3), l(9), r0.w, r3.x - ishr r3.x, r3.x, l(6) - iadd r3.y, r3.z, r5.x - bfi r3.z, l(1), l(1), r3.y, l(0) - iadd r3.z, r3.z, r3.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r3.y, l(1), l(0), r3.y, r3.z - and r3.z, r3.x, l(240) - bfi r5.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r5.xxxy - bfi r3.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r3.xxxx, r3.zzwz - bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r2.zzzz, r3.xxxz - ubfe r3.x, l(3), l(6), r2.z - and r3.z, r3.y, l(6) - bfi r3.y, l(1), l(8), r3.y, l(0) - imad r3.x, r3.x, l(32), r3.y - imad r3.x, r3.z, l(4), r3.x - bfi r2.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r2.zzzw - bfi r2.w, l(9), l(3), r3.x, r2.w - bfi r2.z, l(6), l(0), r2.z, r2.w -else - ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r2.y, l(5) - imad r0.x, r3.y, r0.x, r3.x - ishl r2.yw, r0.zzzz, l(0, 5, 0, 7) - and r2.yw, r2.yyyw, l(0, 448, 0, 2048) - bfi r0.y, l(3), l(3), r0.w, r2.y - ishl r2.y, r2.y, l(1) - bfi r0.w, l(3), l(4), r0.w, r2.y - and r0.w, r0.w, l(992) - bfi r2.y, l(22), l(10), r0.x, r0.w - bfi r2.y, l(4), l(0), r0.y, r2.y - bfi r2.y, l(1), l(4), r0.z, r2.y - ishl r3.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r3.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r2.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r3.z, l(2) - iadd r0.y, r3.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r2.z, l(6), l(0), r2.y, r0.x -endif -ushr r0.x, r2.z, l(2) -ieq r0.y, r2.x, l(4) -if_nz r0.y - mov r4.xyzw, r4.yxwz - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) -or r0.zw, r2.zzzw, r2.yyyz -if_nz r0.z - ishl r3.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r3.xyzw, r5.xyzw -endif -if_nz r0.w - ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -iadd r0.z, r0.x, l(1) -if_nz r0.y - mov r1.zw, r1.wwwz - mov r1.xyzw, r1.yxzw - mov r2.x, l(2) -endif -ieq r2.xyz, r2.xxxx, l(1, 2, 3, 0) -or r0.yw, r2.yyyz, r2.xxxy -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -if_nz r0.w - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -ret -// Approximately 1149 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.cso deleted file mode 100644 index fe17beac3..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.h deleted file mode 100644 index ba5887ff8..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.h +++ /dev/null @@ -1,3162 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_64bpp.cs.hlsl -const uint8_t resolve_full_64bpp_cs[] = { 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b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.txt deleted file mode 100644 index 3bf35297f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.txt +++ /dev/null @@ -1,1271 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint4 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 23 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) -ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r2.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r2.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -movc r1.w, r4.z, l(1), l(0) -ishl r2.w, r5.x, r1.w -imad r2.w, r5.y, r3.y, r2.w -iadd r2.w, r2.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r1.w, r2.x, r1.w -imad r1.w, r2.w, l(1280), r1.w -iadd r2.x, r2.z, r4.z -ishl r2.y, l(4), r2.x -ishl r1.w, r1.w, l(2) -if_nz r4.z - ieq r2.z, r2.y, l(8) - if_nz r2.z - ld_raw r5.xyzw, r1.w, T0[0].zwxy - iadd r2.z, r1.w, l(16) - ld_raw r6.xyzw, r2.z, T0[0].zwxy - mov r7.xy, r5.zwzz - mov r8.xy, r6.zwzz - else - ld_raw r7.xy, r1.w, T0[0].xyxx - iadd r2.z, r2.y, r1.w - ld_raw r5.xy, r2.z, T0[0].xyxx - ishl r2.zw, l(0, 0, 8, 12), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r8.xy, r2.z, T0[0].xyxx - ld_raw r6.xy, r2.w, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r5.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) - ishr r9.xyzw, r6.zxwy, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.xxxy, l(0, 0, 16, 16) - f16tof32 r7.xz, r7.xxyx - f16tof32 r7.yw, r2.zzzw - ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) - f16tof32 r5.xz, r5.xxyx - f16tof32 r5.yw, r2.zzzw - ushr r2.zw, r8.xxxy, l(0, 0, 16, 16) - f16tof32 r8.xz, r8.xxyx - f16tof32 r8.yw, r2.zzzw - ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) - f16tof32 r6.xz, r6.xxyx - f16tof32 r6.yw, r2.zzzw - break - default - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - endswitch -else - ieq r2.z, r2.y, l(4) - if_nz r2.z - ld_raw r6.xyzw, r1.w, T0[0].wxyz - else - ld_raw r6.y, r1.w, T0[0].xxxx - iadd r2.z, r2.y, r1.w - ld_raw r6.z, r2.z, T0[0].xxxx - ishl r2.zw, l(0, 0, 8, 12), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r6.w, r2.z, T0[0].xxxx - ld_raw r6.x, r2.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r9.yzw, r6.yyyy, l(0, 8, 16, 24) - mov r9.x, r6.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r6.zzzz, l(0, 8, 16, 24) - mov r9.x, r6.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r6.wwww, l(0, 8, 16, 24) - mov r9.x, r6.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r6.yyyy, l(0, 10, 20, 30) - mov r9.x, r6.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r6.zzzz, l(0, 10, 20, 30) - mov r9.x, r6.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r6.wwww, l(0, 10, 20, 30) - mov r9.x, r6.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r6.yyyz, l(10, 20, 30, 30) - mov r10.x, r6.y - mov r10.yz, r9.xxyx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - utof r2.zw, r9.zzzw - ushr r9.xyzw, r6.zwwz, l(10, 10, 20, 20) - mov r10.x, r6.z - mov r10.yz, r9.xxwx - and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r12.xyzx, r10.xyzx - movc r5.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) - mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r9.x, r6.w - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r6.wxxx, l(30, 10, 20, 30) - utof r4.xy, r9.xwxx - mov r9.x, r6.x - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r6.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r7.w, r2.z - mov r5.w, r2.w - mov r8.w, r4.x - mov r6.w, r4.y - break - case l(4) - ishl r9.xyzw, r6.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r6.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.yz, r9.zzwz - ishr r9.xyzw, r6.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r6.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r6.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r6.y - f16tof32 r7.y, r9.x - f16tof32 r5.x, r6.z - f16tof32 r5.y, r9.y - f16tof32 r8.x, r6.w - f16tof32 r8.y, r9.z - f16tof32 r6.x, r6.x - f16tof32 r6.y, r9.w - mov r7.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r6.zw, l(0,0,0,0) - break - default - mov r7.x, r6.y - mov r7.yzw, l(0,0,0,0) - mov r5.x, r6.z - mov r5.yzw, l(0,0,0,0) - mov r8.x, r6.w - mov r8.yzw, l(0,0,0,0) - mov r6.yzw, l(0,0,0,0) - break - endswitch -endif -ibfe r2.z, l(6), l(16), CB0[0][0].z -ishl r2.z, r2.z, l(23) -iadd r2.z, r2.z, l(0x3f800000) -uge r2.w, r1.y, l(4) -if_nz r2.w - mul r2.w, r2.z, l(0.500000) - ishl r3.y, l(320), r4.z - iadd r3.y, r1.w, r3.y - if_nz r4.z - ieq r4.x, r2.y, l(8) - if_nz r4.x - ld_raw r9.xyzw, r3.y, T0[0].zwxy - iadd r4.x, r3.y, l(16) - ld_raw r10.xyzw, r4.x, T0[0].zwxy - mov r11.xy, r9.zwzz - mov r12.xy, r10.zwzz - else - ld_raw r11.xy, r3.y, T0[0].xyxx - iadd r4.x, r2.y, r3.y - ld_raw r9.xy, r4.x, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r3.yyyy, r4.xyxx - ld_raw r12.xy, r4.x, T0[0].xyxx - ld_raw r10.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) - f16tof32 r11.xz, r11.xxyx - f16tof32 r11.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) - f16tof32 r12.xz, r12.xxyx - f16tof32 r12.yw, r4.xxxy - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - break - default - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - endswitch - else - ieq r4.x, r2.y, l(4) - if_nz r4.x - ld_raw r10.xyzw, r3.y, T0[0].wxyz - else - ld_raw r10.y, r3.y, T0[0].xxxx - iadd r4.x, r2.y, r3.y - ld_raw r10.z, r4.x, T0[0].xxxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r3.yyyy, r4.xyxx - ld_raw r10.w, r4.x, T0[0].xxxx - ld_raw r10.x, r4.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r14.x, r10.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r4.xy, r13.zwzz - ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r14.x, r10.z - mov r14.yz, r13.xxwx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r13.x, r10.w - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r14.xy, r13.xwxx - mov r13.x, r10.x - and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r16.xyzx, r13.xyzx - movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) - mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r4.x - mov r9.w, r4.y - mov r12.w, r13.x - mov r10.w, r13.y - break - case l(4) - ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r10.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r13.zzwz - ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r13.x - f16tof32 r9.x, r10.z - f16tof32 r9.y, r13.y - f16tof32 r12.x, r10.w - f16tof32 r12.y, r13.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r13.w - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r9.x, r10.z - mov r9.yzw, l(0,0,0,0) - mov r12.x, r10.w - mov r12.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - endif - add r7.xyzw, r7.xyzw, r11.xyzw - add r5.xyzw, r5.xyzw, r9.xyzw - add r8.xyzw, r8.xyzw, r12.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r2.z, r2.z, l(0.250000) - ishl r4.xy, l(4, 324, 0, 0), r4.zzzz - iadd r1.yw, r1.wwww, r4.xxxy - if_nz r4.z - ieq r3.y, r2.y, l(8) - if_nz r3.y - ld_raw r9.xyzw, r1.y, T0[0].zwxy - iadd r3.y, r1.y, l(16) - ld_raw r10.xyzw, r3.y, T0[0].zwxy - mov r11.xy, r9.zwzz - mov r12.xy, r10.zwzz - else - ld_raw r11.xy, r1.y, T0[0].xyxx - iadd r3.y, r2.y, r1.y - ld_raw r9.xy, r3.y, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r12.xy, r4.x, T0[0].xyxx - ld_raw r10.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) - ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) - f16tof32 r11.xz, r11.xxyx - f16tof32 r11.yw, r4.xxxy - ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) - f16tof32 r9.xz, r9.xxyx - f16tof32 r9.yw, r4.xxxy - ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) - f16tof32 r12.xz, r12.xxyx - f16tof32 r12.yw, r4.xxxy - ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) - f16tof32 r10.xz, r10.xxyx - f16tof32 r10.yw, r4.xxxy - break - default - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - endswitch - else - ieq r3.y, r2.y, l(4) - if_nz r3.y - ld_raw r10.xyzw, r1.y, T0[0].wxyz - else - ld_raw r10.y, r1.y, T0[0].xxxx - iadd r3.y, r2.y, r1.y - ld_raw r10.z, r3.y, T0[0].xxxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r10.w, r4.x, T0[0].xxxx - ld_raw r10.x, r4.y, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r13.x, r10.y - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r13.x, r10.z - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) - mov r13.x, r10.w - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r13.xyzw, r13.xyzw - mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r14.x, r10.y - mov r14.yz, r13.xxyx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - utof r4.xy, r13.zwzz - ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r14.x, r10.z - mov r14.yz, r13.xxwx - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r13.x, r10.w - and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r15.xyzx, r13.xyzx - movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) - ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r14.xy, r13.xwxx - mov r13.x, r10.x - and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r13.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) - and r13.xyz, r13.xyzx, l(127, 127, 127, 0) - movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) - iadd r13.xyz, r16.xyzx, r13.xyzx - movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) - mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r11.w, r4.x - mov r9.w, r4.y - mov r12.w, r13.x - mov r10.w, r13.y - break - case l(4) - ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r14.xz, r13.xxyx - mov r14.yw, r10.yyyz - ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r13.zzwz - ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r13.x - f16tof32 r9.x, r10.z - f16tof32 r9.y, r13.y - f16tof32 r12.x, r10.w - f16tof32 r12.y, r13.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r13.w - mov r11.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r9.x, r10.z - mov r9.yzw, l(0,0,0,0) - mov r12.x, r10.w - mov r12.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - endif - add r11.xyzw, r7.xyzw, r11.xyzw - add r9.xyzw, r5.xyzw, r9.xyzw - add r12.xyzw, r8.xyzw, r12.xyzw - add r10.xyzw, r6.xyzw, r10.xyzw - if_nz r4.z - ieq r1.y, r2.y, l(8) - if_nz r1.y - ld_raw r13.xyzw, r1.w, T0[0].zwxy - iadd r1.y, r1.w, l(16) - ld_raw r14.xyzw, r1.y, T0[0].zwxy - mov r15.xy, r13.zwzz - mov r16.xy, r14.zwzz - else - ld_raw r15.xy, r1.w, T0[0].xyxx - iadd r1.y, r2.y, r1.w - ld_raw r13.xy, r1.y, T0[0].xyxx - ishl r4.xy, l(8, 12, 0, 0), r2.xxxx - iadd r4.xy, r1.wwww, r4.xyxx - ld_raw r16.xy, r4.x, T0[0].xyxx - ld_raw r14.xy, r4.y, T0[0].xyxx - endif - switch r4.w - case l(5) - ishl r15.zw, r15.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r15.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r13.zw, r13.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r13.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r16.zw, r16.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r16.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ishl r14.zw, r14.xxxy, l(0, 0, 16, 16) - ishr r17.xyzw, r14.zxwy, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r15.xyxx, l(16, 16, 0, 0) - f16tof32 r15.xz, r15.xxyx - f16tof32 r15.yw, r4.xxxy - ushr r4.xy, r13.xyxx, l(16, 16, 0, 0) - f16tof32 r13.xz, r13.xxyx - f16tof32 r13.yw, r4.xxxy - ushr r4.xy, r16.xyxx, l(16, 16, 0, 0) - f16tof32 r16.xz, r16.xxyx - f16tof32 r16.yw, r4.xxxy - ushr r4.xy, r14.xyxx, l(16, 16, 0, 0) - f16tof32 r14.xz, r14.xxyx - f16tof32 r14.yw, r4.xxxy - break - default - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - endswitch - else - ieq r1.y, r2.y, l(4) - if_nz r1.y - ld_raw r14.xyzw, r1.w, T0[0].wxyz - else - ld_raw r14.y, r1.w, T0[0].xxxx - iadd r1.y, r2.y, r1.w - ld_raw r14.z, r1.y, T0[0].xxxx - ishl r2.xy, l(8, 12, 0, 0), r2.xxxx - iadd r1.yw, r1.wwww, r2.xxxy - ld_raw r14.w, r1.y, T0[0].xxxx - ld_raw r14.x, r1.w, T0[0].xxxx - endif - switch r4.w - case l(0) - case l(1) - ushr r4.yzw, r14.yyyy, l(0, 8, 16, 24) - mov r4.x, r14.y - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r14.zzzz, l(0, 8, 16, 24) - mov r4.x, r14.z - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r13.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r14.wwww, l(0, 8, 16, 24) - mov r4.x, r14.w - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r16.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r4.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r14.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r4.yzw, r14.yyyy, l(0, 10, 20, 30) - mov r4.x, r14.y - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r14.zzzz, l(0, 10, 20, 30) - mov r4.x, r14.z - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r13.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r14.wwww, l(0, 10, 20, 30) - mov r4.x, r14.w - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r16.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r4.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r4.xyzw, r4.xyzw - mul r14.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r4.xyzw, r14.yyyz, l(10, 20, 30, 30) - mov r17.x, r14.y - mov r17.yz, r4.xxyx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r15.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - utof r1.yw, r4.zzzw - ushr r4.xyzw, r14.zwwz, l(10, 10, 20, 20) - mov r17.x, r14.z - mov r17.yz, r4.xxwx - and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r17.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) - and r17.xyz, r17.xyzx, l(127, 127, 127, 0) - movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) - iadd r17.xyz, r19.xyzx, r17.xyzx - movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) - mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) - mov r4.x, r14.w - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r16.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - ushr r4.xyzw, r14.wxxx, l(30, 10, 20, 30) - utof r2.xy, r4.xwxx - mov r4.x, r14.x - and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r4.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) - and r4.xyz, r4.xyzx, l(127, 127, 127, 0) - movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) - iadd r4.xyz, r18.xyzx, r4.xyzx - movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) - mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - mov r15.w, r1.y - mov r13.w, r1.w - mov r16.w, r2.x - mov r14.w, r2.y - break - case l(4) - ishl r4.xyzw, r14.yzwx, l(16, 16, 16, 16) - mov r17.xz, r4.xxyx - mov r17.yw, r14.yyyz - ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) - itof r17.xyzw, r17.xyzw - mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.yz, r4.zzwz - ishr r4.xyzw, r14.ywzx, l(16, 16, 16, 16) - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r4.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r4.xyzw, r14.yzwx, l(16, 16, 16, 16) - f16tof32 r15.x, r14.y - f16tof32 r15.y, r4.x - f16tof32 r13.x, r14.z - f16tof32 r13.y, r4.y - f16tof32 r16.x, r14.w - f16tof32 r16.y, r4.z - f16tof32 r14.x, r14.x - f16tof32 r14.y, r4.w - mov r15.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r15.x, r14.y - mov r15.yzw, l(0,0,0,0) - mov r13.x, r14.z - mov r13.yzw, l(0,0,0,0) - mov r16.x, r14.w - mov r16.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - endif - add r7.xyzw, r11.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r13.xyzw - add r8.xyzw, r12.xyzw, r16.xyzw - add r6.xyzw, r10.xyzw, r14.xyzw - else - mov r2.z, r2.w - endif -endif -mul r4.xyzw, r2.zzzz, r7.xyzw -mul r5.xyzw, r2.zzzz, r5.xzwy -mul r7.xyzw, r2.zzzz, r8.xyzw -mul r2.xyzw, r2.zzzz, r6.xzwy -if_nz r3.z - mov r4.xz, r4.zzxz - mov r6.xz, r5.yyxy - mov r7.xz, r7.zzxz - mov r8.xz, r2.yyxy -else - mov r6.xz, r5.xxyx - mov r8.xz, r2.xxyx -endif -ubfe r1.y, l(6), l(7), CB0[0][0].z -switch r1.y - case l(26) - mov_sat r4.xyzw, r4.xyzw - mad r9.xyzw, r4.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r5.xy, r9.ywyy, l(0x00010000, 0x00010000, 0, 0), r9.xzxx - mov r6.yw, r5.wwwz - mov_sat r6.xyzw, r6.xyzw - mad r9.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r5.zw, r9.yyyw, l(0, 0, 0x00010000, 0x00010000), r9.xxxz - mov_sat r7.xyzw, r7.xyzw - mad r9.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r2.xy, r9.ywyy, l(0x00010000, 0x00010000, 0, 0), r9.xzxx - mov r8.yw, r2.wwwz - mov_sat r8.xyzw, r8.xyzw - mad r9.xyzw, r8.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r9.xyzw, r9.xyzw - imad r2.zw, r9.yyyw, l(0, 0, 0x00010000, 0x00010000), r9.xxxz - break - case l(32) - f32tof16 r9.xy, r4.xzxx - f32tof16 r9.zw, r6.xxxz - f32tof16 r10.xy, r4.ywyy - f32tof16 r10.zw, r5.wwwz - imad r5.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.xyzw - f32tof16 r9.xy, r7.xzxx - f32tof16 r9.zw, r8.xxxz - f32tof16 r10.xy, r7.ywyy - f32tof16 r10.zw, r2.wwwz - imad r2.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.xyzw - break - default - mov r5.xy, r4.xyxx - mov r5.z, r6.x - mov r2.xy, r7.xyxx - mov r2.z, r8.x - break -endswitch -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r4.x - ushr r3.y, r1.x, l(5) - imad r1.z, r1.z, r3.y, r4.y - ishl r3.y, r0.z, l(11) - and r3.y, r3.y, l(0x00003000) - bfi r3.y, l(3), l(9), r0.w, r3.y - ishr r3.y, r3.y, l(6) - iadd r1.w, r1.w, r4.z - bfi r3.z, l(1), l(1), r1.w, l(0) - iadd r3.z, r3.z, r4.w - bfi r3.z, l(2), l(1), r3.z, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.z - bfi r3.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r1.zzzz, l(0, 0, 0, 0) - imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz - bfi r1.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r1.yyyy, r3.yyzy - bfi r3.y, l(1), l(4), r0.z, l(0) - ubfe r3.z, l(3), l(6), r1.y - and r3.w, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.z, l(32), r1.w - imad r1.w, r3.w, l(4), r1.w - bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r4.y, r0.x, r4.x - ishl r1.xz, r0.zzzz, l(6, 0, 7, 0) - and r1.xz, r1.xxzx, l(896, 0, 2048, 0) - bfi r0.y, l(3), l(4), r0.w, r1.x - bfi r0.y, l(22), l(10), r0.x, r0.y - bfi r0.z, l(1), l(4), r0.z, l(0) - iadd r0.y, r0.y, r0.z - ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) - bfi r1.xw, l(3, 0, 0, 3), l(7, 0, 0, 6), r0.wwww, r1.xxxw - bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r1.xxxw - imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.z, r0.z, l(1792) - iadd r0.x, r0.x, r0.z - and r0.z, r4.z, l(2) - iadd r0.z, r4.w, r0.z - bfi r0.z, l(2), l(6), r0.z, l(0) - iadd r0.x, r0.x, r0.z - bfi r1.y, l(6), l(0), r0.y, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(4) -ieq r0.y, r3.x, l(4) -if_nz r0.y - mov r5.xyzw, r5.yxwz - mov r0.z, l(2) -else - mov r0.z, r3.x -endif -ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) -or r0.zw, r1.yyyz, r1.xxxy -if_nz r0.z - ishl r1.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r1.xyzw, r4.xyzw -endif -if_nz r0.w - ushr r1.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -iadd r0.x, r0.x, l(2) -if_nz r0.y - mov r2.xyzw, r2.yxwz - mov r3.x, l(2) -endif -ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r1.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -ret -// Approximately 1223 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.cso deleted file mode 100644 index 5010fe81e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h deleted file mode 100644 index 20ff03950..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h +++ /dev/null @@ -1,5168 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_64bpp_from_32bpp_3xres.cs.hlsl -const uint8_t resolve_full_64bpp_from_32bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x06, 0xC3, 0xF5, 0x3C, 0x74, 0xF4, 0xF7, 0xF6, - 0xB6, 0x12, 0x2F, 0x2F, 0xBE, 0x2C, 0x42, 0x7B, 0x01, 0x00, 0x00, 0x00, - 0x08, 0xF2, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x6C, 0xF1, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.txt deleted file mode 100644 index b2518d002..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.txt +++ /dev/null @@ -1,1959 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 26 -dcl_thread_group 8, 8, 1 -and r0.xyzw, CB0[0][0].zxzx, l(7, 0x40000000, 8, 1023) -ieq r1.xy, vThreadID.xyxx, l(0, 0, 0, 0) -movc r1.xy, r0.yyyy, r1.xyxx, l(0,0,0,0) -ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r2.z, CB0[0][0].y -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) -iadd r3.xyzw, r3.xyzw, vThreadID.xyyx -bfi r0.y, l(10), l(5), CB0[0][0].w, l(0) -if_nz r0.z - ubfe r0.z, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) - ishr r1.w, r0.z, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r4.x - ushr r2.w, r0.y, l(5) - imad r1.z, r1.z, r2.w, r4.y - ishl r2.w, r3.z, l(11) - and r2.w, r2.w, l(0x00003000) - bfi r2.w, l(3), l(9), r3.w, r2.w - ishr r2.w, r2.w, l(6) - iadd r1.w, r1.w, r4.z - bfi r4.xyz, l(1, 19, 19, 0), l(1, 11, 14, 0), r1.wzzw, l(0, 0, 0, 0) - iadd r4.x, r4.x, r4.w - bfi r4.x, l(2), l(1), r4.x, l(0) - bfi r1.w, l(1), l(0), r1.w, r4.x - and r4.x, r2.w, l(240) - imad r4.xy, r4.xxxx, l(2, 16, 0, 0), r4.yzyy - bfi r4.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r2.wwww, r4.xyxx - bfi r4.xy, l(2, 2, 0, 0), l(9, 12, 0, 0), r0.zzzz, r4.xyxx - ubfe r0.z, l(3), l(6), r4.x - and r1.z, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r0.z, r0.z, l(32), r1.w - imad r0.z, r1.z, l(4), r0.z - bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r3.zzzz, r4.xxxy - bfi r0.z, l(9), l(3), r0.z, r1.w - bfi r0.z, l(6), l(0), r1.z, r0.z -else - ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) - ushr r0.y, r0.y, l(5) - imad r0.y, r4.y, r0.y, r4.x - ishl r1.zw, r3.zzzz, l(0, 0, 5, 7) - and r1.zw, r1.zzzw, l(0, 0, 448, 2048) - bfi r2.w, l(3), l(3), r3.w, r1.z - ishl r1.z, r1.z, l(1) - bfi r1.z, l(3), l(4), r3.w, r1.z - and r1.z, r1.z, l(992) - bfi r3.x, l(22), l(10), r0.y, r1.z - bfi r3.x, l(4), l(0), r2.w, r3.x - bfi r3.x, l(1), l(4), r3.z, r3.x - ishl r3.yw, r1.zzzz, l(0, 3, 0, 2) - bfi r3.yw, l(0, 22, 0, 22), l(0, 13, 0, 12), r0.yyyy, r3.yyyw - bfi r3.yw, l(0, 4, 0, 4), l(0, 3, 0, 2), r2.wwww, r3.yyyw - bfi r3.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), r3.zzzz, r3.yywy - bfi r0.y, l(12), l(0), r1.w, r3.y - and r1.z, r3.z, l(1792) - iadd r0.y, r0.y, r1.z - and r1.z, r4.z, l(2) - iadd r1.z, r4.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r0.y, r0.y, r1.z - bfi r0.z, l(6), l(0), r3.x, r0.y -endif -imul null, r0.y, r0.z, l(9) -ushr r0.y, r0.y, l(3) -bfi r1.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) -iadd r1.zw, r1.zzzw, vThreadID.xxxy -ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx -uge r0.z, l(3), r2.y -if_nz r0.z - mov r4.y, r2.y -else - ieq r0.z, r2.y, l(5) - if_nz r0.z - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r2.xz, r3.zzzz, l(2, 0, 1, 0) -and r2.xz, r2.xxzx, l(1, 0, 1, 0) -ishl r1.zw, r1.zzzw, r2.xxxz -ushr r4.x, r4.y, l(1) -and r2.xz, r4.xxyx, l(1, 0, 1, 0) -iadd r1.zw, r1.zzzw, r2.xxxz -udiv r2.xz, null, r1.zzwz, l(80, 0, 16, 0) -movc r0.z, r3.w, l(1), l(0) -ishl r2.w, r2.x, r0.z -imad r0.w, r2.z, r0.w, r2.w -iadd r0.w, r0.w, r3.y -imad r1.zw, -r2.xxxz, l(0, 0, 80, 16), r1.zzzw -imad r1.z, r1.w, l(80), r1.z -ishl r0.z, r1.z, r0.z -imad r0.z, r0.w, l(1280), r0.z -imul null, r0.w, r0.z, l(36) -ubfe r1.z, l(4), l(25), CB0[0][0].x -ld_raw r4.xyzw, r0.w, T0[0].wxyz -imad r2.xz, r0.zzzz, l(36, 0, 36, 0), l(16, 0, 20, 0) -ld_raw r5.x, r2.x, T0[0].xxxx -switch r1.z - case l(0) - case l(1) - ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) - mov r9.x, r4.y - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) - mov r9.x, r4.z - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) - mov r9.x, r4.w - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r9.xyzw, r9.xyzw - mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) - mov r10.x, r4.y - mov r10.yz, r9.xxyx - and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) - utof r2.xw, r9.zzzw - ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) - mov r10.x, r4.z - mov r10.yz, r9.xxwx - and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r7.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) - mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) - mov r9.x, r4.w - and r3.yzw, r9.xxyz, l(0, 1023, 1023, 1023) - and r10.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r12.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r11.xyzx, r10.xyzx, r9.xyzx - ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r10.xyzx, r9.xyzx - movc r8.xyz, r3.yzwy, r9.xyzx, l(0,0,0,0) - ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) - utof r3.yz, r9.xxwx - mov r9.x, r4.x - and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r9.xyz, r9.xyzx, l(127, 127, 127, 0) - movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) - iadd r9.xyz, r11.xyzx, r9.xyzx - movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r9.xyz, r5.xyzx, l(1023, 1023, 1023, 0) - and r10.xyz, r5.xyzx, l(127, 127, 127, 0) - ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx - firstbit_hi r12.xyz, r10.xyzx - iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) - movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) - iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) - movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx - bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r5.xyzx, l(0, 0, 0, 0) - and r12.xyz, r12.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx - ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r5.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) - utof r0.w, r5.w - mul r5.w, r0.w, l(0.333333) - mov r6.w, r2.x - mov r7.w, r2.w - mov r8.w, r3.y - mov r4.w, r3.z - break - case l(4) - ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - mov r10.xz, r9.xxyx - mov r10.yw, r4.yyyz - ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r4.yz, r9.zzwz - ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r5.y, r5.x, l(16) - ishr r2.xw, r5.yyyx, l(16, 0, 0, 16) - itof r2.xw, r2.xxxw - mul r2.xw, r2.xxxw, l(0.000977, 0.000000, 0.000000, 0.000977) - max r5.xy, r2.xwxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) - f16tof32 r6.x, r4.y - f16tof32 r6.y, r9.x - f16tof32 r7.x, r4.z - f16tof32 r7.y, r9.y - f16tof32 r8.x, r4.w - f16tof32 r8.y, r9.z - f16tof32 r4.x, r4.x - f16tof32 r4.y, r9.w - ushr r0.w, r5.x, l(16) - f16tof32 r5.x, r5.x - f16tof32 r5.y, r0.w - mov r6.zw, l(0,0,0,0) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r4.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r6.x, r4.y - mov r6.yzw, l(0,0,0,0) - mov r7.x, r4.z - mov r7.yzw, l(0,0,0,0) - mov r8.x, r4.w - mov r8.yzw, l(0,0,0,0) - mov r4.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -ibfe r0.w, l(6), l(16), CB0[0][0].z -ishl r0.w, r0.w, l(23) -iadd r0.w, r0.w, l(0x3f800000) -uge r1.w, r2.y, l(4) -if_nz r1.w - mul r2.x, r0.w, l(0.500000) - imad r3.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 2880, 2896, 0) - ld_raw r9.xyzw, r3.y, T0[0].wxyz - ld_raw r10.x, r3.z, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) - mov r14.x, r9.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) - mov r14.x, r9.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) - mov r14.x, r9.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) - mov r15.x, r9.y - mov r15.yz, r14.xxyx - and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) - and r16.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r16.xyzx, r15.xyzx - movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) - utof r3.yz, r14.zzwz - ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) - mov r15.x, r9.z - mov r15.yz, r14.xxwx - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r14.x, r9.w - and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r16.xyzx, r14.xyzx - movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) - utof r15.xy, r14.xwxx - mov r14.x, r9.x - and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r17.xyzx, r14.xyzx - movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) - mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r2.w, r10.w - mul r10.w, r2.w, l(0.333333) - mov r11.w, r3.y - mov r12.w, r3.z - mov r13.w, r14.x - mov r9.w, r14.y - break - case l(4) - ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r9.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r9.yz, r14.zzwz - ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r10.y, r10.x, l(16) - ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r9.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r9.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r9.w - f16tof32 r13.y, r14.z - f16tof32 r9.x, r9.x - f16tof32 r9.y, r14.w - ushr r2.w, r10.x, l(16) - f16tof32 r10.x, r10.x - f16tof32 r10.y, r2.w - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r9.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r9.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r9.w - mov r13.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r11.xyzw - add r7.xyzw, r7.xyzw, r12.xyzw - add r8.xyzw, r8.xyzw, r13.xyzw - add r4.xyzw, r4.xyzw, r9.xyzw - add r5.xyzw, r5.xyzw, r10.xyzw - uge r2.w, r2.y, l(6) - if_nz r2.w - mul r2.x, r0.w, l(0.250000) - imad r9.xyzw, r0.zzzz, l(36, 36, 36, 36), l(36, 52, 2916, 2932) - ld_raw r10.xyzw, r9.x, T0[0].wxyz - ld_raw r11.x, r9.y, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) - and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r15.x, r10.y - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r15.x, r10.z - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) - mov r15.x, r10.w - and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) - utof r15.xyzw, r15.xyzw - mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r16.x, r10.y - mov r16.yz, r15.xxyx - and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) - and r17.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) - utof r3.yz, r15.zzwz - ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r16.x, r10.z - mov r16.yz, r15.xxwx - and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) - and r18.xyz, r16.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx - firstbit_hi r20.xyz, r18.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) - and r16.xyz, r16.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r18.xyzx, r16.xyzx - movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r15.x, r10.w - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r9.xy, r15.xwxx - mov r15.x, r10.x - and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) - and r17.xyz, r15.xyzx, l(127, 127, 127, 0) - ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx - firstbit_hi r19.xyz, r17.xyzx - iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) - movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) - iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) - movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx - bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) - and r15.xyz, r15.xyzx, l(127, 127, 127, 0) - movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx - ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) - iadd r15.xyz, r17.xyzx, r15.xyzx - movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) - mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) - and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r11.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx - ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) - iadd r16.xyz, r17.xyzx, r16.xyzx - movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) - utof r2.w, r11.w - mul r11.w, r2.w, l(0.333333) - mov r12.w, r3.y - mov r13.w, r3.z - mov r14.w, r9.x - mov r10.w, r9.y - break - case l(4) - ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r16.xz, r15.xxyx - mov r16.yw, r10.yyyz - ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) - itof r16.xyzw, r16.xyzw - mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r15.zzwz - ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r11.y, r11.x, l(16) - ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - case l(6) - ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r12.x, r10.y - f16tof32 r12.y, r15.x - f16tof32 r13.x, r10.z - f16tof32 r13.y, r15.y - f16tof32 r14.x, r10.w - f16tof32 r14.y, r15.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r15.w - ushr r2.w, r11.x, l(16) - f16tof32 r11.x, r11.x - f16tof32 r11.y, r2.w - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - mov r11.zw, l(0,0,0,0) - break - default - mov r12.x, r10.y - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.z - mov r13.yzw, l(0,0,0,0) - mov r14.x, r10.w - mov r14.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - mov r11.yzw, l(0,0,0,0) - break - endswitch - add r12.xyzw, r6.xyzw, r12.xyzw - add r13.xyzw, r7.xyzw, r13.xyzw - add r14.xyzw, r8.xyzw, r14.xyzw - add r10.xyzw, r4.xyzw, r10.xyzw - add r11.xyzw, r5.xyzw, r11.xyzw - ld_raw r15.xyzw, r9.z, T0[0].wxyz - ld_raw r9.x, r9.w, T0[0].xxxx - switch r1.z - case l(0) - case l(1) - ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) - and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) - mov r19.x, r15.y - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) - mov r19.x, r15.z - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) - mov r19.x, r15.w - and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) - utof r19.xyzw, r19.xyzw - mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) - mov r20.x, r15.y - mov r20.yz, r19.xxyx - and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) - and r21.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r21.xyzx, r20.xyzx - movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) - utof r3.yz, r19.zzwz - ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) - mov r20.x, r15.z - mov r20.yz, r19.xxwx - and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r20.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) - and r20.xyz, r20.xyzx, l(127, 127, 127, 0) - movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) - iadd r20.xyz, r22.xyzx, r20.xyzx - movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r19.x, r15.w - and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx - ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r21.xyzx, r19.xyzx - movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) - ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) - utof r20.xy, r19.xwxx - mov r19.x, r15.x - and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) - and r22.xyz, r19.xyzx, l(127, 127, 127, 0) - ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx - firstbit_hi r24.xyz, r22.xyzx - iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) - movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) - iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) - movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx - bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) - and r19.xyz, r19.xyzx, l(127, 127, 127, 0) - movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx - ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) - iadd r19.xyz, r22.xyzx, r19.xyzx - movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) - mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) - ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) - and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) - and r21.xyz, r9.xyzx, l(127, 127, 127, 0) - ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx - firstbit_hi r23.xyz, r21.xyzx - iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) - movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) - iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) - movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx - bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) - and r23.xyz, r23.xyzx, l(127, 127, 127, 0) - movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx - ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) - iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) - iadd r21.xyz, r22.xyzx, r21.xyzx - movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) - utof r2.w, r9.w - mul r9.w, r2.w, l(0.333333) - mov r16.w, r3.y - mov r17.w, r3.z - mov r18.w, r19.x - mov r15.w, r19.y - break - case l(4) - ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - mov r20.xz, r19.xxyx - mov r20.yw, r15.yyyz - ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) - itof r20.xyzw, r20.xyzw - mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.yz, r19.zzwz - ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - ishl r9.y, r9.x, l(16) - ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) - itof r3.yz, r3.yyzy - mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) - max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - case l(6) - ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) - f16tof32 r16.x, r15.y - f16tof32 r16.y, r19.x - f16tof32 r17.x, r15.z - f16tof32 r17.y, r19.y - f16tof32 r18.x, r15.w - f16tof32 r18.y, r19.z - f16tof32 r15.x, r15.x - f16tof32 r15.y, r19.w - ushr r2.w, r9.x, l(16) - f16tof32 r9.x, r9.x - f16tof32 r9.y, r2.w - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r18.zw, l(0,0,0,0) - mov r15.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - break - default - mov r16.x, r15.y - mov r16.yzw, l(0,0,0,0) - mov r17.x, r15.z - mov r17.yzw, l(0,0,0,0) - mov r18.x, r15.w - mov r18.yzw, l(0,0,0,0) - mov r15.yzw, l(0,0,0,0) - mov r9.yzw, l(0,0,0,0) - break - endswitch - add r6.xyzw, r12.xyzw, r16.xyzw - add r7.xyzw, r13.xyzw, r17.xyzw - add r8.xyzw, r14.xyzw, r18.xyzw - add r4.xyzw, r10.xyzw, r15.xyzw - add r5.xyzw, r9.xyzw, r11.xyzw - endif -else - mov r2.x, r0.w -endif -mul r6.xyzw, r2.xxxx, r6.xyzw -mul r7.xyzw, r2.xxxx, r7.xzwy -mul r8.xyzw, r2.xxxx, r8.xyzw -mul r4.xyzw, r2.xxxx, r4.xzwy -mul r5.xyzw, r2.xxxx, r5.xyzw -and r2.x, CB0[0][0].z, l(0x01000000) -if_nz r2.x - mov r6.xz, r6.zzxz - mov r9.xz, r7.yyxy - mov r8.xz, r8.zzxz - mov r10.xz, r4.yyxy - mov r5.xz, r5.zzxz -else - mov r9.xz, r7.xxyx - mov r10.xz, r4.xxyx -endif -switch r3.x - case l(26) - mov_sat r6.xyzw, r6.xyzw - mad r11.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r7.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx - mov r9.yw, r7.wwwz - mov_sat r9.xyzw, r9.xyzw - mad r11.xyzw, r9.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r7.zw, r11.yyyw, l(0, 0, 0x00010000, 0x00010000), r11.xxxz - mov_sat r8.xyzw, r8.xyzw - mad r11.xyzw, r8.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r4.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx - mov r10.yw, r4.wwwz - mov_sat r10.xyzw, r10.xyzw - mad r11.xyzw, r10.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r4.zw, r11.yyyw, l(0, 0, 0x00010000, 0x00010000), r11.xxxz - mov_sat r5.xyzw, r5.xyzw - mad r11.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r11.xyzw, r11.xyzw - imad r5.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx - break - case l(32) - f32tof16 r11.xy, r6.xzxx - f32tof16 r11.zw, r9.xxxz - f32tof16 r12.xy, r6.ywyy - f32tof16 r12.zw, r7.wwwz - imad r7.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyzw - f32tof16 r11.xy, r8.xzxx - f32tof16 r11.zw, r10.xxxz - f32tof16 r12.xy, r8.ywyy - f32tof16 r12.zw, r4.wwwz - imad r4.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyzw - f32tof16 r3.yz, r5.xxzx - f32tof16 r5.zw, r5.yyyw - imad r5.xy, r5.zwzz, l(0x00010000, 0x00010000, 0, 0), r3.yzyy - break - default - mov r7.xy, r6.xyxx - mov r7.z, r9.x - mov r4.xy, r8.xyxx - mov r4.z, r10.x - break -endswitch -ieq r2.w, r0.x, l(4) -if_nz r2.w - mov r7.xyzw, r7.yxwz - mov r4.xyzw, r4.yxwz - mov r5.xy, r5.yxyy - mov r3.y, l(2) -else - mov r3.y, r0.x -endif -ieq r3.yzw, r3.yyyy, l(0, 1, 2, 3) -or r3.yz, r3.zzwz, r3.yyzy -if_nz r3.y - ishl r6.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r7.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r7.xyzw, r6.xyzw, r8.xyzw - ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r6.xyzw, r8.xyzw - ishl r3.yw, r5.xxxy, l(0, 8, 0, 8) - and r3.yw, r3.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r5.xy, r3.ywyy, r5.zwzz -endif -if_nz r3.z - ushr r6.xyzw, r7.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r6.xyzw - ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw - ushr r3.yz, r5.xxyx, l(0, 16, 16, 0) - bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.yzyy -endif -if_nz r1.x - mov r7.xy, r7.zwzz - mov r4.zw, r5.xxxy -endif -if_nz r1.y - mov r7.xy, r4.zwzz - mov r7.zw, r5.xxxy -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r7.xyxx -iadd r6.xyzw, r0.yyyy, l(1, 3, 4, 2) -store_uav_typed U0[0].xyzw, r6.xxxx, r7.zwzz -store_uav_typed U0[0].xyzw, r6.yyyy, r4.zwzz -store_uav_typed U0[0].xyzw, r6.zzzz, r5.xyxx -ld_raw r5.xyzw, r2.z, T0[0].wxyz -switch r1.z - case l(0) - case l(1) - ushr r10.yzw, r5.yyyy, l(0, 8, 16, 24) - mov r10.x, r5.y - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r5.zzzz, l(0, 8, 16, 24) - mov r10.x, r5.z - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r5.wwww, l(0, 8, 16, 24) - mov r10.x, r5.w - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) - and r10.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r10.yzw, r5.yyyy, l(0, 10, 20, 30) - mov r10.x, r5.y - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r5.zzzz, l(0, 10, 20, 30) - mov r10.x, r5.z - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r5.wwww, l(0, 10, 20, 30) - mov r10.x, r5.w - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) - and r10.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) - utof r10.xyzw, r10.xyzw - mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r10.xyzw, r5.yyyz, l(10, 20, 30, 30) - mov r6.x, r5.y - mov r6.yz, r10.xxyx - and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) - and r11.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r13.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r12.xyzx, r11.xyzx, r6.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r11.xyzx, r6.xyzx - movc r7.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) - utof r3.yz, r10.zzwz - ushr r10.xyzw, r5.zwwz, l(10, 10, 20, 20) - mov r6.x, r5.z - mov r6.yz, r10.xxwx - and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r12.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r14.xyz, r12.xyzx - iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) - movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) - iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) - movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r13.xyzx, r12.xyzx, r6.xyzx - ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) - iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r12.xyzx, r6.xyzx - movc r8.xyz, r11.xyzx, r6.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r10.x, r5.w - and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r9.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) - ushr r10.xyzw, r5.wxxx, l(30, 10, 20, 30) - utof r4.zw, r10.xxxw - mov r10.x, r5.x - and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) - and r11.xyz, r10.xyzx, l(127, 127, 127, 0) - ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx - firstbit_hi r13.xyz, r11.xyzx - iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) - movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) - iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) - movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx - bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) - and r10.xyz, r10.xyzx, l(127, 127, 127, 0) - movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx - ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) - iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) - iadd r10.xyz, r11.xyzx, r10.xyzx - movc r5.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r7.w, r3.y - mov r8.w, r3.z - mov r9.w, r4.z - mov r5.w, r4.w - break - case l(4) - ishl r10.xyzw, r5.yzwx, l(16, 16, 16, 16) - mov r11.xz, r10.xxyx - mov r11.yw, r5.yyyz - ishr r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r8.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r5.yz, r10.zzwz - ishr r10.xyzw, r5.ywzx, l(16, 16, 16, 16) - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - case l(6) - ushr r10.xyzw, r5.yzwx, l(16, 16, 16, 16) - f16tof32 r7.x, r5.y - f16tof32 r7.y, r10.x - f16tof32 r8.x, r5.z - f16tof32 r8.y, r10.y - f16tof32 r9.x, r5.w - f16tof32 r9.y, r10.z - f16tof32 r5.x, r5.x - f16tof32 r5.y, r10.w - mov r7.zw, l(0,0,0,0) - mov r8.zw, l(0,0,0,0) - mov r9.zw, l(0,0,0,0) - mov r5.zw, l(0,0,0,0) - break - default - mov r7.x, r5.y - mov r7.yzw, l(0,0,0,0) - mov r8.x, r5.z - mov r8.yzw, l(0,0,0,0) - mov r9.x, r5.w - mov r9.yzw, l(0,0,0,0) - mov r5.yzw, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.w, r0.w, l(0.500000) - imad r2.z, r0.z, l(36), l(2900) - ld_raw r10.xyzw, r2.z, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r6.x, r10.y - mov r6.yz, r14.xxyx - and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) - and r15.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r17.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r16.xyzx, r15.xyzx, r6.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r15.xyzx, r6.xyzx - movc r11.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) - utof r3.yz, r14.zzwz - ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r6.x, r10.z - mov r6.yz, r14.xxwx - and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r16.xyzx, r6.xyzx - movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r14.x, r10.w - and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r4.zw, r14.xxxw - mov r14.x, r10.x - and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r11.w, r3.y - mov r12.w, r3.z - mov r13.w, r4.z - mov r10.w, r4.w - break - case l(4) - ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r10.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r14.zzwz - ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r10.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r10.w - f16tof32 r13.y, r14.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r14.w - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r10.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.w - mov r13.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r7.xyzw, r11.xyzw - add r8.xyzw, r8.xyzw, r12.xyzw - add r9.xyzw, r9.xyzw, r13.xyzw - add r5.xyzw, r5.xyzw, r10.xyzw - uge r2.y, r2.y, l(6) - if_nz r2.y - mul r0.w, r0.w, l(0.250000) - imad r2.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 56, 2936, 0) - ld_raw r10.xyzw, r2.y, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) - and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) - mov r14.x, r10.y - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) - mov r14.x, r10.z - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) - mov r14.x, r10.w - and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) - and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) - utof r14.xyzw, r14.xyzw - mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) - mov r6.x, r10.y - mov r6.yz, r14.xxyx - and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) - and r15.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r17.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r16.xyzx, r15.xyzx, r6.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r15.xyzx, r6.xyzx - movc r11.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) - utof r3.yz, r14.zzwz - ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) - mov r6.x, r10.z - mov r6.yz, r14.xxwx - and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) - and r16.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r18.xyz, r16.xyzx - iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) - movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) - iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) - movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx - ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) - iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r16.xyzx, r6.xyzx - movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r14.x, r10.w - and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) - ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) - utof r4.zw, r14.xxxw - mov r14.x, r10.x - and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) - and r15.xyz, r14.xyzx, l(127, 127, 127, 0) - ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx - firstbit_hi r17.xyz, r15.xyzx - iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) - movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) - iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) - movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx - bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) - and r14.xyz, r14.xyzx, l(127, 127, 127, 0) - movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx - ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) - iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) - iadd r14.xyz, r15.xyzx, r14.xyzx - movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) - mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) - mov r11.w, r3.y - mov r12.w, r3.z - mov r13.w, r4.z - mov r10.w, r4.w - break - case l(4) - ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - mov r15.xz, r14.xxyx - mov r15.yw, r10.yyyz - ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - itof r15.xyzw, r15.xyzw - mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r10.yz, r14.zzwz - ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) - itof r14.xyzw, r14.xyzw - mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - case l(6) - ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) - f16tof32 r11.x, r10.y - f16tof32 r11.y, r14.x - f16tof32 r12.x, r10.z - f16tof32 r12.y, r14.y - f16tof32 r13.x, r10.w - f16tof32 r13.y, r14.z - f16tof32 r10.x, r10.x - f16tof32 r10.y, r14.w - mov r11.zw, l(0,0,0,0) - mov r12.zw, l(0,0,0,0) - mov r13.zw, l(0,0,0,0) - mov r10.zw, l(0,0,0,0) - break - default - mov r11.x, r10.y - mov r11.yzw, l(0,0,0,0) - mov r12.x, r10.z - mov r12.yzw, l(0,0,0,0) - mov r13.x, r10.w - mov r13.yzw, l(0,0,0,0) - mov r10.yzw, l(0,0,0,0) - break - endswitch - add r11.xyzw, r7.xyzw, r11.xyzw - add r12.xyzw, r8.xyzw, r12.xyzw - add r13.xyzw, r9.xyzw, r13.xyzw - add r10.xyzw, r5.xyzw, r10.xyzw - ld_raw r14.xyzw, r2.z, T0[0].wxyz - switch r1.z - case l(0) - case l(1) - ushr r18.yzw, r14.yyyy, l(0, 8, 16, 24) - mov r18.x, r14.y - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r14.zzzz, l(0, 8, 16, 24) - mov r18.x, r14.z - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r18.yzw, r14.wwww, l(0, 8, 16, 24) - mov r18.x, r14.w - and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) - and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) - utof r18.xyzw, r18.xyzw - mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - ushr r18.yzw, r14.yyyy, l(0, 10, 20, 30) - mov r18.x, r14.y - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r14.zzzz, l(0, 10, 20, 30) - mov r18.x, r14.z - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r18.yzw, r14.wwww, l(0, 10, 20, 30) - mov r18.x, r14.w - and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) - and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) - utof r18.xyzw, r18.xyzw - mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) - break - case l(3) - case l(12) - ushr r18.xyzw, r14.yyyz, l(10, 20, 30, 30) - mov r6.x, r14.y - mov r6.yz, r18.xxyx - and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) - and r19.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r19.xyzx, r6.xyzx - movc r15.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) - utof r2.yz, r18.zzwz - ushr r18.xyzw, r14.zwwz, l(10, 10, 20, 20) - mov r6.x, r14.z - mov r6.yz, r18.xxwx - and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) - and r19.xyz, r6.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) - and r6.xyz, r6.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r19.xyzx, r6.xyzx - movc r16.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) - mul r2.yz, r2.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r18.x, r14.w - and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) - and r6.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r20.xyz, r6.xyzx - iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) - movc r20.xyz, r6.xyzx, r20.xyzx, l(8,8,8,0) - iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) - movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r20.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r6.xyz, r19.xyzx, r6.xyzx, r18.xyzx - ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) - iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) - iadd r6.xyz, r18.xyzx, r6.xyzx - movc r17.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) - ushr r18.xyzw, r14.wxxx, l(30, 10, 20, 30) - utof r3.yz, r18.xxwx - mov r18.x, r14.x - and r6.xyz, r18.xyzx, l(1023, 1023, 1023, 0) - and r19.xyz, r18.xyzx, l(127, 127, 127, 0) - ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx - firstbit_hi r21.xyz, r19.xyzx - iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) - movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) - iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) - movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx - bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) - and r18.xyz, r18.xyzx, l(127, 127, 127, 0) - movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx - ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) - iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) - ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) - iadd r18.xyz, r19.xyzx, r18.xyzx - movc r14.xyz, r6.xyzx, r18.xyzx, l(0,0,0,0) - mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) - mov r15.w, r2.y - mov r16.w, r2.z - mov r17.w, r3.y - mov r14.w, r3.z - break - case l(4) - ishl r18.xyzw, r14.yzwx, l(16, 16, 16, 16) - mov r19.xz, r18.xxyx - mov r19.yw, r14.yyyz - ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) - itof r19.xyzw, r19.xyzw - mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r14.yz, r18.zzwz - ishr r18.xyzw, r14.ywzx, l(16, 16, 16, 16) - itof r18.xyzw, r18.xyzw - mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) - max r14.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - case l(6) - ushr r18.xyzw, r14.yzwx, l(16, 16, 16, 16) - f16tof32 r15.x, r14.y - f16tof32 r15.y, r18.x - f16tof32 r16.x, r14.z - f16tof32 r16.y, r18.y - f16tof32 r17.x, r14.w - f16tof32 r17.y, r18.z - f16tof32 r14.x, r14.x - f16tof32 r14.y, r18.w - mov r15.zw, l(0,0,0,0) - mov r16.zw, l(0,0,0,0) - mov r17.zw, l(0,0,0,0) - mov r14.zw, l(0,0,0,0) - break - default - mov r15.x, r14.y - mov r15.yzw, l(0,0,0,0) - mov r16.x, r14.z - mov r16.yzw, l(0,0,0,0) - mov r17.x, r14.w - mov r17.yzw, l(0,0,0,0) - mov r14.yzw, l(0,0,0,0) - break - endswitch - add r7.xyzw, r11.xyzw, r15.xyzw - add r8.xyzw, r12.xyzw, r16.xyzw - add r9.xyzw, r13.xyzw, r17.xyzw - add r5.xyzw, r10.xyzw, r14.xyzw - else - mov r0.w, r1.w - endif -endif -mul r7.xyzw, r0.wwww, r7.xyzw -mul r8.xyzw, r0.wwww, r8.xzwy -mul r9.xyzw, r0.wwww, r9.xyzw -mul r5.xyzw, r0.wwww, r5.xzwy -if_nz r2.x - mov r7.xz, r7.zzxz - mov r10.xz, r8.yyxy - mov r9.xz, r9.zzxz - mov r11.xz, r5.yyxy -else - mov r10.xz, r8.xxyx - mov r11.xz, r5.xxyx -endif -switch r3.x - case l(26) - mov_sat r7.xyzw, r7.xyzw - mad r3.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r8.xy, r3.ywyy, l(0x00010000, 0x00010000, 0, 0), r3.xzxx - mov r10.yw, r8.wwwz - mov_sat r10.xyzw, r10.xyzw - mad r3.xyzw, r10.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r8.zw, r3.yyyw, l(0, 0, 0x00010000, 0x00010000), r3.xxxz - mov_sat r9.xyzw, r9.xyzw - mad r3.xyzw, r9.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r5.xy, r3.ywyy, l(0x00010000, 0x00010000, 0, 0), r3.xzxx - mov r11.yw, r5.wwwz - mov_sat r11.xyzw, r11.xyzw - mad r3.xyzw, r11.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r3.xyzw, r3.xyzw - imad r5.zw, r3.yyyw, l(0, 0, 0x00010000, 0x00010000), r3.xxxz - break - case l(32) - f32tof16 r3.xy, r7.xzxx - f32tof16 r3.zw, r10.xxxz - f32tof16 r12.xy, r7.ywyy - f32tof16 r12.zw, r8.wwwz - imad r8.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyzw - f32tof16 r3.xy, r9.xzxx - f32tof16 r3.zw, r11.xxxz - f32tof16 r12.xy, r9.ywyy - f32tof16 r12.zw, r5.wwwz - imad r5.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyzw - break - default - mov r8.xy, r7.xyxx - mov r8.z, r10.x - mov r5.xy, r9.xyxx - mov r5.z, r11.x - break -endswitch -if_nz r2.w - mov r8.xyzw, r8.yxwz - mov r5.xyzw, r5.yxwz - mov r0.x, l(2) -endif -ieq r0.xzw, r0.xxxx, l(1, 0, 2, 3) -or r0.xz, r0.zzwz, r0.xxzx -if_nz r0.x - ishl r2.xyzw, r8.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r8.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r8.xyzw, r2.xyzw, r3.xyzw - ishl r2.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r2.xyzw, r3.xyzw -endif -if_nz r0.z - ushr r2.xyzw, r8.xyzw, l(16, 16, 16, 16) - bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.xyzw - ushr r2.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r2.xyzw -endif -if_nz r1.x - mov r8.zw, r5.xxxy -endif -if_nz r1.y - mov r4.xy, r8.xyxx -endif -store_uav_typed U0[0].xyzw, r6.wwww, r4.xyxx -iadd r1.xyzw, r0.yyyy, l(5, 6, 7, 8) -store_uav_typed U0[0].xyzw, r1.xxxx, r8.xyxx -store_uav_typed U0[0].xyzw, r1.yyyy, r8.zwzz -store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyxx -store_uav_typed U0[0].xyzw, r1.wwww, r5.zwzz -ret -// Approximately 1912 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.cso deleted file mode 100644 index ae0e55030..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.h deleted file mode 100644 index 1665d3122..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.h +++ /dev/null @@ -1,2427 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_64bpp_from_64bpp_3xres.cs.hlsl -const uint8_t resolve_full_64bpp_from_64bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF6, 0x04, 0x63, 0x47, 0x24, 0xC0, 0x02, 0x9E, - 0x8C, 0x0C, 0x8E, 0x68, 0x19, 0x99, 0xF5, 0x6C, 0x01, 0x00, 0x00, 0x00, - 0x8C, 0x71, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0xF0, 0x70, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, - 0x00, 0x00, 0x00, 0x00, 0x5D, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.txt deleted file mode 100644 index 5c3af527b..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.txt +++ /dev/null @@ -1,1282 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint2 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 10 -dcl_thread_group 8, 8, 1 -ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r0.z, CB0[0][0].y -bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) -iadd r1.xy, r1.xyxx, vThreadID.xyxx -and r2.xyzw, CB0[0][0].zxxz, l(7, 1023, 0x40000000, 8) -ubfe r3.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx -uge r0.w, l(3), r0.y -if_nz r0.w - mov r4.y, r0.y -else - ieq r0.w, r0.y, l(5) - if_nz r0.w - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r1.zw, r3.yyyy, l(0, 0, 2, 1) -and r1.zw, r1.zzzw, l(0, 0, 1, 1) -ishl r1.xy, r1.xyxx, r1.zwzz -ushr r4.x, r4.y, l(1) -and r1.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r1.xy, r1.zwzz, r1.xyxx -udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) -ishl r0.w, r1.z, l(1) -imad r0.w, r1.w, r2.y, r0.w -iadd r0.w, r0.w, r3.x -imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx -imad r1.x, r1.y, l(80), r1.x -ishl r1.x, r1.x, l(1) -imad r0.w, r0.w, l(1280), r1.x -imul null, r0.w, r0.w, l(9) -movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) -movc r1.xy, r2.zzzz, r1.xyxx, l(0,0,0,0) -bfi r4.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) -iadd r4.xyzw, r4.xyzw, vThreadID.xyyx -bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r2.w - ubfe r0.z, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r5.xyzw, r4.zwzw, l(4, 5, 3, 3) - ishr r1.w, r0.z, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r5.x - ushr r2.y, r0.x, l(5) - imad r1.z, r1.z, r2.y, r5.y - ishl r2.y, r4.z, l(11) - and r2.y, r2.y, l(0x00003000) - bfi r2.y, l(3), l(9), r4.w, r2.y - ishr r2.y, r2.y, l(6) - iadd r1.w, r1.w, r5.z - bfi r2.z, l(1), l(1), r1.w, l(0) - iadd r2.z, r2.z, r5.w - bfi r2.z, l(2), l(1), r2.z, l(0) - bfi r1.w, l(1), l(0), r1.w, r2.z - and r2.z, r2.y, l(240) - bfi r3.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r1.zzzz, l(0, 0, 0, 0) - imad r2.zw, r2.zzzz, l(0, 0, 2, 16), r3.xxxy - bfi r2.yz, l(0, 4, 4, 0), l(0, 0, 3, 0), r2.yyyy, r2.zzwz - bfi r2.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r0.zzzz, r2.yyzy - ubfe r0.z, l(3), l(6), r2.y - and r1.z, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r0.z, r0.z, l(32), r1.w - imad r0.z, r1.z, l(4), r0.z - bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r4.zzzz, r2.yyyz - bfi r0.z, l(9), l(3), r0.z, r1.w - bfi r0.z, l(6), l(0), r1.z, r0.z -else - ishr r5.xyzw, r4.xyzw, l(5, 5, 2, 3) - ushr r0.x, r0.x, l(5) - imad r0.x, r5.y, r0.x, r5.x - ishl r1.zw, r4.zzzz, l(0, 0, 5, 7) - and r1.zw, r1.zzzw, l(0, 0, 448, 2048) - bfi r2.y, l(3), l(3), r4.w, r1.z - ishl r1.z, r1.z, l(1) - bfi r1.z, l(3), l(4), r4.w, r1.z - and r1.z, r1.z, l(992) - bfi r2.z, l(22), l(10), r0.x, r1.z - bfi r2.z, l(4), l(0), r2.y, r2.z - ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r0.xxxx, r3.xyxx - bfi r2.yw, l(0, 4, 0, 4), l(0, 3, 0, 2), r2.yyyy, r3.xxxy - bfi r2.yzw, l(0, 1, 1, 1), l(0, 7, 4, 6), r4.zzzz, r2.yyzw - bfi r0.x, l(12), l(0), r1.w, r2.y - and r1.z, r2.w, l(1792) - iadd r0.x, r0.x, r1.z - and r1.z, r5.z, l(2) - iadd r1.z, r5.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r0.x, r0.x, r1.z - bfi r0.z, l(6), l(0), r2.z, r0.x -endif -imul null, r0.x, r0.z, l(9) -ushr r0.xw, r0.xxxw, l(3, 0, 0, 1) -imad r0.z, r1.y, l(3), r0.w -iadd r1.y, r1.x, r0.z -ld r4.yw, r1.yyyy, T0[0].zxwy -switch r3.w - case l(5) - ishl r4.xz, r4.yywy, l(16, 0, 16, 0) - ishr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.zw, r4.yyyw, l(0, 0, 16, 16) - f16tof32 r4.xy, r4.wyww - f16tof32 r4.zw, r1.wwwz - break - default - mov r4.xz, l(0,0,0,0) - break -endswitch -ibfe r1.z, l(6), l(16), CB0[0][0].z -ishl r1.z, r1.z, l(23) -iadd r1.z, r1.z, l(0x3f800000) -uge r1.w, r0.y, l(4) -if_nz r1.w - mul r2.y, r1.z, l(0.500000) - iadd r2.z, r1.y, l(720) - ld r5.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r4.xyzw, r4.xyzw, r5.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r2.y, r1.z, l(0.250000) - iadd r2.zw, r1.yyyy, l(0, 0, 9, 729) - ld r5.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r4.ywxz, r5.ywxz - ld r6.yw, r2.wwww, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r4.xyzw, r5.zxwy, r6.xyzw - endif -else - mov r2.y, r1.z -endif -mul r4.xyzw, r2.yyyy, r4.ywxz -and r1.y, CB0[0][0].z, l(0x01000000) -if_nz r1.y - mov r4.xz, r4.zzxz -endif -switch r3.z - case l(26) - mov_sat r4.xyzw, r4.xyzw - mad r5.xyzw, r4.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r5.xyzw, r5.xyzw - imad r4.xy, r5.ywyy, l(0x00010000, 0x00010000, 0, 0), r5.xzxx - break - case l(32) - f32tof16 r2.yz, r4.xxzx - f32tof16 r3.xy, r4.ywyy - imad r4.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.yzyy - break - default - break -endswitch -ieq r2.y, r2.x, l(4) -if_nz r2.y - mov r4.xy, r4.yxyy - mov r2.z, l(2) -else - mov r2.z, r2.x -endif -ieq r5.xyz, r2.zzzz, l(1, 2, 3, 0) -or r2.zw, r5.yyyz, r5.xxxy -if_nz r2.z - ishl r3.xy, r4.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.zw, r4.xxxy, l(0, 0, 8, 8) - and r4.zw, r4.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r4.xy, r3.xyxx, r4.zwzz -endif -if_nz r2.w - ushr r2.zw, r4.xxxy, l(0, 0, 16, 16) - bfi r4.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r4.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx -iadd r4.xyzw, r0.xxxx, l(1, 2, 3, 4) -iadd r2.zw, r0.zzzz, l(0, 0, 1, 2) -ld r5.yw, r2.zzzz, T0[0].zxwy -switch r3.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.z, r1.z, l(0.500000) - iadd r3.x, r0.z, l(721) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r3.x, r0.y, l(6) - if_nz r3.x - mul r2.z, r1.z, l(0.250000) - iadd r3.xy, r0.zzzz, l(10, 730, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.z, r1.z -endif -mul r5.xyzw, r2.zzzz, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -switch r3.z - case l(26) - mov_sat r5.xyzw, r5.xyzw - mad r6.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r5.xy, r6.ywyy, l(0x00010000, 0x00010000, 0, 0), r6.xzxx - break - case l(32) - f32tof16 r3.xy, r5.xzxx - f32tof16 r5.zw, r5.yyyw - imad r5.xy, r5.zwzz, l(0x00010000, 0x00010000, 0, 0), r3.xyxx - break - default - break -endswitch -if_nz r2.y - mov r5.xy, r5.yxyy - mov r2.z, l(2) -else - mov r2.z, r2.x -endif -ieq r6.xyz, r2.zzzz, l(1, 2, 3, 0) -or r3.xy, r6.yzyy, r6.xyxx -if_nz r3.x - ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r5.xy, r5.zwzz, r6.xyxx -endif -if_nz r3.y - ushr r3.xy, r5.xyxx, l(16, 16, 0, 0) - bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyxx -ld r5.yw, r2.wwww, T0[0].zxwy -switch r3.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r2.z, r1.z, l(0.500000) - iadd r2.w, r0.z, l(722) - ld r6.yw, r2.wwww, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.w, r0.y, l(6) - if_nz r2.w - mul r2.z, r1.z, l(0.250000) - iadd r3.xy, r0.zzzz, l(11, 731, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r7.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r2.z, r1.z -endif -mul r5.xyzw, r2.zzzz, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -switch r3.z - case l(26) - mov_sat r5.xyzw, r5.xyzw - mad r6.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r5.xy, r6.ywyy, l(0x00010000, 0x00010000, 0, 0), r6.xzxx - break - case l(32) - f32tof16 r2.zw, r5.xxxz - f32tof16 r3.xy, r5.ywyy - imad r5.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz - break - default - break -endswitch -if_nz r2.y - mov r5.xy, r5.yxyy - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r6.xyz, r0.zzzz, l(1, 2, 3, 0) -or r2.zw, r6.yyyz, r6.xxxy -if_nz r2.z - ishl r3.xy, r5.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r5.xy, r3.xyxx, r5.zwzz -endif -if_nz r2.w - ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) - bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyxx -iadd r0.z, r1.x, r0.w -iadd r2.zw, r0.zzzz, l(0, 0, 3, 6) -ld r5.yw, r2.zzzz, T0[0].zxwy -switch r3.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r3.yyyx - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.z, l(723) - ld r6.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r3.xy, r0.zzzz, l(12, 732, 0, 0) - ld r6.yw, r3.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r4.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r3.yyyy, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - endif -else - mov r1.x, r1.z -endif -mul r5.xyzw, r1.xxxx, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -switch r3.z - case l(26) - mov_sat r5.xyzw, r5.xyzw - mad r6.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r6.xyzw, r6.xyzw - imad r5.xy, r6.ywyy, l(0x00010000, 0x00010000, 0, 0), r6.xzxx - break - case l(32) - f32tof16 r3.xy, r5.xzxx - f32tof16 r4.xy, r5.ywyy - imad r5.xy, r4.xyxx, l(0x00010000, 0x00010000, 0, 0), r3.xyxx - break - default - break -endswitch -if_nz r2.y - mov r5.xy, r5.yxyy - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r6.xyz, r1.xxxx, l(1, 2, 3, 0) -or r3.xy, r6.yzyy, r6.xyxx -if_nz r3.x - ishl r4.xy, r5.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r5.xy, r4.xyxx, r5.zwzz -endif -if_nz r3.y - ushr r3.xy, r5.xyxx, l(16, 16, 0, 0) - bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyxx -iadd r5.xyzw, r0.wwww, l(4, 5, 7, 8) -ld r6.yw, r5.xxxx, T0[0].zxwy -switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.w, l(724) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r3.xy, r0.wwww, l(13, 733, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r4.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r3.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.x, r1.z -endif -mul r6.xyzw, r1.xxxx, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -switch r3.z - case l(26) - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx - break - case l(32) - f32tof16 r3.xy, r6.xzxx - f32tof16 r4.xy, r6.ywyy - imad r6.xy, r4.xyxx, l(0x00010000, 0x00010000, 0, 0), r3.xyxx - break - default - break -endswitch -if_nz r2.y - mov r6.xy, r6.yxyy - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r4.xyz, r1.xxxx, l(1, 2, 3, 0) -or r3.xy, r4.yzyy, r4.xyxx -if_nz r3.x - ishl r4.xy, r6.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r4.xyxx, r6.zwzz -endif -if_nz r3.y - ushr r3.xy, r6.xyxx, l(16, 16, 0, 0) - bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r4.wwww, r6.xyxx -iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r6.yw, r5.yyyy, T0[0].zxwy -switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r3.yyyx - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.w, l(725) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r3.xy, r0.wwww, l(14, 734, 0, 0) - ld r7.yw, r3.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r5.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r3.yyyy, T0[0].zxwy - switch r3.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r3.yyyx - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.x, r1.z -endif -mul r6.xyzw, r1.xxxx, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -switch r3.z - case l(26) - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx - break - case l(32) - f32tof16 r3.xy, r6.xzxx - f32tof16 r5.xy, r6.ywyy - imad r6.xy, r5.xyxx, l(0x00010000, 0x00010000, 0, 0), r3.xyxx - break - default - break -endswitch -if_nz r2.y - mov r6.xy, r6.yxyy - mov r1.x, l(2) -else - mov r1.x, r2.x -endif -ieq r7.xyz, r1.xxxx, l(1, 2, 3, 0) -or r3.xy, r7.yzyy, r7.xyxx -if_nz r3.x - ishl r5.xy, r6.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r5.xyxx, r6.zwzz -endif -if_nz r3.y - ushr r3.xy, r6.xyxx, l(16, 16, 0, 0) - bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyxx -ld r6.yw, r2.wwww, T0[0].zxwy -switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r1.x, r1.z, l(0.500000) - iadd r2.z, r0.z, l(726) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r2.z, r0.y, l(6) - if_nz r2.z - mul r1.x, r1.z, l(0.250000) - iadd r2.zw, r0.zzzz, l(0, 0, 15, 735) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r2.wwww, T0[0].zxwy - switch r3.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r1.x, r1.z -endif -mul r6.xyzw, r1.xxxx, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -switch r3.z - case l(26) - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx - break - case l(32) - f32tof16 r2.zw, r6.xxxz - f32tof16 r3.xy, r6.ywyy - imad r6.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz - break - default - break -endswitch -if_nz r2.y - mov r6.xy, r6.yxyy - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r7.xyz, r0.zzzz, l(1, 2, 3, 0) -or r2.zw, r7.yyyz, r7.xxxy -if_nz r2.z - ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r6.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r3.xyxx, r5.xyxx -endif -if_nz r2.w - ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) - bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r4.yyyy, r6.xyxx -ld r6.yw, r5.zzzz, T0[0].zxwy -switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r2.wwwz - break - default - mov r6.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r1.z, l(0.500000) - iadd r1.x, r0.w, l(727) - ld r7.yw, r1.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r2.wwwz - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r6.xyzw, r7.xyzw - uge r1.x, r0.y, l(6) - if_nz r1.x - mul r0.z, r1.z, l(0.250000) - iadd r2.zw, r0.wwww, l(0, 0, 16, 736) - ld r7.yw, r2.zzzz, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r3.yyyx - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r7.xyzw, r6.ywxz, r7.ywxz - ld r8.yw, r2.wwww, T0[0].zxwy - switch r3.w - case l(5) - ishl r8.xz, r8.yywy, l(16, 0, 16, 0) - ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) - f16tof32 r8.xy, r8.wyww - f16tof32 r8.zw, r2.wwwz - break - default - mov r8.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r7.zxwy, r8.xyzw - endif -else - mov r0.z, r1.z -endif -mul r6.xyzw, r0.zzzz, r6.ywxz -if_nz r1.y - mov r6.xz, r6.zzxz -endif -switch r3.z - case l(26) - mov_sat r6.xyzw, r6.xyzw - mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r7.xyzw, r7.xyzw - imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx - break - case l(32) - f32tof16 r2.zw, r6.xxxz - f32tof16 r3.xy, r6.ywyy - imad r6.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz - break - default - break -endswitch -if_nz r2.y - mov r6.xy, r6.yxyy - mov r0.z, l(2) -else - mov r0.z, r2.x -endif -ieq r5.xyz, r0.zzzz, l(1, 2, 3, 0) -or r2.zw, r5.yyyz, r5.xxxy -if_nz r2.z - ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r6.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r3.xyxx, r4.xyxx -endif -if_nz r2.w - ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) - bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyxx -ld r5.yw, r5.wwww, T0[0].zxwy -switch r3.w - case l(5) - ishl r5.xz, r5.yywy, l(16, 0, 16, 0) - ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) - f16tof32 r5.xy, r5.wyww - f16tof32 r5.zw, r2.wwwz - break - default - mov r5.xz, l(0,0,0,0) - break -endswitch -if_nz r1.w - mul r0.z, r1.z, l(0.500000) - iadd r1.x, r0.w, l(728) - ld r6.yw, r1.xxxx, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r1.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r5.xyzw, r6.xyzw - uge r0.y, r0.y, l(6) - if_nz r0.y - mul r1.z, r1.z, l(0.250000) - iadd r0.yw, r0.wwww, l(0, 17, 0, 737) - ld r6.yw, r0.yyyy, T0[0].zxwy - switch r3.w - case l(5) - ishl r6.xz, r6.yywy, l(16, 0, 16, 0) - ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) - f16tof32 r6.xy, r6.wyww - f16tof32 r6.zw, r1.wwwx - break - default - mov r6.xz, l(0,0,0,0) - break - endswitch - add r6.xyzw, r5.ywxz, r6.ywxz - ld r7.yw, r0.wwww, T0[0].zxwy - switch r3.w - case l(5) - ishl r7.xz, r7.yywy, l(16, 0, 16, 0) - ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - ushr r0.yw, r7.yyyw, l(0, 16, 0, 16) - f16tof32 r7.xy, r7.wyww - f16tof32 r7.zw, r0.wwwy - break - default - mov r7.xz, l(0,0,0,0) - break - endswitch - add r5.xyzw, r6.zxwy, r7.xyzw - else - mov r1.z, r0.z - endif -endif -mul r5.xyzw, r1.zzzz, r5.ywxz -if_nz r1.y - mov r5.xz, r5.zzxz -endif -switch r3.z - case l(26) - mov_sat r5.xyzw, r5.xyzw - mad r1.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) - ftou r1.xyzw, r1.xyzw - imad r5.xy, r1.ywyy, l(0x00010000, 0x00010000, 0, 0), r1.xzxx - break - case l(32) - f32tof16 r0.yz, r5.xxzx - f32tof16 r1.xy, r5.ywyy - imad r5.xy, r1.xyxx, l(0x00010000, 0x00010000, 0, 0), r0.yzyy - break - default - break -endswitch -if_nz r2.y - mov r5.xy, r5.yxyy - mov r2.x, l(2) -endif -ieq r0.yzw, r2.xxxx, l(0, 1, 2, 3) -or r0.yz, r0.zzwz, r0.yyzy -if_nz r0.y - ishl r0.yw, r5.xxxy, l(0, 8, 0, 8) - and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r1.xy, r5.xyxx, l(8, 8, 0, 0) - and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r5.xy, r0.ywyy, r1.xyxx -endif -if_nz r0.z - ushr r0.yz, r5.xxyx, l(0, 16, 16, 0) - bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r0.yzyy -endif -store_uav_typed U0[0].xyzw, r4.wwww, r5.xyxx -ret -// Approximately 1235 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.cso deleted file mode 100644 index f6b317692..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h deleted file mode 100644 index c33a67828..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h +++ /dev/null @@ -1,1709 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_8bpp_2xres.cs.hlsl -const uint8_t resolve_full_8bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xD4, 0x4C, 0xAC, 0xDF, 0x4E, 0x94, 0x40, 0x9F, - 0xEF, 0x6C, 0xFD, 0x7D, 0x78, 0xD5, 0x85, 0xC7, 0x01, 0x00, 0x00, 0x00, - 0xE4, 0x4F, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x94, 0x02, 0x00, 0x00, 0xA4, 0x02, 0x00, 0x00, 0xB4, 0x02, 0x00, 0x00, - 0x48, 0x4F, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x58, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0x2F, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, - 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, - 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, - 0x52, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x43, 0x6F, 0x6E, 0x73, 0x74, - 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xAB, 0xAB, 0xD6, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA4, 0x01, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xC0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 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0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0x9C, 0x02, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x69, 0x00, 0x00, 0x00, - 0x5D, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x00, 0x3D, 0x00, 0x00, 0x00, - 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.txt deleted file mode 100644 index 9f3f2b6f0..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.txt +++ /dev/null @@ -1,715 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture uint4 buf T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 16 -dcl_thread_group 8, 8, 1 -ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) -ushr r1.x, CB0[0][0].y, l(7) -bfi r1.x, l(11), l(3), r1.x, l(0) -uge r1.x, r0.w, r1.x -if_nz r1.x - ret -endif -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyzw, CB0[0][0].xzxz, l(1023, 0x01000000, 0x40000000, 8) -ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r2.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r2.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -movc r1.w, r4.z, l(1), l(0) -ishl r2.w, r5.x, r1.w -imad r2.w, r5.y, r3.x, r2.w -iadd r2.w, r2.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r1.w, r2.x, r1.w -imad r1.w, r2.w, l(1280), r1.w -iadd r2.x, r2.z, r4.z -ishl r2.x, l(1), r2.x -iadd r2.x, r1.w, r2.x -ld r5.xyzw, r1.wwww, T0[0].xyzw -ld r6.xyzw, r2.xxxx, T0[0].xyzw -if_nz r4.z - iadd r2.y, r1.w, l(1) - ld r7.xyzw, r2.yyyy, T0[0].ywxz - iadd r2.y, r2.x, l(1) - ld r8.xyzw, r2.yyyy, T0[0].ywxz - switch r4.w - case l(5) - mov r9.xy, r5.ywyy - mov r9.zw, r7.xxxy - mov r7.xy, r5.xzxx - movc r9.xyzw, r3.yyyy, r9.xyzw, r7.xyzw - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r9.xy, r6.ywyy - mov r9.zw, r8.xxxy - mov r8.xy, r6.xzxx - movc r9.xyzw, r3.yyyy, r9.xyzw, r8.xyzw - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - mov r9.xy, r5.ywyy - mov r9.zw, r7.xxxy - mov r7.xy, r5.xzxx - movc r9.xyzw, r3.yyyy, r9.xyzw, r7.xyzw - f16tof32 r5.xyzw, r9.xyzw - mov r9.xy, r6.ywyy - mov r9.zw, r8.xxxy - mov r8.xy, r6.xzxx - movc r9.xyzw, r3.yyyy, r9.xyzw, r8.xyzw - f16tof32 r6.xyzw, r9.xyzw - break - default - mov r5.xy, r5.xzxx - mov r5.zw, r7.zzzw - mov r6.xy, r6.xzxx - mov r6.zw, r8.zzzw - break - endswitch -else - switch r4.w - case l(0) - case l(1) - movc r2.y, r3.y, l(16), l(0) - ushr r7.xyzw, r5.xyzw, r2.yyyy - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.xyzw, r6.xyzw, r2.yyyy - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r2.y, r3.y, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.yyyy - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.xyzw, r6.xyzw, r2.yyyy - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r2.y, r3.y, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.yyyy - and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r9.xyzw, r7.xyzw - movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) - ushr r7.xyzw, r6.xyzw, r2.yyyy - and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r9.xyzw, r7.xyzw - movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - break - default - break - endswitch -endif -ibfe r2.y, l(6), l(16), CB0[0][0].z -ishl r2.y, r2.y, l(23) -iadd r2.y, r2.y, l(0x3f800000) -uge r2.z, r1.y, l(4) -if_nz r2.z - mul r2.z, r2.y, l(0.500000) - ishl r2.w, l(80), r4.z - iadd r3.x, r1.w, r2.w - ld r7.xyzw, r3.xxxx, T0[0].xyzw - iadd r2.w, r2.w, r2.x - ld r8.xyzw, r2.wwww, T0[0].xyzw - if_nz r4.z - iadd r2.w, r1.w, l(161) - ld r9.xyzw, r2.wwww, T0[0].ywxz - iadd r2.w, r2.x, l(161) - ld r10.xyzw, r2.wwww, T0[0].ywxz - switch r4.w - case l(5) - mov r11.xy, r7.ywyy - mov r11.zw, r9.xxxy - mov r9.xy, r7.xzxx - movc r11.xyzw, r3.yyyy, r11.xyzw, r9.xyzw - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r11.xy, r8.ywyy - mov r11.zw, r10.xxxy - mov r10.xy, r8.xzxx - movc r11.xyzw, r3.yyyy, r11.xyzw, r10.xyzw - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - mov r11.xy, r7.ywyy - mov r11.zw, r9.xxxy - mov r9.xy, r7.xzxx - movc r11.xyzw, r3.yyyy, r11.xyzw, r9.xyzw - f16tof32 r7.xyzw, r11.xyzw - mov r11.xy, r8.ywyy - mov r11.zw, r10.xxxy - mov r10.xy, r8.xzxx - movc r11.xyzw, r3.yyyy, r11.xyzw, r10.xyzw - f16tof32 r8.xyzw, r11.xyzw - break - default - mov r7.xy, r7.xzxx - mov r7.zw, r9.zzzw - mov r8.xy, r8.xzxx - mov r8.zw, r10.zzzw - break - endswitch - else - switch r4.w - case l(0) - case l(1) - movc r2.w, r3.y, l(16), l(0) - ushr r9.xyzw, r7.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r8.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r2.w, r3.y, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r8.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r2.w, r3.y, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r2.wwww - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r8.xyzw, r2.wwww - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - break - default - break - endswitch - endif - add r5.xyzw, r5.xyzw, r7.xyzw - add r6.xyzw, r6.xyzw, r8.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r2.y, r2.y, l(0.250000) - ishl r4.xy, l(1, 81, 0, 0), r4.zzzz - iadd r7.xy, r1.wwww, r4.xyxx - ld r8.xyzw, r7.xxxx, T0[0].xyzw - iadd r4.xy, r2.xxxx, r4.xyxx - ld r9.xyzw, r4.xxxx, T0[0].xyzw - if_nz r4.z - iadd r1.y, r1.w, l(3) - ld r10.xyzw, r1.yyyy, T0[0].ywxz - iadd r1.y, r2.x, l(3) - ld r11.xyzw, r1.yyyy, T0[0].ywxz - switch r4.w - case l(5) - mov r12.xy, r8.ywyy - mov r12.zw, r10.xxxy - mov r10.xy, r8.xzxx - movc r12.xyzw, r3.yyyy, r12.xyzw, r10.xyzw - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r12.xy, r9.ywyy - mov r12.zw, r11.xxxy - mov r11.xy, r9.xzxx - movc r12.xyzw, r3.yyyy, r12.xyzw, r11.xyzw - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - mov r12.xy, r8.ywyy - mov r12.zw, r10.xxxy - mov r10.xy, r8.xzxx - movc r12.xyzw, r3.yyyy, r12.xyzw, r10.xyzw - f16tof32 r8.xyzw, r12.xyzw - mov r12.xy, r9.ywyy - mov r12.zw, r11.xxxy - mov r11.xy, r9.xzxx - movc r12.xyzw, r3.yyyy, r12.xyzw, r11.xyzw - f16tof32 r9.xyzw, r12.xyzw - break - default - mov r8.xy, r8.xzxx - mov r8.zw, r10.zzzw - mov r9.xy, r9.xzxx - mov r9.zw, r11.zzzw - break - endswitch - else - switch r4.w - case l(0) - case l(1) - movc r1.y, r3.y, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r1.yyyy - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r1.yyyy - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r1.y, r3.y, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r1.yyyy - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r1.yyyy - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r1.y, r3.y, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r1.yyyy - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r1.yyyy - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - break - default - break - endswitch - endif - add r8.xyzw, r5.xyzw, r8.xyzw - add r9.xyzw, r6.xyzw, r9.xyzw - ld r7.xyzw, r7.yyyy, T0[0].xyzw - ld r10.xyzw, r4.yyyy, T0[0].xyzw - if_nz r4.z - iadd r1.y, r1.w, l(163) - ld r11.xyzw, r1.yyyy, T0[0].ywxz - iadd r1.y, r2.x, l(163) - ld r12.xyzw, r1.yyyy, T0[0].ywxz - switch r4.w - case l(5) - mov r13.xy, r7.ywyy - mov r13.zw, r11.xxxy - mov r11.xy, r7.xzxx - movc r13.xyzw, r3.yyyy, r13.xyzw, r11.xyzw - ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r13.xyzw - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - mov r13.xy, r10.ywyy - mov r13.zw, r12.xxxy - mov r12.xy, r10.xzxx - movc r13.xyzw, r3.yyyy, r13.xyzw, r12.xyzw - ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r13.xyzw - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - mov r13.xy, r7.ywyy - mov r13.zw, r11.xxxy - mov r11.xy, r7.xzxx - movc r13.xyzw, r3.yyyy, r13.xyzw, r11.xyzw - f16tof32 r7.xyzw, r13.xyzw - mov r13.xy, r10.ywyy - mov r13.zw, r12.xxxy - mov r12.xy, r10.xzxx - movc r13.xyzw, r3.yyyy, r13.xyzw, r12.xyzw - f16tof32 r10.xyzw, r13.xyzw - break - default - mov r7.xy, r7.xzxx - mov r7.zw, r11.zzzw - mov r10.xy, r10.xzxx - mov r10.zw, r12.zzzw - break - endswitch - else - switch r4.w - case l(0) - case l(1) - movc r1.y, r3.y, l(16), l(0) - ushr r4.xyzw, r7.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyzw, r10.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r10.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r1.y, r3.y, l(20), l(0) - ushr r4.xyzw, r7.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - utof r4.xyzw, r4.xyzw - mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r4.xyzw, r10.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - utof r4.xyzw, r4.xyzw - mul r10.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r1.y, r3.y, l(20), l(0) - ushr r4.xyzw, r7.xyzw, r1.yyyy - and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) - and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) - movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - iadd r4.xyzw, r12.xyzw, r4.xyzw - movc r7.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) - ushr r4.xyzw, r10.xyzw, r1.yyyy - and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) - and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) - movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - iadd r4.xyzw, r12.xyzw, r4.xyzw - movc r10.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r10.xyzw, r10.xyzw - break - default - break - endswitch - endif - add r5.xyzw, r7.xyzw, r8.xyzw - add r6.xyzw, r9.xyzw, r10.xyzw - else - mov r2.y, r2.z - endif -endif -mul_sat r4.xyzw, r2.yyyy, r5.xyzw -mul_sat r2.xyzw, r2.yyyy, r6.xyzw -mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r1.y, r4.y, l(256), r4.x -imad r1.y, r4.z, l(0x00010000), r1.y -imad r4.x, r4.w, l(0x01000000), r1.y -mad r2.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r2.xyzw, r2.xyzw -imad r1.y, r2.y, l(256), r2.x -imad r1.y, r2.z, l(0x00010000), r1.y -imad r4.y, r2.w, l(0x01000000), r1.y -if_nz r3.z - if_z r0.w - and r1.y, r4.x, l(0xff00ff00) - ushr r1.w, r4.x, l(8) - or r4.z, r1.w, r1.y - else - mov r4.z, r4.x - endif - if_z vThreadID.y - ushr r1.yw, r4.zzzy, l(0, 16, 0, 16) - bfi r4.xy, l(16, 16, 0, 0), l(0, 0, 0, 0), r1.ywyy, r4.zyzz - else - mov r4.xy, r4.zyzz - endif -endif -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.w - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r2.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r2.x - ushr r2.x, r1.x, l(5) - imad r1.z, r1.z, r2.x, r2.y - ishl r2.x, r0.z, l(2) - and r2.x, r2.x, l(24) - bfi r2.x, l(3), l(0), r0.w, r2.x - ibfe r2.x, l(26), l(0), r2.x - iadd r1.w, r1.w, r2.z - bfi r2.y, l(1), l(1), r1.w, l(0) - iadd r2.y, r2.y, r2.w - bfi r2.y, l(2), l(1), r2.y, l(0) - bfi r1.w, l(1), l(0), r1.w, r2.y - and r2.y, r2.x, l(16) - bfi r2.zw, l(0, 0, 22, 22), l(0, 0, 8, 11), r1.zzzz, l(0, 0, 0, 0) - imad r2.yz, r2.yyyy, l(0, 2, 16, 0), r2.zzwz - bfi r2.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r2.xxxx, r2.yzyy - bfi r1.yz, l(0, 2, 2, 0), l(0, 6, 9, 0), r1.yyyy, r2.xxyx - ubfe r2.x, l(3), l(6), r1.y - and r2.y, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r2.x, l(32), r1.w - imad r1.w, r2.y, l(4), r1.w - bfi r1.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r2.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r2.y, r0.x, r2.x - ishl r1.xz, r0.zzzz, l(2, 0, 7, 0) - and r1.xz, r1.xxzx, l(56, 0, 2048, 0) - bfi r0.y, l(3), l(0), r0.w, r1.x - ishl r1.x, r1.x, l(1) - bfi r0.w, l(3), l(1), r0.w, r1.x - and r0.w, r0.w, l(96) - bfi r1.x, l(25), l(7), r0.x, r0.w - bfi r1.x, l(4), l(0), r0.y, r1.x - bfi r1.x, l(1), l(4), r0.z, r1.x - ishl r2.xy, r0.wwww, l(3, 2, 0, 0) - bfi r0.xw, l(25, 0, 0, 25), l(10, 0, 0, 9), r0.xxxx, r2.xxxy - bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r1.z, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r2.z, l(2) - iadd r0.y, r2.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.y, l(6), l(0), r1.x, r0.x -endif -ushr r0.x, r1.y, l(1) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx -ret -// Approximately 668 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.cso deleted file mode 100644 index b0b6d39c0..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h deleted file mode 100644 index 8837385db..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h +++ /dev/null @@ -1,13155 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_8bpp_3xres.cs.hlsl -const uint8_t resolve_full_8bpp_3xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x41, 0xC3, 0xF5, 0xF1, 0x12, 0xC5, 0x71, 0x4E, - 0x0E, 0x74, 0xCB, 0x0A, 0x09, 0x4D, 0x24, 0xE5, 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0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.txt deleted file mode 100644 index aa7915e7c..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.txt +++ /dev/null @@ -1,5396 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 19 -dcl_thread_group 8, 8, 1 -ubfe r0.x, l(11), l(7), CB0[0][0].y -uge r0.x, vThreadID.x, r0.x -if_nz r0.x - ret -endif -ishl r0.x, vThreadID.x, l(3) -and r1.xyzw, CB0[0][0].xzxz, l(0x40000000, 8, 1023, 0x01000000) -mov r0.y, vThreadID.y -ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) -movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) -ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r2.z, CB0[0][0].y -bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) -iadd r3.xyzw, r0.xyyx, r3.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r1.y - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r2.w, CB0[0][0].w, l(10) - ishl r2.w, r2.w, l(5) - ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) - ishr r5.x, r1.y, l(2) - ushr r2.w, r2.w, l(4) - and r2.w, r2.w, l(0x00007ffe) - imad r2.w, r5.x, r2.w, r4.x - ushr r4.x, r1.x, l(5) - imad r2.w, r2.w, r4.x, r4.y - ishl r4.x, r3.z, l(8) - ishr r4.x, r4.x, l(6) - iadd r4.y, r4.z, r5.x - bfi r4.z, l(1), l(1), r4.y, l(0) - iadd r4.z, r4.z, r4.w - bfi r4.z, l(2), l(1), r4.z, l(0) - bfi r4.y, l(1), l(0), r4.y, r4.z - and r4.xz, r4.xxxx, l(16, 0, 8, 0) - bfi r5.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r2.wwww, l(0, 0, 0, 0) - imad r4.xw, r4.xxxx, l(2, 0, 0, 16), r5.xxxy - bfi r4.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r4.zzzz, r4.xxwx - bfi r4.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), r1.yyyy, r4.xxzx - ubfe r1.y, l(3), l(6), r4.x - and r2.w, r4.y, l(6) - bfi r4.y, l(1), l(8), r4.y, l(0) - imad r1.y, r1.y, l(32), r4.y - imad r1.y, r2.w, l(4), r1.y - bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xzxx - bfi r1.y, l(9), l(3), r1.y, r4.y - bfi r1.y, l(6), l(0), r4.x, r1.y -else - ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) - ushr r1.x, r1.x, l(5) - imad r1.x, r4.y, r1.x, r4.x - ishl r3.xy, r3.zzzz, l(2, 7, 0, 0) - ishl r2.w, r3.x, l(1) - and r2.w, r2.w, l(96) - bfi r3.w, l(25), l(7), r1.x, r2.w - and r3.xy, r3.xyxx, l(8, 2048, 0, 0) - iadd r3.w, r3.w, r3.x - bfi r3.w, l(1), l(4), r3.z, r3.w - ishl r4.xy, r2.wwww, l(3, 2, 0, 0) - bfi r4.xy, l(25, 25, 0, 0), l(10, 9, 0, 0), r1.xxxx, r4.xyxx - imad r4.xy, r3.xxxx, l(8, 4, 0, 0), r4.xyxx - bfi r3.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r3.zzzz, r4.xxyx - bfi r1.x, l(12), l(0), r3.y, r3.x - and r2.w, r3.z, l(1792) - iadd r1.x, r1.x, r2.w - and r2.w, r4.z, l(2) - iadd r2.w, r4.w, r2.w - bfi r2.w, l(2), l(6), r2.w, l(0) - iadd r1.x, r1.x, r2.w - bfi r1.y, l(6), l(0), r3.w, r1.x -endif -imul null, r1.x, r1.y, l(9) -ushr r1.x, r1.x, l(3) -bfi r2.xz, l(5, 0, 2, 0), l(3, 0, 3, 0), r2.zzxz, l(0, 0, 0, 0) -iadd r0.xy, r0.xyxx, r2.xzxx -ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.y, l(3), r2.y -if_nz r1.y - mov r4.y, r2.y -else - ieq r1.y, r2.y, l(5) - if_nz r1.y - mov r4.y, l(2) - else - mov r4.y, l(0) - endif -endif -uge r2.xz, r3.yyyy, l(2, 0, 1, 0) -and r2.xz, r2.xxzx, l(1, 0, 1, 0) -ishl r0.xy, r0.xyxx, r2.xzxx -ushr r4.x, r4.y, l(1) -and r2.zw, r4.xxxy, l(0, 0, 1, 1) -iadd r0.xy, r0.xyxx, r2.zwzz -udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) -movc r1.y, r3.z, l(1), l(0) -ishl r3.y, r2.z, r1.y -imad r1.z, r2.w, r1.z, r3.y -iadd r1.z, r1.z, r3.x -imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx -imad r0.x, r0.y, l(80), r0.x -ishl r0.x, r0.x, r1.y -imad r0.x, r1.z, l(1280), r0.x -imul null, r0.y, r0.x, l(36) -ine r1.z, r1.w, l(0) -ine r2.z, r3.z, l(0) -and r1.z, r1.z, r2.z -if_nz r1.z - imad r0.y, r0.x, l(36), l(4) -endif -if_z r2.z - ld_raw r4.xyzw, r0.y, T0[0].xyzw - iadd r3.xy, r0.yyyy, l(16, 32, 0, 0) - ld_raw r5.xyzw, r3.x, T0[0].xyzw - ld_raw r2.w, r3.y, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r3.x, r1.w, l(16), l(0) - ushr r6.xyzw, r4.xyzw, r3.xxxx - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.xyzw, r5.xyzw, r3.xxxx - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r3.x, r2.w, r3.x - and r3.x, r3.x, l(255) - utof r3.x, r3.x - mul r2.w, r3.x, l(0.003922) - break - case l(2) - case l(10) - movc r3.x, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r3.xxxx - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.xyzw, r5.xyzw, r3.xxxx - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r3.x, r2.w, r3.x - and r3.x, r3.x, l(1023) - utof r3.x, r3.x - mul r2.w, r3.x, l(0.000978) - break - case l(3) - case l(12) - movc r3.x, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r3.xxxx - and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r10.xyzw, r8.xyzw - iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) - movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) - iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) - movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw - ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) - iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r8.xyzw, r6.xyzw - movc r4.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) - ushr r6.xyzw, r5.xyzw, r3.xxxx - and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r10.xyzw, r8.xyzw - iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) - movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) - iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) - movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw - ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) - iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r8.xyzw, r6.xyzw - movc r5.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) - ushr r3.x, r2.w, r3.x - and r6.xy, r3.xxxx, l(1023, 127, 0, 0) - ubfe r3.y, l(3), l(7), r3.x - firstbit_hi r6.z, r6.y - iadd r6.z, r6.z, l(-24) - movc r6.z, r6.y, r6.z, l(8) - iadd r6.w, -r6.z, l(1) - movc r6.w, r3.y, r3.y, r6.w - bfi r3.x, l(7), r6.z, r3.x, l(0) - and r3.x, r3.x, l(127) - movc r3.x, r3.y, r6.y, r3.x - ishl r3.y, r6.w, l(23) - iadd r3.y, r3.y, l(0x3e000000) - ishl r3.x, r3.x, l(16) - iadd r3.x, r3.y, r3.x - movc r2.w, r6.x, r3.x, l(0) - break - case l(4) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r3.x, l(16), l(0), r2.w - itof r3.x, r3.x - mul r3.x, r3.x, l(0.000977) - max r2.w, r3.x, l(-1.000000) - break - case l(6) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.w, r2.w - break - default - break - endswitch -else - ld_raw r4.x, r0.y, T0[0].xxxx - iadd r6.xyzw, r0.yyyy, l(8, 16, 24, 32) - ld_raw r4.y, r6.x, T0[0].xxxx - ld_raw r4.z, r6.y, T0[0].xxxx - ld_raw r4.w, r6.z, T0[0].xxxx - ld_raw r5.x, r6.w, T0[0].xxxx - iadd r6.xyzw, r0.yyyy, l(40, 48, 56, 64) - ld_raw r5.y, r6.x, T0[0].xxxx - ld_raw r5.z, r6.y, T0[0].xxxx - ld_raw r5.w, r6.z, T0[0].xxxx - ld_raw r2.w, r6.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r3.x, l(16), l(0), r2.w - itof r3.x, r3.x - mul r3.x, r3.x, l(0.000977) - max r2.w, r3.x, l(-1.000000) - break - case l(7) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.w, r2.w - break - default - break - endswitch -endif -ibfe r3.x, l(6), l(16), CB0[0][0].z -ishl r3.x, r3.x, l(23) -iadd r3.x, r3.x, l(0x3f800000) -uge r3.y, r2.y, l(4) -if_nz r3.y - mul r6.x, r3.x, l(0.500000) - ishl r6.y, l(2880), r3.z - iadd r6.y, r0.y, r6.y - if_z r2.z - ld_raw r7.xyzw, r6.y, T0[0].xyzw - iadd r6.zw, r6.yyyy, l(0, 0, 16, 32) - ld_raw r8.xyzw, r6.z, T0[0].xyzw - ld_raw r6.z, r6.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.w, r1.w, l(16), l(0) - ushr r9.xyzw, r7.xyzw, r6.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r8.xyzw, r6.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.w, r6.z, r6.w - and r6.w, r6.w, l(255) - utof r6.w, r6.w - mul r6.z, r6.w, l(0.003922) - break - case l(2) - case l(10) - movc r6.w, r1.w, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r6.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r8.xyzw, r6.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.w, r6.z, r6.w - and r6.w, r6.w, l(1023) - utof r6.w, r6.w - mul r6.z, r6.w, l(0.000978) - break - case l(3) - case l(12) - movc r6.w, r1.w, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r6.wwww - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r8.xyzw, r6.wwww - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r6.w, r6.z, r6.w - and r9.xy, r6.wwww, l(1023, 127, 0, 0) - ubfe r9.z, l(3), l(7), r6.w - firstbit_hi r9.w, r9.y - iadd r9.w, r9.w, l(-24) - movc r9.w, r9.y, r9.w, l(8) - iadd r10.x, -r9.w, l(1) - movc r10.x, r9.z, r9.z, r10.x - bfi r6.w, l(7), r9.w, r6.w, l(0) - and r6.w, r6.w, l(127) - movc r6.w, r9.z, r9.y, r6.w - ishl r9.y, r10.x, l(23) - iadd r9.y, r9.y, l(0x3e000000) - ishl r6.w, r6.w, l(16) - iadd r6.w, r9.y, r6.w - movc r6.z, r9.x, r6.w, l(0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.w, l(16), l(0), r6.z - itof r6.w, r6.w - mul r6.w, r6.w, l(0.000977) - max r6.z, r6.w, l(-1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r6.z, r6.z - break - default - break - endswitch - else - ld_raw r7.x, r6.y, T0[0].xxxx - iadd r9.xyzw, r6.yyyy, l(8, 16, 24, 32) - ld_raw r7.y, r9.x, T0[0].xxxx - ld_raw r7.z, r9.y, T0[0].xxxx - ld_raw r7.w, r9.z, T0[0].xxxx - ld_raw r8.x, r9.w, T0[0].xxxx - iadd r9.xyzw, r6.yyyy, l(40, 48, 56, 64) - ld_raw r8.y, r9.x, T0[0].xxxx - ld_raw r8.z, r9.y, T0[0].xxxx - ld_raw r8.w, r9.z, T0[0].xxxx - ld_raw r6.z, r9.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.y, l(16), l(0), r6.z - itof r6.y, r6.y - mul r6.y, r6.y, l(0.000977) - max r6.z, r6.y, l(-1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r6.z, r6.z - break - default - break - endswitch - endif - add r4.xyzw, r4.xyzw, r7.xyzw - add r5.xyzw, r5.xyzw, r8.xyzw - add r2.w, r2.w, r6.z - uge r6.y, r2.y, l(6) - if_nz r6.y - mul r6.x, r3.x, l(0.250000) - ishl r6.yz, l(0, 36, 2916, 0), r3.zzzz - iadd r6.yz, r0.yyyy, r6.yyzy - if_z r2.z - ld_raw r7.xyzw, r6.y, T0[0].xyzw - iadd r8.xy, r6.yyyy, l(16, 32, 0, 0) - ld_raw r9.xyzw, r8.x, T0[0].xyzw - ld_raw r0.y, r8.y, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.w, r1.w, l(16), l(0) - ushr r8.xyzw, r7.xyzw, r6.wwww - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r7.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.xyzw, r9.xyzw, r6.wwww - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.w, r0.y, r6.w - and r6.w, r6.w, l(255) - utof r6.w, r6.w - mul r0.y, r6.w, l(0.003922) - break - case l(2) - case l(10) - movc r6.w, r1.w, l(20), l(0) - ushr r8.xyzw, r7.xyzw, r6.wwww - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - utof r8.xyzw, r8.xyzw - mul r7.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r8.xyzw, r9.xyzw, r6.wwww - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - utof r8.xyzw, r8.xyzw - mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.w, r0.y, r6.w - and r6.w, r6.w, l(1023) - utof r6.w, r6.w - mul r0.y, r6.w, l(0.000978) - break - case l(3) - case l(12) - movc r6.w, r1.w, l(20), l(0) - ushr r8.xyzw, r7.xyzw, r6.wwww - and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r8.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r8.xyzw, l(7, 7, 7, 7), r13.xyzw, r8.xyzw, l(0, 0, 0, 0) - and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) - movc r8.xyzw, r12.xyzw, r11.xyzw, r8.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - iadd r8.xyzw, r11.xyzw, r8.xyzw - movc r7.xyzw, r10.xyzw, r8.xyzw, l(0,0,0,0) - ushr r8.xyzw, r9.xyzw, r6.wwww - and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r8.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r8.xyzw, l(7, 7, 7, 7), r13.xyzw, r8.xyzw, l(0, 0, 0, 0) - and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) - movc r8.xyzw, r12.xyzw, r11.xyzw, r8.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - iadd r8.xyzw, r11.xyzw, r8.xyzw - movc r9.xyzw, r10.xyzw, r8.xyzw, l(0,0,0,0) - ushr r6.w, r0.y, r6.w - and r8.xy, r6.wwww, l(1023, 127, 0, 0) - ubfe r8.z, l(3), l(7), r6.w - firstbit_hi r8.w, r8.y - iadd r8.w, r8.w, l(-24) - movc r8.w, r8.y, r8.w, l(8) - iadd r10.x, -r8.w, l(1) - movc r10.x, r8.z, r8.z, r10.x - bfi r6.w, l(7), r8.w, r6.w, l(0) - and r6.w, r6.w, l(127) - movc r6.w, r8.z, r8.y, r6.w - ishl r8.y, r10.x, l(23) - iadd r8.y, r8.y, l(0x3e000000) - ishl r6.w, r6.w, l(16) - iadd r6.w, r8.y, r6.w - movc r0.y, r8.x, r6.w, l(0) - break - case l(4) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.w, l(16), l(0), r0.y - itof r6.w, r6.w - mul r6.w, r6.w, l(0.000977) - max r0.y, r6.w, l(-1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r0.y, r0.y - break - default - break - endswitch - else - ld_raw r7.x, r6.y, T0[0].xxxx - iadd r8.xyzw, r6.yyyy, l(8, 16, 24, 32) - ld_raw r7.y, r8.x, T0[0].xxxx - ld_raw r7.z, r8.y, T0[0].xxxx - ld_raw r7.w, r8.z, T0[0].xxxx - ld_raw r9.x, r8.w, T0[0].xxxx - iadd r8.xyzw, r6.yyyy, l(40, 48, 56, 64) - ld_raw r9.y, r8.x, T0[0].xxxx - ld_raw r9.z, r8.y, T0[0].xxxx - ld_raw r9.w, r8.z, T0[0].xxxx - ld_raw r0.y, r8.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.y, l(16), l(0), r0.y - itof r6.y, r6.y - mul r6.y, r6.y, l(0.000977) - max r0.y, r6.y, l(-1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r0.y, r0.y - break - default - break - endswitch - endif - add r7.xyzw, r4.xyzw, r7.xyzw - add r8.xyzw, r5.xyzw, r9.xyzw - add r0.y, r0.y, r2.w - if_z r2.z - ld_raw r9.xyzw, r6.z, T0[0].xyzw - iadd r6.yw, r6.zzzz, l(0, 16, 0, 32) - ld_raw r10.xyzw, r6.y, T0[0].xyzw - ld_raw r6.y, r6.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.w, r1.w, l(16), l(0) - ushr r11.xyzw, r9.xyzw, r6.wwww - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.xyzw, r10.xyzw, r6.wwww - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.w, r6.y, r6.w - and r6.w, r6.w, l(255) - utof r6.w, r6.w - mul r6.y, r6.w, l(0.003922) - break - case l(2) - case l(10) - movc r6.w, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r6.wwww - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r11.xyzw, r10.xyzw, r6.wwww - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.w, r6.y, r6.w - and r6.w, r6.w, l(1023) - utof r6.w, r6.w - mul r6.y, r6.w, l(0.000978) - break - case l(3) - case l(12) - movc r6.w, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r6.wwww - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r11.xyzw, r10.xyzw, r6.wwww - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r6.w, r6.y, r6.w - and r11.xy, r6.wwww, l(1023, 127, 0, 0) - ubfe r11.z, l(3), l(7), r6.w - firstbit_hi r11.w, r11.y - iadd r11.w, r11.w, l(-24) - movc r11.w, r11.y, r11.w, l(8) - iadd r12.x, -r11.w, l(1) - movc r12.x, r11.z, r11.z, r12.x - bfi r6.w, l(7), r11.w, r6.w, l(0) - and r6.w, r6.w, l(127) - movc r6.w, r11.z, r11.y, r6.w - ishl r11.y, r12.x, l(23) - iadd r11.y, r11.y, l(0x3e000000) - ishl r6.w, r6.w, l(16) - iadd r6.w, r11.y, r6.w - movc r6.y, r11.x, r6.w, l(0) - break - case l(4) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.w, l(16), l(0), r6.y - itof r6.w, r6.w - mul r6.w, r6.w, l(0.000977) - max r6.y, r6.w, l(-1.000000) - break - case l(6) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - else - ld_raw r9.x, r6.z, T0[0].xxxx - iadd r11.xyzw, r6.zzzz, l(8, 16, 24, 32) - ld_raw r9.y, r11.x, T0[0].xxxx - ld_raw r9.z, r11.y, T0[0].xxxx - ld_raw r9.w, r11.z, T0[0].xxxx - ld_raw r10.x, r11.w, T0[0].xxxx - iadd r11.xyzw, r6.zzzz, l(40, 48, 56, 64) - ld_raw r10.y, r11.x, T0[0].xxxx - ld_raw r10.z, r11.y, T0[0].xxxx - ld_raw r10.w, r11.z, T0[0].xxxx - ld_raw r6.y, r11.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.y, r6.z, l(-1.000000) - break - case l(7) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - endif - add r4.xyzw, r7.xyzw, r9.xyzw - add r5.xyzw, r8.xyzw, r10.xyzw - add r2.w, r0.y, r6.y - endif -else - mov r6.x, r3.x -endif -mul r4.xyzw, r4.xyzw, r6.xxxx -mul r5.xyzw, r5.xyzw, r6.xxxx -mul_sat r0.y, r2.w, r6.x -if_nz r0.z - mov r4.x, r4.y - mov r4.w, r5.x - mov r5.z, r5.w -endif -if_nz r0.w - mov r4.xy, r5.xyxx - mov r4.xyz, r4.wxyw -endif -mov_sat r4.xyzw, r4.xyzw -mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.z, r4.y, l(256), r4.x -imad r0.z, r4.z, l(0x00010000), r0.z -imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.zzzz -mov_sat r5.xyzw, r5.xyzw -mad r5.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r5.xyzw, r5.xyzw -imad r0.z, r5.y, l(256), r5.x -imad r0.z, r5.z, l(0x00010000), r0.z -imad r4.y, r5.w, l(0x01000000), r0.z -store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw -mad r0.y, r0.y, l(255.000000), l(0.500000) -ftou r0.y, r0.y -iadd r0.z, r2.x, r1.y -ishl r0.z, l(36), r0.z -imad r0.x, r0.x, l(36), r0.z -if_nz r1.z - iadd r1.y, r0.x, l(4) -else - mov r1.y, r0.x -endif -if_z r2.z - ld_raw r4.xyzw, r1.y, T0[0].xyzw - iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) - ld_raw r5.xyzw, r2.x, T0[0].xyzw - ld_raw r2.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r10.xyzw, r8.xyzw - iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) - movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) - iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) - movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw - ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) - iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r8.xyzw, r6.xyzw - movc r4.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r10.xyzw, r8.xyzw - iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) - movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) - iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) - movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw - ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) - iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r8.xyzw, r6.xyzw - movc r5.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) - ushr r2.w, r2.x, r2.w - and r6.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r6.z, l(3), l(7), r2.w - firstbit_hi r6.w, r6.y - iadd r6.w, r6.w, l(-24) - movc r6.w, r6.y, r6.w, l(8) - iadd r7.x, -r6.w, l(1) - movc r7.x, r6.z, r6.z, r7.x - bfi r2.w, l(7), r6.w, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r6.z, r6.y, r2.w - ishl r6.y, r7.x, l(23) - iadd r6.y, r6.y, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r6.y, r2.w - movc r2.x, r6.x, r2.w, l(0) - break - case l(4) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -else - ld_raw r4.x, r1.y, T0[0].xxxx - iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) - ld_raw r4.y, r6.x, T0[0].xxxx - ld_raw r4.z, r6.y, T0[0].xxxx - ld_raw r4.w, r6.z, T0[0].xxxx - ld_raw r5.x, r6.w, T0[0].xxxx - iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) - ld_raw r5.y, r6.x, T0[0].xxxx - ld_raw r5.z, r6.y, T0[0].xxxx - ld_raw r5.w, r6.z, T0[0].xxxx - ld_raw r2.x, r6.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -endif -if_nz r3.y - mul r2.w, r3.x, l(0.500000) - ishl r6.x, l(2880), r3.z - iadd r6.x, r1.y, r6.x - if_z r2.z - ld_raw r7.xyzw, r6.x, T0[0].xyzw - iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) - ld_raw r8.xyzw, r6.y, T0[0].xyzw - ld_raw r6.y, r6.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r9.xyzw, r7.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r8.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r6.y, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r6.y, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r8.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r6.y, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r6.y, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r6.zzzz - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r6.z, r6.y, r6.z - and r9.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r9.z, r9.y - iadd r9.z, r9.z, l(-24) - movc r9.z, r9.y, r9.z, l(8) - iadd r9.w, -r9.z, l(1) - movc r9.w, r6.w, r6.w, r9.w - bfi r6.z, l(7), r9.z, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r9.y, r6.z - ishl r6.w, r9.w, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r6.y, r9.x, r6.z, l(0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.y, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - else - ld_raw r7.x, r6.x, T0[0].xxxx - iadd r9.xyzw, r6.xxxx, l(8, 16, 24, 32) - ld_raw r7.y, r9.x, T0[0].xxxx - ld_raw r7.z, r9.y, T0[0].xxxx - ld_raw r7.w, r9.z, T0[0].xxxx - ld_raw r8.x, r9.w, T0[0].xxxx - iadd r9.xyzw, r6.xxxx, l(40, 48, 56, 64) - ld_raw r8.y, r9.x, T0[0].xxxx - ld_raw r8.z, r9.y, T0[0].xxxx - ld_raw r8.w, r9.z, T0[0].xxxx - ld_raw r6.y, r9.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.x, l(16), l(0), r6.y - itof r6.x, r6.x - mul r6.x, r6.x, l(0.000977) - max r6.y, r6.x, l(-1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - endif - add r4.xyzw, r4.xyzw, r7.xyzw - add r5.xyzw, r5.xyzw, r8.xyzw - add r2.x, r2.x, r6.y - uge r6.x, r2.y, l(6) - if_nz r6.x - mul r2.w, r3.x, l(0.250000) - ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r6.xy, r1.yyyy, r6.xyxx - if_z r2.z - ld_raw r7.xyzw, r6.x, T0[0].xyzw - iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) - ld_raw r8.xyzw, r6.z, T0[0].xyzw - ld_raw r1.y, r6.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r9.xyzw, r7.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r8.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r1.y, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r1.y, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r8.xyzw, r6.zzzz - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r1.y, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r1.y, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r6.zzzz - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r6.z, r1.y, r6.z - and r9.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r9.z, r9.y - iadd r9.z, r9.z, l(-24) - movc r9.z, r9.y, r9.z, l(8) - iadd r9.w, -r9.z, l(1) - movc r9.w, r6.w, r6.w, r9.w - bfi r6.z, l(7), r9.z, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r9.y, r6.z - ishl r6.w, r9.w, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r1.y, r9.x, r6.z, l(0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r1.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r1.y, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - else - ld_raw r7.x, r6.x, T0[0].xxxx - iadd r9.xyzw, r6.xxxx, l(8, 16, 24, 32) - ld_raw r7.y, r9.x, T0[0].xxxx - ld_raw r7.z, r9.y, T0[0].xxxx - ld_raw r7.w, r9.z, T0[0].xxxx - ld_raw r8.x, r9.w, T0[0].xxxx - iadd r9.xyzw, r6.xxxx, l(40, 48, 56, 64) - ld_raw r8.y, r9.x, T0[0].xxxx - ld_raw r8.z, r9.y, T0[0].xxxx - ld_raw r8.w, r9.z, T0[0].xxxx - ld_raw r1.y, r9.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.x, l(16), l(0), r1.y - itof r6.x, r6.x - mul r6.x, r6.x, l(0.000977) - max r1.y, r6.x, l(-1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - endif - add r7.xyzw, r4.xyzw, r7.xyzw - add r8.xyzw, r5.xyzw, r8.xyzw - add r1.y, r1.y, r2.x - if_z r2.z - ld_raw r9.xyzw, r6.y, T0[0].xyzw - iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) - ld_raw r10.xyzw, r6.x, T0[0].xyzw - ld_raw r6.x, r6.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r11.xyzw, r9.xyzw, r6.zzzz - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.xyzw, r10.xyzw, r6.zzzz - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r6.x, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r6.x, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r6.zzzz - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r11.xyzw, r10.xyzw, r6.zzzz - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r6.x, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r6.x, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r6.zzzz - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r11.xyzw, r10.xyzw, r6.zzzz - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r6.z, r6.x, r6.z - and r11.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r11.z, r11.y - iadd r11.z, r11.z, l(-24) - movc r11.z, r11.y, r11.z, l(8) - iadd r11.w, -r11.z, l(1) - movc r11.w, r6.w, r6.w, r11.w - bfi r6.z, l(7), r11.z, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r11.y, r6.z - ishl r6.w, r11.w, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r6.x, r11.x, r6.z, l(0) - break - case l(4) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.x - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.x, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r6.x, r6.x - break - default - break - endswitch - else - ld_raw r9.x, r6.y, T0[0].xxxx - iadd r11.xyzw, r6.yyyy, l(8, 16, 24, 32) - ld_raw r9.y, r11.x, T0[0].xxxx - ld_raw r9.z, r11.y, T0[0].xxxx - ld_raw r9.w, r11.z, T0[0].xxxx - ld_raw r10.x, r11.w, T0[0].xxxx - iadd r11.xyzw, r6.yyyy, l(40, 48, 56, 64) - ld_raw r10.y, r11.x, T0[0].xxxx - ld_raw r10.z, r11.y, T0[0].xxxx - ld_raw r10.w, r11.z, T0[0].xxxx - ld_raw r6.x, r11.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.y, l(16), l(0), r6.x - itof r6.y, r6.y - mul r6.y, r6.y, l(0.000977) - max r6.x, r6.y, l(-1.000000) - break - case l(7) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r6.x, r6.x - break - default - break - endswitch - endif - add r4.xyzw, r7.xyzw, r9.xyzw - add r5.xyzw, r8.xyzw, r10.xyzw - add r2.x, r1.y, r6.x - endif -else - mov r2.w, r3.x -endif -mul r4.xyzw, r2.wwww, r4.xyzw -mul r5.xyzw, r2.wwww, r5.xyzw -mul_sat r6.y, r2.w, r2.x -if_nz r0.w - mov r4.x, r4.w - mov r4.yz, r5.xxyx -endif -iadd r7.xyzw, r1.xxxx, l(1, 2, 3, 4) -mov_sat r4.xyzw, r4.xyzw -mad r8.xyz, r4.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) -ftou r8.xyz, r8.xyzx -imad r1.y, r8.y, l(256), r8.x -ishl r2.x, r8.z, l(24) -imad r1.y, r1.y, l(256), r2.x -iadd r8.xzw, r0.yyyy, r1.yyyy -mov_sat r4.xyz, r5.xyzx -mad r4.xyzw, r4.wxyz, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -imad r8.y, r4.w, l(0x01000000), r0.y -store_uav_typed U0[0].xyzw, r7.xxxx, r8.xyzw -mov_sat r6.x, r5.w -mad r2.xw, r6.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) -ftou r2.xw, r2.xxxw -imad r0.y, r2.w, l(256), r2.x -iadd r0.x, r0.z, r0.x -if_nz r1.z - iadd r1.y, r0.x, l(4) -else - mov r1.y, r0.x -endif -if_z r2.z - ld_raw r4.xyzw, r1.y, T0[0].xyzw - iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) - ld_raw r5.xyzw, r2.x, T0[0].xyzw - ld_raw r2.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r9.xyzw, r6.xyzw - movc r4.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r9.xyzw, r6.xyzw - movc r5.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) - ushr r2.w, r2.x, r2.w - and r6.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r6.z, l(3), l(7), r2.w - firstbit_hi r6.w, r6.y - iadd r6.w, r6.w, l(-24) - movc r6.w, r6.y, r6.w, l(8) - iadd r7.x, -r6.w, l(1) - movc r7.x, r6.z, r6.z, r7.x - bfi r2.w, l(7), r6.w, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r6.z, r6.y, r2.w - ishl r6.y, r7.x, l(23) - iadd r6.y, r6.y, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r6.y, r2.w - movc r2.x, r6.x, r2.w, l(0) - break - case l(4) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -else - ld_raw r4.x, r1.y, T0[0].xxxx - iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) - ld_raw r4.y, r6.x, T0[0].xxxx - ld_raw r4.z, r6.y, T0[0].xxxx - ld_raw r4.w, r6.z, T0[0].xxxx - ld_raw r5.x, r6.w, T0[0].xxxx - iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) - ld_raw r5.y, r6.x, T0[0].xxxx - ld_raw r5.z, r6.y, T0[0].xxxx - ld_raw r5.w, r6.z, T0[0].xxxx - ld_raw r2.x, r6.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -endif -if_nz r3.y - mul r2.w, r3.x, l(0.500000) - ishl r6.x, l(2880), r3.z - iadd r6.x, r1.y, r6.x - if_z r2.z - ld_raw r8.xyzw, r6.x, T0[0].xyzw - iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) - ld_raw r9.xyzw, r6.y, T0[0].xyzw - ld_raw r6.y, r6.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r6.y, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r6.y, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r6.y, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r6.y, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r6.z, r6.y, r6.z - and r10.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r7.x, r10.y - iadd r7.x, r7.x, l(-24) - movc r7.x, r10.y, r7.x, l(8) - iadd r10.z, -r7.x, l(1) - movc r10.z, r6.w, r6.w, r10.z - bfi r6.z, l(7), r7.x, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r10.y, r6.z - ishl r6.w, r10.z, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r6.y, r10.x, r6.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.y, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - else - ld_raw r8.x, r6.x, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r6.y, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.x, l(16), l(0), r6.y - itof r6.x, r6.x - mul r6.x, r6.x, l(0.000977) - max r6.y, r6.x, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - endif - add r4.xyzw, r4.xyzw, r8.xyzw - add r5.xyzw, r5.xyzw, r9.xyzw - add r2.x, r2.x, r6.y - uge r6.x, r2.y, l(6) - if_nz r6.x - mul r2.w, r3.x, l(0.250000) - ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r6.xy, r1.yyyy, r6.xyxx - if_z r2.z - ld_raw r8.xyzw, r6.x, T0[0].xyzw - iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) - ld_raw r9.xyzw, r6.z, T0[0].xyzw - ld_raw r1.y, r6.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r1.y, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r1.y, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r1.y, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r1.y, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r6.z, r1.y, r6.z - and r10.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r7.x, r10.y - iadd r7.x, r7.x, l(-24) - movc r7.x, r10.y, r7.x, l(8) - iadd r10.z, -r7.x, l(1) - movc r10.z, r6.w, r6.w, r10.z - bfi r6.z, l(7), r7.x, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r10.y, r6.z - ishl r6.w, r10.z, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r1.y, r10.x, r6.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r1.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r1.y, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - else - ld_raw r8.x, r6.x, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r1.y, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.x, l(16), l(0), r1.y - itof r6.x, r6.x - mul r6.x, r6.x, l(0.000977) - max r1.y, r6.x, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - endif - add r8.xyzw, r4.xyzw, r8.xyzw - add r9.xyzw, r5.xyzw, r9.xyzw - add r1.y, r1.y, r2.x - if_z r2.z - ld_raw r10.xyzw, r6.y, T0[0].xyzw - iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) - ld_raw r11.xyzw, r6.x, T0[0].xyzw - ld_raw r6.x, r6.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r12.xyzw, r10.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.xyzw, r11.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r6.x, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r6.x, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r12.xyzw, r11.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r6.x, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r6.x, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r6.zzzz - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r12.xyzw, r11.xyzw, r6.zzzz - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r6.z, r6.x, r6.z - and r12.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r7.x, r12.y - iadd r7.x, r7.x, l(-24) - movc r7.x, r12.y, r7.x, l(8) - iadd r12.z, -r7.x, l(1) - movc r12.z, r6.w, r6.w, r12.z - bfi r6.z, l(7), r7.x, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r12.y, r6.z - ishl r6.w, r12.z, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r6.x, r12.x, r6.z, l(0) - break - case l(4) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.x - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.x, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r6.x, r6.x - break - default - break - endswitch - else - ld_raw r10.x, r6.y, T0[0].xxxx - iadd r12.xyzw, r6.yyyy, l(8, 16, 24, 32) - ld_raw r10.y, r12.x, T0[0].xxxx - ld_raw r10.z, r12.y, T0[0].xxxx - ld_raw r10.w, r12.z, T0[0].xxxx - ld_raw r11.x, r12.w, T0[0].xxxx - iadd r12.xyzw, r6.yyyy, l(40, 48, 56, 64) - ld_raw r11.y, r12.x, T0[0].xxxx - ld_raw r11.z, r12.y, T0[0].xxxx - ld_raw r11.w, r12.z, T0[0].xxxx - ld_raw r6.x, r12.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.y, l(16), l(0), r6.x - itof r6.y, r6.y - mul r6.y, r6.y, l(0.000977) - max r6.x, r6.y, l(-1.000000) - break - case l(7) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r6.x, r6.x - break - default - break - endswitch - endif - add r4.xyzw, r8.xyzw, r10.xyzw - add r5.xyzw, r9.xyzw, r11.xyzw - add r2.x, r1.y, r6.x - endif -else - mov r2.w, r3.x -endif -mul r4.xyzw, r2.wwww, r4.xwyz -mul r5.xyzw, r2.wwww, r5.xyzw -mul_sat r6.z, r2.w, r2.x -if_nz r0.w - mov r8.x, r4.y - mov r8.y, r5.x - mov r4.x, r5.y -else - mov r8.xy, r4.xzxx - mov r4.x, r4.w -endif -mov_sat r8.xy, r8.xyxx -mad r2.xw, r8.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) -ftou r2.xw, r2.xxxw -ishl r1.y, r2.w, l(24) -imad r1.y, r2.x, l(0x00010000), r1.y -iadd r8.xzw, r0.yyyy, r1.yyyy -mov r4.zw, r5.xxxy -mov_sat r4.xyzw, r4.xyzw -mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -imad r8.y, r4.w, l(0x01000000), r0.y -store_uav_typed U0[0].xyzw, r7.yyyy, r8.xyzw -mov_sat r6.xy, r5.zwzz -mad r4.xyz, r6.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) -ftou r4.xyz, r4.xyzx -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -iadd r0.x, r0.z, r0.x -if_nz r1.z - iadd r1.y, r0.x, l(4) -else - mov r1.y, r0.x -endif -if_z r2.z - ld_raw r4.xyzw, r1.y, T0[0].xyzw - iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) - ld_raw r5.xyzw, r2.x, T0[0].xyzw - ld_raw r2.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - utof r6.xyzw, r6.xyzw - mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r6.xyzw, r4.xyzw, r2.wwww - and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r9.xyzw, r6.xyzw - movc r4.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) - ushr r6.xyzw, r5.xyzw, r2.wwww - and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) - and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) - movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - iadd r6.xyzw, r9.xyzw, r6.xyzw - movc r5.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) - ushr r2.w, r2.x, r2.w - and r6.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r6.z, l(3), l(7), r2.w - firstbit_hi r6.w, r6.y - iadd r6.w, r6.w, l(-24) - movc r6.w, r6.y, r6.w, l(8) - iadd r7.x, -r6.w, l(1) - movc r7.x, r6.z, r6.z, r7.x - bfi r2.w, l(7), r6.w, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r6.z, r6.y, r2.w - ishl r6.y, r7.x, l(23) - iadd r6.y, r6.y, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r6.y, r2.w - movc r2.x, r6.x, r2.w, l(0) - break - case l(4) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -else - ld_raw r4.x, r1.y, T0[0].xxxx - iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) - ld_raw r4.y, r6.x, T0[0].xxxx - ld_raw r4.z, r6.y, T0[0].xxxx - ld_raw r4.w, r6.z, T0[0].xxxx - ld_raw r5.x, r6.w, T0[0].xxxx - iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) - ld_raw r5.y, r6.x, T0[0].xxxx - ld_raw r5.z, r6.y, T0[0].xxxx - ld_raw r5.w, r6.z, T0[0].xxxx - ld_raw r2.x, r6.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r6.xyzw, r6.xyzw - mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r4.xyzw, r4.xyzw - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -endif -if_nz r3.y - mul r2.w, r3.x, l(0.500000) - ishl r6.x, l(2880), r3.z - iadd r6.x, r1.y, r6.x - if_z r2.z - ld_raw r8.xyzw, r6.x, T0[0].xyzw - iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) - ld_raw r9.xyzw, r6.y, T0[0].xyzw - ld_raw r6.y, r6.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r6.y, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r6.y, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r6.y, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r6.y, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r6.z, r6.y, r6.z - and r7.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r10.x, r7.y - iadd r10.x, r10.x, l(-24) - movc r10.x, r7.y, r10.x, l(8) - iadd r10.y, -r10.x, l(1) - movc r10.y, r6.w, r6.w, r10.y - bfi r6.z, l(7), r10.x, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r7.y, r6.z - ishl r6.w, r10.y, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r6.y, r7.x, r6.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.y, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - else - ld_raw r8.x, r6.x, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r6.y, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.x, l(16), l(0), r6.y - itof r6.x, r6.x - mul r6.x, r6.x, l(0.000977) - max r6.y, r6.x, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r6.y, r6.y - break - default - break - endswitch - endif - add r4.xyzw, r4.xyzw, r8.xyzw - add r5.xyzw, r5.xyzw, r9.xyzw - add r2.x, r2.x, r6.y - uge r6.x, r2.y, l(6) - if_nz r6.x - mul r2.w, r3.x, l(0.250000) - ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r6.xy, r1.yyyy, r6.xyxx - if_z r2.z - ld_raw r8.xyzw, r6.x, T0[0].xyzw - iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) - ld_raw r9.xyzw, r6.z, T0[0].xyzw - ld_raw r1.y, r6.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r1.y, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r1.y, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r1.y, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r1.y, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r6.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r6.z, r1.y, r6.z - and r7.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r10.x, r7.y - iadd r10.x, r10.x, l(-24) - movc r10.x, r7.y, r10.x, l(8) - iadd r10.y, -r10.x, l(1) - movc r10.y, r6.w, r6.w, r10.y - bfi r6.z, l(7), r10.x, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r7.y, r6.z - ishl r6.w, r10.y, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r1.y, r7.x, r6.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r1.y - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r1.y, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - else - ld_raw r8.x, r6.x, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r1.y, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.x, l(16), l(0), r1.y - itof r6.x, r6.x - mul r6.x, r6.x, l(0.000977) - max r1.y, r6.x, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - endif - add r8.xyzw, r4.xyzw, r8.xyzw - add r9.xyzw, r5.xyzw, r9.xyzw - add r1.y, r1.y, r2.x - if_z r2.z - ld_raw r10.xyzw, r6.y, T0[0].xyzw - iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) - ld_raw r11.xyzw, r6.x, T0[0].xyzw - ld_raw r6.x, r6.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r6.z, r1.w, l(16), l(0) - ushr r12.xyzw, r10.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.xyzw, r11.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r6.z, r6.x, r6.z - and r6.z, r6.z, l(255) - utof r6.z, r6.z - mul r6.x, r6.z, l(0.003922) - break - case l(2) - case l(10) - movc r6.z, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r12.xyzw, r11.xyzw, r6.zzzz - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r6.z, r6.x, r6.z - and r6.z, r6.z, l(1023) - utof r6.z, r6.z - mul r6.x, r6.z, l(0.000978) - break - case l(3) - case l(12) - movc r6.z, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r6.zzzz - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r12.xyzw, r11.xyzw, r6.zzzz - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r6.z, r6.x, r6.z - and r7.xy, r6.zzzz, l(1023, 127, 0, 0) - ubfe r6.w, l(3), l(7), r6.z - firstbit_hi r12.x, r7.y - iadd r12.x, r12.x, l(-24) - movc r12.x, r7.y, r12.x, l(8) - iadd r12.y, -r12.x, l(1) - movc r12.y, r6.w, r6.w, r12.y - bfi r6.z, l(7), r12.x, r6.z, l(0) - and r6.z, r6.z, l(127) - movc r6.z, r6.w, r7.y, r6.z - ishl r6.w, r12.y, l(23) - iadd r6.w, r6.w, l(0x3e000000) - ishl r6.z, r6.z, l(16) - iadd r6.z, r6.w, r6.z - movc r6.x, r7.x, r6.z, l(0) - break - case l(4) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.z, l(16), l(0), r6.x - itof r6.z, r6.z - mul r6.z, r6.z, l(0.000977) - max r6.x, r6.z, l(-1.000000) - break - case l(6) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r6.x, r6.x - break - default - break - endswitch - else - ld_raw r10.x, r6.y, T0[0].xxxx - iadd r12.xyzw, r6.yyyy, l(8, 16, 24, 32) - ld_raw r10.y, r12.x, T0[0].xxxx - ld_raw r10.z, r12.y, T0[0].xxxx - ld_raw r10.w, r12.z, T0[0].xxxx - ld_raw r11.x, r12.w, T0[0].xxxx - iadd r12.xyzw, r6.yyyy, l(40, 48, 56, 64) - ld_raw r11.y, r12.x, T0[0].xxxx - ld_raw r11.z, r12.y, T0[0].xxxx - ld_raw r11.w, r12.z, T0[0].xxxx - ld_raw r6.x, r12.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r6.y, l(16), l(0), r6.x - itof r6.y, r6.y - mul r6.y, r6.y, l(0.000977) - max r6.x, r6.y, l(-1.000000) - break - case l(7) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r6.x, r6.x - break - default - break - endswitch - endif - add r4.xyzw, r8.xyzw, r10.xyzw - add r5.xyzw, r9.xyzw, r11.xyzw - add r2.x, r1.y, r6.x - endif -else - mov r2.w, r3.x -endif -mul r4.xyzw, r2.wwww, r4.yzxw -mul r5.xyzw, r2.wwww, r5.xyzw -mul_sat r6.w, r2.w, r2.x -if_nz r0.w - mov r4.xz, r5.yyxy - mov r1.y, r4.w -else - mov r1.y, r4.z - mov r4.xz, r4.yyxy -endif -mov_sat r1.y, r1.y -mad r1.y, r1.y, l(255.000000), l(0.500000) -ftou r1.y, r1.y -imad r8.xzw, r1.yyyy, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy -mov r4.y, r5.x -mov_sat r4.xyzw, r4.xyzw -mad r4.xyzw, r4.zxwy, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -imad r8.y, r4.w, l(0x01000000), r0.y -store_uav_typed U0[0].xyzw, r7.zzzz, r8.xyzw -mov_sat r6.xyz, r5.yzwy -mad r4.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy -iadd r0.x, r0.z, r0.x -if_nz r1.z - iadd r0.y, r0.x, l(4) -else - mov r0.y, r0.x -endif -if_z r2.z - ld_raw r5.xyzw, r0.y, T0[0].xyzw - iadd r2.xw, r0.yyyy, l(16, 0, 0, 32) - ld_raw r6.xyzw, r2.x, T0[0].xyzw - ld_raw r1.y, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.x, r1.w, l(16), l(0) - ushr r8.xyzw, r5.xyzw, r2.xxxx - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r5.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r8.xyzw, r6.xyzw, r2.xxxx - and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) - utof r8.xyzw, r8.xyzw - mul r6.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.x, r1.y, r2.x - and r2.x, r2.x, l(255) - utof r2.x, r2.x - mul r1.y, r2.x, l(0.003922) - break - case l(2) - case l(10) - movc r2.x, r1.w, l(20), l(0) - ushr r8.xyzw, r5.xyzw, r2.xxxx - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - utof r8.xyzw, r8.xyzw - mul r5.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r8.xyzw, r6.xyzw, r2.xxxx - and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - utof r8.xyzw, r8.xyzw - mul r6.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.x, r1.y, r2.x - and r2.x, r2.x, l(1023) - utof r2.x, r2.x - mul r1.y, r2.x, l(0.000978) - break - case l(3) - case l(12) - movc r2.x, r1.w, l(20), l(0) - ushr r8.xyzw, r5.xyzw, r2.xxxx - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r8.xyzw, l(127, 127, 127, 127) - ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw - firstbit_hi r12.xyzw, r10.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) - iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw - bfi r8.xyzw, l(7, 7, 7, 7), r12.xyzw, r8.xyzw, l(0, 0, 0, 0) - and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) - movc r8.xyzw, r11.xyzw, r10.xyzw, r8.xyzw - ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - iadd r8.xyzw, r10.xyzw, r8.xyzw - movc r5.xyzw, r9.xyzw, r8.xyzw, l(0,0,0,0) - ushr r8.xyzw, r6.xyzw, r2.xxxx - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r8.xyzw, l(127, 127, 127, 127) - ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw - firstbit_hi r12.xyzw, r10.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) - iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw - bfi r8.xyzw, l(7, 7, 7, 7), r12.xyzw, r8.xyzw, l(0, 0, 0, 0) - and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) - movc r8.xyzw, r11.xyzw, r10.xyzw, r8.xyzw - ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - iadd r8.xyzw, r10.xyzw, r8.xyzw - movc r6.xyzw, r9.xyzw, r8.xyzw, l(0,0,0,0) - ushr r2.x, r1.y, r2.x - and r7.xy, r2.xxxx, l(1023, 127, 0, 0) - ubfe r2.w, l(3), l(7), r2.x - firstbit_hi r7.z, r7.y - iadd r7.z, r7.z, l(-24) - movc r7.z, r7.y, r7.z, l(8) - iadd r8.x, -r7.z, l(1) - movc r8.x, r2.w, r2.w, r8.x - bfi r2.x, l(7), r7.z, r2.x, l(0) - and r2.x, r2.x, l(127) - movc r2.x, r2.w, r7.y, r2.x - ishl r2.w, r8.x, l(23) - iadd r2.w, r2.w, l(0x3e000000) - ishl r2.x, r2.x, l(16) - iadd r2.x, r2.w, r2.x - movc r1.y, r7.x, r2.x, l(0) - break - case l(4) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.x, l(16), l(0), r1.y - itof r2.x, r2.x - mul r2.x, r2.x, l(0.000977) - max r1.y, r2.x, l(-1.000000) - break - case l(6) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch -else - ld_raw r5.x, r0.y, T0[0].xxxx - iadd r8.xyzw, r0.yyyy, l(8, 16, 24, 32) - ld_raw r5.y, r8.x, T0[0].xxxx - ld_raw r5.z, r8.y, T0[0].xxxx - ld_raw r5.w, r8.z, T0[0].xxxx - ld_raw r6.x, r8.w, T0[0].xxxx - iadd r8.xyzw, r0.yyyy, l(40, 48, 56, 64) - ld_raw r6.y, r8.x, T0[0].xxxx - ld_raw r6.z, r8.y, T0[0].xxxx - ld_raw r6.w, r8.z, T0[0].xxxx - ld_raw r1.y, r8.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.x, l(16), l(0), r1.y - itof r2.x, r2.x - mul r2.x, r2.x, l(0.000977) - max r1.y, r2.x, l(-1.000000) - break - case l(7) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch -endif -if_nz r3.y - mul r2.x, r3.x, l(0.500000) - ishl r2.w, l(2880), r3.z - iadd r2.w, r0.y, r2.w - if_z r2.z - ld_raw r8.xyzw, r2.w, T0[0].xyzw - iadd r7.xy, r2.wwww, l(16, 32, 0, 0) - ld_raw r9.xyzw, r7.x, T0[0].xyzw - ld_raw r7.x, r7.y, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.y, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r7.yyyy - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r7.yyyy - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.y, r7.x, r7.y - and r7.y, r7.y, l(255) - utof r7.y, r7.y - mul r7.x, r7.y, l(0.003922) - break - case l(2) - case l(10) - movc r7.y, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r7.yyyy - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r7.yyyy - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.y, r7.x, r7.y - and r7.y, r7.y, l(1023) - utof r7.y, r7.y - mul r7.x, r7.y, l(0.000978) - break - case l(3) - case l(12) - movc r7.y, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r7.yyyy - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r7.yyyy - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r7.y, r7.x, r7.y - and r10.xy, r7.yyyy, l(1023, 127, 0, 0) - ubfe r7.z, l(3), l(7), r7.y - firstbit_hi r10.z, r10.y - iadd r10.z, r10.z, l(-24) - movc r10.z, r10.y, r10.z, l(8) - iadd r10.w, -r10.z, l(1) - movc r10.w, r7.z, r7.z, r10.w - bfi r7.y, l(7), r10.z, r7.y, l(0) - and r7.y, r7.y, l(127) - movc r7.y, r7.z, r10.y, r7.y - ishl r7.z, r10.w, l(23) - iadd r7.z, r7.z, l(0x3e000000) - ishl r7.y, r7.y, l(16) - iadd r7.y, r7.z, r7.y - movc r7.x, r10.x, r7.y, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.y, l(16), l(0), r7.x - itof r7.y, r7.y - mul r7.y, r7.y, l(0.000977) - max r7.x, r7.y, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r7.x, r7.x - break - default - break - endswitch - else - ld_raw r8.x, r2.w, T0[0].xxxx - iadd r10.xyzw, r2.wwww, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r2.wwww, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r7.x, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r7.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r7.x, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r7.x, r7.x - break - default - break - endswitch - endif - add r5.xyzw, r5.xyzw, r8.xyzw - add r6.xyzw, r6.xyzw, r9.xyzw - add r1.y, r1.y, r7.x - uge r2.w, r2.y, l(6) - if_nz r2.w - mul r2.x, r3.x, l(0.250000) - ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r7.xy, r0.yyyy, r7.xyxx - if_z r2.z - ld_raw r8.xyzw, r7.x, T0[0].xyzw - iadd r9.xy, r7.xxxx, l(16, 32, 0, 0) - ld_raw r10.xyzw, r9.x, T0[0].xyzw - ld_raw r0.y, r9.y, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r9.xyzw, r8.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r10.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r0.y, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r0.y, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r9.xyzw, r8.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r10.xyzw, r2.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r0.y, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r0.y, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r9.xyzw, r8.xyzw, r2.wwww - and r11.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r14.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r13.xyzw, r12.xyzw, r9.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r12.xyzw, r9.xyzw - movc r8.xyzw, r11.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r10.xyzw, r2.wwww - and r11.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r14.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r13.xyzw, r12.xyzw, r9.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r12.xyzw, r9.xyzw - movc r10.xyzw, r11.xyzw, r9.xyzw, l(0,0,0,0) - ushr r2.w, r0.y, r2.w - and r9.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r7.z, l(3), l(7), r2.w - firstbit_hi r9.z, r9.y - iadd r9.z, r9.z, l(-24) - movc r9.z, r9.y, r9.z, l(8) - iadd r9.w, -r9.z, l(1) - movc r9.w, r7.z, r7.z, r9.w - bfi r2.w, l(7), r9.z, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r7.z, r9.y, r2.w - ishl r7.z, r9.w, l(23) - iadd r7.z, r7.z, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r7.z, r2.w - movc r0.y, r9.x, r2.w, l(0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r0.y - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r0.y, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r0.y, r0.y - break - default - break - endswitch - else - ld_raw r8.x, r7.x, T0[0].xxxx - iadd r9.xyzw, r7.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r9.x, T0[0].xxxx - ld_raw r8.z, r9.y, T0[0].xxxx - ld_raw r8.w, r9.z, T0[0].xxxx - ld_raw r10.x, r9.w, T0[0].xxxx - iadd r9.xyzw, r7.xxxx, l(40, 48, 56, 64) - ld_raw r10.y, r9.x, T0[0].xxxx - ld_raw r10.z, r9.y, T0[0].xxxx - ld_raw r10.w, r9.z, T0[0].xxxx - ld_raw r0.y, r9.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r0.y - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r0.y, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r0.y, r0.y - break - default - break - endswitch - endif - add r8.xyzw, r5.xyzw, r8.xyzw - add r9.xyzw, r6.xyzw, r10.xyzw - add r0.y, r0.y, r1.y - if_z r2.z - ld_raw r10.xyzw, r7.y, T0[0].xyzw - iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) - ld_raw r11.xyzw, r7.x, T0[0].xyzw - ld_raw r2.w, r7.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.x, r1.w, l(16), l(0) - ushr r12.xyzw, r10.xyzw, r7.xxxx - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.xyzw, r11.xyzw, r7.xxxx - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.x, r2.w, r7.x - and r7.x, r7.x, l(255) - utof r7.x, r7.x - mul r2.w, r7.x, l(0.003922) - break - case l(2) - case l(10) - movc r7.x, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r7.xxxx - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r12.xyzw, r11.xyzw, r7.xxxx - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.x, r2.w, r7.x - and r7.x, r7.x, l(1023) - utof r7.x, r7.x - mul r2.w, r7.x, l(0.000978) - break - case l(3) - case l(12) - movc r7.x, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r7.xxxx - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r12.xyzw, r11.xyzw, r7.xxxx - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r7.x, r2.w, r7.x - and r12.xy, r7.xxxx, l(1023, 127, 0, 0) - ubfe r7.z, l(3), l(7), r7.x - firstbit_hi r12.z, r12.y - iadd r12.z, r12.z, l(-24) - movc r12.z, r12.y, r12.z, l(8) - iadd r12.w, -r12.z, l(1) - movc r12.w, r7.z, r7.z, r12.w - bfi r7.x, l(7), r12.z, r7.x, l(0) - and r7.x, r7.x, l(127) - movc r7.x, r7.z, r12.y, r7.x - ishl r7.z, r12.w, l(23) - iadd r7.z, r7.z, l(0x3e000000) - ishl r7.x, r7.x, l(16) - iadd r7.x, r7.z, r7.x - movc r2.w, r12.x, r7.x, l(0) - break - case l(4) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.x, l(16), l(0), r2.w - itof r7.x, r7.x - mul r7.x, r7.x, l(0.000977) - max r2.w, r7.x, l(-1.000000) - break - case l(6) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r2.w, r2.w - break - default - break - endswitch - else - ld_raw r10.x, r7.y, T0[0].xxxx - iadd r12.xyzw, r7.yyyy, l(8, 16, 24, 32) - ld_raw r10.y, r12.x, T0[0].xxxx - ld_raw r10.z, r12.y, T0[0].xxxx - ld_raw r10.w, r12.z, T0[0].xxxx - ld_raw r11.x, r12.w, T0[0].xxxx - iadd r12.xyzw, r7.yyyy, l(40, 48, 56, 64) - ld_raw r11.y, r12.x, T0[0].xxxx - ld_raw r11.z, r12.y, T0[0].xxxx - ld_raw r11.w, r12.z, T0[0].xxxx - ld_raw r2.w, r12.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.x, l(16), l(0), r2.w - itof r7.x, r7.x - mul r7.x, r7.x, l(0.000977) - max r2.w, r7.x, l(-1.000000) - break - case l(7) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r2.w, r2.w - break - default - break - endswitch - endif - add r5.xyzw, r8.xyzw, r10.xyzw - add r6.xyzw, r9.xyzw, r11.xyzw - add r1.y, r0.y, r2.w - endif -else - mov r2.x, r3.x -endif -mul r5.xyzw, r2.xxxx, r5.xyzw -mul r6.xyzw, r2.xxxx, r6.xyzw -mul_sat r0.y, r1.y, r2.x -if_nz r0.w - mov r5.x, r5.w - mov r5.yz, r6.xxyx -endif -mov_sat r5.xyzw, r5.xyzw -mad r5.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r5.xyzw, r5.xyzw -imad r1.y, r5.y, l(256), r5.x -imad r1.y, r5.z, l(0x00010000), r1.y -imad r4.y, r5.w, l(0x01000000), r1.y -store_uav_typed U0[0].xyzw, r7.wwww, r4.xyzw -mov_sat r6.xyzw, r6.xyzw -mad r4.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r1.y, r4.y, l(256), r4.x -imad r1.y, r4.z, l(0x00010000), r1.y -imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r1.yyyy -mad r0.y, r0.y, l(255.000000), l(0.500000) -ftou r0.y, r0.y -iadd r0.x, r0.z, r0.x -if_nz r1.z - iadd r1.y, r0.x, l(4) -else - mov r1.y, r0.x -endif -if_z r2.z - ld_raw r5.xyzw, r1.y, T0[0].xyzw - iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) - ld_raw r6.xyzw, r2.x, T0[0].xyzw - ld_raw r2.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r9.xyzw, r7.xyzw - movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r9.xyzw, r7.xyzw - movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) - ushr r2.w, r2.x, r2.w - and r7.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r7.z, l(3), l(7), r2.w - firstbit_hi r7.w, r7.y - iadd r7.w, r7.w, l(-24) - movc r7.w, r7.y, r7.w, l(8) - iadd r8.x, -r7.w, l(1) - movc r8.x, r7.z, r7.z, r8.x - bfi r2.w, l(7), r7.w, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r7.z, r7.y, r2.w - ishl r7.y, r8.x, l(23) - iadd r7.y, r7.y, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r7.y, r2.w - movc r2.x, r7.x, r2.w, l(0) - break - case l(4) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -else - ld_raw r5.x, r1.y, T0[0].xxxx - iadd r7.xyzw, r1.yyyy, l(8, 16, 24, 32) - ld_raw r5.y, r7.x, T0[0].xxxx - ld_raw r5.z, r7.y, T0[0].xxxx - ld_raw r5.w, r7.z, T0[0].xxxx - ld_raw r6.x, r7.w, T0[0].xxxx - iadd r7.xyzw, r1.yyyy, l(40, 48, 56, 64) - ld_raw r6.y, r7.x, T0[0].xxxx - ld_raw r6.z, r7.y, T0[0].xxxx - ld_raw r6.w, r7.z, T0[0].xxxx - ld_raw r2.x, r7.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -endif -if_nz r3.y - mul r2.w, r3.x, l(0.500000) - ishl r7.x, l(2880), r3.z - iadd r7.x, r1.y, r7.x - if_z r2.z - ld_raw r8.xyzw, r7.x, T0[0].xyzw - iadd r7.yz, r7.xxxx, l(0, 16, 32, 0) - ld_raw r9.xyzw, r7.y, T0[0].xyzw - ld_raw r7.y, r7.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.z, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.z, r7.y, r7.z - and r7.z, r7.z, l(255) - utof r7.z, r7.z - mul r7.y, r7.z, l(0.003922) - break - case l(2) - case l(10) - movc r7.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.z, r7.y, r7.z - and r7.z, r7.z, l(1023) - utof r7.z, r7.z - mul r7.y, r7.z, l(0.000978) - break - case l(3) - case l(12) - movc r7.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r7.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r7.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r7.z, r7.y, r7.z - and r10.xy, r7.zzzz, l(1023, 127, 0, 0) - ubfe r7.w, l(3), l(7), r7.z - firstbit_hi r10.z, r10.y - iadd r10.z, r10.z, l(-24) - movc r10.z, r10.y, r10.z, l(8) - iadd r10.w, -r10.z, l(1) - movc r10.w, r7.w, r7.w, r10.w - bfi r7.z, l(7), r10.z, r7.z, l(0) - and r7.z, r7.z, l(127) - movc r7.z, r7.w, r10.y, r7.z - ishl r7.w, r10.w, l(23) - iadd r7.w, r7.w, l(0x3e000000) - ishl r7.z, r7.z, l(16) - iadd r7.z, r7.w, r7.z - movc r7.y, r10.x, r7.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.z, l(16), l(0), r7.y - itof r7.z, r7.z - mul r7.z, r7.z, l(0.000977) - max r7.y, r7.z, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r7.y, r7.y - break - default - break - endswitch - else - ld_raw r8.x, r7.x, T0[0].xxxx - iadd r10.xyzw, r7.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r7.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r7.y, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.x, l(16), l(0), r7.y - itof r7.x, r7.x - mul r7.x, r7.x, l(0.000977) - max r7.y, r7.x, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r7.y, r7.y - break - default - break - endswitch - endif - add r5.xyzw, r5.xyzw, r8.xyzw - add r6.xyzw, r6.xyzw, r9.xyzw - add r2.x, r2.x, r7.y - uge r7.x, r2.y, l(6) - if_nz r7.x - mul r2.w, r3.x, l(0.250000) - ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r7.xy, r1.yyyy, r7.xyxx - if_z r2.z - ld_raw r8.xyzw, r7.x, T0[0].xyzw - iadd r7.zw, r7.xxxx, l(0, 0, 16, 32) - ld_raw r9.xyzw, r7.z, T0[0].xyzw - ld_raw r1.y, r7.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.z, r1.w, l(16), l(0) - ushr r10.xyzw, r8.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.z, r1.y, r7.z - and r7.z, r7.z, l(255) - utof r7.z, r7.z - mul r1.y, r7.z, l(0.003922) - break - case l(2) - case l(10) - movc r7.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r7.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.z, r1.y, r7.z - and r7.z, r7.z, l(1023) - utof r7.z, r7.z - mul r1.y, r7.z, l(0.000978) - break - case l(3) - case l(12) - movc r7.z, r1.w, l(20), l(0) - ushr r10.xyzw, r8.xyzw, r7.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r7.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r7.z, r1.y, r7.z - and r10.xy, r7.zzzz, l(1023, 127, 0, 0) - ubfe r7.w, l(3), l(7), r7.z - firstbit_hi r10.z, r10.y - iadd r10.z, r10.z, l(-24) - movc r10.z, r10.y, r10.z, l(8) - iadd r10.w, -r10.z, l(1) - movc r10.w, r7.w, r7.w, r10.w - bfi r7.z, l(7), r10.z, r7.z, l(0) - and r7.z, r7.z, l(127) - movc r7.z, r7.w, r10.y, r7.z - ishl r7.w, r10.w, l(23) - iadd r7.w, r7.w, l(0x3e000000) - ishl r7.z, r7.z, l(16) - iadd r7.z, r7.w, r7.z - movc r1.y, r10.x, r7.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.z, l(16), l(0), r1.y - itof r7.z, r7.z - mul r7.z, r7.z, l(0.000977) - max r1.y, r7.z, l(-1.000000) - break - case l(6) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - else - ld_raw r8.x, r7.x, T0[0].xxxx - iadd r10.xyzw, r7.xxxx, l(8, 16, 24, 32) - ld_raw r8.y, r10.x, T0[0].xxxx - ld_raw r8.z, r10.y, T0[0].xxxx - ld_raw r8.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r7.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r1.y, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.x, l(16), l(0), r1.y - itof r7.x, r7.x - mul r7.x, r7.x, l(0.000977) - max r1.y, r7.x, l(-1.000000) - break - case l(7) - f16tof32 r8.xyzw, r8.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - endif - add r8.xyzw, r5.xyzw, r8.xyzw - add r9.xyzw, r6.xyzw, r9.xyzw - add r1.y, r1.y, r2.x - if_z r2.z - ld_raw r10.xyzw, r7.y, T0[0].xyzw - iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) - ld_raw r11.xyzw, r7.x, T0[0].xyzw - ld_raw r7.x, r7.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.z, r1.w, l(16), l(0) - ushr r12.xyzw, r10.xyzw, r7.zzzz - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.xyzw, r11.xyzw, r7.zzzz - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.z, r7.x, r7.z - and r7.z, r7.z, l(255) - utof r7.z, r7.z - mul r7.x, r7.z, l(0.003922) - break - case l(2) - case l(10) - movc r7.z, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r7.zzzz - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r12.xyzw, r11.xyzw, r7.zzzz - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.z, r7.x, r7.z - and r7.z, r7.z, l(1023) - utof r7.z, r7.z - mul r7.x, r7.z, l(0.000978) - break - case l(3) - case l(12) - movc r7.z, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r7.zzzz - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r12.xyzw, r11.xyzw, r7.zzzz - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r7.z, r7.x, r7.z - and r12.xy, r7.zzzz, l(1023, 127, 0, 0) - ubfe r7.w, l(3), l(7), r7.z - firstbit_hi r12.z, r12.y - iadd r12.z, r12.z, l(-24) - movc r12.z, r12.y, r12.z, l(8) - iadd r12.w, -r12.z, l(1) - movc r12.w, r7.w, r7.w, r12.w - bfi r7.z, l(7), r12.z, r7.z, l(0) - and r7.z, r7.z, l(127) - movc r7.z, r7.w, r12.y, r7.z - ishl r7.w, r12.w, l(23) - iadd r7.w, r7.w, l(0x3e000000) - ishl r7.z, r7.z, l(16) - iadd r7.z, r7.w, r7.z - movc r7.x, r12.x, r7.z, l(0) - break - case l(4) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.z, l(16), l(0), r7.x - itof r7.z, r7.z - mul r7.z, r7.z, l(0.000977) - max r7.x, r7.z, l(-1.000000) - break - case l(6) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r7.x, r7.x - break - default - break - endswitch - else - ld_raw r10.x, r7.y, T0[0].xxxx - iadd r12.xyzw, r7.yyyy, l(8, 16, 24, 32) - ld_raw r10.y, r12.x, T0[0].xxxx - ld_raw r10.z, r12.y, T0[0].xxxx - ld_raw r10.w, r12.z, T0[0].xxxx - ld_raw r11.x, r12.w, T0[0].xxxx - iadd r12.xyzw, r7.yyyy, l(40, 48, 56, 64) - ld_raw r11.y, r12.x, T0[0].xxxx - ld_raw r11.z, r12.y, T0[0].xxxx - ld_raw r11.w, r12.z, T0[0].xxxx - ld_raw r7.x, r12.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.y, l(16), l(0), r7.x - itof r7.y, r7.y - mul r7.y, r7.y, l(0.000977) - max r7.x, r7.y, l(-1.000000) - break - case l(7) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r7.x, r7.x - break - default - break - endswitch - endif - add r5.xyzw, r8.xyzw, r10.xyzw - add r6.xyzw, r9.xyzw, r11.xyzw - add r2.x, r1.y, r7.x - endif -else - mov r2.w, r3.x -endif -mul r5.xyzw, r2.wwww, r5.xyzw -mul r6.xyzw, r2.wwww, r6.xyzw -mul_sat r7.y, r2.w, r2.x -if_nz r0.w - mov r5.x, r5.w - mov r5.yz, r6.xxyx -endif -iadd r8.xyzw, r1.xxxx, l(5, 6, 7, 8) -mov_sat r5.xyzw, r5.xyzw -mad r9.xyz, r5.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) -ftou r9.xyz, r9.xyzx -imad r1.y, r9.y, l(256), r9.x -ishl r2.x, r9.z, l(24) -imad r1.y, r1.y, l(256), r2.x -iadd r4.y, r0.y, r1.y -store_uav_typed U0[0].xyzw, r8.xxxx, r4.xyzw -mov_sat r5.xyz, r6.xyzx -mad r4.xyzw, r5.wxyz, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy -mov_sat r7.x, r6.w -mad r2.xw, r7.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) -ftou r2.xw, r2.xxxw -imad r0.y, r2.w, l(256), r2.x -iadd r0.x, r0.z, r0.x -if_nz r1.z - iadd r1.y, r0.x, l(4) -else - mov r1.y, r0.x -endif -if_z r2.z - ld_raw r5.xyzw, r1.y, T0[0].xyzw - iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) - ld_raw r6.xyzw, r2.x, T0[0].xyzw - ld_raw r2.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r12.xyzw, r10.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) - iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw - ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r10.xyzw, r7.xyzw - movc r5.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r12.xyzw, r10.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) - iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw - ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r10.xyzw, r7.xyzw - movc r6.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) - ushr r2.w, r2.x, r2.w - and r7.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r7.z, l(3), l(7), r2.w - firstbit_hi r7.w, r7.y - iadd r7.w, r7.w, l(-24) - movc r7.w, r7.y, r7.w, l(8) - iadd r8.x, -r7.w, l(1) - movc r8.x, r7.z, r7.z, r8.x - bfi r2.w, l(7), r7.w, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r7.z, r7.y, r2.w - ishl r7.y, r8.x, l(23) - iadd r7.y, r7.y, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r7.y, r2.w - movc r2.x, r7.x, r2.w, l(0) - break - case l(4) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -else - ld_raw r5.x, r1.y, T0[0].xxxx - iadd r7.xyzw, r1.yyyy, l(8, 16, 24, 32) - ld_raw r5.y, r7.x, T0[0].xxxx - ld_raw r5.z, r7.y, T0[0].xxxx - ld_raw r5.w, r7.z, T0[0].xxxx - ld_raw r6.x, r7.w, T0[0].xxxx - iadd r7.xyzw, r1.yyyy, l(40, 48, 56, 64) - ld_raw r6.y, r7.x, T0[0].xxxx - ld_raw r6.z, r7.y, T0[0].xxxx - ld_raw r6.w, r7.z, T0[0].xxxx - ld_raw r2.x, r7.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(7) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch -endif -if_nz r3.y - mul r2.w, r3.x, l(0.500000) - ishl r7.x, l(2880), r3.z - iadd r7.x, r1.y, r7.x - if_z r2.z - ld_raw r9.xyzw, r7.x, T0[0].xyzw - iadd r7.yz, r7.xxxx, l(0, 16, 32, 0) - ld_raw r10.xyzw, r7.y, T0[0].xyzw - ld_raw r7.y, r7.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.z, r1.w, l(16), l(0) - ushr r11.xyzw, r9.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.xyzw, r10.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.z, r7.y, r7.z - and r7.z, r7.z, l(255) - utof r7.z, r7.z - mul r7.y, r7.z, l(0.003922) - break - case l(2) - case l(10) - movc r7.z, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r11.xyzw, r10.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.z, r7.y, r7.z - and r7.z, r7.z, l(1023) - utof r7.z, r7.z - mul r7.y, r7.z, l(0.000978) - break - case l(3) - case l(12) - movc r7.z, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r7.zzzz - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r11.xyzw, r10.xyzw, r7.zzzz - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r7.z, r7.y, r7.z - and r11.xy, r7.zzzz, l(1023, 127, 0, 0) - ubfe r7.w, l(3), l(7), r7.z - firstbit_hi r8.x, r11.y - iadd r8.x, r8.x, l(-24) - movc r8.x, r11.y, r8.x, l(8) - iadd r11.z, -r8.x, l(1) - movc r11.z, r7.w, r7.w, r11.z - bfi r7.z, l(7), r8.x, r7.z, l(0) - and r7.z, r7.z, l(127) - movc r7.z, r7.w, r11.y, r7.z - ishl r7.w, r11.z, l(23) - iadd r7.w, r7.w, l(0x3e000000) - ishl r7.z, r7.z, l(16) - iadd r7.z, r7.w, r7.z - movc r7.y, r11.x, r7.z, l(0) - break - case l(4) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.z, l(16), l(0), r7.y - itof r7.z, r7.z - mul r7.z, r7.z, l(0.000977) - max r7.y, r7.z, l(-1.000000) - break - case l(6) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r7.y, r7.y - break - default - break - endswitch - else - ld_raw r9.x, r7.x, T0[0].xxxx - iadd r11.xyzw, r7.xxxx, l(8, 16, 24, 32) - ld_raw r9.y, r11.x, T0[0].xxxx - ld_raw r9.z, r11.y, T0[0].xxxx - ld_raw r9.w, r11.z, T0[0].xxxx - ld_raw r10.x, r11.w, T0[0].xxxx - iadd r11.xyzw, r7.xxxx, l(40, 48, 56, 64) - ld_raw r10.y, r11.x, T0[0].xxxx - ld_raw r10.z, r11.y, T0[0].xxxx - ld_raw r10.w, r11.z, T0[0].xxxx - ld_raw r7.y, r11.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.x, l(16), l(0), r7.y - itof r7.x, r7.x - mul r7.x, r7.x, l(0.000977) - max r7.y, r7.x, l(-1.000000) - break - case l(7) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r7.y, r7.y - break - default - break - endswitch - endif - add r5.xyzw, r5.xyzw, r9.xyzw - add r6.xyzw, r6.xyzw, r10.xyzw - add r2.x, r2.x, r7.y - uge r7.x, r2.y, l(6) - if_nz r7.x - mul r2.w, r3.x, l(0.250000) - ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r7.xy, r1.yyyy, r7.xyxx - if_z r2.z - ld_raw r9.xyzw, r7.x, T0[0].xyzw - iadd r7.zw, r7.xxxx, l(0, 0, 16, 32) - ld_raw r10.xyzw, r7.z, T0[0].xyzw - ld_raw r1.y, r7.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.z, r1.w, l(16), l(0) - ushr r11.xyzw, r9.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r11.xyzw, r10.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.z, r1.y, r7.z - and r7.z, r7.z, l(255) - utof r7.z, r7.z - mul r1.y, r7.z, l(0.003922) - break - case l(2) - case l(10) - movc r7.z, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r11.xyzw, r10.xyzw, r7.zzzz - and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - utof r11.xyzw, r11.xyzw - mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.z, r1.y, r7.z - and r7.z, r7.z, l(1023) - utof r7.z, r7.z - mul r1.y, r7.z, l(0.000978) - break - case l(3) - case l(12) - movc r7.z, r1.w, l(20), l(0) - ushr r11.xyzw, r9.xyzw, r7.zzzz - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r11.xyzw, r10.xyzw, r7.zzzz - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) - ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw - firstbit_hi r15.xyzw, r13.xyzw - iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) - movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) - iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) - movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw - bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) - and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) - movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw - ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) - iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - iadd r11.xyzw, r13.xyzw, r11.xyzw - movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) - ushr r7.z, r1.y, r7.z - and r11.xy, r7.zzzz, l(1023, 127, 0, 0) - ubfe r7.w, l(3), l(7), r7.z - firstbit_hi r8.x, r11.y - iadd r8.x, r8.x, l(-24) - movc r8.x, r11.y, r8.x, l(8) - iadd r11.z, -r8.x, l(1) - movc r11.z, r7.w, r7.w, r11.z - bfi r7.z, l(7), r8.x, r7.z, l(0) - and r7.z, r7.z, l(127) - movc r7.z, r7.w, r11.y, r7.z - ishl r7.w, r11.z, l(23) - iadd r7.w, r7.w, l(0x3e000000) - ishl r7.z, r7.z, l(16) - iadd r7.z, r7.w, r7.z - movc r1.y, r11.x, r7.z, l(0) - break - case l(4) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.z, l(16), l(0), r1.y - itof r7.z, r7.z - mul r7.z, r7.z, l(0.000977) - max r1.y, r7.z, l(-1.000000) - break - case l(6) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - else - ld_raw r9.x, r7.x, T0[0].xxxx - iadd r11.xyzw, r7.xxxx, l(8, 16, 24, 32) - ld_raw r9.y, r11.x, T0[0].xxxx - ld_raw r9.z, r11.y, T0[0].xxxx - ld_raw r9.w, r11.z, T0[0].xxxx - ld_raw r10.x, r11.w, T0[0].xxxx - iadd r11.xyzw, r7.xxxx, l(40, 48, 56, 64) - ld_raw r10.y, r11.x, T0[0].xxxx - ld_raw r10.z, r11.y, T0[0].xxxx - ld_raw r10.w, r11.z, T0[0].xxxx - ld_raw r1.y, r11.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.x, l(16), l(0), r1.y - itof r7.x, r7.x - mul r7.x, r7.x, l(0.000977) - max r1.y, r7.x, l(-1.000000) - break - case l(7) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r1.y, r1.y - break - default - break - endswitch - endif - add r9.xyzw, r5.xyzw, r9.xyzw - add r10.xyzw, r6.xyzw, r10.xyzw - add r1.y, r1.y, r2.x - if_z r2.z - ld_raw r11.xyzw, r7.y, T0[0].xyzw - iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) - ld_raw r12.xyzw, r7.x, T0[0].xyzw - ld_raw r7.x, r7.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r7.z, r1.w, l(16), l(0) - ushr r13.xyzw, r11.xyzw, r7.zzzz - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r13.xyzw, r12.xyzw, r7.zzzz - and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.z, r7.x, r7.z - and r7.z, r7.z, l(255) - utof r7.z, r7.z - mul r7.x, r7.z, l(0.003922) - break - case l(2) - case l(10) - movc r7.z, r1.w, l(20), l(0) - ushr r13.xyzw, r11.xyzw, r7.zzzz - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) - utof r13.xyzw, r13.xyzw - mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r13.xyzw, r12.xyzw, r7.zzzz - and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) - utof r13.xyzw, r13.xyzw - mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.z, r7.x, r7.z - and r7.z, r7.z, l(1023) - utof r7.z, r7.z - mul r7.x, r7.z, l(0.000978) - break - case l(3) - case l(12) - movc r7.z, r1.w, l(20), l(0) - ushr r13.xyzw, r11.xyzw, r7.zzzz - and r14.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) - and r15.xyzw, r13.xyzw, l(127, 127, 127, 127) - ubfe r16.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r13.xyzw - firstbit_hi r17.xyzw, r15.xyzw - iadd r17.xyzw, r17.xyzw, l(-24, -24, -24, -24) - movc r17.xyzw, r15.xyzw, r17.xyzw, l(8,8,8,8) - iadd r18.xyzw, -r17.xyzw, l(1, 1, 1, 1) - movc r18.xyzw, r16.xyzw, r16.xyzw, r18.xyzw - bfi r13.xyzw, l(7, 7, 7, 7), r17.xyzw, r13.xyzw, l(0, 0, 0, 0) - and r13.xyzw, r13.xyzw, l(127, 127, 127, 127) - movc r13.xyzw, r16.xyzw, r15.xyzw, r13.xyzw - ishl r15.xyzw, r18.xyzw, l(23, 23, 23, 23) - iadd r15.xyzw, r15.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - iadd r13.xyzw, r15.xyzw, r13.xyzw - movc r11.xyzw, r14.xyzw, r13.xyzw, l(0,0,0,0) - ushr r13.xyzw, r12.xyzw, r7.zzzz - and r14.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) - and r15.xyzw, r13.xyzw, l(127, 127, 127, 127) - ubfe r16.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r13.xyzw - firstbit_hi r17.xyzw, r15.xyzw - iadd r17.xyzw, r17.xyzw, l(-24, -24, -24, -24) - movc r17.xyzw, r15.xyzw, r17.xyzw, l(8,8,8,8) - iadd r18.xyzw, -r17.xyzw, l(1, 1, 1, 1) - movc r18.xyzw, r16.xyzw, r16.xyzw, r18.xyzw - bfi r13.xyzw, l(7, 7, 7, 7), r17.xyzw, r13.xyzw, l(0, 0, 0, 0) - and r13.xyzw, r13.xyzw, l(127, 127, 127, 127) - movc r13.xyzw, r16.xyzw, r15.xyzw, r13.xyzw - ishl r15.xyzw, r18.xyzw, l(23, 23, 23, 23) - iadd r15.xyzw, r15.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - iadd r13.xyzw, r15.xyzw, r13.xyzw - movc r12.xyzw, r14.xyzw, r13.xyzw, l(0,0,0,0) - ushr r7.z, r7.x, r7.z - and r13.xy, r7.zzzz, l(1023, 127, 0, 0) - ubfe r7.w, l(3), l(7), r7.z - firstbit_hi r8.x, r13.y - iadd r8.x, r8.x, l(-24) - movc r8.x, r13.y, r8.x, l(8) - iadd r13.z, -r8.x, l(1) - movc r13.z, r7.w, r7.w, r13.z - bfi r7.z, l(7), r8.x, r7.z, l(0) - and r7.z, r7.z, l(127) - movc r7.z, r7.w, r13.y, r7.z - ishl r7.w, r13.z, l(23) - iadd r7.w, r7.w, l(0x3e000000) - ishl r7.z, r7.z, l(16) - iadd r7.z, r7.w, r7.z - movc r7.x, r13.x, r7.z, l(0) - break - case l(4) - ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.z, l(16), l(0), r7.x - itof r7.z, r7.z - mul r7.z, r7.z, l(0.000977) - max r7.x, r7.z, l(-1.000000) - break - case l(6) - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r12.xyzw, r12.xyzw - f16tof32 r7.x, r7.x - break - default - break - endswitch - else - ld_raw r11.x, r7.y, T0[0].xxxx - iadd r13.xyzw, r7.yyyy, l(8, 16, 24, 32) - ld_raw r11.y, r13.x, T0[0].xxxx - ld_raw r11.z, r13.y, T0[0].xxxx - ld_raw r11.w, r13.z, T0[0].xxxx - ld_raw r12.x, r13.w, T0[0].xxxx - iadd r13.xyzw, r7.yyyy, l(40, 48, 56, 64) - ld_raw r12.y, r13.x, T0[0].xxxx - ld_raw r12.z, r13.y, T0[0].xxxx - ld_raw r12.w, r13.z, T0[0].xxxx - ld_raw r7.x, r13.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw - itof r13.xyzw, r13.xyzw - mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.y, l(16), l(0), r7.x - itof r7.y, r7.y - mul r7.y, r7.y, l(0.000977) - max r7.x, r7.y, l(-1.000000) - break - case l(7) - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r12.xyzw, r12.xyzw - f16tof32 r7.x, r7.x - break - default - break - endswitch - endif - add r5.xyzw, r9.xyzw, r11.xyzw - add r6.xyzw, r10.xyzw, r12.xyzw - add r2.x, r1.y, r7.x - endif -else - mov r2.w, r3.x -endif -mul r5.xyzw, r2.wwww, r5.xwyz -mul r6.xyzw, r2.wwww, r6.xyzw -mul_sat r7.z, r2.w, r2.x -if_nz r0.w - mov r9.x, r5.y - mov r9.y, r6.x - mov r5.x, r6.y -else - mov r9.xy, r5.xzxx - mov r5.x, r5.w -endif -mov_sat r9.xy, r9.xyxx -mad r2.xw, r9.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) -ftou r2.xw, r2.xxxw -ishl r1.y, r2.w, l(24) -imad r1.y, r2.x, l(0x00010000), r1.y -iadd r4.y, r0.y, r1.y -store_uav_typed U0[0].xyzw, r8.yyyy, r4.xyzw -mov r5.zw, r6.xxxy -mov_sat r5.xyzw, r5.xyzw -mad r4.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r4.xyzw, r4.xyzw -imad r0.y, r4.y, l(256), r4.x -imad r0.y, r4.z, l(0x00010000), r0.y -imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy -mov_sat r7.xy, r6.zwzz -mad r5.xyz, r7.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) -ftou r5.xyz, r5.xyzx -imad r0.y, r5.y, l(256), r5.x -imad r0.y, r5.z, l(0x00010000), r0.y -iadd r0.x, r0.z, r0.x -if_nz r1.z - iadd r0.x, r0.x, l(4) -endif -if_z r2.z - ld_raw r5.xyzw, r0.x, T0[0].xyzw - iadd r1.yz, r0.xxxx, l(0, 16, 32, 0) - ld_raw r6.xyzw, r1.y, T0[0].xyzw - ld_raw r0.z, r1.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r1.y, r1.w, l(16), l(0) - ushr r7.xyzw, r5.xyzw, r1.yyyy - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.xyzw, r6.xyzw, r1.yyyy - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r1.y, r0.z, r1.y - and r1.y, r1.y, l(255) - utof r1.y, r1.y - mul r0.z, r1.y, l(0.003922) - break - case l(2) - case l(10) - movc r1.y, r1.w, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r1.yyyy - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.xyzw, r6.xyzw, r1.yyyy - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r1.y, r0.z, r1.y - and r1.y, r1.y, l(1023) - utof r1.y, r1.y - mul r0.z, r1.y, l(0.000978) - break - case l(3) - case l(12) - movc r1.y, r1.w, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r1.yyyy - and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r12.xyzw, r10.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) - iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw - ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r10.xyzw, r7.xyzw - movc r5.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) - ushr r7.xyzw, r6.xyzw, r1.yyyy - and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r12.xyzw, r10.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) - iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw - ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r10.xyzw, r7.xyzw - movc r6.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) - ushr r1.y, r0.z, r1.y - and r2.xw, r1.yyyy, l(1023, 0, 0, 127) - ubfe r1.z, l(3), l(7), r1.y - firstbit_hi r7.x, r2.w - iadd r7.x, r7.x, l(-24) - movc r7.x, r2.w, r7.x, l(8) - iadd r7.y, -r7.x, l(1) - movc r7.y, r1.z, r1.z, r7.y - bfi r1.y, l(7), r7.x, r1.y, l(0) - and r1.y, r1.y, l(127) - movc r1.y, r1.z, r2.w, r1.y - ishl r1.z, r7.y, l(23) - iadd r1.z, r1.z, l(0x3e000000) - ishl r1.y, r1.y, l(16) - iadd r1.y, r1.z, r1.y - movc r0.z, r2.x, r1.y, l(0) - break - case l(4) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.y, l(16), l(0), r0.z - itof r1.y, r1.y - mul r1.y, r1.y, l(0.000977) - max r0.z, r1.y, l(-1.000000) - break - case l(6) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r0.z, r0.z - break - default - break - endswitch -else - ld_raw r5.x, r0.x, T0[0].xxxx - iadd r7.xyzw, r0.xxxx, l(8, 16, 24, 32) - ld_raw r5.y, r7.x, T0[0].xxxx - ld_raw r5.z, r7.y, T0[0].xxxx - ld_raw r5.w, r7.z, T0[0].xxxx - ld_raw r6.x, r7.w, T0[0].xxxx - iadd r7.xyzw, r0.xxxx, l(40, 48, 56, 64) - ld_raw r6.y, r7.x, T0[0].xxxx - ld_raw r6.z, r7.y, T0[0].xxxx - ld_raw r6.w, r7.z, T0[0].xxxx - ld_raw r0.z, r7.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.y, l(16), l(0), r0.z - itof r1.y, r1.y - mul r1.y, r1.y, l(0.000977) - max r0.z, r1.y, l(-1.000000) - break - case l(7) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - f16tof32 r0.z, r0.z - break - default - break - endswitch -endif -if_nz r3.y - mul r1.y, r3.x, l(0.500000) - ishl r1.z, l(2880), r3.z - iadd r1.z, r0.x, r1.z - if_z r2.z - ld_raw r7.xyzw, r1.z, T0[0].xyzw - iadd r2.xw, r1.zzzz, l(16, 0, 0, 32) - ld_raw r9.xyzw, r2.x, T0[0].xyzw - ld_raw r2.x, r2.w, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.w, r1.w, l(16), l(0) - ushr r10.xyzw, r7.xyzw, r2.wwww - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r2.wwww - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(255) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.003922) - break - case l(2) - case l(10) - movc r2.w, r1.w, l(20), l(0) - ushr r10.xyzw, r7.xyzw, r2.wwww - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r2.wwww - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.w, r2.x, r2.w - and r2.w, r2.w, l(1023) - utof r2.w, r2.w - mul r2.x, r2.w, l(0.000978) - break - case l(3) - case l(12) - movc r2.w, r1.w, l(20), l(0) - ushr r10.xyzw, r7.xyzw, r2.wwww - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r7.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r2.wwww - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r2.w, r2.x, r2.w - and r8.xy, r2.wwww, l(1023, 127, 0, 0) - ubfe r3.y, l(3), l(7), r2.w - firstbit_hi r10.x, r8.y - iadd r10.x, r10.x, l(-24) - movc r10.x, r8.y, r10.x, l(8) - iadd r10.y, -r10.x, l(1) - movc r10.y, r3.y, r3.y, r10.y - bfi r2.w, l(7), r10.x, r2.w, l(0) - and r2.w, r2.w, l(127) - movc r2.w, r3.y, r8.y, r2.w - ishl r3.y, r10.y, l(23) - iadd r3.y, r3.y, l(0x3e000000) - ishl r2.w, r2.w, l(16) - iadd r2.w, r3.y, r2.w - movc r2.x, r8.x, r2.w, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.w, l(16), l(0), r2.x - itof r2.w, r2.w - mul r2.w, r2.w, l(0.000977) - max r2.x, r2.w, l(-1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch - else - ld_raw r7.x, r1.z, T0[0].xxxx - iadd r10.xyzw, r1.zzzz, l(8, 16, 24, 32) - ld_raw r7.y, r10.x, T0[0].xxxx - ld_raw r7.z, r10.y, T0[0].xxxx - ld_raw r7.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r1.zzzz, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r2.x, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.z, l(16), l(0), r2.x - itof r1.z, r1.z - mul r1.z, r1.z, l(0.000977) - max r2.x, r1.z, l(-1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r2.x, r2.x - break - default - break - endswitch - endif - add r5.xyzw, r5.xyzw, r7.xyzw - add r6.xyzw, r6.xyzw, r9.xyzw - add r0.z, r0.z, r2.x - uge r1.z, r2.y, l(6) - if_nz r1.z - mul r3.x, r3.x, l(0.250000) - ishl r2.xy, l(36, 2916, 0, 0), r3.zzzz - iadd r2.xy, r0.xxxx, r2.xyxx - if_z r2.z - ld_raw r7.xyzw, r2.x, T0[0].xyzw - iadd r3.yz, r2.xxxx, l(0, 16, 32, 0) - ld_raw r9.xyzw, r3.y, T0[0].xyzw - ld_raw r0.x, r3.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r1.z, r1.w, l(16), l(0) - ushr r10.xyzw, r7.xyzw, r1.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r10.xyzw, r9.xyzw, r1.zzzz - and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r1.z, r0.x, r1.z - and r1.z, r1.z, l(255) - utof r1.z, r1.z - mul r0.x, r1.z, l(0.003922) - break - case l(2) - case l(10) - movc r1.z, r1.w, l(20), l(0) - ushr r10.xyzw, r7.xyzw, r1.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r10.xyzw, r9.xyzw, r1.zzzz - and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - utof r10.xyzw, r10.xyzw - mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r1.z, r0.x, r1.z - and r1.z, r1.z, l(1023) - utof r1.z, r1.z - mul r0.x, r1.z, l(0.000978) - break - case l(3) - case l(12) - movc r1.z, r1.w, l(20), l(0) - ushr r10.xyzw, r7.xyzw, r1.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r7.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r10.xyzw, r9.xyzw, r1.zzzz - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) - and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) - movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - iadd r10.xyzw, r12.xyzw, r10.xyzw - movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) - ushr r1.z, r0.x, r1.z - and r3.yz, r1.zzzz, l(0, 1023, 127, 0) - ubfe r2.w, l(3), l(7), r1.z - firstbit_hi r8.x, r3.z - iadd r8.x, r8.x, l(-24) - movc r8.x, r3.z, r8.x, l(8) - iadd r8.y, -r8.x, l(1) - movc r8.y, r2.w, r2.w, r8.y - bfi r1.z, l(7), r8.x, r1.z, l(0) - and r1.z, r1.z, l(127) - movc r1.z, r2.w, r3.z, r1.z - ishl r2.w, r8.y, l(23) - iadd r2.w, r2.w, l(0x3e000000) - ishl r1.z, r1.z, l(16) - iadd r1.z, r2.w, r1.z - movc r0.x, r3.y, r1.z, l(0) - break - case l(4) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.z, l(16), l(0), r0.x - itof r1.z, r1.z - mul r1.z, r1.z, l(0.000977) - max r0.x, r1.z, l(-1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r0.x, r0.x - break - default - break - endswitch - else - ld_raw r7.x, r2.x, T0[0].xxxx - iadd r10.xyzw, r2.xxxx, l(8, 16, 24, 32) - ld_raw r7.y, r10.x, T0[0].xxxx - ld_raw r7.z, r10.y, T0[0].xxxx - ld_raw r7.w, r10.z, T0[0].xxxx - ld_raw r9.x, r10.w, T0[0].xxxx - iadd r10.xyzw, r2.xxxx, l(40, 48, 56, 64) - ld_raw r9.y, r10.x, T0[0].xxxx - ld_raw r9.z, r10.y, T0[0].xxxx - ld_raw r9.w, r10.z, T0[0].xxxx - ld_raw r0.x, r10.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r10.xyzw, r10.xyzw - mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.z, l(16), l(0), r0.x - itof r1.z, r1.z - mul r1.z, r1.z, l(0.000977) - max r0.x, r1.z, l(-1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r0.x, r0.x - break - default - break - endswitch - endif - add r7.xyzw, r5.xyzw, r7.xyzw - add r9.xyzw, r6.xyzw, r9.xyzw - add r0.x, r0.x, r0.z - if_z r2.z - ld_raw r10.xyzw, r2.y, T0[0].xyzw - iadd r2.xz, r2.yyyy, l(16, 0, 32, 0) - ld_raw r11.xyzw, r2.x, T0[0].xyzw - ld_raw r1.z, r2.z, T0[0].xxxx - switch r3.w - case l(0) - case l(1) - movc r2.x, r1.w, l(16), l(0) - ushr r12.xyzw, r10.xyzw, r2.xxxx - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r12.xyzw, r11.xyzw, r2.xxxx - and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r2.x, r1.z, r2.x - and r2.x, r2.x, l(255) - utof r2.x, r2.x - mul r1.z, r2.x, l(0.003922) - break - case l(2) - case l(10) - movc r2.x, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r2.xxxx - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r12.xyzw, r11.xyzw, r2.xxxx - and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - utof r12.xyzw, r12.xyzw - mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r2.x, r1.z, r2.x - and r2.x, r2.x, l(1023) - utof r2.x, r2.x - mul r1.z, r2.x, l(0.000978) - break - case l(3) - case l(12) - movc r1.w, r1.w, l(20), l(0) - ushr r12.xyzw, r10.xyzw, r1.wwww - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r12.xyzw, r11.xyzw, r1.wwww - and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) - and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) - ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw - firstbit_hi r16.xyzw, r14.xyzw - iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) - movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) - iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) - movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw - bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) - and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) - movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw - ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) - iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - iadd r12.xyzw, r14.xyzw, r12.xyzw - movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) - ushr r1.w, r1.z, r1.w - and r2.xz, r1.wwww, l(1023, 0, 127, 0) - ubfe r2.w, l(3), l(7), r1.w - firstbit_hi r3.y, r2.z - iadd r3.y, r3.y, l(-24) - movc r3.y, r2.z, r3.y, l(8) - iadd r3.z, -r3.y, l(1) - movc r3.z, r2.w, r2.w, r3.z - bfi r1.w, l(7), r3.y, r1.w, l(0) - and r1.w, r1.w, l(127) - movc r1.w, r2.w, r2.z, r1.w - ishl r2.z, r3.z, l(23) - iadd r2.z, r2.z, l(0x3e000000) - ishl r1.w, r1.w, l(16) - iadd r1.w, r2.z, r1.w - movc r1.z, r2.x, r1.w, l(0) - break - case l(4) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.w, l(16), l(0), r1.z - itof r1.w, r1.w - mul r1.w, r1.w, l(0.000977) - max r1.z, r1.w, l(-1.000000) - break - case l(6) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r1.z, r1.z - break - default - break - endswitch - else - ld_raw r10.x, r2.y, T0[0].xxxx - iadd r12.xyzw, r2.yyyy, l(8, 16, 24, 32) - ld_raw r10.y, r12.x, T0[0].xxxx - ld_raw r10.z, r12.y, T0[0].xxxx - ld_raw r10.w, r12.z, T0[0].xxxx - ld_raw r11.x, r12.w, T0[0].xxxx - iadd r2.xyzw, r2.yyyy, l(40, 48, 56, 64) - ld_raw r11.y, r2.x, T0[0].xxxx - ld_raw r11.z, r2.y, T0[0].xxxx - ld_raw r11.w, r2.z, T0[0].xxxx - ld_raw r1.z, r2.w, T0[0].xxxx - switch r3.w - case l(5) - ibfe r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r2.xyzw, r2.xyzw - mul r2.xyzw, r2.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r2.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r2.xyzw, r2.xyzw - mul r2.xyzw, r2.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r2.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r1.w, l(16), l(0), r1.z - itof r1.w, r1.w - mul r1.w, r1.w, l(0.000977) - max r1.z, r1.w, l(-1.000000) - break - case l(7) - f16tof32 r10.xyzw, r10.xyzw - f16tof32 r11.xyzw, r11.xyzw - f16tof32 r1.z, r1.z - break - default - break - endswitch - endif - add r5.xyzw, r7.xyzw, r10.xyzw - add r6.xyzw, r9.xyzw, r11.xyzw - add r0.z, r0.x, r1.z - else - mov r3.x, r1.y - endif -endif -mul r2.xyzw, r3.xxxx, r5.yzxw -mul r5.xyzw, r3.xxxx, r6.xyzw -mul_sat r3.w, r0.z, r3.x -if_nz r0.w - mov r2.xz, r5.yyxy - mov r0.x, r2.w -else - mov r0.x, r2.z - mov r2.xz, r2.yyxy -endif -mov_sat r0.x, r0.x -mad r0.x, r0.x, l(255.000000), l(0.500000) -ftou r0.x, r0.x -imad r4.y, r0.x, l(0x01000000), r0.y -store_uav_typed U0[0].xyzw, r8.zzzz, r4.xyzw -mov r2.y, r5.x -mov_sat r2.xyzw, r2.xyzw -mad r0.xyzw, r2.zxwy, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r0.xyzw, r0.xyzw -imad r0.x, r0.y, l(256), r0.x -imad r0.x, r0.z, l(0x00010000), r0.x -imad r0.xzw, r0.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.xxxx -mov_sat r3.xyz, r5.yzwy -mad r2.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r2.xyzw, r2.xyzw -imad r1.y, r2.y, l(256), r2.x -imad r1.y, r2.z, l(0x00010000), r1.y -imad r0.y, r2.w, l(0x01000000), r1.y -store_uav_typed U0[0].xyzw, r8.wwww, r0.xyzw -ret -// Approximately 5349 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.cso deleted file mode 100644 index 52a28e293..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h deleted file mode 100644 index 0097123ca..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h +++ /dev/null @@ -1,1644 +0,0 @@ -// generated from `xb buildhlsl` -// source: resolve_full_8bpp.cs.hlsl -const uint8_t resolve_full_8bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x4B, 0x1A, 0x29, 0x5A, 0xC7, 0x7A, 0x5B, 0xCB, - 0xE2, 0xA1, 0x52, 0xC6, 0x70, 0xC1, 0xC0, 0x10, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x4C, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x02, 0x00, 0x00, 0xE0, 0x02, 0x00, 0x00, 0xF0, 0x02, 0x00, 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0x00, 0x7F, 0x43, 0x00, 0x00, 0x7F, 0x43, - 0x00, 0x00, 0x7F, 0x43, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, - 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, - 0x1C, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, - 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, - 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x72, 0x02, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, - 0x7F, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, - 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x2D, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt deleted file mode 100644 index 7e0dc061e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt +++ /dev/null @@ -1,674 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeResolveConstants -// { -// -// uint xe_resolve_edram_info; // Offset: 0 Size: 4 -// uint xe_resolve_address_info; // Offset: 4 Size: 4 -// uint xe_resolve_dest_info; // Offset: 8 Size: 4 -// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 -// uint xe_resolve_dest_base; // Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_resolve_source texture byte r/o T0 t0 1 -// xe_resolve_dest UAV uint2 buf U0 u0 1 -// XeResolveConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xy -dcl_temps 16 -dcl_thread_group 8, 8, 1 -ubfe r0.x, l(11), l(7), CB0[0][0].y -uge r0.x, vThreadID.x, r0.x -if_nz r0.x - ret -endif -ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3) -ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) -mov r1.z, CB0[0][0].y -bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) -mov r0.yz, vThreadID.yyyy -iadd r2.xy, r0.wzww, r2.xyxx -and r3.xyz, CB0[0][0].xzzx, l(1023, 0x01000000, 8, 0) -ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx -uge r1.w, l(3), r1.y -if_nz r1.w - mov r5.y, r1.y -else - ieq r1.w, r1.y, l(5) - if_nz r1.w - mov r5.y, l(2) - else - mov r5.y, l(0) - endif -endif -uge r2.zw, r4.yyyy, l(0, 0, 2, 1) -and r2.zw, r2.zzzw, l(0, 0, 1, 1) -ishl r2.xy, r2.xyxx, r2.zwzz -ushr r5.x, r5.y, l(1) -and r5.xy, r5.xyxx, l(1, 1, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) -movc r1.w, r4.z, l(1), l(0) -ishl r2.w, r5.x, r1.w -imad r2.w, r5.y, r3.x, r2.w -iadd r2.w, r2.w, r4.x -imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r2.x, r2.y, l(80), r2.x -ishl r1.w, r2.x, r1.w -imad r1.w, r2.w, l(1280), r1.w -iadd r2.x, r2.z, r4.z -ishl r2.y, l(4), r2.x -ishl r1.w, r1.w, l(2) -ine r2.z, r3.y, l(0) -ine r2.w, r4.z, l(0) -and r2.z, r2.z, r2.w -if_nz r2.z - iadd r1.w, r1.w, l(4) -endif -ieq r2.z, r2.y, l(4) -if_nz r2.z - ld_raw r5.xyzw, r1.w, T0[0].xyzw - iadd r2.w, r1.w, l(16) - ld_raw r6.xyzw, r2.w, T0[0].xyzw -else - ld_raw r5.x, r1.w, T0[0].xxxx - iadd r2.w, r2.y, r1.w - ld_raw r5.y, r2.w, T0[0].xxxx - ishl r7.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r7.xyzw, r1.wwww, r7.xyzw - ld_raw r5.z, r7.x, T0[0].xxxx - ld_raw r5.w, r7.y, T0[0].xxxx - ld_raw r6.x, r7.z, T0[0].xxxx - ld_raw r6.y, r7.w, T0[0].xxxx - ishl r3.xw, l(24, 0, 0, 28), r2.xxxx - iadd r3.xw, r1.wwww, r3.xxxw - ld_raw r6.z, r3.x, T0[0].xxxx - ld_raw r6.w, r3.w, T0[0].xxxx -endif -if_nz r4.z - switch r4.w - case l(5) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - break - default - break - endswitch -else - switch r4.w - case l(0) - case l(1) - movc r2.w, r3.y, l(16), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r2.w, r3.y, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - utof r7.xyzw, r7.xyzw - mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r2.w, r3.y, l(20), l(0) - ushr r7.xyzw, r5.xyzw, r2.wwww - and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r9.xyzw, r7.xyzw - movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) - ushr r7.xyzw, r6.xyzw, r2.wwww - and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw - firstbit_hi r11.xyzw, r9.xyzw - iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) - movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw - bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) - and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) - movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw - ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - iadd r7.xyzw, r9.xyzw, r7.xyzw - movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r5.xyzw, r5.xyzw - f16tof32 r6.xyzw, r6.xyzw - break - default - break - endswitch -endif -ibfe r2.w, l(6), l(16), CB0[0][0].z -ishl r2.w, r2.w, l(23) -iadd r2.w, r2.w, l(0x3f800000) -uge r3.x, r1.y, l(4) -if_nz r3.x - mul r3.x, r2.w, l(0.500000) - ishl r3.w, l(320), r4.z - iadd r3.w, r1.w, r3.w - if_nz r2.z - ld_raw r7.xyzw, r3.w, T0[0].xyzw - iadd r4.x, r3.w, l(16) - ld_raw r8.xyzw, r4.x, T0[0].xyzw - else - ld_raw r7.x, r3.w, T0[0].xxxx - iadd r4.x, r2.y, r3.w - ld_raw r7.y, r4.x, T0[0].xxxx - ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r9.xyzw, r3.wwww, r9.xyzw - ld_raw r7.z, r9.x, T0[0].xxxx - ld_raw r7.w, r9.y, T0[0].xxxx - ld_raw r8.x, r9.z, T0[0].xxxx - ld_raw r8.y, r9.w, T0[0].xxxx - ishl r4.xy, l(24, 28, 0, 0), r2.xxxx - iadd r4.xy, r3.wwww, r4.xyxx - ld_raw r8.z, r4.x, T0[0].xxxx - ld_raw r8.w, r4.y, T0[0].xxxx - endif - if_nz r4.z - switch r4.w - case l(5) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - break - default - break - endswitch - else - switch r4.w - case l(0) - case l(1) - movc r3.w, r3.y, l(16), l(0) - ushr r9.xyzw, r7.xyzw, r3.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r8.xyzw, r3.wwww - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r3.w, r3.y, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r3.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r8.xyzw, r3.wwww - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r3.w, r3.y, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r3.wwww - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r8.xyzw, r3.wwww - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - break - default - break - endswitch - endif - add r5.xyzw, r5.xyzw, r7.xyzw - add r6.xyzw, r6.xyzw, r8.xyzw - uge r1.y, r1.y, l(6) - if_nz r1.y - mul r2.w, r2.w, l(0.250000) - ishl r4.xy, l(4, 324, 0, 0), r4.zzzz - iadd r1.yw, r1.wwww, r4.xxxy - if_nz r2.z - ld_raw r7.xyzw, r1.y, T0[0].xyzw - iadd r3.w, r1.y, l(16) - ld_raw r8.xyzw, r3.w, T0[0].xyzw - else - ld_raw r7.x, r1.y, T0[0].xxxx - iadd r3.w, r2.y, r1.y - ld_raw r7.y, r3.w, T0[0].xxxx - ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r9.xyzw, r1.yyyy, r9.xyzw - ld_raw r7.z, r9.x, T0[0].xxxx - ld_raw r7.w, r9.y, T0[0].xxxx - ld_raw r8.x, r9.z, T0[0].xxxx - ld_raw r8.y, r9.w, T0[0].xxxx - ishl r4.xy, l(24, 28, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r8.z, r4.x, T0[0].xxxx - ld_raw r8.w, r4.y, T0[0].xxxx - endif - if_nz r4.z - switch r4.w - case l(5) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - break - default - break - endswitch - else - switch r4.w - case l(0) - case l(1) - movc r1.y, r3.y, l(16), l(0) - ushr r9.xyzw, r7.xyzw, r1.yyyy - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r9.xyzw, r8.xyzw, r1.yyyy - and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r1.y, r3.y, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r1.yyyy - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r9.xyzw, r8.xyzw, r1.yyyy - and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - utof r9.xyzw, r9.xyzw - mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r1.y, r3.y, l(20), l(0) - ushr r9.xyzw, r7.xyzw, r1.yyyy - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - ushr r9.xyzw, r8.xyzw, r1.yyyy - and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) - and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw - firstbit_hi r13.xyzw, r11.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) - and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) - movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw - ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - iadd r9.xyzw, r11.xyzw, r9.xyzw - movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r9.xyzw, r9.xyzw - mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r7.xyzw, r7.xyzw - f16tof32 r8.xyzw, r8.xyzw - break - default - break - endswitch - endif - add r7.xyzw, r5.xyzw, r7.xyzw - add r8.xyzw, r6.xyzw, r8.xyzw - if_nz r2.z - ld_raw r9.xyzw, r1.w, T0[0].xyzw - iadd r1.y, r1.w, l(16) - ld_raw r10.xyzw, r1.y, T0[0].xyzw - else - ld_raw r9.x, r1.w, T0[0].xxxx - iadd r1.y, r2.y, r1.w - ld_raw r9.y, r1.y, T0[0].xxxx - ishl r11.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r11.xyzw, r1.wwww, r11.xyzw - ld_raw r9.z, r11.x, T0[0].xxxx - ld_raw r9.w, r11.y, T0[0].xxxx - ld_raw r10.x, r11.z, T0[0].xxxx - ld_raw r10.y, r11.w, T0[0].xxxx - ishl r2.xy, l(24, 28, 0, 0), r2.xxxx - iadd r1.yw, r1.wwww, r2.xxxy - ld_raw r10.z, r1.y, T0[0].xxxx - ld_raw r10.w, r1.w, T0[0].xxxx - endif - if_nz r4.z - switch r4.w - case l(5) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r11.xyzw, r11.xyzw - mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(7) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - break - default - break - endswitch - else - switch r4.w - case l(0) - case l(1) - movc r1.y, r3.y, l(16), l(0) - ushr r4.xyzw, r9.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r9.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyzw, r10.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r10.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - break - case l(2) - case l(10) - movc r1.y, r3.y, l(20), l(0) - ushr r4.xyzw, r9.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - utof r4.xyzw, r4.xyzw - mul r9.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r4.xyzw, r10.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - utof r4.xyzw, r4.xyzw - mul r10.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - break - case l(3) - case l(12) - movc r1.y, r3.y, l(20), l(0) - ushr r4.xyzw, r9.xyzw, r1.yyyy - and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) - and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) - movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - iadd r4.xyzw, r12.xyzw, r4.xyzw - movc r9.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) - ushr r4.xyzw, r10.xyzw, r1.yyyy - and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) - ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw - firstbit_hi r14.xyzw, r12.xyzw - iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) - movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) - iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) - movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw - bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) - and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) - movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw - ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) - iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - iadd r4.xyzw, r12.xyzw, r4.xyzw - movc r10.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) - break - case l(4) - ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - break - case l(6) - f16tof32 r9.xyzw, r9.xyzw - f16tof32 r10.xyzw, r10.xyzw - break - default - break - endswitch - endif - add r5.xyzw, r7.xyzw, r9.xyzw - add r6.xyzw, r8.xyzw, r10.xyzw - else - mov r2.w, r3.x - endif -endif -mul_sat r4.xyzw, r2.wwww, r5.xyzw -mul_sat r2.xyzw, r2.wwww, r6.xyzw -bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) -iadd r0.xyzw, r0.xyzw, r1.xyzw -bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) -if_nz r3.z - ubfe r1.y, l(3), l(4), CB0[0][0].z - ushr r1.z, CB0[0][0].w, l(10) - ishl r1.z, r1.z, l(5) - ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) - ishr r1.w, r1.y, l(2) - ushr r1.z, r1.z, l(4) - and r1.z, r1.z, l(0x00007ffe) - imad r1.z, r1.w, r1.z, r3.x - ushr r3.x, r1.x, l(5) - imad r1.z, r1.z, r3.x, r3.y - ishl r3.x, r0.z, l(8) - ishr r3.x, r3.x, l(6) - iadd r1.w, r1.w, r3.z - bfi r3.y, l(1), l(1), r1.w, l(0) - iadd r3.y, r3.y, r3.w - bfi r3.y, l(2), l(1), r3.y, l(0) - bfi r1.w, l(1), l(0), r1.w, r3.y - and r3.xy, r3.xxxx, l(16, 8, 0, 0) - bfi r3.zw, l(0, 0, 22, 22), l(0, 0, 8, 11), r1.zzzz, l(0, 0, 0, 0) - imad r3.xz, r3.xxxx, l(2, 0, 16, 0), r3.zzwz - bfi r3.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r3.yyyy, r3.xzxx - bfi r1.yz, l(0, 2, 2, 0), l(0, 6, 9, 0), r1.yyyy, r3.xxyx - ubfe r3.x, l(3), l(6), r1.y - and r3.y, r1.w, l(6) - bfi r1.w, l(1), l(8), r1.w, l(0) - imad r1.w, r3.x, l(32), r1.w - imad r1.w, r3.y, l(4), r1.w - bfi r1.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r1.yyzy - bfi r1.z, l(9), l(3), r1.w, r1.z - bfi r1.y, l(6), l(0), r1.y, r1.z -else - ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) - ushr r0.x, r1.x, l(5) - imad r0.x, r3.y, r0.x, r3.x - ishl r0.yw, r0.zzzz, l(0, 2, 0, 7) - ishl r1.x, r0.y, l(1) - and r1.x, r1.x, l(96) - bfi r1.z, l(25), l(7), r0.x, r1.x - and r0.yw, r0.yyyw, l(0, 8, 0, 2048) - iadd r1.z, r1.z, r0.y - bfi r1.z, l(1), l(4), r0.z, r1.z - ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) - bfi r1.xw, l(25, 0, 0, 25), l(10, 0, 0, 9), r0.xxxx, r1.xxxw - imad r0.xy, r0.yyyy, l(8, 4, 0, 0), r1.xwxx - bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx - bfi r0.x, l(12), l(0), r0.w, r0.x - and r0.y, r0.y, l(1792) - iadd r0.x, r0.x, r0.y - and r0.y, r3.z, l(2) - iadd r0.y, r3.w, r0.y - bfi r0.y, l(2), l(6), r0.y, l(0) - iadd r0.x, r0.x, r0.y - bfi r1.y, l(6), l(0), r1.z, r0.x -endif -iadd r0.x, r1.y, CB0[0][1].x -ushr r0.x, r0.x, l(3) -mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r1.xyzw, r1.xyzw -imad r0.y, r1.y, l(256), r1.x -imad r0.y, r1.z, l(0x00010000), r0.y -imad r1.xzw, r1.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy -mad r2.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) -ftou r2.xyzw, r2.xyzw -imad r0.y, r2.y, l(256), r2.x -imad r0.y, r2.z, l(0x00010000), r0.y -imad r1.y, r2.w, l(0x01000000), r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ret -// Approximately 626 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.cso deleted file mode 100644 index 229d21858..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.h deleted file mode 100644 index e6fd53b4f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.h +++ /dev/null @@ -1,114 +0,0 @@ -// generated from `xb buildhlsl` -// source: stretch_gamma.ps.hlsl -const uint8_t stretch_gamma_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0x46, 0xCD, 0x15, 0xA8, 0x4D, 0x5B, 0xFD, 0x07, - 0x4C, 0x62, 0xA7, 0xD0, 0x61, 0x89, 0x85, 0xA6, 0x01, 0x00, 0x00, 0x00, - 0x24, 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0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.txt deleted file mode 100644 index 2a06727e9..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.txt +++ /dev/null @@ -1,58 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeStretchGammaRootConstants -// { -// -// float xe_gamma_ramp_inv_size; // Offset: 0 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_sampler_linear_clamp sampler NA NA S0 s0 1 -// xe_texture texture float3 2d T0 t0 1 -// xe_gamma_ramp texture float3 1d T1 t1 1 -// XeStretchGammaRootConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xy 0 NONE float xy -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Target 0 xyzw 0 TARGET float xyzw -// -ps_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_sampler S0[0:0], mode_default, space=0 -dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 -dcl_resource_texture1d (float,float,float,float) T1[1:1], space=0 -dcl_input_ps linear v0.xy -dcl_output o0.xyzw -dcl_temps 2 -sample_l r0.xyz, v0.xyxx, T0[0].xyzw, S0[0], l(0.000000) -add r0.w, -CB0[0][0].x, l(1.000000) -mul r1.x, CB0[0][0].x, l(0.500000) -mad r0.xyz, r0.xyzx, r0.wwww, r1.xxxx -sample_l r0.x, r0.x, T1[1].xyzw, S0[0], l(0.000000) -sample_l r0.y, r0.y, T1[1].xyzw, S0[0], l(0.000000) -sample_l r0.z, r0.z, T1[1].xyzw, S0[0], l(0.000000) -mov o0.xyz, r0.xyzx -mov o0.w, l(1.000000) -ret -// Approximately 10 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.cso deleted file mode 100644 index c5a49abfd..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.h deleted file mode 100644 index 7f850d127..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.h +++ /dev/null @@ -1,66 +0,0 @@ -// generated from `xb buildhlsl` -// source: stretch.ps.hlsl -const uint8_t stretch_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0x0B, 0x39, 0x5E, 0x9C, 0x0F, 0x3E, 0xAC, 0xF6, - 0x9E, 0xB3, 0x11, 0xC0, 0x9B, 0x25, 0x2E, 0x6E, 0x01, 0x00, 0x00, 0x00, - 0xE0, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x14, 0x01, 0x00, 0x00, 0x48, 0x01, 0x00, 0x00, 0x7C, 0x01, 0x00, 0x00, - 0x44, 0x02, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD8, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFF, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0xAF, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, - 0x61, 0x6D, 0x70, 0x6C, 0x65, 0x72, 0x5F, 0x6C, 0x69, 0x6E, 0x65, 0x61, - 0x72, 0x5F, 0x63, 0x6C, 0x61, 0x6D, 0x70, 0x00, 0x78, 0x65, 0x5F, 0x74, - 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x00, 0x4D, 0x69, 0x63, 0x72, 0x6F, - 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52, 0x29, 0x20, 0x48, 0x4C, 0x53, - 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65, 0x72, 0x20, 0x43, 0x6F, 0x6D, - 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31, 0x30, 0x2E, 0x31, 0x00, 0xAB, - 0x49, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x03, 0x00, 0x00, 0x54, 0x45, 0x58, 0x43, 0x4F, 0x4F, 0x52, 0x44, - 0x00, 0xAB, 0xAB, 0xAB, 0x4F, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x54, - 0x61, 0x72, 0x67, 0x65, 0x74, 0x00, 0xAB, 0xAB, 0x53, 0x48, 0x45, 0x58, - 0xC0, 0x00, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x6A, 0x08, 0x00, 0x01, 0x5A, 0x00, 0x00, 0x06, 0x46, 0x6E, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x58, 0x18, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x55, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x10, 0x00, 0x03, - 0x32, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x03, - 0xF2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, - 0x01, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x0D, 0x72, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x7E, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x60, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, - 0x72, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x82, 0x20, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, - 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.txt deleted file mode 100644 index 8495d8f55..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/stretch_ps.txt +++ /dev/null @@ -1,38 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_sampler_linear_clamp sampler NA NA S0 s0 1 -// xe_texture texture float3 2d T0 t0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xy 0 NONE float xy -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Target 0 xyzw 0 TARGET float xyzw -// -ps_5_1 -dcl_globalFlags refactoringAllowed -dcl_sampler S0[0:0], mode_default, space=0 -dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 -dcl_input_ps linear v0.xy -dcl_output o0.xyzw -dcl_temps 1 -sample_l r0.xyz, v0.xyxx, T0[0].xyzw, S0[0], l(0.000000) -mov o0.xyz, r0.xyzx -mov o0.w, l(1.000000) -ret -// Approximately 4 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.cso deleted file mode 100644 index f819d95ff..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.h deleted file mode 100644 index 168e23419..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_adaptive_vs.h +++ /dev/null @@ -1,294 +0,0 @@ -// generated from `xb buildhlsl` -// source: tessellation_adaptive.vs.hlsl -const uint8_t tessellation_adaptive_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0xEA, 0xC1, 0xB3, 0x4C, 0xC8, 0x7B, 0xC8, 0x82, - 0x75, 0x89, 0xF0, 0x88, 0x71, 0x69, 0x97, 0x06, 0x01, 0x00, 0x00, 0x00, - 0x94, 0x0D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x88, 0x0A, 0x00, 0x00, 0xBC, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, - 0xF8, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x4C, 0x0A, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, - 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, 0x72, 0x00, 0xAB, 0xAB, - 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x05, 0x00, 0x00, - 0x0C, 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HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer xe_system_cbuffer -// { -// -// uint xe_flags; // Offset: 0 Size: 4 [unused] -// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 -// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] -// uint xe_vertex_index_endian; // Offset: 16 Size: 4 -// int xe_vertex_base_index; // Offset: 20 Size: 4 [unused] -// float2 xe_point_size; // Offset: 24 Size: 8 [unused] -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 [unused] -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 [unused] -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_VertexID 0 x 0 VERTID uint x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XETESSFACTOR 0 x 0 NONE float x -// -vs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_input_sgv v0.x, vertex_id -dcl_output o0.x -dcl_temps 1 -ieq r0.xyz, CB0[0][1].xxxx, l(1, 2, 3, 0) -or r0.xy, r0.yzyy, r0.xyxx -if_nz r0.x - ishl r0.x, v0.x, l(8) - ushr r0.z, v0.x, l(8) - and r0.xz, r0.xxzx, l(0xff00ff00, 0, 0x00ff00ff, 0) - iadd r0.x, r0.z, r0.x -else - mov r0.x, v0.x -endif -if_nz r0.y - ushr r0.y, r0.x, l(16) - bfi r0.x, l(16), l(16), r0.x, r0.y -endif -add r0.x, r0.x, l(1.000000) -max r0.x, r0.x, CB0[0][0].y -min o0.x, r0.x, CB0[0][0].z -ret -// Approximately 18 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.cso deleted file mode 100644 index 5273cd260..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.h deleted file mode 100644 index dfaedbd6d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_indexed_vs.h +++ /dev/null @@ -1,290 +0,0 @@ -// generated from `xb buildhlsl` -// source: tessellation_indexed.vs.hlsl -const uint8_t tessellation_indexed_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0xE2, 0x30, 0x21, 0x1F, 0xE5, 0x49, 0x03, 0x9D, - 0xFB, 0x8E, 0x8A, 0x7F, 0x73, 0xA7, 0x2A, 0x12, 0x01, 0x00, 0x00, 0x00, - 0x64, 0x0D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x88, 0x0A, 0x00, 0x00, 0xBC, 0x0A, 0x00, 0x00, 0xF0, 0x0A, 0x00, 0x00, - 0xC8, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x4C, 0x0A, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 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0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x30, 0x06, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x54, 0x06, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 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0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x29, 0x07, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x37, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x47, 0x07, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x68, 0x07, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x8C, 0x07, 0x00, 0x00, - 0xD0, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 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Size: 8 [unused] -// float2 xe_point_size_min_max; // Offset: 32 Size: 8 [unused] -// float2 xe_point_screen_to_ndc; // Offset: 40 Size: 8 [unused] -// float4 xe_user_clip_planes[6]; // Offset: 48 Size: 96 [unused] -// float3 xe_ndc_scale; // Offset: 144 Size: 12 [unused] -// uint xe_interpolator_sampling_pattern;// Offset: 156 Size: 4 [unused] -// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] -// uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] -// uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] -// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] -// float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_VertexID 0 x 0 VERTID uint x -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// XEVERTEXID 0 x 0 NONE float x -// -vs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_input_sgv v0.x, vertex_id -dcl_output o0.x -dcl_temps 1 -ieq r0.xyz, CB0[0][1].xxxx, l(1, 2, 3, 0) -or r0.xy, r0.yzyy, r0.xyxx -if_nz r0.x - ishl r0.x, v0.x, l(8) - ushr r0.z, v0.x, l(8) - and r0.xz, r0.xxzx, l(0xff00ff00, 0, 0x00ff00ff, 0) - iadd r0.x, r0.z, r0.x -else - mov r0.x, v0.x -endif -if_nz r0.y - ushr r0.y, r0.x, l(16) - bfi r0.x, l(16), l(16), r0.x, r0.y -endif -iadd r0.x, r0.x, CB0[0][1].y -itof o0.x, r0.x -ret -// Approximately 17 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.cso deleted file mode 100644 index 9906bf979..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.h deleted file mode 100644 index 99feb6da3..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.h +++ /dev/null @@ -1,637 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_128bpb_2x.cs.hlsl -const uint8_t texture_load_128bpb_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x9C, 0x46, 0x6D, 0x0A, 0xDB, 0xE4, 0x75, 0x00, - 0xAC, 0x68, 0x58, 0x6F, 0x43, 0x8A, 0x2E, 0x3A, 0x01, 0x00, 0x00, 0x00, - 0xAC, 0x1D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x10, 0x1D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.txt deleted file mode 100644 index 70cf3d47a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.txt +++ /dev/null @@ -1,247 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 7 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(4) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(12) - and r1.w, r1.w, l(0x00006000) - bfi r1.w, l(3), l(10), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r1.w, vThreadID.y, l(7) - and r2.xz, r1.wwww, l(1792, 0, 2048, 0) - bfi r1.w, l(3), l(5), r0.x, r2.x - bfi r1.w, l(21), l(11), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(4) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xyzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -iadd r3.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r4.xyzw, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r1.z, r0.z, r0.y -ld r4.xyzw, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -iadd r1.w, r1.z, l(1) -ld r3.xyzw, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(8) -else - iadd r0.w, r0.x, l(4) -endif -ld r3.xyzw, r0.wwww, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw -iadd r3.xyz, r0.wwww, l(1, 2, 3, 0) -ld r4.xyzw, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.zzzz, r4.xyzw -iadd r0.x, r0.z, r2.y -ld r2.xyzw, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r0.y, r0.x, l(1) -ld r2.xyzw, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw -ret -// Approximately 196 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.cso deleted file mode 100644 index 299a7c18e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.h deleted file mode 100644 index e583eb774..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.h +++ /dev/null @@ -1,990 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_128bpb_3x.cs.hlsl -const uint8_t texture_load_128bpb_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xD3, 0x19, 0x5E, 0xD8, 0x57, 0x84, 0xF6, 0x6C, - 0xFE, 0x56, 0xB8, 0x8E, 0xFD, 0xB3, 0xD2, 0xE1, 0x01, 0x00, 0x00, 0x00, - 0x30, 0x2E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x94, 0x2D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x12, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.txt deleted file mode 100644 index cee1a9d8e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.txt +++ /dev/null @@ -1,386 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 7 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(4) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(12) - and r1.w, r1.w, l(0x00006000) - bfi r1.w, l(3), l(10), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r1.w, vThreadID.y, l(7) - and r2.xz, r1.wwww, l(1792, 0, 2048, 0) - bfi r1.w, l(3), l(5), r0.x, r2.x - bfi r1.w, l(21), l(11), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(4) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xyzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw -iadd r2.xyzw, r0.yyyy, l(1, 2, 3, 4) -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r4.xyzw, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -ld r4.xyzw, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -iadd r1.z, r0.z, r0.y -ld r4.xyzw, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -iadd r2.xy, r1.zzzz, l(1, 2, 0, 0) -ld r3.xyzw, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r4.xyzw, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -iadd r1.z, r0.z, r1.z -ld r4.xyzw, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -iadd r2.xy, r1.zzzz, l(1, 2, 0, 0) -ld r4.xyzw, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -ld r3.xyzw, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(18) -else - iadd r0.w, r0.x, l(9) -endif -ld r3.xyzw, r0.wwww, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw -iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r4.xyzw, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw -iadd r0.x, r0.y, l(5) -ld r4.xyzw, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -iadd r0.x, r0.z, r2.z -ld r2.xyzw, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r1.zw, r0.xxxx, l(0, 0, 1, 2) -ld r2.xyzw, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -iadd r2.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r3.xyzw, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -iadd r0.x, r0.z, r0.x -ld r3.xyzw, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw -iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) -ld r3.xyzw, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -ld r2.xyzw, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw -ret -// Approximately 335 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.cso deleted file mode 100644 index 41e7e5cdb..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.h deleted file mode 100644 index 8b97678d9..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.h +++ /dev/null @@ -1,412 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_128bpb.cs.hlsl -const uint8_t texture_load_128bpb_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x54, 0xBE, 0xFC, 0x91, 0x12, 0xD2, 0xAA, 0xF0, - 0x40, 0x9F, 0x57, 0x6E, 0x87, 0x7B, 0xA1, 0x2F, 0x01, 0x00, 0x00, 0x00, - 0x1C, 0x13, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x80, 0x12, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x02, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xBD, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x13, 0x03, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x38, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5C, 0x03, 0x00, 0x00, 0x1C, 0x00, 0x00, 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b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.txt deleted file mode 100644 index 5c6fa37c2..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.txt +++ /dev/null @@ -1,156 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(4) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(12) - and r1.w, r1.w, l(0x00006000) - bfi r1.w, l(3), l(10), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r1.w, vThreadID.y, l(7) - and r2.xz, r1.wwww, l(1792, 0, 2048, 0) - bfi r1.w, l(3), l(5), r0.x, r2.x - bfi r1.w, l(21), l(11), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r0.x, l(12), l(0), r2.z, r2.x - and r1.y, r2.w, l(1792) - iadd r0.x, r0.x, r1.y - and r1.y, r2.y, l(2) - iadd r1.y, r1.z, r1.y - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r0.x, r0.x, r1.y - bfi r1.x, l(6), l(0), r1.w, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.yyyy, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r0.y, r0.z, l(1) -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r1.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -ret -// Approximately 105 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.cso deleted file mode 100644 index 14458fe16..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.h deleted file mode 100644 index 64f478b5d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.h +++ /dev/null @@ -1,565 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_16bpb_2x.cs.hlsl -const uint8_t texture_load_16bpb_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x24, 0xDE, 0xAE, 0x7A, 0xA7, 0x60, 0xA1, 0x76, - 0x46, 0xC2, 0x81, 0xFA, 0xDF, 0xA0, 0x0F, 0xB1, 0x01, 0x00, 0x00, 0x00, - 0x4C, 0x1A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xB0, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 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0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.txt deleted file mode 100644 index 0724b57ff..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.txt +++ /dev/null @@ -1,239 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r3.zw, r5.xxxz - mov r2.zw, r5.yyyw -else - mov r3.zw, r4.xxxz - mov r2.zw, r4.yyyw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.y, r0.z, r0.y -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r1.zzzz, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r5.xyzw, r1.wwww, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r1.yzw, r0.zzzz, r2.xxyz -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(16) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r5.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -else - mov r4.zw, r0.xxxz - mov r3.zw, r0.yyyw -endif -store_uav_typed U0[0].xyzw, r2.zzzz, r4.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -ret -// Approximately 188 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.cso deleted file mode 100644 index 6109f4ff7..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.h deleted file mode 100644 index ed23f961e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.h +++ /dev/null @@ -1,1477 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_16bpb_3x.cs.hlsl -const uint8_t texture_load_16bpb_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC6, 0x88, 0xE7, 0xD1, 0x67, 0x04, 0x22, 0xDB, - 0x6D, 0x32, 0x50, 0x3A, 0x6B, 0xEE, 0x66, 0xD7, 0x01, 0x00, 0x00, 0x00, - 0x04, 0x45, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x68, 0x44, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 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xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(1) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r1.yz, r0.xxxx, T0[0].zyxw -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r2.xy, r1.zyzz, l(8, 8, 0, 0) - ushr r2.zw, r1.zzzy, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.wwzw, r2.yyxy - mov r2.x, r1.z -else - mov r2.x, r1.z -endif -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r3.xxxx, T0[0].zwxy -if_nz r1.x - ishl r2.zw, r1.zzzw, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r1.zwzz, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.zw, r2.zzzw, r4.xxxy -endif -ld r2.zw, r3.yyyy, T0[0].zwyx -if_nz r1.x - ishl r3.xy, r2.wzww, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r2.wzww, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r3.yyyx, r4.yyyx - mov r3.x, r2.w -else - mov r3.x, r2.w -endif -ld r3.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r3.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r3.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r3.yz, r4.zzwz, r4.xxyx -endif -ld r4.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r4.zw, r4.xxxy, l(0, 0, 8, 8) - and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r4.zwzz, r5.xyxx - mov r2.w, r4.y -else - mov r2.w, r4.y -endif -iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r4.zw, r5.xxxx, T0[0].zwxy -if_nz r1.x - ishl r6.xy, r4.zwzz, l(8, 8, 0, 0) - ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r4.zw, r6.zzzw, r6.xxxy -endif -ld r5.xy, r5.yyyy, T0[0].yxzw -if_nz r1.x - ishl r6.xy, r5.yxyy, l(8, 8, 0, 0) - ushr r6.zw, r5.yyyx, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r5.xy, r6.wzww, r6.yxyy - mov r4.y, r5.y -else - mov r4.y, r5.y -endif -ld r5.yz, r5.zzzz, T0[0].zyxw -if_nz r1.x - ishl r6.xy, r5.zyzz, l(8, 8, 0, 0) - ushr r6.zw, r5.zzzy, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r5.yz, r6.wwzw, r6.yyxy - mov r6.y, r5.z -else - mov r6.y, r5.z -endif -ld r5.zw, r5.wwww, T0[0].zwxy -if_nz r1.x - ishl r6.zw, r5.zzzw, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r5.zwzz, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r5.zw, r6.zzzw, r7.xxxy -endif -bfi r2.y, l(16), l(0), r1.y, r3.x -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyxx -iadd r7.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r7.xxxx, r2.zwzz -bfi r6.x, l(16), l(0), r4.z, r5.x -store_uav_typed U0[0].xyzw, r7.yyyy, r6.xyxx -iadd r2.x, r0.z, r0.y -ushr r1.y, r1.y, l(16) -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.y, r1.z, l(16) -bfi r6.y, l(16), l(16), r3.y, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r6.xyzw -iadd r2.yz, r2.xxxx, l(0, 1, 2, 0) -ushr r1.y, r3.y, l(16) -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.yyyy -ushr r1.y, r4.z, l(16) -bfi r6.y, l(16), l(16), r4.w, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -ushr r1.y, r4.w, l(16) -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.yyyy, r1.yyyy -ushr r1.y, r5.y, l(16) -bfi r6.y, l(16), l(16), r5.z, r1.y -store_uav_typed U0[0].xyzw, r2.zzzz, r6.xyzw -iadd r1.y, r0.z, r2.x -bfi r1.z, l(16), l(0), r3.x, r3.z -store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyxx -bfi r5.z, l(16), l(0), r5.x, r5.z -store_uav_typed U0[0].xyzw, r1.wwww, r5.zwzz -iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) -ld r1.yz, r2.xxxx, T0[0].zyxw -if_nz r1.x - ishl r3.xy, r1.zyzz, l(8, 8, 0, 0) - ushr r3.zw, r1.zzzy, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r3.wwzw, r3.yyxy - mov r3.x, r1.z -else - mov r3.x, r1.z -endif -ld r1.zw, r2.yyyy, T0[0].zwxy -if_nz r1.x - ishl r2.xy, r1.zwzz, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r3.zw, r1.zzzw, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r1.zw, r2.xxxy, r3.zzzw -endif -ld r2.xy, r2.zzzz, T0[0].yxzw -if_nz r1.x - ishl r3.zw, r2.yyyx, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r2.yxyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r3.wzww, r4.yxyy - mov r2.xz, r2.xxyx -else - mov r2.xz, r2.xxyx -endif -ld r3.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r4.xy, r3.zwzz, l(8, 8, 0, 0) - ushr r4.zw, r3.zzzw, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r3.zw, r4.zzzw, r4.xxxy -endif -iadd r4.xyzw, r0.xxxx, l(13, 14, 15, 16) -ld r5.xy, r4.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r5.xy, r5.zwzz, r6.xyxx - mov r2.y, r5.y -else - mov r2.y, r5.y -endif -ld r4.xy, r4.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.zw, r4.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r4.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r5.zwzz, r6.xyxx -endif -ld r5.zw, r4.zzzz, T0[0].zwyx -if_nz r1.x - ishl r6.xy, r5.wzww, l(8, 8, 0, 0) - ushr r6.zw, r5.wwwz, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r5.zw, r6.wwwz, r6.yyyx - mov r5.yz, r5.wwzw -else - mov r5.yz, r5.wwzw -endif -iadd r2.w, r0.x, l(17) -ld r4.zw, r4.wwww, T0[0].zwyx -if_nz r1.x - ishl r6.xy, r4.wzww, l(8, 8, 0, 0) - ushr r6.zw, r4.wwwz, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r4.zw, r6.wwwz, r6.yyyx - mov r6.y, r4.w -else - mov r6.y, r4.w -endif -ld r6.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r6.zwzz, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r8.xy, r6.zwzz, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.zw, r7.xxxy, r8.xxxy -endif -bfi r3.y, l(16), l(0), r1.y, r2.z -store_uav_typed U0[0].xyzw, r7.zzzz, r3.xyxx -store_uav_typed U0[0].xyzw, r7.wwww, r2.xyxx -iadd r8.xyzw, r0.yyyy, l(5, 6, 7, 8) -bfi r6.x, l(16), l(0), r4.x, r5.z -store_uav_typed U0[0].xyzw, r8.xxxx, r6.xyxx -iadd r2.x, r0.z, r7.z -ushr r1.y, r1.y, l(16) -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.y, r1.z, l(16) -bfi r7.y, l(16), l(16), r3.z, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r7.xyzw -iadd r2.yw, r2.xxxx, l(0, 1, 0, 2) -ushr r1.y, r3.z, l(16) -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.wwww, r1.yyyy -ushr r1.y, r4.x, l(16) -bfi r7.y, l(16), l(16), r4.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r7.xyzw -ushr r1.y, r4.y, l(16) -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.zzzz, r1.yyyy -ushr r1.y, r4.z, l(16) -bfi r7.y, l(16), l(16), r6.z, r1.y -store_uav_typed U0[0].xyzw, r2.wwww, r7.xyzw -iadd r1.y, r0.z, r2.x -bfi r1.z, l(16), l(0), r2.z, r3.w -store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyxx -bfi r6.z, l(16), l(0), r5.z, r6.z -store_uav_typed U0[0].xyzw, r1.wwww, r6.zwzz -if_nz r0.w - iadd r0.w, r0.x, l(72) -else - iadd r0.w, r0.x, l(18) -endif -ld r1.yz, r0.wwww, T0[0].zyxw -if_nz r1.x - ishl r2.xy, r1.zyzz, l(8, 8, 0, 0) - ushr r2.zw, r1.zzzy, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.wwzw, r2.yyxy - mov r2.x, r1.z -else - mov r2.x, r1.z -endif -iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.zw, r3.xxxx, T0[0].zwxy -if_nz r1.x - ishl r2.zw, r1.zzzw, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r1.zwzz, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.zw, r2.zzzw, r4.xxxy -endif -ld r2.zw, r3.yyyy, T0[0].zwyx -if_nz r1.x - ishl r3.xy, r2.wzww, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r2.wzww, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r3.yyyx, r4.yyyx - mov r0.x, r2.w -else - mov r0.x, r2.w -endif -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) - ushr r4.zw, r3.xxxy, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r3.xy, r4.zwzz, r4.xyxx -endif -ld r3.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r4.xy, r3.zwzz, l(8, 8, 0, 0) - ushr r4.zw, r3.zzzw, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r3.zw, r4.zzzw, r4.xxxy - mov r2.w, r3.w -else - mov r2.w, r3.w -endif -iadd r4.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r5.xy, r4.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r5.xy, r5.zwzz, r6.xyxx -endif -ld r4.xy, r4.yyyy, T0[0].yxzw -if_nz r1.x - ishl r5.zw, r4.yyyx, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r4.yxyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r5.wzww, r6.yxyy - mov r3.w, r4.y -else - mov r3.w, r4.y -endif -ld r4.yz, r4.zzzz, T0[0].zyxw -if_nz r1.x - ishl r5.zw, r4.zzzy, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r4.zyzz, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.yz, r5.wwzw, r6.yyxy - mov r6.y, r4.z -else - mov r6.y, r4.z -endif -ld r4.zw, r4.wwww, T0[0].zwxy -if_nz r1.x - ishl r5.zw, r4.zzzw, l(0, 0, 8, 8) - and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r4.zw, r5.zzzw, r6.zzzw -endif -bfi r2.y, l(16), l(0), r1.y, r0.x -store_uav_typed U0[0].xyzw, r8.yyyy, r2.xyxx -store_uav_typed U0[0].xyzw, r8.zzzz, r2.zwzz -bfi r6.x, l(16), l(0), r5.x, r4.x -store_uav_typed U0[0].xyzw, r8.wwww, r6.xyxx -iadd r2.x, r0.z, r8.y -ushr r1.y, r1.y, l(16) -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.y, r1.z, l(16) -bfi r6.y, l(16), l(16), r3.x, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r6.xyzw -iadd r2.yz, r2.xxxx, l(0, 1, 2, 0) -ushr r1.y, r3.x, l(16) -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r1.yyyy -ushr r1.y, r5.x, l(16) -bfi r6.y, l(16), l(16), r5.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -ushr r1.y, r5.y, l(16) -bfi r5.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.yyyy, r1.yyyy -ushr r1.y, r4.y, l(16) -bfi r5.y, l(16), l(16), r4.z, r1.y -store_uav_typed U0[0].xyzw, r2.zzzz, r5.xyzw -iadd r1.y, r0.z, r2.x -bfi r1.z, l(16), l(0), r0.x, r3.y -store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -store_uav_typed U0[0].xyzw, r1.zzzz, r3.zwzz -bfi r4.z, l(16), l(0), r4.x, r4.z -store_uav_typed U0[0].xyzw, r1.wwww, r4.zwzz -iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) -iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) -ld r3.xy, r2.xxxx, T0[0].yxzw -if_nz r1.x - ishl r3.zw, r3.yyyx, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.yxyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.wzww, r4.yxyy - mov r4.x, r3.y -else - mov r4.x, r3.y -endif -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r3.yz, r2.xxyx, l(0, 8, 8, 0) - and r3.yz, r3.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) - and r4.zw, r4.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r3.yzyy, r4.zwzz -endif -ld r3.yz, r2.zzzz, T0[0].zyxw -if_nz r1.x - ishl r4.zw, r3.zzzy, l(0, 0, 8, 8) - and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r5.xy, r3.zyzz, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.yz, r4.wwzw, r5.yyxy - mov r0.x, r3.z -else - mov r0.x, r3.z -endif -ld r2.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r4.zw, r2.zzzw, l(0, 0, 8, 8) - and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r5.xy, r2.zwzz, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r4.zzzw, r5.xxxy -endif -iadd r5.xyzw, r0.wwww, l(13, 14, 15, 16) -ld r4.zw, r5.xxxx, T0[0].zwxy -if_nz r1.x - ishl r6.xy, r4.zwzz, l(8, 8, 0, 0) - ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r4.zw, r6.zzzw, r6.xxxy - mov r3.z, r4.w -else - mov r3.z, r4.w -endif -ld r5.xy, r5.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.xy, r5.xyxx, l(8, 8, 0, 0) - ushr r6.zw, r5.xxxy, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r5.xy, r6.zwzz, r6.xyxx -endif -ld r6.xy, r5.zzzz, T0[0].yxzw -if_nz r1.x - ishl r6.zw, r6.yyyx, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.yxyy, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.wzww, r7.yxyy - mov r4.w, r6.y -else - mov r4.w, r6.y -endif -iadd r0.w, r0.w, l(17) -ld r5.zw, r5.wwww, T0[0].zwyx -if_nz r1.x - ishl r6.yz, r5.wwzw, l(0, 8, 8, 0) - and r6.yz, r6.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r7.xy, r5.wzww, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r5.zw, r6.zzzy, r7.yyyx - mov r7.y, r5.w -else - mov r7.y, r5.w -endif -ld r6.yz, r0.wwww, T0[0].zxyw -if_nz r1.x - ishl r7.zw, r6.yyyz, l(0, 0, 8, 8) - and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r6.yzyy, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.yz, r7.zzwz, r8.xxyx -endif -bfi r4.y, l(16), l(0), r3.x, r0.x -store_uav_typed U0[0].xyzw, r1.yyyy, r4.xyxx -store_uav_typed U0[0].xyzw, r1.zzzz, r3.yzyy -bfi r7.x, l(16), l(0), r5.x, r6.x -store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx -iadd r0.y, r0.z, r1.y -ushr r0.w, r3.x, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.xxxx, r0.wwww -ushr r0.w, r2.x, l(16) -bfi r1.y, l(16), l(16), r2.z, r0.w -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) -ushr r0.w, r2.z, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.wwww, r0.wwww -ushr r0.w, r5.x, l(16) -bfi r3.y, l(16), l(16), r5.y, r0.w -store_uav_typed U0[0].xyzw, r1.xxxx, r3.xyzw -ushr r0.w, r5.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.zzzz, r0.wwww -ushr r0.w, r5.z, l(16) -bfi r3.y, l(16), l(16), r6.y, r0.w -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw -iadd r0.y, r0.z, r0.y -bfi r2.x, l(16), l(0), r0.x, r2.w -store_uav_typed U0[0].xyzw, r0.yyyy, r2.yxyy -iadd r0.xz, r0.yyyy, l(1, 0, 2, 0) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.zwzz -bfi r6.y, l(16), l(0), r6.x, r6.y -store_uav_typed U0[0].xyzw, r0.zzzz, r6.yzyy -ret -// Approximately 544 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.cso deleted file mode 100644 index 178b0eb40..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.h deleted file mode 100644 index bd9212518..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.h +++ /dev/null @@ -1,364 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_16bpb.cs.hlsl -const uint8_t texture_load_16bpb_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x51, 0x0A, 0x4E, 0xFA, 0xC1, 0x88, 0xC7, 0x31, - 0xA5, 0x1A, 0x3A, 0x26, 0xA9, 0x9B, 0x0D, 0x17, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x10, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x40, 0x10, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x02, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xBD, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 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0xFF, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, - 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, - 0x1E, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, 0xA4, 0x00, 0x00, 0x08, - 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x5B, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x22, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.txt deleted file mode 100644 index 6ec3be42e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.txt +++ /dev/null @@ -1,142 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(1) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r0.x, r0.x, l(3) - iadd r0.x, r0.x, r1.z - bfi r0.x, l(2), l(6), r0.x, l(0) - iadd r0.x, r1.y, r0.x - bfi r1.x, l(6), l(0), r2.x, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r0.y, r0.y, l(1) -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r1.x, r0.z, l(1) -movc r0.w, r0.w, l(4), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].xyzw -if_nz r0.y - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw -ret -// Approximately 91 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.cso deleted file mode 100644 index c94d70cce..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.h deleted file mode 100644 index fe39a242a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.h +++ /dev/null @@ -1,663 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_32bpb_2x.cs.hlsl -const uint8_t texture_load_32bpb_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x74, 0x61, 0x7B, 0x53, 0xDB, 0x4A, 0x0D, 0xA7, - 0x16, 0x05, 0xD7, 0x59, 0x24, 0x6E, 0x3F, 0x6E, 0x01, 0x00, 0x00, 0x00, - 0xE4, 0x1E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x48, 0x1E, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.txt deleted file mode 100644 index 182437b3b..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.txt +++ /dev/null @@ -1,274 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(2) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].zwxy -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r4.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r5.xyzw, r4.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw - mov r3.zw, r6.xxxy - mov r2.zw, r6.zzzw -else - mov r3.zw, r5.xxxy - mov r2.zw, r5.zzzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r4.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -ld r4.xyzw, r4.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw - mov r5.zw, r6.xxxy - mov r3.zw, r6.zzzw -else - mov r5.zw, r4.xxxy - mov r3.zw, r4.zzzw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw -iadd r4.xyz, r0.zzzz, r2.xyzx -store_uav_typed U0[0].xyzw, r4.xxxx, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(8) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r6.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r1.y - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw - mov r5.zw, r7.xxxy - mov r3.zw, r7.zzzw -else - mov r5.zw, r6.xxxy - mov r3.zw, r6.zzzw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw -store_uav_typed U0[0].xyzw, r4.yyyy, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r0.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw - mov r5.zw, r1.xxxy - mov r3.zw, r1.zzzw -else - mov r5.zw, r0.xxxy - mov r3.zw, r0.zzzw -endif -store_uav_typed U0[0].xyzw, r2.zzzz, r5.xyzw -store_uav_typed U0[0].xyzw, r4.zzzz, r3.xyzw -ret -// Approximately 223 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.cso deleted file mode 100644 index 4e82f6ed0..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h deleted file mode 100644 index 4f1539bd6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h +++ /dev/null @@ -1,589 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_32bpb_3x.cs.hlsl -const uint8_t texture_load_32bpb_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x2E, 0xB7, 0xC3, 0x05, 0x38, 0x89, 0x47, 0x98, - 0x53, 0x55, 0x0D, 0xC1, 0x5A, 0x04, 0x60, 0x17, 0x01, 0x00, 0x00, 0x00, - 0x6C, 0x1B, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xD0, 0x1A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 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xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(2) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx -ld r4.xy, r2.yyyy, T0[0].xyzw -ld r4.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r3.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw - mov r1.x, r4.x -else - mov r1.x, r4.x -endif -iadd r0.w, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.wwww, r1.wxww -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz -ld r2.xy, r2.wwww, T0[0].xyzw -iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r2.zw, r5.xxxx, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw - mov r1.x, r2.y -else - mov r1.x, r2.y -endif -iadd r1.yw, r0.yyyy, l(0, 1, 0, 2) -store_uav_typed U0[0].xyzw, r1.yyyy, r1.zxzz -store_uav_typed U0[0].xyzw, r1.wwww, r2.zwzz -ld r1.xy, r5.yyyy, T0[0].xyzw -ld r1.zw, r5.zzzz, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw - mov r4.x, r1.x - mov r2.y, r1.w -else - mov r4.x, r1.x - mov r2.y, r1.w -endif -iadd r0.xy, r0.wwww, l(1, 2, 0, 0) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yxyy -store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy -iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyxx -ld r0.xw, r5.wwww, T0[0].xzwy -if_nz r3.x - ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r1.zzzw, r1.xxxy -endif -if_nz r3.y - ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) - bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r0.xwxx -ret -// Approximately 177 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.cso deleted file mode 100644 index 604510fe8..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.h deleted file mode 100644 index 9da429204..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.h +++ /dev/null @@ -1,400 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_32bpb.cs.hlsl -const uint8_t texture_load_32bpb_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x90, 0xDD, 0xD8, 0x79, 0x01, 0x85, 0xAC, 0xFC, - 0x78, 0x1C, 0x55, 0x01, 0x6C, 0x6F, 0xB9, 0x2A, 0x01, 0x00, 0x00, 0x00, - 0x8C, 0x12, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xF0, 0x11, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 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0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, 0xA4, 0x00, 0x00, 0x08, - 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xF6, 0x0F, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x22, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.txt deleted file mode 100644 index f19e9d518..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.txt +++ /dev/null @@ -1,153 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.x, r0.x, l(2) -imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.y, CB0[0][2].x, r0.x -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -iadd r0.w, r0.y, l(1) -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r1.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -ret -// Approximately 102 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.cso deleted file mode 100644 index 145ff666d..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.h deleted file mode 100644 index 6d80b3cef..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.h +++ /dev/null @@ -1,634 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_64bpb_2x.cs.hlsl -const uint8_t texture_load_64bpb_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x0F, 0xD7, 0xC6, 0xB6, 0xE7, 0x96, 0x38, 0x03, - 0x2C, 0x7E, 0xB9, 0xDE, 0x46, 0x15, 0xE2, 0x1A, 0x01, 0x00, 0x00, 0x00, - 0x80, 0x1D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xE4, 0x1C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 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0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.txt deleted file mode 100644 index 0b2d247d9..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.txt +++ /dev/null @@ -1,245 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 7 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(3) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xyzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw -iadd r1.z, r0.z, r0.y -iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r3.xyzw, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -iadd r3.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r4.xyzw, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyzw -iadd r2.xyw, r0.zzzz, r3.xyxz -ld r4.xyzw, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(8) -else - iadd r0.y, r0.x, l(4) -endif -ld r4.xyzw, r0.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyzw -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r4.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -ld r4.xyzw, r0.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r3.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r0.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) - bfi r0.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw -endif -store_uav_typed U0[0].xyzw, r2.wwww, r0.xyzw -ret -// Approximately 194 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.cso deleted file mode 100644 index 8e04b5939..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.h deleted file mode 100644 index 74bc9ecf3..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.h +++ /dev/null @@ -1,1578 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_64bpb_3x.cs.hlsl -const uint8_t texture_load_64bpb_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xEF, 0x91, 0x0E, 0x91, 0x2D, 0x42, 0x59, 0x1F, - 0xFB, 0x02, 0x39, 0xB4, 0x48, 0x2E, 0x6B, 0x01, 0x01, 0x00, 0x00, 0x00, - 0xC4, 0x49, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x28, 0x49, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 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0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.txt deleted file mode 100644 index 09c32829b..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.txt +++ /dev/null @@ -1,621 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 6 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(3) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r1.yz, r0.xxxx, T0[0].zxyw -ieq r2.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xw, r2.yyyz, r2.xxxy -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy -iadd r2.xyzw, r0.yyyy, l(1, 2, 3, 4) -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -if_nz r1.w - ushr r4.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r4.xxyx -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r1.yzyy -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r4.xxyx -endif -if_nz r1.w - ushr r3.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r3.xxyx -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r1.yzyy -iadd r1.y, r0.z, r0.y -ld r2.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r2.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r3.xyxx, r4.xyxx -endif -if_nz r1.w - ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx -iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -if_nz r1.w - ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) - bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyxx -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r4.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.zw, r4.xxxy, l(0, 0, 8, 8) - and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r4.xy, r4.zwzz, r5.xyxx -endif -if_nz r1.w - ushr r4.zw, r4.xxxy, l(0, 0, 16, 16) - bfi r4.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r4.xyxx, r4.zwzz -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyxx -iadd r1.y, r0.z, r1.y -ld r2.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r2.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r3.xyxx, r4.xyxx -endif -if_nz r1.w - ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx -iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) - ushr r4.zw, r3.xxxy, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r3.xy, r4.zwzz, r4.xyxx -endif -if_nz r1.w - ushr r4.xy, r3.xyxx, l(16, 16, 0, 0) - bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r4.xyxx -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyxx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -if_nz r1.w - ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) - bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyxx -iadd r3.xyzw, r0.xxxx, l(9, 10, 11, 12) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r4.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r2.zzzz, r1.yzyy -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r3.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r2.wwww, r1.yzyy -iadd r4.xyzw, r0.yyyy, l(5, 6, 7, 8) -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r3.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r4.xxxx, r1.yzyy -iadd r1.y, r0.z, r2.z -ld r2.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r3.xyxx -endif -if_nz r1.w - ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx -iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) -iadd r3.xyzw, r0.xxxx, l(13, 14, 15, 16) -ld r2.zw, r3.xxxx, T0[0].zwxy -if_nz r1.x - ishl r5.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r5.zw, r2.zzzw, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r5.zzzw, r5.xxxy -endif -if_nz r1.w - ushr r5.xy, r2.zwzz, l(16, 16, 0, 0) - bfi r2.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r2.zzzw, r5.xxxy -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r2.zwzz -ld r2.xz, r3.yyyy, T0[0].xzyw -if_nz r1.x - ishl r3.xy, r2.xzxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r2.xzxx, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xz, r3.xxyx, r5.xxyx -endif -if_nz r1.w - ushr r3.xy, r2.xzxx, l(16, 16, 0, 0) - bfi r2.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r2.xxzx, r3.xxyx -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r2.xzxx -iadd r1.y, r0.z, r1.y -ld r2.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r3.xyxx -endif -if_nz r1.w - ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx -iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) -iadd r1.z, r0.x, l(17) -ld r2.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r3.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r3.zw, r2.zzzw, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r3.zzzw, r3.xxxy -endif -if_nz r1.w - ushr r3.xy, r2.zwzz, l(16, 16, 0, 0) - bfi r2.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r2.zzzw, r3.xxxy -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r2.zwzz -ld r2.xz, r1.zzzz, T0[0].xzyw -if_nz r1.x - ishl r3.xy, r2.xzxx, l(8, 8, 0, 0) - ushr r3.zw, r2.xxxz, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xz, r3.zzwz, r3.xxyx -endif -if_nz r1.w - ushr r3.xy, r2.xzxx, l(16, 16, 0, 0) - bfi r2.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r2.xxzx, r3.xxyx -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r2.xzxx -if_nz r0.w - iadd r0.w, r0.x, l(36) -else - iadd r0.w, r0.x, l(18) -endif -ld r1.yz, r0.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r4.yyyy, r1.yzyy -iadd r2.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.yz, r2.xxxx, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r3.zzwz, r3.xxyx -endif -if_nz r1.w - ushr r3.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r3.xxyx -endif -store_uav_typed U0[0].xyzw, r4.zzzz, r1.yzyy -ld r1.yz, r2.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r3.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r4.wwww, r1.yzyy -iadd r0.x, r0.z, r4.y -ld r1.yz, r2.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r3.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -ld r2.xy, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r3.xyxx -endif -if_nz r1.w - ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx -iadd r2.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r3.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -if_nz r1.w - ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) - bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyxx -iadd r0.x, r0.z, r0.x -ld r1.yz, r2.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r3.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -ld r2.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r3.zw, r2.xxxy, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r3.zwzz, r3.xyxx -endif -if_nz r1.w - ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx -ld r2.xy, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r3.xyxx -endif -if_nz r1.w - ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyxx -iadd r2.xyz, r0.yyyy, l(9, 10, 11, 0) -iadd r3.xyzw, r0.wwww, l(9, 10, 11, 12) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -if_nz r1.w - ushr r4.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r4.xxyx -endif -store_uav_typed U0[0].xyzw, r2.xxxx, r1.yzyy -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r4.xxyx -endif -if_nz r1.w - ushr r3.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r3.xxyx -endif -store_uav_typed U0[0].xyzw, r2.yyyy, r1.yzyy -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.yw, r1.yyyz, l(0, 8, 0, 8) - and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) - ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.yywy, r3.xxyx -endif -if_nz r1.w - ushr r2.yw, r1.yyyz, l(0, 16, 0, 16) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.yywy -endif -store_uav_typed U0[0].xyzw, r2.zzzz, r1.yzyy -iadd r0.x, r0.z, r2.x -ld r1.yz, r3.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -iadd r2.xyzw, r0.wwww, l(13, 14, 15, 16) -ld r3.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -if_nz r1.w - ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) - bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz -endif -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyxx -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r3.zw, r2.xxxy, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r3.zwzz, r3.xyxx -endif -if_nz r1.w - ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) - bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx -endif -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyxx -iadd r0.x, r0.z, r0.x -ld r0.yz, r2.zzzz, T0[0].zxyw -if_nz r1.x - ishl r1.yz, r0.yyzy, l(0, 8, 8, 0) - and r1.yz, r1.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) - ushr r2.xy, r0.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r0.yz, r1.yyzy, r2.xxyx -endif -if_nz r1.w - ushr r1.yz, r0.yyzy, l(0, 16, 16, 0) - bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.yyzy -endif -store_uav_typed U0[0].xyzw, r0.xxxx, r0.yzyy -iadd r0.yzw, r0.xxxw, l(0, 1, 2, 17) -ld r1.yz, r2.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -if_nz r1.w - ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) - bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy -ld r0.yw, r0.wwww, T0[0].zxwy -if_nz r1.x - ishl r1.xy, r0.ywyy, l(8, 8, 0, 0) - and r1.xy, r1.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r2.xy, r0.ywyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r0.yw, r1.xxxy, r2.xxxy -endif -if_nz r1.w - ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) - bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxy -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r0.ywyy -ret -// Approximately 570 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.cso deleted file mode 100644 index 4edeb50de..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.h deleted file mode 100644 index 7adb6406d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.h +++ /dev/null @@ -1,413 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_64bpb.cs.hlsl -const uint8_t texture_load_64bpb_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xA2, 0x8B, 0x1D, 0x68, 0xE5, 0xC0, 0x53, 0xF7, - 0xAC, 0x2B, 0xA8, 0x23, 0xA6, 0x25, 0x2D, 0x71, 0x01, 0x00, 0x00, 0x00, - 0x28, 0x13, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x8C, 0x12, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 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+++ /dev/null @@ -1,156 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(3) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r0.x, l(12), l(0), r2.z, r2.x - and r1.y, r2.w, l(1792) - iadd r0.x, r0.x, r1.y - and r1.y, r2.y, l(2) - iadd r1.y, r1.z, r1.y - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r0.x, r0.x, r1.y - bfi r1.x, l(6), l(0), r1.w, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.yyyy, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r0.y, r0.z, l(1) -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r1.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -ret -// Approximately 105 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.cso deleted file mode 100644 index 6b68298c3..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.h deleted file mode 100644 index 04945a04e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.h +++ /dev/null @@ -1,416 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_8bpb_2x.cs.hlsl -const uint8_t texture_load_8bpb_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x80, 0x41, 0xF4, 0xAE, 0xCF, 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0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.txt deleted file mode 100644 index c3a4b6ea6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.txt +++ /dev/null @@ -1,155 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 4 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(8) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.z, r1.y, l(1) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.wwww, l(0, 0, 16, 8) - bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.zzzz, l(2, 0, 16, 0), r2.xxyx - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), vThreadID.zzzz, r1.xxzx - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(1, 0, 1, 0), l(4, 0, 7, 0), vThreadID.yyyy, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - ishl r2.xy, vThreadID.yyyy, l(2, 7, 0, 0) - ishl r1.z, r2.x, l(1) - and r1.z, r1.z, l(96) - bfi r2.z, l(25), l(7), r1.y, r1.z - and r2.xy, r2.xyxx, l(8, 2048, 0, 0) - iadd r2.z, r2.z, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) - bfi r1.yz, l(0, 25, 25, 0), l(0, 10, 9, 0), r1.yyyy, r3.xxyx - imad r1.yz, r2.xxxx, l(0, 8, 4, 0), r1.yyzy - bfi r1.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), vThreadID.yyyy, r1.yyzy - bfi r1.y, l(12), l(0), r2.y, r1.y - and r1.z, r1.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.z, r1.y - endif -else - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -iadd r2.x, r0.x, l(1) -ld r2.xyzw, r2.xxxx, T0[0].ywxz -mov r3.xy, r1.ywyy -mov r3.zw, r2.xxxy -mov r2.xy, r1.xzxx -bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -iadd r1.x, r0.z, r0.y -ushr r2.xyzw, r2.xyzw, l(16, 16, 16, 16) -bfi r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw -movc r0.w, r0.w, l(16), l(2) -iadd r0.x, r0.w, r0.x -ld r1.xyzw, r0.xxxx, T0[0].xyzw -iadd r0.xy, r0.xyxx, l(1, 1, 0, 0) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -mov r3.xy, r1.ywyy -mov r3.zw, r2.xxxy -mov r2.xy, r1.xzxx -bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -iadd r0.x, r0.z, r0.y -ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) -bfi r1.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r1.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ret -// Approximately 104 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.cso deleted file mode 100644 index 7bce0948e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.h deleted file mode 100644 index 71239a46a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.h +++ /dev/null @@ -1,803 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_8bpb_3x.cs.hlsl -const uint8_t texture_load_8bpb_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xAD, 0x73, 0xA4, 0x82, 0x3F, 0x37, 0x58, 0x6A, - 0xDE, 0x8E, 0x84, 0x05, 0x4F, 0x3F, 0x43, 0xBE, 0x01, 0x00, 0x00, 0x00, - 0x74, 0x25, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xD8, 0x24, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 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-// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(8) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.z, r1.y, l(1) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.wwww, l(0, 0, 16, 8) - bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.zzzz, l(2, 0, 16, 0), r2.xxyx - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), vThreadID.zzzz, r1.xxzx - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(1, 0, 1, 0), l(4, 0, 7, 0), vThreadID.yyyy, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - ishl r2.xy, vThreadID.yyyy, l(2, 7, 0, 0) - ishl r1.z, r2.x, l(1) - and r1.z, r1.z, l(96) - bfi r2.z, l(25), l(7), r1.y, r1.z - and r2.xy, r2.xyxx, l(8, 2048, 0, 0) - iadd r2.z, r2.z, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) - bfi r1.yz, l(0, 25, 25, 0), l(0, 10, 9, 0), r1.yyyy, r3.xxyx - imad r1.yz, r2.xxxx, l(0, 8, 4, 0), r1.yyzy - bfi r1.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), vThreadID.yyyy, r1.yyzy - bfi r1.y, l(12), l(0), r2.y, r1.y - and r1.z, r1.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.z, r1.y - endif -else - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ld r2.xy, r2.yyyy, T0[0].xyzw -ld r3.xy, r2.zzzz, T0[0].xyzw -ld r2.zw, r2.wwww, T0[0].zwxy -iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r3.zw, r4.xxxx, T0[0].zwxy -ld r4.xy, r4.yyyy, T0[0].xyzw -ld r5.xy, r4.zzzz, T0[0].xyzw -ld r4.zw, r4.wwww, T0[0].zwxy -ushr r5.zw, r1.zzzz, l(0, 0, 8, 16) -bfi r6.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r5.zzzz, r1.xxxx -bfi r6.y, l(16), l(0), r5.w, r2.x -store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw -iadd r6.xyzw, r0.yyyy, l(1, 2, 3, 4) -ushr r5.zw, r3.xxxy, l(0, 0, 24, 16) -bfi r5.z, l(24), l(8), r5.z, r2.y -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r5.zzzz -ushr r8.xyz, r3.wwzw, l(8, 16, 16, 0) -bfi r7.y, l(8), l(24), r8.x, r2.w -store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw -bfi r7.xzw, l(16, 0, 16, 16), l(0, 0, 0, 0), r8.yyyy, r4.yyyy -ushr r8.xyw, r5.yxyx, l(24, 8, 0, 24) -bfi r3.y, l(24), l(8), r8.x, r5.x -bfi r7.y, l(16), l(16), r4.z, r3.y -store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw -iadd r3.y, r0.z, r0.y -ushr r5.xz, r1.xxyx, l(24, 0, 16, 0) -ishl r1.x, r1.y, l(16) -ushr r1.x, r1.x, l(8) -iadd r1.x, r1.x, r5.x -bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r1.wwww, r1.xxxx -ubfe r1.x, l(16), l(8), r1.w -ushr r6.xy, r2.yyyy, l(8, 24, 0, 0) -bfi r7.y, l(16), l(16), r6.x, r1.x -store_uav_typed U0[0].xyzw, r3.yyyy, r7.xyzw -iadd r1.xy, r3.yyyy, l(1, 2, 0, 0) -imad r2.y, r5.w, l(256), r6.y -bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r2.zzzz, r2.yyyy -ushr r2.y, r2.w, l(24) -ishl r3.zw, r3.zzzw, l(0, 0, 16, 24) -ushr r3.zw, r3.zzzw, l(0, 0, 8, 8) -iadd r2.y, r2.y, r3.z -bfi r7.y, l(8), l(24), r4.x, r2.y -store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw -ubfe r1.x, l(16), l(8), r4.x -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r8.yyyy, r1.xxxx -ushr r1.x, r4.z, l(16) -imad r1.x, r1.x, l(256), r8.w -bfi r7.y, l(8), l(24), r4.z, r1.x -store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyzw -iadd r1.x, r0.z, r3.y -ishl r1.y, r1.z, l(24) -ushr r1.y, r1.y, l(8) -iadd r1.y, r1.y, r5.z -bfi r7.xzw, l(24, 0, 24, 24), l(0, 0, 0, 0), r1.yyyy, r1.wwww -bfi r7.y, l(16), l(16), r3.x, r2.x -store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw -iadd r1.yz, r1.xxxx, l(0, 1, 2, 0) -ubfe r1.w, l(8), l(16), r3.x -bfi r2.xzw, l(8, 0, 8, 8), l(0, 0, 0, 0), r1.wwww, r2.zzzz -iadd r1.w, r3.w, r8.z -bfi r2.y, l(24), l(0), r1.w, r4.x -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.yyyy, r4.yyyy -ubfe r1.y, l(8), l(16), r5.y -bfi r2.y, l(8), l(0), r1.y, r4.w -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(72) -else - iadd r0.w, r0.x, l(9) -endif -ld r1.xy, r0.wwww, T0[0].xyzw -iadd r2.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ld r2.xy, r2.yyyy, T0[0].xyzw -ld r3.xy, r2.zzzz, T0[0].xyzw -ld r2.zw, r2.wwww, T0[0].zwxy -iadd r4.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r0.xw, r4.xxxx, T0[0].xzwy -ld r3.zw, r4.yyyy, T0[0].zwxy -ld r4.xy, r4.zzzz, T0[0].xyzw -ld r4.zw, r4.wwww, T0[0].zwxy -ushr r5.xy, r1.zzzz, l(8, 16, 0, 0) -bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r5.xxxx, r1.xxxx -bfi r7.y, l(16), l(0), r5.y, r2.x -store_uav_typed U0[0].xyzw, r6.zzzz, r7.xyzw -ushr r5.xy, r3.xyxx, l(24, 16, 0, 0) -bfi r5.x, l(24), l(8), r5.x, r2.y -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r5.xxxx -ushr r5.xzw, r0.wwwx, l(8, 0, 16, 16) -bfi r7.y, l(8), l(24), r5.x, r2.w -store_uav_typed U0[0].xyzw, r6.wwww, r7.xyzw -iadd r3.y, r0.y, l(5) -bfi r7.xzw, l(16, 0, 16, 16), l(0, 0, 0, 0), r5.zzzz, r3.wwww -ushr r6.xyw, r4.yxyx, l(24, 8, 0, 24) -bfi r4.x, l(24), l(8), r6.x, r4.x -bfi r7.y, l(16), l(16), r4.z, r4.x -store_uav_typed U0[0].xyzw, r3.yyyy, r7.xyzw -iadd r0.y, r0.z, r6.z -ushr r5.xz, r1.xxyx, l(24, 0, 16, 0) -ishl r1.x, r1.y, l(16) -ushr r1.x, r1.x, l(8) -iadd r1.x, r1.x, r5.x -bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r1.wwww, r1.xxxx -ubfe r1.x, l(16), l(8), r1.w -ushr r6.xz, r2.yyyy, l(8, 0, 24, 0) -bfi r7.y, l(16), l(16), r6.x, r1.x -store_uav_typed U0[0].xyzw, r0.yyyy, r7.xyzw -iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) -imad r2.y, r5.y, l(256), r6.z -bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r2.zzzz, r2.yyyy -ushr r2.y, r2.w, l(24) -ishl r0.xw, r0.xxxw, l(16, 0, 0, 24) -ushr r0.xw, r0.xxxw, l(8, 0, 0, 8) -iadd r0.x, r0.x, r2.y -bfi r7.y, l(8), l(24), r3.z, r0.x -store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw -ubfe r0.x, l(16), l(8), r3.z -bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r6.yyyy, r0.xxxx -ushr r0.x, r4.z, l(16) -imad r0.x, r0.x, l(256), r6.w -bfi r7.y, l(8), l(24), r4.z, r0.x -store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyzw -iadd r0.x, r0.z, r0.y -ishl r0.y, r1.z, l(24) -ushr r0.y, r0.y, l(8) -iadd r0.yw, r0.yyyw, r5.zzzw -bfi r1.xzw, l(24, 0, 24, 24), l(0, 0, 0, 0), r0.yyyy, r1.wwww -bfi r1.y, l(16), l(16), r3.x, r2.x -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) -ubfe r1.x, l(8), l(16), r3.x -bfi r1.xzw, l(8, 0, 8, 8), l(0, 0, 0, 0), r1.xxxx, r2.zzzz -bfi r1.y, l(24), l(0), r0.w, r3.z -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.yyyy, r3.wwww -ubfe r0.y, l(8), l(16), r4.y -bfi r1.y, l(8), l(0), r0.y, r4.w -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -ret -// Approximately 222 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.cso deleted file mode 100644 index 3e21eef70..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.h deleted file mode 100644 index 2e183d3a7..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.h +++ /dev/null @@ -1,344 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_8bpb.cs.hlsl -const uint8_t texture_load_8bpb_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xD1, 0xB8, 0xF5, 0x19, 0xA7, 0x96, 0xDE, 0xEA, - 0x23, 0x5A, 0xBF, 0x55, 0x5B, 0xA7, 0xBF, 0x34, 0x01, 0x00, 0x00, 0x00, - 0xEC, 0x0F, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x50, 0x0F, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.txt deleted file mode 100644 index a796961e1..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.txt +++ /dev/null @@ -1,131 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 3 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.y, CB0[0][2].x, r0.x -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.x, l(27), l(1), vThreadID.x - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(8) - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - and r1.z, r1.y, l(1) - ishr r1.w, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - and r1.xz, r1.xxxx, l(16, 0, 8, 0) - bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.xw, r1.xxxx, l(2, 0, 0, 16), r2.xxxy - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.zzzz, r1.xxwx - bfi r1.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.x, l(27), l(1), vThreadID.x - ishr r1.yz, vThreadID.yyyy, l(0, 5, 2, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.x, r1.y, r1.w, r1.x - ishl r1.yw, vThreadID.yyyy, l(0, 2, 0, 7) - ishl r2.x, r1.y, l(1) - and r2.x, r2.x, l(96) - bfi r2.y, l(25), l(7), r1.x, r2.x - and r1.yw, r1.yyyw, l(0, 8, 0, 2048) - iadd r2.y, r2.y, r1.y - bfi r2.y, l(1), l(4), vThreadID.y, r2.y - ishl r2.xz, r2.xxxx, l(3, 0, 2, 0) - bfi r2.xz, l(25, 0, 25, 0), l(10, 0, 9, 0), r1.xxxx, r2.xxzx - imad r1.xy, r1.yyyy, l(8, 4, 0, 0), r2.xzxx - bfi r1.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), vThreadID.yyyy, r1.xyxx - bfi r1.x, l(12), l(0), r1.w, r1.x - and r1.y, r1.y, l(1792) - iadd r1.x, r1.x, r1.y - and r1.y, r1.z, l(2) - ishr r1.z, r0.x, l(3) - iadd r1.y, r1.z, r1.y - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.y, r1.x - endif -else - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(3, 4, 0, 0) -ld r1.xy, r0.xxxx, T0[0].xyzw -movc r0.z, r0.z, l(8), l(1) -iadd r0.x, r0.z, r0.x -ld r1.zw, r0.xxxx, T0[0].zwxy -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -ret -// Approximately 80 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.cso deleted file mode 100644 index e1400d689..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.h deleted file mode 100644 index bfa2c7d34..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.h +++ /dev/null @@ -1,1400 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_ctx1.cs.hlsl -const uint8_t texture_load_ctx1_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC7, 0xDB, 0xEC, 0x83, 0x2D, 0xFD, 0xAD, 0x74, - 0x5D, 0xE0, 0xD1, 0x7C, 0x77, 0x77, 0xD1, 0xC6, 0x01, 0x00, 0x00, 0x00, - 0x68, 0x41, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xCC, 0x40, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 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5cb54cdea..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.txt +++ /dev/null @@ -1,495 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xzyw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xzyw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xzyw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xzyw, r4.xzyw -endif -if_nz r1.y - ushr r3.xyzw, r2.xzyw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xzyw -endif -ubfe r1.zw, l(0, 0, 8, 8), l(0, 0, 8, 8), r2.xxxy -bfi r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r2.xyxx, l(0, 0, 0, 0) -iadd r1.zw, r1.zzzw, r3.xxxy -ushr r3.xy, r2.xyxx, l(24, 24, 0, 0) -and r2.xy, r2.xyxx, l(0x00ff0000, 0x00ff0000, 0, 0) -iadd r2.xy, r2.xyxx, r3.xyxx -ishl r3.xy, r2.zwzz, l(1, 1, 0, 0) -and r3.xy, r3.xyxx, l(0xaaaaaaaa, 0xaaaaaaaa, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 1, 1) -and r2.zw, r2.zzzw, l(0, 0, 0x55555555, 0x55555555) -iadd r2.zw, r2.zzzw, r3.xxxy -ushr r3.xy, r2.zwzz, l(1, 1, 0, 0) -and r3.xy, r3.xyxx, l(0x55555555, 0x55555555, 0, 0) -xor r2.zw, r2.zzzw, r3.xxxy -not r3.xy, r2.wzww -ushr r4.yzw, r3.yyyy, l(0, 4, 2, 6) -mov r4.x, r3.y -and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) -ushr r5.yzw, r2.zzzz, l(0, 4, 2, 6) -mov r5.x, r2.z -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -imul null, r5.xyzw, r2.xxxx, r5.xyzw -imad r4.xyzw, r4.xyzw, r1.zzzz, r5.xyzw -and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) -udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) -ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) -or r4.xy, r4.xyxx, r5.xyxx -ishl r5.xy, r5.zwzz, l(16, 16, 0, 0) -or r4.xy, r4.xyxx, r5.xyxx -or r4.xy, r4.zwzz, r4.xyxx -ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) -and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) -ushr r5.yzw, r2.wwww, l(0, 4, 2, 6) -mov r5.x, r2.w -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -imul null, r5.xyzw, r2.yyyy, r5.xyzw -imad r3.xyzw, r3.xyzw, r1.wwww, r5.xyzw -and r5.xyzw, r3.xyzw, l(2047, 2047, 2047, 2047) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -ushr r3.xyzw, r3.xyzw, l(16, 16, 16, 16) -udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) -ishl r3.xyzw, r3.xyzw, l(8, 8, 24, 24) -or r3.xy, r3.xyxx, r5.xyxx -ishl r5.xy, r5.zwzz, l(16, 16, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -or r4.zw, r3.zzzw, r3.xxxy -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -imad r3.x, vThreadID.y, l(4), l(1) -ilt r3.x, r3.x, CB0[0][2].y -if_nz r3.x - iadd r3.y, r0.z, r0.y - ushr r4.xy, r2.wzww, l(8, 8, 0, 0) - not r5.xy, r4.xyxx - ushr r6.yzw, r5.yyyy, l(0, 4, 2, 6) - mov r6.x, r5.y - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r7.yzw, r4.yyyy, l(0, 4, 2, 6) - mov r7.x, r4.y - and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) - imul null, r7.xyzw, r2.xxxx, r7.xyzw - imad r6.xyzw, r6.xyzw, r1.zzzz, r7.xyzw - and r7.xyzw, r6.xyzw, l(2047, 2047, 2047, 2047) - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - ushr r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(8, 8, 24, 24) - or r3.zw, r6.xxxy, r7.xxxy - ishl r6.xy, r7.zwzz, l(16, 16, 0, 0) - or r3.zw, r3.zzzw, r6.xxxy - or r6.xy, r6.zwzz, r3.zwzz - ushr r5.yzw, r5.xxxx, l(0, 4, 2, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r2.yyyy, r4.xyzw - imad r4.xyzw, r5.xyzw, r1.wwww, r4.xyzw - and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) - or r3.zw, r4.xxxy, r5.xxxy - ishl r4.xy, r5.zwzz, l(16, 16, 0, 0) - or r3.zw, r3.zzzw, r4.xxxy - or r6.zw, r4.zzzw, r3.zzzw - store_uav_typed U0[0].xyzw, r3.yyyy, r6.xyzw - imad r3.y, vThreadID.y, l(4), l(2) - ilt r3.y, r3.y, CB0[0][2].y - if_nz r3.y - ishl r3.y, r0.z, l(1) - iadd r3.y, r0.y, r3.y - ushr r4.xy, r2.wzww, l(16, 16, 0, 0) - not r5.xy, r4.xyxx - ushr r6.yzw, r5.yyyy, l(0, 4, 2, 6) - mov r6.x, r5.y - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r7.yzw, r4.yyyy, l(0, 4, 2, 6) - mov r7.x, r4.y - and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) - imul null, r7.xyzw, r2.xxxx, r7.xyzw - imad r6.xyzw, r6.xyzw, r1.zzzz, r7.xyzw - and r7.xyzw, r6.xyzw, l(2047, 2047, 2047, 2047) - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - ushr r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(8, 8, 24, 24) - or r3.zw, r6.xxxy, r7.xxxy - ishl r6.xy, r7.zwzz, l(16, 16, 0, 0) - or r3.zw, r3.zzzw, r6.xxxy - or r6.xy, r6.zwzz, r3.zwzz - ushr r5.yzw, r5.xxxx, l(0, 4, 2, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r2.yyyy, r4.xyzw - imad r4.xyzw, r5.xyzw, r1.wwww, r4.xyzw - and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) - or r3.zw, r4.xxxy, r5.xxxy - ishl r4.xy, r5.zwzz, l(16, 16, 0, 0) - or r3.zw, r3.zzzw, r4.xxxy - or r6.zw, r4.zzzw, r3.zzzw - store_uav_typed U0[0].xyzw, r3.yyyy, r6.xyzw - imad r3.y, vThreadID.y, l(4), l(3) - ilt r3.y, r3.y, CB0[0][2].y - if_nz r3.y - imad r3.y, l(3), r0.z, r0.y - ushr r4.xy, r2.wzww, l(24, 24, 0, 0) - not r5.xy, r4.xyxx - ushr r6.yzw, r5.yyyy, l(0, 4, 2, 6) - mov r6.x, r5.y - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r7.yzw, r4.yyyy, l(0, 4, 2, 6) - mov r7.x, r4.y - and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) - imul null, r7.xyzw, r2.xxxx, r7.xyzw - imad r6.xyzw, r6.xyzw, r1.zzzz, r7.xyzw - and r7.xyzw, r6.xyzw, l(2047, 2047, 2047, 2047) - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - ushr r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(8, 8, 24, 24) - or r2.xz, r6.xxyx, r7.xxyx - ishl r3.zw, r7.zzzw, l(0, 0, 16, 16) - or r2.xz, r2.xxzx, r3.zzwz - or r6.xy, r6.zwzz, r2.xzxx - ushr r5.yzw, r5.xxxx, l(0, 4, 2, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r2.xyzw, r2.yyyy, r4.xyzw - imad r2.xyzw, r5.xyzw, r1.wwww, r2.xyzw - and r4.xyzw, r2.xyzw, l(2047, 2047, 2047, 2047) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ushr r2.xyzw, r2.xyzw, l(16, 16, 16, 16) - udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) - ishl r2.xyzw, r2.xyzw, l(8, 8, 24, 24) - or r1.zw, r2.xxxy, r4.xxxy - ishl r2.xy, r4.zwzz, l(16, 16, 0, 0) - or r1.zw, r1.zzzw, r2.xxxy - or r6.zw, r2.zzzw, r1.zzzw - store_uav_typed U0[0].xyzw, r3.yyyy, r6.xyzw - endif - endif -endif -iadd r0.y, r0.y, l(1) -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].xzyw -if_nz r1.x - ishl r4.xyzw, r2.xzyw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.xzyw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.xzyw, r5.xzyw -endif -if_nz r1.y - ushr r1.xyzw, r2.xzyw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xzyw -endif -ubfe r0.xw, l(8, 0, 0, 8), l(8, 0, 0, 8), r2.xxxy -bfi r1.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r2.xyxx, l(0, 0, 0, 0) -iadd r0.xw, r0.xxxw, r1.xxxy -ushr r1.xy, r2.xyxx, l(24, 24, 0, 0) -and r1.zw, r2.xxxy, l(0, 0, 0x00ff0000, 0x00ff0000) -iadd r1.xy, r1.zwzz, r1.xyxx -ishl r1.zw, r2.zzzw, l(0, 0, 1, 1) -and r1.zw, r1.zzzw, l(0, 0, 0xaaaaaaaa, 0xaaaaaaaa) -ushr r2.xy, r2.zwzz, l(1, 1, 0, 0) -and r2.xy, r2.xyxx, l(0x55555555, 0x55555555, 0, 0) -iadd r1.zw, r1.zzzw, r2.xxxy -ushr r2.xy, r1.zwzz, l(1, 1, 0, 0) -and r2.xy, r2.xyxx, l(0x55555555, 0x55555555, 0, 0) -xor r1.zw, r1.zzzw, r2.xxxy -not r2.xy, r1.wzww -ushr r4.yzw, r2.yyyy, l(0, 4, 2, 6) -mov r4.x, r2.y -and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) -ushr r5.yzw, r1.zzzz, l(0, 4, 2, 6) -mov r5.x, r1.z -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -imul null, r5.xyzw, r1.xxxx, r5.xyzw -imad r4.xyzw, r4.xyzw, r0.xxxx, r5.xyzw -and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) -udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) -ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) -or r3.yz, r4.xxyx, r5.xxyx -ishl r4.xy, r5.zwzz, l(16, 16, 0, 0) -or r3.yz, r3.yyzy, r4.xxyx -or r4.xy, r4.zwzz, r3.yzyy -ushr r2.yzw, r2.xxxx, l(0, 4, 2, 6) -and r2.xyzw, r2.xyzw, l(3, 3, 3, 3) -ushr r5.yzw, r1.wwww, l(0, 4, 2, 6) -mov r5.x, r1.w -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -imul null, r5.xyzw, r1.yyyy, r5.xyzw -imad r2.xyzw, r2.xyzw, r0.wwww, r5.xyzw -and r5.xyzw, r2.xyzw, l(2047, 2047, 2047, 2047) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -ushr r2.xyzw, r2.xyzw, l(16, 16, 16, 16) -udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) -ishl r2.xyzw, r2.xyzw, l(8, 8, 24, 24) -or r2.xy, r2.xyxx, r5.xyxx -ishl r3.yz, r5.zzwz, l(0, 16, 16, 0) -or r2.xy, r2.xyxx, r3.yzyy -or r4.zw, r2.zzzw, r2.xxxy -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -if_nz r3.x - iadd r2.x, r0.z, r0.y - ushr r3.xy, r1.wzww, l(8, 8, 0, 0) - not r4.xy, r3.xyxx - ushr r5.yzw, r4.yyyy, l(0, 4, 2, 6) - mov r5.x, r4.y - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r6.yzw, r3.yyyy, l(0, 4, 2, 6) - mov r6.x, r3.y - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - imul null, r6.xyzw, r1.xxxx, r6.xyzw - imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw - and r6.xyzw, r5.xyzw, l(2047, 2047, 2047, 2047) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ushr r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(8, 8, 24, 24) - or r2.yz, r5.xxyx, r6.xxyx - ishl r5.xy, r6.zwzz, l(16, 16, 0, 0) - or r2.yz, r2.yyzy, r5.xxyx - or r5.xy, r5.zwzz, r2.yzyy - ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - imul null, r3.xyzw, r1.yyyy, r3.xyzw - imad r3.xyzw, r4.xyzw, r0.wwww, r3.xyzw - and r4.xyzw, r3.xyzw, l(2047, 2047, 2047, 2047) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ushr r3.xyzw, r3.xyzw, l(16, 16, 16, 16) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - ishl r3.xyzw, r3.xyzw, l(8, 8, 24, 24) - or r2.yz, r3.xxyx, r4.xxyx - ishl r3.xy, r4.zwzz, l(16, 16, 0, 0) - or r2.yz, r2.yyzy, r3.xxyx - or r5.zw, r3.zzzw, r2.yyyz - store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw - imad r2.x, vThreadID.y, l(4), l(2) - ilt r2.x, r2.x, CB0[0][2].y - if_nz r2.x - ishl r2.x, r0.z, l(1) - iadd r2.x, r0.y, r2.x - ushr r3.xy, r1.wzww, l(16, 16, 0, 0) - not r4.xy, r3.xyxx - ushr r5.yzw, r4.yyyy, l(0, 4, 2, 6) - mov r5.x, r4.y - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r6.yzw, r3.yyyy, l(0, 4, 2, 6) - mov r6.x, r3.y - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - imul null, r6.xyzw, r1.xxxx, r6.xyzw - imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw - and r6.xyzw, r5.xyzw, l(2047, 2047, 2047, 2047) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ushr r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(8, 8, 24, 24) - or r2.yz, r5.xxyx, r6.xxyx - ishl r5.xy, r6.zwzz, l(16, 16, 0, 0) - or r2.yz, r2.yyzy, r5.xxyx - or r5.xy, r5.zwzz, r2.yzyy - ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - imul null, r3.xyzw, r1.yyyy, r3.xyzw - imad r3.xyzw, r4.xyzw, r0.wwww, r3.xyzw - and r4.xyzw, r3.xyzw, l(2047, 2047, 2047, 2047) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ushr r3.xyzw, r3.xyzw, l(16, 16, 16, 16) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - ishl r3.xyzw, r3.xyzw, l(8, 8, 24, 24) - or r2.yz, r3.xxyx, r4.xxyx - ishl r3.xy, r4.zwzz, l(16, 16, 0, 0) - or r2.yz, r2.yyzy, r3.xxyx - or r5.zw, r3.zzzw, r2.yyyz - store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw - imad r2.x, vThreadID.y, l(4), l(3) - ilt r2.x, r2.x, CB0[0][2].y - if_nz r2.x - imad r0.y, l(3), r0.z, r0.y - ushr r2.xy, r1.wzww, l(24, 24, 0, 0) - not r3.xy, r2.xyxx - ushr r4.yzw, r3.yyyy, l(0, 4, 2, 6) - mov r4.x, r3.y - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - ushr r5.yzw, r2.yyyy, l(0, 4, 2, 6) - mov r5.x, r2.y - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - imul null, r5.xyzw, r1.xxxx, r5.xyzw - imad r4.xyzw, r4.xyzw, r0.xxxx, r5.xyzw - and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) - or r0.xz, r4.xxyx, r5.xxyx - ishl r1.xz, r5.zzwz, l(16, 0, 16, 0) - or r0.xz, r0.xxzx, r1.xxzx - or r4.xy, r4.zwzz, r0.xzxx - ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - ushr r2.yzw, r2.xxxx, l(0, 4, 2, 6) - and r2.xyzw, r2.xyzw, l(3, 3, 3, 3) - imul null, r1.xyzw, r1.yyyy, r2.xyzw - imad r1.xyzw, r3.xyzw, r0.wwww, r1.xyzw - and r2.xyzw, r1.xyzw, l(2047, 2047, 2047, 2047) - udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) - ushr r1.xyzw, r1.xyzw, l(16, 16, 16, 16) - udiv r1.xyzw, null, r1.xyzw, l(3, 3, 3, 3) - ishl r1.xyzw, r1.xyzw, l(8, 8, 24, 24) - or r0.xz, r1.xxyx, r2.xxyx - ishl r1.xy, r2.zwzz, l(16, 16, 0, 0) - or r0.xz, r0.xxzx, r1.xxyx - or r4.zw, r1.zzzw, r0.xxxz - store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw - endif - endif -endif -ret -// Approximately 444 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.cso deleted file mode 100644 index 4d07de3c5..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.h deleted file mode 100644 index 4492434e7..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.h +++ /dev/null @@ -1,1082 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_depth_float_2x.cs.hlsl -const uint8_t texture_load_depth_float_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x81, 0x3B, 0xC9, 0x1B, 0xC2, 0x15, 0xFE, 0x95, - 0x73, 0xC7, 0xA2, 0xCE, 0x2A, 0x36, 0x18, 0x82, 0x01, 0x00, 0x00, 0x00, - 0x84, 0x32, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xE8, 0x31, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 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0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x13, 0x03, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x38, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5C, 0x03, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x03, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.txt deleted file mode 100644 index 7c2f942f5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.txt +++ /dev/null @@ -1,402 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 10 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(2) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].zwxy -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r4.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r5.xyzw, r4.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw - mov r3.zw, r6.xxxy - mov r2.zw, r6.zzzw -else - mov r3.zw, r5.xxxy - mov r2.zw, r5.zzzw -endif -ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) -ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw -ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) -firstbit_hi r7.xyzw, r3.xyzw -iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) -movc r7.xyzw, r3.xyzw, r7.xyzw, l(21,21,21,21) -iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) -movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw -ishl r7.xyzw, r3.xyzw, r7.xyzw -and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r3.xyzw, r6.xyzw, r3.xyzw, r7.xyzw -ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) -iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) -iadd r3.xyzw, r6.xyzw, r3.xyzw -movc r3.xyzw, r5.xyzw, r3.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) -ubfe r2.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r2.xyzw -ushr r5.xyzw, r3.xyzw, l(20, 20, 20, 20) -firstbit_hi r6.xyzw, r2.xyzw -iadd r6.xyzw, r6.xyzw, l(-11, -11, -11, -11) -movc r6.xyzw, r2.xyzw, r6.xyzw, l(21,21,21,21) -iadd r7.xyzw, -r6.xyzw, l(1, 1, 1, 1) -movc r7.xyzw, r5.xyzw, r5.xyzw, r7.xyzw -ishl r6.xyzw, r2.xyzw, r6.xyzw -and r6.xyzw, r6.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r2.xyzw, r5.xyzw, r2.xyzw, r6.xyzw -ishl r5.xyzw, r7.xyzw, l(23, 23, 23, 23) -iadd r5.xyzw, r5.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r2.xyzw, r2.xyzw, l(3, 3, 3, 3) -iadd r2.xyzw, r5.xyzw, r2.xyzw -movc r2.xyzw, r3.xyzw, r2.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r4.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -ld r4.xyzw, r4.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw - mov r5.zw, r6.xxxy - mov r3.zw, r6.zzzw -else - mov r5.zw, r4.xxxy - mov r3.zw, r4.zzzw -endif -ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) -ubfe r5.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r5.xyzw -ushr r6.xyzw, r4.xyzw, l(20, 20, 20, 20) -firstbit_hi r7.xyzw, r5.xyzw -iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) -movc r7.xyzw, r5.xyzw, r7.xyzw, l(21,21,21,21) -iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) -movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw -ishl r7.xyzw, r5.xyzw, r7.xyzw -and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r5.xyzw, r6.xyzw, r5.xyzw, r7.xyzw -ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) -iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -iadd r5.xyzw, r6.xyzw, r5.xyzw -movc r4.xyzw, r4.xyzw, r5.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r4.xyz, r0.zzzz, r2.xyzx -ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) -ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw -ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) -firstbit_hi r7.xyzw, r3.xyzw -iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) -movc r7.xyzw, r3.xyzw, r7.xyzw, l(21,21,21,21) -iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) -movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw -ishl r7.xyzw, r3.xyzw, r7.xyzw -and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r3.xyzw, r6.xyzw, r3.xyzw, r7.xyzw -ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) -iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) -iadd r3.xyzw, r6.xyzw, r3.xyzw -movc r3.xyzw, r5.xyzw, r3.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r4.xxxx, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(8) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r6.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r1.y - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw - mov r5.zw, r7.xxxy - mov r3.zw, r7.zzzw -else - mov r5.zw, r6.xxxy - mov r3.zw, r6.zzzw -endif -ushr r6.xyzw, r5.xyzw, l(8, 8, 8, 8) -ubfe r5.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r5.xyzw -ushr r7.xyzw, r6.xyzw, l(20, 20, 20, 20) -firstbit_hi r8.xyzw, r5.xyzw -iadd r8.xyzw, r8.xyzw, l(-11, -11, -11, -11) -movc r8.xyzw, r5.xyzw, r8.xyzw, l(21,21,21,21) -iadd r9.xyzw, -r8.xyzw, l(1, 1, 1, 1) -movc r9.xyzw, r7.xyzw, r7.xyzw, r9.xyzw -ishl r8.xyzw, r5.xyzw, r8.xyzw -and r8.xyzw, r8.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r5.xyzw, r7.xyzw, r5.xyzw, r8.xyzw -ishl r7.xyzw, r9.xyzw, l(23, 23, 23, 23) -iadd r7.xyzw, r7.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -iadd r5.xyzw, r7.xyzw, r5.xyzw -movc r5.xyzw, r6.xyzw, r5.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw -ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) -ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw -ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) -firstbit_hi r7.xyzw, r3.xyzw -iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) -movc r7.xyzw, r3.xyzw, r7.xyzw, l(21,21,21,21) -iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) -movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw -ishl r7.xyzw, r3.xyzw, r7.xyzw -and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r3.xyzw, r6.xyzw, r3.xyzw, r7.xyzw -ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) -iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) -iadd r3.xyzw, r6.xyzw, r3.xyzw -movc r3.xyzw, r5.xyzw, r3.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r4.yyyy, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r0.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw - mov r5.zw, r1.xxxy - mov r3.zw, r1.zzzw -else - mov r5.zw, r0.xxxy - mov r3.zw, r0.zzzw -endif -ushr r0.xyzw, r5.xyzw, l(8, 8, 8, 8) -ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r5.xyzw -ushr r5.xyzw, r0.xyzw, l(20, 20, 20, 20) -firstbit_hi r6.xyzw, r1.xyzw -iadd r6.xyzw, r6.xyzw, l(-11, -11, -11, -11) -movc r6.xyzw, r1.xyzw, r6.xyzw, l(21,21,21,21) -iadd r7.xyzw, -r6.xyzw, l(1, 1, 1, 1) -movc r7.xyzw, r5.xyzw, r5.xyzw, r7.xyzw -ishl r6.xyzw, r1.xyzw, r6.xyzw -and r6.xyzw, r6.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r1.xyzw, r5.xyzw, r1.xyzw, r6.xyzw -ishl r5.xyzw, r7.xyzw, l(23, 23, 23, 23) -iadd r5.xyzw, r5.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -iadd r1.xyzw, r5.xyzw, r1.xyzw -movc r0.xyzw, r0.xyzw, r1.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw -ushr r0.xyzw, r3.xyzw, l(8, 8, 8, 8) -ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw -ushr r2.xyzw, r0.xyzw, l(20, 20, 20, 20) -firstbit_hi r3.xyzw, r1.xyzw -iadd r3.xyzw, r3.xyzw, l(-11, -11, -11, -11) -movc r3.xyzw, r1.xyzw, r3.xyzw, l(21,21,21,21) -iadd r5.xyzw, -r3.xyzw, l(1, 1, 1, 1) -movc r5.xyzw, r2.xyzw, r2.xyzw, r5.xyzw -ishl r3.xyzw, r1.xyzw, r3.xyzw -and r3.xyzw, r3.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r1.xyzw, r2.xyzw, r1.xyzw, r3.xyzw -ishl r2.xyzw, r5.xyzw, l(23, 23, 23, 23) -iadd r2.xyzw, r2.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -iadd r1.xyzw, r2.xyzw, r1.xyzw -movc r0.xyzw, r0.xyzw, r1.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r4.zzzz, r0.xyzw -ret -// Approximately 351 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.cso deleted file mode 100644 index 102b645d7..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.h deleted file mode 100644 index d2affa34d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.h +++ /dev/null @@ -1,848 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_depth_float_3x.cs.hlsl -const uint8_t texture_load_depth_float_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xBE, 0x15, 0x80, 0x22, 0x42, 0x0C, 0x9B, 0xCE, - 0xAA, 0xA1, 0x04, 0x14, 0x9B, 0x5F, 0x83, 0x14, 0x01, 0x00, 0x00, 0x00, - 0x90, 0x27, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.txt deleted file mode 100644 index a52942f5e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.txt +++ /dev/null @@ -1,304 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 10 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(2) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) -ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw -ushr r5.xyzw, r4.xyzw, l(20, 20, 20, 20) -firstbit_hi r6.xyzw, r1.xyzw -iadd r6.xyzw, r6.xyzw, l(-11, -11, -11, -11) -movc r6.xyzw, r1.xyzw, r6.xyzw, l(21,21,21,21) -iadd r7.xyzw, -r6.xyzw, l(1, 1, 1, 1) -movc r7.xyzw, r5.xyzw, r5.xyzw, r7.xyzw -ishl r6.xyzw, r1.xyzw, r6.xyzw -and r6.xyzw, r6.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r1.xyzw, r5.xyzw, r1.xyzw, r6.xyzw -ishl r5.xyzw, r7.xyzw, l(23, 23, 23, 23) -iadd r5.xyzw, r5.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -iadd r1.xyzw, r5.xyzw, r1.xyzw -movc r1.xyzw, r4.xyzw, r1.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx -ld r4.xy, r2.yyyy, T0[0].xyzw -ld r4.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r3.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) -ubfe r4.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r4.xyzw -ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) -firstbit_hi r7.xyzw, r4.xyzw -iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) -movc r7.xyzw, r4.xyzw, r7.xyzw, l(21,21,21,21) -iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) -movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw -ishl r7.xyzw, r4.xyzw, r7.xyzw -and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r4.xyzw, r6.xyzw, r4.xyzw, r7.xyzw -ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) -iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r4.xyzw, r4.xyzw, l(3, 3, 3, 3) -iadd r4.xyzw, r6.xyzw, r4.xyzw -movc r4.xyzw, r5.xyzw, r4.xyzw, l(0,0,0,0) -iadd r0.w, r0.z, r0.y -mov r5.xzw, r1.wwww -mov r5.y, r4.x -store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz -ld r2.xy, r2.wwww, T0[0].xyzw -iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r2.zw, r5.xxxx, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw -endif -ushr r6.xyzw, r2.xyzw, l(8, 8, 8, 8) -ubfe r2.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r2.xyzw -ushr r7.xyzw, r6.xyzw, l(20, 20, 20, 20) -firstbit_hi r8.xyzw, r2.xyzw -iadd r8.xyzw, r8.xyzw, l(-11, -11, -11, -11) -movc r8.xyzw, r2.xyzw, r8.xyzw, l(21,21,21,21) -iadd r9.xyzw, -r8.xyzw, l(1, 1, 1, 1) -movc r9.xyzw, r7.xyzw, r7.xyzw, r9.xyzw -ishl r8.xyzw, r2.xyzw, r8.xyzw -and r8.xyzw, r8.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r2.xyzw, r7.xyzw, r2.xyzw, r8.xyzw -ishl r7.xyzw, r9.xyzw, l(23, 23, 23, 23) -iadd r7.xyzw, r7.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r2.xyzw, r2.xyzw, l(3, 3, 3, 3) -iadd r2.xyzw, r7.xyzw, r2.xyzw -movc r2.xyzw, r6.xyzw, r2.xyzw, l(0,0,0,0) -iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) -mov r6.xzw, r1.zzzz -mov r6.y, r2.y -store_uav_typed U0[0].xyzw, r1.xxxx, r6.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r2.zwzz -ld r1.xy, r5.yyyy, T0[0].xyzw -ld r1.zw, r5.zzzz, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw -endif -ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) -ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw -ushr r7.xyzw, r6.xyzw, l(20, 20, 20, 20) -firstbit_hi r8.xyzw, r1.xyzw -iadd r8.xyzw, r8.xyzw, l(-11, -11, -11, -11) -movc r8.xyzw, r1.xyzw, r8.xyzw, l(21,21,21,21) -iadd r9.xyzw, -r8.xyzw, l(1, 1, 1, 1) -movc r9.xyzw, r7.xyzw, r7.xyzw, r9.xyzw -ishl r8.xyzw, r1.xyzw, r8.xyzw -and r8.xyzw, r8.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r1.xyzw, r7.xyzw, r1.xyzw, r8.xyzw -ishl r7.xyzw, r9.xyzw, l(23, 23, 23, 23) -iadd r7.xyzw, r7.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -iadd r1.xyzw, r7.xyzw, r1.xyzw -movc r1.xyzw, r6.xwyz, r1.xwyz, l(0,0,0,0) -iadd r0.xy, r0.wwww, l(1, 2, 0, 0) -mov r4.xzw, r4.yyyy -mov r4.y, r1.x -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r1.zwzz -iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) -mov r1.xzw, r2.xxxx -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ld r0.xw, r5.wwww, T0[0].xzwy -if_nz r3.x - ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r1.zzzw, r1.xxxy -endif -if_nz r3.y - ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) - bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy -endif -ushr r1.xyzw, r0.xwxx, l(8, 8, 8, 8) -ubfe r2.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r0.xwxx -ushr r3.xyzw, r1.wyww, l(20, 20, 20, 20) -firstbit_hi r4.xyzw, r2.wyww -iadd r4.xyzw, r4.xyzw, l(-11, -11, -11, -11) -movc r4.xyzw, r2.wyww, r4.xyzw, l(21,21,21,21) -iadd r5.xyzw, -r4.wyww, l(1, 1, 1, 1) -movc r5.xyzw, r3.wyww, r3.wyww, r5.xyzw -ishl r4.xyzw, r2.wyww, r4.xyzw -and r4.xyzw, r4.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r2.xyzw, r3.xyzw, r2.xyzw, r4.xyzw -ishl r3.xyzw, r5.xyzw, l(23, 23, 23, 23) -iadd r3.xyzw, r3.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r2.xyzw, r2.xyzw, l(3, 3, 3, 3) -iadd r2.xyzw, r3.xyzw, r2.xyzw -movc r1.xyzw, r1.xyzw, r2.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -ret -// Approximately 253 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.cso deleted file mode 100644 index 426ac6079..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.h deleted file mode 100644 index f32f006a5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.h +++ /dev/null @@ -1,505 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_depth_float.cs.hlsl -const uint8_t texture_load_depth_float_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF1, 0xCE, 0xE6, 0xD3, 0x57, 0x7C, 0x0C, 0x0B, - 0xA4, 0xFA, 0xC4, 0xA6, 0x1C, 0x30, 0xB0, 0x14, 0x01, 0x00, 0x00, 0x00, - 0x74, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xD8, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 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-// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 7 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.x, r0.x, l(2) -imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.y, CB0[0][2].x, r0.x -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) -ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw -ushr r4.xyzw, r3.xyzw, l(20, 20, 20, 20) -firstbit_hi r5.xyzw, r1.xyzw -iadd r5.xyzw, r5.xyzw, l(-11, -11, -11, -11) -movc r5.xyzw, r1.xyzw, r5.xyzw, l(21,21,21,21) -iadd r6.xyzw, -r5.xyzw, l(1, 1, 1, 1) -movc r6.xyzw, r4.xyzw, r4.xyzw, r6.xyzw -ishl r5.xyzw, r1.xyzw, r5.xyzw -and r5.xyzw, r5.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r1.xyzw, r4.xyzw, r1.xyzw, r5.xyzw -ishl r4.xyzw, r6.xyzw, l(23, 23, 23, 23) -iadd r4.xyzw, r4.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -iadd r1.xyzw, r4.xyzw, r1.xyzw -movc r1.xyzw, r3.xyzw, r1.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -iadd r0.w, r0.y, l(1) -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r1.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -ushr r2.xyzw, r1.xyzw, l(8, 8, 8, 8) -ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw -ushr r3.xyzw, r2.xyzw, l(20, 20, 20, 20) -firstbit_hi r4.xyzw, r1.xyzw -iadd r4.xyzw, r4.xyzw, l(-11, -11, -11, -11) -movc r4.xyzw, r1.xyzw, r4.xyzw, l(21,21,21,21) -iadd r5.xyzw, -r4.xyzw, l(1, 1, 1, 1) -movc r5.xyzw, r3.xyzw, r3.xyzw, r5.xyzw -ishl r4.xyzw, r1.xyzw, r4.xyzw -and r4.xyzw, r4.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r1.xyzw, r3.xyzw, r1.xyzw, r4.xyzw -ishl r3.xyzw, r5.xyzw, l(23, 23, 23, 23) -iadd r3.xyzw, r3.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -iadd r1.xyzw, r3.xyzw, r1.xyzw -movc r1.xyzw, r2.xyzw, r1.xyzw, l(0,0,0,0) -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -ret -// Approximately 134 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.cso deleted file mode 100644 index e900cc012..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.h deleted file mode 100644 index 136b407ed..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.h +++ /dev/null @@ -1,775 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_depth_unorm_2x.cs.hlsl -const uint8_t texture_load_depth_unorm_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x6A, 0xDD, 0xEC, 0xE4, 0xF8, 0xC4, 0x68, 0x4E, - 0x75, 0xBA, 0x3B, 0x65, 0x0D, 0xB8, 0x31, 0x60, 0x01, 0x00, 0x00, 0x00, - 0x24, 0x24, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x88, 0x23, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 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0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.txt deleted file mode 100644 index ae242c8d5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.txt +++ /dev/null @@ -1,314 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(2) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].zwxy -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r4.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r5.xyzw, r4.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw - mov r3.zw, r6.xxxy - mov r2.zw, r6.zzzw -else - mov r3.zw, r5.xxxy - mov r2.zw, r5.zzzw -endif -ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) -ushr r5.xyzw, r3.xyzw, l(23, 23, 23, 23) -iadd r3.xyzw, r3.xyzw, r5.xyzw -utof r3.xyzw, r3.xyzw -mul r3.xyzw, r3.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) -ushr r3.xyzw, r2.xyzw, l(23, 23, 23, 23) -iadd r2.xyzw, r2.xyzw, r3.xyzw -utof r2.xyzw, r2.xyzw -mul r2.xyzw, r2.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r4.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -ld r4.xyzw, r4.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw - mov r5.zw, r6.xxxy - mov r3.zw, r6.zzzw -else - mov r5.zw, r4.xxxy - mov r3.zw, r4.zzzw -endif -ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) -ushr r5.xyzw, r4.xyzw, l(23, 23, 23, 23) -iadd r4.xyzw, r4.xyzw, r5.xyzw -utof r4.xyzw, r4.xyzw -mul r4.xyzw, r4.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r4.xyz, r0.zzzz, r2.xyzx -ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) -ushr r5.xyzw, r3.xyzw, l(23, 23, 23, 23) -iadd r3.xyzw, r3.xyzw, r5.xyzw -utof r3.xyzw, r3.xyzw -mul r3.xyzw, r3.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r4.xxxx, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(8) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r6.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r1.y - ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) - bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw - mov r5.zw, r7.xxxy - mov r3.zw, r7.zzzw -else - mov r5.zw, r6.xxxy - mov r3.zw, r6.zzzw -endif -ushr r5.xyzw, r5.xyzw, l(8, 8, 8, 8) -ushr r6.xyzw, r5.xyzw, l(23, 23, 23, 23) -iadd r5.xyzw, r5.xyzw, r6.xyzw -utof r5.xyzw, r5.xyzw -mul r5.xyzw, r5.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) -ushr r5.xyzw, r3.xyzw, l(23, 23, 23, 23) -iadd r3.xyzw, r3.xyzw, r5.xyzw -utof r3.xyzw, r3.xyzw -mul r3.xyzw, r3.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r4.yyyy, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy - mov r5.xy, r3.zwzz -else - mov r5.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r0.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw - mov r5.zw, r1.xxxy - mov r3.zw, r1.zzzw -else - mov r5.zw, r0.xxxy - mov r3.zw, r0.zzzw -endif -ushr r0.xyzw, r5.xyzw, l(8, 8, 8, 8) -ushr r1.xyzw, r0.xyzw, l(23, 23, 23, 23) -iadd r0.xyzw, r0.xyzw, r1.xyzw -utof r0.xyzw, r0.xyzw -mul r0.xyzw, r0.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw -ushr r0.xyzw, r3.xyzw, l(8, 8, 8, 8) -ushr r1.xyzw, r0.xyzw, l(23, 23, 23, 23) -iadd r0.xyzw, r0.xyzw, r1.xyzw -utof r0.xyzw, r0.xyzw -mul r0.xyzw, r0.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r4.zzzz, r0.xyzw -ret -// Approximately 263 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.cso deleted file mode 100644 index 59b8a24d8..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.h deleted file mode 100644 index cbfdbb996..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.h +++ /dev/null @@ -1,657 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_depth_unorm_3x.cs.hlsl -const uint8_t texture_load_depth_unorm_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x23, 0x55, 0x24, 0x93, 0x06, 0xA2, 0x74, 0x6A, - 0x45, 0xE0, 0x77, 0x64, 0x68, 0x54, 0x0C, 0x5F, 0x01, 0x00, 0x00, 0x00, - 0x94, 0x1E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xF8, 0x1D, 0x00, 0x00, 0x52, 0x44, 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a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.txt deleted file mode 100644 index 1f79de777..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.txt +++ /dev/null @@ -1,249 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(2) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) -ushr r4.xyzw, r1.xyzw, l(23, 23, 23, 23) -iadd r1.xyzw, r1.xyzw, r4.xyzw -utof r1.xyzw, r1.xyzw -mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx -ld r4.xy, r2.yyyy, T0[0].xyzw -ld r4.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r3.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) -ushr r5.xyzw, r4.xyzw, l(23, 23, 23, 23) -iadd r4.xyzw, r4.xyzw, r5.xyzw -utof r4.xyzw, r4.xyzw -mul r4.xyzw, r4.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -iadd r0.w, r0.z, r0.y -mov r5.xzw, r1.wwww -mov r5.y, r4.x -store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz -ld r2.xy, r2.wwww, T0[0].xyzw -iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r2.zw, r5.xxxx, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw -endif -ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) -ushr r6.xyzw, r2.xyzw, l(23, 23, 23, 23) -iadd r2.xyzw, r2.xyzw, r6.xyzw -utof r2.xyzw, r2.xyzw -mul r2.xyzw, r2.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) -mov r6.xzw, r1.zzzz -mov r6.y, r2.y -store_uav_typed U0[0].xyzw, r1.xxxx, r6.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r2.zwzz -ld r1.xy, r5.yyyy, T0[0].xyzw -ld r1.zw, r5.zzzz, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw -endif -ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) -ushr r6.xyzw, r1.xyzw, l(23, 23, 23, 23) -iadd r1.xyzw, r1.xyzw, r6.xyzw -utof r1.xyzw, r1.xyzw -mul r1.xyzw, r1.xwyz, l(0.000000, 0.000000, 0.000000, 0.000000) -iadd r0.xy, r0.wwww, l(1, 2, 0, 0) -mov r4.xzw, r4.yyyy -mov r4.y, r1.x -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r1.zwzz -iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) -mov r1.xzw, r2.xxxx -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ld r0.xw, r5.wwww, T0[0].xzwy -if_nz r3.x - ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r1.zzzw, r1.xxxy -endif -if_nz r3.y - ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) - bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy -endif -ushr r1.xyzw, r0.xwxx, l(8, 8, 8, 8) -ushr r2.xyzw, r1.wyww, l(23, 23, 23, 23) -iadd r1.xyzw, r1.xyzw, r2.xyzw -utof r1.xyzw, r1.xyzw -mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -ret -// Approximately 198 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.cso deleted file mode 100644 index a142dbe9d..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h deleted file mode 100644 index 22bc2ab11..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h +++ /dev/null @@ -1,428 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_depth_unorm.cs.hlsl -const uint8_t texture_load_depth_unorm_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x32, 0xB4, 0x1D, 0x17, 0x20, 0x30, 0xD5, 0x20, - 0xC0, 0x87, 0xE9, 0xDF, 0x6D, 0x55, 0x1D, 0xB3, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x13, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x40, 0x13, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.txt deleted file mode 100644 index 6e9646582..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.txt +++ /dev/null @@ -1,163 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.x, r0.x, l(2) -imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.y, CB0[0][2].x, r0.x -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) -ushr r3.xyzw, r1.xyzw, l(23, 23, 23, 23) -iadd r1.xyzw, r1.xyzw, r3.xyzw -utof r1.xyzw, r1.xyzw -mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -iadd r0.w, r0.y, l(1) -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r1.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw -endif -ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) -ushr r2.xyzw, r1.xyzw, l(23, 23, 23, 23) -iadd r1.xyzw, r1.xyzw, r2.xyzw -utof r1.xyzw, r1.xyzw -mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -ret -// Approximately 112 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.cso deleted file mode 100644 index 3fe915d18..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.h deleted file mode 100644 index 51f63aa5d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.h +++ /dev/null @@ -1,2299 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxn_rg8.cs.hlsl -const uint8_t texture_load_dxn_rg8_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xDD, 0xCE, 0xB9, 0x8D, 0xB8, 0xF9, 0x58, 0x91, - 0xE0, 0x96, 0xA0, 0x4D, 0x09, 0x1D, 0xD1, 0xBC, 0x01, 0x00, 0x00, 0x00, - 0x8C, 0x6B, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xF0, 0x6A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 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0x00, - 0x3C, 0x00, 0x00, 0x07, 0xC2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x06, 0x0C, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x15, 0x00, 0x00, 0x01, 0x15, 0x00, 0x00, 0x01, 0x15, 0x00, 0x00, 0x01, - 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0xBE, 0x02, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x01, 0x00, 0x00, - 0x07, 0x01, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.txt deleted file mode 100644 index c2439f34c..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.txt +++ /dev/null @@ -1,753 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 19 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(12) - and r1.w, r1.w, l(0x00006000) - bfi r1.w, l(3), l(10), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r1.w, vThreadID.y, l(7) - and r2.xz, r1.wwww, l(1792, 0, 2048, 0) - bfi r1.w, l(3), l(5), r0.x, r2.x - bfi r1.w, l(21), l(11), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(4) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz -endif -if_nz r1.y - ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r4.xyzw, r0.xxxx, T0[0].ywxz -if_nz r1.x - ishl r5.xyzw, r4.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.zxwy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.ywxz, r6.ywxz -endif -if_nz r1.y - ushr r1.xyzw, r4.zxwy, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.ywxz - mov r2.zw, r4.xxxy -else - mov r2.zw, r4.xxxy -endif -ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) -and r1.xyzw, r3.xzyw, l(255, 255, 255, 255) -ushr r4.xy, r4.zwzz, l(8, 8, 0, 0) -and r5.xyzw, r4.zxwy, l(255, 255, 255, 255) -mov r4.xy, r3.xyxx -ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) -bfi r4.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, l(0, 0, 0, 0) -iadd r3.xyzw, r3.xyzw, r4.xyzw -uge r0.xw, r1.yyyw, r1.xxxz -ushr r4.xyzw, r3.xxyy, l(1, 2, 1, 2) -and r6.xy, r3.xyxx, r4.xzxx -and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) -ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) -ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -iadd r6.xy, r6.xyxx, r7.xyxx -and r7.xyzw, r3.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) -iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) -and r6.zw, r6.xxxy, r8.xxxy -or r8.xy, r3.xyxx, r4.xzxx -and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) -or r4.xy, r4.ywyy, r8.xyxx -and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) -xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) -not r9.xyzw, r9.xyzw -and r10.xyzw, r7.xxyy, r9.xxzz -and r9.xyzw, r9.yyww, r10.xyzw -or r3.xy, r3.xyxx, r4.xyxx -iadd r3.xy, r3.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) -or r3.xy, r9.xwxx, r3.xyxx -ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) -or r7.xy, r3.xyxx, r4.xzxx -not r6.xy, r6.xyxx -and r6.xy, r6.xyxx, r7.xyxx -or r6.xy, r6.zwzz, r6.xyxx -iadd r4.xy, r4.ywyy, r4.xzxx -or r3.xy, r3.xyxx, r4.xyxx -movc r4.xy, r0.xwxx, r6.xyxx, r3.xyxx -uge r3.xy, r5.ywyy, r5.xzxx -ushr r6.xyzw, r3.zzww, l(1, 2, 1, 2) -and r7.xy, r3.zwzz, r6.xzxx -and r7.xy, r7.xyxx, l(0x00492492, 0x00492492, 0, 0) -ishl r8.xy, r7.xyxx, l(1, 1, 0, 0) -ushr r9.xy, r7.xyxx, l(1, 1, 0, 0) -iadd r7.xy, r7.xyxx, r8.xyxx -iadd r7.xy, r7.xyxx, r9.xyxx -and r8.xy, r7.xyxx, r8.zwzz -or r8.zw, r3.zzzw, r6.xxxz -and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) -or r6.xy, r6.ywyy, r8.zwzz -and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) -xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) -not r9.xyzw, r9.xyzw -and r10.xyzw, r7.zzww, r9.xxzz -and r9.xyzw, r9.yyww, r10.xyzw -or r3.zw, r3.zzzw, r6.xxxy -iadd r3.zw, r3.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) -or r3.zw, r9.yyyw, r3.zzzw -ishl r6.xyzw, r9.xyzw, l(2, 1, 2, 1) -or r7.zw, r3.zzzw, r6.xxxz -not r7.xy, r7.xyxx -and r7.xy, r7.xyxx, r7.zwzz -or r7.xy, r8.xyxx, r7.xyxx -iadd r6.xy, r6.ywyy, r6.xzxx -or r3.zw, r3.zzzw, r6.xxxy -movc r4.zw, r3.xxxy, r7.xxxy, r3.zzzw -ushr r3.zw, r4.xxxy, l(0, 0, 1, 1) -and r3.zw, r4.xxxy, r3.zzzw -and r3.zw, r3.zzzw, l(0, 0, 1170, 1170) -ishl r6.xy, r3.zwzz, l(1, 1, 0, 0) -ushr r6.zw, r3.zzzw, l(0, 0, 1, 1) -iadd r3.zw, r3.zzzw, r6.xxxy -iadd r3.zw, r3.zzzw, r6.zzzw -not r6.xyzw, r3.zzzw -and r7.xyzw, r4.xxxy, r6.zzzw -iadd r8.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) -and r6.xyzw, r6.xyzw, r8.xyzw -and r8.xy, r6.zwzz, l(7, 7, 0, 0) -and r8.zw, r7.zzzw, l(0, 0, 7, 7) -imul null, r8.zw, r1.yyyw, r8.zzzw -imad r8.xy, r1.xzxx, r8.xyxx, r8.zwzz -udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) -ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw -ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw -imul null, r10.xyzw, r1.yyyw, r10.xyzw -imad r9.xyzw, r1.xxxz, r9.xyzw, r10.xyzw -udiv r9.xyzw, null, r9.xyzw, l(5, 5, 5, 5) -imad r8.xy, r9.xwxx, l(0x00010000, 0x00010000, 0, 0), r8.xyxx -imad r8.z, r9.z, l(0x00010000), r9.y -and r3.zw, r3.zzzw, r4.xxxy -ishl r9.xyzw, r3.zzww, l(13, 7, 13, 7) -and r9.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) -bfi r10.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r3.zwzz, r9.xzxx -ubfe r3.zw, l(0, 0, 1, 1), l(0, 0, 6, 6), r3.zzzw -iadd r10.zw, r9.yyyw, r3.zzzw -imad r3.zw, r10.xxxz, l(0, 0, 255, 255), r8.xxxz -not r9.xyzw, r4.xxxy -and r6.xy, r9.zwzz, l(7, 7, 0, 0) -and r11.xyzw, r4.xyzw, l(7, 7, 7, 7) -imul null, r7.xy, r1.ywyy, r11.xyxx -imad r6.xy, r1.xzxx, r6.xyxx, r7.xyxx -udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) -ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw -ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy -imul null, r13.xyzw, r1.yyyw, r13.xyzw -imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw -udiv r12.xyzw, null, r12.xyzw, l(7, 7, 7, 7) -imad r13.xy, r12.xwxx, l(0x00010000, 0x00010000, 0, 0), r6.xyxx -imad r13.z, r12.z, l(0x00010000), r12.y -movc r3.zw, r0.xxxx, r3.zzzw, r13.xxxz -ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r6.wwww -ubfe r6.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r7.wwww -imul null, r6.zw, r1.wwww, r6.zzzw -imad r6.xy, r1.zzzz, r6.xyxx, r6.zwzz -udiv r6.xy, null, r6.xyxx, l(5, 5, 0, 0) -imad r8.w, r6.y, l(0x00010000), r6.x -imad r6.xy, r10.ywyy, l(255, 255, 0, 0), r8.ywyy -ubfe r6.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r9.wwww -ubfe r7.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww -imul null, r7.xy, r1.wwww, r7.xyxx -imad r6.zw, r1.zzzz, r6.zzzw, r7.xxxy -udiv r6.zw, null, r6.zzzw, l(0, 0, 7, 7) -imad r13.w, r6.w, l(0x00010000), r6.z -movc r6.xy, r0.wwww, r6.xyxx, r13.ywyy -ishl r6.xy, r6.xyxx, l(8, 8, 0, 0) -or r6.xy, r3.zwzz, r6.xyxx -ushr r3.zw, r4.zzzw, l(0, 0, 1, 1) -and r3.zw, r4.zzzw, r3.zzzw -and r3.zw, r3.zzzw, l(0, 0, 1170, 1170) -ishl r7.xy, r3.zwzz, l(1, 1, 0, 0) -ushr r8.xy, r3.zwzz, l(1, 1, 0, 0) -iadd r3.zw, r3.zzzw, r7.xxxy -iadd r3.zw, r3.zzzw, r8.xxxy -not r8.xyzw, r3.zzzw -and r9.xyzw, r4.zzzw, r8.zzzw -iadd r10.xyzw, -r9.zzzw, l(2925, 2925, 2925, 2925) -and r8.xyzw, r8.xyzw, r10.xyzw -and r7.xy, r8.zwzz, l(7, 7, 0, 0) -and r10.xy, r9.zwzz, l(7, 7, 0, 0) -imul null, r10.xy, r5.ywyy, r10.xyxx -imad r7.xy, r5.xzxx, r7.xyxx, r10.xyxx -udiv r7.xy, null, r7.xyxx, l(5, 5, 0, 0) -ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw -ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw -imul null, r12.xyzw, r5.yyyw, r12.xyzw -imad r10.xyzw, r5.xxxz, r10.xyzw, r12.xyzw -udiv r10.xyzw, null, r10.xyzw, l(5, 5, 5, 5) -imad r12.xy, r10.xwxx, l(0x00010000, 0x00010000, 0, 0), r7.xyxx -imad r12.z, r10.z, l(0x00010000), r10.y -and r3.zw, r3.zzzw, r4.zzzw -ishl r10.xyzw, r3.zzww, l(13, 7, 13, 7) -and r10.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) -bfi r13.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r3.zwzz, r10.xzxx -ubfe r3.zw, l(0, 0, 1, 1), l(0, 0, 6, 6), r3.zzzw -iadd r13.zw, r10.yyyw, r3.zzzw -imad r3.zw, r13.xxxz, l(0, 0, 255, 255), r12.xxxz -not r10.xyzw, r4.zzzw -and r7.xy, r10.zwzz, l(7, 7, 0, 0) -imul null, r8.xy, r5.ywyy, r11.zwzz -imad r7.xy, r5.xzxx, r7.xyxx, r8.xyxx -udiv r7.xy, null, r7.xyxx, l(7, 7, 0, 0) -ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r10.xyzw -ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw -imul null, r14.xyzw, r5.yyyw, r14.xyzw -imad r11.xyzw, r5.xxxz, r11.xyzw, r14.xyzw -udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) -imad r14.xy, r11.xwxx, l(0x00010000, 0x00010000, 0, 0), r7.xyxx -imad r14.z, r11.z, l(0x00010000), r11.y -movc r3.zw, r3.xxxx, r3.zzzw, r14.xxxz -ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r8.wwww -ubfe r8.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww -imul null, r8.xy, r5.wwww, r8.xyxx -imad r7.xy, r5.zzzz, r7.xyxx, r8.xyxx -udiv r7.xy, null, r7.xyxx, l(5, 5, 0, 0) -imad r12.w, r7.y, l(0x00010000), r7.x -imad r7.xy, r13.ywyy, l(255, 255, 0, 0), r12.ywyy -ubfe r8.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r10.wwww -imul null, r7.zw, r5.wwww, r7.zzzw -imad r7.zw, r5.zzzz, r8.xxxy, r7.zzzw -udiv r7.zw, null, r7.zzzw, l(0, 0, 7, 7) -imad r14.w, r7.w, l(0x00010000), r7.z -movc r7.xy, r3.yyyy, r7.xyxx, r14.ywyy -ishl r7.xy, r7.xyxx, l(8, 8, 0, 0) -or r6.zw, r3.zzzw, r7.xxxy -store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw -imad r3.z, vThreadID.y, l(4), l(1) -ilt r3.w, r3.z, CB0[0][2].y -if_nz r3.w - iadd r0.y, r0.z, r0.y - ushr r6.xyzw, r4.xyzw, l(12, 12, 12, 12) - ushr r7.xyzw, r6.xyzw, l(1, 1, 1, 1) - and r7.xyzw, r6.xyzw, r7.xyzw - and r7.xyzw, r7.xyzw, l(1170, 1170, 1170, 1170) - ishl r8.xyzw, r7.xyzw, l(1, 1, 1, 1) - ushr r9.xyzw, r7.xyzw, l(1, 1, 1, 1) - iadd r7.xyzw, r7.xyzw, r8.xyzw - iadd r7.xyzw, r7.xyzw, r9.xyzw - not r8.xyzw, r7.xyzw - and r9.xyzw, r6.xyzw, r8.xyzw - iadd r10.xyzw, -r9.xyzw, l(2925, 2925, 2925, 2925) - and r8.xyzw, r8.xyzw, r10.xyzw - and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) - and r11.xyzw, r9.xyzw, l(7, 7, 7, 7) - imul null, r11.xy, r1.ywyy, r11.xyxx - imad r10.xy, r1.xzxx, r10.xyxx, r11.xyxx - udiv r10.xy, null, r10.xyxx, l(5, 5, 0, 0) - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy - ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xxxy - imul null, r13.xyzw, r1.yyyw, r13.xyzw - imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw - udiv r12.xyzw, null, r12.xyzw, l(5, 5, 5, 5) - imad r13.xy, r12.xwxx, l(0x00010000, 0x00010000, 0, 0), r10.xyxx - imad r13.z, r12.z, l(0x00010000), r12.y - and r7.xyzw, r6.xyzw, r7.xyzw - ishl r12.xyzw, r7.xxyy, l(13, 7, 13, 7) - and r12.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) - bfi r14.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r7.xyxx, r12.xzxx - ubfe r15.xyzw, l(1, 1, 1, 1), l(6, 6, 6, 6), r7.xyzw - iadd r14.zw, r12.yyyw, r15.xxxy - imad r7.xy, r14.xzxx, l(255, 255, 0, 0), r13.xzxx - not r6.xyzw, r6.xyzw - and r12.xyzw, r6.xyzw, l(7, 7, 7, 7) - ubfe r16.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx - imul null, r16.xyzw, r1.yyyy, r16.xyzw - imad r3.w, r1.x, r12.x, r16.x - udiv r3.w, null, r3.w, l(7) - ubfe r17.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xxxy - imad r16.xyz, r1.xxxx, r17.xyzx, r16.yzwy - udiv r16.xyz, null, r16.xyzx, l(7, 7, 7, 0) - imad r10.x, r16.x, l(0x00010000), r3.w - imad r10.y, r16.z, l(0x00010000), r16.y - movc r7.xy, r0.xxxx, r7.xyxx, r10.xyxx - ubfe r16.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz - ubfe r18.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r9.yyzz - imul null, r8.xy, r1.wwww, r18.xyxx - imad r8.xy, r1.zzzz, r16.xyxx, r8.xyxx - udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) - imad r13.w, r8.y, l(0x00010000), r8.x - imad r8.xy, r14.ywyy, l(255, 255, 0, 0), r13.ywyy - ubfe r13.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy - imul null, r13.xyzw, r1.wwww, r13.xyzw - imad r3.w, r1.z, r12.y, r13.x - udiv r3.w, null, r3.w, l(7) - imad r4.x, r1.z, r17.w, r13.y - udiv r4.x, null, r4.x, l(7) - imad r4.x, r4.x, l(0x00010000), r3.w - ubfe r14.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r6.yyzz - imad r6.xy, r1.zzzz, r14.xyxx, r13.zwzz - udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) - imad r4.y, r6.y, l(0x00010000), r6.x - movc r4.xy, r0.wwww, r8.xyxx, r4.xyxx - ishl r4.xy, r4.xyxx, l(8, 8, 0, 0) - or r13.xy, r4.xyxx, r7.xyxx - imul null, r4.xy, r5.ywyy, r11.zwzz - imad r4.xy, r5.xzxx, r10.zwzz, r4.xyxx - udiv r4.xy, null, r4.xyxx, l(5, 5, 0, 0) - imul null, r6.xy, r5.yyyy, r18.zwzz - imad r6.xy, r5.xxxx, r16.zwzz, r6.xyxx - udiv r6.xy, null, r6.xyxx, l(5, 5, 0, 0) - imad r10.z, r6.x, l(0x00010000), r4.x - ubfe r8.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww - ubfe r9.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r9.zwww - imul null, r9.xyzw, r5.ywww, r9.xyzw - imad r8.xyzw, r5.xzzz, r8.xyzw, r9.xyzw - udiv r8.xyzw, null, r8.xyzw, l(5, 5, 5, 5) - imad r10.w, r8.x, l(0x00010000), r6.y - ishl r9.xyzw, r7.zzww, l(13, 7, 13, 7) - and r9.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) - bfi r7.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r7.zwzz, r9.xzxx - iadd r7.zw, r9.yyyw, r15.zzzw - imad r6.xy, r7.xzxx, l(255, 255, 0, 0), r10.zwzz - ubfe r9.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz - imul null, r9.xyzw, r5.yyyy, r9.xyzw - imad r3.w, r5.x, r12.z, r9.x - udiv r3.w, null, r3.w, l(7) - imad r4.xz, r5.xxxx, r14.zzwz, r9.yyzy - udiv r4.xz, null, r4.xxzx, l(7, 0, 7, 0) - imad r10.z, r4.x, l(0x00010000), r3.w - ubfe r11.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r6.zwww - imad r3.w, r5.x, r11.x, r9.w - udiv r3.w, null, r3.w, l(7) - imad r10.w, r3.w, l(0x00010000), r4.z - movc r4.xz, r3.xxxx, r6.xxyx, r10.zzwz - imad r6.z, r8.y, l(0x00010000), r4.y - imad r6.w, r8.w, l(0x00010000), r8.z - imad r6.xy, r7.ywyy, l(255, 255, 0, 0), r6.zwzz - ubfe r7.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww - imul null, r7.xyzw, r5.wwww, r7.xyzw - imad r3.w, r5.z, r12.w, r7.x - udiv r3.w, null, r3.w, l(7) - imad r7.xyz, r5.zzzz, r11.yzwy, r7.yzwy - udiv r7.xyz, null, r7.xyzx, l(7, 7, 7, 0) - imad r6.z, r7.x, l(0x00010000), r3.w - imad r6.w, r7.z, l(0x00010000), r7.y - movc r4.yw, r3.yyyy, r6.xxxy, r6.zzzw - ishl r4.yw, r4.yyyw, l(0, 8, 0, 8) - or r13.zw, r4.yyyw, r4.xxxz - store_uav_typed U0[0].xyzw, r0.yyyy, r13.xyzw - iadd r3.z, r3.z, l(1) - ilt r3.w, r3.z, CB0[0][2].y - if_nz r3.w - iadd r0.y, r0.z, r0.y - ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) - ushr r4.xyzw, r2.xxyy, l(1, 2, 1, 2) - and r6.xy, r2.xyxx, r4.xzxx - and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) - ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) - ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) - iadd r6.xy, r6.xyxx, r6.zwzz - iadd r6.xy, r6.xyxx, r7.xyxx - and r7.xyzw, r2.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) - iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) - and r6.zw, r6.xxxy, r8.xxxy - or r8.xy, r2.xyxx, r4.xzxx - and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) - or r4.xy, r4.ywyy, r8.xyxx - and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) - xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) - not r9.xyzw, r9.xyzw - and r10.xyzw, r7.xxyy, r9.xxzz - and r9.xyzw, r9.yyww, r10.xyzw - or r2.xy, r2.xyxx, r4.xyxx - iadd r2.xy, r2.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) - or r2.xy, r9.xwxx, r2.xyxx - ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) - or r7.xy, r2.xyxx, r4.xzxx - not r6.xy, r6.xyxx - and r6.xy, r6.xyxx, r7.xyxx - or r6.xy, r6.zwzz, r6.xyxx - iadd r4.xy, r4.ywyy, r4.xzxx - or r2.xy, r2.xyxx, r4.xyxx - movc r4.xy, r0.xwxx, r6.xyxx, r2.xyxx - ushr r6.xyzw, r2.zzww, l(1, 2, 1, 2) - and r2.xy, r2.zwzz, r6.xzxx - and r2.xy, r2.xyxx, l(0x00492492, 0x00492492, 0, 0) - ishl r7.xy, r2.xyxx, l(1, 1, 0, 0) - ushr r8.xy, r2.xyxx, l(1, 1, 0, 0) - iadd r2.xy, r2.xyxx, r7.xyxx - iadd r2.xy, r2.xyxx, r8.xyxx - and r7.xy, r2.xyxx, r8.zwzz - or r8.xy, r2.zwzz, r6.xzxx - and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) - or r6.xy, r6.ywyy, r8.xyxx - and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) - xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) - not r8.xyzw, r9.xyzw - and r9.xyzw, r7.zzww, r8.xxzz - and r8.xyzw, r8.yyww, r9.xyzw - or r2.zw, r2.zzzw, r6.xxxy - iadd r2.zw, r2.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) - or r2.zw, r8.yyyw, r2.zzzw - ishl r6.xyzw, r8.xyzw, l(2, 1, 2, 1) - or r7.zw, r2.zzzw, r6.xxxz - not r2.xy, r2.xyxx - and r2.xy, r2.xyxx, r7.zwzz - or r2.xy, r7.xyxx, r2.xyxx - iadd r6.xy, r6.ywyy, r6.xzxx - or r2.zw, r2.zzzw, r6.xxxy - movc r4.zw, r3.xxxy, r2.xxxy, r2.zzzw - ushr r2.xy, r4.xyxx, l(1, 1, 0, 0) - and r2.xy, r4.xyxx, r2.xyxx - and r2.xy, r2.xyxx, l(1170, 1170, 0, 0) - ishl r2.zw, r2.xxxy, l(0, 0, 1, 1) - ushr r6.xy, r2.xyxx, l(1, 1, 0, 0) - iadd r2.xy, r2.xyxx, r2.zwzz - iadd r2.xy, r2.xyxx, r6.xyxx - not r6.xyzw, r2.xxxy - and r7.xyzw, r4.xxxy, r6.zzzw - iadd r8.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) - and r6.xyzw, r6.xyzw, r8.xyzw - and r2.zw, r6.zzzw, l(0, 0, 7, 7) - and r8.xy, r7.zwzz, l(7, 7, 0, 0) - imul null, r8.xy, r1.ywyy, r8.xyxx - imad r2.zw, r1.xxxz, r2.zzzw, r8.xxxy - udiv r2.zw, null, r2.zzzw, l(0, 0, 5, 5) - ubfe r8.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw - ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw - imul null, r9.xyzw, r1.yyyw, r9.xyzw - imad r8.xyzw, r1.xxxz, r8.xyzw, r9.xyzw - udiv r8.xyzw, null, r8.xyzw, l(5, 5, 5, 5) - imad r9.xy, r8.xwxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz - imad r9.z, r8.z, l(0x00010000), r8.y - and r2.xy, r2.xyxx, r4.xyxx - ishl r8.xyzw, r2.xxyy, l(13, 7, 13, 7) - and r8.xyzw, r8.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) - bfi r10.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r2.xyxx, r8.xzxx - ubfe r2.xy, l(1, 1, 0, 0), l(6, 6, 0, 0), r2.xyxx - iadd r10.zw, r8.yyyw, r2.xxxy - imad r2.xy, r10.xzxx, l(255, 255, 0, 0), r9.xzxx - not r8.xyzw, r4.xxxy - and r2.zw, r8.zzzw, l(0, 0, 7, 7) - and r11.xyzw, r4.xyzw, l(7, 7, 7, 7) - imul null, r6.xy, r1.ywyy, r11.xyxx - imad r2.zw, r1.xxxz, r2.zzzw, r6.xxxy - udiv r2.zw, null, r2.zzzw, l(0, 0, 7, 7) - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw - ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy - imul null, r13.xyzw, r1.yyyw, r13.xyzw - imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw - udiv r12.xyzw, null, r12.xyzw, l(7, 7, 7, 7) - imad r13.xy, r12.xwxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz - imad r13.z, r12.z, l(0x00010000), r12.y - ubfe r2.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r6.wwww - ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r7.wwww - imul null, r6.xy, r1.wwww, r6.xyxx - imad r2.zw, r1.zzzz, r2.zzzw, r6.xxxy - udiv r2.zw, null, r2.zzzw, l(0, 0, 5, 5) - imad r9.w, r2.w, l(0x00010000), r2.z - imad r2.zw, r10.yyyw, l(0, 0, 255, 255), r9.yyyw - ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r8.wwww - ubfe r7.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww - imul null, r6.zw, r1.wwww, r7.xxxy - imad r6.xy, r1.zzzz, r6.xyxx, r6.zwzz - udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) - imad r13.w, r6.y, l(0x00010000), r6.x - movc r2.xyzw, r0.xxww, r2.xyzw, r13.xzyw - ishl r2.zw, r2.zzzw, l(0, 0, 8, 8) - or r2.xy, r2.zwzz, r2.xyxx - ushr r6.xy, r4.zwzz, l(1, 1, 0, 0) - and r6.xy, r4.zwzz, r6.xyxx - and r6.xy, r6.xyxx, l(1170, 1170, 0, 0) - ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) - ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) - iadd r6.xy, r6.xyxx, r6.zwzz - iadd r6.xy, r6.xyxx, r7.xyxx - not r8.xyzw, r6.xxxy - and r9.xyzw, r4.zzzw, r8.zzzw - iadd r10.xyzw, -r9.zzzw, l(2925, 2925, 2925, 2925) - and r8.xyzw, r8.xyzw, r10.xyzw - and r6.zw, r8.zzzw, l(0, 0, 7, 7) - and r7.xy, r9.zwzz, l(7, 7, 0, 0) - imul null, r7.xyzw, r5.ywww, r7.xyzw - imad r6.zw, r5.xxxz, r6.zzzw, r7.xxxy - udiv r6.zw, null, r6.zzzw, l(0, 0, 5, 5) - ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw - imul null, r12.xyzw, r5.yyyw, r12.xyzw - imad r10.xyzw, r5.xxxz, r10.xyzw, r12.xyzw - udiv r10.xyzw, null, r10.xyzw, l(5, 5, 5, 5) - imad r12.xy, r10.xwxx, l(0x00010000, 0x00010000, 0, 0), r6.zwzz - imad r12.z, r10.z, l(0x00010000), r10.y - and r6.xy, r4.zwzz, r6.xyxx - ishl r10.xyzw, r6.xxyy, l(13, 7, 13, 7) - and r10.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) - bfi r13.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.xyxx, r10.xzxx - ubfe r6.xy, l(1, 1, 0, 0), l(6, 6, 0, 0), r6.xyxx - iadd r13.zw, r10.yyyw, r6.xxxy - imad r6.xy, r13.xzxx, l(255, 255, 0, 0), r12.xzxx - not r10.xyzw, r4.zzzw - and r6.zw, r10.zzzw, l(0, 0, 7, 7) - imul null, r7.xy, r5.ywyy, r11.zwzz - imad r6.zw, r5.xxxz, r6.zzzw, r7.xxxy - udiv r6.zw, null, r6.zzzw, l(0, 0, 7, 7) - ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r10.xyzw - ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw - imul null, r14.xyzw, r5.yyyw, r14.xyzw - imad r11.xyzw, r5.xxxz, r11.xyzw, r14.xyzw - udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) - imad r14.xy, r11.xwxx, l(0x00010000, 0x00010000, 0, 0), r6.zwzz - imad r14.z, r11.z, l(0x00010000), r11.y - ubfe r6.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r8.wwww - ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww - imul null, r7.xy, r5.wwww, r7.xyxx - imad r6.zw, r5.zzzz, r6.zzzw, r7.xxxy - udiv r6.zw, null, r6.zzzw, l(0, 0, 5, 5) - imad r12.w, r6.w, l(0x00010000), r6.z - imad r6.zw, r13.yyyw, l(0, 0, 255, 255), r12.yyyw - ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r10.wwww - imad r7.xy, r5.zzzz, r7.xyxx, r7.zwzz - udiv r7.xy, null, r7.xyxx, l(7, 7, 0, 0) - imad r14.w, r7.y, l(0x00010000), r7.x - movc r6.xyzw, r3.xxyy, r6.xyzw, r14.xzyw - ishl r6.zw, r6.zzzw, l(0, 0, 8, 8) - or r2.zw, r6.zzzw, r6.xxxy - store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw - or r2.x, r3.z, l(3) - ilt r2.x, r2.x, CB0[0][2].y - if_nz r2.x - iadd r0.y, r0.z, r0.y - ushr r2.xyzw, r4.xyzw, l(12, 12, 12, 12) - ushr r6.xyzw, r2.xyzw, l(1, 1, 1, 1) - and r6.xyzw, r2.xyzw, r6.xyzw - and r6.xyzw, r6.xyzw, l(1170, 1170, 1170, 1170) - ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) - ushr r8.xyzw, r6.xyzw, l(1, 1, 1, 1) - iadd r6.xyzw, r6.xyzw, r7.xyzw - iadd r6.xyzw, r6.xyzw, r8.xyzw - not r7.xyzw, r6.xyzw - and r8.xyzw, r2.xyzw, r7.xyzw - iadd r9.xyzw, -r8.xyzw, l(2925, 2925, 2925, 2925) - and r7.xyzw, r7.xyzw, r9.xyzw - and r9.xyzw, r7.xyzw, l(7, 7, 7, 7) - and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) - imul null, r3.zw, r1.yyyw, r10.xxxy - imad r3.zw, r1.xxxz, r9.xxxy, r3.zzzw - udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) - ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xxxy - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy - imul null, r12.xyzw, r1.yyyw, r12.xyzw - imad r11.xyzw, r1.xxxz, r11.xyzw, r12.xyzw - udiv r11.xyzw, null, r11.xyzw, l(5, 5, 5, 5) - imad r12.xy, r11.xwxx, l(0x00010000, 0x00010000, 0, 0), r3.zwzz - imad r12.z, r11.z, l(0x00010000), r11.y - and r6.xyzw, r2.xyzw, r6.xyzw - ishl r11.xyzw, r6.xxyy, l(13, 7, 13, 7) - and r11.xyzw, r11.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) - bfi r13.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.xyxx, r11.xzxx - ubfe r14.xyzw, l(1, 1, 1, 1), l(6, 6, 6, 6), r6.xyzw - iadd r13.zw, r11.yyyw, r14.xxxy - imad r3.zw, r13.xxxz, l(0, 0, 255, 255), r12.xxxz - not r2.xyzw, r2.xyzw - and r11.xyzw, r2.xyzw, l(7, 7, 7, 7) - ubfe r15.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx - imul null, r15.xyzw, r1.yyyy, r15.xyzw - imad r0.z, r1.x, r11.x, r15.x - udiv r0.z, null, r0.z, l(7) - ubfe r16.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r2.xxxy - imad r15.xyz, r1.xxxx, r16.xyzx, r15.yzwy - udiv r15.xyz, null, r15.xyzx, l(7, 7, 7, 0) - imad r1.x, r15.x, l(0x00010000), r0.z - imad r1.y, r15.z, l(0x00010000), r15.y - movc r0.xz, r0.xxxx, r3.zzwz, r1.xxyx - ubfe r15.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r7.yyzz - ubfe r17.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz - imul null, r1.xy, r1.wwww, r17.xyxx - imad r1.xy, r1.zzzz, r15.xyxx, r1.xyxx - udiv r1.xy, null, r1.xyxx, l(5, 5, 0, 0) - imad r12.w, r1.y, l(0x00010000), r1.x - imad r1.xy, r13.ywyy, l(255, 255, 0, 0), r12.ywyy - ubfe r12.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy - imul null, r12.xyzw, r1.wwww, r12.xyzw - imad r1.w, r1.z, r11.y, r12.x - udiv r1.w, null, r1.w, l(7) - imad r2.x, r1.z, r16.w, r12.y - udiv r2.x, null, r2.x, l(7) - imad r4.x, r2.x, l(0x00010000), r1.w - ubfe r13.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r2.yyzz - imad r1.zw, r1.zzzz, r13.xxxy, r12.zzzw - udiv r1.zw, null, r1.zzzw, l(0, 0, 7, 7) - imad r4.y, r1.w, l(0x00010000), r1.z - movc r1.xy, r0.wwww, r1.xyxx, r4.xyxx - ishl r1.xy, r1.xyxx, l(8, 8, 0, 0) - or r1.xy, r0.xzxx, r1.xyxx - imul null, r0.xz, r5.yywy, r10.zzwz - imad r0.xz, r5.xxzx, r9.zzwz, r0.xxzx - udiv r0.xz, null, r0.xxzx, l(5, 0, 5, 0) - imul null, r2.xy, r5.yyyy, r17.zwzz - imad r2.xy, r5.xxxx, r15.zwzz, r2.xyxx - udiv r2.xy, null, r2.xyxx, l(5, 5, 0, 0) - imad r3.z, r2.x, l(0x00010000), r0.x - ubfe r7.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r7.zwww - ubfe r8.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww - imul null, r8.xyzw, r5.ywww, r8.xyzw - imad r7.xyzw, r5.xzzz, r7.xyzw, r8.xyzw - udiv r7.xyzw, null, r7.xyzw, l(5, 5, 5, 5) - imad r3.w, r7.x, l(0x00010000), r2.y - ishl r8.xyzw, r6.zzww, l(13, 7, 13, 7) - and r8.xyzw, r8.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) - bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.zwzz, r8.xzxx - iadd r6.zw, r8.yyyw, r14.zzzw - imad r0.xw, r6.xxxz, l(255, 0, 0, 255), r3.zzzw - ubfe r8.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz - imul null, r8.xyzw, r5.yyyy, r8.xyzw - imad r2.x, r5.x, r11.z, r8.x - udiv r2.x, null, r2.x, l(7) - imad r3.zw, r5.xxxx, r13.zzzw, r8.yyyz - udiv r3.zw, null, r3.zzzw, l(0, 0, 7, 7) - imad r9.z, r3.z, l(0x00010000), r2.x - ubfe r2.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r2.zwww - imad r2.x, r5.x, r2.x, r8.w - udiv r2.x, null, r2.x, l(7) - imad r9.w, r2.x, l(0x00010000), r3.w - movc r0.xw, r3.xxxx, r0.xxxw, r9.zzzw - imad r3.z, r7.y, l(0x00010000), r0.z - imad r3.w, r7.w, l(0x00010000), r7.z - imad r3.xz, r6.yywy, l(255, 0, 255, 0), r3.zzwz - ubfe r4.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww - imul null, r4.xyzw, r4.xyzw, r5.wwww - imad r0.z, r5.z, r11.w, r4.x - udiv r0.z, null, r0.z, l(7) - imad r2.xyz, r5.zzzz, r2.yzwy, r4.yzwy - udiv r2.xyz, null, r2.xyzx, l(7, 7, 7, 0) - imad r4.z, r2.x, l(0x00010000), r0.z - imad r4.w, r2.z, l(0x00010000), r2.y - movc r2.xy, r3.yyyy, r3.xzxx, r4.zwzz - ishl r2.xy, r2.xyxx, l(8, 8, 0, 0) - or r1.zw, r0.xxxw, r2.xxxy - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - endif - endif -endif -ret -// Approximately 702 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.cso deleted file mode 100644 index 451552c29..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.h deleted file mode 100644 index 4ab447d86..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.h +++ /dev/null @@ -1,2975 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxt1_rgba8.cs.hlsl -const uint8_t texture_load_dxt1_rgba8_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x0C, 0xC5, 0xEF, 0xC2, 0x26, 0x7A, 0x07, 0xC3, - 0x79, 0x7C, 0x5B, 0x0D, 0xDB, 0x3E, 0xE9, 0xDD, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x8B, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 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index 4b5c5b705..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.txt +++ /dev/null @@ -1,961 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 16 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -ishl r0.y, r0.y, l(2) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xyzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw - mov r3.xy, r2.ywyy -else - mov r3.xy, r2.ywyy -endif -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r4.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw - mov r3.zw, r4.yyyw -else - mov r3.zw, r4.yyyw -endif -ishl r1.xyz, r2.xxxx, l(3, 7, 12, 0) -ushr r5.xyz, r2.xxxx, l(13, 4, 9, 0) -mov r1.w, r5.x -and r0.xw, r1.xxxw, l(248, 0, 0, 248) -mov r5.xw, r1.zzzy -and r1.xy, r5.wzww, l(0x0003f000, 0x0003f000, 0, 0) -iadd r0.xw, r0.xxxw, r1.xxxy -and r1.xy, r5.xyxx, l(0x0f800000, 0x0f800000, 0, 0) -iadd r0.xw, r0.xxxw, r1.xxxy -ushr r1.xy, r0.xwxx, l(5, 5, 0, 0) -and r1.xy, r1.xyxx, l(0x00700007, 0x00700007, 0, 0) -iadd r0.xw, r0.xxxw, r1.xxxy -ushr r1.xy, r0.xwxx, l(6, 6, 0, 0) -and r1.xy, r1.xyxx, l(3072, 3072, 0, 0) -iadd r0.xw, r0.xxxw, r1.xxxy -ishl r1.xyz, r2.zzzz, l(3, 7, 12, 0) -ushr r2.xyz, r2.zzzz, l(13, 4, 9, 0) -mov r1.w, r2.x -and r1.xw, r1.xxxw, l(248, 0, 0, 248) -mov r2.xw, r1.zzzy -and r2.zw, r2.wwwz, l(0, 0, 0x0003f000, 0x0003f000) -iadd r1.xy, r1.xwxx, r2.zwzz -and r1.zw, r2.xxxy, l(0, 0, 0x0f800000, 0x0f800000) -iadd r1.xy, r1.zwzz, r1.xyxx -ushr r1.zw, r1.xxxy, l(0, 0, 5, 5) -and r1.zw, r1.zzzw, l(0, 0, 0x00700007, 0x00700007) -iadd r1.xy, r1.zwzz, r1.xyxx -ushr r1.zw, r1.xxxy, l(0, 0, 6, 6) -and r1.zw, r1.zzzw, l(0, 0, 3072, 3072) -iadd r1.xy, r1.wzww, r1.yxyy -ishl r2.xyz, r4.xxxx, l(3, 7, 12, 0) -ushr r5.xyz, r4.xxxx, l(13, 4, 9, 0) -mov r2.w, r5.x -and r2.xw, r2.xxxw, l(248, 0, 0, 248) -mov r5.xw, r2.zzzy -and r4.xy, r5.wzww, l(0x0003f000, 0x0003f000, 0, 0) -iadd r2.xy, r2.xwxx, r4.xyxx -and r2.zw, r5.xxxy, l(0, 0, 0x0f800000, 0x0f800000) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r2.zw, r2.xxxy, l(0, 0, 5, 5) -and r2.zw, r2.zzzw, l(0, 0, 0x00700007, 0x00700007) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r2.zw, r2.xxxy, l(0, 0, 6, 6) -and r2.zw, r2.zzzw, l(0, 0, 3072, 3072) -iadd r2.xy, r2.zwzz, r2.xyxx -ishl r5.xyz, r4.zzzz, l(3, 7, 12, 0) -ushr r4.xyz, r4.zzzz, l(13, 4, 9, 0) -mov r5.w, r4.x -and r2.zw, r5.xxxw, l(0, 0, 248, 248) -mov r4.xw, r5.zzzy -and r4.zw, r4.wwwz, l(0, 0, 0x0003f000, 0x0003f000) -iadd r2.zw, r2.zzzw, r4.zzzw -and r4.xy, r4.xyxx, l(0x0f800000, 0x0f800000, 0, 0) -iadd r2.zw, r2.zzzw, r4.xxxy -ushr r4.xy, r2.zwzz, l(5, 5, 0, 0) -and r4.xy, r4.xyxx, l(0x00700007, 0x00700007, 0, 0) -iadd r2.zw, r2.zzzw, r4.xxxy -ushr r4.xy, r2.zwzz, l(6, 6, 0, 0) -and r4.xy, r4.xyxx, l(3072, 3072, 0, 0) -iadd r2.zw, r2.zzzw, r4.xxxy -mov r4.x, r0.w -mov r4.y, r1.x -mov r4.zw, r2.yyyw -mov r1.x, r0.x -mov r1.zw, r2.xxxz -uge r5.xyzw, r4.xyzw, r1.xyzw -not r6.xyzw, r3.xyzw -ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) -and r7.xyzw, r7.xyzw, l(0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa) -xor r6.xyzw, r6.xyzw, r7.xyzw -ishl r7.xyzw, r3.xyzw, l(1, 1, 1, 1) -and r7.xyzw, r7.xyzw, l(0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa) -ushr r3.xyzw, r3.xyzw, l(1, 1, 1, 1) -and r3.xyzw, r3.xyzw, l(0x55555555, 0x55555555, 0x55555555, 0x55555555) -iadd r3.xyzw, r3.xyzw, r7.xyzw -ushr r7.xyzw, r3.xyzw, l(1, 1, 1, 1) -and r7.xyzw, r7.xyzw, l(0x55555555, 0x55555555, 0x55555555, 0x55555555) -xor r3.xyzw, r3.xyzw, r7.xyzw -movc r3.xyzw, r5.xyzw, r6.xyzw, r3.xyzw -ushr r6.xyzw, r3.xxxx, l(2, 4, 6, 1) -mov r7.x, r3.x -mov r7.yzw, r6.xxyz -and r8.xyzw, r7.xyzw, l(1, 1, 1, 1) -ubfe r9.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r7.xxxx -imul null, r9.xyzw, r0.wwww, r9.xyzw -imad r8.xyzw, r8.xyzw, r1.xxxx, r9.xyzw -and r9.x, r6.w, r7.x -and r10.x, r9.x, l(0x55555555) -ushr r9.yzw, r10.xxxx, l(0, 2, 4, 6) -and r11.xyzw, r9.xyzw, l(1, 1, 1, 1) -or r6.x, r6.w, r7.x -ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r8.xyzw -ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) -mov r10.yzw, r9.yyzw -bfi r9.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r10.xyzw, l(10, 10, 10, 10) -ubfe r9.xyzw, l(9, 9, 9, 9), r9.xyzw, r8.xyzw -ishl r9.xyzw, r9.xyzw, l(8, 8, 8, 8) -iadd r9.xyzw, r9.xyzw, r11.xyzw -bfi r10.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r10.xyzw, l(20, 20, 20, 20) -ushr r8.xyzw, r8.xyzw, r10.xyzw -iadd r8.xyzw, r8.xyzw, r9.xyzw -ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) -imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r8.xyzw -not r8.xyzw, r3.wxyz -ushr r9.yzw, r8.yyyy, l(0, 2, 4, 6) -mov r9.x, r8.y -and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) -and r10.xyzw, r7.xyzw, l(3, 3, 3, 3) -imul null, r10.xyzw, r0.wwww, r10.xyzw -imad r9.xyzw, r9.xyzw, r1.xxxx, r10.xyzw -and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) -udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) -ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) -ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw -udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) -bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw -ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20) -udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) -or r9.xyzw, r9.xyzw, r10.xyzw -or r9.xyzw, r9.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) -movc r6.xyzw, r5.xxxx, r6.xyzw, r9.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw -iadd r4.xzw, r0.yyyy, l(1, 0, 2, 3) -ushr r6.xyzw, r3.yyyy, l(2, 4, 6, 1) -mov r9.x, r3.y -mov r9.yzw, r6.xxyz -and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) -ubfe r11.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.yyyy -imul null, r11.xyzw, r4.yyyy, r11.xyzw -imad r10.xyzw, r10.xyzw, r1.yyyy, r11.xyzw -and r11.x, r3.y, r6.w -and r12.x, r11.x, l(0x55555555) -ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) -and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) -or r6.x, r3.y, r6.w -ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw -ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) -mov r12.yzw, r11.yyzw -bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) -ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw -ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) -iadd r11.xyzw, r11.xyzw, r13.xyzw -bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) -ushr r10.xyzw, r10.xyzw, r12.xyzw -iadd r10.xyzw, r10.xyzw, r11.xyzw -ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) -imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw -ushr r10.yzw, r8.zzzz, l(0, 2, 4, 6) -mov r10.x, r8.z -and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) -and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) -imul null, r9.xyzw, r4.yyyy, r9.xyzw -imad r9.xyzw, r10.xyzw, r1.yyyy, r9.xyzw -and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) -udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) -ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) -ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw -udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) -bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw -ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20) -udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) -or r9.xyzw, r9.xyzw, r10.xyzw -or r9.xyzw, r9.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) -movc r6.xyzw, r5.yyyy, r6.xyzw, r9.xyzw -store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw -ushr r6.xyzw, r3.zzzz, l(2, 4, 6, 1) -mov r9.x, r3.z -mov r9.yzw, r6.xxyz -and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) -ubfe r11.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.zzzz -imul null, r11.xyzw, r2.yyyy, r11.xyzw -imad r10.xyzw, r10.xyzw, r2.xxxx, r11.xyzw -and r11.x, r3.z, r6.w -and r12.x, r11.x, l(0x55555555) -ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) -and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) -or r6.x, r3.z, r6.w -ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw -ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) -mov r12.yzw, r11.yyzw -bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) -ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw -ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) -iadd r11.xyzw, r11.xyzw, r13.xyzw -bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) -ushr r10.xyzw, r10.xyzw, r12.xyzw -iadd r10.xyzw, r10.xyzw, r11.xyzw -ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) -imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw -ushr r10.yzw, r8.wwww, l(0, 2, 4, 6) -mov r10.x, r8.w -and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) -and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) -imul null, r9.xyzw, r2.yyyy, r9.xyzw -imad r9.xyzw, r10.xyzw, r2.xxxx, r9.xyzw -and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) -udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) -ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) -ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw -udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) -bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw -ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20) -udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) -or r9.xyzw, r9.xyzw, r10.xyzw -or r9.xyzw, r9.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) -movc r6.xyzw, r5.zzzz, r6.xyzw, r9.xyzw -store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw -ushr r6.xyzw, r3.wwww, l(2, 4, 6, 1) -mov r9.x, r3.w -mov r9.yzw, r6.xxyz -and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) -ubfe r11.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.wwww -imul null, r11.xyzw, r2.wwww, r11.xyzw -imad r10.xyzw, r10.xyzw, r2.zzzz, r11.xyzw -and r11.x, r3.w, r6.w -and r12.x, r11.x, l(0x55555555) -ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) -and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) -or r6.x, r3.w, r6.w -ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw -ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) -mov r12.yzw, r11.yyzw -bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) -ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw -ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) -iadd r11.xyzw, r11.xyzw, r13.xyzw -bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) -ushr r10.xyzw, r10.xyzw, r12.xyzw -iadd r10.xyzw, r10.xyzw, r11.xyzw -ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) -imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw -ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) -and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) -and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) -imul null, r9.xyzw, r2.wwww, r9.xyzw -imad r8.xyzw, r8.xyzw, r2.zzzz, r9.xyzw -and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) -udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) -ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) -ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw -udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) -bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw -ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) -udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) -or r8.xyzw, r8.xyzw, r9.xyzw -or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) -movc r6.xyzw, r5.wwww, r6.xyzw, r8.xyzw -store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw -imad r0.x, vThreadID.y, l(4), l(1) -ilt r0.x, r0.x, CB0[0][2].y -if_nz r0.x - iadd r0.y, r0.z, r0.y - ushr r6.xyzw, r3.xyzw, l(8, 8, 8, 8) - ushr r8.xyzw, r6.xxxx, l(2, 4, 6, 1) - mov r9.x, r6.x - mov r9.yzw, r8.xxyz - and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) - ubfe r11.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r7.xxxx - imul null, r11.xyzw, r0.wwww, r11.xyzw - imad r10.xyzw, r10.xyzw, r1.xxxx, r11.xyzw - and r11.x, r8.w, r9.x - and r12.x, r11.x, l(0x00555555) - ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) - and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) - or r8.x, r8.w, r9.x - ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw - ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - mov r12.yzw, r11.yyzw - bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) - ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw - ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) - iadd r11.xyzw, r11.xyzw, r13.xyzw - bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) - ushr r10.xyzw, r10.xyzw, r12.xyzw - iadd r10.xyzw, r10.xyzw, r11.xyzw - ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) - and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) - imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw - not r10.xyzw, r6.wxyz - ushr r11.yzw, r10.yyyy, l(0, 2, 4, 6) - mov r11.x, r10.y - and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) - and r12.xyzw, r9.xyzw, l(3, 3, 3, 3) - imul null, r12.xyzw, r0.wwww, r12.xyzw - imad r11.xyzw, r11.xyzw, r1.xxxx, r12.xyzw - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw - udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3) - bfi r12.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r13.xyzw, r12.xyzw - ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20) - udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) - or r11.xyzw, r11.xyzw, r12.xyzw - or r11.xyzw, r11.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r8.xyzw, r5.xxxx, r8.xyzw, r11.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r8.xyzw - iadd r4.xzw, r0.yyyy, l(1, 0, 2, 3) - ushr r8.xyzw, r6.yyyy, l(2, 4, 6, 1) - mov r11.x, r6.y - mov r11.yzw, r8.xxyz - and r12.xyzw, r11.xyzw, l(1, 1, 1, 1) - ubfe r13.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.yyyy - imul null, r13.xyzw, r4.yyyy, r13.xyzw - imad r12.xyzw, r12.xyzw, r1.yyyy, r13.xyzw - and r13.x, r6.y, r8.w - and r14.x, r13.x, l(0x00555555) - ushr r13.yzw, r14.xxxx, l(0, 2, 4, 6) - and r15.xyzw, r13.xyzw, l(1, 1, 1, 1) - or r8.x, r6.y, r8.w - ubfe r15.xyzw, l(9, 9, 9, 9), r15.xyzw, r12.xyzw - ishl r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - mov r14.yzw, r13.yyzw - bfi r13.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r14.xyzw, l(10, 10, 10, 10) - ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r12.xyzw - ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8) - iadd r13.xyzw, r13.xyzw, r15.xyzw - bfi r14.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r14.xyzw, l(20, 20, 20, 20) - ushr r12.xyzw, r12.xyzw, r14.xyzw - iadd r12.xyzw, r12.xyzw, r13.xyzw - ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) - and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) - imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r12.xyzw - ushr r12.yzw, r10.zzzz, l(0, 2, 4, 6) - mov r12.x, r10.z - and r12.xyzw, r12.xyzw, l(3, 3, 3, 3) - and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) - imul null, r11.xyzw, r4.yyyy, r11.xyzw - imad r11.xyzw, r12.xyzw, r1.yyyy, r11.xyzw - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw - udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3) - bfi r12.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r13.xyzw, r12.xyzw - ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20) - udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) - or r11.xyzw, r11.xyzw, r12.xyzw - or r11.xyzw, r11.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r8.xyzw, r5.yyyy, r8.xyzw, r11.xyzw - store_uav_typed U0[0].xyzw, r4.xxxx, r8.xyzw - ushr r8.xyzw, r6.zzzz, l(2, 4, 6, 1) - mov r11.x, r6.z - mov r11.yzw, r8.xxyz - and r12.xyzw, r11.xyzw, l(1, 1, 1, 1) - ubfe r13.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.zzzz - imul null, r13.xyzw, r2.yyyy, r13.xyzw - imad r12.xyzw, r12.xyzw, r2.xxxx, r13.xyzw - and r13.x, r6.z, r8.w - and r14.x, r13.x, l(0x00555555) - ushr r13.yzw, r14.xxxx, l(0, 2, 4, 6) - and r15.xyzw, r13.xyzw, l(1, 1, 1, 1) - or r8.x, r6.z, r8.w - ubfe r15.xyzw, l(9, 9, 9, 9), r15.xyzw, r12.xyzw - ishl r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - mov r14.yzw, r13.yyzw - bfi r13.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r14.xyzw, l(10, 10, 10, 10) - ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r12.xyzw - ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8) - iadd r13.xyzw, r13.xyzw, r15.xyzw - bfi r14.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r14.xyzw, l(20, 20, 20, 20) - ushr r12.xyzw, r12.xyzw, r14.xyzw - iadd r12.xyzw, r12.xyzw, r13.xyzw - ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) - and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) - imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r12.xyzw - ushr r12.yzw, r10.wwww, l(0, 2, 4, 6) - mov r12.x, r10.w - and r12.xyzw, r12.xyzw, l(3, 3, 3, 3) - and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) - imul null, r11.xyzw, r2.yyyy, r11.xyzw - imad r11.xyzw, r12.xyzw, r2.xxxx, r11.xyzw - and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) - udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw - udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3) - bfi r12.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r13.xyzw, r12.xyzw - ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20) - udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) - or r11.xyzw, r11.xyzw, r12.xyzw - or r11.xyzw, r11.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r8.xyzw, r5.zzzz, r8.xyzw, r11.xyzw - store_uav_typed U0[0].xyzw, r4.zzzz, r8.xyzw - ushr r8.xyzw, r6.wwww, l(2, 4, 6, 1) - mov r11.x, r6.w - mov r11.yzw, r8.xxyz - and r12.xyzw, r11.xyzw, l(1, 1, 1, 1) - ubfe r13.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.wwww - imul null, r13.xyzw, r2.wwww, r13.xyzw - imad r12.xyzw, r12.xyzw, r2.zzzz, r13.xyzw - and r13.x, r6.w, r8.w - and r14.x, r13.x, l(0x00555555) - ushr r13.yzw, r14.xxxx, l(0, 2, 4, 6) - and r15.xyzw, r13.xyzw, l(1, 1, 1, 1) - or r8.x, r6.w, r8.w - ubfe r15.xyzw, l(9, 9, 9, 9), r15.xyzw, r12.xyzw - ishl r15.xyzw, r15.xyzw, l(16, 16, 16, 16) - mov r14.yzw, r13.yyzw - bfi r13.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r14.xyzw, l(10, 10, 10, 10) - ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r12.xyzw - ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8) - iadd r13.xyzw, r13.xyzw, r15.xyzw - bfi r14.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r14.xyzw, l(20, 20, 20, 20) - ushr r12.xyzw, r12.xyzw, r14.xyzw - iadd r12.xyzw, r12.xyzw, r13.xyzw - ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) - and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) - imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r12.xyzw - ushr r10.yzw, r10.xxxx, l(0, 2, 4, 6) - and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) - and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) - imul null, r11.xyzw, r2.wwww, r11.xyzw - imad r10.xyzw, r10.xyzw, r2.zzzz, r11.xyzw - and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) - udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - ubfe r12.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r10.xyzw - udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) - bfi r11.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r12.xyzw, r11.xyzw - ushr r10.xyzw, r10.xyzw, l(20, 20, 20, 20) - udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) - or r10.xyzw, r10.xyzw, r11.xyzw - or r10.xyzw, r10.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r8.xyzw, r5.wwww, r8.xyzw, r10.xyzw - store_uav_typed U0[0].xyzw, r4.wwww, r8.xyzw - imad r0.x, vThreadID.y, l(4), l(2) - ilt r0.x, r0.x, CB0[0][2].y - not r1.z, r0.x - if_nz r0.x - iadd r0.y, r0.z, r0.y - ushr r3.xyzw, r6.xyzw, l(8, 8, 8, 8) - else - mov r3.x, r9.x - mov r3.yzw, r6.yyzw - endif - if_z r1.z - ushr r6.xyzw, r3.xxxx, l(2, 4, 6, 1) - mov r8.x, r3.x - mov r8.yzw, r6.xxyz - and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) - ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.xxxx - imul null, r10.xyzw, r0.wwww, r10.xyzw - imad r9.xyzw, r9.xyzw, r1.xxxx, r10.xyzw - and r10.x, r3.x, r6.w - and r11.x, r10.x, l(0x00555555) - ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) - and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) - or r6.x, r3.x, r6.w - ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - mov r11.yzw, r10.yyzw - bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) - ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw - ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) - iadd r10.xyzw, r10.xyzw, r12.xyzw - bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) - ushr r9.xyzw, r9.xyzw, r11.xyzw - iadd r9.xyzw, r9.xyzw, r10.xyzw - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) - imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw - not r9.x, r3.x - ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) - and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) - and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) - imul null, r8.xyzw, r0.wwww, r8.xyzw - imad r8.xyzw, r9.xyzw, r1.xxxx, r8.xyzw - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw - udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) - bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw - ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - or r8.xyzw, r8.xyzw, r9.xyzw - or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r6.xyzw, r5.xxxx, r6.xyzw, r8.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw - iadd r4.xzw, r0.yyyy, l(1, 0, 2, 3) - ushr r6.xyzw, r3.yyyy, l(2, 4, 6, 1) - mov r8.x, r3.y - mov r8.yzw, r6.xxyz - and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) - ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.yyyy - imul null, r10.xyzw, r4.yyyy, r10.xyzw - imad r9.xyzw, r9.xyzw, r1.yyyy, r10.xyzw - and r10.x, r3.y, r6.w - and r11.x, r10.x, l(0x00555555) - ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) - and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) - or r6.x, r3.y, r6.w - ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - mov r11.yzw, r10.yyzw - bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) - ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw - ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) - iadd r10.xyzw, r10.xyzw, r12.xyzw - bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) - ushr r9.xyzw, r9.xyzw, r11.xyzw - iadd r9.xyzw, r9.xyzw, r10.xyzw - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) - imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw - not r9.x, r3.y - ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) - and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) - and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) - imul null, r8.xyzw, r4.yyyy, r8.xyzw - imad r8.xyzw, r9.xyzw, r1.yyyy, r8.xyzw - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw - udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) - bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw - ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - or r8.xyzw, r8.xyzw, r9.xyzw - or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r6.xyzw, r5.yyyy, r6.xyzw, r8.xyzw - store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw - ushr r6.xyzw, r3.zzzz, l(2, 4, 6, 1) - mov r8.x, r3.z - mov r8.yzw, r6.xxyz - and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) - ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.zzzz - imul null, r10.xyzw, r2.yyyy, r10.xyzw - imad r9.xyzw, r9.xyzw, r2.xxxx, r10.xyzw - and r10.x, r3.z, r6.w - and r11.x, r10.x, l(0x00555555) - ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) - and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) - or r6.x, r3.z, r6.w - ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - mov r11.yzw, r10.yyzw - bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) - ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw - ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) - iadd r10.xyzw, r10.xyzw, r12.xyzw - bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) - ushr r9.xyzw, r9.xyzw, r11.xyzw - iadd r9.xyzw, r9.xyzw, r10.xyzw - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) - imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw - not r9.x, r3.z - ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) - and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) - and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) - imul null, r8.xyzw, r2.yyyy, r8.xyzw - imad r8.xyzw, r9.xyzw, r2.xxxx, r8.xyzw - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw - udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) - bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw - ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - or r8.xyzw, r8.xyzw, r9.xyzw - or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r6.xyzw, r5.zzzz, r6.xyzw, r8.xyzw - store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw - ushr r6.xyzw, r3.wwww, l(2, 4, 6, 1) - mov r8.x, r3.w - mov r8.yzw, r6.xxyz - and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) - ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.wwww - imul null, r10.xyzw, r2.wwww, r10.xyzw - imad r9.xyzw, r9.xyzw, r2.zzzz, r10.xyzw - and r10.x, r3.w, r6.w - and r11.x, r10.x, l(0x00555555) - ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) - and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) - or r6.x, r3.w, r6.w - ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - mov r11.yzw, r10.yyzw - bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) - ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw - ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) - iadd r10.xyzw, r10.xyzw, r12.xyzw - bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) - ushr r9.xyzw, r9.xyzw, r11.xyzw - iadd r9.xyzw, r9.xyzw, r10.xyzw - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) - imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw - not r9.x, r3.w - ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) - and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) - and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) - imul null, r8.xyzw, r2.wwww, r8.xyzw - imad r8.xyzw, r9.xyzw, r2.zzzz, r8.xyzw - and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) - ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) - ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw - udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) - bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw - ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - or r8.xyzw, r8.xyzw, r9.xyzw - or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r6.xyzw, r5.wwww, r6.xyzw, r8.xyzw - store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw - endif -else - mov r3.x, r7.x - mov r1.z, l(-1) -endif -if_z r1.z - imad r0.x, vThreadID.y, l(4), l(3) - ilt r0.x, r0.x, CB0[0][2].y - if_nz r0.x - iadd r0.x, r0.z, r0.y - ushr r6.xyzw, r3.wxyz, l(8, 8, 8, 8) - ushr r7.xyzw, r6.yyyy, l(2, 4, 6, 1) - mov r8.x, r6.y - mov r8.yzw, r7.xxyz - and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) - ubfe r10.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.xxxx - imul null, r10.xyzw, r0.wwww, r10.xyzw - imad r9.xyzw, r9.xyzw, r1.xxxx, r10.xyzw - and r10.x, r7.w, r8.x - and r11.x, r10.x, l(0x00555555) - ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) - and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) - or r7.x, r7.w, r8.x - ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw - ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) - mov r11.yzw, r10.yyzw - bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) - ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw - ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) - iadd r10.xyzw, r10.xyzw, r12.xyzw - bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) - ushr r9.xyzw, r9.xyzw, r11.xyzw - iadd r9.xyzw, r9.xyzw, r10.xyzw - ushr r7.yzw, r7.xxxx, l(0, 2, 4, 6) - and r7.xyzw, r7.xyzw, l(1, 1, 1, 1) - imad r7.xyzw, r7.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw - not r9.xyzw, r6.xyzw - ushr r10.yzw, r9.yyyy, l(0, 2, 4, 6) - mov r10.x, r9.y - and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) - and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) - imul null, r8.xyzw, r0.wwww, r8.xyzw - imad r8.xyzw, r10.xyzw, r1.xxxx, r8.xyzw - and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) - udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) - ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) - ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw - udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) - bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw - ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - or r8.xyzw, r8.xyzw, r10.xyzw - or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r7.xyzw, r5.xxxx, r7.xyzw, r8.xyzw - store_uav_typed U0[0].xyzw, r0.xxxx, r7.xyzw - iadd r0.yzw, r0.xxxx, l(0, 1, 2, 3) - ushr r7.xyzw, r6.zzzz, l(2, 4, 6, 1) - mov r8.x, r6.z - mov r8.yzw, r7.xxyz - and r10.xyzw, r8.xyzw, l(1, 1, 1, 1) - ubfe r11.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.yyyy - imul null, r11.xyzw, r4.yyyy, r11.xyzw - imad r10.xyzw, r10.xyzw, r1.yyyy, r11.xyzw - and r11.x, r6.z, r7.w - and r12.x, r11.x, l(0x00555555) - ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) - and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) - or r7.x, r6.z, r7.w - ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw - ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) - mov r12.yzw, r11.yyzw - bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) - ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw - ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) - iadd r11.xyzw, r11.xyzw, r13.xyzw - bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) - ushr r10.xyzw, r10.xyzw, r12.xyzw - iadd r10.xyzw, r10.xyzw, r11.xyzw - ushr r7.yzw, r7.xxxx, l(0, 2, 4, 6) - and r7.xyzw, r7.xyzw, l(1, 1, 1, 1) - imad r7.xyzw, r7.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw - ushr r10.yzw, r9.zzzz, l(0, 2, 4, 6) - mov r10.x, r9.z - and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) - and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r4.yyyy, r8.xyzw - imad r1.xyzw, r10.xyzw, r1.yyyy, r4.xyzw - and r4.xyzw, r1.xyzw, l(1023, 1023, 1023, 1023) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - ubfe r8.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r1.xyzw - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - bfi r4.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r8.xyzw, r4.xyzw - ushr r1.xyzw, r1.xyzw, l(20, 20, 20, 20) - udiv r1.xyzw, null, r1.xyzw, l(3, 3, 3, 3) - or r1.xyzw, r1.xyzw, r4.xyzw - or r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r1.xyzw, r5.yyyy, r7.xyzw, r1.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - ushr r1.xyzw, r6.wwww, l(2, 4, 6, 1) - mov r4.x, r6.w - mov r4.yzw, r1.xxyz - and r7.xyzw, r4.xyzw, l(1, 1, 1, 1) - ubfe r8.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.zzzz - imul null, r8.xyzw, r2.yyyy, r8.xyzw - imad r7.xyzw, r7.xyzw, r2.xxxx, r8.xyzw - and r8.x, r6.w, r1.w - and r10.x, r8.x, l(0x00555555) - ushr r8.yzw, r10.xxxx, l(0, 2, 4, 6) - and r11.xyzw, r8.xyzw, l(1, 1, 1, 1) - or r1.x, r1.w, r6.w - ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r7.xyzw - ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) - mov r10.yzw, r8.yyzw - bfi r8.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r10.xyzw, l(10, 10, 10, 10) - ubfe r8.xyzw, l(9, 9, 9, 9), r8.xyzw, r7.xyzw - ishl r8.xyzw, r8.xyzw, l(8, 8, 8, 8) - iadd r8.xyzw, r8.xyzw, r11.xyzw - bfi r10.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r10.xyzw, l(20, 20, 20, 20) - ushr r7.xyzw, r7.xyzw, r10.xyzw - iadd r7.xyzw, r7.xyzw, r8.xyzw - ushr r1.yzw, r1.xxxx, l(0, 2, 4, 6) - and r1.xyzw, r1.xyzw, l(1, 1, 1, 1) - imad r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r7.xyzw - ushr r7.yzw, r9.wwww, l(0, 2, 4, 6) - mov r7.x, r9.w - and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r2.yyyy, r4.xyzw - imad r4.xyzw, r7.xyzw, r2.xxxx, r4.xyzw - and r7.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) - ubfe r8.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw - udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) - bfi r7.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r8.xyzw, r7.xyzw - ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - or r4.xyzw, r4.xyzw, r7.xyzw - or r4.xyzw, r4.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r1.xyzw, r5.zzzz, r1.xyzw, r4.xyzw - store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw - ushr r1.xyzw, r6.xxxx, l(2, 4, 6, 1) - mov r6.yzw, r1.xxyz - and r4.xyzw, r6.xyzw, l(1, 1, 1, 1) - ubfe r3.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.wwww - imul null, r3.xyzw, r2.wwww, r3.xyzw - imad r3.xyzw, r4.xyzw, r2.zzzz, r3.xyzw - and r4.x, r6.x, r1.w - and r7.x, r4.x, l(0x00555555) - ushr r4.yzw, r7.xxxx, l(0, 2, 4, 6) - and r8.xyzw, r4.xyzw, l(1, 1, 1, 1) - or r1.x, r1.w, r6.x - ubfe r8.xyzw, l(9, 9, 9, 9), r8.xyzw, r3.xyzw - ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) - mov r7.yzw, r4.yyzw - bfi r4.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r7.xyzw, l(10, 10, 10, 10) - ubfe r4.xyzw, l(9, 9, 9, 9), r4.xyzw, r3.xyzw - ishl r4.xyzw, r4.xyzw, l(8, 8, 8, 8) - iadd r4.xyzw, r4.xyzw, r8.xyzw - bfi r7.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r7.xyzw, l(20, 20, 20, 20) - ushr r3.xyzw, r3.xyzw, r7.xyzw - iadd r3.xyzw, r3.xyzw, r4.xyzw - ushr r1.yzw, r1.xxxx, l(0, 2, 4, 6) - and r1.xyzw, r1.xyzw, l(1, 1, 1, 1) - imad r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r3.xyzw - ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r9.xyzw, l(3, 3, 3, 3) - and r4.xyzw, r6.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r2.wwww, r4.xyzw - imad r2.xyzw, r3.xyzw, r2.zzzz, r4.xyzw - and r3.xyzw, r2.xyzw, l(1023, 1023, 1023, 1023) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - ishl r3.xyzw, r3.xyzw, l(16, 16, 16, 16) - ubfe r4.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r2.xyzw - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r4.xyzw, r3.xyzw - ushr r2.xyzw, r2.xyzw, l(20, 20, 20, 20) - udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) - or r2.xyzw, r2.xyzw, r3.xyzw - or r2.xyzw, r2.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - movc r1.xyzw, r5.wwww, r1.xyzw, r2.xyzw - store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw - endif -endif -ret -// Approximately 910 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.cso deleted file mode 100644 index ce8fdf5bb..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.h deleted file mode 100644 index 840905ccd..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.h +++ /dev/null @@ -1,1151 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxt3_rgba8.cs.hlsl -const uint8_t texture_load_dxt3_rgba8_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xB2, 0x88, 0xA4, 0xF0, 0xD8, 0x14, 0x49, 0x94, - 0x66, 0x1C, 0xBA, 0x03, 0x48, 0x6C, 0x2A, 0xB2, 0x01, 0x00, 0x00, 0x00, - 0xBC, 0x35, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x20, 0x35, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 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0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x13, 0x03, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x38, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5C, 0x03, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x03, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 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xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -ishl r0.y, r0.y, l(2) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(12) - and r1.w, r1.w, l(0x00006000) - bfi r1.w, l(3), l(10), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r1.w, vThreadID.y, l(7) - and r2.xz, r1.wwww, l(1792, 0, 2048, 0) - bfi r1.w, l(3), l(5), r0.x, r2.x - bfi r1.w, l(21), l(11), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(4) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].yxzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.yxzw, r4.yxzw -endif -if_nz r1.y - ushr r3.xyzw, r2.yxzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.yxzw - mov r3.x, r2.y -else - mov r3.x, r2.y -endif -ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) -ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) -mov r4.w, r5.x -and r1.zw, r4.xxxw, l(0, 0, 248, 248) -mov r5.xw, r4.zzzy -and r4.xy, r5.wzww, l(0x0003f000, 0x0003f000, 0, 0) -iadd r1.zw, r1.zzzw, r4.xxxy -and r4.xy, r5.xyxx, l(0x0f800000, 0x0f800000, 0, 0) -iadd r1.zw, r1.zzzw, r4.xxxy -ushr r4.xy, r1.zwzz, l(5, 5, 0, 0) -and r4.xy, r4.xyxx, l(0x00700007, 0x00700007, 0, 0) -iadd r1.zw, r1.zzzw, r4.xxxy -ushr r4.xy, r1.zwzz, l(6, 6, 0, 0) -and r4.xy, r4.xyxx, l(3072, 3072, 0, 0) -iadd r1.zw, r1.zzzw, r4.xxxy -ishl r4.x, r2.w, l(1) -ushr r4.y, r2.w, l(1) -and r4.xy, r4.xyxx, l(0xaaaaaaaa, 0x55555555, 0, 0) -iadd r4.x, r4.y, r4.x -ushr r4.y, r4.x, l(1) -and r4.y, r4.y, l(0x55555555) -xor r4.x, r4.y, r4.x -not r5.x, r4.x -ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r4.xyzw, l(3, 3, 3, 3) -imul null, r6.xyzw, r1.wwww, r6.xyzw -imad r5.xyzw, r5.xyzw, r1.zzzz, r6.xyzw -and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) -udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) -ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) -ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw -udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) -bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw -ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -or r5.xyzw, r5.xyzw, r6.xyzw -ushr r3.yzw, r3.xxxx, l(0, 4, 8, 12) -and r6.xyzw, r3.xyzw, l(15, 15, 15, 15) -imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw -imad r3.y, vThreadID.y, l(4), l(1) -ilt r3.y, r3.y, CB0[0][2].y -if_nz r3.y - iadd r3.z, r0.z, r0.y - ushr r5.x, r4.x, l(8) - not r6.x, r5.x - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - imul null, r5.xyzw, r1.wwww, r5.xyzw - imad r5.xyzw, r6.xyzw, r1.zzzz, r5.xyzw - and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw - ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - or r5.xyzw, r5.xyzw, r6.xyzw - ubfe r6.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r3.xxxx - imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw - store_uav_typed U0[0].xyzw, r3.zzzz, r5.xyzw - imad r3.x, vThreadID.y, l(4), l(2) - ilt r3.x, r3.x, CB0[0][2].y - if_nz r3.x - ishl r3.x, r0.z, l(1) - iadd r3.x, r0.y, r3.x - ushr r5.x, r4.x, l(16) - not r6.x, r5.x - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - imul null, r5.xyzw, r1.wwww, r5.xyzw - imad r5.xyzw, r6.xyzw, r1.zzzz, r5.xyzw - and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw - ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - or r5.xyzw, r5.xyzw, r6.xyzw - ushr r2.yzw, r2.xxxx, l(0, 4, 8, 12) - and r6.xyzw, r2.xyzw, l(15, 15, 15, 15) - imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw - store_uav_typed U0[0].xyzw, r3.xxxx, r5.xyzw - imad r2.y, vThreadID.y, l(4), l(3) - ilt r2.y, r2.y, CB0[0][2].y - if_nz r2.y - imad r2.y, l(3), r0.z, r0.y - ushr r4.x, r4.x, l(24) - not r5.x, r4.x - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r1.wwww, r4.xyzw - imad r4.xyzw, r5.xyzw, r1.zzzz, r4.xyzw - and r5.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw - ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - or r4.xyzw, r4.xyzw, r5.xyzw - ubfe r5.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r2.xxxx - imad r4.xyzw, r5.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r4.xyzw - store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw - endif - endif -endif -iadd r0.y, r0.y, l(1) -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].yxzw -if_nz r1.x - ishl r4.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.yxzw, r5.yxzw -endif -if_nz r1.y - ushr r1.xyzw, r2.yxzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.yxzw - mov r1.x, r2.y -else - mov r1.x, r2.y -endif -ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) -ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) -mov r4.w, r5.x -and r0.xw, r4.xxxw, l(248, 0, 0, 248) -mov r5.xw, r4.zzzy -and r3.xz, r5.wwzw, l(0x0003f000, 0, 0x0003f000, 0) -iadd r0.xw, r0.xxxw, r3.xxxz -and r3.xz, r5.xxyx, l(0x0f800000, 0, 0x0f800000, 0) -iadd r0.xw, r0.xxxw, r3.xxxz -ushr r3.xz, r0.xxwx, l(5, 0, 5, 0) -and r3.xz, r3.xxzx, l(0x00700007, 0, 0x00700007, 0) -iadd r0.xw, r0.xxxw, r3.xxxz -ushr r3.xz, r0.xxwx, l(6, 0, 6, 0) -and r3.xz, r3.xxzx, l(3072, 0, 3072, 0) -iadd r0.xw, r0.xxxw, r3.xxxz -ishl r3.x, r2.w, l(1) -ushr r3.z, r2.w, l(1) -and r3.xz, r3.xxzx, l(0xaaaaaaaa, 0, 0x55555555, 0) -iadd r3.x, r3.z, r3.x -ushr r3.z, r3.x, l(1) -and r3.z, r3.z, l(0x55555555) -xor r4.x, r3.z, r3.x -not r5.x, r4.x -ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r4.xyzw, l(3, 3, 3, 3) -imul null, r6.xyzw, r0.wwww, r6.xyzw -imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw -and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) -udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) -ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) -ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw -udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) -bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw -ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -or r5.xyzw, r5.xyzw, r6.xyzw -ushr r1.yzw, r1.xxxx, l(0, 4, 8, 12) -and r6.xyzw, r1.xyzw, l(15, 15, 15, 15) -imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw -if_nz r3.y - iadd r1.y, r0.z, r0.y - ushr r3.x, r4.x, l(8) - not r5.x, r3.x - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - imul null, r3.xyzw, r0.wwww, r3.xyzw - imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw - and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw - ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - or r3.xyzw, r3.xyzw, r5.xyzw - ubfe r5.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r1.xxxx - imad r3.xyzw, r5.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r3.xyzw - store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw - imad r1.x, vThreadID.y, l(4), l(2) - ilt r1.x, r1.x, CB0[0][2].y - if_nz r1.x - ishl r1.x, r0.z, l(1) - iadd r1.x, r0.y, r1.x - ushr r3.x, r4.x, l(16) - not r5.x, r3.x - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - imul null, r3.xyzw, r0.wwww, r3.xyzw - imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw - and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw - ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - or r3.xyzw, r3.xyzw, r5.xyzw - ushr r2.yzw, r2.xxxx, l(0, 4, 8, 12) - and r5.xyzw, r2.xyzw, l(15, 15, 15, 15) - imad r3.xyzw, r5.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r3.xyzw - store_uav_typed U0[0].xyzw, r1.xxxx, r3.xyzw - imad r1.x, vThreadID.y, l(4), l(3) - ilt r1.x, r1.x, CB0[0][2].y - if_nz r1.x - imad r0.y, l(3), r0.z, r0.y - ushr r1.x, r4.x, l(24) - not r3.x, r1.x - ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - ushr r1.yzw, r1.xxxx, l(0, 2, 4, 6) - and r1.xyzw, r1.xyzw, l(3, 3, 3, 3) - imul null, r1.xyzw, r0.wwww, r1.xyzw - imad r1.xyzw, r3.xyzw, r0.xxxx, r1.xyzw - and r3.xyzw, r1.xyzw, l(1023, 1023, 1023, 1023) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - ishl r3.xyzw, r3.xyzw, l(16, 16, 16, 16) - ubfe r4.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r1.xyzw - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r4.xyzw, r3.xyzw - ushr r1.xyzw, r1.xyzw, l(20, 20, 20, 20) - udiv r1.xyzw, null, r1.xyzw, l(3, 3, 3, 3) - or r1.xyzw, r1.xyzw, r3.xyzw - ubfe r2.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r2.xxxx - imad r1.xyzw, r2.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r1.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - endif - endif -endif -ret -// Approximately 348 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.cso deleted file mode 100644 index 56ad7b08f..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.h deleted file mode 100644 index bc8876f0b..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.h +++ /dev/null @@ -1,618 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxt3a.cs.hlsl -const uint8_t texture_load_dxt3a_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x9A, 0x79, 0x47, 0x9F, 0x82, 0x8F, 0xAB, 0xC0, - 0xE6, 0x78, 0xA3, 0xB7, 0xF4, 0x64, 0x54, 0x8B, 0x01, 0x00, 0x00, 0x00, - 0xC4, 0x1C, 0x00, 0x00, 0x05, 0x00, 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xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 7 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz -endif -if_nz r1.y - ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r4.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw - mov r3.zw, r1.xxxz - mov r2.zw, r1.yyyw -else - mov r3.zw, r4.xxxz - mov r2.zw, r4.yyyw -endif -bfi r1.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) -bfi r1.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r3.xyzw, r1.xyzw -ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r4.xyzw, r4.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) -iadd r1.xyzw, r1.xyzw, r4.xyzw -ishl r4.xyzw, r3.xyzw, l(12, 12, 12, 12) -and r4.xyzw, r4.xyzw, l(0x0ff00000, 0x0ff00000, 0x0ff00000, 0x0ff00000) -iadd r1.xyzw, r1.xyzw, r4.xyzw -ishl r4.xyzw, r3.xyzw, l(16, 16, 16, 16) -bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -imad r0.x, vThreadID.y, l(4), l(1) -ilt r0.w, r0.x, CB0[0][2].y -if_nz r0.w - iadd r0.y, r0.z, r0.y - ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r1.xyzw, l(0, 0, 0, 0) - bfi r4.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r1.xyzw, r4.xyzw - ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) - iadd r4.xyzw, r4.xyzw, r5.xyzw - ishl r1.xyzw, r1.xyzw, l(12, 12, 12, 12) - bfi r1.xyzw, l(20, 20, 20, 20), l(0, 0, 0, 0), r4.xyzw, r1.xyzw - bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r3.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - iadd r0.x, r0.x, l(1) - ilt r0.w, r0.x, CB0[0][2].y - if_nz r0.w - iadd r0.y, r0.z, r0.y - bfi r1.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r2.xyzw, l(0, 0, 0, 0) - bfi r1.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r2.xyzw, r1.xyzw - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) - iadd r1.xyzw, r1.xyzw, r3.xyzw - ishl r3.xyzw, r2.xyzw, l(12, 12, 12, 12) - and r3.xyzw, r3.xyzw, l(0x0ff00000, 0x0ff00000, 0x0ff00000, 0x0ff00000) - iadd r1.xyzw, r1.xyzw, r3.xyzw - ishl r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r3.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - or r0.x, r0.x, l(3) - ilt r0.x, r0.x, CB0[0][2].y - if_nz r0.x - iadd r0.x, r0.z, r0.y - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r1.xyzw, l(0, 0, 0, 0) - bfi r3.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r1.xyzw, r3.xyzw - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) - iadd r3.xyzw, r3.xyzw, r4.xyzw - ishl r1.xyzw, r1.xyzw, l(12, 12, 12, 12) - bfi r1.xyzw, l(20, 20, 20, 20), l(0, 0, 0, 0), r3.xyzw, r1.xyzw - bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r2.xyzw - store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw - endif - endif -endif -ret -// Approximately 169 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.cso deleted file mode 100644 index 20574bffb..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.h deleted file mode 100644 index 4114a8874..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.h +++ /dev/null @@ -1,1293 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxt3aas1111.cs.hlsl -const uint8_t texture_load_dxt3aas1111_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xB8, 0x51, 0x99, 0xAF, 0xA0, 0x56, 0x31, 0xEF, - 0x51, 0x5A, 0x87, 0x77, 0x61, 0xE2, 0xCD, 0x06, 0x01, 0x00, 0x00, 0x00, - 0x68, 0x3C, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xCC, 0x3B, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x02, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xBD, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x13, 0x03, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x38, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5C, 0x03, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x03, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x93, 0x03, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 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XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz -endif -if_nz r1.y - ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r4.xyzw, r0.xxxx, T0[0].ywxz -if_nz r1.x - ishl r5.xyzw, r4.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.zxwy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.ywxz, r6.ywxz -endif -if_nz r1.y - ushr r1.xyzw, r4.zxwy, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.ywxz - mov r1.xy, r4.zwzz -else - mov r1.xy, r4.zwzz -endif -ushr r5.xyzw, r3.xxyy, l(3, 11, 3, 11) -bfi r5.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r5.xyzw, l(0, 0, 0, 0) -ushr r6.xyzw, r3.xxyy, l(7, 15, 7, 15) -bfi r6.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r6.xyzw, l(0, 0, 0, 0) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r6.xyzw, r3.xxyy, l(2, 10, 2, 10) -bfi r6.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r6.xyzw, l(0, 0, 0, 0) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r6.xyzw, r3.xxyy, l(6, 14, 6, 14) -bfi r5.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r6.xyzw, r5.xyzw -ubfe r6.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r3.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r6.xyzw, r3.xxyy, l(5, 13, 5, 13) -bfi r5.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r6.xyzw, r5.xyzw -ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) -bfi r5.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r3.xzyw, r5.xyzw -ushr r6.xyzw, r3.xxyy, l(4, 12, 4, 12) -bfi r7.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r6.xyzw, l(0, 0, 0, 0) -iadd r7.xyzw, r5.xyzw, r7.xyzw -bfi r6.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r6.xyzw, l(0, 0, 0, 0) -imad r5.xyzw, r5.xyzw, l(2, 2, 2, 2), r6.xyzw -iadd r5.xyzw, r5.xyzw, r7.xyzw -ishl r6.xyzw, r5.xyzw, l(2, 2, 2, 2) -iadd r5.xyzw, r5.xyzw, r6.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw -iadd r0.x, r0.y, l(1) -ushr r5.xyzw, r1.xxyy, l(3, 11, 3, 11) -bfi r5.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r5.xyzw, l(0, 0, 0, 0) -ushr r6.xyzw, r1.xxyy, l(7, 15, 7, 15) -bfi r6.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r6.xyzw, l(0, 0, 0, 0) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r6.xyzw, r1.xxyy, l(2, 10, 2, 10) -bfi r6.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r6.xyzw, l(0, 0, 0, 0) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r6.xyzw, r1.xxyy, l(6, 14, 6, 14) -bfi r5.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r6.xyzw, r5.xyzw -ubfe r6.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r1.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r6.xyzw, r1.xxyy, l(5, 13, 5, 13) -bfi r5.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r6.xyzw, r5.xyzw -ushr r1.zw, r1.xxxy, l(0, 0, 8, 8) -bfi r5.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r1.xzyw, r5.xyzw -ushr r6.xyzw, r1.xxyy, l(4, 12, 4, 12) -bfi r7.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r6.xyzw, l(0, 0, 0, 0) -iadd r7.xyzw, r5.xyzw, r7.xyzw -bfi r6.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r6.xyzw, l(0, 0, 0, 0) -imad r5.xyzw, r5.xyzw, l(2, 2, 2, 2), r6.xyzw -iadd r5.xyzw, r5.xyzw, r7.xyzw -ishl r6.xyzw, r5.xyzw, l(2, 2, 2, 2) -iadd r5.xyzw, r5.xyzw, r6.xyzw -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -imad r0.x, vThreadID.y, l(4), l(1) -ilt r0.w, r0.x, CB0[0][2].y -if_nz r0.w - iadd r0.y, r0.z, r0.y - ushr r5.xz, r3.xxyx, l(16, 0, 16, 0) - ushr r6.xyzw, r5.xxzz, l(3, 11, 3, 11) - bfi r6.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r6.xyzw, l(0, 0, 0, 0) - ushr r7.xyzw, r5.xxzz, l(7, 15, 7, 15) - bfi r7.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r7.xyzw, l(0, 0, 0, 0) - iadd r6.xyzw, r6.xyzw, r7.xyzw - ushr r7.xyzw, r5.xxzz, l(2, 10, 2, 10) - bfi r7.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r7.xyzw, l(0, 0, 0, 0) - iadd r6.xyzw, r6.xyzw, r7.xyzw - ushr r7.xyzw, r5.xxzz, l(6, 14, 6, 14) - bfi r6.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r7.xyzw, r6.xyzw - ubfe r3.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r3.xxyy - iadd r3.xyzw, r6.xyzw, r3.xyzw - ushr r6.xyzw, r5.xxzz, l(5, 13, 5, 13) - bfi r3.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r6.xyzw, r3.xyzw - ushr r5.yw, r5.xxxz, l(0, 8, 0, 8) - bfi r3.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r5.xyzw, r3.xyzw - ushr r5.xyzw, r5.xxzz, l(4, 12, 4, 12) - bfi r6.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r5.xyzw, l(0, 0, 0, 0) - iadd r6.xyzw, r3.xyzw, r6.xyzw - bfi r5.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r5.xyzw, l(0, 0, 0, 0) - imad r3.xyzw, r3.xyzw, l(2, 2, 2, 2), r5.xyzw - iadd r3.xyzw, r3.xyzw, r6.xyzw - ishl r5.xyzw, r3.xyzw, l(2, 2, 2, 2) - iadd r3.xyzw, r3.xyzw, r5.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw - iadd r0.w, r0.y, l(1) - ushr r3.xz, r1.xxyx, l(16, 0, 16, 0) - ushr r5.xyzw, r3.xxzz, l(3, 11, 3, 11) - bfi r5.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r5.xyzw, l(0, 0, 0, 0) - ushr r6.xyzw, r3.xxzz, l(7, 15, 7, 15) - bfi r6.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r6.xyzw, l(0, 0, 0, 0) - iadd r5.xyzw, r5.xyzw, r6.xyzw - ushr r6.xyzw, r3.xxzz, l(2, 10, 2, 10) - bfi r6.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r6.xyzw, l(0, 0, 0, 0) - iadd r5.xyzw, r5.xyzw, r6.xyzw - ushr r6.xyzw, r3.xxzz, l(6, 14, 6, 14) - bfi r5.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r6.xyzw, r5.xyzw - ubfe r1.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r1.xxyy - iadd r1.xyzw, r5.xyzw, r1.xyzw - ushr r5.xyzw, r3.xxzz, l(5, 13, 5, 13) - bfi r1.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r5.xyzw, r1.xyzw - ushr r3.yw, r3.xxxz, l(0, 8, 0, 8) - bfi r1.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r3.xyzw, r1.xyzw - ushr r3.xyzw, r3.xxzz, l(4, 12, 4, 12) - bfi r5.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r3.xyzw, l(0, 0, 0, 0) - iadd r5.xyzw, r1.xyzw, r5.xyzw - bfi r3.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r3.xyzw, l(0, 0, 0, 0) - imad r1.xyzw, r1.xyzw, l(2, 2, 2, 2), r3.xyzw - iadd r1.xyzw, r1.xyzw, r5.xyzw - ishl r3.xyzw, r1.xyzw, l(2, 2, 2, 2) - iadd r1.xyzw, r1.xyzw, r3.xyzw - store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw - iadd r0.x, r0.x, l(1) - ilt r0.w, r0.x, CB0[0][2].y - if_nz r0.w - iadd r0.y, r0.z, r0.y - ushr r1.xyzw, r2.xxyy, l(3, 11, 3, 11) - bfi r1.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r1.xyzw, l(0, 0, 0, 0) - ushr r3.xyzw, r2.xxyy, l(7, 15, 7, 15) - bfi r3.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r3.xyzw, l(0, 0, 0, 0) - iadd r1.xyzw, r1.xyzw, r3.xyzw - ushr r3.xyzw, r2.xxyy, l(2, 10, 2, 10) - bfi r3.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) - iadd r1.xyzw, r1.xyzw, r3.xyzw - ushr r3.xyzw, r2.xxyy, l(6, 14, 6, 14) - bfi r1.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r3.xyzw, r1.xyzw - ubfe r3.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r2.xxyy - iadd r1.xyzw, r1.xyzw, r3.xyzw - ushr r3.xyzw, r2.xxyy, l(5, 13, 5, 13) - bfi r1.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r1.xyzw - ushr r2.zw, r2.xxxy, l(0, 0, 8, 8) - bfi r1.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r2.xzyw, r1.xyzw - ushr r3.xyzw, r2.xxyy, l(4, 12, 4, 12) - bfi r5.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r3.xyzw, l(0, 0, 0, 0) - iadd r5.xyzw, r1.xyzw, r5.xyzw - bfi r3.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r3.xyzw, l(0, 0, 0, 0) - imad r1.xyzw, r1.xyzw, l(2, 2, 2, 2), r3.xyzw - iadd r1.xyzw, r1.xyzw, r5.xyzw - ishl r3.xyzw, r1.xyzw, l(2, 2, 2, 2) - iadd r1.xyzw, r1.xyzw, r3.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - iadd r0.w, r0.y, l(1) - ushr r1.xyzw, r4.xxyy, l(3, 11, 3, 11) - bfi r1.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r1.xyzw, l(0, 0, 0, 0) - ushr r3.xyzw, r4.xxyy, l(7, 15, 7, 15) - bfi r3.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r3.xyzw, l(0, 0, 0, 0) - iadd r1.xyzw, r1.xyzw, r3.xyzw - ushr r3.xyzw, r4.xxyy, l(2, 10, 2, 10) - bfi r3.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) - iadd r1.xyzw, r1.xyzw, r3.xyzw - ushr r3.xyzw, r4.xxyy, l(6, 14, 6, 14) - bfi r1.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r3.xyzw, r1.xyzw - ubfe r3.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r4.xxyy - iadd r1.xyzw, r1.xyzw, r3.xyzw - ushr r3.xyzw, r4.xxyy, l(5, 13, 5, 13) - bfi r1.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r1.xyzw - ushr r4.zw, r4.xxxy, l(0, 0, 8, 8) - bfi r1.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r4.xzyw, r1.xyzw - ushr r3.xyzw, r4.xxyy, l(4, 12, 4, 12) - bfi r5.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r3.xyzw, l(0, 0, 0, 0) - iadd r5.xyzw, r1.xyzw, r5.xyzw - bfi r3.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r3.xyzw, l(0, 0, 0, 0) - imad r1.xyzw, r1.xyzw, l(2, 2, 2, 2), r3.xyzw - iadd r1.xyzw, r1.xyzw, r5.xyzw - ishl r3.xyzw, r1.xyzw, l(2, 2, 2, 2) - iadd r1.xyzw, r1.xyzw, r3.xyzw - store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw - or r0.x, r0.x, l(3) - ilt r0.x, r0.x, CB0[0][2].y - if_nz r0.x - iadd r0.x, r0.z, r0.y - ushr r1.xz, r2.xxyx, l(16, 0, 16, 0) - ushr r3.xyzw, r1.xxzz, l(3, 11, 3, 11) - bfi r3.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r3.xyzw, l(0, 0, 0, 0) - ushr r5.xyzw, r1.xxzz, l(7, 15, 7, 15) - bfi r5.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r5.xyzw, l(0, 0, 0, 0) - iadd r3.xyzw, r3.xyzw, r5.xyzw - ushr r5.xyzw, r1.xxzz, l(2, 10, 2, 10) - bfi r5.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r5.xyzw, l(0, 0, 0, 0) - iadd r3.xyzw, r3.xyzw, r5.xyzw - ushr r5.xyzw, r1.xxzz, l(6, 14, 6, 14) - bfi r3.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r5.xyzw, r3.xyzw - ubfe r2.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r2.xxyy - iadd r2.xyzw, r3.xyzw, r2.xyzw - ushr r3.xyzw, r1.xxzz, l(5, 13, 5, 13) - bfi r2.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r2.xyzw - ushr r1.yw, r1.xxxz, l(0, 8, 0, 8) - bfi r2.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r1.xyzw, r2.xyzw - ushr r1.xyzw, r1.xxzz, l(4, 12, 4, 12) - bfi r3.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r1.xyzw, l(0, 0, 0, 0) - iadd r3.xyzw, r2.xyzw, r3.xyzw - bfi r1.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r1.xyzw, l(0, 0, 0, 0) - imad r1.xyzw, r2.xyzw, l(2, 2, 2, 2), r1.xyzw - iadd r1.xyzw, r1.xyzw, r3.xyzw - ishl r2.xyzw, r1.xyzw, l(2, 2, 2, 2) - iadd r1.xyzw, r1.xyzw, r2.xyzw - store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw - iadd r0.y, r0.x, l(1) - ushr r1.xz, r4.xxyx, l(16, 0, 16, 0) - ushr r2.xyzw, r1.xxzz, l(3, 11, 3, 11) - bfi r2.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r2.xyzw, l(0, 0, 0, 0) - ushr r3.xyzw, r1.xxzz, l(7, 15, 7, 15) - bfi r3.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r3.xyzw, l(0, 0, 0, 0) - iadd r2.xyzw, r2.xyzw, r3.xyzw - ushr r3.xyzw, r1.xxzz, l(2, 10, 2, 10) - bfi r3.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) - iadd r2.xyzw, r2.xyzw, r3.xyzw - ushr r3.xyzw, r1.xxzz, l(6, 14, 6, 14) - bfi r2.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r3.xyzw, r2.xyzw - ubfe r3.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r4.xxyy - iadd r2.xyzw, r2.xyzw, r3.xyzw - ushr r3.xyzw, r1.xxzz, l(5, 13, 5, 13) - bfi r2.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r2.xyzw - ushr r1.yw, r1.xxxz, l(0, 8, 0, 8) - bfi r2.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r1.xyzw, r2.xyzw - ushr r1.xyzw, r1.xxzz, l(4, 12, 4, 12) - bfi r3.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r1.xyzw, l(0, 0, 0, 0) - iadd r3.xyzw, r2.xyzw, r3.xyzw - bfi r1.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r1.xyzw, l(0, 0, 0, 0) - imad r1.xyzw, r2.xyzw, l(2, 2, 2, 2), r1.xyzw - iadd r1.xyzw, r1.xyzw, r3.xyzw - ishl r2.xyzw, r1.xyzw, l(2, 2, 2, 2) - iadd r1.xyzw, r1.xyzw, r2.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - endif - endif -endif -ret -// Approximately 334 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.cso deleted file mode 100644 index 94b2ac146..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.h deleted file mode 100644 index e47071c95..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.h +++ /dev/null @@ -1,2511 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxt5_rgba8.cs.hlsl -const uint8_t texture_load_dxt5_rgba8_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x20, 0x3D, 0xDB, 0xA5, 0xBA, 0x65, 0x0F, 0x85, - 0xF1, 0xB7, 0x31, 0x8E, 0xFE, 0x75, 0x78, 0xB7, 0x01, 0x00, 0x00, 0x00, - 0x7C, 0x75, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xE0, 0x74, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x02, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xBD, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 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0x00, 0x00, 0x00, 0x0E, 0x01, 0x00, 0x00, - 0xB0, 0x01, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.txt deleted file mode 100644 index cb10331c6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.txt +++ /dev/null @@ -1,901 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -ishl r0.y, r0.y, l(2) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(12) - and r1.w, r1.w, l(0x00006000) - bfi r1.w, l(3), l(10), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r1.w, vThreadID.y, l(7) - and r2.xz, r1.wwww, l(1792, 0, 2048, 0) - bfi r1.w, l(3), l(5), r0.x, r2.x - bfi r1.w, l(21), l(11), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(4) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].yxzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.yxzw, r4.yxzw -endif -if_nz r1.y - ushr r3.xyzw, r2.yxzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.yxzw - mov r3.xy, r2.ywyy -else - mov r3.xy, r2.ywyy -endif -ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) -ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) -mov r4.w, r5.x -and r1.zw, r4.xxxw, l(0, 0, 248, 248) -mov r5.xw, r4.zzzy -and r2.yz, r5.wwzw, l(0, 0x0003f000, 0x0003f000, 0) -iadd r1.zw, r1.zzzw, r2.yyyz -and r2.yz, r5.xxyx, l(0, 0x0f800000, 0x0f800000, 0) -iadd r1.zw, r1.zzzw, r2.yyyz -ushr r2.yz, r1.zzwz, l(0, 5, 5, 0) -and r2.yz, r2.yyzy, l(0, 0x00700007, 0x00700007, 0) -iadd r1.zw, r1.zzzw, r2.yyyz -ushr r2.yz, r1.zzwz, l(0, 6, 6, 0) -and r2.yz, r2.yyzy, l(0, 3072, 3072, 0) -iadd r1.zw, r1.zzzw, r2.yyyz -ishl r2.y, r3.y, l(1) -and r2.y, r2.y, l(0xaaaaaaaa) -ushr r4.xyz, r3.yxxy, l(1, 8, 16, 0) -and r2.z, r4.x, l(0x55555555) -iadd r2.y, r2.z, r2.y -ushr r2.z, r2.y, l(1) -and r2.z, r2.z, l(0x55555555) -xor r5.x, r2.z, r2.y -mov r3.z, r4.y -and r2.yz, r3.xxzx, l(0, 255, 255, 0) -bfi r2.w, l(8), l(16), r2.x, l(0) -iadd r2.w, r2.w, r4.z -uge r3.x, r2.z, r2.y -ushr r3.yz, r2.wwww, l(0, 1, 2, 0) -and r3.w, r2.w, r3.y -and r3.w, r3.w, l(0x00492492) -ishl r4.x, r3.w, l(1) -ushr r4.y, r3.w, l(1) -iadd r3.w, r3.w, r4.x -iadd r3.w, r3.w, r4.y -and r4.x, r2.w, l(0x00249249) -iadd r4.y, r4.x, l(0x00db6db6) -and r4.y, r3.w, r4.y -or r4.z, r2.w, r3.y -and r6.xy, r3.yzyy, l(0x00249249, 0x00249249, 0, 0) -or r3.y, r3.z, r4.z -and r3.y, r3.y, l(0x00249249) -xor r3.y, r3.y, l(0x00249249) -not r4.zw, r6.xxxy -and r3.z, r4.z, r4.x -and r3.z, r4.w, r3.z -or r2.w, r2.w, r3.y -iadd r2.w, r2.w, l(0xffdb6db7) -or r2.w, r3.z, r2.w -ishl r3.yz, r3.zzzz, l(0, 2, 1, 0) -or r4.x, r2.w, r3.y -not r3.w, r3.w -and r3.w, r3.w, r4.x -or r3.w, r4.y, r3.w -iadd r3.y, r3.z, r3.y -or r2.w, r2.w, r3.y -movc r2.w, r3.x, r3.w, r2.w -not r4.x, r5.x -ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) -and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) -ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r5.xyzw, l(3, 3, 3, 3) -imul null, r6.xyzw, r1.wwww, r6.xyzw -imad r4.xyzw, r4.xyzw, r1.zzzz, r6.xyzw -and r6.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) -udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) -ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) -ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw -udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) -bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) -udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) -or r4.xyzw, r4.xyzw, r6.xyzw -ushr r3.y, r2.w, l(1) -and r3.y, r2.w, r3.y -and r3.y, r3.y, l(1170) -ishl r3.z, r3.y, l(1) -ushr r3.w, r3.y, l(1) -iadd r3.y, r3.y, r3.z -iadd r3.y, r3.y, r3.w -not r3.z, r3.y -and r3.yw, r2.wwww, r3.yyyz -iadd r5.y, -r3.w, l(2925) -and r3.z, r3.z, r5.y -and r5.yz, r3.zzwz, l(0, 7, 7, 0) -imul null, r5.z, r2.z, r5.z -imad r5.y, r2.y, r5.y, r5.z -udiv r5.y, null, r5.y, l(5) -ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.zzzz -ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww -imul null, r7.xyz, r2.zzzz, r7.xyzx -imad r6.xyz, r2.yyyy, r6.xyzx, r7.xyzx -udiv r6.xyz, null, r6.xyzx, l(5, 5, 5, 0) -ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) -or r3.z, r5.y, r6.x -or r3.z, r6.y, r3.z -or r3.z, r6.z, r3.z -ishl r5.yzw, r3.yyyy, l(0, 5, 10, 15) -and r5.yzw, r5.yyzw, l(0, 256, 0x00010000, 0x01000000) -bfi r3.y, l(1), l(0), r3.y, r5.y -iadd r3.y, r5.z, r3.y -iadd r3.y, r5.w, r3.y -imad r3.y, r3.y, l(255), r3.z -not r3.z, r2.w -and r3.w, r3.z, l(7) -and r5.y, r2.w, l(7) -imul null, r5.y, r2.z, r5.y -imad r3.w, r2.y, r3.w, r5.y -udiv r3.w, null, r3.w, l(7) -ubfe r5.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r3.zzzz -ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.wwww -imul null, r6.xyz, r2.zzzz, r6.xyzx -imad r5.yzw, r2.yyyy, r5.yyzw, r6.xxyz -udiv r5.yzw, null, r5.yyzw, l(0, 7, 7, 7) -ishl r5.yzw, r5.yyzw, l(0, 8, 16, 24) -or r3.z, r3.w, r5.y -or r3.z, r5.z, r3.z -or r3.z, r5.w, r3.z -movc r6.w, r3.x, r3.y, r3.z -ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) -and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) -or r4.xyzw, r4.xyzw, r6.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -imad r3.y, vThreadID.y, l(4), l(1) -ilt r3.y, r3.y, CB0[0][2].y -if_nz r3.y - iadd r3.z, r0.z, r0.y - ushr r4.x, r5.x, l(8) - not r6.x, r4.x - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r1.wwww, r4.xyzw - imad r4.xyzw, r6.xyzw, r1.zzzz, r4.xyzw - and r6.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw - ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - or r4.xyzw, r4.xyzw, r6.xyzw - ushr r3.w, r2.w, l(12) - ushr r5.y, r3.w, l(1) - and r5.y, r3.w, r5.y - and r5.y, r5.y, l(1170) - ishl r5.z, r5.y, l(1) - ushr r5.w, r5.y, l(1) - iadd r5.y, r5.y, r5.z - iadd r5.y, r5.y, r5.w - not r5.z, r5.y - and r5.yw, r3.wwww, r5.yyyz - iadd r6.x, -r5.w, l(2925) - and r5.z, r5.z, r6.x - and r6.xy, r5.zwzz, l(7, 7, 0, 0) - imul null, r6.y, r2.z, r6.y - imad r6.x, r2.y, r6.x, r6.y - ubfe r6.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r5.zzzz - ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r5.wwww - imul null, r7.xyz, r2.zzzz, r7.xyzx - imad r6.yzw, r2.yyyy, r6.yyzw, r7.xxyz - udiv r6.xyzw, null, r6.xyzw, l(5, 5, 5, 5) - ishl r6.yzw, r6.yyzw, l(0, 8, 16, 24) - or r5.z, r6.y, r6.x - or r5.z, r6.z, r5.z - or r5.z, r6.w, r5.z - ishl r6.xyz, r5.yyyy, l(5, 10, 15, 0) - and r6.xyz, r6.xyzx, l(256, 0x00010000, 0x01000000, 0) - bfi r5.y, l(1), l(0), r5.y, r6.x - iadd r5.y, r6.y, r5.y - iadd r5.y, r6.z, r5.y - imad r5.y, r5.y, l(255), r5.z - not r3.w, r3.w - and r5.z, r3.w, l(7) - ubfe r6.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r2.wwww - imul null, r6.xyzw, r2.zzzz, r6.xyzw - imad r2.w, r2.y, r5.z, r6.x - udiv r2.w, null, r2.w, l(7) - ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww - imad r6.xyz, r2.yyyy, r7.xyzx, r6.yzwy - udiv r6.xyz, null, r6.xyzx, l(7, 7, 7, 0) - ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) - or r2.w, r2.w, r6.x - or r2.w, r6.y, r2.w - or r2.w, r6.z, r2.w - movc r6.w, r3.x, r5.y, r2.w - ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) - and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - or r4.xyzw, r4.xyzw, r6.xyzw - store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw - imad r2.w, vThreadID.y, l(4), l(2) - ilt r2.w, r2.w, CB0[0][2].y - if_nz r2.w - ushr r2.x, r2.x, l(8) - ushr r3.zw, r2.xxxx, l(0, 0, 1, 2) - and r2.w, r2.x, r3.z - and r2.w, r2.w, l(0x00492492) - ishl r4.x, r2.w, l(1) - ushr r4.y, r2.w, l(1) - iadd r2.w, r2.w, r4.x - iadd r2.w, r2.w, r4.y - and r4.x, r2.x, l(0x00249249) - iadd r4.y, r4.x, l(0x00db6db6) - and r4.y, r2.w, r4.y - or r4.z, r2.x, r3.z - and r5.yz, r3.zzwz, l(0, 0x00249249, 0x00249249, 0) - or r3.z, r3.w, r4.z - and r3.z, r3.z, l(0x00249249) - xor r3.z, r3.z, l(0x00249249) - not r4.zw, r5.yyyz - and r3.w, r4.z, r4.x - and r3.w, r4.w, r3.w - or r2.x, r2.x, r3.z - iadd r2.x, r2.x, l(0xffdb6db7) - or r2.x, r3.w, r2.x - ishl r3.zw, r3.wwww, l(0, 0, 2, 1) - or r4.x, r2.x, r3.z - not r2.w, r2.w - and r2.w, r2.w, r4.x - or r2.w, r4.y, r2.w - iadd r3.z, r3.w, r3.z - or r2.x, r2.x, r3.z - movc r2.x, r3.x, r2.w, r2.x - ishl r2.w, r0.z, l(1) - iadd r2.w, r0.y, r2.w - ushr r4.x, r5.x, l(16) - not r6.x, r4.x - ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) - and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r1.wwww, r4.xyzw - imad r4.xyzw, r6.xyzw, r1.zzzz, r4.xyzw - and r6.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) - ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw - udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) - bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw - ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - or r4.xyzw, r4.xyzw, r6.xyzw - ushr r3.z, r2.x, l(1) - and r3.z, r2.x, r3.z - and r3.z, r3.z, l(1170) - ishl r3.w, r3.z, l(1) - ushr r5.y, r3.z, l(1) - iadd r3.z, r3.z, r3.w - iadd r3.z, r3.z, r5.y - not r3.w, r3.z - and r5.y, r2.x, r3.w - iadd r5.z, -r5.y, l(2925) - and r3.w, r3.w, r5.z - and r5.z, r3.w, l(7) - and r5.w, r5.y, l(7) - imul null, r5.w, r2.z, r5.w - imad r5.z, r2.y, r5.z, r5.w - udiv r5.z, null, r5.z, l(5) - ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww - ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r5.yyyy - imul null, r7.xyz, r2.zzzz, r7.xyzx - imad r6.xyz, r2.yyyy, r6.xyzx, r7.xyzx - udiv r6.xyz, null, r6.xyzx, l(5, 5, 5, 0) - ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) - or r3.w, r5.z, r6.x - or r3.w, r6.y, r3.w - or r3.w, r6.z, r3.w - and r3.z, r2.x, r3.z - ishl r5.yzw, r3.zzzz, l(0, 5, 10, 15) - and r5.yzw, r5.yyzw, l(0, 256, 0x00010000, 0x01000000) - bfi r3.z, l(1), l(0), r3.z, r5.y - iadd r3.z, r5.z, r3.z - iadd r3.z, r5.w, r3.z - imad r3.z, r3.z, l(255), r3.w - not r3.w, r2.x - and r5.y, r3.w, l(7) - and r5.z, r2.x, l(7) - imul null, r5.z, r2.z, r5.z - imad r5.y, r2.y, r5.y, r5.z - udiv r5.y, null, r5.y, l(7) - ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww - ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.xxxx - imul null, r7.xyz, r2.zzzz, r7.xyzx - imad r6.xyz, r2.yyyy, r6.xyzx, r7.xyzx - udiv r6.xyz, null, r6.xyzx, l(7, 7, 7, 0) - ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) - or r3.w, r5.y, r6.x - or r3.w, r6.y, r3.w - or r3.w, r6.z, r3.w - movc r6.w, r3.x, r3.z, r3.w - ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) - and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - or r4.xyzw, r4.xyzw, r6.xyzw - store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw - imad r2.w, vThreadID.y, l(4), l(3) - ilt r2.w, r2.w, CB0[0][2].y - if_nz r2.w - imad r2.w, l(3), r0.z, r0.y - ushr r4.x, r5.x, l(24) - not r5.x, r4.x - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) - and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) - imul null, r4.xyzw, r1.wwww, r4.xyzw - imad r4.xyzw, r5.xyzw, r1.zzzz, r4.xyzw - and r5.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw - ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - or r4.xyzw, r4.xyzw, r5.xyzw - ushr r1.z, r2.x, l(12) - ushr r1.w, r1.z, l(1) - and r1.w, r1.z, r1.w - and r1.w, r1.w, l(1170) - ishl r3.z, r1.w, l(1) - ushr r3.w, r1.w, l(1) - iadd r1.w, r1.w, r3.z - iadd r1.w, r1.w, r3.w - not r3.z, r1.w - and r3.w, r1.z, r3.z - iadd r5.x, -r3.w, l(2925) - and r3.z, r3.z, r5.x - and r5.xy, r3.zwzz, l(7, 7, 0, 0) - imul null, r5.y, r2.z, r5.y - imad r5.x, r2.y, r5.x, r5.y - ubfe r5.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r3.zzzz - ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww - imul null, r6.xyz, r2.zzzz, r6.xyzx - imad r5.yzw, r2.yyyy, r5.yyzw, r6.xxyz - udiv r5.xyzw, null, r5.xyzw, l(5, 5, 5, 5) - ishl r5.yzw, r5.yyzw, l(0, 8, 16, 24) - or r3.z, r5.y, r5.x - or r3.z, r5.z, r3.z - or r3.z, r5.w, r3.z - and r1.w, r1.w, r1.z - ishl r5.xyz, r1.wwww, l(5, 10, 15, 0) - and r5.xyz, r5.xyzx, l(256, 0x00010000, 0x01000000, 0) - bfi r1.w, l(1), l(0), r1.w, r5.x - iadd r1.w, r5.y, r1.w - iadd r1.w, r5.z, r1.w - imad r1.w, r1.w, l(255), r3.z - not r1.z, r1.z - and r3.z, r1.z, l(7) - ubfe r5.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r2.xxxx - imul null, r5.xyzw, r2.zzzz, r5.xyzw - imad r2.x, r2.y, r3.z, r5.x - udiv r2.x, null, r2.x, l(7) - ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r1.zzzz - imad r5.xyz, r2.yyyy, r6.xyzx, r5.yzwy - udiv r5.xyz, null, r5.xyzx, l(7, 7, 7, 0) - ishl r5.xyz, r5.xyzx, l(8, 16, 24, 0) - or r1.z, r2.x, r5.x - or r1.z, r5.y, r1.z - or r1.z, r5.z, r1.z - movc r5.w, r3.x, r1.w, r1.z - ishl r5.xyz, r5.wwww, l(24, 16, 8, 0) - and r5.xyzw, r5.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - or r4.xyzw, r4.xyzw, r5.xyzw - store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw - endif - endif -endif -iadd r0.y, r0.y, l(1) -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].yxzw -if_nz r1.x - ishl r4.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.yxzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.yxzw, r5.yxzw -endif -if_nz r1.y - ushr r1.xyzw, r2.yxzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.yxzw - mov r1.xy, r2.ywyy -else - mov r1.xy, r2.ywyy -endif -ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) -ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) -mov r4.w, r5.x -and r0.xw, r4.xxxw, l(248, 0, 0, 248) -mov r5.xw, r4.zzzy -and r2.yz, r5.wwzw, l(0, 0x0003f000, 0x0003f000, 0) -iadd r0.xw, r0.xxxw, r2.yyyz -and r2.yz, r5.xxyx, l(0, 0x0f800000, 0x0f800000, 0) -iadd r0.xw, r0.xxxw, r2.yyyz -ushr r2.yz, r0.xxwx, l(0, 5, 5, 0) -and r2.yz, r2.yyzy, l(0, 0x00700007, 0x00700007, 0) -iadd r0.xw, r0.xxxw, r2.yyyz -ushr r2.yz, r0.xxwx, l(0, 6, 6, 0) -and r2.yz, r2.yyzy, l(0, 3072, 3072, 0) -iadd r0.xw, r0.xxxw, r2.yyyz -ishl r1.w, r1.y, l(1) -and r1.w, r1.w, l(0xaaaaaaaa) -ushr r2.yzw, r1.yyxx, l(0, 1, 8, 16) -and r1.y, r2.y, l(0x55555555) -iadd r1.y, r1.y, r1.w -ushr r1.w, r1.y, l(1) -and r1.w, r1.w, l(0x55555555) -xor r4.x, r1.w, r1.y -mov r1.z, r2.z -and r1.xy, r1.xzxx, l(255, 255, 0, 0) -bfi r1.z, l(8), l(16), r2.x, l(0) -iadd r1.z, r1.z, r2.w -uge r1.w, r1.y, r1.x -ushr r2.yz, r1.zzzz, l(0, 1, 2, 0) -and r2.w, r1.z, r2.y -and r2.w, r2.w, l(0x00492492) -ishl r3.x, r2.w, l(1) -ushr r3.z, r2.w, l(1) -iadd r2.w, r2.w, r3.x -iadd r2.w, r2.w, r3.z -and r3.x, r1.z, l(0x00249249) -iadd r3.z, r3.x, l(0x00db6db6) -and r3.z, r2.w, r3.z -or r3.w, r1.z, r2.y -and r5.xy, r2.yzyy, l(0x00249249, 0x00249249, 0, 0) -or r2.y, r2.z, r3.w -and r2.y, r2.y, l(0x00249249) -xor r2.y, r2.y, l(0x00249249) -not r5.xy, r5.xyxx -and r2.z, r3.x, r5.x -and r2.z, r5.y, r2.z -or r1.z, r1.z, r2.y -iadd r1.z, r1.z, l(0xffdb6db7) -or r1.z, r2.z, r1.z -ishl r2.yz, r2.zzzz, l(0, 2, 1, 0) -or r3.x, r1.z, r2.y -not r2.w, r2.w -and r2.w, r2.w, r3.x -or r2.w, r3.z, r2.w -iadd r2.y, r2.z, r2.y -or r1.z, r1.z, r2.y -movc r1.z, r1.w, r2.w, r1.z -not r5.x, r4.x -ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) -and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) -ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) -and r6.xyzw, r4.xyzw, l(3, 3, 3, 3) -imul null, r6.xyzw, r0.wwww, r6.xyzw -imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw -and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) -udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) -ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) -ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw -udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) -bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw -ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) -udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) -or r5.xyzw, r5.xyzw, r6.xyzw -ushr r2.y, r1.z, l(1) -and r2.y, r1.z, r2.y -and r2.y, r2.y, l(1170) -ishl r2.z, r2.y, l(1) -ushr r2.w, r2.y, l(1) -iadd r2.y, r2.y, r2.z -iadd r2.y, r2.y, r2.w -not r2.z, r2.y -and r2.yw, r1.zzzz, r2.yyyz -iadd r3.x, -r2.w, l(2925) -and r2.z, r2.z, r3.x -and r3.xz, r2.zzwz, l(7, 0, 7, 0) -imul null, r3.z, r1.y, r3.z -imad r3.x, r1.x, r3.x, r3.z -udiv r3.x, null, r3.x, l(5) -ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r2.zzzz -ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.wwww -imul null, r6.xyz, r1.yyyy, r6.xyzx -imad r4.yzw, r1.xxxx, r4.yyzw, r6.xxyz -udiv r4.yzw, null, r4.yyzw, l(0, 5, 5, 5) -ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) -or r2.z, r3.x, r4.y -or r2.z, r4.z, r2.z -or r2.z, r4.w, r2.z -ishl r3.xzw, r2.yyyy, l(5, 0, 10, 15) -and r3.xzw, r3.xxzw, l(256, 0, 0x00010000, 0x01000000) -bfi r2.y, l(1), l(0), r2.y, r3.x -iadd r2.y, r3.z, r2.y -iadd r2.y, r3.w, r2.y -imad r2.y, r2.y, l(255), r2.z -not r2.z, r1.z -and r2.w, r2.z, l(7) -and r3.x, r1.z, l(7) -imul null, r3.x, r1.y, r3.x -imad r2.w, r1.x, r2.w, r3.x -udiv r2.w, null, r2.w, l(7) -ubfe r3.xzw, l(3, 0, 3, 3), l(3, 0, 6, 9), r2.zzzz -ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r1.zzzz -imul null, r4.yzw, r1.yyyy, r4.yyzw -imad r3.xzw, r1.xxxx, r3.xxzw, r4.yyzw -udiv r3.xzw, null, r3.xxzw, l(7, 0, 7, 7) -ishl r3.xzw, r3.xxzw, l(8, 0, 16, 24) -or r2.z, r2.w, r3.x -or r2.z, r3.z, r2.z -or r2.z, r3.w, r2.z -movc r6.w, r1.w, r2.y, r2.z -ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) -and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) -or r5.xyzw, r5.xyzw, r6.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw -if_nz r3.y - iadd r2.y, r0.z, r0.y - ushr r3.x, r4.x, l(8) - not r5.x, r3.x - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - imul null, r3.xyzw, r0.wwww, r3.xyzw - imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw - and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw - ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - or r3.xyzw, r3.xyzw, r5.xyzw - ushr r2.z, r1.z, l(12) - ushr r2.w, r2.z, l(1) - and r2.w, r2.z, r2.w - and r2.w, r2.w, l(1170) - ishl r4.y, r2.w, l(1) - ushr r4.z, r2.w, l(1) - iadd r2.w, r2.w, r4.y - iadd r2.w, r2.w, r4.z - not r4.y, r2.w - and r4.z, r2.z, r4.y - iadd r4.w, -r4.z, l(2925) - and r4.y, r4.y, r4.w - and r4.w, r4.y, l(7) - and r5.x, r4.z, l(7) - imul null, r5.x, r1.y, r5.x - imad r4.w, r1.x, r4.w, r5.x - udiv r4.w, null, r4.w, l(5) - ubfe r5.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r4.yyyy - ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r4.zzzz - imul null, r6.xyz, r1.yyyy, r6.xyzx - imad r5.xyz, r1.xxxx, r5.xyzx, r6.xyzx - udiv r5.xyz, null, r5.xyzx, l(5, 5, 5, 0) - ishl r5.xyz, r5.xyzx, l(8, 16, 24, 0) - or r4.y, r4.w, r5.x - or r4.y, r5.y, r4.y - or r4.y, r5.z, r4.y - and r2.w, r2.w, r2.z - ishl r5.xyz, r2.wwww, l(5, 10, 15, 0) - and r5.xyz, r5.xyzx, l(256, 0x00010000, 0x01000000, 0) - bfi r2.w, l(1), l(0), r2.w, r5.x - iadd r2.w, r5.y, r2.w - iadd r2.w, r5.z, r2.w - imad r2.w, r2.w, l(255), r4.y - not r2.z, r2.z - and r4.y, r2.z, l(7) - ubfe r5.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r1.zzzz - imul null, r5.xyzw, r1.yyyy, r5.xyzw - imad r1.z, r1.x, r4.y, r5.x - udiv r1.z, null, r1.z, l(7) - ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r2.zzzz - imad r4.yzw, r1.xxxx, r4.yyzw, r5.yyzw - udiv r4.yzw, null, r4.yyzw, l(0, 7, 7, 7) - ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) - or r1.z, r1.z, r4.y - or r1.z, r4.z, r1.z - or r1.z, r4.w, r1.z - movc r5.w, r1.w, r2.w, r1.z - ishl r5.xyz, r5.wwww, l(24, 16, 8, 0) - and r5.xyzw, r5.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - or r3.xyzw, r3.xyzw, r5.xyzw - store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw - imad r1.z, vThreadID.y, l(4), l(2) - ilt r1.z, r1.z, CB0[0][2].y - if_nz r1.z - ushr r1.z, r2.x, l(8) - ushr r2.xy, r1.zzzz, l(1, 2, 0, 0) - and r2.z, r1.z, r2.x - and r2.z, r2.z, l(0x00492492) - ishl r2.w, r2.z, l(1) - ushr r3.x, r2.z, l(1) - iadd r2.z, r2.z, r2.w - iadd r2.z, r2.z, r3.x - and r2.w, r1.z, l(0x00249249) - iadd r3.x, r2.w, l(0x00db6db6) - and r3.x, r2.z, r3.x - or r3.y, r1.z, r2.x - and r3.zw, r2.xxxy, l(0, 0, 0x00249249, 0x00249249) - or r2.x, r2.y, r3.y - and r2.x, r2.x, l(0x00249249) - xor r2.x, r2.x, l(0x00249249) - not r3.yz, r3.zzwz - and r2.y, r2.w, r3.y - and r2.y, r3.z, r2.y - or r1.z, r1.z, r2.x - iadd r1.z, r1.z, l(0xffdb6db7) - or r1.z, r2.y, r1.z - ishl r2.xy, r2.yyyy, l(2, 1, 0, 0) - or r2.w, r1.z, r2.x - not r2.z, r2.z - and r2.z, r2.z, r2.w - or r2.z, r3.x, r2.z - iadd r2.x, r2.y, r2.x - or r1.z, r1.z, r2.x - movc r1.z, r1.w, r2.z, r1.z - ishl r2.x, r0.z, l(1) - iadd r2.x, r0.y, r2.x - ushr r3.x, r4.x, l(16) - not r5.x, r3.x - ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) - and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) - ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - imul null, r3.xyzw, r0.wwww, r3.xyzw - imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw - and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) - udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw - udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) - bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw - ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - or r3.xyzw, r3.xyzw, r5.xyzw - ushr r2.y, r1.z, l(1) - and r2.y, r1.z, r2.y - and r2.y, r2.y, l(1170) - ishl r2.z, r2.y, l(1) - ushr r2.w, r2.y, l(1) - iadd r2.y, r2.y, r2.z - iadd r2.y, r2.y, r2.w - not r2.z, r2.y - and r2.yw, r1.zzzz, r2.yyyz - iadd r4.y, -r2.w, l(2925) - and r2.z, r2.z, r4.y - and r4.yz, r2.zzwz, l(0, 7, 7, 0) - imul null, r4.z, r1.y, r4.z - imad r4.y, r1.x, r4.y, r4.z - udiv r4.y, null, r4.y, l(5) - ubfe r5.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.zzzz - ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.wwww - imul null, r6.xyz, r1.yyyy, r6.xyzx - imad r5.xyz, r1.xxxx, r5.xyzx, r6.xyzx - udiv r5.xyz, null, r5.xyzx, l(5, 5, 5, 0) - ishl r5.xyz, r5.xyzx, l(8, 16, 24, 0) - or r2.z, r4.y, r5.x - or r2.z, r5.y, r2.z - or r2.z, r5.z, r2.z - ishl r4.yzw, r2.yyyy, l(0, 5, 10, 15) - and r4.yzw, r4.yyzw, l(0, 256, 0x00010000, 0x01000000) - bfi r2.y, l(1), l(0), r2.y, r4.y - iadd r2.y, r4.z, r2.y - iadd r2.y, r4.w, r2.y - imad r2.y, r2.y, l(255), r2.z - not r2.z, r1.z - and r2.w, r2.z, l(7) - and r4.y, r1.z, l(7) - imul null, r4.y, r1.y, r4.y - imad r2.w, r1.x, r2.w, r4.y - udiv r2.w, null, r2.w, l(7) - ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r2.zzzz - ubfe r5.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r1.zzzz - imul null, r5.xyz, r1.yyyy, r5.xyzx - imad r4.yzw, r1.xxxx, r4.yyzw, r5.xxyz - udiv r4.yzw, null, r4.yyzw, l(0, 7, 7, 7) - ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) - or r2.z, r2.w, r4.y - or r2.z, r4.z, r2.z - or r2.z, r4.w, r2.z - movc r5.w, r1.w, r2.y, r2.z - ishl r5.xyz, r5.wwww, l(24, 16, 8, 0) - and r5.xyzw, r5.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - or r3.xyzw, r3.xyzw, r5.xyzw - store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw - imad r2.x, vThreadID.y, l(4), l(3) - ilt r2.x, r2.x, CB0[0][2].y - if_nz r2.x - imad r0.y, l(3), r0.z, r0.y - ushr r2.x, r4.x, l(24) - not r3.x, r2.x - ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) - and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) - ushr r2.yzw, r2.xxxx, l(0, 2, 4, 6) - and r2.xyzw, r2.xyzw, l(3, 3, 3, 3) - imul null, r2.xyzw, r0.wwww, r2.xyzw - imad r2.xyzw, r3.xyzw, r0.xxxx, r2.xyzw - and r3.xyzw, r2.xyzw, l(1023, 1023, 1023, 1023) - udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) - ishl r3.xyzw, r3.xyzw, l(16, 16, 16, 16) - ubfe r4.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r2.xyzw - udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) - bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r4.xyzw, r3.xyzw - ushr r2.xyzw, r2.xyzw, l(20, 20, 20, 20) - udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) - or r2.xyzw, r2.xyzw, r3.xyzw - ushr r0.x, r1.z, l(12) - ushr r0.z, r0.x, l(1) - and r0.z, r0.x, r0.z - and r0.z, r0.z, l(1170) - ishl r0.w, r0.z, l(1) - ushr r3.x, r0.z, l(1) - iadd r0.z, r0.z, r0.w - iadd r0.z, r0.z, r3.x - not r0.w, r0.z - and r3.x, r0.w, r0.x - iadd r3.y, -r3.x, l(2925) - and r0.w, r0.w, r3.y - and r3.y, r0.w, l(7) - and r3.z, r3.x, l(7) - imul null, r3.z, r1.y, r3.z - imad r3.y, r1.x, r3.y, r3.z - ubfe r4.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r0.wwww - ubfe r3.xzw, l(3, 0, 3, 3), l(3, 0, 6, 9), r3.xxxx - imul null, r3.xzw, r1.yyyy, r3.xxzw - imad r3.xzw, r1.xxxx, r4.xxyz, r3.xxzw - udiv r3.xyzw, null, r3.xyzw, l(5, 5, 5, 5) - ishl r3.xzw, r3.xxzw, l(8, 0, 16, 24) - or r0.w, r3.x, r3.y - or r0.w, r3.z, r0.w - or r0.w, r3.w, r0.w - and r0.z, r0.z, r0.x - ishl r3.xyz, r0.zzzz, l(5, 10, 15, 0) - and r3.xyz, r3.xyzx, l(256, 0x00010000, 0x01000000, 0) - bfi r0.z, l(1), l(0), r0.z, r3.x - iadd r0.z, r3.y, r0.z - iadd r0.z, r3.z, r0.z - imad r0.z, r0.z, l(255), r0.w - not r0.x, r0.x - and r0.w, r0.x, l(7) - ubfe r3.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r1.zzzz - imul null, r3.xyzw, r1.yyyy, r3.xyzw - imad r0.w, r1.x, r0.w, r3.x - udiv r0.w, null, r0.w, l(7) - ubfe r4.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r0.xxxx - imad r1.xyz, r1.xxxx, r4.xyzx, r3.yzwy - udiv r1.xyz, null, r1.xyzx, l(7, 7, 7, 0) - ishl r1.xyz, r1.xyzx, l(8, 16, 24, 0) - or r0.x, r0.w, r1.x - or r0.x, r1.y, r0.x - or r0.x, r1.z, r0.x - movc r1.w, r1.w, r0.z, r0.x - ishl r1.xyz, r1.wwww, l(24, 16, 8, 0) - and r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) - or r1.xyzw, r1.xyzw, r2.xyzw - store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw - endif - endif -endif -ret -// Approximately 850 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.cso deleted file mode 100644 index 4e7961166..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.h deleted file mode 100644 index e7a8bdd8d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.h +++ /dev/null @@ -1,2396 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_dxt5a_r8.cs.hlsl -const uint8_t texture_load_dxt5a_r8_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x7B, 0x53, 0x6A, 0xE0, 0xF3, 0xF3, 0xE2, 0x75, - 0xD4, 0xDD, 0x9B, 0xE8, 0x89, 0xE3, 0xB3, 0xC3, 0x01, 0x00, 0x00, 0x00, - 0x18, 0x70, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x7C, 0x6F, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 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8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 19 -dcl_thread_group 8, 32, 1 -ishl r0.x, vThreadID.x, l(2) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) -imad r0.z, vThreadID.z, CB0[0][2].y, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(11) - and r1.w, r1.w, l(0x00003000) - bfi r1.w, l(3), l(9), r0.x, r1.w - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) - and r2.xz, r2.xxzx, l(896, 0, 2048, 0) - bfi r1.w, l(3), l(4), r0.x, r2.x - bfi r1.w, l(22), l(10), r1.y, r1.w - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx - bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(3) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz -endif -if_nz r1.y - ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -movc r0.w, r0.w, l(2), l(1) -iadd r0.x, r0.w, r0.x -ld r4.xyzw, r0.xxxx, T0[0].ywxz -if_nz r1.x - ishl r5.xyzw, r4.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.zxwy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.ywxz, r6.ywxz -endif -if_nz r1.y - ushr r1.xyzw, r4.zxwy, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.ywxz - mov r2.zw, r4.xxxy -else - mov r2.zw, r4.xxxy -endif -ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) -and r1.xyzw, r3.xzyw, l(255, 255, 255, 255) -ushr r4.xy, r4.zwzz, l(8, 8, 0, 0) -and r5.xyzw, r4.zxwy, l(255, 255, 255, 255) -mov r4.xy, r3.xyxx -ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) -bfi r4.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, l(0, 0, 0, 0) -iadd r3.xyzw, r3.xyzw, r4.xyzw -uge r0.xw, r1.yyyw, r1.xxxz -ushr r4.xyzw, r3.xxyy, l(1, 2, 1, 2) -and r6.xy, r3.xyxx, r4.xzxx -and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) -ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) -ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -iadd r6.xy, r6.xyxx, r7.xyxx -and r7.xyzw, r3.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) -iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) -and r6.zw, r6.xxxy, r8.xxxy -or r8.xy, r3.xyxx, r4.xzxx -and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) -or r4.xy, r4.ywyy, r8.xyxx -and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) -xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) -not r9.xyzw, r9.xyzw -and r10.xyzw, r7.xxyy, r9.xxzz -and r9.xyzw, r9.yyww, r10.xyzw -or r3.xy, r3.xyxx, r4.xyxx -iadd r3.xy, r3.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) -or r3.xy, r9.xwxx, r3.xyxx -ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) -or r7.xy, r3.xyxx, r4.xzxx -not r6.xy, r6.xyxx -and r6.xy, r6.xyxx, r7.xyxx -or r6.xy, r6.zwzz, r6.xyxx -iadd r4.xy, r4.ywyy, r4.xzxx -or r3.xy, r3.xyxx, r4.xyxx -movc r4.xy, r0.xwxx, r6.xyxx, r3.xyxx -uge r3.xy, r5.ywyy, r5.xzxx -ushr r6.xyzw, r3.zzww, l(1, 2, 1, 2) -and r7.xy, r3.zwzz, r6.xzxx -and r7.xy, r7.xyxx, l(0x00492492, 0x00492492, 0, 0) -ishl r8.xy, r7.xyxx, l(1, 1, 0, 0) -ushr r9.xy, r7.xyxx, l(1, 1, 0, 0) -iadd r7.xy, r7.xyxx, r8.xyxx -iadd r7.xy, r7.xyxx, r9.xyxx -and r8.xy, r7.xyxx, r8.zwzz -or r8.zw, r3.zzzw, r6.xxxz -and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) -or r6.xy, r6.ywyy, r8.zwzz -and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) -xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) -not r9.xyzw, r9.xyzw -and r10.xyzw, r7.zzww, r9.xxzz -and r9.xyzw, r9.yyww, r10.xyzw -or r3.zw, r3.zzzw, r6.xxxy -iadd r3.zw, r3.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) -or r3.zw, r9.yyyw, r3.zzzw -ishl r6.xyzw, r9.xyzw, l(2, 1, 2, 1) -or r7.zw, r3.zzzw, r6.xxxz -not r7.xy, r7.xyxx -and r7.xy, r7.xyxx, r7.zwzz -or r7.xy, r8.xyxx, r7.xyxx -iadd r6.xy, r6.ywyy, r6.xzxx -or r3.zw, r3.zzzw, r6.xxxy -movc r4.zw, r3.xxxy, r7.xxxy, r3.zzzw -ushr r6.xyzw, r4.xyzw, l(1, 1, 1, 1) -and r6.xyzw, r4.xyzw, r6.xyzw -and r6.xyzw, r6.xyzw, l(1170, 1170, 1170, 1170) -ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) -ushr r8.xyzw, r6.xyzw, l(1, 1, 1, 1) -iadd r6.xyzw, r6.xyzw, r7.xyzw -iadd r6.xyzw, r6.xyzw, r8.xyzw -not r7.xyzw, r6.xxxy -and r8.xyzw, r4.xxxy, r7.zzzw -iadd r9.xyzw, -r8.zzzw, l(2925, 2925, 2925, 2925) -and r7.xyzw, r7.xyzw, r9.xyzw -and r3.zw, r7.zzzw, l(0, 0, 7, 7) -and r9.xy, r8.zwzz, l(7, 7, 0, 0) -imul null, r9.xy, r1.ywyy, r9.xyxx -imad r3.zw, r1.xxxz, r3.zzzw, r9.xxxy -udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) -ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw -ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw -imul null, r10.xyzw, r1.yyyw, r10.xyzw -imad r9.xyzw, r1.xxxz, r9.xyzw, r10.xyzw -udiv r9.xyzw, null, r9.xyzw, l(5, 5, 5, 5) -ishl r9.xyzw, r9.xyzw, l(8, 16, 24, 8) -or r3.zw, r3.zzzw, r9.xxxw -or r3.z, r9.y, r3.z -or r3.z, r9.z, r3.z -and r9.xyzw, r4.xyzw, r6.xyzw -ishl r10.xyzw, r9.xxxy, l(5, 10, 15, 5) -and r10.xyzw, r10.xyzw, l(256, 0x00010000, 0x01000000, 256) -bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r9.xyxx, r10.xwxx -iadd r6.x, r10.y, r6.x -iadd r6.x, r10.z, r6.x -imad r3.z, r6.x, l(255), r3.z -not r10.xyzw, r4.xxxy -and r7.xy, r10.zwzz, l(7, 7, 0, 0) -and r11.xyzw, r4.xyzw, l(7, 7, 7, 7) -imul null, r8.xy, r1.ywyy, r11.xyxx -imad r7.xy, r1.xzxx, r7.xyxx, r8.xyxx -udiv r7.xy, null, r7.xyxx, l(7, 7, 0, 0) -ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r10.xyzw -ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy -imul null, r13.xyzw, r1.yyyw, r13.xyzw -imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw -udiv r12.xyzw, null, r12.xyzw, l(7, 7, 7, 7) -ishl r12.xyzw, r12.xyzw, l(8, 16, 24, 8) -or r7.xy, r7.xyxx, r12.xwxx -or r6.x, r12.y, r7.x -or r6.x, r12.z, r6.x -movc r12.x, r0.x, r3.z, r6.x -ubfe r7.xz, l(3, 0, 3, 0), l(6, 0, 9, 0), r7.wwww -ubfe r8.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r8.wwww -imul null, r8.xy, r1.wwww, r8.xyxx -imad r7.xz, r1.zzzz, r7.xxzx, r8.xxyx -udiv r7.xz, null, r7.xxzx, l(5, 0, 5, 0) -ishl r7.xz, r7.xxzx, l(16, 0, 24, 0) -or r3.z, r3.w, r7.x -or r3.z, r7.z, r3.z -ishl r8.xyzw, r9.yyww, l(10, 15, 10, 15) -and r8.xyzw, r8.xyzw, l(0x00010000, 0x01000000, 0x00010000, 0x01000000) -iadd r3.w, r6.y, r8.x -iadd r3.w, r8.y, r3.w -imad r3.z, r3.w, l(255), r3.z -ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r10.wwww -ubfe r10.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww -imul null, r7.xz, r1.wwww, r10.xxyx -imad r6.xy, r1.zzzz, r6.xyxx, r7.xzxx -udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) -ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) -or r3.w, r6.x, r7.y -or r3.w, r6.y, r3.w -movc r12.y, r0.w, r3.z, r3.w -not r6.xyzw, r6.zzzw -and r7.xyzw, r4.zzzw, r6.zzzw -iadd r13.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) -and r6.xyzw, r6.xyzw, r13.xyzw -and r3.zw, r6.zzzw, l(0, 0, 7, 7) -and r8.xy, r7.zwzz, l(7, 7, 0, 0) -imul null, r8.xy, r5.ywyy, r8.xyxx -imad r3.zw, r5.xxxz, r3.zzzw, r8.xxxy -udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) -ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw -ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw -imul null, r14.xyzw, r5.yyyw, r14.xyzw -imad r13.xyzw, r5.xxxz, r13.xyzw, r14.xyzw -udiv r13.xyzw, null, r13.xyzw, l(5, 5, 5, 5) -ishl r13.xyzw, r13.xyzw, l(8, 16, 24, 8) -or r3.zw, r3.zzzw, r13.xxxw -or r3.z, r13.y, r3.z -or r3.z, r13.z, r3.z -ishl r13.xyzw, r9.zzzw, l(5, 10, 15, 5) -and r13.xyzw, r13.xyzw, l(256, 0x00010000, 0x01000000, 256) -bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r9.zwzz, r13.xwxx -iadd r6.x, r13.y, r6.x -iadd r6.x, r13.z, r6.x -imad r3.z, r6.x, l(255), r3.z -not r9.xyzw, r4.zzzw -and r6.xz, r9.zzwz, l(7, 0, 7, 0) -imul null, r7.xy, r5.ywyy, r11.zwzz -imad r6.xz, r5.xxzx, r6.xxzx, r7.xxyx -udiv r6.xz, null, r6.xxzx, l(7, 0, 7, 0) -ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw -ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw -imul null, r13.xyzw, r5.yyyw, r13.xyzw -imad r11.xyzw, r5.xxxz, r11.xyzw, r13.xyzw -udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) -ishl r11.xyzw, r11.xyzw, l(8, 16, 24, 8) -or r6.xz, r6.xxzx, r11.xxwx -or r6.x, r11.y, r6.x -or r6.x, r11.z, r6.x -movc r12.z, r3.x, r3.z, r6.x -ubfe r6.xw, l(3, 0, 0, 3), l(6, 0, 0, 9), r6.wwww -ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r7.wwww -imul null, r7.xy, r5.wwww, r7.xyxx -imad r6.xw, r5.zzzz, r6.xxxw, r7.xxxy -udiv r6.xw, null, r6.xxxw, l(5, 0, 0, 5) -ishl r6.xw, r6.xxxw, l(16, 0, 0, 24) -or r3.z, r3.w, r6.x -or r3.z, r6.w, r3.z -iadd r3.w, r8.z, r6.y -iadd r3.w, r8.w, r3.w -imad r3.z, r3.w, l(255), r3.z -ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww -imul null, r7.xy, r5.wwww, r10.zwzz -imad r6.xy, r5.zzzz, r6.xyxx, r7.xyxx -udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) -ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) -or r3.w, r6.x, r6.z -or r3.w, r6.y, r3.w -movc r12.w, r3.y, r3.z, r3.w -store_uav_typed U0[0].xyzw, r0.yyyy, r12.xyzw -imad r3.z, vThreadID.y, l(4), l(1) -ilt r3.w, r3.z, CB0[0][2].y -if_nz r3.w - iadd r0.y, r0.z, r0.y - ushr r6.xyzw, r4.xyzw, l(12, 12, 12, 12) - ushr r7.xyzw, r6.xyzw, l(1, 1, 1, 1) - and r7.xyzw, r6.xyzw, r7.xyzw - and r7.xyzw, r7.xyzw, l(1170, 1170, 1170, 1170) - ishl r8.xyzw, r7.xyzw, l(1, 1, 1, 1) - ushr r9.xyzw, r7.xyzw, l(1, 1, 1, 1) - iadd r7.xyzw, r7.xyzw, r8.xyzw - iadd r7.xyzw, r7.xyzw, r9.xyzw - not r8.xyzw, r7.xyzw - and r9.xyzw, r6.xyzw, r8.xyzw - iadd r10.xyzw, -r9.xyzw, l(2925, 2925, 2925, 2925) - and r8.xyzw, r8.xyzw, r10.xyzw - and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) - and r11.xyzw, r9.xyzw, l(7, 7, 7, 7) - imul null, r11.xy, r1.ywyy, r11.xyxx - imad r10.xy, r1.xzxx, r10.xyxx, r11.xyxx - udiv r10.xy, null, r10.xyxx, l(5, 5, 0, 0) - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy - ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xxxy - imul null, r13.xyzw, r1.yyyw, r13.xyzw - imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw - udiv r12.xyzw, null, r12.xyzw, l(5, 5, 5, 5) - ishl r12.xyzw, r12.xyzw, l(8, 16, 24, 8) - or r10.xy, r10.xyxx, r12.xwxx - or r3.w, r12.y, r10.x - or r3.w, r12.z, r3.w - and r7.xyzw, r6.xyzw, r7.xyzw - ishl r12.xyzw, r7.xxxy, l(5, 10, 15, 5) - and r12.xyzw, r12.xyzw, l(256, 0x00010000, 0x01000000, 256) - bfi r11.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r7.xyxx, r12.xwxx - iadd r7.x, r12.y, r11.x - iadd r7.x, r12.z, r7.x - imad r3.w, r7.x, l(255), r3.w - not r6.xyzw, r6.xyzw - and r12.xyzw, r6.xyzw, l(7, 7, 7, 7) - ubfe r13.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx - imul null, r13.xyzw, r1.yyyy, r13.xyzw - imad r4.x, r1.x, r12.x, r13.x - udiv r4.x, null, r4.x, l(7) - ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xxxy - imad r13.xyz, r1.xxxx, r14.xyzx, r13.yzwy - udiv r13.xyz, null, r13.xyzx, l(7, 7, 7, 0) - ishl r13.xyz, r13.xyzx, l(8, 16, 24, 0) - or r4.x, r4.x, r13.x - or r4.x, r13.y, r4.x - or r4.x, r13.z, r4.x - movc r13.x, r0.x, r3.w, r4.x - ubfe r15.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz - ubfe r16.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r9.yyzz - imul null, r8.xy, r1.wwww, r16.xyxx - imad r8.xy, r1.zzzz, r15.xyxx, r8.xyxx - udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) - ishl r8.xy, r8.xyxx, l(16, 24, 0, 0) - or r3.w, r8.x, r10.y - or r3.w, r8.y, r3.w - ishl r17.xyzw, r7.yyzz, l(10, 15, 5, 10) - and r17.xyzw, r17.xyzw, l(0x00010000, 0x01000000, 256, 0x00010000) - iadd r4.x, r11.y, r17.x - iadd r4.x, r17.y, r4.x - imad r3.w, r4.x, l(255), r3.w - ubfe r18.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy - imul null, r18.xyzw, r1.wwww, r18.xyzw - imad r4.x, r1.z, r12.y, r18.x - imad r4.y, r1.z, r14.w, r18.y - udiv r4.xy, null, r4.xyxx, l(7, 7, 0, 0) - ishl r4.y, r4.y, l(8) - or r4.x, r4.y, r4.x - ubfe r14.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r6.yyzz - imad r6.xy, r1.zzzz, r14.xyxx, r18.zwzz - udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) - ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) - or r4.x, r4.x, r6.x - or r4.x, r6.y, r4.x - movc r13.y, r0.w, r3.w, r4.x - imul null, r4.xy, r5.ywyy, r11.zwzz - imad r4.xy, r5.xzxx, r10.zwzz, r4.xyxx - udiv r4.xy, null, r4.xyxx, l(5, 5, 0, 0) - imul null, r6.xy, r5.yyyy, r16.zwzz - imad r6.xy, r5.xxxx, r15.zwzz, r6.xyxx - udiv r6.xy, null, r6.xyxx, l(5, 5, 0, 0) - ishl r6.xy, r6.xyxx, l(8, 16, 0, 0) - or r3.w, r4.x, r6.x - or r3.w, r6.y, r3.w - ubfe r8.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww - ubfe r9.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r9.zwww - imul null, r9.xyzw, r5.ywww, r9.xyzw - imad r8.xyzw, r5.xzzz, r8.xyzw, r9.xyzw - udiv r8.xyzw, null, r8.xyzw, l(5, 5, 5, 5) - ishl r8.xyzw, r8.xyzw, l(24, 8, 16, 24) - or r3.w, r3.w, r8.x - bfi r4.x, l(1), l(0), r7.z, r17.z - iadd r4.x, r17.w, r4.x - ishl r9.xyzw, r7.zwww, l(15, 5, 10, 15) - and r9.xyzw, r9.xyzw, l(0x01000000, 256, 0x00010000, 0x01000000) - iadd r4.x, r4.x, r9.x - imad r3.w, r4.x, l(255), r3.w - ubfe r10.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz - imul null, r10.xyzw, r5.yyyy, r10.xyzw - imad r4.x, r5.x, r12.z, r10.x - udiv r4.x, null, r4.x, l(7) - imad r6.xy, r5.xxxx, r14.zwzz, r10.yzyy - udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) - ishl r6.xy, r6.xyxx, l(8, 16, 0, 0) - or r4.x, r4.x, r6.x - or r4.x, r6.y, r4.x - ubfe r6.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r6.zwww - imad r4.z, r5.x, r6.x, r10.w - udiv r4.z, null, r4.z, l(7) - ishl r4.z, r4.z, l(24) - or r4.x, r4.z, r4.x - movc r13.z, r3.x, r3.w, r4.x - or r3.w, r4.y, r8.y - or r3.w, r8.z, r3.w - or r3.w, r8.w, r3.w - bfi r4.x, l(1), l(0), r7.w, r9.y - iadd r4.x, r9.z, r4.x - iadd r4.x, r9.w, r4.x - imad r3.w, r4.x, l(255), r3.w - ubfe r4.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww - imul null, r4.xyzw, r4.xyzw, r5.wwww - imad r4.x, r5.z, r12.w, r4.x - imad r4.yzw, r5.zzzz, r6.yyzw, r4.yyzw - udiv r4.xyzw, null, r4.xyzw, l(7, 7, 7, 7) - ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) - or r4.x, r4.y, r4.x - or r4.x, r4.z, r4.x - or r4.x, r4.w, r4.x - movc r13.w, r3.y, r3.w, r4.x - store_uav_typed U0[0].xyzw, r0.yyyy, r13.xyzw - iadd r3.z, r3.z, l(1) - ilt r3.w, r3.z, CB0[0][2].y - if_nz r3.w - iadd r0.y, r0.z, r0.y - ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) - ushr r4.xyzw, r2.xxyy, l(1, 2, 1, 2) - and r6.xy, r2.xyxx, r4.xzxx - and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) - ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) - ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) - iadd r6.xy, r6.xyxx, r6.zwzz - iadd r6.xy, r6.xyxx, r7.xyxx - and r7.xyzw, r2.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) - iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) - and r6.zw, r6.xxxy, r8.xxxy - or r8.xy, r2.xyxx, r4.xzxx - and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) - or r4.xy, r4.ywyy, r8.xyxx - and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) - xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) - not r9.xyzw, r9.xyzw - and r10.xyzw, r7.xxyy, r9.xxzz - and r9.xyzw, r9.yyww, r10.xyzw - or r2.xy, r2.xyxx, r4.xyxx - iadd r2.xy, r2.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) - or r2.xy, r9.xwxx, r2.xyxx - ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) - or r7.xy, r2.xyxx, r4.xzxx - not r6.xy, r6.xyxx - and r6.xy, r6.xyxx, r7.xyxx - or r6.xy, r6.zwzz, r6.xyxx - iadd r4.xy, r4.ywyy, r4.xzxx - or r2.xy, r2.xyxx, r4.xyxx - movc r4.xy, r0.xwxx, r6.xyxx, r2.xyxx - ushr r6.xyzw, r2.zzww, l(1, 2, 1, 2) - and r2.xy, r2.zwzz, r6.xzxx - and r2.xy, r2.xyxx, l(0x00492492, 0x00492492, 0, 0) - ishl r7.xy, r2.xyxx, l(1, 1, 0, 0) - ushr r8.xy, r2.xyxx, l(1, 1, 0, 0) - iadd r2.xy, r2.xyxx, r7.xyxx - iadd r2.xy, r2.xyxx, r8.xyxx - and r7.xy, r2.xyxx, r8.zwzz - or r8.xy, r2.zwzz, r6.xzxx - and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) - or r6.xy, r6.ywyy, r8.xyxx - and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) - xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) - not r8.xyzw, r9.xyzw - and r9.xyzw, r7.zzww, r8.xxzz - and r8.xyzw, r8.yyww, r9.xyzw - or r2.zw, r2.zzzw, r6.xxxy - iadd r2.zw, r2.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) - or r2.zw, r8.yyyw, r2.zzzw - ishl r6.xyzw, r8.xyzw, l(2, 1, 2, 1) - or r7.zw, r2.zzzw, r6.xxxz - not r2.xy, r2.xyxx - and r2.xy, r2.xyxx, r7.zwzz - or r2.xy, r7.xyxx, r2.xyxx - iadd r6.xy, r6.ywyy, r6.xzxx - or r2.zw, r2.zzzw, r6.xxxy - movc r4.zw, r3.xxxy, r2.xxxy, r2.zzzw - ushr r2.xyzw, r4.xyzw, l(1, 1, 1, 1) - and r2.xyzw, r4.xyzw, r2.xyzw - and r2.xyzw, r2.xyzw, l(1170, 1170, 1170, 1170) - ishl r6.xyzw, r2.xyzw, l(1, 1, 1, 1) - ushr r7.xyzw, r2.xyzw, l(1, 1, 1, 1) - iadd r2.xyzw, r2.xyzw, r6.xyzw - iadd r2.xyzw, r2.xyzw, r7.xyzw - not r6.xyzw, r2.xxxy - and r7.xyzw, r4.xxxy, r6.zzzw - iadd r8.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) - and r6.xyzw, r6.xyzw, r8.xyzw - and r8.xy, r6.zwzz, l(7, 7, 0, 0) - and r8.zw, r7.zzzw, l(0, 0, 7, 7) - imul null, r8.zw, r1.yyyw, r8.zzzw - imad r8.xy, r1.xzxx, r8.xyxx, r8.zwzz - udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) - ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw - ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw - imul null, r10.xyzw, r1.yyyw, r10.xyzw - imad r9.xyzw, r1.xxxz, r9.xyzw, r10.xyzw - udiv r9.xyzw, null, r9.xyzw, l(5, 5, 5, 5) - ishl r9.xyzw, r9.xyzw, l(8, 16, 24, 8) - or r6.xy, r8.xyxx, r9.xwxx - or r3.w, r9.y, r6.x - or r3.w, r9.z, r3.w - and r8.xyzw, r2.xyzw, r4.xyzw - ishl r9.xyzw, r8.xxxy, l(5, 10, 15, 5) - and r9.xyzw, r9.xyzw, l(256, 0x00010000, 0x01000000, 256) - bfi r2.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r8.xyxx, r9.xwxx - iadd r2.x, r9.y, r2.x - iadd r2.x, r9.z, r2.x - imad r2.x, r2.x, l(255), r3.w - not r9.xyzw, r4.xxxy - and r6.xz, r9.zzwz, l(7, 0, 7, 0) - and r10.xyzw, r4.xyzw, l(7, 7, 7, 7) - imul null, r7.xy, r1.ywyy, r10.xyxx - imad r6.xz, r1.xxzx, r6.xxzx, r7.xxyx - udiv r6.xz, null, r6.xxzx, l(7, 0, 7, 0) - ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy - imul null, r12.xyzw, r1.yyyw, r12.xyzw - imad r11.xyzw, r1.xxxz, r11.xyzw, r12.xyzw - udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) - ishl r11.xyzw, r11.xyzw, l(8, 16, 24, 8) - or r6.xz, r6.xxzx, r11.xxwx - or r3.w, r11.y, r6.x - or r3.w, r11.z, r3.w - movc r11.x, r0.x, r2.x, r3.w - ubfe r6.xw, l(3, 0, 0, 3), l(6, 0, 0, 9), r6.wwww - ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r7.wwww - imul null, r7.xy, r1.wwww, r7.xyxx - imad r6.xw, r1.zzzz, r6.xxxw, r7.xxxy - udiv r6.xw, null, r6.xxxw, l(5, 0, 0, 5) - ishl r6.xw, r6.xxxw, l(16, 0, 0, 24) - or r2.x, r6.x, r6.y - or r2.x, r6.w, r2.x - ishl r7.xyzw, r8.yyww, l(10, 15, 10, 15) - and r7.xyzw, r7.xyzw, l(0x00010000, 0x01000000, 0x00010000, 0x01000000) - iadd r2.y, r2.y, r7.x - iadd r2.y, r7.y, r2.y - imad r2.x, r2.y, l(255), r2.x - ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww - ubfe r9.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww - imul null, r7.xy, r1.wwww, r9.xyxx - imad r6.xy, r1.zzzz, r6.xyxx, r7.xyxx - udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) - ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) - or r2.y, r6.x, r6.z - or r2.y, r6.y, r2.y - movc r11.y, r0.w, r2.x, r2.y - not r2.xyzw, r2.zzzw - and r6.xyzw, r2.zzzw, r4.zzzw - iadd r12.xyzw, -r6.zzzw, l(2925, 2925, 2925, 2925) - and r2.xyzw, r2.xyzw, r12.xyzw - and r7.xy, r2.zwzz, l(7, 7, 0, 0) - and r8.xy, r6.zwzz, l(7, 7, 0, 0) - imul null, r8.xy, r5.ywyy, r8.xyxx - imad r7.xy, r5.xzxx, r7.xyxx, r8.xyxx - udiv r7.xy, null, r7.xyxx, l(5, 5, 0, 0) - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r2.xyzw - ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw - imul null, r13.xyzw, r5.yyyw, r13.xyzw - imad r12.xyzw, r5.xxxz, r12.xyzw, r13.xyzw - udiv r12.xyzw, null, r12.xyzw, l(5, 5, 5, 5) - ishl r12.xyzw, r12.xyzw, l(8, 16, 24, 8) - or r2.xy, r7.xyxx, r12.xwxx - or r2.x, r12.y, r2.x - or r2.x, r12.z, r2.x - ishl r12.xyzw, r8.zzzw, l(5, 10, 15, 5) - and r12.xyzw, r12.xyzw, l(256, 0x00010000, 0x01000000, 256) - bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r8.zwzz, r12.xwxx - iadd r2.z, r12.y, r6.x - iadd r2.z, r12.z, r2.z - imad r2.x, r2.z, l(255), r2.x - not r8.xyzw, r4.zzzw - and r6.xz, r8.zzwz, l(7, 0, 7, 0) - imul null, r7.xy, r5.ywyy, r10.zwzz - imad r6.xz, r5.xxzx, r6.xxzx, r7.xxyx - udiv r6.xz, null, r6.xxzx, l(7, 0, 7, 0) - ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw - imul null, r12.xyzw, r5.yyyw, r12.xyzw - imad r10.xyzw, r5.xxxz, r10.xyzw, r12.xyzw - udiv r10.xyzw, null, r10.xyzw, l(7, 7, 7, 7) - ishl r10.xyzw, r10.xyzw, l(8, 16, 24, 8) - or r6.xz, r6.xxzx, r10.xxwx - or r2.z, r10.y, r6.x - or r2.z, r10.z, r2.z - movc r11.z, r3.x, r2.x, r2.z - ubfe r2.xz, l(3, 0, 3, 0), l(6, 0, 9, 0), r2.wwww - ubfe r6.xw, l(3, 0, 0, 3), l(6, 0, 0, 9), r6.wwww - imul null, r6.xw, r5.wwww, r6.xxxw - imad r2.xz, r5.zzzz, r2.xxzx, r6.xxwx - udiv r2.xz, null, r2.xxzx, l(5, 0, 5, 0) - ishl r2.xz, r2.xxzx, l(16, 0, 24, 0) - or r2.x, r2.x, r2.y - or r2.x, r2.z, r2.x - iadd r2.y, r7.z, r6.y - iadd r2.y, r7.w, r2.y - imad r2.x, r2.y, l(255), r2.x - ubfe r2.yz, l(0, 3, 3, 0), l(0, 6, 9, 0), r8.wwww - imul null, r6.xy, r5.wwww, r9.zwzz - imad r2.yz, r5.zzzz, r2.yyzy, r6.xxyx - udiv r2.yz, null, r2.yyzy, l(0, 7, 7, 0) - ishl r2.yz, r2.yyzy, l(0, 16, 24, 0) - or r2.y, r2.y, r6.z - or r2.y, r2.z, r2.y - movc r11.w, r3.y, r2.x, r2.y - store_uav_typed U0[0].xyzw, r0.yyyy, r11.xyzw - or r2.x, r3.z, l(3) - ilt r2.x, r2.x, CB0[0][2].y - if_nz r2.x - iadd r0.y, r0.z, r0.y - ushr r2.xyzw, r4.xyzw, l(12, 12, 12, 12) - ushr r6.xyzw, r2.xyzw, l(1, 1, 1, 1) - and r6.xyzw, r2.xyzw, r6.xyzw - and r6.xyzw, r6.xyzw, l(1170, 1170, 1170, 1170) - ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) - ushr r8.xyzw, r6.xyzw, l(1, 1, 1, 1) - iadd r6.xyzw, r6.xyzw, r7.xyzw - iadd r6.xyzw, r6.xyzw, r8.xyzw - not r7.xyzw, r6.xyzw - and r8.xyzw, r2.xyzw, r7.xyzw - iadd r9.xyzw, -r8.xyzw, l(2925, 2925, 2925, 2925) - and r7.xyzw, r7.xyzw, r9.xyzw - and r9.xyzw, r7.xyzw, l(7, 7, 7, 7) - and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) - imul null, r3.zw, r1.yyyw, r10.xxxy - imad r3.zw, r1.xxxz, r9.xxxy, r3.zzzw - udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) - ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xxxy - ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy - imul null, r12.xyzw, r1.yyyw, r12.xyzw - imad r11.xyzw, r1.xxxz, r11.xyzw, r12.xyzw - udiv r11.xyzw, null, r11.xyzw, l(5, 5, 5, 5) - ishl r11.xyzw, r11.xyzw, l(8, 16, 24, 8) - or r3.zw, r3.zzzw, r11.xxxw - or r0.z, r11.y, r3.z - or r0.z, r11.z, r0.z - and r6.xyzw, r2.xyzw, r6.xyzw - ishl r11.xyzw, r6.xxxy, l(5, 10, 15, 5) - and r11.xyzw, r11.xyzw, l(256, 0x00010000, 0x01000000, 256) - bfi r9.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.xyxx, r11.xwxx - iadd r3.z, r11.y, r9.x - iadd r3.z, r11.z, r3.z - imad r0.z, r3.z, l(255), r0.z - not r2.xyzw, r2.xyzw - and r11.xyzw, r2.xyzw, l(7, 7, 7, 7) - ubfe r12.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx - imul null, r12.xyzw, r1.yyyy, r12.xyzw - imad r1.y, r1.x, r11.x, r12.x - udiv r1.y, null, r1.y, l(7) - ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r2.xxxy - imad r12.xyz, r1.xxxx, r13.xyzx, r12.yzwy - udiv r12.xyz, null, r12.xyzx, l(7, 7, 7, 0) - ishl r12.xyz, r12.xyzx, l(8, 16, 24, 0) - or r1.x, r1.y, r12.x - or r1.x, r12.y, r1.x - or r1.x, r12.z, r1.x - movc r12.x, r0.x, r0.z, r1.x - ubfe r14.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r7.yyzz - ubfe r15.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz - imul null, r0.xz, r1.wwww, r15.xxyx - imad r0.xz, r1.zzzz, r14.xxyx, r0.xxzx - udiv r0.xz, null, r0.xxzx, l(5, 0, 5, 0) - ishl r0.xz, r0.xxzx, l(16, 0, 24, 0) - or r0.x, r0.x, r3.w - or r0.x, r0.z, r0.x - ishl r16.xyzw, r6.yyzz, l(10, 15, 5, 10) - and r16.xyzw, r16.xyzw, l(0x00010000, 0x01000000, 256, 0x00010000) - iadd r0.z, r9.y, r16.x - iadd r0.z, r16.y, r0.z - imad r0.x, r0.z, l(255), r0.x - ubfe r17.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy - imul null, r17.xyzw, r1.wwww, r17.xyzw - imad r0.z, r1.z, r11.y, r17.x - udiv r0.z, null, r0.z, l(7) - imad r1.x, r1.z, r13.w, r17.y - udiv r1.x, null, r1.x, l(7) - ishl r1.x, r1.x, l(8) - or r0.z, r0.z, r1.x - ubfe r13.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r2.yyzz - imad r1.xy, r1.zzzz, r13.xyxx, r17.zwzz - udiv r1.xy, null, r1.xyxx, l(7, 7, 0, 0) - ishl r1.xy, r1.xyxx, l(16, 24, 0, 0) - or r0.z, r0.z, r1.x - or r0.z, r1.y, r0.z - movc r12.y, r0.w, r0.x, r0.z - imul null, r0.xz, r5.yywy, r10.zzwz - imad r0.xz, r5.xxzx, r9.zzwz, r0.xxzx - udiv r0.xz, null, r0.xxzx, l(5, 0, 5, 0) - imul null, r1.xy, r5.yyyy, r15.zwzz - imad r1.xy, r5.xxxx, r14.zwzz, r1.xyxx - udiv r1.xy, null, r1.xyxx, l(5, 5, 0, 0) - ishl r1.xy, r1.xyxx, l(8, 16, 0, 0) - or r0.x, r0.x, r1.x - or r0.x, r1.y, r0.x - ubfe r1.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r7.zwww - ubfe r7.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww - imul null, r7.xyzw, r5.ywww, r7.xyzw - imad r1.xyzw, r5.xzzz, r1.xyzw, r7.xyzw - udiv r1.xyzw, null, r1.xyzw, l(5, 5, 5, 5) - ishl r1.xyzw, r1.xyzw, l(24, 8, 16, 24) - or r0.x, r0.x, r1.x - bfi r0.w, l(1), l(0), r6.z, r16.z - iadd r0.w, r16.w, r0.w - ishl r7.xyzw, r6.zwww, l(15, 5, 10, 15) - and r7.xyzw, r7.xyzw, l(0x01000000, 256, 0x00010000, 0x01000000) - iadd r0.w, r0.w, r7.x - imad r0.x, r0.w, l(255), r0.x - ubfe r8.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz - imul null, r8.xyzw, r5.yyyy, r8.xyzw - imad r0.w, r5.x, r11.z, r8.x - udiv r0.w, null, r0.w, l(7) - imad r2.xy, r5.xxxx, r13.zwzz, r8.yzyy - udiv r2.xy, null, r2.xyxx, l(7, 7, 0, 0) - ishl r2.xy, r2.xyxx, l(8, 16, 0, 0) - or r0.w, r0.w, r2.x - or r0.w, r2.y, r0.w - ubfe r2.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r2.zwww - imad r1.x, r5.x, r2.x, r8.w - udiv r1.x, null, r1.x, l(7) - ishl r1.x, r1.x, l(24) - or r0.w, r0.w, r1.x - movc r12.z, r3.x, r0.x, r0.w - or r0.x, r0.z, r1.y - or r0.x, r1.z, r0.x - or r0.x, r1.w, r0.x - bfi r0.z, l(1), l(0), r6.w, r7.y - iadd r0.z, r7.z, r0.z - iadd r0.z, r7.w, r0.z - imad r0.x, r0.z, l(255), r0.x - ubfe r1.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww - imul null, r1.xyzw, r1.xyzw, r5.wwww - imad r0.z, r5.z, r11.w, r1.x - udiv r0.z, null, r0.z, l(7) - imad r1.xyz, r5.zzzz, r2.yzwy, r1.yzwy - udiv r1.xyz, null, r1.xyzx, l(7, 7, 7, 0) - ishl r1.xyz, r1.xyzx, l(8, 16, 24, 0) - or r0.z, r0.z, r1.x - or r0.z, r1.y, r0.z - or r0.z, r1.z, r0.z - movc r12.w, r3.y, r0.x, r0.z - store_uav_typed U0[0].xyzw, r0.yyyy, r12.xyzw - endif - endif -endif -ret -// Approximately 766 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.cso deleted file mode 100644 index 603760c43..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.h deleted file mode 100644 index 39a72f86e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.h +++ /dev/null @@ -1,1250 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r10g11b11_rgba16_2x.cs.hlsl -const uint8_t texture_load_r10g11b11_rgba16_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xB3, 0x2A, 0x55, 0xF5, 0xCA, 0x5F, 0x31, 0xBA, - 0xBB, 0x42, 0xCB, 0x6A, 0xE4, 0xEA, 0x50, 0x89, 0x01, 0x00, 0x00, 0x00, - 0x68, 0x3A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xCC, 0x39, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x02, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xBD, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x13, 0x03, 0x00, 0x00, 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xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(3) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].zwxy -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r1.zw, r3.xxxy, l(0, 0, 11, 11) -and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r1.zzzw -iadd r3.xz, r1.zzwz, r4.xxzx -iadd r3.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r1.zw, r2.xxxy, l(0, 0, 11, 11) -and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r2.xz, r1.zzwz, r4.xxzx -iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r3.xyzw, r2.xxxx, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.zwxy, r5.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) -bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r2.xw, r4.xxxy, l(11, 0, 0, 11) -and r4.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r4.xxxy, r2.xxxw -iadd r4.xz, r2.xxwx, r5.xxzx -iadd r4.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) -bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r2.xw, r3.xxxy, l(11, 0, 0, 11) -and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r3.xxxy, r2.xxxw -iadd r3.xz, r2.xxwx, r5.xxzx -iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -iadd r5.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw -iadd r1.z, r1.z, l(1) -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r2.yyyy, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) -bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r1.zw, r4.xxxy, l(0, 0, 11, 11) -and r2.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r4.xz, r1.zzwz, r6.xxzx -iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) -bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r1.zw, r3.xxxy, l(0, 0, 11, 11) -and r2.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r3.xz, r1.zzwz, r6.xxzx -iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw -iadd r1.zw, r0.zzzz, r5.yyyw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r2.xyzw, r2.zzzz, T0[0].zwxy -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy -iadd r4.xyzw, r4.xyzw, r6.xyzw -ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) -and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r3.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r3.xyxx, r3.zwzz -iadd r3.xz, r3.xxyx, r4.xxzx -iadd r3.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy -iadd r4.xyzw, r4.xyzw, r6.xyzw -ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) -and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.xyxx, r2.zwzz -iadd r2.xz, r2.xxyx, r4.xxzx -iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r5.zzzz, r3.xyzw -iadd r3.xy, r1.zwzz, l(1, 1, 0, 0) -store_uav_typed U0[0].xyzw, r3.xxxx, r2.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(8) -else - iadd r0.w, r0.x, l(4) -endif -ld r2.xyzw, r0.wwww, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.zwxy - mov r4.xy, r2.zwzz -else - mov r4.xy, r2.zwzz -endif -ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) -bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r3.xz, r4.xxyx, l(11, 0, 11, 0) -and r4.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r3.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r4.xxyx, r3.xxzx -iadd r4.xz, r3.xxzx, r6.xxzx -iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) -bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) -and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.xyxx, r2.zwzz -iadd r2.xz, r2.xxyx, r6.xxzx -iadd r2.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw -iadd r2.xyz, r0.wwww, l(1, 2, 3, 0) -ld r4.xyzw, r2.xxxx, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r4.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r4.zwxy, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.zwxy - mov r5.xy, r4.zwzz -else - mov r5.xy, r4.zwzz -endif -ushr r5.zw, r5.xxxy, l(0, 0, 21, 21) -bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r5.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r5.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r0.xw, r5.xxxy, l(11, 0, 0, 11) -and r1.zw, r5.xxxy, l(0, 0, 0x001f0000, 0x001f0000) -bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw -iadd r5.xz, r0.xxwx, r6.xxzx -iadd r5.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) -bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r0.xw, r4.xxxy, l(11, 0, 0, 11) -and r1.zw, r4.xxxy, l(0, 0, 0x001f0000, 0x001f0000) -bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw -iadd r4.xz, r0.xxwx, r6.xxzx -iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyzw -ld r3.xyzw, r2.yyyy, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.zwxy, r5.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) -bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r1.zw, r4.xxxy, l(0, 0, 11, 11) -and r2.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r4.xz, r1.zzwz, r5.xxzx -iadd r4.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) -bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r1.zw, r3.xxxy, l(0, 0, 11, 11) -and r2.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r3.xz, r1.zzwz, r5.xxzx -iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r0.x, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw -ld r2.xyzw, r2.zzzz, T0[0].zwxy -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r1.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.zwxy - mov r1.xy, r2.zwzz -else - mov r1.xy, r2.zwzz -endif -ushr r1.zw, r1.xxxy, l(0, 0, 21, 21) -bfi r3.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r1.xzyw, l(0, 0, 0, 0) -ubfe r4.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r1.xxyy -iadd r3.xyzw, r3.xyzw, r4.xyzw -ishl r0.yz, r1.xxyx, l(0, 11, 11, 0) -and r1.xy, r1.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.yyzy -iadd r1.xz, r0.yyzy, r3.xxzx -iadd r1.yw, r3.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) -bfi r3.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) -ubfe r4.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy -iadd r3.xyzw, r3.xyzw, r4.xyzw -ishl r0.yz, r2.xxyx, l(0, 11, 11, 0) -and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.yyzy -iadd r2.xz, r0.yyzy, r3.xxzx -iadd r2.yw, r3.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.x, l(1) -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -ret -// Approximately 372 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.cso deleted file mode 100644 index 660c13455..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.h deleted file mode 100644 index 9bb9fc87d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.h +++ /dev/null @@ -1,1152 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r10g11b11_rgba16_3x.cs.hlsl -const uint8_t texture_load_r10g11b11_rgba16_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x62, 0x0B, 0xDC, 0x40, 0xE8, 0x9F, 0x1C, 0x76, - 0x4C, 0xAF, 0x36, 0x27, 0x2B, 0xD5, 0xA2, 0x6B, 0x01, 0x00, 0x00, 0x00, - 0xD0, 0x35, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x34, 0x35, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 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xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) -imul null, r0.w, r0.w, CB0[0][1].y -ishl r0.y, r0.y, l(3) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw - mov r4.x, r1.x -else - mov r4.x, r1.x -endif -ushr r4.y, r4.x, l(21) -bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r4.xxxy, l(0, 0, 0, 0) -ubfe r4.yz, l(0, 6, 5, 0), l(0, 4, 27, 0), r4.xxxx -iadd r3.zw, r3.zzzw, r4.yyyz -ishl r0.w, r4.x, l(11) -and r2.x, r4.x, l(0x001f0000) -bfi r0.w, l(21), l(0), r2.x, r0.w -iadd r4.xzw, r0.wwww, r3.zzzz -iadd r4.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) -ushr r1.x, r1.y, l(21) -bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.yyyx, l(0, 0, 0, 0) -ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy -iadd r3.zw, r3.zzzw, r5.xxxy -ishl r0.w, r1.y, l(11) -and r1.y, r1.y, l(0x001f0000) -bfi r0.w, l(21), l(0), r1.y, r0.w -iadd r5.xzw, r0.wwww, r3.zzzz -iadd r5.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw -ushr r1.x, r1.z, l(21) -bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.zzzx, l(0, 0, 0, 0) -ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.zzzz -iadd r3.zw, r3.zzzw, r5.xxxy -ishl r0.w, r1.z, l(11) -and r1.y, r1.z, l(0x001f0000) -bfi r0.w, l(21), l(0), r1.y, r0.w -iadd r5.xzw, r0.wwww, r3.zzzz -iadd r5.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw -iadd r0.w, r0.z, r0.y -ushr r1.x, r1.w, l(21) -bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.wwww -iadd r1.xy, r1.xyxx, r3.zwzz -ishl r1.z, r1.w, l(11) -and r1.w, r1.w, l(0x001f0000) -bfi r1.z, l(21), l(0), r1.w, r1.z -iadd r5.xzw, r1.zzzz, r1.xxxx -iadd r5.y, r1.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r3.y - ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw - mov r2.x, r1.x -else - mov r2.x, r1.x -endif -iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) -ushr r2.y, r2.x, l(21) -bfi r2.yz, l(0, 10, 27, 0), l(0, 6, 5, 0), r2.xxyx, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r2.xxxx -iadd r2.yz, r2.yyzy, r3.zzwz -ishl r3.z, r2.x, l(11) -and r2.x, r2.x, l(0x001f0000) -bfi r2.x, l(21), l(0), r2.x, r3.z -iadd r6.xzw, r2.xxxx, r2.yyyy -iadd r6.y, r2.z, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw -ushr r1.x, r1.y, l(21) -bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.yxyy, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.yyyy -iadd r2.xy, r2.xyxx, r3.zwzz -ishl r2.z, r1.y, l(11) -and r1.y, r1.y, l(0x001f0000) -bfi r1.y, l(21), l(0), r1.y, r2.z -iadd r6.xzw, r1.yyyy, r2.xxxx -iadd r6.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -ushr r1.x, r1.z, l(21) -bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.zxzz, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.zzzz -iadd r2.xy, r2.xyxx, r3.zwzz -ishl r1.y, r1.z, l(11) -and r1.z, r1.z, l(0x001f0000) -bfi r1.y, l(21), l(0), r1.z, r1.y -iadd r6.xzw, r1.yyyy, r2.xxxx -iadd r6.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw -iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) -ushr r1.x, r1.w, l(21) -bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) -ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.wwww -iadd r1.xy, r1.xyxx, r2.xyxx -ishl r1.z, r1.w, l(11) -and r1.w, r1.w, l(0x001f0000) -bfi r1.z, l(21), l(0), r1.w, r1.z -iadd r7.xzw, r1.zzzz, r1.xxxx -iadd r7.y, r1.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw -ld r1.xy, r2.wwww, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r1.zw, r2.xxxx, T0[0].zwxy -if_nz r3.x - ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r3.y - ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw - mov r4.x, r1.x -else - mov r4.x, r1.x -endif -ushr r4.y, r4.x, l(21) -bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r4.xxxy, l(0, 0, 0, 0) -ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r4.xxxx -iadd r3.zw, r3.zzzw, r5.xxxy -ishl r0.x, r4.x, l(11) -and r2.x, r4.x, l(0x001f0000) -bfi r0.x, l(21), l(0), r2.x, r0.x -iadd r7.xzw, r0.xxxx, r3.zzzz -iadd r7.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw -ushr r1.x, r1.y, l(21) -bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.yyyx, l(0, 0, 0, 0) -ubfe r4.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy -iadd r3.zw, r3.zzzw, r4.xxxy -ishl r0.x, r1.y, l(11) -and r1.y, r1.y, l(0x001f0000) -bfi r0.x, l(21), l(0), r1.y, r0.x -iadd r7.xzw, r0.xxxx, r3.zzzz -iadd r7.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw -ushr r1.x, r1.z, l(21) -bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.zzzx, l(0, 0, 0, 0) -ubfe r4.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.zzzz -iadd r3.zw, r3.zzzw, r4.xxxy -ishl r0.x, r1.z, l(11) -and r1.y, r1.z, l(0x001f0000) -bfi r0.x, l(21), l(0), r1.y, r0.x -iadd r7.xzw, r0.xxxx, r3.zzzz -iadd r7.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw -iadd r0.x, r0.y, l(5) -ushr r1.x, r1.w, l(21) -bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.wwww -iadd r1.xy, r1.xyxx, r3.zwzz -ishl r1.z, r1.w, l(11) -and r1.w, r1.w, l(0x001f0000) -bfi r1.z, l(21), l(0), r1.w, r1.z -iadd r4.xzw, r1.zzzz, r1.xxxx -iadd r4.y, r1.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw - mov r0.x, r1.x -else - mov r0.x, r1.x -endif -ushr r0.y, r0.x, l(21) -bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r0.xyxx, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r0.xxxx -iadd r2.xy, r2.xyxx, r3.zwzz -ishl r0.y, r0.x, l(11) -and r0.x, r0.x, l(0x001f0000) -bfi r0.x, l(21), l(0), r0.x, r0.y -iadd r4.xzw, r0.xxxx, r2.xxxx -iadd r4.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw -ushr r1.x, r1.y, l(21) -bfi r0.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.yxyy, l(0, 0, 0, 0) -ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy -iadd r0.xy, r0.xyxx, r2.xyxx -ishl r2.x, r1.y, l(11) -and r1.y, r1.y, l(0x001f0000) -bfi r1.y, l(21), l(0), r1.y, r2.x -iadd r4.xzw, r0.xxxx, r1.yyyy -iadd r4.y, r0.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw -iadd r0.x, r0.w, l(5) -ushr r1.x, r1.z, l(21) -bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.zxzz, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.zzzz -iadd r2.xy, r2.xyxx, r3.zwzz -ishl r0.y, r1.z, l(11) -and r1.y, r1.z, l(0x001f0000) -bfi r0.y, l(21), l(0), r1.y, r0.y -iadd r4.xzw, r0.yyyy, r2.xxxx -iadd r4.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ushr r1.x, r1.w, l(21) -bfi r0.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) -ubfe r1.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.wwww -iadd r0.xy, r0.xyxx, r1.xyxx -ishl r0.w, r1.w, l(11) -and r1.x, r1.w, l(0x001f0000) -bfi r0.w, l(21), l(0), r1.x, r0.w -iadd r1.xzw, r0.wwww, r0.xxxx -iadd r1.y, r0.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r6.zzzz, r1.xyzw -ld r0.xy, r2.wwww, T0[0].yxzw -if_nz r3.x - ishl r1.xy, r0.yxyy, l(8, 8, 0, 0) - ushr r1.zw, r0.yyyx, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xy, r1.wzww, r1.yxyy -endif -if_nz r3.y - ushr r1.xy, r0.yxyy, l(16, 16, 0, 0) - bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.yxyy - mov r1.x, r0.y -else - mov r1.x, r0.y -endif -ushr r1.y, r1.x, l(21) -bfi r1.yz, l(0, 10, 27, 0), l(0, 6, 5, 0), r1.xxyx, l(0, 0, 0, 0) -ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.xxxx -iadd r1.yz, r1.yyzy, r2.xxyx -ishl r0.w, r1.x, l(11) -and r1.x, r1.x, l(0x001f0000) -bfi r0.w, l(21), l(0), r1.x, r0.w -iadd r2.xzw, r0.wwww, r1.yyyy -iadd r2.y, r1.z, l(0xffff0000) -store_uav_typed U0[0].xyzw, r6.wwww, r2.xyzw -iadd r0.w, r0.z, l(5) -ushr r0.y, r0.x, l(21) -bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r0.xyxx, l(0, 0, 0, 0) -ubfe r1.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r0.xxxx -iadd r1.xy, r1.xyxx, r1.zwzz -ishl r0.y, r0.x, l(11) -and r0.x, r0.x, l(0x001f0000) -bfi r0.x, l(21), l(0), r0.x, r0.y -iadd r2.xzw, r0.xxxx, r1.xxxx -iadd r2.y, r1.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r2.xyzw -ret -// Approximately 354 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.cso deleted file mode 100644 index 7b37530c7..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.h deleted file mode 100644 index 716049618..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.h +++ /dev/null @@ -1,557 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r10g11b11_rgba16.cs.hlsl -const uint8_t texture_load_r10g11b11_rgba16_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x2D, 0x5F, 0xF4, 0xE3, 0xAB, 0x40, 0xA6, 0xEA, - 0xA8, 0xFF, 0x90, 0x79, 0x46, 0xE7, 0xB6, 0x3C, 0x01, 0x00, 0x00, 0x00, - 0xEC, 0x19, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x50, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0xFF, 0xFF, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA6, 0x0A, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x93, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.txt deleted file mode 100644 index ab2ac6c21..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.txt +++ /dev/null @@ -1,198 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 6 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(3) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].zwxy -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r2.y - ushr r3.xyzw, r1.zwxy, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.zwxy - mov r3.xy, r1.zwzz -else - mov r3.xy, r1.zwzz -endif -ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r2.zw, r3.xxxy, l(0, 0, 11, 11) -and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r2.zzzw -iadd r3.xz, r2.zzwz, r4.xxzx -iadd r3.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r1.zw, r1.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r1.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r1.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r1.zw, r1.xxxy, l(0, 0, 11, 11) -and r1.xy, r1.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r1.xyxx, r1.zwzz -iadd r1.xz, r1.xxyx, r4.xxzx -iadd r1.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r3.xyz, r0.yyyy, l(1, 2, 3, 0) -store_uav_typed U0[0].xyzw, r3.xxxx, r1.xyzw -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r1.xyzw, r0.xxxx, T0[0].zwxy -if_nz r2.x - ishl r4.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.zwxy, r5.zwxy -endif -if_nz r2.y - ushr r2.xyzw, r1.zwxy, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.zwxy - mov r2.xy, r1.zwzz -else - mov r2.xy, r1.zwzz -endif -ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r0.xz, r2.xxyx, l(11, 0, 11, 0) -and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.xxzx -iadd r2.xz, r0.xxzx, r4.xxzx -iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r1.zw, r1.xxxy, l(0, 0, 21, 21) -bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r1.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r1.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r0.xz, r1.xxyx, l(11, 0, 11, 0) -and r1.xy, r1.xyxx, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.xxzx -iadd r1.xz, r0.xxzx, r4.xxzx -iadd r1.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r3.yyyy, r2.xyzw -store_uav_typed U0[0].xyzw, r3.zzzz, r1.xyzw -ret -// Approximately 147 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.cso deleted file mode 100644 index 6eaa2656e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.h deleted file mode 100644 index 033765d50..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.h +++ /dev/null @@ -1,2592 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r10g11b11_rgba16_snorm_2x.cs.hlsl -const uint8_t texture_load_r10g11b11_rgba16_snorm_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x90, 0x41, 0x78, 0x15, 0xEE, 0x1E, 0xB1, 0x33, - 0xB8, 0x74, 0xC6, 0x54, 0xC0, 0x55, 0xFB, 0x80, 0x01, 0x00, 0x00, 0x00, - 0x48, 0x79, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.txt deleted file mode 100644 index 927f2e617..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.txt +++ /dev/null @@ -1,863 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(3) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xyzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -and r1.zw, r2.xxxy, l(0, 0, 1023, 1023) -ubfe r3.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.xyxy -ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw -movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r4.xxxy -iadd r1.zw, r3.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r4.zzzw, r1.zzzw -iadd r1.zw, r3.xxxy, r1.zzzw -ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.xyxx -ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) -movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.zw, r3.zzzw, r4.xxxy -iadd r3.zw, r3.xxxy, r3.zzzw -ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) -ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) -or r3.zw, r3.zzzw, r4.xxxy -xor r3.zw, r4.zzzw, r3.zzzw -iadd r3.xy, r3.xyxx, r3.zwzz -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r3.xz, r1.zzwz, r3.xxyx -ushr r1.zw, r2.xxxy, l(0, 0, 21, 21) -ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) -ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw -movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r4.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r4.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r3.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.zw, r2.zzzw, l(0, 0, 1023, 1023) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.zwzw -ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r4.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r4.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.zwzz -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r2.xyxx, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r2.xy, r2.xyxx, r4.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r4.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r2.zzzw, l(0, 0, 21, 21) -ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) -ieq r2.zw, r1.zzzw, l(0, 0, 1024, 1024) -movc r1.zw, r2.zzzw, l(0,0,1025,1025), r1.zzzw -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r2.zw, r1.zzzw, l(0, 0, 5, 5) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r2.zzzw -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r3.xyzw, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -and r2.xw, r3.xxxy, l(1023, 0, 0, 1023) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy -ieq r5.xy, r2.xwxx, l(512, 512, 0, 0) -movc r2.xw, r5.xxxy, l(513,0,0,513), r2.xxxw -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r5.xxxy -iadd r2.xw, r4.xxxy, r2.xxxw -ishl r5.xy, r2.xwxx, l(6, 6, 0, 0) -ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) -or r2.xw, r2.xxxw, r5.xxxy -xor r2.xw, r5.zzzw, r2.xxxw -iadd r2.xw, r4.xxxy, r2.xxxw -ubfe r4.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.xyxx -ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.zw, r4.zzzw, r5.xxxy -iadd r4.zw, r4.xxxy, r4.zzzw -ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) -ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) -or r4.zw, r4.zzzw, r5.xxxy -xor r4.zw, r5.zzzw, r4.zzzw -iadd r4.xy, r4.xyxx, r4.zwzz -ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) -or r4.xz, r2.xxwx, r4.xxyx -ushr r2.xw, r3.xxxy, l(21, 0, 0, 21) -ushr r3.xy, r2.xwxx, l(10, 10, 0, 0) -ieq r5.xy, r2.xwxx, l(1024, 1024, 0, 0) -movc r2.xw, r5.xxxy, l(1025,0,0,1025), r2.xxxw -movc r5.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r5.xxxy -iadd r2.xw, r3.xxxy, r2.xxxw -ishl r5.xy, r2.xwxx, l(5, 5, 0, 0) -ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) -or r2.xw, r2.xxxw, r5.xxxy -xor r2.xw, r5.zzzw, r2.xxxw -iadd r2.xw, r3.xxxy, r2.xxxw -or r4.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r2.xw, r3.zzzw, l(1023, 0, 0, 1023) -ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw -ieq r3.xy, r2.xwxx, l(512, 512, 0, 0) -movc r2.xw, r3.xxxy, l(513,0,0,513), r2.xxxw -movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r6.xxxy -iadd r2.xw, r5.xxxy, r2.xxxw -ishl r3.xy, r2.xwxx, l(6, 6, 0, 0) -ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) -or r2.xw, r2.xxxw, r3.xxxy -xor r2.xw, r6.zzzw, r2.xxxw -iadd r2.xw, r5.xxxy, r2.xxxw -ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.zwzz -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r3.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r3.xy, r3.xyxx, r5.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r5.xz, r2.xxwx, r3.xxyx -ushr r2.xw, r3.zzzw, l(21, 0, 0, 21) -ushr r3.xy, r2.xwxx, l(10, 10, 0, 0) -ieq r3.zw, r2.xxxw, l(0, 0, 1024, 1024) -movc r2.xw, r3.zzzw, l(1025,0,0,1025), r2.xxxw -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r6.xxxy -iadd r2.xw, r3.xxxy, r2.xxxw -ishl r3.zw, r2.xxxw, l(0, 0, 5, 5) -ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) -or r2.xw, r2.xxxw, r3.zzzw -xor r2.xw, r6.zzzw, r2.xxxw -iadd r2.xw, r3.xxxy, r2.xxxw -or r5.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -iadd r3.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyzw -iadd r1.z, r1.z, l(1) -store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyzw -ld r4.xyzw, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -and r1.zw, r4.xxxy, l(0, 0, 1023, 1023) -ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.xyxy -ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw -movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r6.xxxy -iadd r1.zw, r5.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r6.zzzw, r1.zzzw -iadd r1.zw, r5.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.xyxx -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r2.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r2.xy, r2.xyxx, r5.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r5.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r4.xxxy, l(0, 0, 21, 21) -ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) -ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw -movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r6.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r6.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.zw, r4.zzzw, l(0, 0, 1023, 1023) -ubfe r6.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.zwzw -ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw -movc r7.xyzw, r6.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r7.xxxy -iadd r1.zw, r6.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r7.zzzw, r1.zzzw -iadd r1.zw, r6.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.zwzz -ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz -movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r6.xyxx -iadd r4.xy, r2.xyxx, r4.xyxx -ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r6.xyxx -xor r4.xy, r6.zwzz, r4.xyxx -iadd r2.xy, r2.xyxx, r4.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r6.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r4.zzzw, l(0, 0, 21, 21) -ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) -ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw -movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r4.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r4.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r6.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyzw -iadd r1.zw, r0.zzzz, r3.yyyw -store_uav_typed U0[0].xyzw, r1.zzzz, r6.xyzw -ld r2.xyzw, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw -endif -and r3.xy, r2.xyxx, l(1023, 1023, 0, 0) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.xyxy -ieq r5.xy, r3.xyxx, l(512, 512, 0, 0) -movc r3.xy, r5.xyxx, l(513,513,0,0), r3.xyxx -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r5.xyxx -iadd r3.xy, r4.xyxx, r3.xyxx -ishl r5.xy, r3.xyxx, l(6, 6, 0, 0) -ushr r3.xy, r3.xyxx, l(3, 3, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -xor r3.xy, r5.zwzz, r3.xyxx -iadd r3.xy, r4.xyxx, r3.xyxx -ubfe r4.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.xyxx -ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.zw, r4.zzzw, r5.xxxy -iadd r4.zw, r4.xxxy, r4.zzzw -ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) -ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) -or r4.zw, r4.zzzw, r5.xxxy -xor r4.zw, r5.zzzw, r4.zzzw -iadd r4.xy, r4.xyxx, r4.zwzz -ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) -or r4.xz, r3.xxyx, r4.xxyx -ushr r2.xy, r2.xyxx, l(21, 21, 0, 0) -ushr r3.xy, r2.xyxx, l(10, 10, 0, 0) -ieq r5.xy, r2.xyxx, l(1024, 1024, 0, 0) -movc r2.xy, r5.xyxx, l(1025,1025,0,0), r2.xyxx -movc r5.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r5.xyxx -iadd r2.xy, r3.xyxx, r2.xyxx -ishl r5.xy, r2.xyxx, l(5, 5, 0, 0) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -or r2.xy, r2.xyxx, r5.xyxx -xor r2.xy, r5.zwzz, r2.xyxx -iadd r2.xy, r3.xyxx, r2.xyxx -or r4.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -and r2.xy, r2.zwzz, l(1023, 1023, 0, 0) -ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.zwzw -ieq r3.xy, r2.xyxx, l(512, 512, 0, 0) -movc r2.xy, r3.xyxx, l(513,513,0,0), r2.xyxx -movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r6.xyxx -iadd r2.xy, r5.xyxx, r2.xyxx -ishl r3.xy, r2.xyxx, l(6, 6, 0, 0) -ushr r2.xy, r2.xyxx, l(3, 3, 0, 0) -or r2.xy, r2.xyxx, r3.xyxx -xor r2.xy, r6.zwzz, r2.xyxx -iadd r2.xy, r5.xyxx, r2.xyxx -ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.zwzz -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r3.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r3.xy, r3.xyxx, r5.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r5.xz, r2.xxyx, r3.xxyx -ushr r2.xy, r2.zwzz, l(21, 21, 0, 0) -ushr r2.zw, r2.xxxy, l(0, 0, 10, 10) -ieq r3.xy, r2.xyxx, l(1024, 1024, 0, 0) -movc r2.xy, r3.xyxx, l(1025,1025,0,0), r2.xyxx -movc r6.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r6.xyxx -iadd r2.xy, r2.zwzz, r2.xyxx -ishl r3.xy, r2.xyxx, l(5, 5, 0, 0) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -or r2.xy, r2.xyxx, r3.xyxx -xor r2.xy, r6.zwzz, r2.xyxx -iadd r2.xy, r2.zwzz, r2.xyxx -or r5.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw -iadd r2.xy, r1.zwzz, l(1, 1, 0, 0) -store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(8) -else - iadd r0.w, r0.x, l(4) -endif -ld r4.xyzw, r0.wwww, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -and r2.xz, r4.xxyx, l(1023, 0, 1023, 0) -ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.xyxy -ieq r3.xy, r2.xzxx, l(512, 512, 0, 0) -movc r2.xz, r3.xxyx, l(513,0,513,0), r2.xxzx -movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r6.xxyx -iadd r2.xz, r5.xxyx, r2.xxzx -ishl r3.xy, r2.xzxx, l(6, 6, 0, 0) -ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) -or r2.xz, r2.xxzx, r3.xxyx -xor r2.xz, r6.zzwz, r2.xxzx -iadd r2.xz, r5.xxyx, r2.xxzx -ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.xyxx -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r3.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r3.xy, r3.xyxx, r5.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r5.xz, r2.xxzx, r3.xxyx -ushr r2.xz, r4.xxyx, l(21, 0, 21, 0) -ushr r3.xy, r2.xzxx, l(10, 10, 0, 0) -ieq r4.xy, r2.xzxx, l(1024, 1024, 0, 0) -movc r2.xz, r4.xxyx, l(1025,0,1025,0), r2.xxzx -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r6.xxyx -iadd r2.xz, r3.xxyx, r2.xxzx -ishl r4.xy, r2.xzxx, l(5, 5, 0, 0) -ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) -or r2.xz, r2.xxzx, r4.xxyx -xor r2.xz, r6.zzwz, r2.xxzx -iadd r2.xz, r3.xxyx, r2.xxzx -or r5.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -and r2.xz, r4.zzwz, l(1023, 0, 1023, 0) -ubfe r6.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.zwzw -ieq r3.xy, r2.xzxx, l(512, 512, 0, 0) -movc r2.xz, r3.xxyx, l(513,0,513,0), r2.xxzx -movc r7.xyzw, r6.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r7.xxyx -iadd r2.xz, r6.xxyx, r2.xxzx -ishl r3.xy, r2.xzxx, l(6, 6, 0, 0) -ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) -or r2.xz, r2.xxzx, r3.xxyx -xor r2.xz, r7.zzwz, r2.xxzx -iadd r2.xz, r6.xxyx, r2.xxzx -ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.zwzz -ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r6.xyxx -iadd r4.xy, r3.xyxx, r4.xyxx -ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r6.xyxx -xor r4.xy, r6.zwzz, r4.xyxx -iadd r3.xy, r3.xyxx, r4.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r6.xz, r2.xxzx, r3.xxyx -ushr r2.xz, r4.zzwz, l(21, 0, 21, 0) -ushr r3.xy, r2.xzxx, l(10, 10, 0, 0) -ieq r4.xy, r2.xzxx, l(1024, 1024, 0, 0) -movc r2.xz, r4.xxyx, l(1025,0,1025,0), r2.xxzx -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r4.xxyx -iadd r2.xz, r3.xxyx, r2.xxzx -ishl r4.xy, r2.xzxx, l(5, 5, 0, 0) -ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) -or r2.xz, r2.xxzx, r4.xxyx -xor r2.xz, r4.zzwz, r2.xxzx -iadd r2.xz, r3.xxyx, r2.xxzx -or r6.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r3.wwww, r5.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r6.xyzw -iadd r2.xzw, r0.wwww, l(1, 0, 2, 3) -ld r3.xyzw, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -and r0.xw, r3.xxxy, l(1023, 0, 0, 1023) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy -ieq r1.zw, r0.xxxw, l(0, 0, 512, 512) -movc r0.xw, r1.zzzw, l(513,0,0,513), r0.xxxw -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r5.xxxy -iadd r0.xw, r4.xxxy, r0.xxxw -ishl r1.zw, r0.xxxw, l(0, 0, 6, 6) -ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) -or r0.xw, r0.xxxw, r1.zzzw -xor r0.xw, r5.zzzw, r0.xxxw -iadd r0.xw, r4.xxxy, r0.xxxw -ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 20, 20), r3.xxxy -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r1.zwzz, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r1.zw, r1.zzzw, r4.xxxy -ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) -or r4.xz, r0.xxwx, r1.zzwz -ushr r0.xw, r3.xxxy, l(21, 0, 0, 21) -ushr r1.zw, r0.xxxw, l(0, 0, 10, 10) -ieq r3.xy, r0.xwxx, l(1024, 1024, 0, 0) -movc r0.xw, r3.xxxy, l(1025,0,0,1025), r0.xxxw -movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r5.xxxy -iadd r0.xw, r1.zzzw, r0.xxxw -ishl r3.xy, r0.xwxx, l(5, 5, 0, 0) -ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) -or r0.xw, r0.xxxw, r3.xxxy -xor r0.xw, r5.zzzw, r0.xxxw -iadd r0.xw, r1.zzzw, r0.xxxw -or r4.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r0.xw, r3.zzzw, l(1023, 0, 0, 1023) -ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw -ieq r1.zw, r0.xxxw, l(0, 0, 512, 512) -movc r0.xw, r1.zzzw, l(513,0,0,513), r0.xxxw -movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r6.xxxy -iadd r0.xw, r5.xxxy, r0.xxxw -ishl r1.zw, r0.xxxw, l(0, 0, 6, 6) -ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) -or r0.xw, r0.xxxw, r1.zzzw -xor r0.xw, r6.zzzw, r0.xxxw -iadd r0.xw, r5.xxxy, r0.xxxw -ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 20, 20), r3.zzzw -ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz -movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r5.xyxx -iadd r3.xy, r1.zwzz, r3.xyxx -ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -xor r3.xy, r5.zwzz, r3.xyxx -iadd r1.zw, r1.zzzw, r3.xxxy -ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) -or r5.xz, r0.xxwx, r1.zzwz -ushr r0.xw, r3.zzzw, l(21, 0, 0, 21) -ushr r1.zw, r0.xxxw, l(0, 0, 10, 10) -ieq r3.xy, r0.xwxx, l(1024, 1024, 0, 0) -movc r0.xw, r3.xxxy, l(1025,0,0,1025), r0.xxxw -movc r3.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r3.xxxy -iadd r0.xw, r1.zzzw, r0.xxxw -ishl r3.xy, r0.xwxx, l(5, 5, 0, 0) -ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) -or r0.xw, r0.xxxw, r3.xxxy -xor r0.xw, r3.zzzw, r0.xxxw -iadd r0.xw, r1.zzzw, r0.xxxw -or r5.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw -ld r3.xyzw, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -and r1.zw, r3.xxxy, l(0, 0, 1023, 1023) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy -ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r4.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r4.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.xyxx -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r2.xyxx, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r2.xy, r2.xyxx, r4.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r4.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r3.xxxy, l(0, 0, 21, 21) -ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) -ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r3.xxxy -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.zw, r3.zzzw, l(0, 0, 1023, 1023) -ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw -ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw -movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r6.xxxy -iadd r1.zw, r5.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r6.zzzw, r1.zzzw -iadd r1.zw, r5.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.zwzz -ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r5.xyxx -iadd r3.xy, r2.xyxx, r3.xyxx -ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -xor r3.xy, r5.zwzz, r3.xyxx -iadd r2.xy, r2.xyxx, r3.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r5.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r3.zzzw, l(0, 0, 21, 21) -ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) -ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw -movc r3.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r3.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r3.xxxy -xor r1.zw, r3.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r0.x, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -ld r2.xyzw, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -and r0.yz, r2.xxyx, l(0, 1023, 1023, 0) -ubfe r1.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.xyxy -ieq r3.xy, r0.yzyy, l(512, 512, 0, 0) -movc r0.yz, r3.xxyx, l(0,513,513,0), r0.yyzy -movc r3.xyzw, r1.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r3.xxyx -iadd r0.yz, r1.xxyx, r0.yyzy -ishl r3.xy, r0.yzyy, l(6, 6, 0, 0) -ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) -or r0.yz, r0.yyzy, r3.xxyx -xor r0.yz, r3.zzwz, r0.yyzy -iadd r0.yz, r1.xxyx, r0.yyzy -ubfe r1.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.xyxx -ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw -movc r3.xyzw, r1.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r3.xxxy -iadd r1.zw, r1.xxxy, r1.zzzw -ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r3.xxxy -xor r1.zw, r3.zzzw, r1.zzzw -iadd r1.xy, r1.xyxx, r1.zwzz -ishl r1.xy, r1.xyxx, l(16, 16, 0, 0) -or r1.xz, r0.yyzy, r1.xxyx -ushr r0.yz, r2.xxyx, l(0, 21, 21, 0) -ushr r2.xy, r0.yzyy, l(10, 10, 0, 0) -ieq r3.xy, r0.yzyy, l(1024, 1024, 0, 0) -movc r0.yz, r3.xxyx, l(0,1025,1025,0), r0.yyzy -movc r3.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r3.xxyx -iadd r0.yz, r2.xxyx, r0.yyzy -ishl r3.xy, r0.yzyy, l(5, 5, 0, 0) -ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) -or r0.yz, r0.yyzy, r3.xxyx -xor r0.yz, r3.zzwz, r0.yyzy -iadd r0.yz, r2.xxyx, r0.yyzy -or r1.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) -and r0.yz, r2.zzwz, l(0, 1023, 1023, 0) -ubfe r3.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.zwzw -ieq r2.xy, r0.yzyy, l(512, 512, 0, 0) -movc r0.yz, r2.xxyx, l(0,513,513,0), r0.yyzy -movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r4.xxyx -iadd r0.yz, r3.xxyx, r0.yyzy -ishl r2.xy, r0.yzyy, l(6, 6, 0, 0) -ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) -or r0.yz, r0.yyzy, r2.xxyx -xor r0.yz, r4.zzwz, r0.yyzy -iadd r0.yz, r3.xxyx, r0.yyzy -ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.zwzz -ieq r3.xy, r3.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r3.zwzz -movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r4.xyxx -iadd r3.xy, r2.xyxx, r3.xyxx -ishl r3.zw, r3.xxxy, l(0, 0, 5, 5) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r3.zwzz -xor r3.xy, r4.zwzz, r3.xyxx -iadd r2.xy, r2.xyxx, r3.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r3.xz, r0.yyzy, r2.xxyx -ushr r0.yz, r2.zzwz, l(0, 21, 21, 0) -ushr r2.xy, r0.yzyy, l(10, 10, 0, 0) -ieq r2.zw, r0.yyyz, l(0, 0, 1024, 1024) -movc r0.yz, r2.zzwz, l(0,1025,1025,0), r0.yyzy -movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r4.xxyx -iadd r0.yz, r2.xxyx, r0.yyzy -ishl r2.zw, r0.yyyz, l(0, 0, 5, 5) -ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) -or r0.yz, r0.yyzy, r2.zzwz -xor r0.yz, r4.zzwz, r0.yyzy -iadd r0.yz, r2.xxyx, r0.yyzy -or r3.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.x, l(1) -store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw -ret -// Approximately 812 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.cso deleted file mode 100644 index d4c81bbdb..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.h deleted file mode 100644 index abc1580b0..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.h +++ /dev/null @@ -1,2277 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl -const uint8_t texture_load_r10g11b11_rgba16_snorm_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xD7, 0xB9, 0xA7, 0x57, 0x9A, 0x1F, 0x00, 0x66, - 0x47, 0xC2, 0xB2, 0x73, 0xB8, 0xB6, 0x14, 0x72, 0x01, 0x00, 0x00, 0x00, - 0x84, 0x6A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xE8, 0x69, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x5A, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x12, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.txt deleted file mode 100644 index 69b673a8d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.txt +++ /dev/null @@ -1,866 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) -imul null, r0.w, r0.w, CB0[0][1].y -ishl r0.y, r0.y, l(3) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -and r0.w, r1.x, l(1023) -ubfe r4.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx -ieq r2.x, r0.w, l(512) -movc r0.w, r2.x, l(513), r0.w -movc r5.xyzw, r4.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r5.x -iadd r0.w, r4.x, r0.w -ishl r2.x, r0.w, l(6) -ushr r0.w, r0.w, l(3) -or r0.w, r0.w, r2.x -xor r0.w, r5.y, r0.w -iadd r0.w, r4.x, r0.w -ieq r2.x, r4.y, l(1024) -movc r2.x, r2.x, l(1025), r4.y -xor r2.x, r5.z, r2.x -iadd r2.x, r4.z, r2.x -ishl r3.z, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r3.z -xor r2.x, r5.w, r2.x -iadd r2.x, r4.z, r2.x -ishl r2.x, r2.x, l(16) -or r4.xzw, r0.wwww, r2.xxxx -ushr r0.w, r1.x, l(21) -ushr r1.x, r0.w, l(10) -ieq r2.x, r0.w, l(1024) -movc r0.w, r2.x, l(1025), r0.w -movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r3.z -iadd r0.w, r1.x, r0.w -ishl r2.x, r0.w, l(5) -ushr r0.w, r0.w, l(5) -or r0.w, r0.w, r2.x -xor r0.w, r3.w, r0.w -iadd r0.w, r1.x, r0.w -or r4.y, r0.w, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) -and r0.w, r1.y, l(1023) -ubfe r5.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy -ieq r1.x, r0.w, l(512) -movc r0.w, r1.x, l(513), r0.w -movc r6.xyzw, r5.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r6.x -iadd r0.w, r5.x, r0.w -ishl r1.x, r0.w, l(6) -ushr r0.w, r0.w, l(3) -or r0.w, r0.w, r1.x -xor r0.w, r6.y, r0.w -iadd r0.w, r5.x, r0.w -ieq r1.x, r5.y, l(1024) -movc r1.x, r1.x, l(1025), r5.y -xor r1.x, r6.z, r1.x -iadd r1.x, r5.z, r1.x -ishl r2.x, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r2.x -xor r1.x, r6.w, r1.x -iadd r1.x, r5.z, r1.x -ishl r1.x, r1.x, l(16) -or r5.xzw, r0.wwww, r1.xxxx -ushr r0.w, r1.y, l(21) -ushr r1.x, r0.w, l(10) -ieq r1.y, r0.w, l(1024) -movc r0.w, r1.y, l(1025), r0.w -movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r3.z -iadd r0.w, r1.x, r0.w -ishl r1.y, r0.w, l(5) -ushr r0.w, r0.w, l(5) -or r0.w, r0.w, r1.y -xor r0.w, r3.w, r0.w -iadd r0.w, r1.x, r0.w -or r5.y, r0.w, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw -and r0.w, r1.z, l(1023) -ubfe r5.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz -ieq r1.x, r0.w, l(512) -movc r0.w, r1.x, l(513), r0.w -movc r6.xyzw, r5.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r6.x -iadd r0.w, r5.x, r0.w -ishl r1.x, r0.w, l(6) -ushr r0.w, r0.w, l(3) -or r0.w, r0.w, r1.x -xor r0.w, r6.y, r0.w -iadd r0.w, r5.x, r0.w -ieq r1.x, r5.y, l(1024) -movc r1.x, r1.x, l(1025), r5.y -xor r1.x, r6.z, r1.x -iadd r1.x, r5.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r6.w, r1.x -iadd r1.x, r5.z, r1.x -ishl r1.x, r1.x, l(16) -or r5.xzw, r0.wwww, r1.xxxx -ushr r0.w, r1.z, l(21) -ushr r1.x, r0.w, l(10) -ieq r1.y, r0.w, l(1024) -movc r0.w, r1.y, l(1025), r0.w -movc r1.yz, r1.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) -xor r0.w, r0.w, r1.y -iadd r0.w, r1.x, r0.w -ishl r1.y, r0.w, l(5) -ushr r0.w, r0.w, l(5) -or r0.w, r0.w, r1.y -xor r0.w, r1.z, r0.w -iadd r0.w, r1.x, r0.w -or r5.y, r0.w, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw -iadd r0.w, r0.z, r0.y -and r1.x, r1.w, l(1023) -ubfe r5.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww -ieq r1.y, r1.x, l(512) -movc r1.x, r1.y, l(513), r1.x -movc r6.xyzw, r5.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r6.x -iadd r1.x, r5.x, r1.x -ishl r1.y, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.y -xor r1.x, r6.y, r1.x -ieq r1.y, r5.y, l(1024) -movc r1.y, r1.y, l(1025), r5.y -xor r1.y, r6.z, r1.y -iadd r1.xy, r5.xzxx, r1.xyxx -ishl r1.z, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r1.z -xor r1.y, r6.w, r1.y -iadd r1.y, r5.z, r1.y -ishl r1.y, r1.y, l(16) -or r5.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.w, l(21) -ushr r1.y, r1.x, l(10) -ieq r1.z, r1.x, l(1024) -movc r1.x, r1.z, l(1025), r1.x -movc r1.zw, r1.yyyy, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.z, r1.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.z -xor r1.x, r1.w, r1.x -iadd r1.x, r1.y, r1.x -or r5.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r3.y - ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw -endif -iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) -and r2.x, r1.x, l(1023) -ubfe r6.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx -ieq r2.y, r2.x, l(512) -movc r2.x, r2.y, l(513), r2.x -movc r7.xyzw, r6.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r2.x, r2.x, r7.x -iadd r2.x, r6.x, r2.x -ishl r2.y, r2.x, l(6) -ushr r2.x, r2.x, l(3) -or r2.x, r2.x, r2.y -xor r2.x, r7.y, r2.x -ieq r2.y, r6.y, l(1024) -movc r2.y, r2.y, l(1025), r6.y -xor r2.y, r7.z, r2.y -iadd r2.xy, r6.xzxx, r2.xyxx -ishl r2.z, r2.y, l(5) -ushr r2.y, r2.y, l(5) -or r2.y, r2.y, r2.z -xor r2.y, r7.w, r2.y -iadd r2.y, r6.z, r2.y -ishl r2.y, r2.y, l(16) -or r6.xzw, r2.yyyy, r2.xxxx -ushr r1.x, r1.x, l(21) -ushr r2.x, r1.x, l(10) -ieq r2.y, r1.x, l(1024) -movc r1.x, r2.y, l(1025), r1.x -movc r2.yz, r2.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) -xor r1.x, r1.x, r2.y -iadd r1.x, r2.x, r1.x -ishl r2.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r2.y -xor r1.x, r2.z, r1.x -iadd r1.x, r2.x, r1.x -or r6.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw -and r1.x, r1.y, l(1023) -ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy -ieq r3.z, r1.x, l(512) -movc r1.x, r3.z, l(513), r1.x -movc r6.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r6.x -iadd r1.x, r2.x, r1.x -ishl r3.z, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r3.z -xor r1.x, r6.y, r1.x -iadd r1.x, r2.x, r1.x -ieq r2.x, r2.y, l(1024) -movc r2.x, r2.x, l(1025), r2.y -xor r2.x, r6.z, r2.x -iadd r2.x, r2.z, r2.x -ishl r2.y, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r2.y -xor r2.x, r6.w, r2.x -iadd r2.x, r2.z, r2.x -ishl r2.x, r2.x, l(16) -or r6.xzw, r1.xxxx, r2.xxxx -ushr r1.x, r1.y, l(21) -ushr r1.y, r1.x, l(10) -ieq r2.x, r1.x, l(1024) -movc r1.x, r2.x, l(1025), r1.x -movc r2.xy, r1.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r1.x, r1.x, r2.x -iadd r1.x, r1.y, r1.x -ishl r2.x, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r2.x -xor r1.x, r2.y, r1.x -iadd r1.x, r1.y, r1.x -or r6.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -and r1.x, r1.z, l(1023) -ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz -ieq r1.y, r1.x, l(512) -movc r1.x, r1.y, l(513), r1.x -movc r6.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r6.x -iadd r1.x, r2.x, r1.x -ishl r1.y, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.y -xor r1.x, r6.y, r1.x -ieq r1.y, r2.y, l(1024) -movc r1.y, r1.y, l(1025), r2.y -xor r1.y, r6.z, r1.y -iadd r1.xy, r2.xzxx, r1.xyxx -ishl r2.x, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r2.x -xor r1.y, r6.w, r1.y -iadd r1.y, r2.z, r1.y -ishl r1.y, r1.y, l(16) -or r6.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.z, l(21) -ushr r1.y, r1.x, l(10) -ieq r1.z, r1.x, l(1024) -movc r1.x, r1.z, l(1025), r1.x -movc r2.xy, r1.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r1.x, r1.x, r2.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.z -xor r1.x, r2.y, r1.x -iadd r1.x, r1.y, r1.x -or r6.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw -iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) -and r1.x, r1.w, l(1023) -ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww -ieq r1.y, r1.x, l(512) -movc r1.x, r1.y, l(513), r1.x -movc r7.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r7.x -iadd r1.x, r2.x, r1.x -ishl r1.y, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.y -xor r1.x, r7.y, r1.x -ieq r1.y, r2.y, l(1024) -movc r1.y, r1.y, l(1025), r2.y -xor r1.y, r7.z, r1.y -iadd r1.xy, r2.xzxx, r1.xyxx -ishl r1.z, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r1.z -xor r1.y, r7.w, r1.y -iadd r1.y, r2.z, r1.y -ishl r1.y, r1.y, l(16) -or r7.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.w, l(21) -ushr r1.y, r1.x, l(10) -ieq r1.z, r1.x, l(1024) -movc r1.x, r1.z, l(1025), r1.x -movc r1.zw, r1.yyyy, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.z, r1.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.z -xor r1.x, r1.w, r1.x -iadd r1.x, r1.y, r1.x -or r7.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw -ld r1.xy, r2.wwww, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r1.zw, r2.xxxx, T0[0].zwxy -if_nz r3.x - ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r3.y - ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw -endif -and r0.x, r1.x, l(1023) -ubfe r7.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx -ieq r2.x, r0.x, l(512) -movc r0.x, r2.x, l(513), r0.x -movc r8.xyzw, r7.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r8.x -iadd r0.x, r7.x, r0.x -ishl r2.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r2.x -xor r0.x, r8.y, r0.x -iadd r0.x, r7.x, r0.x -ieq r2.x, r7.y, l(1024) -movc r2.x, r2.x, l(1025), r7.y -xor r2.x, r8.z, r2.x -iadd r2.x, r7.z, r2.x -ishl r3.z, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r3.z -xor r2.x, r8.w, r2.x -iadd r2.x, r7.z, r2.x -ishl r2.x, r2.x, l(16) -or r7.xzw, r0.xxxx, r2.xxxx -ushr r0.x, r1.x, l(21) -ushr r1.x, r0.x, l(10) -ieq r2.x, r0.x, l(1024) -movc r0.x, r2.x, l(1025), r0.x -movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r3.z -iadd r0.x, r1.x, r0.x -ishl r2.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r2.x -xor r0.x, r3.w, r0.x -iadd r0.x, r1.x, r0.x -or r7.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw -and r0.x, r1.y, l(1023) -ubfe r7.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy -ieq r1.x, r0.x, l(512) -movc r0.x, r1.x, l(513), r0.x -movc r8.xyzw, r7.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r8.x -iadd r0.x, r7.x, r0.x -ishl r1.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r1.x -xor r0.x, r8.y, r0.x -iadd r0.x, r7.x, r0.x -ieq r1.x, r7.y, l(1024) -movc r1.x, r1.x, l(1025), r7.y -xor r1.x, r8.z, r1.x -iadd r1.x, r7.z, r1.x -ishl r2.x, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r2.x -xor r1.x, r8.w, r1.x -iadd r1.x, r7.z, r1.x -ishl r1.x, r1.x, l(16) -or r7.xzw, r0.xxxx, r1.xxxx -ushr r0.x, r1.y, l(21) -ushr r1.x, r0.x, l(10) -ieq r1.y, r0.x, l(1024) -movc r0.x, r1.y, l(1025), r0.x -movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r3.z -iadd r0.x, r1.x, r0.x -ishl r1.y, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r1.y -xor r0.x, r3.w, r0.x -iadd r0.x, r1.x, r0.x -or r7.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw -and r0.x, r1.z, l(1023) -ubfe r4.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz -ieq r1.x, r0.x, l(512) -movc r0.x, r1.x, l(513), r0.x -movc r7.xyzw, r4.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r7.x -iadd r0.x, r4.x, r0.x -ishl r1.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r1.x -xor r0.x, r7.y, r0.x -iadd r0.x, r4.x, r0.x -ieq r1.x, r4.y, l(1024) -movc r1.x, r1.x, l(1025), r4.y -xor r1.x, r7.z, r1.x -iadd r1.x, r4.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r7.w, r1.x -iadd r1.x, r4.z, r1.x -ishl r1.x, r1.x, l(16) -or r7.xzw, r0.xxxx, r1.xxxx -ushr r0.x, r1.z, l(21) -ushr r1.x, r0.x, l(10) -ieq r1.y, r0.x, l(1024) -movc r0.x, r1.y, l(1025), r0.x -movc r1.yz, r1.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) -xor r0.x, r0.x, r1.y -iadd r0.x, r1.x, r0.x -ishl r1.y, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r1.y -xor r0.x, r1.z, r0.x -iadd r0.x, r1.x, r0.x -or r7.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw -iadd r0.x, r0.y, l(5) -and r1.x, r1.w, l(1023) -ubfe r4.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww -ieq r1.y, r1.x, l(512) -movc r1.x, r1.y, l(513), r1.x -movc r7.xyzw, r4.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r7.x -iadd r1.x, r4.x, r1.x -ishl r1.y, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.y -xor r1.x, r7.y, r1.x -ieq r1.y, r4.y, l(1024) -movc r1.y, r1.y, l(1025), r4.y -xor r1.y, r7.z, r1.y -iadd r1.xy, r4.xzxx, r1.xyxx -ishl r1.z, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r1.z -xor r1.y, r7.w, r1.y -iadd r1.y, r4.z, r1.y -ishl r1.y, r1.y, l(16) -or r4.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.w, l(21) -ushr r1.y, r1.x, l(10) -ieq r1.z, r1.x, l(1024) -movc r1.x, r1.z, l(1025), r1.x -movc r1.zw, r1.yyyy, l(0,0,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.z, r1.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.z -xor r1.x, r1.w, r1.x -iadd r1.x, r1.y, r1.x -or r4.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -and r0.x, r1.x, l(1023) -ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx -ieq r0.y, r0.x, l(512) -movc r0.x, r0.y, l(513), r0.x -movc r4.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r4.x -iadd r0.x, r2.x, r0.x -ishl r0.y, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r0.y -xor r0.x, r4.y, r0.x -ieq r0.y, r2.y, l(1024) -movc r0.y, r0.y, l(1025), r2.y -xor r0.y, r4.z, r0.y -iadd r0.xy, r2.xzxx, r0.xyxx -ishl r2.x, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r2.x -xor r0.y, r4.w, r0.y -iadd r0.y, r2.z, r0.y -ishl r0.y, r0.y, l(16) -or r4.xzw, r0.yyyy, r0.xxxx -ushr r0.x, r1.x, l(21) -ushr r0.y, r0.x, l(10) -ieq r1.x, r0.x, l(1024) -movc r0.x, r1.x, l(1025), r0.x -movc r2.xy, r0.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r2.x -iadd r0.x, r0.y, r0.x -ishl r1.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r1.x -xor r0.x, r2.y, r0.x -iadd r0.x, r0.y, r0.x -or r4.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw -and r0.x, r1.y, l(1023) -ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy -ieq r0.y, r0.x, l(512) -movc r0.x, r0.y, l(513), r0.x -movc r4.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r4.x -iadd r0.x, r2.x, r0.x -ishl r0.y, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r0.y -xor r0.x, r4.y, r0.x -ieq r0.y, r2.y, l(1024) -movc r0.y, r0.y, l(1025), r2.y -xor r0.y, r4.z, r0.y -iadd r0.xy, r2.xzxx, r0.xyxx -ishl r1.x, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r1.x -xor r0.y, r4.w, r0.y -iadd r0.y, r2.z, r0.y -ishl r0.y, r0.y, l(16) -or r4.xzw, r0.yyyy, r0.xxxx -ushr r0.x, r1.y, l(21) -ushr r0.y, r0.x, l(10) -ieq r1.x, r0.x, l(1024) -movc r0.x, r1.x, l(1025), r0.x -movc r1.xy, r0.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r1.x -iadd r0.x, r0.y, r0.x -ishl r1.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r1.x -xor r0.x, r1.y, r0.x -iadd r0.x, r0.y, r0.x -or r4.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw -iadd r0.x, r0.w, l(5) -and r0.y, r1.z, l(1023) -ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz -ieq r1.x, r0.y, l(512) -movc r0.y, r1.x, l(513), r0.y -movc r4.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.y, r0.y, r4.x -iadd r0.y, r2.x, r0.y -ishl r1.x, r0.y, l(6) -ushr r0.y, r0.y, l(3) -or r0.y, r0.y, r1.x -xor r0.y, r4.y, r0.y -iadd r0.y, r2.x, r0.y -ieq r1.x, r2.y, l(1024) -movc r1.x, r1.x, l(1025), r2.y -xor r1.x, r4.z, r1.x -iadd r1.x, r2.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r4.w, r1.x -iadd r1.x, r2.z, r1.x -ishl r1.x, r1.x, l(16) -or r4.xzw, r0.yyyy, r1.xxxx -ushr r0.y, r1.z, l(21) -ushr r1.x, r0.y, l(10) -ieq r1.y, r0.y, l(1024) -movc r0.y, r1.y, l(1025), r0.y -movc r1.yz, r1.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) -xor r0.y, r0.y, r1.y -iadd r0.y, r1.x, r0.y -ishl r1.y, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r1.y -xor r0.y, r1.z, r0.y -iadd r0.y, r1.x, r0.y -or r4.y, r0.y, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -and r0.x, r1.w, l(1023) -ubfe r1.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww -ieq r0.y, r0.x, l(512) -movc r0.x, r0.y, l(513), r0.x -movc r4.xyzw, r1.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r4.x -iadd r0.x, r1.x, r0.x -ishl r0.y, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r0.y -xor r0.x, r4.y, r0.x -ieq r0.y, r1.y, l(1024) -movc r0.y, r0.y, l(1025), r1.y -xor r0.y, r4.z, r0.y -iadd r0.xy, r1.xzxx, r0.xyxx -ishl r0.w, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r0.w -xor r0.y, r4.w, r0.y -iadd r0.y, r1.z, r0.y -ishl r0.y, r0.y, l(16) -or r4.xzw, r0.yyyy, r0.xxxx -ushr r0.x, r1.w, l(21) -ushr r0.y, r0.x, l(10) -ieq r0.w, r0.x, l(1024) -movc r0.x, r0.w, l(1025), r0.x -movc r1.xy, r0.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r1.x -iadd r0.x, r0.y, r0.x -ishl r0.w, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r0.w -xor r0.x, r1.y, r0.x -iadd r0.x, r0.y, r0.x -or r4.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.zzzz, r4.xyzw -ld r0.xy, r2.wwww, T0[0].xyzw -if_nz r3.x - ishl r1.xy, r0.xyxx, l(8, 8, 0, 0) - ushr r1.zw, r0.xxxy, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xy, r1.zwzz, r1.xyxx -endif -if_nz r3.y - ushr r1.xy, r0.xyxx, l(16, 16, 0, 0) - bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.xyxx -endif -and r0.w, r0.x, l(1023) -ubfe r1.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r0.xxxx -ieq r1.w, r0.w, l(512) -movc r0.w, r1.w, l(513), r0.w -movc r2.xyzw, r1.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r2.x -iadd r0.w, r1.x, r0.w -ishl r1.w, r0.w, l(6) -ushr r0.xw, r0.xxxw, l(21, 0, 0, 3) -or r0.w, r0.w, r1.w -xor r0.w, r2.y, r0.w -iadd r0.w, r1.x, r0.w -ieq r1.x, r1.y, l(1024) -movc r1.x, r1.x, l(1025), r1.y -xor r1.x, r2.z, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r2.w, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.x, r1.x, l(16) -or r1.xzw, r0.wwww, r1.xxxx -ushr r0.w, r0.x, l(10) -ieq r2.x, r0.x, l(1024) -movc r0.x, r2.x, l(1025), r0.x -movc r2.xy, r0.wwww, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r2.x -iadd r0.x, r0.w, r0.x -ishl r2.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r2.x -xor r0.x, r2.y, r0.x -iadd r0.x, r0.w, r0.x -or r1.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.wwww, r1.xyzw -iadd r0.x, r0.z, l(5) -and r0.w, r0.y, l(1023) -ubfe r1.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r0.yyyy -ieq r1.w, r0.w, l(512) -movc r0.w, r1.w, l(513), r0.w -movc r2.xyzw, r1.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r2.x -iadd r0.w, r1.x, r0.w -ishl r1.w, r0.w, l(6) -ushr r0.yw, r0.yyyw, l(0, 21, 0, 3) -or r0.w, r0.w, r1.w -xor r0.w, r2.y, r0.w -iadd r0.w, r1.x, r0.w -ieq r1.x, r1.y, l(1024) -movc r1.x, r1.x, l(1025), r1.y -xor r1.x, r2.z, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r2.w, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.x, r1.x, l(16) -or r1.xzw, r0.wwww, r1.xxxx -ushr r0.w, r0.y, l(10) -ieq r2.x, r0.y, l(1024) -movc r0.y, r2.x, l(1025), r0.y -movc r2.xy, r0.wwww, l(2047,0x0000ffff,0,0), l(0,0,0,0) -xor r0.y, r0.y, r2.x -iadd r0.y, r0.w, r0.y -ishl r2.x, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r2.x -xor r0.y, r2.y, r0.y -iadd r0.y, r0.w, r0.y -or r1.y, r0.y, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ret -// Approximately 815 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.cso deleted file mode 100644 index cb1f9794e..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.h deleted file mode 100644 index e058c7fa8..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.h +++ /dev/null @@ -1,893 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r10g11b11_rgba16_snorm.cs.hlsl -const uint8_t texture_load_r10g11b11_rgba16_snorm_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xEC, 0x67, 0x89, 0x25, 0xC1, 0xE8, 0x69, 0x91, - 0xDA, 0xC1, 0xA5, 0x53, 0x21, 0x56, 0x07, 0x4C, 0x01, 0x00, 0x00, 0x00, - 0xA4, 0x29, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x08, 0x29, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.txt deleted file mode 100644 index 1165992f9..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.txt +++ /dev/null @@ -1,308 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 6 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(3) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -and r2.zw, r1.xxxy, l(0, 0, 1023, 1023) -ubfe r3.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r1.xyxy -ieq r4.xy, r2.zwzz, l(512, 512, 0, 0) -movc r2.zw, r4.xxxy, l(0,0,513,513), r2.zzzw -movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.zw, r2.zzzw, r4.xxxy -iadd r2.zw, r3.xxxy, r2.zzzw -ishl r4.xy, r2.zwzz, l(6, 6, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 3, 3) -or r2.zw, r2.zzzw, r4.xxxy -xor r2.zw, r4.zzzw, r2.zzzw -iadd r2.zw, r3.xxxy, r2.zzzw -ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r1.xyxx -ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) -movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.zw, r3.zzzw, r4.xxxy -iadd r3.zw, r3.xxxy, r3.zzzw -ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) -ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) -or r3.zw, r3.zzzw, r4.xxxy -xor r3.zw, r4.zzzw, r3.zzzw -iadd r3.xy, r3.xyxx, r3.zwzz -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r3.xz, r2.zzwz, r3.xxyx -ushr r1.xy, r1.xyxx, l(21, 21, 0, 0) -ushr r2.zw, r1.xxxy, l(0, 0, 10, 10) -ieq r4.xy, r1.xyxx, l(1024, 1024, 0, 0) -movc r1.xy, r4.xyxx, l(1025,1025,0,0), r1.xyxx -movc r4.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.xy, r1.xyxx, r4.xyxx -iadd r1.xy, r2.zwzz, r1.xyxx -ishl r4.xy, r1.xyxx, l(5, 5, 0, 0) -ushr r1.xy, r1.xyxx, l(5, 5, 0, 0) -or r1.xy, r1.xyxx, r4.xyxx -xor r1.xy, r4.zwzz, r1.xyxx -iadd r1.xy, r2.zwzz, r1.xyxx -or r3.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.xy, r1.zwzz, l(1023, 1023, 0, 0) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r1.zwzw -ieq r2.zw, r1.xxxy, l(0, 0, 512, 512) -movc r1.xy, r2.zwzz, l(513,513,0,0), r1.xyxx -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.xy, r1.xyxx, r5.xyxx -iadd r1.xy, r4.xyxx, r1.xyxx -ishl r2.zw, r1.xxxy, l(0, 0, 6, 6) -ushr r1.xy, r1.xyxx, l(3, 3, 0, 0) -or r1.xy, r1.xyxx, r2.zwzz -xor r1.xy, r5.zwzz, r1.xyxx -iadd r1.xy, r4.xyxx, r1.xyxx -ubfe r2.zw, l(0, 0, 1, 1), l(0, 0, 20, 20), r1.zzzw -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r2.zwzz, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r2.zw, r2.zzzw, r4.xxxy -ishl r2.zw, r2.zzzw, l(0, 0, 16, 16) -or r4.xz, r1.xxyx, r2.zzwz -ushr r1.xy, r1.zwzz, l(21, 21, 0, 0) -ushr r1.zw, r1.xxxy, l(0, 0, 10, 10) -ieq r2.zw, r1.xxxy, l(0, 0, 1024, 1024) -movc r1.xy, r2.zwzz, l(1025,1025,0,0), r1.xyxx -movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.xy, r1.xyxx, r5.xyxx -iadd r1.xy, r1.zwzz, r1.xyxx -ishl r2.zw, r1.xxxy, l(0, 0, 5, 5) -ushr r1.xy, r1.xyxx, l(5, 5, 0, 0) -or r1.xy, r1.xyxx, r2.zwzz -xor r1.xy, r5.zwzz, r1.xyxx -iadd r1.xy, r1.zwzz, r1.xyxx -or r4.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.xyz, r0.yyyy, l(1, 2, 3, 0) -store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r3.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw -endif -and r0.xz, r3.xxyx, l(1023, 0, 1023, 0) -ubfe r2.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy -ieq r1.xw, r0.xxxz, l(512, 0, 0, 512) -movc r0.xz, r1.xxwx, l(513,0,513,0), r0.xxzx -movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r4.xxyx -iadd r0.xz, r2.xxyx, r0.xxzx -ishl r1.xw, r0.xxxz, l(6, 0, 0, 6) -ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) -or r0.xz, r0.xxzx, r1.xxwx -xor r0.xz, r4.zzwz, r0.xxzx -iadd r0.xz, r2.xxyx, r0.xxzx -ubfe r1.xw, l(1, 0, 0, 1), l(20, 0, 0, 20), r3.xxxy -ieq r2.xy, r2.zwzz, l(1024, 1024, 0, 0) -movc r2.xy, r2.xyxx, l(1025,1025,0,0), r2.zwzz -movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r4.xyxx -iadd r2.xy, r1.xwxx, r2.xyxx -ishl r2.zw, r2.xxxy, l(0, 0, 5, 5) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -or r2.xy, r2.xyxx, r2.zwzz -xor r2.xy, r4.zwzz, r2.xyxx -iadd r1.xw, r1.xxxw, r2.xxxy -ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) -or r2.xz, r0.xxzx, r1.xxwx -ushr r0.xz, r3.xxyx, l(21, 0, 21, 0) -ushr r1.xw, r0.xxxz, l(10, 0, 0, 10) -ieq r3.xy, r0.xzxx, l(1024, 1024, 0, 0) -movc r0.xz, r3.xxyx, l(1025,0,1025,0), r0.xxzx -movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r4.xxyx -iadd r0.xz, r1.xxwx, r0.xxzx -ishl r3.xy, r0.xzxx, l(5, 5, 0, 0) -ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) -or r0.xz, r0.xxzx, r3.xxyx -xor r0.xz, r4.zzwz, r0.xxzx -iadd r0.xz, r1.xxwx, r0.xxzx -or r2.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -and r0.xz, r3.zzwz, l(1023, 0, 1023, 0) -ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw -ieq r1.xw, r0.xxxz, l(512, 0, 0, 512) -movc r0.xz, r1.xxwx, l(513,0,513,0), r0.xxzx -movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r5.xxyx -iadd r0.xz, r4.xxyx, r0.xxzx -ishl r1.xw, r0.xxxz, l(6, 0, 0, 6) -ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) -or r0.xz, r0.xxzx, r1.xxwx -xor r0.xz, r5.zzwz, r0.xxzx -iadd r0.xz, r4.xxyx, r0.xxzx -ubfe r1.xw, l(1, 0, 0, 1), l(20, 0, 0, 20), r3.zzzw -ieq r3.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r4.zwzz -movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r4.xyxx -iadd r3.xy, r1.xwxx, r3.xyxx -ishl r4.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r4.xyxx -xor r3.xy, r4.zwzz, r3.xyxx -iadd r1.xw, r1.xxxw, r3.xxxy -ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) -or r4.xz, r0.xxzx, r1.xxwx -ushr r0.xz, r3.zzwz, l(21, 0, 21, 0) -ushr r1.xw, r0.xxxz, l(10, 0, 0, 10) -ieq r3.xy, r0.xzxx, l(1024, 1024, 0, 0) -movc r0.xz, r3.xxyx, l(1025,0,1025,0), r0.xxzx -movc r3.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r3.xxyx -iadd r0.xz, r1.xxwx, r0.xxzx -ishl r3.xy, r0.xzxx, l(5, 5, 0, 0) -ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) -or r0.xz, r0.xxzx, r3.xxyx -xor r0.xz, r3.zzwz, r0.xxzx -iadd r0.xz, r1.xxwx, r0.xxzx -or r4.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -ret -// Approximately 257 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.cso deleted file mode 100644 index 6c057bb09..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.h deleted file mode 100644 index 7e4336eb7..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.h +++ /dev/null @@ -1,1277 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r11g11b10_rgba16_2x.cs.hlsl -const uint8_t texture_load_r11g11b10_rgba16_2x_cs[] = { - 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12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(3) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].zwxy -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -ushr r4.xyzw, r3.xyxy, l(22, 22, 1, 1) -mov r3.zw, r4.xxxy -bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r1.zw, r3.xxxy, l(0, 0, 10, 10) -and r3.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r1.zzzw -iadd r3.xz, r1.zzwz, r5.xxzx -iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r4.xyzw, r2.xyxy, l(22, 22, 1, 1) -mov r2.zw, r4.xxxy -bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r1.zw, r2.xxxy, l(0, 0, 10, 10) -and r2.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r2.xz, r1.zzwz, r5.xxzx -iadd r2.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw -iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r3.xyzw, r2.xxxx, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.zwxy, r5.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ushr r5.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.zw, r5.xxxy -bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r2.xw, r4.xxxy, l(10, 0, 0, 10) -and r4.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r4.xxxy, r2.xxxw -iadd r4.xz, r2.xxwx, r6.xxzx -iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r5.xyzw, r3.xyxy, l(22, 22, 1, 1) -mov r3.zw, r5.xxxy -bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r2.xw, r3.xxxy, l(10, 0, 0, 10) -and r3.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r3.xxxy, r2.xxxw -iadd r3.xz, r2.xxwx, r6.xxzx -iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -iadd r5.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw -iadd r1.z, r1.z, l(1) -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r2.yyyy, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.zw, r6.xxxy -bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r7.xyzw, r7.xyzw, r8.xyzw -ishl r1.zw, r4.xxxy, l(0, 0, 10, 10) -and r2.xy, r6.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r4.xz, r1.zzwz, r7.xxzx -iadd r4.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r6.xyzw, r3.xyxy, l(22, 22, 1, 1) -mov r3.zw, r6.xxxy -bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy -iadd r7.xyzw, r7.xyzw, r8.xyzw -ishl r1.zw, r3.xxxy, l(0, 0, 10, 10) -and r2.xy, r6.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r3.xz, r1.zzwz, r7.xxzx -iadd r3.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw -iadd r1.zw, r0.zzzz, r5.yyyw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r2.xyzw, r2.zzzz, T0[0].zwxy -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -ushr r4.xyzw, r3.xyxy, l(22, 22, 1, 1) -mov r3.zw, r4.xxxy -bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.zw, r4.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r3.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r3.zwzz, r3.xyxx -iadd r3.xz, r3.xxyx, r6.xxzx -iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r4.xyzw, r2.xyxy, l(22, 22, 1, 1) -mov r2.zw, r4.xxxy -bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r2.xy, r2.xyxx, l(10, 10, 0, 0) -and r2.zw, r4.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.zwzz, r2.xyxx -iadd r2.xz, r2.xxyx, r6.xxzx -iadd r2.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r5.zzzz, r3.xyzw -iadd r3.xy, r1.zwzz, l(1, 1, 0, 0) -store_uav_typed U0[0].xyzw, r3.xxxx, r2.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(8) -else - iadd r0.w, r0.x, l(4) -endif -ld r2.xyzw, r0.wwww, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.zwxy - mov r4.xy, r2.zwzz -else - mov r4.xy, r2.zwzz -endif -ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.zw, r6.xxxy -bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r7.xyzw, r7.xyzw, r8.xyzw -ishl r3.xz, r4.xxyx, l(10, 0, 10, 0) -and r4.xy, r6.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r3.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r4.xxyx, r3.xxzx -iadd r4.xz, r3.xxzx, r7.xxzx -iadd r4.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r6.xyzw, r2.xyxy, l(22, 22, 1, 1) -mov r2.zw, r6.xxxy -bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy -iadd r7.xyzw, r7.xyzw, r8.xyzw -ishl r2.xy, r2.xyxx, l(10, 10, 0, 0) -and r2.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.zwzz, r2.xyxx -iadd r2.xz, r2.xxyx, r7.xxzx -iadd r2.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw -iadd r2.xyz, r0.wwww, l(1, 2, 3, 0) -ld r4.xyzw, r2.xxxx, T0[0].zwxy -if_nz r1.x - ishl r5.xyzw, r4.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.zwxy, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.zwxy, r6.zwxy -endif -if_nz r1.y - ushr r5.xyzw, r4.zwxy, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.zwxy - mov r5.xy, r4.zwzz -else - mov r5.xy, r4.zwzz -endif -ushr r6.xyzw, r5.xyxy, l(22, 22, 1, 1) -mov r5.zw, r6.xxxy -bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r5.xzyw, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r5.xxyy -iadd r7.xyzw, r7.xyzw, r8.xyzw -ishl r0.xw, r5.xxxy, l(10, 0, 0, 10) -and r1.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw -iadd r5.xz, r0.xxwx, r7.xxzx -iadd r5.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.zw, r6.xxxy -bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r7.xyzw, r7.xyzw, r8.xyzw -ishl r0.xw, r4.xxxy, l(10, 0, 0, 10) -and r1.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw -iadd r4.xz, r0.xxwx, r7.xxzx -iadd r4.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyzw -ld r3.xyzw, r2.yyyy, T0[0].zwxy -if_nz r1.x - ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.zwxy, r5.zwxy -endif -if_nz r1.y - ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ushr r5.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.zw, r5.xxxy -bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r1.zw, r4.xxxy, l(0, 0, 10, 10) -and r2.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r4.xz, r1.zzwz, r6.xxzx -iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r5.xyzw, r3.xyxy, l(22, 22, 1, 1) -mov r3.zw, r5.xxxy -bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy -iadd r6.xyzw, r6.xyzw, r7.xyzw -ishl r1.zw, r3.xxxy, l(0, 0, 10, 10) -and r2.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw -iadd r3.xz, r1.zzwz, r6.xxzx -iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r0.x, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw -ld r2.xyzw, r2.zzzz, T0[0].zwxy -if_nz r1.x - ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r1.y - ushr r1.xyzw, r2.zwxy, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.zwxy - mov r1.xy, r2.zwzz -else - mov r1.xy, r2.zwzz -endif -ushr r3.xyzw, r1.xyxy, l(22, 22, 1, 1) -mov r1.zw, r3.xxxy -bfi r4.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r0.yz, r1.xxyx, l(0, 10, 10, 0) -and r1.xy, r3.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.yyzy -iadd r1.xz, r0.yyzy, r4.xxzx -iadd r1.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r3.xyzw, r2.xyxy, l(22, 22, 1, 1) -mov r2.zw, r3.xxxy -bfi r4.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy -iadd r4.xyzw, r4.xyzw, r5.xyzw -ishl r0.yz, r2.xxyx, l(0, 10, 10, 0) -and r2.xy, r3.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.yyzy -iadd r2.xz, r0.yyzy, r4.xxzx -iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.x, l(1) -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -ret -// Approximately 388 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.cso deleted file mode 100644 index 458ade11a..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.h deleted file mode 100644 index 644860c1a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.h +++ /dev/null @@ -1,1103 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r11g11b10_rgba16_3x.cs.hlsl -const uint8_t texture_load_r11g11b10_rgba16_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF7, 0xD6, 0x7D, 0x88, 0x02, 0xE3, 0xC8, 0x1F, - 0xA9, 0xEB, 0xEC, 0x61, 0x3A, 0x2F, 0x6B, 0x66, 0x01, 0x00, 0x00, 0x00, - 0x84, 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0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, - 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x4A, 0x01, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x72, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.txt deleted file mode 100644 index 948e77592..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.txt +++ /dev/null @@ -1,381 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 12 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) -imul null, r0.w, r0.w, CB0[0][1].y -ishl r0.y, r0.y, l(3) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw - mov r4.xyz, r1.xyzx -else - mov r4.xyz, r1.xyzx -endif -ushr r5.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.w, r5.x -bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r4.xxxw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r3.zw, r3.zzzw, r6.xxxy -ishl r7.xyz, r4.xyzx, l(10, 10, 10, 0) -and r5.zw, r5.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r5.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r5.zzzw, r7.xxxy -iadd r8.xzw, r3.zzzz, r5.zzzz -iadd r8.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r8.xyzw -iadd r8.xyzw, r0.yyyy, l(1, 2, 3, 4) -mov r5.x, r4.y -bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r5.xxxy, l(0, 0, 0, 0) -iadd r3.zw, r3.zzzw, r6.zzzw -iadd r5.xzw, r5.wwww, r3.zzzz -iadd r5.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r8.xxxx, r5.xyzw -ushr r4.xy, r4.zzzz, l(22, 1, 0, 0) -bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r4.zzzx, l(0, 0, 0, 0) -ubfe r4.xz, l(5, 0, 6, 0), l(6, 0, 26, 0), r4.zzzz -iadd r3.zw, r3.zzzw, r4.xxxz -and r0.w, r4.y, l(0x001f0000) -bfi r0.w, l(21), l(0), r0.w, r7.z -iadd r4.xzw, r0.wwww, r3.zzzz -iadd r4.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r8.yyyy, r4.xyzw -iadd r0.w, r0.z, r0.y -ushr r1.xy, r1.wwww, l(22, 1, 0, 0) -bfi r1.xz, l(11, 0, 26, 0), l(5, 0, 6, 0), r1.wwxw, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r1.wwww -iadd r1.xz, r1.xxzx, r3.zzwz -ishl r1.w, r1.w, l(10) -and r1.y, r1.y, l(0x001f0000) -bfi r1.y, l(21), l(0), r1.y, r1.w -iadd r4.xzw, r1.yyyy, r1.xxxx -iadd r4.y, r1.z, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r4.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw - mov r4.xyz, r1.xyzx -else - mov r4.xyz, r1.xyzx -endif -iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) -ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) -mov r4.w, r6.x -bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r4.xwxx, l(0, 0, 0, 0) -ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy -iadd r2.xy, r2.xyxx, r7.xyxx -ishl r9.xyz, r4.xyzx, l(10, 10, 10, 0) -and r3.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r3.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.zzzw, r9.xxxy -iadd r10.xzw, r2.xxxx, r3.zzzz -iadd r10.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.xxxx, r10.xyzw -mov r6.x, r4.y -bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r6.xyxx, l(0, 0, 0, 0) -iadd r2.xy, r2.xyxx, r7.zwzz -iadd r6.xzw, r3.wwww, r2.xxxx -iadd r6.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -ushr r4.xy, r4.zzzz, l(22, 1, 0, 0) -bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r4.zxzz, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r4.zzzz -iadd r2.xy, r2.xyxx, r3.zwzz -and r1.z, r4.y, l(0x001f0000) -bfi r1.z, l(21), l(0), r1.z, r9.z -iadd r4.xzw, r1.zzzz, r2.xxxx -iadd r4.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.zzzz, r4.xyzw -iadd r4.xyzw, r0.zzzz, l(1, 2, 3, 4) -ushr r1.xy, r1.wwww, l(22, 1, 0, 0) -bfi r1.xz, l(11, 0, 26, 0), l(5, 0, 6, 0), r1.wwxw, l(0, 0, 0, 0) -ubfe r2.xy, l(5, 6, 0, 0), l(6, 26, 0, 0), r1.wwww -iadd r1.xz, r1.xxzx, r2.xxyx -ishl r1.w, r1.w, l(10) -and r1.y, r1.y, l(0x001f0000) -bfi r1.y, l(21), l(0), r1.y, r1.w -iadd r6.xzw, r1.yyyy, r1.xxxx -iadd r6.y, r1.z, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw -ld r1.xy, r2.wwww, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r1.zw, r2.xxxx, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw - mov r6.xyz, r1.xyzx -else - mov r6.xyz, r1.xyzx -endif -ushr r7.xyzw, r6.xyxy, l(22, 22, 1, 1) -mov r6.w, r7.x -bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r6.xxxw, l(0, 0, 0, 0) -ubfe r9.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r6.xxyy -iadd r3.zw, r3.zzzw, r9.xxxy -ishl r10.xyz, r6.xyzx, l(10, 10, 10, 0) -and r5.xy, r7.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r5.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r5.xyxx, r10.xyxx -iadd r11.xzw, r3.zzzz, r5.xxxx -iadd r11.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.yyyy, r11.xyzw -mov r7.x, r6.y -bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r7.xxxy, l(0, 0, 0, 0) -iadd r3.zw, r3.zzzw, r9.zzzw -iadd r7.xzw, r5.yyyy, r3.zzzz -iadd r7.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r8.zzzz, r7.xyzw -ushr r6.xy, r6.zzzz, l(22, 1, 0, 0) -bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r6.zzzx, l(0, 0, 0, 0) -ubfe r4.xy, l(5, 6, 0, 0), l(6, 26, 0, 0), r6.zzzz -iadd r3.zw, r3.zzzw, r4.xxxy -and r0.x, r6.y, l(0x001f0000) -bfi r0.x, l(21), l(0), r0.x, r10.z -iadd r6.xzw, r0.xxxx, r3.zzzz -iadd r6.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r8.wwww, r6.xyzw -iadd r0.x, r0.y, l(5) -ushr r1.xy, r1.wwww, l(22, 1, 0, 0) -bfi r1.xz, l(11, 0, 26, 0), l(5, 0, 6, 0), r1.wwxw, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r1.wwww -iadd r1.xz, r1.xxzx, r3.zzwz -ishl r1.w, r1.w, l(10) -and r1.y, r1.y, l(0x001f0000) -bfi r1.y, l(21), l(0), r1.y, r1.w -iadd r6.xzw, r1.yyyy, r1.xxxx -iadd r6.y, r1.z, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r6.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r6.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw - mov r6.xyz, r1.xyzx -else - mov r6.xyz, r1.xyzx -endif -ushr r7.xyzw, r6.xyxy, l(22, 22, 1, 1) -mov r6.w, r7.x -bfi r0.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r6.xwxx, l(0, 0, 0, 0) -ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r6.xxyy -iadd r0.xy, r0.xyxx, r8.xyxx -ishl r2.xyz, r6.xyzx, l(10, 10, 10, 0) -and r3.zw, r7.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r3.zwzz, r2.xyxx -iadd r9.xzw, r0.xxxx, r2.xxxx -iadd r9.y, r0.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.zzzz, r9.xyzw -mov r7.x, r6.y -bfi r0.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r7.xyxx, l(0, 0, 0, 0) -iadd r0.xy, r0.xyxx, r8.zwzz -iadd r7.xzw, r2.yyyy, r0.xxxx -iadd r7.y, r0.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r5.wwww, r7.xyzw -iadd r0.x, r0.w, l(5) -ushr r6.xy, r6.zzzz, l(22, 1, 0, 0) -bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r6.zxzz, l(0, 0, 0, 0) -ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r6.zzzz -iadd r2.xy, r2.xyxx, r3.zwzz -and r0.y, r6.y, l(0x001f0000) -bfi r0.y, l(21), l(0), r0.y, r2.z -iadd r5.xzw, r0.yyyy, r2.xxxx -iadd r5.y, r2.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -ushr r1.xy, r1.wwww, l(22, 1, 0, 0) -bfi r0.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r1.wxww, l(0, 0, 0, 0) -ubfe r1.xz, l(5, 0, 6, 0), l(6, 0, 26, 0), r1.wwww -iadd r0.xy, r0.xyxx, r1.xzxx -ishl r0.w, r1.w, l(10) -and r1.x, r1.y, l(0x001f0000) -bfi r0.w, l(21), l(0), r1.x, r0.w -iadd r1.xzw, r0.wwww, r0.xxxx -iadd r1.y, r0.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.zzzz, r1.xyzw -ld r1.xy, r2.wwww, T0[0].xyzw -if_nz r3.x - ishl r0.xy, r1.xyxx, l(8, 8, 0, 0) - and r0.xy, r0.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r2.xy, r1.xyxx, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.xy, r0.xyxx, r2.xyxx -endif -if_nz r3.y - ushr r0.xy, r1.xyxx, l(16, 16, 0, 0) - bfi r1.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r1.xyxx, r0.xyxx -endif -ushr r2.xyzw, r1.xxyy, l(22, 1, 22, 1) -mov r1.zw, r2.xxxz -bfi r3.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) -ubfe r5.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy -iadd r3.xyzw, r3.xyzw, r5.xyzw -ishl r0.xy, r1.xyxx, l(10, 10, 0, 0) -and r1.xy, r2.ywyy, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r1.xyxx, r0.xyxx -iadd r1.xzw, r0.xxxx, r3.xxxx -iadd r1.y, r3.y, l(0xffff0000) -store_uav_typed U0[0].xyzw, r4.wwww, r1.xyzw -iadd r0.x, r0.z, l(5) -iadd r1.xzw, r0.yyyy, r3.zzzz -iadd r1.y, r3.w, l(0xffff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ret -// Approximately 330 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.cso deleted file mode 100644 index a43243b83..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.h deleted file mode 100644 index d799a4916..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.h +++ /dev/null @@ -1,564 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r11g11b10_rgba16.cs.hlsl -const uint8_t texture_load_r11g11b10_rgba16_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xAC, 0x82, 0x61, 0x07, 0x37, 0xAB, 0xFF, 0xA4, - 0x8A, 0xFD, 0x18, 0x1A, 0x29, 0x24, 0x5E, 0x59, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x1A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xA0, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 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xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 7 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(3) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].zwxy -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.zwxy, r4.zwxy -endif -if_nz r2.y - ushr r3.xyzw, r1.zwxy, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.zwxy - mov r3.xy, r1.zwzz -else - mov r3.xy, r1.zwzz -endif -ushr r4.xyzw, r3.xyxy, l(22, 22, 1, 1) -mov r3.zw, r4.xxxy -bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r2.zw, r3.xxxy, l(0, 0, 10, 10) -and r3.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r2.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r2.zzzw -iadd r3.xz, r2.zzwz, r5.xxzx -iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r4.xyzw, r1.xyxy, l(22, 22, 1, 1) -mov r1.zw, r4.xxxy -bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r1.xy, r1.xyxx, l(10, 10, 0, 0) -and r1.zw, r4.zzzw, l(0, 0, 0x001f0000, 0x001f0000) -bfi r1.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r1.zwzz, r1.xyxx -iadd r1.xz, r1.xxyx, r5.xxzx -iadd r1.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r3.xyz, r0.yyyy, l(1, 2, 3, 0) -store_uav_typed U0[0].xyzw, r3.xxxx, r1.xyzw -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r1.xyzw, r0.xxxx, T0[0].zwxy -if_nz r2.x - ishl r4.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.zwxy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.zwxy, r5.zwxy -endif -if_nz r2.y - ushr r2.xyzw, r1.zwxy, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.zwxy - mov r2.xy, r1.zwzz -else - mov r2.xy, r1.zwzz -endif -ushr r4.xyzw, r2.xyxy, l(22, 22, 1, 1) -mov r2.zw, r4.xxxy -bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r0.xz, r2.xxyx, l(10, 0, 10, 0) -and r2.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.xxzx -iadd r2.xz, r0.xxzx, r5.xxzx -iadd r2.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -ushr r4.xyzw, r1.xyxy, l(22, 22, 1, 1) -mov r1.zw, r4.xxxy -bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) -ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy -iadd r5.xyzw, r5.xyzw, r6.xyzw -ishl r0.xz, r1.xxyx, l(10, 0, 10, 0) -and r1.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) -bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.xxzx -iadd r1.xz, r0.xxzx, r5.xxzx -iadd r1.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) -store_uav_typed U0[0].xyzw, r3.yyyy, r2.xyzw -store_uav_typed U0[0].xyzw, r3.zzzz, r1.xyzw -ret -// Approximately 151 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.cso deleted file mode 100644 index 7516b0ee8..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.h deleted file mode 100644 index ee7bc7c0e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.h +++ /dev/null @@ -1,2592 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r11g11b10_rgba16_snorm_2x.cs.hlsl -const uint8_t texture_load_r11g11b10_rgba16_snorm_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x6A, 0x1B, 0xF6, 0x88, 0xB9, 0x3B, 0x87, 0x49, - 0x09, 0x10, 0xAE, 0xAA, 0x1D, 0xF9, 0x38, 0x6A, 0x01, 0x00, 0x00, 0x00, - 0x48, 0x79, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xAC, 0x78, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 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Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(3) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx - imad r1.x, r1.x, r2.y, r2.x - ishl r1.w, vThreadID.y, l(10) - ishr r1.w, r1.w, l(6) - and r1.w, r1.w, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r2.z - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx - ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) - ushr r1.w, CB0[0][0].z, l(5) - imad r1.y, r2.x, r1.w, r1.y - ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) - and r2.xz, r2.xxzx, l(448, 0, 2048, 0) - bfi r1.w, l(23), l(9), r1.y, r2.x - bfi r2.w, l(1), l(4), vThreadID.y, l(0) - iadd r1.w, r1.w, r2.w - ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) - bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx - imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy - bfi r1.y, l(12), l(0), r2.z, r2.x - and r2.x, r2.w, l(1792) - iadd r1.y, r1.y, r2.x - and r2.x, r2.y, l(2) - iadd r1.z, r1.z, r2.x - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r1.w, r1.y - endif -else - ishl r0.x, r0.x, l(2) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].xyzw -ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) -or r1.xy, r1.yzyy, r1.xyxx -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw -endif -and r1.zw, r2.xxxy, l(0, 0, 2047, 2047) -ubfe r3.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.xyxy -ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r4.xxxy -iadd r1.zw, r3.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r4.zzzw, r1.zzzw -iadd r1.zw, r3.xxxy, r1.zzzw -ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.xyxx -ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) -movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.zw, r3.zzzw, r4.xxxy -iadd r3.zw, r3.xxxy, r3.zzzw -ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) -ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) -or r3.zw, r3.zzzw, r4.xxxy -xor r3.zw, r4.zzzw, r3.zzzw -iadd r3.xy, r3.xyxx, r3.zwzz -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r3.xz, r1.zzwz, r3.xxyx -ushr r1.zw, r2.xxxy, l(0, 0, 22, 22) -ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) -ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw -movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r4.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r4.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r3.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.zw, r2.zzzw, l(0, 0, 2047, 2047) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.zwzw -ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r4.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r4.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.zwzz -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r2.xyxx, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r2.xy, r2.xyxx, r4.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r4.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r2.zzzw, l(0, 0, 22, 22) -ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) -ieq r2.zw, r1.zzzw, l(0, 0, 512, 512) -movc r1.zw, r2.zzzw, l(0,0,513,513), r1.zzzw -movc r5.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r2.zw, r1.zzzw, l(0, 0, 6, 6) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r2.zzzw -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.z, r0.z, r0.y -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) -ld r3.xyzw, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -and r2.xw, r3.xxxy, l(2047, 0, 0, 2047) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy -ieq r5.xy, r2.xwxx, l(1024, 1024, 0, 0) -movc r2.xw, r5.xxxy, l(1025,0,0,1025), r2.xxxw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r5.xxxy -iadd r2.xw, r4.xxxy, r2.xxxw -ishl r5.xy, r2.xwxx, l(5, 5, 0, 0) -ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) -or r2.xw, r2.xxxw, r5.xxxy -xor r2.xw, r5.zzzw, r2.xxxw -iadd r2.xw, r4.xxxy, r2.xxxw -ubfe r4.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.xyxx -ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.zw, r4.zzzw, r5.xxxy -iadd r4.zw, r4.xxxy, r4.zzzw -ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) -ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) -or r4.zw, r4.zzzw, r5.xxxy -xor r4.zw, r5.zzzw, r4.zzzw -iadd r4.xy, r4.xyxx, r4.zwzz -ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) -or r4.xz, r2.xxwx, r4.xxyx -ushr r2.xw, r3.xxxy, l(22, 0, 0, 22) -ushr r3.xy, r2.xwxx, l(9, 9, 0, 0) -ieq r5.xy, r2.xwxx, l(512, 512, 0, 0) -movc r2.xw, r5.xxxy, l(513,0,0,513), r2.xxxw -movc r5.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r5.xxxy -iadd r2.xw, r3.xxxy, r2.xxxw -ishl r5.xy, r2.xwxx, l(6, 6, 0, 0) -ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) -or r2.xw, r2.xxxw, r5.xxxy -xor r2.xw, r5.zzzw, r2.xxxw -iadd r2.xw, r3.xxxy, r2.xxxw -or r4.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r2.xw, r3.zzzw, l(2047, 0, 0, 2047) -ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw -ieq r3.xy, r2.xwxx, l(1024, 1024, 0, 0) -movc r2.xw, r3.xxxy, l(1025,0,0,1025), r2.xxxw -movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r6.xxxy -iadd r2.xw, r5.xxxy, r2.xxxw -ishl r3.xy, r2.xwxx, l(5, 5, 0, 0) -ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) -or r2.xw, r2.xxxw, r3.xxxy -xor r2.xw, r6.zzzw, r2.xxxw -iadd r2.xw, r5.xxxy, r2.xxxw -ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.zwzz -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r3.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r3.xy, r3.xyxx, r5.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r5.xz, r2.xxwx, r3.xxyx -ushr r2.xw, r3.zzzw, l(22, 0, 0, 22) -ushr r3.xy, r2.xwxx, l(9, 9, 0, 0) -ieq r3.zw, r2.xxxw, l(0, 0, 512, 512) -movc r2.xw, r3.zzzw, l(513,0,0,513), r2.xxxw -movc r6.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xw, r2.xxxw, r6.xxxy -iadd r2.xw, r3.xxxy, r2.xxxw -ishl r3.zw, r2.xxxw, l(0, 0, 6, 6) -ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) -or r2.xw, r2.xxxw, r3.zzzw -xor r2.xw, r6.zzzw, r2.xxxw -iadd r2.xw, r3.xxxy, r2.xxxw -or r5.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -iadd r3.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyzw -iadd r1.z, r1.z, l(1) -store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyzw -ld r4.xyzw, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -and r1.zw, r4.xxxy, l(0, 0, 2047, 2047) -ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.xyxy -ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw -movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r6.xxxy -iadd r1.zw, r5.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r6.zzzw, r1.zzzw -iadd r1.zw, r5.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.xyxx -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r2.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r2.xy, r2.xyxx, r5.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r5.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r4.xxxy, l(0, 0, 22, 22) -ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) -ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw -movc r6.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r6.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r6.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.zw, r4.zzzw, l(0, 0, 2047, 2047) -ubfe r6.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.zwzw -ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw -movc r7.xyzw, r6.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r7.xxxy -iadd r1.zw, r6.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r7.zzzw, r1.zzzw -iadd r1.zw, r6.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.zwzz -ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz -movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r6.xyxx -iadd r4.xy, r2.xyxx, r4.xyxx -ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r6.xyxx -xor r4.xy, r6.zwzz, r4.xyxx -iadd r2.xy, r2.xyxx, r4.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r6.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r4.zzzw, l(0, 0, 22, 22) -ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) -ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw -movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r4.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r4.xxxy -xor r1.zw, r4.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r6.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyzw -iadd r1.zw, r0.zzzz, r3.yyyw -store_uav_typed U0[0].xyzw, r1.zzzz, r6.xyzw -ld r2.xyzw, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw -endif -and r3.xy, r2.xyxx, l(2047, 2047, 0, 0) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.xyxy -ieq r5.xy, r3.xyxx, l(1024, 1024, 0, 0) -movc r3.xy, r5.xyxx, l(1025,1025,0,0), r3.xyxx -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r5.xyxx -iadd r3.xy, r4.xyxx, r3.xyxx -ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -xor r3.xy, r5.zwzz, r3.xyxx -iadd r3.xy, r4.xyxx, r3.xyxx -ubfe r4.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.xyxx -ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.zw, r4.zzzw, r5.xxxy -iadd r4.zw, r4.xxxy, r4.zzzw -ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) -ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) -or r4.zw, r4.zzzw, r5.xxxy -xor r4.zw, r5.zzzw, r4.zzzw -iadd r4.xy, r4.xyxx, r4.zwzz -ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) -or r4.xz, r3.xxyx, r4.xxyx -ushr r2.xy, r2.xyxx, l(22, 22, 0, 0) -ushr r3.xy, r2.xyxx, l(9, 9, 0, 0) -ieq r5.xy, r2.xyxx, l(512, 512, 0, 0) -movc r2.xy, r5.xyxx, l(513,513,0,0), r2.xyxx -movc r5.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r5.xyxx -iadd r2.xy, r3.xyxx, r2.xyxx -ishl r5.xy, r2.xyxx, l(6, 6, 0, 0) -ushr r2.xy, r2.xyxx, l(3, 3, 0, 0) -or r2.xy, r2.xyxx, r5.xyxx -xor r2.xy, r5.zwzz, r2.xyxx -iadd r2.xy, r3.xyxx, r2.xyxx -or r4.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -and r2.xy, r2.zwzz, l(2047, 2047, 0, 0) -ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.zwzw -ieq r3.xy, r2.xyxx, l(1024, 1024, 0, 0) -movc r2.xy, r3.xyxx, l(1025,1025,0,0), r2.xyxx -movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r6.xyxx -iadd r2.xy, r5.xyxx, r2.xyxx -ishl r3.xy, r2.xyxx, l(5, 5, 0, 0) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -or r2.xy, r2.xyxx, r3.xyxx -xor r2.xy, r6.zwzz, r2.xyxx -iadd r2.xy, r5.xyxx, r2.xyxx -ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.zwzz -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r3.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r3.xy, r3.xyxx, r5.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r5.xz, r2.xxyx, r3.xxyx -ushr r2.xy, r2.zwzz, l(22, 22, 0, 0) -ushr r2.zw, r2.xxxy, l(0, 0, 9, 9) -ieq r3.xy, r2.xyxx, l(512, 512, 0, 0) -movc r2.xy, r3.xyxx, l(513,513,0,0), r2.xyxx -movc r6.xyzw, r2.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r6.xyxx -iadd r2.xy, r2.zwzz, r2.xyxx -ishl r3.xy, r2.xyxx, l(6, 6, 0, 0) -ushr r2.xy, r2.xyxx, l(3, 3, 0, 0) -or r2.xy, r2.xyxx, r3.xyxx -xor r2.xy, r6.zwzz, r2.xyxx -iadd r2.xy, r2.zwzz, r2.xyxx -or r5.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw -iadd r2.xy, r1.zwzz, l(1, 1, 0, 0) -store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw -if_nz r0.w - iadd r0.w, r0.x, l(8) -else - iadd r0.w, r0.x, l(4) -endif -ld r4.xyzw, r0.wwww, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r4.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r1.y - ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) - bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw -endif -and r2.xz, r4.xxyx, l(2047, 0, 2047, 0) -ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.xyxy -ieq r3.xy, r2.xzxx, l(1024, 1024, 0, 0) -movc r2.xz, r3.xxyx, l(1025,0,1025,0), r2.xxzx -movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r6.xxyx -iadd r2.xz, r5.xxyx, r2.xxzx -ishl r3.xy, r2.xzxx, l(5, 5, 0, 0) -ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) -or r2.xz, r2.xxzx, r3.xxyx -xor r2.xz, r6.zzwz, r2.xxzx -iadd r2.xz, r5.xxyx, r2.xxzx -ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.xyxx -ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r5.xy, r5.xyxx, r6.xyxx -iadd r5.xy, r3.xyxx, r5.xyxx -ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) -ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) -or r5.xy, r5.xyxx, r5.zwzz -xor r5.xy, r6.zwzz, r5.xyxx -iadd r3.xy, r3.xyxx, r5.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r5.xz, r2.xxzx, r3.xxyx -ushr r2.xz, r4.xxyx, l(22, 0, 22, 0) -ushr r3.xy, r2.xzxx, l(9, 9, 0, 0) -ieq r4.xy, r2.xzxx, l(512, 512, 0, 0) -movc r2.xz, r4.xxyx, l(513,0,513,0), r2.xxzx -movc r6.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r6.xxyx -iadd r2.xz, r3.xxyx, r2.xxzx -ishl r4.xy, r2.xzxx, l(6, 6, 0, 0) -ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) -or r2.xz, r2.xxzx, r4.xxyx -xor r2.xz, r6.zzwz, r2.xxzx -iadd r2.xz, r3.xxyx, r2.xxzx -or r5.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -and r2.xz, r4.zzwz, l(2047, 0, 2047, 0) -ubfe r6.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.zwzw -ieq r3.xy, r2.xzxx, l(1024, 1024, 0, 0) -movc r2.xz, r3.xxyx, l(1025,0,1025,0), r2.xxzx -movc r7.xyzw, r6.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r7.xxyx -iadd r2.xz, r6.xxyx, r2.xxzx -ishl r3.xy, r2.xzxx, l(5, 5, 0, 0) -ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) -or r2.xz, r2.xxzx, r3.xxyx -xor r2.xz, r7.zzwz, r2.xxzx -iadd r2.xz, r6.xxyx, r2.xxzx -ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.zwzz -ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz -movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r6.xyxx -iadd r4.xy, r3.xyxx, r4.xyxx -ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r6.xyxx -xor r4.xy, r6.zwzz, r4.xyxx -iadd r3.xy, r3.xyxx, r4.xyxx -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r6.xz, r2.xxzx, r3.xxyx -ushr r2.xz, r4.zzwz, l(22, 0, 22, 0) -ushr r3.xy, r2.xzxx, l(9, 9, 0, 0) -ieq r4.xy, r2.xzxx, l(512, 512, 0, 0) -movc r2.xz, r4.xxyx, l(513,0,513,0), r2.xxzx -movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xz, r2.xxzx, r4.xxyx -iadd r2.xz, r3.xxyx, r2.xxzx -ishl r4.xy, r2.xzxx, l(6, 6, 0, 0) -ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) -or r2.xz, r2.xxzx, r4.xxyx -xor r2.xz, r4.zzwz, r2.xxzx -iadd r2.xz, r3.xxyx, r2.xxzx -or r6.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r3.wwww, r5.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r6.xyzw -iadd r2.xzw, r0.wwww, l(1, 0, 2, 3) -ld r3.xyzw, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -and r0.xw, r3.xxxy, l(2047, 0, 0, 2047) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy -ieq r1.zw, r0.xxxw, l(0, 0, 1024, 1024) -movc r0.xw, r1.zzzw, l(1025,0,0,1025), r0.xxxw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r5.xxxy -iadd r0.xw, r4.xxxy, r0.xxxw -ishl r1.zw, r0.xxxw, l(0, 0, 5, 5) -ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) -or r0.xw, r0.xxxw, r1.zzzw -xor r0.xw, r5.zzzw, r0.xxxw -iadd r0.xw, r4.xxxy, r0.xxxw -ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 21, 21), r3.xxxy -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r1.zwzz, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r1.zw, r1.zzzw, r4.xxxy -ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) -or r4.xz, r0.xxwx, r1.zzwz -ushr r0.xw, r3.xxxy, l(22, 0, 0, 22) -ushr r1.zw, r0.xxxw, l(0, 0, 9, 9) -ieq r3.xy, r0.xwxx, l(512, 512, 0, 0) -movc r0.xw, r3.xxxy, l(513,0,0,513), r0.xxxw -movc r5.xyzw, r1.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r5.xxxy -iadd r0.xw, r1.zzzw, r0.xxxw -ishl r3.xy, r0.xwxx, l(6, 6, 0, 0) -ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) -or r0.xw, r0.xxxw, r3.xxxy -xor r0.xw, r5.zzzw, r0.xxxw -iadd r0.xw, r1.zzzw, r0.xxxw -or r4.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r0.xw, r3.zzzw, l(2047, 0, 0, 2047) -ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw -ieq r1.zw, r0.xxxw, l(0, 0, 1024, 1024) -movc r0.xw, r1.zzzw, l(1025,0,0,1025), r0.xxxw -movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r6.xxxy -iadd r0.xw, r5.xxxy, r0.xxxw -ishl r1.zw, r0.xxxw, l(0, 0, 5, 5) -ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) -or r0.xw, r0.xxxw, r1.zzzw -xor r0.xw, r6.zzzw, r0.xxxw -iadd r0.xw, r5.xxxy, r0.xxxw -ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 21, 21), r3.zzzw -ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz -movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r5.xyxx -iadd r3.xy, r1.zwzz, r3.xyxx -ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -xor r3.xy, r5.zwzz, r3.xyxx -iadd r1.zw, r1.zzzw, r3.xxxy -ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) -or r5.xz, r0.xxwx, r1.zzwz -ushr r0.xw, r3.zzzw, l(22, 0, 0, 22) -ushr r1.zw, r0.xxxw, l(0, 0, 9, 9) -ieq r3.xy, r0.xwxx, l(512, 512, 0, 0) -movc r0.xw, r3.xxxy, l(513,0,0,513), r0.xxxw -movc r3.xyzw, r1.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xw, r0.xxxw, r3.xxxy -iadd r0.xw, r1.zzzw, r0.xxxw -ishl r3.xy, r0.xwxx, l(6, 6, 0, 0) -ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) -or r0.xw, r0.xxxw, r3.xxxy -xor r0.xw, r3.zzzw, r0.xxxw -iadd r0.xw, r1.zzzw, r0.xxxw -or r5.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) -iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw -ld r3.xyzw, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r1.y - ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw -endif -and r1.zw, r3.xxxy, l(0, 0, 2047, 2047) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy -ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r4.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r4.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.xyxx -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r2.xyxx, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r2.xy, r2.xyxx, r4.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r4.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r3.xxxy, l(0, 0, 22, 22) -ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) -ieq r3.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r3.xxxy, l(0,0,513,513), r1.zzzw -movc r5.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r5.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r3.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r3.xxxy -xor r1.zw, r5.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.zw, r3.zzzw, l(0, 0, 2047, 2047) -ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw -ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw -movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r6.xxxy -iadd r1.zw, r5.xxxy, r1.zzzw -ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r2.xxxy -xor r1.zw, r6.zzzw, r1.zzzw -iadd r1.zw, r5.xxxy, r1.zzzw -ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.zwzz -ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz -movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r5.xyxx -iadd r3.xy, r2.xyxx, r3.xyxx -ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r5.xyxx -xor r3.xy, r5.zwzz, r3.xyxx -iadd r2.xy, r2.xyxx, r3.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r5.xz, r1.zzwz, r2.xxyx -ushr r1.zw, r3.zzzw, l(0, 0, 22, 22) -ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) -ieq r3.xy, r1.zwzz, l(512, 512, 0, 0) -movc r1.zw, r3.xxxy, l(0,0,513,513), r1.zzzw -movc r3.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r3.xxxy -iadd r1.zw, r2.xxxy, r1.zzzw -ishl r3.xy, r1.zwzz, l(6, 6, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) -or r1.zw, r1.zzzw, r3.xxxy -xor r1.zw, r3.zzzw, r1.zzzw -iadd r1.zw, r2.xxxy, r1.zzzw -or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r0.x, r0.z, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw -ld r2.xyzw, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r1.y - ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) - bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw -endif -and r0.yz, r2.xxyx, l(0, 2047, 2047, 0) -ubfe r1.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.xyxy -ieq r3.xy, r0.yzyy, l(1024, 1024, 0, 0) -movc r0.yz, r3.xxyx, l(0,1025,1025,0), r0.yyzy -movc r3.xyzw, r1.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r3.xxyx -iadd r0.yz, r1.xxyx, r0.yyzy -ishl r3.xy, r0.yzyy, l(5, 5, 0, 0) -ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) -or r0.yz, r0.yyzy, r3.xxyx -xor r0.yz, r3.zzwz, r0.yyzy -iadd r0.yz, r1.xxyx, r0.yyzy -ubfe r1.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.xyxx -ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) -movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw -movc r3.xyzw, r1.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.zw, r1.zzzw, r3.xxxy -iadd r1.zw, r1.xxxy, r1.zzzw -ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) -ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) -or r1.zw, r1.zzzw, r3.xxxy -xor r1.zw, r3.zzzw, r1.zzzw -iadd r1.xy, r1.xyxx, r1.zwzz -ishl r1.xy, r1.xyxx, l(16, 16, 0, 0) -or r1.xz, r0.yyzy, r1.xxyx -ushr r0.yz, r2.xxyx, l(0, 22, 22, 0) -ushr r2.xy, r0.yzyy, l(9, 9, 0, 0) -ieq r3.xy, r0.yzyy, l(512, 512, 0, 0) -movc r0.yz, r3.xxyx, l(0,513,513,0), r0.yyzy -movc r3.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r3.xxyx -iadd r0.yz, r2.xxyx, r0.yyzy -ishl r3.xy, r0.yzyy, l(6, 6, 0, 0) -ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) -or r0.yz, r0.yyzy, r3.xxyx -xor r0.yz, r3.zzwz, r0.yyzy -iadd r0.yz, r2.xxyx, r0.yyzy -or r1.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) -and r0.yz, r2.zzwz, l(0, 2047, 2047, 0) -ubfe r3.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.zwzw -ieq r2.xy, r0.yzyy, l(1024, 1024, 0, 0) -movc r0.yz, r2.xxyx, l(0,1025,1025,0), r0.yyzy -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r4.xxyx -iadd r0.yz, r3.xxyx, r0.yyzy -ishl r2.xy, r0.yzyy, l(5, 5, 0, 0) -ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) -or r0.yz, r0.yyzy, r2.xxyx -xor r0.yz, r4.zzwz, r0.yyzy -iadd r0.yz, r3.xxyx, r0.yyzy -ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.zwzz -ieq r3.xy, r3.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r3.zwzz -movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r4.xyxx -iadd r3.xy, r2.xyxx, r3.xyxx -ishl r3.zw, r3.xxxy, l(0, 0, 5, 5) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r3.zwzz -xor r3.xy, r4.zwzz, r3.xyxx -iadd r2.xy, r2.xyxx, r3.xyxx -ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) -or r3.xz, r0.yyzy, r2.xxyx -ushr r0.yz, r2.zzwz, l(0, 22, 22, 0) -ushr r2.xy, r0.yzyy, l(9, 9, 0, 0) -ieq r2.zw, r0.yyyz, l(0, 0, 512, 512) -movc r0.yz, r2.zzwz, l(0,513,513,0), r0.yyzy -movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.yz, r0.yyzy, r4.xxyx -iadd r0.yz, r2.xxyx, r0.yyzy -ishl r2.zw, r0.yyyz, l(0, 0, 6, 6) -ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) -or r0.yz, r0.yyzy, r2.zzwz -xor r0.yz, r4.zzwz, r0.yyzy -iadd r0.yz, r2.xxyx, r0.yyzy -or r3.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.x, l(1) -store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw -ret -// Approximately 812 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.cso deleted file mode 100644 index 54bcdc5e2..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.h deleted file mode 100644 index 047053e5f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.h +++ /dev/null @@ -1,2277 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl -const uint8_t texture_load_r11g11b10_rgba16_snorm_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xD0, 0x49, 0xD5, 0xF2, 0x29, 0x64, 0xD2, 0x2B, - 0x78, 0x36, 0xB9, 0xA0, 0xF3, 0xAE, 0xB9, 0x44, 0x01, 0x00, 0x00, 0x00, - 0x84, 0x6A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xE8, 0x69, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 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xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 9 -dcl_thread_group 16, 32, 1 -ishl r0.x, vThreadID.x, l(1) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) -imul null, r0.w, r0.w, CB0[0][1].y -ishl r0.y, r0.y, l(3) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - and r1.x, r1.x, l(6144) - bfi r1.x, l(3), l(8), r0.x, r1.x - ishr r1.x, r1.x, l(6) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - and r1.z, r1.x, l(112) - bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) - imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy - bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - ubfe r0.w, l(3), l(6), r1.x - and r1.w, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r0.w, r0.w, l(32), r1.y - imad r0.w, r1.w, l(4), r0.w - bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx - bfi r0.w, l(9), l(3), r0.w, r1.y - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) - and r2.xy, r2.xyxx, l(224, 2048, 0, 0) - bfi r1.z, l(3), l(2), r0.x, r2.x - ishl r2.x, r2.x, l(1) - bfi r2.x, l(3), l(3), r0.x, r2.x - and r2.x, r2.x, l(480) - bfi r2.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(4), l(0), r1.z, r2.z - bfi r2.z, l(1), l(4), vThreadID.y, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx - bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx - bfi r1.x, l(12), l(0), r2.y, r1.x - and r1.z, r1.z, l(1792) - iadd r1.x, r1.x, r1.z - and r1.z, r1.w, l(2) - iadd r1.y, r1.y, r1.z - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r2.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xy, r0.xxxx, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.zw, r2.xxxx, T0[0].zwxy -ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) -or r3.xy, r3.yzyy, r3.xyxx -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -and r0.w, r1.x, l(2047) -ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx -ieq r2.x, r0.w, l(1024) -movc r0.w, r2.x, l(1025), r0.w -movc r5.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r5.x -iadd r0.w, r4.x, r0.w -ishl r2.x, r0.w, l(5) -ushr r0.w, r0.w, l(5) -or r0.w, r0.w, r2.x -xor r0.w, r5.y, r0.w -iadd r0.w, r4.x, r0.w -ieq r2.x, r4.y, l(1024) -movc r2.x, r2.x, l(1025), r4.y -xor r2.x, r5.z, r2.x -iadd r2.x, r4.z, r2.x -ishl r3.z, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r3.z -xor r2.x, r5.w, r2.x -iadd r2.x, r4.z, r2.x -ishl r2.x, r2.x, l(16) -or r4.xzw, r0.wwww, r2.xxxx -ushr r0.w, r1.x, l(22) -ushr r1.x, r0.w, l(9) -ieq r2.x, r0.w, l(512) -movc r0.w, r2.x, l(513), r0.w -movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r3.z -iadd r0.w, r1.x, r0.w -ishl r2.x, r0.w, l(6) -ushr r0.w, r0.w, l(3) -or r0.w, r0.w, r2.x -xor r0.w, r3.w, r0.w -iadd r0.w, r1.x, r0.w -or r4.y, r0.w, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw -iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) -and r0.w, r1.y, l(2047) -ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy -ieq r1.x, r0.w, l(1024) -movc r0.w, r1.x, l(1025), r0.w -movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r6.x -iadd r0.w, r5.x, r0.w -ishl r1.x, r0.w, l(5) -ushr r0.w, r0.w, l(5) -or r0.w, r0.w, r1.x -xor r0.w, r6.y, r0.w -iadd r0.w, r5.x, r0.w -ieq r1.x, r5.y, l(1024) -movc r1.x, r1.x, l(1025), r5.y -xor r1.x, r6.z, r1.x -iadd r1.x, r5.z, r1.x -ishl r2.x, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r2.x -xor r1.x, r6.w, r1.x -iadd r1.x, r5.z, r1.x -ishl r1.x, r1.x, l(16) -or r5.xzw, r0.wwww, r1.xxxx -ushr r0.w, r1.y, l(22) -ushr r1.x, r0.w, l(9) -ieq r1.y, r0.w, l(512) -movc r0.w, r1.y, l(513), r0.w -movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r3.z -iadd r0.w, r1.x, r0.w -ishl r1.y, r0.w, l(6) -ushr r0.w, r0.w, l(3) -or r0.w, r0.w, r1.y -xor r0.w, r3.w, r0.w -iadd r0.w, r1.x, r0.w -or r5.y, r0.w, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw -and r0.w, r1.z, l(2047) -ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz -ieq r1.x, r0.w, l(1024) -movc r0.w, r1.x, l(1025), r0.w -movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r6.x -iadd r0.w, r5.x, r0.w -ishl r1.x, r0.w, l(5) -ushr r0.w, r0.w, l(5) -or r0.w, r0.w, r1.x -xor r0.w, r6.y, r0.w -iadd r0.w, r5.x, r0.w -ieq r1.x, r5.y, l(1024) -movc r1.x, r1.x, l(1025), r5.y -xor r1.x, r6.z, r1.x -iadd r1.x, r5.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r6.w, r1.x -iadd r1.x, r5.z, r1.x -ishl r1.x, r1.x, l(16) -or r5.xzw, r0.wwww, r1.xxxx -ushr r0.w, r1.z, l(22) -ushr r1.x, r0.w, l(9) -ieq r1.y, r0.w, l(512) -movc r0.w, r1.y, l(513), r0.w -movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) -xor r0.w, r0.w, r1.y -iadd r0.w, r1.x, r0.w -ishl r1.y, r0.w, l(6) -ushr r0.w, r0.w, l(3) -or r0.w, r0.w, r1.y -xor r0.w, r1.z, r0.w -iadd r0.w, r1.x, r0.w -or r5.y, r0.w, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw -iadd r0.w, r0.z, r0.y -and r1.x, r1.w, l(2047) -ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww -ieq r1.y, r1.x, l(1024) -movc r1.x, r1.y, l(1025), r1.x -movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r6.x -iadd r1.x, r5.x, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r6.y, r1.x -ieq r1.y, r5.y, l(1024) -movc r1.y, r1.y, l(1025), r5.y -xor r1.y, r6.z, r1.y -iadd r1.xy, r5.xzxx, r1.xyxx -ishl r1.z, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r1.z -xor r1.y, r6.w, r1.y -iadd r1.y, r5.z, r1.y -ishl r1.y, r1.y, l(16) -or r5.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.w, l(22) -ushr r1.y, r1.x, l(9) -ieq r1.z, r1.x, l(512) -movc r1.x, r1.z, l(513), r1.x -movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.z, r1.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.z -xor r1.x, r1.w, r1.x -iadd r1.x, r1.y, r1.x -or r5.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r5.xyzw, r6.xyzw -endif -if_nz r3.y - ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw -endif -iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) -and r2.x, r1.x, l(2047) -ubfe r6.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx -ieq r2.y, r2.x, l(1024) -movc r2.x, r2.y, l(1025), r2.x -movc r7.xyzw, r6.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r2.x, r2.x, r7.x -iadd r2.x, r6.x, r2.x -ishl r2.y, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r2.y -xor r2.x, r7.y, r2.x -ieq r2.y, r6.y, l(1024) -movc r2.y, r2.y, l(1025), r6.y -xor r2.y, r7.z, r2.y -iadd r2.xy, r6.xzxx, r2.xyxx -ishl r2.z, r2.y, l(5) -ushr r2.y, r2.y, l(5) -or r2.y, r2.y, r2.z -xor r2.y, r7.w, r2.y -iadd r2.y, r6.z, r2.y -ishl r2.y, r2.y, l(16) -or r6.xzw, r2.yyyy, r2.xxxx -ushr r1.x, r1.x, l(22) -ushr r2.x, r1.x, l(9) -ieq r2.y, r1.x, l(512) -movc r1.x, r2.y, l(513), r1.x -movc r2.yz, r2.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) -xor r1.x, r1.x, r2.y -iadd r1.x, r2.x, r1.x -ishl r2.y, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r2.y -xor r1.x, r2.z, r1.x -iadd r1.x, r2.x, r1.x -or r6.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw -and r1.x, r1.y, l(2047) -ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy -ieq r3.z, r1.x, l(1024) -movc r1.x, r3.z, l(1025), r1.x -movc r6.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r6.x -iadd r1.x, r2.x, r1.x -ishl r3.z, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r3.z -xor r1.x, r6.y, r1.x -iadd r1.x, r2.x, r1.x -ieq r2.x, r2.y, l(1024) -movc r2.x, r2.x, l(1025), r2.y -xor r2.x, r6.z, r2.x -iadd r2.x, r2.z, r2.x -ishl r2.y, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r2.y -xor r2.x, r6.w, r2.x -iadd r2.x, r2.z, r2.x -ishl r2.x, r2.x, l(16) -or r6.xzw, r1.xxxx, r2.xxxx -ushr r1.x, r1.y, l(22) -ushr r1.y, r1.x, l(9) -ieq r2.x, r1.x, l(512) -movc r1.x, r2.x, l(513), r1.x -movc r2.xy, r1.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r1.x, r1.x, r2.x -iadd r1.x, r1.y, r1.x -ishl r2.x, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r2.x -xor r1.x, r2.y, r1.x -iadd r1.x, r1.y, r1.x -or r6.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw -ishl r0.z, r0.z, l(1) -iadd r0.z, r0.z, r0.y -and r1.x, r1.z, l(2047) -ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz -ieq r1.y, r1.x, l(1024) -movc r1.x, r1.y, l(1025), r1.x -movc r6.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r6.x -iadd r1.x, r2.x, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r6.y, r1.x -ieq r1.y, r2.y, l(1024) -movc r1.y, r1.y, l(1025), r2.y -xor r1.y, r6.z, r1.y -iadd r1.xy, r2.xzxx, r1.xyxx -ishl r2.x, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r2.x -xor r1.y, r6.w, r1.y -iadd r1.y, r2.z, r1.y -ishl r1.y, r1.y, l(16) -or r6.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.z, l(22) -ushr r1.y, r1.x, l(9) -ieq r1.z, r1.x, l(512) -movc r1.x, r1.z, l(513), r1.x -movc r2.xy, r1.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r1.x, r1.x, r2.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.z -xor r1.x, r2.y, r1.x -iadd r1.x, r1.y, r1.x -or r6.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw -iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) -and r1.x, r1.w, l(2047) -ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww -ieq r1.y, r1.x, l(1024) -movc r1.x, r1.y, l(1025), r1.x -movc r7.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r7.x -iadd r1.x, r2.x, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r7.y, r1.x -ieq r1.y, r2.y, l(1024) -movc r1.y, r1.y, l(1025), r2.y -xor r1.y, r7.z, r1.y -iadd r1.xy, r2.xzxx, r1.xyxx -ishl r1.z, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r1.z -xor r1.y, r7.w, r1.y -iadd r1.y, r2.z, r1.y -ishl r1.y, r1.y, l(16) -or r7.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.w, l(22) -ushr r1.y, r1.x, l(9) -ieq r1.z, r1.x, l(512) -movc r1.x, r1.z, l(513), r1.x -movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.z, r1.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.z -xor r1.x, r1.w, r1.x -iadd r1.x, r1.y, r1.x -or r7.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw -ld r1.xy, r2.wwww, T0[0].xyzw -iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r1.zw, r2.xxxx, T0[0].zwxy -if_nz r3.x - ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r7.xyzw, r8.xyzw -endif -if_nz r3.y - ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw -endif -and r0.x, r1.x, l(2047) -ubfe r7.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx -ieq r2.x, r0.x, l(1024) -movc r0.x, r2.x, l(1025), r0.x -movc r8.xyzw, r7.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r8.x -iadd r0.x, r7.x, r0.x -ishl r2.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r2.x -xor r0.x, r8.y, r0.x -iadd r0.x, r7.x, r0.x -ieq r2.x, r7.y, l(1024) -movc r2.x, r2.x, l(1025), r7.y -xor r2.x, r8.z, r2.x -iadd r2.x, r7.z, r2.x -ishl r3.z, r2.x, l(5) -ushr r2.x, r2.x, l(5) -or r2.x, r2.x, r3.z -xor r2.x, r8.w, r2.x -iadd r2.x, r7.z, r2.x -ishl r2.x, r2.x, l(16) -or r7.xzw, r0.xxxx, r2.xxxx -ushr r0.x, r1.x, l(22) -ushr r1.x, r0.x, l(9) -ieq r2.x, r0.x, l(512) -movc r0.x, r2.x, l(513), r0.x -movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r3.z -iadd r0.x, r1.x, r0.x -ishl r2.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r2.x -xor r0.x, r3.w, r0.x -iadd r0.x, r1.x, r0.x -or r7.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw -and r0.x, r1.y, l(2047) -ubfe r7.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy -ieq r1.x, r0.x, l(1024) -movc r0.x, r1.x, l(1025), r0.x -movc r8.xyzw, r7.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r8.x -iadd r0.x, r7.x, r0.x -ishl r1.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r1.x -xor r0.x, r8.y, r0.x -iadd r0.x, r7.x, r0.x -ieq r1.x, r7.y, l(1024) -movc r1.x, r1.x, l(1025), r7.y -xor r1.x, r8.z, r1.x -iadd r1.x, r7.z, r1.x -ishl r2.x, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r2.x -xor r1.x, r8.w, r1.x -iadd r1.x, r7.z, r1.x -ishl r1.x, r1.x, l(16) -or r7.xzw, r0.xxxx, r1.xxxx -ushr r0.x, r1.y, l(22) -ushr r1.x, r0.x, l(9) -ieq r1.y, r0.x, l(512) -movc r0.x, r1.y, l(513), r0.x -movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r3.z -iadd r0.x, r1.x, r0.x -ishl r1.y, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r1.y -xor r0.x, r3.w, r0.x -iadd r0.x, r1.x, r0.x -or r7.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw -and r0.x, r1.z, l(2047) -ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz -ieq r1.x, r0.x, l(1024) -movc r0.x, r1.x, l(1025), r0.x -movc r7.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r7.x -iadd r0.x, r4.x, r0.x -ishl r1.x, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r1.x -xor r0.x, r7.y, r0.x -iadd r0.x, r4.x, r0.x -ieq r1.x, r4.y, l(1024) -movc r1.x, r1.x, l(1025), r4.y -xor r1.x, r7.z, r1.x -iadd r1.x, r4.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r7.w, r1.x -iadd r1.x, r4.z, r1.x -ishl r1.x, r1.x, l(16) -or r7.xzw, r0.xxxx, r1.xxxx -ushr r0.x, r1.z, l(22) -ushr r1.x, r0.x, l(9) -ieq r1.y, r0.x, l(512) -movc r0.x, r1.y, l(513), r0.x -movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) -xor r0.x, r0.x, r1.y -iadd r0.x, r1.x, r0.x -ishl r1.y, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r1.y -xor r0.x, r1.z, r0.x -iadd r0.x, r1.x, r0.x -or r7.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw -iadd r0.x, r0.y, l(5) -and r1.x, r1.w, l(2047) -ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww -ieq r1.y, r1.x, l(1024) -movc r1.x, r1.y, l(1025), r1.x -movc r7.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.x, r7.x -iadd r1.x, r4.x, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r7.y, r1.x -ieq r1.y, r4.y, l(1024) -movc r1.y, r1.y, l(1025), r4.y -xor r1.y, r7.z, r1.y -iadd r1.xy, r4.xzxx, r1.xyxx -ishl r1.z, r1.y, l(5) -ushr r1.y, r1.y, l(5) -or r1.y, r1.y, r1.z -xor r1.y, r7.w, r1.y -iadd r1.y, r4.z, r1.y -ishl r1.y, r1.y, l(16) -or r4.xzw, r1.yyyy, r1.xxxx -ushr r1.x, r1.w, l(22) -ushr r1.y, r1.x, l(9) -ieq r1.z, r1.x, l(512) -movc r1.x, r1.z, l(513), r1.x -movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) -xor r1.x, r1.z, r1.x -iadd r1.x, r1.y, r1.x -ishl r1.z, r1.x, l(6) -ushr r1.x, r1.x, l(3) -or r1.x, r1.x, r1.z -xor r1.x, r1.w, r1.x -iadd r1.x, r1.y, r1.x -or r4.y, r1.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -ld r1.xy, r2.yyyy, T0[0].xyzw -ld r1.zw, r2.zzzz, T0[0].zwxy -if_nz r3.x - ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r4.xyzw, r7.xyzw -endif -if_nz r3.y - ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw -endif -and r0.x, r1.x, l(2047) -ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx -ieq r0.y, r0.x, l(1024) -movc r0.x, r0.y, l(1025), r0.x -movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r4.x -iadd r0.x, r2.x, r0.x -ishl r0.y, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r0.y -xor r0.x, r4.y, r0.x -ieq r0.y, r2.y, l(1024) -movc r0.y, r0.y, l(1025), r2.y -xor r0.y, r4.z, r0.y -iadd r0.xy, r2.xzxx, r0.xyxx -ishl r2.x, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r2.x -xor r0.y, r4.w, r0.y -iadd r0.y, r2.z, r0.y -ishl r0.y, r0.y, l(16) -or r4.xzw, r0.yyyy, r0.xxxx -ushr r0.x, r1.x, l(22) -ushr r0.y, r0.x, l(9) -ieq r1.x, r0.x, l(512) -movc r0.x, r1.x, l(513), r0.x -movc r2.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r2.x -iadd r0.x, r0.y, r0.x -ishl r1.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r1.x -xor r0.x, r2.y, r0.x -iadd r0.x, r0.y, r0.x -or r4.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw -and r0.x, r1.y, l(2047) -ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy -ieq r0.y, r0.x, l(1024) -movc r0.x, r0.y, l(1025), r0.x -movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r4.x -iadd r0.x, r2.x, r0.x -ishl r0.y, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r0.y -xor r0.x, r4.y, r0.x -ieq r0.y, r2.y, l(1024) -movc r0.y, r0.y, l(1025), r2.y -xor r0.y, r4.z, r0.y -iadd r0.xy, r2.xzxx, r0.xyxx -ishl r1.x, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r1.x -xor r0.y, r4.w, r0.y -iadd r0.y, r2.z, r0.y -ishl r0.y, r0.y, l(16) -or r4.xzw, r0.yyyy, r0.xxxx -ushr r0.x, r1.y, l(22) -ushr r0.y, r0.x, l(9) -ieq r1.x, r0.x, l(512) -movc r0.x, r1.x, l(513), r0.x -movc r1.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r1.x -iadd r0.x, r0.y, r0.x -ishl r1.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r1.x -xor r0.x, r1.y, r0.x -iadd r0.x, r0.y, r0.x -or r4.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw -iadd r0.x, r0.w, l(5) -and r0.y, r1.z, l(2047) -ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz -ieq r1.x, r0.y, l(1024) -movc r0.y, r1.x, l(1025), r0.y -movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.y, r0.y, r4.x -iadd r0.y, r2.x, r0.y -ishl r1.x, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r1.x -xor r0.y, r4.y, r0.y -iadd r0.y, r2.x, r0.y -ieq r1.x, r2.y, l(1024) -movc r1.x, r1.x, l(1025), r2.y -xor r1.x, r4.z, r1.x -iadd r1.x, r2.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r4.w, r1.x -iadd r1.x, r2.z, r1.x -ishl r1.x, r1.x, l(16) -or r4.xzw, r0.yyyy, r1.xxxx -ushr r0.y, r1.z, l(22) -ushr r1.x, r0.y, l(9) -ieq r1.y, r0.y, l(512) -movc r0.y, r1.y, l(513), r0.y -movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) -xor r0.y, r0.y, r1.y -iadd r0.y, r1.x, r0.y -ishl r1.y, r0.y, l(6) -ushr r0.y, r0.y, l(3) -or r0.y, r0.y, r1.y -xor r0.y, r1.z, r0.y -iadd r0.y, r1.x, r0.y -or r4.y, r0.y, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw -and r0.x, r1.w, l(2047) -ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww -ieq r0.y, r0.x, l(1024) -movc r0.x, r0.y, l(1025), r0.x -movc r4.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.x, r0.x, r4.x -iadd r0.x, r1.x, r0.x -ishl r0.y, r0.x, l(5) -ushr r0.x, r0.x, l(5) -or r0.x, r0.x, r0.y -xor r0.x, r4.y, r0.x -ieq r0.y, r1.y, l(1024) -movc r0.y, r0.y, l(1025), r1.y -xor r0.y, r4.z, r0.y -iadd r0.xy, r1.xzxx, r0.xyxx -ishl r0.w, r0.y, l(5) -ushr r0.y, r0.y, l(5) -or r0.y, r0.y, r0.w -xor r0.y, r4.w, r0.y -iadd r0.y, r1.z, r0.y -ishl r0.y, r0.y, l(16) -or r4.xzw, r0.yyyy, r0.xxxx -ushr r0.x, r1.w, l(22) -ushr r0.y, r0.x, l(9) -ieq r0.w, r0.x, l(512) -movc r0.x, r0.w, l(513), r0.x -movc r1.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r1.x -iadd r0.x, r0.y, r0.x -ishl r0.w, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r0.w -xor r0.x, r1.y, r0.x -iadd r0.x, r0.y, r0.x -or r4.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.zzzz, r4.xyzw -ld r0.xy, r2.wwww, T0[0].xyzw -if_nz r3.x - ishl r1.xy, r0.xyxx, l(8, 8, 0, 0) - ushr r1.zw, r0.xxxy, l(0, 0, 8, 8) - and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xy, r1.zwzz, r1.xyxx -endif -if_nz r3.y - ushr r1.xy, r0.xyxx, l(16, 16, 0, 0) - bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.xyxx -endif -and r0.w, r0.x, l(2047) -ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r0.xxxx -ieq r1.w, r0.w, l(1024) -movc r0.w, r1.w, l(1025), r0.w -movc r2.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r2.x -iadd r0.w, r1.x, r0.w -ishl r1.w, r0.w, l(5) -ushr r0.xw, r0.xxxw, l(22, 0, 0, 5) -or r0.w, r0.w, r1.w -xor r0.w, r2.y, r0.w -iadd r0.w, r1.x, r0.w -ieq r1.x, r1.y, l(1024) -movc r1.x, r1.x, l(1025), r1.y -xor r1.x, r2.z, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r2.w, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.x, r1.x, l(16) -or r1.xzw, r0.wwww, r1.xxxx -ushr r0.w, r0.x, l(9) -ieq r2.x, r0.x, l(512) -movc r0.x, r2.x, l(513), r0.x -movc r2.xy, r0.wwww, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r0.x, r0.x, r2.x -iadd r0.x, r0.w, r0.x -ishl r2.x, r0.x, l(6) -ushr r0.x, r0.x, l(3) -or r0.x, r0.x, r2.x -xor r0.x, r2.y, r0.x -iadd r0.x, r0.w, r0.x -or r1.y, r0.x, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r6.wwww, r1.xyzw -iadd r0.x, r0.z, l(5) -and r0.w, r0.y, l(2047) -ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r0.yyyy -ieq r1.w, r0.w, l(1024) -movc r0.w, r1.w, l(1025), r0.w -movc r2.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) -xor r0.w, r0.w, r2.x -iadd r0.w, r1.x, r0.w -ishl r1.w, r0.w, l(5) -ushr r0.yw, r0.yyyw, l(0, 22, 0, 5) -or r0.w, r0.w, r1.w -xor r0.w, r2.y, r0.w -iadd r0.w, r1.x, r0.w -ieq r1.x, r1.y, l(1024) -movc r1.x, r1.x, l(1025), r1.y -xor r1.x, r2.z, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.y, r1.x, l(5) -ushr r1.x, r1.x, l(5) -or r1.x, r1.x, r1.y -xor r1.x, r2.w, r1.x -iadd r1.x, r1.z, r1.x -ishl r1.x, r1.x, l(16) -or r1.xzw, r0.wwww, r1.xxxx -ushr r0.w, r0.y, l(9) -ieq r2.x, r0.y, l(512) -movc r0.y, r2.x, l(513), r0.y -movc r2.xy, r0.wwww, l(1023,0x0000ffff,0,0), l(0,0,0,0) -xor r0.y, r0.y, r2.x -iadd r0.y, r0.w, r0.y -ishl r2.x, r0.y, l(6) -ushr r0.y, r0.y, l(3) -or r0.y, r0.y, r2.x -xor r0.y, r2.y, r0.y -iadd r0.y, r0.w, r0.y -or r1.y, r0.y, l(0x7fff0000) -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -ret -// Approximately 815 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.cso deleted file mode 100644 index 5930c21f1..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.h deleted file mode 100644 index 87d905709..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.h +++ /dev/null @@ -1,893 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r11g11b10_rgba16_snorm.cs.hlsl -const uint8_t texture_load_r11g11b10_rgba16_snorm_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x47, 0xB8, 0x41, 0x27, 0x99, 0x2E, 0x78, 0x7C, - 0xF0, 0x78, 0xC3, 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a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.txt +++ /dev/null @@ -1,308 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 6 -dcl_thread_group 4, 32, 1 -ishl r0.x, vThreadID.x, l(3) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(3) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -and r0.z, CB0[0][0].x, l(1) -if_nz r0.z - and r0.w, CB0[0][0].x, l(2) - if_nz r0.w - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r0.w, r1.y, r2.x, r1.x - ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx - imad r0.w, r0.w, r2.y, r1.x - ishl r1.x, vThreadID.y, l(10) - ishr r1.x, r1.x, l(6) - and r1.x, r1.x, l(96) - iadd r1.y, r1.y, r1.z - bfi r1.z, l(1), l(1), r1.y, l(0) - iadd r1.z, r1.z, r1.w - bfi r1.z, l(2), l(1), r1.z, l(0) - bfi r1.y, l(1), l(0), r1.y, r1.z - bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) - imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz - bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx - bfi r0.w, l(1), l(4), vThreadID.y, l(0) - ubfe r1.w, l(3), l(6), r1.x - and r2.x, r1.y, l(6) - bfi r1.y, l(1), l(8), r1.y, l(0) - imad r1.y, r1.w, l(32), r1.y - imad r1.y, r2.x, l(4), r1.y - bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx - bfi r0.w, l(9), l(3), r1.y, r1.z - bfi r0.w, l(6), l(0), r1.x, r0.w - else - ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.x, r1.z, r2.x, r1.x - ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) - and r2.xy, r2.xyxx, l(448, 2048, 0, 0) - bfi r1.z, l(23), l(9), r1.x, r2.x - bfi r2.z, l(1), l(4), vThreadID.y, l(0) - iadd r1.z, r1.z, r2.z - ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) - bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw - imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx - bfi r1.x, l(12), l(0), r2.y, r2.x - and r2.x, r2.z, l(1792) - iadd r1.x, r1.x, r2.x - and r1.w, r1.w, l(2) - iadd r1.y, r1.y, r1.w - bfi r1.y, l(2), l(6), r1.y, l(0) - iadd r1.x, r1.x, r1.y - bfi r0.w, l(6), l(0), r1.z, r1.x - endif -else - ishl r0.x, r0.x, l(2) - imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r0.w, r1.x, CB0[0][0].z, r0.x -endif -iadd r0.x, r0.w, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) -ushr r0.w, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) -or r2.xy, r2.yzyy, r2.xyxx -if_nz r2.x - ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r3.xyzw, r4.xyzw -endif -if_nz r2.y - ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) - bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw -endif -and r2.zw, r1.xxxy, l(0, 0, 2047, 2047) -ubfe r3.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r1.xyxy -ieq r4.xy, r2.zwzz, l(1024, 1024, 0, 0) -movc r2.zw, r4.xxxy, l(0,0,1025,1025), r2.zzzw -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.zw, r2.zzzw, r4.xxxy -iadd r2.zw, r3.xxxy, r2.zzzw -ishl r4.xy, r2.zwzz, l(5, 5, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) -or r2.zw, r2.zzzw, r4.xxxy -xor r2.zw, r4.zzzw, r2.zzzw -iadd r2.zw, r3.xxxy, r2.zzzw -ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r1.xyxx -ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) -movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw -movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.zw, r3.zzzw, r4.xxxy -iadd r3.zw, r3.xxxy, r3.zzzw -ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) -ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) -or r3.zw, r3.zzzw, r4.xxxy -xor r3.zw, r4.zzzw, r3.zzzw -iadd r3.xy, r3.xyxx, r3.zwzz -ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) -or r3.xz, r2.zzwz, r3.xxyx -ushr r1.xy, r1.xyxx, l(22, 22, 0, 0) -ushr r2.zw, r1.xxxy, l(0, 0, 9, 9) -ieq r4.xy, r1.xyxx, l(512, 512, 0, 0) -movc r1.xy, r4.xyxx, l(513,513,0,0), r1.xyxx -movc r4.xyzw, r2.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.xy, r1.xyxx, r4.xyxx -iadd r1.xy, r2.zwzz, r1.xyxx -ishl r4.xy, r1.xyxx, l(6, 6, 0, 0) -ushr r1.xy, r1.xyxx, l(3, 3, 0, 0) -or r1.xy, r1.xyxx, r4.xyxx -xor r1.xy, r4.zwzz, r1.xyxx -iadd r1.xy, r2.zwzz, r1.xyxx -or r3.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -and r1.xy, r1.zwzz, l(2047, 2047, 0, 0) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r1.zwzw -ieq r2.zw, r1.xxxy, l(0, 0, 1024, 1024) -movc r1.xy, r2.zwzz, l(1025,1025,0,0), r1.xyxx -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.xy, r1.xyxx, r5.xyxx -iadd r1.xy, r4.xyxx, r1.xyxx -ishl r2.zw, r1.xxxy, l(0, 0, 5, 5) -ushr r1.xy, r1.xyxx, l(5, 5, 0, 0) -or r1.xy, r1.xyxx, r2.zwzz -xor r1.xy, r5.zwzz, r1.xyxx -iadd r1.xy, r4.xyxx, r1.xyxx -ubfe r2.zw, l(0, 0, 1, 1), l(0, 0, 21, 21), r1.zzzw -ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz -movc r5.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r4.xy, r4.xyxx, r5.xyxx -iadd r4.xy, r2.zwzz, r4.xyxx -ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) -ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) -or r4.xy, r4.xyxx, r4.zwzz -xor r4.xy, r5.zwzz, r4.xyxx -iadd r2.zw, r2.zzzw, r4.xxxy -ishl r2.zw, r2.zzzw, l(0, 0, 16, 16) -or r4.xz, r1.xxyx, r2.zzwz -ushr r1.xy, r1.zwzz, l(22, 22, 0, 0) -ushr r1.zw, r1.xxxy, l(0, 0, 9, 9) -ieq r2.zw, r1.xxxy, l(0, 0, 512, 512) -movc r1.xy, r2.zwzz, l(513,513,0,0), r1.xyxx -movc r5.xyzw, r1.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r1.xy, r1.xyxx, r5.xyxx -iadd r1.xy, r1.zwzz, r1.xyxx -ishl r2.zw, r1.xxxy, l(0, 0, 6, 6) -ushr r1.xy, r1.xyxx, l(3, 3, 0, 0) -or r1.xy, r1.xyxx, r2.zwzz -xor r1.xy, r5.zwzz, r1.xyxx -iadd r1.xy, r1.zwzz, r1.xyxx -or r4.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.xyz, r0.yyyy, l(1, 2, 3, 0) -store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw -movc r0.z, r0.z, l(2), l(1) -iadd r0.x, r0.z, r0.x -ld r3.xyzw, r0.xxxx, T0[0].xyzw -if_nz r2.x - ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.xyzw, r5.xyzw -endif -if_nz r2.y - ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) - bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw -endif -and r0.xz, r3.xxyx, l(2047, 0, 2047, 0) -ubfe r2.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy -ieq r1.xw, r0.xxxz, l(1024, 0, 0, 1024) -movc r0.xz, r1.xxwx, l(1025,0,1025,0), r0.xxzx -movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r4.xxyx -iadd r0.xz, r2.xxyx, r0.xxzx -ishl r1.xw, r0.xxxz, l(5, 0, 0, 5) -ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) -or r0.xz, r0.xxzx, r1.xxwx -xor r0.xz, r4.zzwz, r0.xxzx -iadd r0.xz, r2.xxyx, r0.xxzx -ubfe r1.xw, l(1, 0, 0, 1), l(21, 0, 0, 21), r3.xxxy -ieq r2.xy, r2.zwzz, l(1024, 1024, 0, 0) -movc r2.xy, r2.xyxx, l(1025,1025,0,0), r2.zwzz -movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r2.xy, r2.xyxx, r4.xyxx -iadd r2.xy, r1.xwxx, r2.xyxx -ishl r2.zw, r2.xxxy, l(0, 0, 5, 5) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -or r2.xy, r2.xyxx, r2.zwzz -xor r2.xy, r4.zwzz, r2.xyxx -iadd r1.xw, r1.xxxw, r2.xxxy -ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) -or r2.xz, r0.xxzx, r1.xxwx -ushr r0.xz, r3.xxyx, l(22, 0, 22, 0) -ushr r1.xw, r0.xxxz, l(9, 0, 0, 9) -ieq r3.xy, r0.xzxx, l(512, 512, 0, 0) -movc r0.xz, r3.xxyx, l(513,0,513,0), r0.xxzx -movc r4.xyzw, r1.xwxw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r4.xxyx -iadd r0.xz, r1.xxwx, r0.xxzx -ishl r3.xy, r0.xzxx, l(6, 6, 0, 0) -ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) -or r0.xz, r0.xxzx, r3.xxyx -xor r0.xz, r4.zzwz, r0.xxzx -iadd r0.xz, r1.xxwx, r0.xxzx -or r2.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -and r0.xz, r3.zzwz, l(2047, 0, 2047, 0) -ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw -ieq r1.xw, r0.xxxz, l(1024, 0, 0, 1024) -movc r0.xz, r1.xxwx, l(1025,0,1025,0), r0.xxzx -movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r5.xxyx -iadd r0.xz, r4.xxyx, r0.xxzx -ishl r1.xw, r0.xxxz, l(5, 0, 0, 5) -ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) -or r0.xz, r0.xxzx, r1.xxwx -xor r0.xz, r5.zzwz, r0.xxzx -iadd r0.xz, r4.xxyx, r0.xxzx -ubfe r1.xw, l(1, 0, 0, 1), l(21, 0, 0, 21), r3.zzzw -ieq r3.xy, r4.zwzz, l(1024, 1024, 0, 0) -movc r3.xy, r3.xyxx, l(1025,1025,0,0), r4.zwzz -movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r3.xy, r3.xyxx, r4.xyxx -iadd r3.xy, r1.xwxx, r3.xyxx -ishl r4.xy, r3.xyxx, l(5, 5, 0, 0) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -or r3.xy, r3.xyxx, r4.xyxx -xor r3.xy, r4.zwzz, r3.xyxx -iadd r1.xw, r1.xxxw, r3.xxxy -ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) -or r4.xz, r0.xxzx, r1.xxwx -ushr r0.xz, r3.zzwz, l(22, 0, 22, 0) -ushr r1.xw, r0.xxxz, l(9, 0, 0, 9) -ieq r3.xy, r0.xzxx, l(512, 512, 0, 0) -movc r0.xz, r3.xxyx, l(513,0,513,0), r0.xxzx -movc r3.xyzw, r1.xwxw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) -xor r0.xz, r0.xxzx, r3.xxyx -iadd r0.xz, r1.xxwx, r0.xxzx -ishl r3.xy, r0.xzxx, l(6, 6, 0, 0) -ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) -or r0.xz, r0.xxzx, r3.xxyx -xor r0.xz, r3.zzwz, r0.xxzx -iadd r0.xz, r1.xxwx, r0.xxzx -or r4.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw -ret -// Approximately 257 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.cso deleted file mode 100644 index b4dc8b784..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h deleted file mode 100644 index 8b9d12824..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h +++ /dev/null @@ -1,736 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r4g4b4a4_b4g4r4a4_2x.cs.hlsl -const uint8_t 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0x00, - 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, - 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xF6, 0x0F, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0xF4, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x4E, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.txt deleted file mode 100644 index 3ff3bb00c..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.txt +++ /dev/null @@ -1,295 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r3.zw, r5.xxxz - mov r2.zw, r5.yyyw -else - mov r3.zw, r4.xxxz - mov r2.zw, r4.yyyw -endif -and r4.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r5.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r3.xyzw, r3.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.y, r0.z, r0.y -and r3.xyzw, r2.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) -and r4.xyzw, r4.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r3.xyzw, r3.xyzw, r4.xyzw -ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) -and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r1.zzzz, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r5.xyzw, r1.wwww, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -and r5.xyzw, r4.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) -and r6.xyzw, r6.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) -and r4.xyzw, r4.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r1.yzw, r0.zzzz, r2.xxyz -and r4.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r5.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r3.xyzw, r3.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(16) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r5.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -and r5.xyzw, r4.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) -and r6.xyzw, r6.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) -and r4.xyzw, r4.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -and r4.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r5.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r3.xyzw, r3.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -else - mov r4.zw, r0.xxxz - mov r3.zw, r0.yyyw -endif -and r0.xyzw, r4.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) -and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r0.xyzw, r0.xyzw, r5.xyzw -ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) -and r4.xyzw, r4.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r0.xyzw, r0.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw -and r0.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r2.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r2.xyzw, r2.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r0.xyzw, r0.xyzw, r2.xyzw -ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) -and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r0.xyzw, r0.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw -ret -// Approximately 244 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.cso deleted file mode 100644 index 5ba164fdb..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h deleted file mode 100644 index c1d500fbc..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h +++ /dev/null @@ -1,2166 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl -const uint8_t texture_load_r4g4b4a4_b4g4r4a4_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x88, 0xF9, 0xE8, 0xC9, 0xA6, 0x67, 0xB0, 0x71, - 0x59, 0x24, 0x17, 0xB6, 0x89, 0x20, 0x37, 0xB4, 0x01, 0x00, 0x00, 0x00, - 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a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.txt deleted file mode 100644 index 901f7c823..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.txt +++ /dev/null @@ -1,785 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 11 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(1) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r1.yz, r0.xxxx, T0[0].zxyw -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -and r4.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r4.zw, r1.yyyz, l(0, 0, 8, 8) -and r4.zw, r4.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r5.xy, r1.yzyy, l(8, 8, 0, 0) -and r5.xy, r5.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.xy, r3.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r6.xy, r1.yzyy, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.xy, r3.xyxx, r6.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r6.xy, r3.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.zw, r3.zzzw, r6.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r7.xy, r3.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r8.xy, r3.xyxx, l(8, 8, 0, 0) -and r8.xy, r8.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r8.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r6.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r8.zw, r6.zzzw, l(0, 0, 8, 8) -and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r6.zw, r6.zzzw, l(0, 0, 8, 8) -and r6.zw, r6.zzzw, l(0, 0, 0x000f000f, 0x000f000f) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx -iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx -iadd r1.w, r0.z, r0.y -ushr r2.x, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx -ushr r3.x, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r3.x -store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw -iadd r2.xy, r1.wwww, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) -bfi r10.y, l(16), l(16), r6.y, r2.z -store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) -ld r1.yz, r2.xxxx, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r3.zzwz, r3.xxyx -endif -and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r3.zw, r1.yyyz, l(0, 0, 8, 8) -and r3.zw, r3.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r3.xy, r3.zwzz, r3.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r3.xy, r1.yzyy, r3.xyxx -ld r1.yz, r2.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r4.xxyx -endif -and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) -and r4.xy, r4.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r2.xy, r2.xyxx, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r4.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r5.xxyx -endif -and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r5.xy, r1.yzyy, l(8, 8, 0, 0) -and r5.xy, r5.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r5.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r1.yz, r1.yyzy, r2.xxyx -iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) -ld r6.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r5.zw, r6.xxxy, r6.zzzw -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r6.zwzz, r6.xyxx -endif -and r6.xy, r2.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r6.zw, r2.xxxy, l(0, 0, 8, 8) -and r6.zw, r6.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r6.xy, r6.zwzz, r6.xyxx -ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) -and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r2.xy, r2.xyxx, r6.xyxx -ld r6.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -iadd r1.w, r0.x, l(17) -ld r2.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -and r7.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r7.zw, r2.zzzw, l(0, 0, 8, 8) -and r7.zw, r7.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) -iadd r7.yz, r2.zzwz, r7.xxyx -ld r2.zw, r1.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r8.zw, r2.zzzw, l(0, 0, 8, 8) -and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) -iadd r8.yz, r2.zzwz, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx -store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy -iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) -bfi r7.x, l(16), l(0), r2.x, r6.y -store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx -iadd r1.w, r0.z, r9.z -ushr r2.z, r3.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz -ushr r2.z, r4.x, l(16) -bfi r3.y, l(16), l(16), r1.y, r2.z -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -iadd r2.zw, r1.wwww, l(0, 0, 1, 2) -ushr r1.y, r1.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) -bfi r3.y, l(16), l(16), r2.y, r4.x -store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww -ushr r1.y, r7.z, l(16) -bfi r3.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -if_nz r0.w - iadd r0.w, r0.x, l(72) -else - iadd r0.w, r0.x, l(18) -endif -ld r1.yz, r0.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -and r4.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r4.zw, r1.yyyz, l(0, 0, 8, 8) -and r4.zw, r4.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r5.xy, r1.yzyy, l(8, 8, 0, 0) -and r5.xy, r5.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.xy, r3.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r6.xy, r1.yzyy, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.xy, r3.xyxx, r6.xyxx -ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) -and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r6.xy, r3.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.zw, r3.zzzw, r6.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r7.xy, r3.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r8.xy, r3.xyxx, l(8, 8, 0, 0) -and r8.xy, r8.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.zw, r6.zzzw, r8.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r6.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r8.zw, r6.zzzw, l(0, 0, 8, 8) -and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r6.zw, r6.zzzw, l(0, 0, 8, 8) -and r6.zw, r6.zzzw, l(0, 0, 0x000f000f, 0x000f000f) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx -store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx -iadd r0.x, r0.z, r10.y -ushr r1.w, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww -ushr r1.w, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r1.w -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) -bfi r9.y, l(16), l(16), r6.y, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx -iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) -iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) -ld r3.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) -and r4.xy, r4.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r3.zw, r3.zzzw, r4.xxxy -ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) -and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r3.xy, r3.xyxx, r3.zwzz -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r4.zwzz, r4.xyxx -endif -and r4.xy, r2.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r4.zw, r2.xxxy, l(0, 0, 8, 8) -and r4.zw, r4.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) -and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r4.xy, r2.xyxx, r4.xyxx -ld r2.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r5.zwzz, r5.xyxx -endif -and r5.xy, r2.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r5.zw, r2.xxxy, l(0, 0, 8, 8) -and r5.zw, r5.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r5.xy, r5.zwzz, r5.xyxx -ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) -and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r5.xy, r2.xyxx, r5.xyxx -ld r2.xy, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r6.xyxx -endif -and r2.zw, r2.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r2.zw, r2.zzzw, r6.xxxy -ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) -and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r2.xy, r2.xyxx, r2.zwzz -iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) -ld r2.zw, r6.xxxx, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -and r7.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r7.zw, r2.zzzw, l(0, 0, 8, 8) -and r7.zw, r7.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) -iadd r5.zw, r2.zzzw, r7.xxxy -ld r2.zw, r6.yyyy, T0[0].zwxy -if_nz r1.x - ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r6.xxxy, r7.xxxy -endif -and r6.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) -and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) -iadd r2.zw, r2.zzzw, r6.xxxy -ld r6.xy, r6.zzzz, T0[0].xyzw -if_nz r1.x - ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) - ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r7.zwzz, r7.xyxx -endif -and r7.xy, r6.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r7.zw, r6.xxxy, l(0, 0, 8, 8) -and r7.zw, r7.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) -and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -iadd r0.x, r0.w, l(17) -ld r7.xy, r6.wwww, T0[0].xyzw -if_nz r1.x - ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) - and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r7.xy, r7.zwzz, r8.xyxx -endif -and r7.zw, r7.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r8.xy, r7.xyxx, l(8, 8, 0, 0) -and r8.xy, r8.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) -iadd r7.zw, r7.zzzw, r8.xxxy -ushr r7.xy, r7.xyxx, l(8, 8, 0, 0) -and r7.xy, r7.xyxx, l(0x000f000f, 0x000f000f, 0, 0) -iadd r7.yz, r7.xxyx, r7.zzwz -ld r0.xw, r0.xxxx, T0[0].xzwy -if_nz r1.x - ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r8.zzzw, r8.xxxy -endif -and r8.xy, r0.xwxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) -ishl r8.zw, r0.xxxw, l(0, 0, 8, 8) -and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r0.xw, r0.xxxw, l(8, 0, 0, 8) -and r0.xw, r0.xxxw, l(0x000f000f, 0, 0, 0x000f000f) -iadd r8.yz, r0.xxwx, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx -store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy -bfi r7.x, l(16), l(0), r2.z, r6.y -store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx -iadd r0.x, r0.z, r1.y -ushr r0.y, r3.y, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy -ushr r0.y, r4.x, l(16) -bfi r1.y, l(16), l(16), r2.x, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) -ushr r1.x, r2.x, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx -ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) -bfi r1.y, l(16), l(16), r2.w, r2.x -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz -ushr r0.y, r7.z, l(16) -bfi r1.y, l(16), l(16), r8.y, r0.y -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r2.y -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx -ret -// Approximately 734 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.cso deleted file mode 100644 index 76e3c6b7f..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.h deleted file mode 100644 index 6d78a302e..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.h +++ /dev/null @@ -1,407 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r4g4b4a4_b4g4r4a4.cs.hlsl -const uint8_t texture_load_r4g4b4a4_b4g4r4a4_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xBD, 0x8C, 0x5C, 0xB3, 0xBB, 0x66, 0x75, 0x5E, - 0x64, 0xFE, 0xA0, 0xFE, 0x27, 0xA5, 0x4B, 0xA1, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x12, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x40, 0x12, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 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0x00, 0x0F, 0x00, 0x0F, 0x00, 0x0F, 0x00, - 0x1E, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0x69, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x1C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.txt deleted file mode 100644 index 36dd0c83a..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.txt +++ /dev/null @@ -1,156 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(1) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r0.x, r0.x, l(3) - iadd r0.x, r0.x, r1.z - bfi r0.x, l(2), l(6), r0.x, l(0) - iadd r0.x, r1.y, r0.x - bfi r1.x, l(6), l(0), r2.x, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r0.y, r0.y, l(1) -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -and r2.xyzw, r1.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) -and r3.xyzw, r3.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r2.xyzw, r2.xyzw, r3.xyzw -ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) -and r1.xyzw, r1.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r1.xyzw, r1.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r1.x, r0.z, l(1) -movc r0.w, r0.w, l(4), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].xyzw -if_nz r0.y - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -and r3.xyzw, r2.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) -ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) -and r4.xyzw, r4.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) -iadd r3.xyzw, r3.xyzw, r4.xyzw -ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) -and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw -ret -// Approximately 105 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.cso deleted file mode 100644 index e3327a318..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.h deleted file mode 100644 index 7d26beb36..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.h +++ /dev/null @@ -1,736 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g5b5a1_b5g5r5a1_2x.cs.hlsl -const uint8_t texture_load_r5g5b5a1_b5g5r5a1_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x1C, 0xAC, 0x9D, 0x2C, 0x7A, 0x24, 0xE2, 0x32, - 0x1F, 0x4A, 0xEA, 0xAD, 0x4E, 0xC2, 0xDF, 0x58, 0x01, 0x00, 0x00, 0x00, - 0x4C, 0x22, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xB0, 0x21, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 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0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0xF4, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x4E, 0x00, 0x00, 0x00, 0x47, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.txt deleted file mode 100644 index 221128e6d..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.txt +++ /dev/null @@ -1,295 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r3.zw, r5.xxxz - mov r2.zw, r5.yyyw -else - mov r3.zw, r4.xxxz - mov r2.zw, r4.yyyw -endif -and r4.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r5.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.y, r0.z, r0.y -and r3.xyzw, r2.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r4.xyzw, r2.xyzw, l(10, 10, 10, 10) -and r4.xyzw, r4.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r3.xyzw, r3.xyzw, r4.xyzw -ushr r2.xyzw, r2.xyzw, l(10, 10, 10, 10) -and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r1.zzzz, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r5.xyzw, r1.wwww, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -and r5.xyzw, r4.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r6.xyzw, r4.xyzw, l(10, 10, 10, 10) -and r6.xyzw, r6.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(10, 10, 10, 10) -and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r1.yzw, r0.zzzz, r2.xxyz -and r4.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r5.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(16) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r5.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -and r5.xyzw, r4.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r6.xyzw, r4.xyzw, l(10, 10, 10, 10) -and r6.xyzw, r6.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(10, 10, 10, 10) -and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -and r4.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r5.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -else - mov r4.zw, r0.xxxz - mov r3.zw, r0.yyyw -endif -and r0.xyzw, r4.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r5.xyzw, r4.xyzw, l(10, 10, 10, 10) -and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r0.xyzw, r0.xyzw, r5.xyzw -ushr r4.xyzw, r4.xyzw, l(10, 10, 10, 10) -and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r0.xyzw, r0.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw -and r0.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r2.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r2.xyzw, r2.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r0.xyzw, r0.xyzw, r2.xyzw -ushr r2.xyzw, r3.xyzw, l(10, 10, 10, 10) -and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r0.xyzw, r0.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw -ret -// Approximately 244 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.cso deleted file mode 100644 index 1666fce30..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h deleted file mode 100644 index 512c062b4..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h +++ /dev/null @@ -1,2166 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl -const uint8_t texture_load_r5g5b5a1_b5g5r5a1_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xA9, 0x31, 0x32, 0x91, 0x2A, 0xFA, 0xAC, 0xF2, - 0xE4, 0xAE, 0x59, 0x57, 0xA9, 0x1E, 0xDE, 0x86, 0x01, 0x00, 0x00, 0x00, - 0x54, 0x65, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 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0x02, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xF2, 0x00, 0x00, 0x00, 0x0F, 0x01, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.txt deleted file mode 100644 index d61484e04..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.txt +++ /dev/null @@ -1,785 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 11 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(1) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r1.yz, r0.xxxx, T0[0].zxyw -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -and r4.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r4.zw, r1.yyyz, l(0, 0, 10, 10) -and r4.zw, r4.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r5.xy, r1.yzyy, l(10, 10, 0, 0) -and r5.xy, r5.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.xy, r3.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r6.xy, r1.yzyy, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.xy, r3.xyxx, r6.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r6.xy, r3.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.zw, r3.zzzw, r6.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r7.xy, r3.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r8.xy, r3.xyxx, l(10, 10, 0, 0) -and r8.xy, r8.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r8.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r6.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r8.zw, r6.zzzw, l(0, 0, 10, 10) -and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r6.zw, r6.zzzw, l(0, 0, 10, 10) -and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx -iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx -iadd r1.w, r0.z, r0.y -ushr r2.x, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx -ushr r3.x, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r3.x -store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw -iadd r2.xy, r1.wwww, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) -bfi r10.y, l(16), l(16), r6.y, r2.z -store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) -ld r1.yz, r2.xxxx, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r3.zzwz, r3.xxyx -endif -and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r3.zw, r1.yyyz, l(0, 0, 10, 10) -and r3.zw, r3.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r3.xy, r3.zwzz, r3.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r3.xy, r1.yzyy, r3.xyxx -ld r1.yz, r2.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r4.xxyx -endif -and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r4.xy, r1.yzyy, l(10, 10, 0, 0) -and r4.xy, r4.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r2.xy, r2.xyxx, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r4.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r5.xxyx -endif -and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r5.xy, r1.yzyy, l(10, 10, 0, 0) -and r5.xy, r5.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r5.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r1.yz, r1.yyzy, r2.xxyx -iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) -ld r6.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.zw, r6.xxxy, r6.zzzw -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r6.zwzz, r6.xyxx -endif -and r6.xy, r2.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r6.zw, r2.xxxy, l(0, 0, 10, 10) -and r6.zw, r6.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r6.xy, r6.zwzz, r6.xyxx -ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r2.xy, r2.xyxx, r6.xyxx -ld r6.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -iadd r1.w, r0.x, l(17) -ld r2.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -and r7.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r7.zw, r2.zzzw, l(0, 0, 10, 10) -and r7.zw, r7.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r7.yz, r2.zzwz, r7.xxyx -ld r2.zw, r1.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r8.zw, r2.zzzw, l(0, 0, 10, 10) -and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r8.yz, r2.zzwz, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx -store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy -iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) -bfi r7.x, l(16), l(0), r2.x, r6.y -store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx -iadd r1.w, r0.z, r9.z -ushr r2.z, r3.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz -ushr r2.z, r4.x, l(16) -bfi r3.y, l(16), l(16), r1.y, r2.z -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -iadd r2.zw, r1.wwww, l(0, 0, 1, 2) -ushr r1.y, r1.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) -bfi r3.y, l(16), l(16), r2.y, r4.x -store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww -ushr r1.y, r7.z, l(16) -bfi r3.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -if_nz r0.w - iadd r0.w, r0.x, l(72) -else - iadd r0.w, r0.x, l(18) -endif -ld r1.yz, r0.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -and r4.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r4.zw, r1.yyyz, l(0, 0, 10, 10) -and r4.zw, r4.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r5.xy, r1.yzyy, l(10, 10, 0, 0) -and r5.xy, r5.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.xy, r3.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r6.xy, r1.yzyy, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.xy, r3.xyxx, r6.xyxx -ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r6.xy, r3.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.zw, r3.zzzw, r6.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r7.xy, r3.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r8.xy, r3.xyxx, l(10, 10, 0, 0) -and r8.xy, r8.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.zw, r6.zzzw, r8.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r6.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r8.zw, r6.zzzw, l(0, 0, 10, 10) -and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r6.zw, r6.zzzw, l(0, 0, 10, 10) -and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx -store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx -iadd r0.x, r0.z, r10.y -ushr r1.w, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww -ushr r1.w, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r1.w -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) -bfi r9.y, l(16), l(16), r6.y, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx -iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) -iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) -ld r3.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r4.xy, r3.xyxx, l(10, 10, 0, 0) -and r4.xy, r4.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r3.zw, r3.zzzw, r4.xxxy -ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r3.xy, r3.xyxx, r3.zwzz -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r4.zwzz, r4.xyxx -endif -and r4.xy, r2.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r4.zw, r2.xxxy, l(0, 0, 10, 10) -and r4.zw, r4.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r4.xy, r2.xyxx, r4.xyxx -ld r2.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r5.zwzz, r5.xyxx -endif -and r5.xy, r2.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r5.zw, r2.xxxy, l(0, 0, 10, 10) -and r5.zw, r5.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r5.xy, r5.zwzz, r5.xyxx -ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.xy, r2.xyxx, r5.xyxx -ld r2.xy, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r6.xyxx -endif -and r2.zw, r2.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r6.xy, r2.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r2.zw, r2.zzzw, r6.xxxy -ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r2.xy, r2.xyxx, r2.zwzz -iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) -ld r2.zw, r6.xxxx, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -and r7.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r7.zw, r2.zzzw, l(0, 0, 10, 10) -and r7.zw, r7.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r5.zw, r2.zzzw, r7.xxxy -ld r2.zw, r6.yyyy, T0[0].zwxy -if_nz r1.x - ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r6.xxxy, r7.xxxy -endif -and r6.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r7.xy, r2.zwzz, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r2.zw, r2.zzzw, r6.xxxy -ld r6.xy, r6.zzzz, T0[0].xyzw -if_nz r1.x - ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) - ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r7.zwzz, r7.xyxx -endif -and r7.xy, r6.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r7.zw, r6.xxxy, l(0, 0, 10, 10) -and r7.zw, r7.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -iadd r0.x, r0.w, l(17) -ld r7.xy, r6.wwww, T0[0].xyzw -if_nz r1.x - ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) - and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r7.xy, r7.zwzz, r8.xyxx -endif -and r7.zw, r7.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) -ishl r8.xy, r7.xyxx, l(10, 10, 0, 0) -and r8.xy, r8.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) -iadd r7.zw, r7.zzzw, r8.xxxy -ushr r7.xy, r7.xyxx, l(10, 10, 0, 0) -and r7.xy, r7.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r7.yz, r7.xxyx, r7.zzwz -ld r0.xw, r0.xxxx, T0[0].xzwy -if_nz r1.x - ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r8.zzzw, r8.xxxy -endif -and r8.xy, r0.xwxx, l(0x83e083e0, 0x83e083e0, 0, 0) -ishl r8.zw, r0.xxxw, l(0, 0, 10, 10) -and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r0.xw, r0.xxxw, l(10, 0, 0, 10) -and r0.xw, r0.xxxw, l(0x001f001f, 0, 0, 0x001f001f) -iadd r8.yz, r0.xxwx, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx -store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy -bfi r7.x, l(16), l(0), r2.z, r6.y -store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx -iadd r0.x, r0.z, r1.y -ushr r0.y, r3.y, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy -ushr r0.y, r4.x, l(16) -bfi r1.y, l(16), l(16), r2.x, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) -ushr r1.x, r2.x, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx -ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) -bfi r1.y, l(16), l(16), r2.w, r2.x -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz -ushr r0.y, r7.z, l(16) -bfi r1.y, l(16), l(16), r8.y, r0.y -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r2.y -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx -ret -// Approximately 734 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.cso deleted file mode 100644 index 37626f4f3..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.h deleted file mode 100644 index 7656e2198..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.h +++ /dev/null @@ -1,407 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g5b5a1_b5g5r5a1.cs.hlsl -const uint8_t texture_load_r5g5b5a1_b5g5r5a1_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xFB, 0xBA, 0x68, 0x82, 0xA7, 0xDD, 0xC0, 0x2B, - 0xE3, 0x1D, 0xAA, 0xA1, 0x9E, 0x13, 0xDD, 0x44, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x12, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x40, 0x12, 0x00, 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Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(1) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r0.x, r0.x, l(3) - iadd r0.x, r0.x, r1.z - bfi r0.x, l(2), l(6), r0.x, l(0) - iadd r0.x, r1.y, r0.x - bfi r1.x, l(6), l(0), r2.x, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r0.y, r0.y, l(1) -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -and r2.xyzw, r1.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r3.xyzw, r1.xyzw, l(10, 10, 10, 10) -and r3.xyzw, r3.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r2.xyzw, r2.xyzw, r3.xyzw -ushr r1.xyzw, r1.xyzw, l(10, 10, 10, 10) -and r1.xyzw, r1.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r1.xyzw, r1.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r1.x, r0.z, l(1) -movc r0.w, r0.w, l(4), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].xyzw -if_nz r0.y - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -and r3.xyzw, r2.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) -ishl r4.xyzw, r2.xyzw, l(10, 10, 10, 10) -and r4.xyzw, r4.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) -iadd r3.xyzw, r3.xyzw, r4.xyzw -ushr r2.xyzw, r2.xyzw, l(10, 10, 10, 10) -and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw -ret -// Approximately 105 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.cso deleted file mode 100644 index a9318e0ae..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h deleted file mode 100644 index 0e2fcad99..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h +++ /dev/null @@ -1,691 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x.cs.hlsl -const uint8_t texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xA6, 0x03, 0x7A, 0x89, 0x88, 0x7C, 0xE0, 0x3D, - 0x3A, 0xB1, 0xC0, 0x48, 0x7E, 0x86, 0x77, 0x68, 0x01, 0x00, 0x00, 0x00, - 0x2C, 0x20, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x90, 0x1F, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 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b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.txt deleted file mode 100644 index d79c7a760..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.txt +++ /dev/null @@ -1,279 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r3.zw, r5.xxxz - mov r2.zw, r5.yyyw -else - mov r3.zw, r4.xxxz - mov r2.zw, r4.yyyw -endif -ishl r4.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r3.xyzw, r3.xyzw, l(5, 5, 5, 5) -and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.y, r0.z, r0.y -ishl r3.xyzw, r2.xyzw, l(11, 11, 11, 11) -and r3.xyzw, r3.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r2.xyzw, r2.xyzw, l(5, 5, 5, 5) -and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r1.zzzz, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r5.xyzw, r1.wwww, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -ishl r5.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r4.xyzw, r4.xyzw, l(5, 5, 5, 5) -and r4.xyzw, r4.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r1.yzw, r0.zzzz, r2.xxyz -ishl r4.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r3.xyzw, r3.xyzw, l(5, 5, 5, 5) -and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(16) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r5.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -ishl r5.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r4.xyzw, r4.xyzw, l(5, 5, 5, 5) -and r4.xyzw, r4.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -ishl r4.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r3.xyzw, r3.xyzw, l(5, 5, 5, 5) -and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -else - mov r4.zw, r0.xxxz - mov r3.zw, r0.yyyw -endif -ishl r0.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r0.xyzw, r0.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r4.xyzw, r4.xyzw, l(5, 5, 5, 5) -and r4.xyzw, r4.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r0.xyzw, r0.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw -ishl r0.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r0.xyzw, r0.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r2.xyzw, r3.xyzw, l(5, 5, 5, 5) -and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r0.xyzw, r0.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw -ret -// Approximately 228 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.cso deleted file mode 100644 index 015163022..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h deleted file mode 100644 index 0b87e9884..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h +++ /dev/null @@ -1,1932 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl -const uint8_t texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x05, 0x87, 0xC7, 0x79, 0x8F, 0x3D, 0x8A, 0x41, - 0x4F, 0x32, 0x2A, 0x1F, 0xC5, 0x47, 0xC6, 0x4E, 0x01, 0x00, 0x00, 0x00, - 0x5C, 0x5A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xC0, 0x59, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x02, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xBD, 0x02, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7C, 0x02, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE1, 0x02, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x7C, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x13, 0x03, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x38, 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+0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 11 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(1) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r1.yz, r0.xxxx, T0[0].zxyw -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) -and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) -ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) -and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -ishl r8.xy, r6.zwzz, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r6.zw, r6.zzzw, l(0, 0, 5, 5) -and r6.zw, r6.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx -iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx -iadd r1.w, r0.z, r0.y -ushr r2.x, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx -ushr r3.x, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r3.x -store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw -iadd r2.xy, r1.wwww, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) -bfi r10.y, l(16), l(16), r6.y, r2.z -store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) -ld r1.yz, r2.xxxx, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r3.zzwz, r3.xxyx -endif -ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r3.xy, r1.yzyy, r3.xyxx -ld r1.yz, r2.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r4.xxyx -endif -ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r4.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r5.xxyx -endif -ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r5.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r1.yz, r1.yyzy, r2.xxyx -iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) -ld r6.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) -ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) -and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r5.zw, r6.xxxy, r6.zzzw -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r6.zwzz, r6.xyxx -endif -ishl r6.xy, r2.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r2.xy, r2.xyxx, r6.xyxx -ld r6.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) -ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) -and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r6.xy, r6.xyxx, r6.zwzz -iadd r1.w, r0.x, l(17) -ld r2.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) -and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) -iadd r7.yz, r2.zzwz, r7.xxyx -ld r2.zw, r1.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r8.zzzw, r8.xxxy -endif -ishl r8.xy, r2.zwzz, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) -and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) -iadd r8.yz, r2.zzwz, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx -store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy -iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) -bfi r7.x, l(16), l(0), r2.x, r6.y -store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx -iadd r1.w, r0.z, r9.z -ushr r2.z, r3.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz -ushr r2.z, r4.x, l(16) -bfi r3.y, l(16), l(16), r1.y, r2.z -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -iadd r2.zw, r1.wwww, l(0, 0, 1, 2) -ushr r1.y, r1.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) -bfi r3.y, l(16), l(16), r2.y, r4.x -store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww -ushr r1.y, r7.z, l(16) -bfi r3.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -if_nz r0.w - iadd r0.w, r0.x, l(72) -else - iadd r0.w, r0.x, l(18) -endif -ld r1.yz, r0.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) -and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) -and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) -ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) -and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -ishl r8.xy, r6.zwzz, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r6.zw, r6.zzzw, l(0, 0, 5, 5) -and r6.zw, r6.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx -store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx -iadd r0.x, r0.z, r10.y -ushr r1.w, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww -ushr r1.w, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r1.w -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) -bfi r9.y, l(16), l(16), r6.y, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx -iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) -iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) -ld r3.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) -ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) -and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r3.xy, r3.xyxx, r3.zwzz -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r4.zwzz, r4.xyxx -endif -ishl r4.xy, r2.xyxx, l(11, 11, 0, 0) -and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r4.xy, r2.xyxx, r4.xyxx -ld r2.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r5.zwzz, r5.xyxx -endif -ishl r5.xy, r2.xyxx, l(11, 11, 0, 0) -and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r5.xy, r2.xyxx, r5.xyxx -ld r2.xy, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r6.xyxx -endif -ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) -ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) -and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r2.xy, r2.xyxx, r2.zwzz -iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) -ld r2.zw, r6.xxxx, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) -and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) -iadd r5.zw, r2.zzzw, r7.xxxy -ld r2.zw, r6.yyyy, T0[0].zwxy -if_nz r1.x - ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r6.xxxy, r7.xxxy -endif -ishl r6.xy, r2.zwzz, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) -and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) -iadd r2.zw, r2.zzzw, r6.xxxy -ld r6.xy, r6.zzzz, T0[0].xyzw -if_nz r1.x - ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) - ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r7.zwzz, r7.xyxx -endif -ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) -and r6.xy, r6.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -iadd r0.x, r0.w, l(17) -ld r7.xy, r6.wwww, T0[0].xyzw -if_nz r1.x - ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) - and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r7.xy, r7.zwzz, r8.xyxx -endif -ishl r7.zw, r7.xxxy, l(0, 0, 11, 11) -ushr r7.xy, r7.xyxx, l(5, 5, 0, 0) -and r7.xyzw, r7.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) -iadd r7.yz, r7.xxyx, r7.zzwz -ld r0.xw, r0.xxxx, T0[0].xzwy -if_nz r1.x - ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r8.zzzw, r8.xxxy -endif -ishl r8.xy, r0.xwxx, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) -and r0.xw, r0.xxxw, l(0x07ff07ff, 0, 0, 0x07ff07ff) -iadd r8.yz, r0.xxwx, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx -store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy -bfi r7.x, l(16), l(0), r2.z, r6.y -store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx -iadd r0.x, r0.z, r1.y -ushr r0.y, r3.y, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy -ushr r0.y, r4.x, l(16) -bfi r1.y, l(16), l(16), r2.x, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) -ushr r1.x, r2.x, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx -ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) -bfi r1.y, l(16), l(16), r2.w, r2.x -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz -ushr r0.y, r7.z, l(16) -bfi r1.y, l(16), l(16), r8.y, r0.y -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r2.y -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx -ret -// Approximately 653 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.cso deleted file mode 100644 index 69a83c9a1..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h deleted file mode 100644 index 634f61902..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h +++ /dev/null @@ -1,395 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g5b6_b5g6r5_swizzle_rbga.cs.hlsl -const uint8_t texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC8, 0x24, 0x90, 0xC7, 0x67, 0x57, 0xCE, 0x43, - 0x3B, 0x2B, 0xD8, 0x14, 0xD2, 0xA0, 0x00, 0x1C, 0x01, 0x00, 0x00, 0x00, - 0x54, 0x12, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xB8, 0x11, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 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0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.txt deleted file mode 100644 index 7c321a4d6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.txt +++ /dev/null @@ -1,152 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(1) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r0.x, r0.x, l(3) - iadd r0.x, r0.x, r1.z - bfi r0.x, l(2), l(6), r0.x, l(0) - iadd r0.x, r1.y, r0.x - bfi r1.x, l(6), l(0), r2.x, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r0.y, r0.y, l(1) -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -ishl r2.xyzw, r1.xyzw, l(11, 11, 11, 11) -and r2.xyzw, r2.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r1.xyzw, r1.xyzw, l(5, 5, 5, 5) -and r1.xyzw, r1.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r1.xyzw, r1.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r1.x, r0.z, l(1) -movc r0.w, r0.w, l(4), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].xyzw -if_nz r0.y - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -ishl r3.xyzw, r2.xyzw, l(11, 11, 11, 11) -and r3.xyzw, r3.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -ushr r2.xyzw, r2.xyzw, l(5, 5, 5, 5) -and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw -ret -// Approximately 101 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.cso deleted file mode 100644 index 30416fdac..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.h deleted file mode 100644 index 7e844738b..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.h +++ /dev/null @@ -1,736 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g6b5_b5g6r5_2x.cs.hlsl -const uint8_t texture_load_r5g6b5_b5g6r5_2x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x7D, 0xE9, 0xED, 0x98, 0xAC, 0x18, 0x1A, 0xF2, - 0x62, 0x0E, 0x3A, 0x37, 0x81, 0xD7, 0xE1, 0xCB, 0x01, 0x00, 0x00, 0x00, - 0x4C, 0x22, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xB0, 0x21, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 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XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 8 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.z, r1.y, r1.x -or r0.z, r1.z, r0.z -if_nz r0.z - ret -endif -ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) -ishl r0.w, CB0[0][1].y, l(1) -ishl r0.y, r0.y, l(1) -imad r0.z, vThreadID.z, r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(4) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r2.xyzw, r0.xxxx, T0[0].ywxz -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.ywxz, r4.ywxz - mov r3.xy, r2.zwzz -else - mov r3.xy, r2.zwzz -endif -iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) -ld r4.xyzw, r1.yyyy, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r3.zw, r5.xxxz - mov r2.zw, r5.yyyw -else - mov r3.zw, r4.xxxz - mov r2.zw, r4.yyyw -endif -and r4.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r5.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw -iadd r1.y, r0.z, r0.y -and r3.xyzw, r2.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r4.xyzw, r2.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r3.xyzw, r3.xyzw, r4.xyzw -ushr r2.xyzw, r2.xyzw, l(11, 11, 11, 11) -and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw -iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r3.xyzw, r1.zzzz, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r5.xyzw, r1.wwww, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -and r5.xyzw, r4.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r6.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r6.xyzw, r6.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw -iadd r1.yzw, r0.zzzz, r2.xxyz -and r4.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r5.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw -if_nz r0.w - iadd r0.y, r0.x, l(16) -else - iadd r0.y, r0.x, l(4) -endif -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) -ld r5.xyzw, r0.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) - and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r6.xyzw, r6.xyzw, r7.xyzw - mov r4.zw, r6.xxxz - mov r3.zw, r6.yyyw -else - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -endif -and r5.xyzw, r4.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r6.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r6.xyzw, r6.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r5.xyzw, r5.xyzw, r6.xyzw -ushr r4.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r4.xyzw, r4.xyzw, r5.xyzw -store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw -and r4.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r5.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r4.xyzw, r4.xyzw, r5.xyzw -ushr r3.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r3.xyzw, r3.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw -ld r3.xyzw, r0.yyyy, T0[0].ywxz -if_nz r1.x - ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r3.xyzw, r4.ywxz, r5.ywxz - mov r4.xy, r3.zwzz -else - mov r4.xy, r3.zwzz -endif -ld r0.xyzw, r0.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) - and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r5.xyzw, r5.xyzw, r6.xyzw - mov r4.zw, r5.xxxz - mov r3.zw, r5.yyyw -else - mov r4.zw, r0.xxxz - mov r3.zw, r0.yyyw -endif -and r0.xyzw, r4.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r5.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r0.xyzw, r0.xyzw, r5.xyzw -ushr r4.xyzw, r4.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r0.xyzw, r0.xyzw, r4.xyzw -store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw -and r0.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r2.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r2.xyzw, r2.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r0.xyzw, r0.xyzw, r2.xyzw -ushr r2.xyzw, r3.xyzw, l(11, 11, 11, 11) -and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r0.xyzw, r0.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw -ret -// Approximately 244 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.cso deleted file mode 100644 index ce559a12d..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.h deleted file mode 100644 index 919243e14..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.h +++ /dev/null @@ -1,2166 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g6b5_b5g6r5_3x.cs.hlsl -const uint8_t texture_load_r5g6b5_b5g6r5_3x_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x14, 0x10, 0x28, 0x78, 0x5D, 0x8E, 0x28, 0xEC, - 0xED, 0x64, 0x64, 0x83, 0xF9, 0x28, 0x90, 0x3E, 0x01, 0x00, 0x00, 0x00, - 0x54, 0x65, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0xB8, 0x64, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 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Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint2 buf T0 t0 1 -// xe_texture_load_dest UAV uint2 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 11 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r1.xyz, r0.xyzx, CB0[0][1].xyzx -or r0.w, r1.y, r1.x -or r0.w, r1.z, r0.w -if_nz r0.w - ret -endif -mov r1.x, l(3) -mov r1.z, CB0[0][1].y -imul null, r0.yzw, r0.xxyz, r1.xxxz -ishl r0.y, r0.y, l(1) -imad r0.z, l(3), r0.w, r0.z -imad r0.y, r0.z, CB0[0][2].x, r0.y -iadd r0.y, r0.y, CB0[0][1].w -ushr r0.z, CB0[0][2].x, l(3) -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r1.w, r0.x, l(3) - iadd r1.z, r1.w, r1.z - bfi r1.z, l(2), l(6), r1.z, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.x, l(6), l(0), r2.x, r1.y - endif -else - ishl r0.x, r0.x, l(1) - imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r1.y, CB0[0][0].z, r0.x -endif -iadd r0.x, r1.x, CB0[0][0].y -imul null, r0.x, r0.x, l(9) -ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) -ushr r1.x, CB0[0][0].x, l(2) -ld r1.yz, r0.xxxx, T0[0].zxyw -ieq r1.x, r1.x, l(1) -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -and r4.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r4.zw, r1.yyyz, l(0, 0, 11, 11) -and r4.zw, r4.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r5.xy, r1.yzyy, l(11, 11, 0, 0) -and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.xy, r3.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r6.xy, r1.yzyy, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.xy, r3.xyxx, r6.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r6.xy, r3.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.zw, r3.zzzw, r6.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r7.xy, r3.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r8.xy, r3.xyxx, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r8.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r6.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r8.zw, r6.zzzw, l(0, 0, 11, 11) -and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r6.zw, r6.zzzw, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx -iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) -store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx -iadd r1.w, r0.z, r0.y -ushr r2.x, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx -ushr r3.x, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r3.x -store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw -iadd r2.xy, r1.wwww, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) -bfi r10.y, l(16), l(16), r6.y, r2.z -store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) -ld r1.yz, r2.xxxx, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r3.zzwz, r3.xxyx -endif -and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r3.zw, r1.yyyz, l(0, 0, 11, 11) -and r3.zw, r3.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r3.xy, r3.zwzz, r3.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r3.xy, r1.yzyy, r3.xyxx -ld r1.yz, r2.yyyy, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r4.xxyx -endif -and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) -and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r2.xy, r2.xyxx, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r4.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.zzzz, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r2.xxyx, r5.xxyx -endif -and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r5.xy, r1.yzyy, l(11, 11, 0, 0) -and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r2.xy, r2.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r5.xy, r1.yzyy, r2.xyxx -ld r1.yz, r2.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r1.yz, r1.yyzy, r2.xxyx -iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) -ld r6.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.zw, r6.xxxy, r6.zzzw -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) - and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r6.zwzz, r6.xyxx -endif -and r6.xy, r2.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r6.zw, r2.xxxy, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r6.xy, r6.zwzz, r6.xyxx -ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r2.xy, r2.xyxx, r6.xyxx -ld r6.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -iadd r1.w, r0.x, l(17) -ld r2.zw, r2.wwww, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -and r7.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r7.zw, r2.zzzw, l(0, 0, 11, 11) -and r7.zw, r7.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r7.yz, r2.zzwz, r7.xxyx -ld r2.zw, r1.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r8.zw, r2.zzzw, l(0, 0, 11, 11) -and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r8.yz, r2.zzwz, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx -store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy -iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) -bfi r7.x, l(16), l(0), r2.x, r6.y -store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx -iadd r1.w, r0.z, r9.z -ushr r2.z, r3.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz -ushr r2.z, r4.x, l(16) -bfi r3.y, l(16), l(16), r1.y, r2.z -store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw -iadd r2.zw, r1.wwww, l(0, 0, 1, 2) -ushr r1.y, r1.y, l(16) -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) -bfi r3.y, l(16), l(16), r2.y, r4.x -store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw -bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww -ushr r1.y, r7.z, l(16) -bfi r3.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw -iadd r1.y, r0.z, r1.w -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy -iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx -if_nz r0.w - iadd r0.w, r0.x, l(72) -else - iadd r0.w, r0.x, l(18) -endif -ld r1.yz, r0.wwww, T0[0].zxyw -if_nz r1.x - ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r2.zzwz, r2.xxyx -endif -and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r2.zw, r1.yyyz, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r2.xy, r2.zwzz, r2.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r2.xy, r1.yzyy, r2.xyxx -iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) -ld r1.yz, r3.xxxx, T0[0].zxyw -if_nz r1.x - ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) - ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r1.yz, r4.zzwz, r4.xxyx -endif -and r4.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r4.zw, r1.yyyz, l(0, 0, 11, 11) -and r4.zw, r4.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r4.xy, r1.yzyy, r4.xyxx -ld r1.yz, r3.yyyy, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) - and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r5.xxyx -endif -and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r5.xy, r1.yzyy, l(11, 11, 0, 0) -and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.xy, r3.xyxx, r5.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r5.xy, r1.yzyy, r3.xyxx -ld r1.yz, r3.zzzz, T0[0].zxyw -if_nz r1.x - ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) - and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r1.yz, r3.xxyx, r6.xxyx -endif -and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r6.xy, r1.yzyy, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.xy, r3.xyxx, r6.xyxx -ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) -and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) -iadd r1.yz, r1.yyzy, r3.xxyx -ld r3.xy, r3.wwww, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r6.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r6.xy, r3.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.zw, r3.zzzw, r6.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.zw, r3.xxxy, r3.zzzw -iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) -ld r6.xy, r3.xxxx, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r6.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r6.zwzz -ld r3.xy, r3.yyyy, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r7.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r7.xy, r3.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r7.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r7.xy, r3.xyxx, r6.zwzz -ld r3.xy, r3.zzzz, T0[0].xyzw -if_nz r1.x - ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) - and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r6.zwzz, r8.xyxx -endif -and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r8.xy, r3.xyxx, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.zw, r6.zzzw, r8.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r3.yz, r3.xxyx, r6.zzwz -ld r6.zw, r3.wwww, T0[0].zwxy -if_nz r1.x - ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) - ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.zw, r8.zzzw, r8.xxxy -endif -and r8.xy, r6.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r8.zw, r6.zzzw, l(0, 0, 11, 11) -and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r6.zw, r6.zzzw, l(0, 0, 11, 11) -and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r8.yz, r6.zzwz, r8.xxyx -bfi r2.z, l(16), l(0), r2.y, r5.x -store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx -store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy -bfi r3.x, l(16), l(0), r6.x, r7.y -store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx -iadd r0.x, r0.z, r10.y -ushr r1.w, r2.y, l(16) -bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww -ushr r1.w, r4.x, l(16) -bfi r2.y, l(16), l(16), r1.y, r1.w -store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw -iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) -ushr r1.y, r1.y, l(16) -bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy -ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) -bfi r9.y, l(16), l(16), r6.y, r1.y -store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw -bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww -ushr r1.y, r3.z, l(16) -bfi r6.y, l(16), l(16), r8.y, r1.y -store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r1.z -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) -mov r7.z, r5.z -store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz -bfi r8.x, l(16), l(0), r7.y, r8.y -store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx -iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) -iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) -ld r3.xy, r2.xxxx, T0[0].xyzw -if_nz r1.x - ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) - and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) - and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r3.xy, r3.zwzz, r4.xyxx -endif -and r3.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r4.xy, r3.xyxx, l(11, 11, 0, 0) -and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r3.zw, r3.zzzw, r4.xxxy -ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) -and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r3.xy, r3.xyxx, r3.zwzz -ld r2.xy, r2.yyyy, T0[0].xyzw -if_nz r1.x - ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) - and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r4.zwzz, r4.xyxx -endif -and r4.xy, r2.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r4.zw, r2.xxxy, l(0, 0, 11, 11) -and r4.zw, r4.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r4.xy, r4.zwzz, r4.xyxx -ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r4.xy, r2.xyxx, r4.xyxx -ld r2.xy, r2.zzzz, T0[0].xyzw -if_nz r1.x - ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) - ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) - and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.xy, r5.zwzz, r5.xyxx -endif -and r5.xy, r2.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r5.zw, r2.xxxy, l(0, 0, 11, 11) -and r5.zw, r5.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r5.xy, r5.zwzz, r5.xyxx -ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r5.xy, r2.xyxx, r5.xyxx -ld r2.xy, r2.wwww, T0[0].xyzw -if_nz r1.x - ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) - and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.xy, r2.zwzz, r6.xyxx -endif -and r2.zw, r2.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r6.xy, r2.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r2.zw, r2.zzzw, r6.xxxy -ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) -and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r2.xy, r2.xyxx, r2.zwzz -iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) -ld r2.zw, r6.xxxx, T0[0].zwxy -if_nz r1.x - ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) - ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r2.zw, r7.zzzw, r7.xxxy -endif -and r7.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r7.zw, r2.zzzw, l(0, 0, 11, 11) -and r7.zw, r7.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r5.zw, r2.zzzw, r7.xxxy -ld r2.zw, r6.yyyy, T0[0].zwxy -if_nz r1.x - ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) - and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) - ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) - and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r2.zw, r6.xxxy, r7.xxxy -endif -and r6.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) -and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) -iadd r2.zw, r2.zzzw, r6.xxxy -ld r6.xy, r6.zzzz, T0[0].xyzw -if_nz r1.x - ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) - ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) - and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r6.xy, r7.zwzz, r7.xyxx -endif -and r7.xy, r6.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r7.zw, r6.xxxy, l(0, 0, 11, 11) -and r7.zw, r7.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r7.xy, r7.zwzz, r7.xyxx -ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) -and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r6.xy, r6.xyxx, r7.xyxx -iadd r0.x, r0.w, l(17) -ld r7.xy, r6.wwww, T0[0].xyzw -if_nz r1.x - ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) - and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) - ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) - and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) - iadd r7.xy, r7.zwzz, r8.xyxx -endif -and r7.zw, r7.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) -ishl r8.xy, r7.xyxx, l(11, 11, 0, 0) -and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) -iadd r7.zw, r7.zzzw, r8.xxxy -ushr r7.xy, r7.xyxx, l(11, 11, 0, 0) -and r7.xy, r7.xyxx, l(0x001f001f, 0x001f001f, 0, 0) -iadd r7.yz, r7.xxyx, r7.zzwz -ld r0.xw, r0.xxxx, T0[0].xzwy -if_nz r1.x - ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) - ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) - and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) - iadd r0.xw, r8.zzzw, r8.xxxy -endif -and r8.xy, r0.xwxx, l(0x07e007e0, 0x07e007e0, 0, 0) -ishl r8.zw, r0.xxxw, l(0, 0, 11, 11) -and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) -iadd r8.xy, r8.zwzz, r8.xyxx -ushr r0.xw, r0.xxxw, l(11, 0, 0, 11) -and r0.xw, r0.xxxw, l(0x001f001f, 0, 0, 0x001f001f) -iadd r8.yz, r0.xxwx, r8.xxyx -bfi r3.z, l(16), l(0), r3.y, r5.x -store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx -store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy -bfi r7.x, l(16), l(0), r2.z, r6.y -store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx -iadd r0.x, r0.z, r1.y -ushr r0.y, r3.y, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy -ushr r0.y, r4.x, l(16) -bfi r1.y, l(16), l(16), r2.x, r0.y -store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw -iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) -ushr r1.x, r2.x, l(16) -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx -ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) -bfi r1.y, l(16), l(16), r2.w, r2.x -store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw -bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz -ushr r0.y, r7.z, l(16) -bfi r1.y, l(16), l(16), r8.y, r0.y -store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw -iadd r0.x, r0.z, r0.x -bfi r4.z, l(16), l(0), r5.x, r2.y -store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy -iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) -mov r6.z, r5.z -store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz -bfi r8.x, l(16), l(0), r6.y, r8.y -store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx -ret -// Approximately 734 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.cso deleted file mode 100644 index 7d8ecacc0..000000000 Binary files a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.cso and /dev/null differ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.h deleted file mode 100644 index d32a03ba2..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.h +++ /dev/null @@ -1,407 +0,0 @@ -// generated from `xb buildhlsl` -// source: texture_load_r5g6b5_b5g6r5.cs.hlsl -const uint8_t texture_load_r5g6b5_b5g6r5_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xDB, 0xB4, 0xFB, 0x78, 0xDD, 0x2F, 0x81, 0x4D, - 0x2A, 0x2F, 0x8F, 0x0F, 0x18, 0x4A, 0x1D, 0x2F, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x12, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x18, 0x04, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, - 0x40, 0x12, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xDC, 0x03, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xB1, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCB, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, - 0x6F, 0x61, 0x64, 0x5F, 0x73, 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, - 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x5F, 0x6C, 0x6F, - 0x61, 0x64, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, 0x54, 0x65, - 0x78, 0x74, 0x75, 0x72, 0x65, 0x4C, 0x6F, 0x61, 0x64, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xE0, 0x00, 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b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.txt deleted file mode 100644 index 8bb740513..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.txt +++ /dev/null @@ -1,156 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeTextureLoadConstants -// { -// -// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 -// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 -// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 -// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 -// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 -// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 -// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 -// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_texture_load_source texture uint4 buf T0 t0 1 -// xe_texture_load_dest UAV uint4 buf U0 u0 1 -// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 -dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 -dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 -dcl_input vThreadID.xyz -dcl_temps 5 -dcl_thread_group 2, 32, 1 -ishl r0.x, vThreadID.x, l(4) -mov r0.yz, vThreadID.yyzy -uge r0.yzw, r0.xxyz, CB0[0][1].xxyz -or r0.y, r0.z, r0.y -or r0.y, r0.w, r0.y -if_nz r0.y - ret -endif -ishl r0.y, r0.x, l(1) -imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y -imad r0.z, r0.z, CB0[0][2].x, r0.y -iadd r0.z, r0.z, CB0[0][1].w -and r0.w, CB0[0][0].x, l(1) -if_nz r0.w - and r1.x, CB0[0][0].x, l(2) - if_nz r1.x - ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) - ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) - imad r1.x, r1.y, r2.x, r1.x - ibfe r1.w, l(27), l(1), vThreadID.x - imad r1.x, r1.x, r2.y, r1.w - ishl r1.w, vThreadID.y, l(9) - ishr r1.w, r1.w, l(6) - iadd r1.y, r1.y, r1.z - and r1.zw, r1.yyyw, l(0, 0, 1, 48) - ishr r2.x, r0.x, l(3) - bfi r1.y, l(1), l(1), r1.y, l(0) - iadd r1.y, r1.y, r2.x - bfi r1.y, l(2), l(1), r1.y, l(0) - iadd r1.y, r1.y, r1.z - bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) - imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx - bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx - bfi r1.w, l(1), l(4), vThreadID.y, l(0) - ubfe r2.x, l(3), l(6), r1.x - and r2.y, r1.y, l(4) - bfi r1.y, l(2), l(8), r1.y, l(0) - imad r1.y, r2.x, l(32), r1.y - imad r1.y, r2.y, l(4), r1.y - bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx - bfi r1.y, l(9), l(3), r1.y, r1.z - bfi r1.x, l(6), l(0), r1.x, r1.y - else - ibfe r1.y, l(27), l(1), vThreadID.x - ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) - ushr r2.x, CB0[0][0].z, l(5) - imad r1.y, r1.z, r2.x, r1.y - bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) - bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx - ishl r1.y, vThreadID.y, l(7) - and r1.y, r1.y, l(2048) - bfi r1.y, l(12), l(0), r1.y, r2.y - and r1.z, r2.z, l(1792) - iadd r1.y, r1.y, r1.z - and r1.z, r1.w, l(2) - ishr r0.x, r0.x, l(3) - iadd r0.x, r0.x, r1.z - bfi r0.x, l(2), l(6), r0.x, l(0) - iadd r0.x, r1.y, r0.x - bfi r1.x, l(6), l(0), r2.x, r0.x - endif -else - imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y - imad r1.x, r0.x, CB0[0][0].z, r0.y -endif -iadd r0.x, r1.x, CB0[0][0].y -ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) -ushr r0.y, CB0[0][0].x, l(2) -ld r1.xyzw, r0.xxxx, T0[0].xyzw -ieq r0.y, r0.y, l(1) -if_nz r0.y - ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r1.xyzw, r2.xyzw, r3.xyzw -endif -and r2.xyzw, r1.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r3.xyzw, r1.xyzw, l(11, 11, 11, 11) -and r3.xyzw, r3.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r2.xyzw, r2.xyzw, r3.xyzw -ushr r1.xyzw, r1.xyzw, l(11, 11, 11, 11) -and r1.xyzw, r1.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r1.xyzw, r1.xyzw, r2.xyzw -store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw -iadd r1.x, r0.z, l(1) -movc r0.w, r0.w, l(4), l(1) -iadd r0.x, r0.w, r0.x -ld r2.xyzw, r0.xxxx, T0[0].xyzw -if_nz r0.y - ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) - ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) - and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) - iadd r2.xyzw, r3.xyzw, r4.xyzw -endif -and r3.xyzw, r2.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) -ishl r4.xyzw, r2.xyzw, l(11, 11, 11, 11) -and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) -iadd r3.xyzw, r3.xyzw, r4.xyzw -ushr r2.xyzw, r2.xyzw, l(11, 11, 11, 11) -and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) -iadd r2.xyzw, r2.xyzw, r3.xyzw -store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw -ret -// Approximately 105 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/primitive_quad_list.gs.hlsl b/src/xenia/gpu/d3d12/shaders/primitive_quad_list.gs.hlsl deleted file mode 100644 index b7d4422ac..000000000 --- a/src/xenia/gpu/d3d12/shaders/primitive_quad_list.gs.hlsl +++ /dev/null @@ -1,25 +0,0 @@ -#include "xenos_draw.hlsli" - -[maxvertexcount(4)] -void main(lineadj XeVertexPreGS xe_in[4], - inout TriangleStream xe_stream) { - // Must kill the whole quad if need to kill. - if (max(max(xe_in[0].cull_distance, xe_in[1].cull_distance), - max(xe_in[2].cull_distance, xe_in[3].cull_distance)) < 0.0f || - any(isnan(xe_in[0].post_gs.position)) || - any(isnan(xe_in[1].post_gs.position)) || - any(isnan(xe_in[2].post_gs.position)) || - any(isnan(xe_in[3].post_gs.position))) { - return; - } - XeVertexPostGS xe_out; - xe_out = xe_in[0].post_gs; - xe_stream.Append(xe_out); - xe_out = xe_in[1].post_gs; - xe_stream.Append(xe_out); - xe_out = xe_in[3].post_gs; - xe_stream.Append(xe_out); - xe_out = xe_in[2].post_gs; - xe_stream.Append(xe_out); - xe_stream.RestartStrip(); -} diff --git a/src/xenia/gpu/d3d12/shaders/tessellation_indexed.vs.hlsl b/src/xenia/gpu/d3d12/shaders/tessellation_indexed.vs.hlsl deleted file mode 100644 index 7982a2fbf..000000000 --- a/src/xenia/gpu/d3d12/shaders/tessellation_indexed.vs.hlsl +++ /dev/null @@ -1,10 +0,0 @@ -#include "endian.hlsli" -#include "xenos_draw.hlsli" - -XeHSControlPointInputIndexed main(uint xe_vertex_id : SV_VertexID) { - XeHSControlPointInputIndexed output; - output.index = - float(asint(XeEndianSwap32(xe_vertex_id, xe_vertex_index_endian)) + - xe_vertex_base_index); - return output; -} diff --git a/src/xenia/gpu/d3d12/texture_cache.cc b/src/xenia/gpu/d3d12/texture_cache.cc index 898ee7f4d..17244c573 100644 --- a/src/xenia/gpu/d3d12/texture_cache.cc +++ b/src/xenia/gpu/d3d12/texture_cache.cc @@ -59,60 +59,62 @@ namespace xe { namespace gpu { namespace d3d12 { -// Generated with `xb buildhlsl`. -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3_rgba8_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3a_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt3aas1111_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.h" +// Generated with `xb buildshaders`. +namespace shaders { +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_ctx1_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxn_rg8_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt1_rgba8_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3_rgba8_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3a_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3aas1111_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5_rgba8_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5a_r8_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_2x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_3x_cs.h" +#include "xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_cs.h" +} // namespace shaders // For formats with less than 4 components, assuming the last component is // replicated into the non-existent ones, similar to what is done for unused @@ -787,109 +789,132 @@ const char* const TextureCache::dimension_names_[4] = {"1D", "2D", "3D", "cube"}; const TextureCache::LoadModeInfo TextureCache::load_mode_info_[] = { - {{{texture_load_8bpb_cs, sizeof(texture_load_8bpb_cs), 3, 4, 16}, - {texture_load_8bpb_2x_cs, sizeof(texture_load_8bpb_2x_cs), 4, 4, 16 * 2}, - {texture_load_8bpb_3x_cs, sizeof(texture_load_8bpb_3x_cs), 3, 3, - 16 * 3}}}, - {{{texture_load_16bpb_cs, sizeof(texture_load_16bpb_cs), 4, 4, 16}, - {texture_load_16bpb_2x_cs, sizeof(texture_load_16bpb_2x_cs), 4, 4, - 16 * 2}, - {texture_load_16bpb_3x_cs, sizeof(texture_load_16bpb_3x_cs), 3, 3, - 16 * 3}}}, - {{{texture_load_32bpb_cs, sizeof(texture_load_32bpb_cs), 4, 4, 8}, - {texture_load_32bpb_2x_cs, sizeof(texture_load_32bpb_2x_cs), 4, 4, 8 * 2}, - {texture_load_32bpb_3x_cs, sizeof(texture_load_32bpb_3x_cs), 3, 3, - 2 * 3}}}, - {{{texture_load_64bpb_cs, sizeof(texture_load_64bpb_cs), 4, 4, 4}, - {texture_load_64bpb_2x_cs, sizeof(texture_load_64bpb_2x_cs), 4, 4, 4 * 2}, - {texture_load_64bpb_3x_cs, sizeof(texture_load_64bpb_3x_cs), 3, 3, - 4 * 3}}}, - {{{texture_load_128bpb_cs, sizeof(texture_load_128bpb_cs), 4, 4, 2}, - {texture_load_128bpb_2x_cs, sizeof(texture_load_128bpb_2x_cs), 4, 4, - 2 * 2}, - {texture_load_128bpb_3x_cs, sizeof(texture_load_128bpb_3x_cs), 4, 4, - 2 * 3}}}, - {{{texture_load_r5g5b5a1_b5g5r5a1_cs, - sizeof(texture_load_r5g5b5a1_b5g5r5a1_cs), 4, 4, 16}, - {texture_load_r5g5b5a1_b5g5r5a1_2x_cs, - sizeof(texture_load_r5g5b5a1_b5g5r5a1_2x_cs), 4, 4, 16 * 2}, - {texture_load_r5g5b5a1_b5g5r5a1_3x_cs, - sizeof(texture_load_r5g5b5a1_b5g5r5a1_3x_cs), 3, 3, 16 * 3}}}, - {{{texture_load_r5g6b5_b5g6r5_cs, sizeof(texture_load_r5g6b5_b5g6r5_cs), 4, + {{{shaders::texture_load_8bpb_cs, sizeof(shaders::texture_load_8bpb_cs), 3, 4, 16}, - {texture_load_r5g6b5_b5g6r5_2x_cs, - sizeof(texture_load_r5g6b5_b5g6r5_2x_cs), 4, 4, 16 * 2}, - {texture_load_r5g6b5_b5g6r5_3x_cs, - sizeof(texture_load_r5g6b5_b5g6r5_3x_cs), 3, 3, 16 * 3}}}, - {{{texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs, - sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs), 4, 4, 16}, - {texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs, - sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs), 4, 4, 16 * 2}, - {texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs, - sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs), 3, 3, 16 * 3}}}, - {{{texture_load_r4g4b4a4_b4g4r4a4_cs, - sizeof(texture_load_r4g4b4a4_b4g4r4a4_cs), 4, 4, 16}, - {texture_load_r4g4b4a4_b4g4r4a4_2x_cs, - sizeof(texture_load_r4g4b4a4_b4g4r4a4_2x_cs), 4, 4, 16 * 2}, - {texture_load_r4g4b4a4_b4g4r4a4_3x_cs, - sizeof(texture_load_r4g4b4a4_b4g4r4a4_3x_cs), 3, 3, 16 * 3}}}, - {{{texture_load_r10g11b11_rgba16_cs, - sizeof(texture_load_r10g11b11_rgba16_cs), 4, 4, 8}, - {texture_load_r10g11b11_rgba16_2x_cs, - sizeof(texture_load_r10g11b11_rgba16_2x_cs), 4, 4, 8 * 2}, - {texture_load_r10g11b11_rgba16_3x_cs, - sizeof(texture_load_r10g11b11_rgba16_3x_cs), 3, 3, 2 * 3}}}, - {{{texture_load_r10g11b11_rgba16_snorm_cs, - sizeof(texture_load_r10g11b11_rgba16_snorm_cs), 4, 4, 8}, - {texture_load_r10g11b11_rgba16_snorm_2x_cs, - sizeof(texture_load_r10g11b11_rgba16_snorm_2x_cs), 4, 4, 8 * 2}, - {texture_load_r10g11b11_rgba16_snorm_3x_cs, - sizeof(texture_load_r10g11b11_rgba16_snorm_3x_cs), 3, 3, 2 * 3}}}, - {{{texture_load_r11g11b10_rgba16_cs, - sizeof(texture_load_r11g11b10_rgba16_cs), 4, 4, 8}, - {texture_load_r11g11b10_rgba16_2x_cs, - sizeof(texture_load_r11g11b10_rgba16_2x_cs), 4, 4, 8 * 2}, - {texture_load_r11g11b10_rgba16_3x_cs, - sizeof(texture_load_r11g11b10_rgba16_3x_cs), 3, 3, 2 * 3}}}, - {{{texture_load_r11g11b10_rgba16_snorm_cs, - sizeof(texture_load_r11g11b10_rgba16_snorm_cs), 4, 4, 8}, - {texture_load_r11g11b10_rgba16_snorm_2x_cs, - sizeof(texture_load_r11g11b10_rgba16_snorm_2x_cs), 4, 4, 8 * 2}, - {texture_load_r11g11b10_rgba16_snorm_3x_cs, - sizeof(texture_load_r11g11b10_rgba16_snorm_3x_cs), 3, 3, 2 * 3}}}, - {{{texture_load_dxt1_rgba8_cs, sizeof(texture_load_dxt1_rgba8_cs), 4, 4, 4}, + {shaders::texture_load_8bpb_2x_cs, + sizeof(shaders::texture_load_8bpb_2x_cs), 4, 4, 16 * 2}, + {shaders::texture_load_8bpb_3x_cs, + sizeof(shaders::texture_load_8bpb_3x_cs), 3, 3, 16 * 3}}}, + {{{shaders::texture_load_16bpb_cs, sizeof(shaders::texture_load_16bpb_cs), + 4, 4, 16}, + {shaders::texture_load_16bpb_2x_cs, + sizeof(shaders::texture_load_16bpb_2x_cs), 4, 4, 16 * 2}, + {shaders::texture_load_16bpb_3x_cs, + sizeof(shaders::texture_load_16bpb_3x_cs), 3, 3, 16 * 3}}}, + {{{shaders::texture_load_32bpb_cs, sizeof(shaders::texture_load_32bpb_cs), + 4, 4, 8}, + {shaders::texture_load_32bpb_2x_cs, + sizeof(shaders::texture_load_32bpb_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_32bpb_3x_cs, + sizeof(shaders::texture_load_32bpb_3x_cs), 3, 3, 2 * 3}}}, + {{{shaders::texture_load_64bpb_cs, sizeof(shaders::texture_load_64bpb_cs), + 4, 4, 4}, + {shaders::texture_load_64bpb_2x_cs, + sizeof(shaders::texture_load_64bpb_2x_cs), 4, 4, 4 * 2}, + {shaders::texture_load_64bpb_3x_cs, + sizeof(shaders::texture_load_64bpb_3x_cs), 3, 3, 4 * 3}}}, + {{{shaders::texture_load_128bpb_cs, sizeof(shaders::texture_load_128bpb_cs), + 4, 4, 2}, + {shaders::texture_load_128bpb_2x_cs, + sizeof(shaders::texture_load_128bpb_2x_cs), 4, 4, 2 * 2}, + {shaders::texture_load_128bpb_3x_cs, + sizeof(shaders::texture_load_128bpb_3x_cs), 4, 4, 2 * 3}}}, + {{{shaders::texture_load_r5g5b5a1_b5g5r5a1_cs, + sizeof(shaders::texture_load_r5g5b5a1_b5g5r5a1_cs), 4, 4, 16}, + {shaders::texture_load_r5g5b5a1_b5g5r5a1_2x_cs, + sizeof(shaders::texture_load_r5g5b5a1_b5g5r5a1_2x_cs), 4, 4, 16 * 2}, + {shaders::texture_load_r5g5b5a1_b5g5r5a1_3x_cs, + sizeof(shaders::texture_load_r5g5b5a1_b5g5r5a1_3x_cs), 3, 3, 16 * 3}}}, + {{{shaders::texture_load_r5g6b5_b5g6r5_cs, + sizeof(shaders::texture_load_r5g6b5_b5g6r5_cs), 4, 4, 16}, + {shaders::texture_load_r5g6b5_b5g6r5_2x_cs, + sizeof(shaders::texture_load_r5g6b5_b5g6r5_2x_cs), 4, 4, 16 * 2}, + {shaders::texture_load_r5g6b5_b5g6r5_3x_cs, + sizeof(shaders::texture_load_r5g6b5_b5g6r5_3x_cs), 3, 3, 16 * 3}}}, + {{{shaders::texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs, + sizeof(shaders::texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs), 4, 4, 16}, + {shaders::texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs, + sizeof(shaders::texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs), 4, 4, + 16 * 2}, + {shaders::texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs, + sizeof(shaders::texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs), 3, 3, + 16 * 3}}}, + {{{shaders::texture_load_r4g4b4a4_b4g4r4a4_cs, + sizeof(shaders::texture_load_r4g4b4a4_b4g4r4a4_cs), 4, 4, 16}, + {shaders::texture_load_r4g4b4a4_b4g4r4a4_2x_cs, + sizeof(shaders::texture_load_r4g4b4a4_b4g4r4a4_2x_cs), 4, 4, 16 * 2}, + {shaders::texture_load_r4g4b4a4_b4g4r4a4_3x_cs, + sizeof(shaders::texture_load_r4g4b4a4_b4g4r4a4_3x_cs), 3, 3, 16 * 3}}}, + {{{shaders::texture_load_r10g11b11_rgba16_cs, + sizeof(shaders::texture_load_r10g11b11_rgba16_cs), 4, 4, 8}, + {shaders::texture_load_r10g11b11_rgba16_2x_cs, + sizeof(shaders::texture_load_r10g11b11_rgba16_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_r10g11b11_rgba16_3x_cs, + sizeof(shaders::texture_load_r10g11b11_rgba16_3x_cs), 3, 3, 2 * 3}}}, + {{{shaders::texture_load_r10g11b11_rgba16_snorm_cs, + sizeof(shaders::texture_load_r10g11b11_rgba16_snorm_cs), 4, 4, 8}, + {shaders::texture_load_r10g11b11_rgba16_snorm_2x_cs, + sizeof(shaders::texture_load_r10g11b11_rgba16_snorm_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_r10g11b11_rgba16_snorm_3x_cs, + sizeof(shaders::texture_load_r10g11b11_rgba16_snorm_3x_cs), 3, 3, + 2 * 3}}}, + {{{shaders::texture_load_r11g11b10_rgba16_cs, + sizeof(shaders::texture_load_r11g11b10_rgba16_cs), 4, 4, 8}, + {shaders::texture_load_r11g11b10_rgba16_2x_cs, + sizeof(shaders::texture_load_r11g11b10_rgba16_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_r11g11b10_rgba16_3x_cs, + sizeof(shaders::texture_load_r11g11b10_rgba16_3x_cs), 3, 3, 2 * 3}}}, + {{{shaders::texture_load_r11g11b10_rgba16_snorm_cs, + sizeof(shaders::texture_load_r11g11b10_rgba16_snorm_cs), 4, 4, 8}, + {shaders::texture_load_r11g11b10_rgba16_snorm_2x_cs, + sizeof(shaders::texture_load_r11g11b10_rgba16_snorm_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_r11g11b10_rgba16_snorm_3x_cs, + sizeof(shaders::texture_load_r11g11b10_rgba16_snorm_3x_cs), 3, 3, + 2 * 3}}}, + {{{shaders::texture_load_dxt1_rgba8_cs, + sizeof(shaders::texture_load_dxt1_rgba8_cs), 4, 4, 4}, {}, {}}}, - {{{texture_load_dxt3_rgba8_cs, sizeof(texture_load_dxt3_rgba8_cs), 4, 4, 2}, + {{{shaders::texture_load_dxt3_rgba8_cs, + sizeof(shaders::texture_load_dxt3_rgba8_cs), 4, 4, 2}, {}, {}}}, - {{{texture_load_dxt5_rgba8_cs, sizeof(texture_load_dxt5_rgba8_cs), 4, 4, 2}, + {{{shaders::texture_load_dxt5_rgba8_cs, + sizeof(shaders::texture_load_dxt5_rgba8_cs), 4, 4, 2}, {}, {}}}, - {{{texture_load_dxn_rg8_cs, sizeof(texture_load_dxn_rg8_cs), 4, 4, 2}, + {{{shaders::texture_load_dxn_rg8_cs, + sizeof(shaders::texture_load_dxn_rg8_cs), 4, 4, 2}, {}, {}}}, - {{{texture_load_dxt3a_cs, sizeof(texture_load_dxt3a_cs), 4, 4, 4}, {}, {}}}, - {{{texture_load_dxt3aas1111_cs, sizeof(texture_load_dxt3aas1111_cs), 4, 4, - 4}, + {{{shaders::texture_load_dxt3a_cs, sizeof(shaders::texture_load_dxt3a_cs), + 4, 4, 4}, {}, {}}}, - {{{texture_load_dxt5a_r8_cs, sizeof(texture_load_dxt5a_r8_cs), 4, 4, 4}, + {{{shaders::texture_load_dxt3aas1111_cs, + sizeof(shaders::texture_load_dxt3aas1111_cs), 4, 4, 4}, {}, {}}}, - {{{texture_load_ctx1_cs, sizeof(texture_load_ctx1_cs), 4, 4, 4}, {}, {}}}, - {{{texture_load_depth_unorm_cs, sizeof(texture_load_depth_unorm_cs), 4, 4, - 8}, - {texture_load_depth_unorm_2x_cs, sizeof(texture_load_depth_unorm_2x_cs), - 4, 4, 8 * 2}, - {texture_load_depth_unorm_3x_cs, sizeof(texture_load_depth_unorm_3x_cs), - 3, 3, 2 * 3}}}, - {{{texture_load_depth_float_cs, sizeof(texture_load_depth_float_cs), 4, 4, - 8}, - {texture_load_depth_float_2x_cs, sizeof(texture_load_depth_float_2x_cs), - 4, 4, 8 * 2}, - {texture_load_depth_float_3x_cs, sizeof(texture_load_depth_float_3x_cs), - 3, 3, 2 * 3}}}, + {{{shaders::texture_load_dxt5a_r8_cs, + sizeof(shaders::texture_load_dxt5a_r8_cs), 4, 4, 4}, + {}, + {}}}, + {{{shaders::texture_load_ctx1_cs, sizeof(shaders::texture_load_ctx1_cs), 4, + 4, 4}, + {}, + {}}}, + {{{shaders::texture_load_depth_unorm_cs, + sizeof(shaders::texture_load_depth_unorm_cs), 4, 4, 8}, + {shaders::texture_load_depth_unorm_2x_cs, + sizeof(shaders::texture_load_depth_unorm_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_depth_unorm_3x_cs, + sizeof(shaders::texture_load_depth_unorm_3x_cs), 3, 3, 2 * 3}}}, + {{{shaders::texture_load_depth_float_cs, + sizeof(shaders::texture_load_depth_float_cs), 4, 4, 8}, + {shaders::texture_load_depth_float_2x_cs, + sizeof(shaders::texture_load_depth_float_2x_cs), 4, 4, 8 * 2}, + {shaders::texture_load_depth_float_3x_cs, + sizeof(shaders::texture_load_depth_float_3x_cs), 3, 3, 2 * 3}}}, }; TextureCache::TextureCache(D3D12CommandProcessor& command_processor, @@ -2667,8 +2692,9 @@ bool TextureCache::LoadTextureData(Texture* texture) { load_constants.guest_pitch_aligned = level_guest_pitch; load_constants.guest_z_stride_block_rows_aligned = level_guest_layout.z_slice_stride_block_rows; - assert_zero(load_constants.guest_z_stride_block_rows_aligned & - (xenos::kTextureTileWidthHeight - 1)); + assert_true(dimension != xenos::DataDimension::k3D || + !(load_constants.guest_z_stride_block_rows_aligned & + (xenos::kTextureTileWidthHeight - 1))); uint32_t level_width, level_height, level_depth; if (level == level_packed) { diff --git a/src/xenia/gpu/d3d12/texture_cache.h b/src/xenia/gpu/d3d12/texture_cache.h index 6e11dddca..5c9c049c4 100644 --- a/src/xenia/gpu/d3d12/texture_cache.h +++ b/src/xenia/gpu/d3d12/texture_cache.h @@ -486,7 +486,7 @@ class TextureCache { // For tiled textures - row pitch in blocks, aligned to 32. // For linear textures - row pitch in bytes. uint32_t guest_pitch_aligned; - // Must be aligned to 32. + // For 3D textures only (ignored otherwise) - aligned to 32. uint32_t guest_z_stride_block_rows_aligned; // vec4 1. diff --git a/src/xenia/gpu/draw_util.cc b/src/xenia/gpu/draw_util.cc index 8612038a0..49149b7f9 100644 --- a/src/xenia/gpu/draw_util.cc +++ b/src/xenia/gpu/draw_util.cc @@ -136,6 +136,11 @@ bool IsRasterizationPotentiallyDone(const RegisterFile& regs, return true; } +// https://docs.microsoft.com/en-us/windows/win32/api/d3d11/ne-d3d11-d3d11_standard_multisample_quality_levels +const int8_t kD3D10StandardSamplePositions2x[2][2] = {{4, 4}, {-4, -4}}; +const int8_t kD3D10StandardSamplePositions4x[4][2] = { + {-2, -6}, {6, -2}, {-6, 2}, {2, 6}}; + bool IsPixelShaderNeededWithRasterization(const Shader& shader, const RegisterFile& regs) { assert_true(shader.type() == xenos::ShaderType::kPixel); @@ -409,12 +414,13 @@ void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale, float axis_0 = offset_axis - scale_axis_abs; float axis_1 = offset_axis + scale_axis_abs; float axis_max_unscaled_float = float(xy_max_unscaled[i]); - // fmax to drop NaN and < 0, min as float (axis_max_unscaled_float is well - // below 2^24) to safely drop very large values. + // max(0.0f, xy) drops NaN and < 0 - max picks the first argument in the + // !(a < b) case (always for NaN), min as float (axis_max_unscaled_float + // is well below 2^24) to safely drop very large values. uint32_t axis_0_int = - uint32_t(std::min(std::fmax(axis_0, 0.0f), axis_max_unscaled_float)); + uint32_t(std::min(axis_max_unscaled_float, std::max(0.0f, axis_0))); uint32_t axis_1_int = - uint32_t(std::min(std::fmax(axis_1, 0.0f), axis_max_unscaled_float)); + uint32_t(std::min(axis_max_unscaled_float, std::max(0.0f, axis_1))); uint32_t axis_extent_int = axis_1_int - axis_0_int; viewport_info_out.xy_offset[i] = axis_0_int * resolution_scale; viewport_info_out.xy_extent[i] = axis_extent_int * resolution_scale; @@ -517,9 +523,8 @@ void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale, // extension. But cases when this really matters are yet to be found - // trying to fix this will result in more correct depth values, but // incorrect clipping. - z_min = std::min(std::fmax(host_clip_offset_z, 0.0f), 1.0f); - z_max = std::min(std::fmax(host_clip_offset_z + host_clip_scale_z, 0.0f), - 1.0f); + z_min = xe::saturate_unsigned(host_clip_offset_z); + z_max = xe::saturate_unsigned(host_clip_offset_z + host_clip_scale_z); // Direct3D 12 doesn't allow reverse depth range - on some drivers it // works, on some drivers it doesn't, actually, but it was never // explicitly allowed by the specification. diff --git a/src/xenia/gpu/draw_util.h b/src/xenia/gpu/draw_util.h index 4b95441f8..d23d0d25a 100644 --- a/src/xenia/gpu/draw_util.h +++ b/src/xenia/gpu/draw_util.h @@ -34,6 +34,50 @@ namespace draw_util { // for use with the top-left rasterization rule later. int32_t FloatToD3D11Fixed16p8(float f32); +// Polygonal primitive types (not including points and lines) are rasterized as +// triangles, have front and back faces, and also support face culling and fill +// modes (polymode_front_ptype, polymode_back_ptype). Other primitive types are +// always "front" (but don't support front face and back face culling, according +// to OpenGL and Vulkan specifications - even if glCullFace is +// GL_FRONT_AND_BACK, points and lines are still drawn), and may in some cases +// use the "para" registers instead of "front" or "back" (for "parallelogram" - +// like poly_offset_para_enable). +constexpr bool IsPrimitivePolygonal(bool vgt_output_path_is_tessellation_enable, + xenos::PrimitiveType type) { + if (vgt_output_path_is_tessellation_enable && + (type == xenos::PrimitiveType::kTrianglePatch || + type == xenos::PrimitiveType::kQuadPatch)) { + // For patch primitive types, the major mode is always explicit, so just + // checking if VGT_OUTPUT_PATH_CNTL::path_select is kTessellationEnable is + // enough. + return true; + } + switch (type) { + case xenos::PrimitiveType::kTriangleList: + case xenos::PrimitiveType::kTriangleFan: + case xenos::PrimitiveType::kTriangleStrip: + case xenos::PrimitiveType::kTriangleWithWFlags: + case xenos::PrimitiveType::kQuadList: + case xenos::PrimitiveType::kQuadStrip: + case xenos::PrimitiveType::kPolygon: + return true; + default: + break; + } + // TODO(Triang3l): Investigate how kRectangleList should be treated - possibly + // actually drawn as two polygons on the console, however, the current + // geometry shader doesn't care about the winding order - allowing backface + // culling for rectangles currently breaks Gears of War 2. + return false; +} + +inline bool IsPrimitivePolygonal(const RegisterFile& regs) { + return IsPrimitivePolygonal( + regs.Get().path_select == + xenos::VGTOutputPath::kTessellationEnable, + regs.Get().prim_type); +} + // Whether with the current state, any samples to rasterize (for any reason, not // only to write something to a render target, but also to do sample counting or // pixel shader memexport) can be generated. Finally dropping draw calls can @@ -44,6 +88,11 @@ int32_t FloatToD3D11Fixed16p8(float f32); bool IsRasterizationPotentiallyDone(const RegisterFile& regs, bool primitive_polygonal); +// Direct3D 10.1+ standard sample positions, also used in Vulkan, for +// calculations related to host MSAA, in 1/16th of a pixel. +extern const int8_t kD3D10StandardSamplePositions2x[2][2]; +extern const int8_t kD3D10StandardSamplePositions4x[4][2]; + inline reg::RB_DEPTHCONTROL GetDepthControlForCurrentEdramMode( const RegisterFile& regs) { xenos::ModeControl edram_mode = regs.Get().edram_mode; @@ -57,6 +106,31 @@ inline reg::RB_DEPTHCONTROL GetDepthControlForCurrentEdramMode( return regs.Get(); } +constexpr float GetD3D10PolygonOffsetFactor( + xenos::DepthRenderTargetFormat depth_format, bool float24_as_0_to_0_5) { + if (depth_format == xenos::DepthRenderTargetFormat::kD24S8) { + return float(1 << 24); + } + // 20 explicit + 1 implicit (1.) mantissa bits. + // 2^20 is not enough for Call of Duty 4 retail version's first mission F.N.G. + // shooting range floor (with the number 1) on Direct3D 12. Tested on Nvidia + // GeForce GTX 1070, the exact formula (taking into account the 0...1 to + // 0...0.5 remapping described below) used for testing is + // `int(ceil(offset * 2^20 * 0.5)) * sign(offset)`. With 2^20 * 0.5, there + // are various kinds of stripes dependending on the view angle in that + // location. With 2^21 * 0.5, the issue is not present. + constexpr float kFloat24Scale = float(1 << 21); + // 0...0.5 range may be used on the host to represent the 0...1 guest depth + // range to be able to copy all possible encodings, which are [0, 2), via a + // [0, 1] depth output variable, during EDRAM contents reinterpretation. + // This is done by scaling the viewport depth bounds by 0.5. However, the + // depth bias is applied after the viewport. This adjustment is only needed + // for the constant bias - for slope-scaled, the derivatives of Z are + // calculated after the viewport as well, and will already include the 0.5 + // scaling from the viewport. + return float24_as_0_to_0_5 ? kFloat24Scale * 0.5f : kFloat24Scale; +} + inline bool DoesCoverageDependOnAlpha(reg::RB_COLORCONTROL rb_colorcontrol) { return (rb_colorcontrol.alpha_test_enable && rb_colorcontrol.alpha_func != xenos::CompareFunction::kAlways) || diff --git a/src/xenia/gpu/dxbc.h b/src/xenia/gpu/dxbc.h index bf2fc8b86..c497b98d6 100644 --- a/src/xenia/gpu/dxbc.h +++ b/src/xenia/gpu/dxbc.h @@ -973,7 +973,7 @@ struct Src : OperandAddress { // For creating instances for use in declarations. struct DclT {}; - static constexpr DclT Dcl; + static constexpr DclT Dcl = {}; static Src R(uint32_t index, uint32_t swizzle = kXYZW) { return Src(OperandType::kTemp, swizzle, index); diff --git a/src/xenia/gpu/dxbc_shader_translator.cc b/src/xenia/gpu/dxbc_shader_translator.cc index 78da5e09e..30582b022 100644 --- a/src/xenia/gpu/dxbc_shader_translator.cc +++ b/src/xenia/gpu/dxbc_shader_translator.cc @@ -293,7 +293,7 @@ void DxbcShaderTranslator::StartVertexShader_LoadVertexIndex() { a_.OpINE( index_dest, dxbc::Src::V(uint32_t(InOutRegister::kVSInVertexIndex), dxbc::Src::kXXXX), - LoadSystemConstant(SystemConstantIndex::kLineLoopClosingIndex, + LoadSystemConstant(SystemConstants::Index::kLineLoopClosingIndex, offsetof(SystemConstants, line_loop_closing_index), dxbc::Src::kXXXX)); // Zero the index if processing the closing vertex of a line loop, or do @@ -306,7 +306,7 @@ void DxbcShaderTranslator::StartVertexShader_LoadVertexIndex() { { // Swap the vertex index's endianness. dxbc::Src endian_src(LoadSystemConstant( - SystemConstantIndex::kVertexIndexEndian, + SystemConstants::Index::kVertexIndexEndian, offsetof(SystemConstants, vertex_index_endian), dxbc::Src::kXXXX)); dxbc::Dest swap_temp_dest(dxbc::Dest::R(reg, 0b0010)); dxbc::Src swap_temp_src(dxbc::Src::R(reg, dxbc::Src::kYYYY)); @@ -346,12 +346,27 @@ void DxbcShaderTranslator::StartVertexShader_LoadVertexIndex() { // Add the base vertex index. a_.OpIAdd(index_dest, index_src, - LoadSystemConstant(SystemConstantIndex::kVertexBaseIndex, - offsetof(SystemConstants, vertex_base_index), + LoadSystemConstant(SystemConstants::Index::kVertexIndexOffset, + offsetof(SystemConstants, vertex_index_offset), + dxbc::Src::kXXXX)); + + // Mask since the GPU only uses the lower 24 bits of the vertex index (tested + // on an Adreno 200 phone). `((index & 0xFFFFFF) + offset) & 0xFFFFFF` is the + // same as `(index + offset) & 0xFFFFFF`. + a_.OpAnd(index_dest, index_src, dxbc::Src::LU(xenos::kVertexIndexMask)); + + // Clamp the vertex index after offsetting. + a_.OpUMax(index_dest, index_src, + LoadSystemConstant(SystemConstants::Index::kVertexIndexMinMax, + offsetof(SystemConstants, vertex_index_min), + dxbc::Src::kXXXX)); + a_.OpUMin(index_dest, index_src, + LoadSystemConstant(SystemConstants::Index::kVertexIndexMinMax, + offsetof(SystemConstants, vertex_index_max), dxbc::Src::kXXXX)); // Convert to float. - a_.OpIToF(index_dest, index_src); + a_.OpUToF(index_dest, index_src); if (uses_register_dynamic_addressing) { // Store to indexed GPR 0 in x0[0]. @@ -547,9 +562,27 @@ void DxbcShaderTranslator::StartPixelShader() { // Load the EDRAM addresses and the coverage. StartPixelShader_LoadROVParameters(); - // Do early 2x2 quad rejection if it makes sense. if (ROV_IsDepthStencilEarly()) { + // Do early 2x2 quad rejection if it's safe. ROV_DepthStencilTest(); + } else { + if (!current_shader().writes_depth()) { + // Get the derivatives of the screen-space (but not clamped to the + // viewport depth bounds yet - this happens after the pixel shader in + // Direct3D 11+; also linear within the triangle - thus constant + // derivatives along the triangle) Z for calculating per-sample depth + // values and the slope-scaled polygon offset to + // system_temp_depth_stencil_ before any return statement is possibly + // reached. + assert_true(system_temp_depth_stencil_ != UINT32_MAX); + dxbc::Src in_position_z(dxbc::Src::V( + uint32_t(InOutRegister::kPSInPosition), dxbc::Src::kZZZZ)); + in_position_used_ |= 0b0100; + a_.OpDerivRTXCoarse(dxbc::Dest::R(system_temp_depth_stencil_, 0b0001), + in_position_z); + a_.OpDerivRTYCoarse(dxbc::Dest::R(system_temp_depth_stencil_, 0b0010), + in_position_z); + } } } @@ -568,7 +601,7 @@ void DxbcShaderTranslator::StartPixelShader() { uint32_t centroid_temp = uses_register_dynamic_addressing ? PushSystemTemp() : UINT32_MAX; dxbc::Src sampling_pattern_src(LoadSystemConstant( - SystemConstantIndex::kInterpolatorSamplingPattern, + SystemConstants::Index::kInterpolatorSamplingPattern, offsetof(SystemConstants, interpolator_sampling_pattern), dxbc::Src::kXXXX)); for (uint32_t i = 0; i < interpolator_count; ++i) { @@ -606,7 +639,7 @@ void DxbcShaderTranslator::StartPixelShader() { // absolute value) coordinates, facing (X sign bit) - to the specified // interpolator register (ps_param_gen). dxbc::Src param_gen_index_src(LoadSystemConstant( - SystemConstantIndex::kPSParamGen, + SystemConstants::Index::kPSParamGen, offsetof(SystemConstants, ps_param_gen), dxbc::Src::kXXXX)); uint32_t param_gen_temp = PushSystemTemp(); // Check if pixel parameters need to be written. @@ -660,7 +693,7 @@ void DxbcShaderTranslator::StartPixelShader() { a_.OpUBFE(dxbc::Dest::R(param_gen_temp, 0b0100), dxbc::Src::LU(1), param_gen_index_src, LoadSystemConstant( - SystemConstantIndex::kInterpolatorSamplingPattern, + SystemConstants::Index::kInterpolatorSamplingPattern, offsetof(SystemConstants, interpolator_sampling_pattern), dxbc::Src::kXXXX)); a_.OpIf(bool(xenos::SampleLocation::kCenter), @@ -744,15 +777,24 @@ void DxbcShaderTranslator::StartTranslation() { system_temp_rov_params_ = PushSystemTemp(); } if (IsDepthStencilSystemTempUsed()) { - // If the shader doesn't write to oDepth, and ROV is used, each - // component will be written to if depth/stencil is enabled and the - // respective sample is covered - so need to initialize now because the - // first writes will be conditional. - // If the shader writes to oDepth, this is oDepth of the shader, written - // by the guest code, so initialize because assumptions can't be made - // about the integrity of the guest code. - system_temp_depth_stencil_ = - PushSystemTemp(current_shader().writes_depth() ? 0b0001 : 0b1111); + uint32_t depth_stencil_temp_zero_mask; + if (current_shader().writes_depth()) { + // X holds the guest oDepth - make sure it's always initialized because + // assumptions can't be made about the integrity of the guest code. + depth_stencil_temp_zero_mask = 0b0001; + } else { + assert_true(edram_rov_used_); + if (ROV_IsDepthStencilEarly()) { + // XYZW hold per-sample depth / stencil after the early test - written + // conditionally based on the coverage, ensure registers are + // initialized unconditionally for safety. + depth_stencil_temp_zero_mask = 0b1111; + } else { + // XY hold Z gradients, written unconditionally in the beginning. + depth_stencil_temp_zero_mask = 0b0000; + } + } + system_temp_depth_stencil_ = PushSystemTemp(depth_stencil_temp_zero_mask); } uint32_t shader_writes_color_targets = current_shader().writes_color_targets(); @@ -896,7 +938,7 @@ void DxbcShaderTranslator::CompleteVertexOrDomainShader() { uint32_t(InOutRegister::kVSDSOutClipDistance0123) + (i >> 2), 1 << (i & 3)), dxbc::Src::R(system_temp_position_), - LoadSystemConstant(SystemConstantIndex::kUserClipPlanes, + LoadSystemConstant(SystemConstants::Index::kUserClipPlanes, offsetof(SystemConstants, user_clip_planes) + sizeof(float) * 4 * i, dxbc::Src::kXYZW)); @@ -908,21 +950,16 @@ void DxbcShaderTranslator::CompleteVertexOrDomainShader() { // position to NaN to kill all primitives. a_.OpMul(dxbc::Dest::R(system_temp_position_, 0b0111), dxbc::Src::R(system_temp_position_), - LoadSystemConstant(SystemConstantIndex::kNDCScale, + LoadSystemConstant(SystemConstants::Index::kNDCScale, offsetof(SystemConstants, ndc_scale), 0b100100)); // Apply offset (multiplied by W) used for the same purposes. a_.OpMAd(dxbc::Dest::R(system_temp_position_, 0b0111), - LoadSystemConstant(SystemConstantIndex::kNDCOffset, + LoadSystemConstant(SystemConstants::Index::kNDCOffset, offsetof(SystemConstants, ndc_offset), 0b100100), dxbc::Src::R(system_temp_position_, dxbc::Src::kWWWW), dxbc::Src::R(system_temp_position_)); - // Write Z and W of the position to a separate attribute so ROV output can get - // per-sample depth. - a_.OpMov(dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutClipSpaceZW), 0b0011), - dxbc::Src::R(system_temp_position_, 0b1110)); - // Assuming SV_CullDistance was zeroed earlier in this function. // Kill the primitive if needed - check if the shader wants to kill. // TODO(Triang3l): Find if the condition is actually the flag being non-zero. @@ -1889,9 +1926,6 @@ const DxbcShaderTranslator::ShaderRdefType {"float4", dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, 1, 4, 0, ShaderRdefTypeIndex::kUnknown}, - // kInt - {"int", dxbc::RdefVariableClass::kScalar, dxbc::RdefVariableType::kInt, - 1, 1, 0, ShaderRdefTypeIndex::kUnknown}, // kUint {"dword", dxbc::RdefVariableClass::kScalar, dxbc::RdefVariableType::kUInt, 1, 1, 0, ShaderRdefTypeIndex::kUnknown}, @@ -1928,7 +1962,7 @@ const DxbcShaderTranslator::ShaderRdefType const DxbcShaderTranslator::SystemConstantRdef DxbcShaderTranslator::system_constant_rdef_[size_t( - DxbcShaderTranslator::SystemConstantIndex::kCount)] = { + DxbcShaderTranslator::SystemConstants::Index::kCount)] = { {"xe_flags", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, {"xe_tessellation_factor_range", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, @@ -1937,38 +1971,39 @@ const DxbcShaderTranslator::SystemConstantRdef {"xe_vertex_index_endian", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_vertex_base_index", ShaderRdefTypeIndex::kInt, sizeof(int32_t)}, - {"xe_point_size", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, + {"xe_vertex_index_offset", ShaderRdefTypeIndex::kUint, sizeof(int32_t)}, + {"xe_vertex_index_min_max", ShaderRdefTypeIndex::kUint2, + sizeof(uint32_t) * 2}, + + {"xe_user_clip_planes", ShaderRdefTypeIndex::kFloat4Array6, + sizeof(float) * 4 * 6}, + + {"xe_ndc_scale", ShaderRdefTypeIndex::kFloat3, sizeof(float) * 3}, + {"xe_point_size_x", ShaderRdefTypeIndex::kFloat, sizeof(float)}, + + {"xe_ndc_offset", ShaderRdefTypeIndex::kFloat3, sizeof(float) * 3}, + {"xe_point_size_y", ShaderRdefTypeIndex::kFloat, sizeof(float)}, {"xe_point_size_min_max", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, {"xe_point_screen_to_ndc", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, - {"xe_user_clip_planes", ShaderRdefTypeIndex::kFloat4Array6, - sizeof(float) * 4 * 6}, - - {"xe_ndc_scale", ShaderRdefTypeIndex::kFloat3, sizeof(float) * 3}, {"xe_interpolator_sampling_pattern", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, - - {"xe_ndc_offset", ShaderRdefTypeIndex::kFloat3, sizeof(float) * 3}, {"xe_ps_param_gen", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_sample_count_log2", ShaderRdefTypeIndex::kUint2, + sizeof(uint32_t) * 2}, {"xe_texture_swizzled_signs", ShaderRdefTypeIndex::kUint4Array2, sizeof(uint32_t) * 4 * 2}, {"xe_textures_resolved", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_sample_count_log2", ShaderRdefTypeIndex::kUint2, - sizeof(uint32_t) * 2}, {"xe_alpha_test_reference", ShaderRdefTypeIndex::kFloat, sizeof(float)}, - - {"xe_color_exp_bias", ShaderRdefTypeIndex::kFloat4, sizeof(float) * 4}, - {"xe_alpha_to_mask", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, {"xe_edram_pitch_tiles", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_edram_depth_range", ShaderRdefTypeIndex::kFloat2, - sizeof(float) * 2}, + + {"xe_color_exp_bias", ShaderRdefTypeIndex::kFloat4, sizeof(float) * 4}, {"xe_edram_poly_offset_front", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, @@ -2078,9 +2113,9 @@ void DxbcShaderTranslator::WriteResourceDefinition() { // Names. name_ptr = (uint32_t(shader_object_.size()) - blob_position_dwords) * sizeof(uint32_t); - uint32_t constant_name_ptrs_system[size_t(SystemConstantIndex::kCount)]; + uint32_t constant_name_ptrs_system[size_t(SystemConstants::Index::kCount)]; if (cbuffer_index_system_constants_ != kBindingIndexUnallocated) { - for (size_t i = 0; i < size_t(SystemConstantIndex::kCount); ++i) { + for (size_t i = 0; i < size_t(SystemConstants::Index::kCount); ++i) { constant_name_ptrs_system[i] = name_ptr; name_ptr += dxbc::AppendAlignedString(shader_object_, system_constant_rdef_[i].name); @@ -2112,11 +2147,11 @@ void DxbcShaderTranslator::WriteResourceDefinition() { if (cbuffer_index_system_constants_ != kBindingIndexUnallocated) { shader_object_.resize(constant_position_dwords_system + sizeof(dxbc::RdefVariable) / sizeof(uint32_t) * - size_t(SystemConstantIndex::kCount)); + size_t(SystemConstants::Index::kCount)); auto constants_system = reinterpret_cast( shader_object_.data() + constant_position_dwords_system); uint32_t constant_offset_system = 0; - for (size_t i = 0; i < size_t(SystemConstantIndex::kCount); ++i) { + for (size_t i = 0; i < size_t(SystemConstants::Index::kCount); ++i) { dxbc::RdefVariable& constant_system = constants_system[i]; const SystemConstantRdef& translator_constant_system = system_constant_rdef_[i]; @@ -2271,7 +2306,7 @@ void DxbcShaderTranslator::WriteResourceDefinition() { cbuffer.type = dxbc::RdefCbufferType::kCbuffer; if (i == cbuffer_index_system_constants_) { cbuffer.name_ptr = cbuffer_name_ptr_system; - cbuffer.variable_count = uint32_t(SystemConstantIndex::kCount); + cbuffer.variable_count = uint32_t(SystemConstants::Index::kCount); cbuffer.variables_ptr = (constant_position_dwords_system - blob_position_dwords) * sizeof(uint32_t); @@ -2693,24 +2728,7 @@ void DxbcShaderTranslator::WriteInputSignature() { point_parameters.always_reads_mask = param_gen_used ? 0b0011 : 0b0000; } - // Z and W in clip space, for getting per-sample depth with ROV (TEXCOORD#). - size_t clip_space_zw_position = shader_object_.size(); - shader_object_.resize(shader_object_.size() + kParameterDwords); - ++parameter_count; - { - auto& clip_space_zw = *reinterpret_cast( - shader_object_.data() + clip_space_zw_position); - clip_space_zw.semantic_index = kClipSpaceZWTexCoord; - clip_space_zw.component_type = - dxbc::SignatureRegisterComponentType::kFloat32; - clip_space_zw.register_index = uint32_t(InOutRegister::kPSInClipSpaceZW); - clip_space_zw.mask = 0b0011; - clip_space_zw.always_reads_mask = edram_rov_used_ ? 0b0011 : 0b0000; - } - - // Pixel position. Z is not needed - ROV depth testing calculates the depth - // from the clip space Z/W texcoord, and if oDepth is used, it must be - // written to on every execution path anyway (SV_Position). + // Pixel position (SV_Position). size_t position_position = shader_object_.size(); shader_object_.resize(shader_object_.size() + kParameterDwords); ++parameter_count; @@ -2772,9 +2790,6 @@ void DxbcShaderTranslator::WriteInputSignature() { auto& point_parameters = *reinterpret_cast( shader_object_.data() + point_parameters_position); point_parameters.semantic_name_ptr = semantic_offset; - auto& clip_space_zw = *reinterpret_cast( - shader_object_.data() + clip_space_zw_position); - clip_space_zw.semantic_name_ptr = semantic_offset; } semantic_offset += dxbc::AppendAlignedString(shader_object_, "TEXCOORD"); { @@ -2972,22 +2987,6 @@ void DxbcShaderTranslator::WriteOutputSignature() { point_parameters.never_writes_mask = 0b1000; } - // Z and W in clip space, for getting per-sample depth with ROV (TEXCOORD#). - size_t clip_space_zw_position = shader_object_.size(); - shader_object_.resize(shader_object_.size() + kParameterDwords); - ++parameter_count; - { - auto& clip_space_zw = *reinterpret_cast( - shader_object_.data() + clip_space_zw_position); - clip_space_zw.semantic_index = kClipSpaceZWTexCoord; - clip_space_zw.component_type = - dxbc::SignatureRegisterComponentType::kFloat32; - clip_space_zw.register_index = - uint32_t(InOutRegister::kVSDSOutClipSpaceZW); - clip_space_zw.mask = 0b0011; - clip_space_zw.never_writes_mask = 0b1100; - } - // Position (SV_Position). size_t position_position = shader_object_.size(); shader_object_.resize(shader_object_.size() + kParameterDwords); @@ -3057,9 +3056,6 @@ void DxbcShaderTranslator::WriteOutputSignature() { auto& point_parameters = *reinterpret_cast( shader_object_.data() + point_parameters_position); point_parameters.semantic_name_ptr = semantic_offset; - auto& clip_space_zw = *reinterpret_cast( - shader_object_.data() + clip_space_zw_position); - clip_space_zw.semantic_name_ptr = semantic_offset; } semantic_offset += dxbc::AppendAlignedString(shader_object_, "TEXCOORD"); { @@ -3451,9 +3447,6 @@ void DxbcShaderTranslator::WriteShaderCode() { // Point parameters output. ao_.OpDclOutput(dxbc::Dest::O( uint32_t(InOutRegister::kVSDSOutPointParameters), 0b0111)); - // Clip space Z and W output. - ao_.OpDclOutput( - dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutClipSpaceZW), 0b0011)); // Position output. ao_.OpDclOutputSIV(dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutPosition)), dxbc::Name::kPosition); @@ -3490,12 +3483,6 @@ void DxbcShaderTranslator::WriteShaderCode() { 0b0011)); } } - if (edram_rov_used_) { - // Z and W in clip space, for per-sample depth. - ao_.OpDclInputPS( - dxbc::InterpolationMode::kLinear, - dxbc::Dest::V(uint32_t(InOutRegister::kPSInClipSpaceZW), 0b0011)); - } if (in_position_used_) { // Position input (XY needed for ps_param_gen, Z needed for non-ROV // float24 conversion; the ROV depth code calculates the depth the from diff --git a/src/xenia/gpu/dxbc_shader_translator.h b/src/xenia/gpu/dxbc_shader_translator.h index f809f8e79..f66b7616c 100644 --- a/src/xenia/gpu/dxbc_shader_translator.h +++ b/src/xenia/gpu/dxbc_shader_translator.h @@ -202,7 +202,7 @@ class DxbcShaderTranslator : public ShaderTranslator { }; // IF SYSTEM CONSTANTS ARE CHANGED OR ADDED, THE FOLLOWING MUST BE UPDATED: - // - SystemConstantIndex enum. + // - SystemConstants::Index enum. // - system_constant_rdef_. // - d3d12/shaders/xenos_draw.hlsli (for geometry shaders). struct SystemConstants { @@ -217,20 +217,38 @@ class DxbcShaderTranslator : public ShaderTranslator { uint32_t line_loop_closing_index; xenos::Endian vertex_index_endian; - int32_t vertex_base_index; - float point_size[2]; - - float point_size_min_max[2]; - // Screen point size * 2 (but not supersampled) -> size in NDC. - float point_screen_to_ndc[2]; + uint32_t vertex_index_offset; + union { + struct { + uint32_t vertex_index_min; + uint32_t vertex_index_max; + }; + uint32_t vertex_index_min_max[2]; + }; float user_clip_planes[6][4]; float ndc_scale[3]; - uint32_t interpolator_sampling_pattern; + float point_size_x; float ndc_offset[3]; + float point_size_y; + + union { + struct { + float point_size_min; + float point_size_max; + }; + float point_size_min_max[2]; + }; + // Screen point size * 2 (but not supersampled) -> size in NDC. + float point_screen_to_ndc[2]; + + uint32_t interpolator_sampling_pattern; uint32_t ps_param_gen; + // Log2 of X and Y sample size. Used for alpha to mask, and for MSAA with + // ROV, this is used for EDRAM address calculation. + uint32_t sample_count_log2[2]; // Each byte contains post-swizzle TextureSign values for each of the needed // components of each of the 32 used texture fetch constants. @@ -239,25 +257,14 @@ class DxbcShaderTranslator : public ShaderTranslator { // Whether the contents of each texture in fetch constants comes from a // resolve operation. uint32_t textures_resolved; - // Log2 of X and Y sample size. Used for alpha to mask, and for MSAA with - // ROV, this is used for EDRAM address calculation. - uint32_t sample_count_log2[2]; float alpha_test_reference; - - float color_exp_bias[4]; - // If alpha to mask is disabled, the entire alpha_to_mask value must be 0. // If alpha to mask is enabled, bits 0:7 are sample offsets, and bit 8 must // be 1. uint32_t alpha_to_mask; uint32_t edram_pitch_tiles; - union { - struct { - float edram_depth_range_scale; - float edram_depth_range_offset; - }; - float edram_depth_range[2]; - }; + + float color_exp_bias[4]; union { struct { @@ -326,6 +333,67 @@ class DxbcShaderTranslator : public ShaderTranslator { // The constant blend factor for the respective modes. float edram_blend_constant[4]; + + private: + friend class DxbcShaderTranslator; + + enum class Index : uint32_t { + kFlags, + kTessellationFactorRange, + kLineLoopClosingIndex, + + kVertexIndexEndian, + kVertexIndexOffset, + kVertexIndexMinMax, + + kUserClipPlanes, + + kNDCScale, + kPointSizeX, + + kNDCOffset, + kPointSizeY, + + kPointSizeMinMax, + kPointScreenToNDC, + + kInterpolatorSamplingPattern, + kPSParamGen, + kSampleCountLog2, + + kTextureSwizzledSigns, + + kTexturesResolved, + kAlphaTestReference, + kAlphaToMask, + kEdramPitchTiles, + + kColorExpBias, + + kEdramPolyOffsetFront, + kEdramPolyOffsetBack, + + kEdramDepthBaseDwords, + + kEdramStencil, + + kEdramRTBaseDwordsScaled, + + kEdramRTFormatFlags, + + kEdramRTClamp, + + kEdramRTKeepMask, + + kEdramRTBlendFactorsOps, + + kEdramBlendConstant, + + kCount, + }; + static_assert( + uint32_t(Index::kCount) <= 64, + "Too many system constants, can't use uint64_t for usage bits"); }; // Shader resource view binding spaces. @@ -507,46 +575,7 @@ class DxbcShaderTranslator : public ShaderTranslator { void ProcessAluInstruction(const ParsedAluInstruction& instr) override; private: - enum class SystemConstantIndex : uint32_t { - kFlags, - kTessellationFactorRange, - kLineLoopClosingIndex, - kVertexIndexEndian, - kVertexBaseIndex, - kPointSize, - kPointSizeMinMax, - kPointScreenToNDC, - kUserClipPlanes, - kNDCScale, - kInterpolatorSamplingPattern, - kNDCOffset, - kPSParamGen, - kTextureSwizzledSigns, - kTexturesResolved, - kSampleCountLog2, - kAlphaTestReference, - kColorExpBias, - kAlphaToMask, - kEdramPitchTiles, - kEdramDepthRange, - kEdramPolyOffsetFront, - kEdramPolyOffsetBack, - kEdramDepthBaseDwords, - kEdramStencil, - kEdramRTBaseDwordsScaled, - kEdramRTFormatFlags, - kEdramRTClamp, - kEdramRTKeepMask, - kEdramRTBlendFactorsOps, - kEdramBlendConstant, - - kCount, - }; - static_assert(uint32_t(SystemConstantIndex::kCount) <= 64, - "Too many system constants, can't use uint64_t for usage bits"); - static constexpr uint32_t kPointParametersTexCoord = xenos::kMaxInterpolators; - static constexpr uint32_t kClipSpaceZWTexCoord = kPointParametersTexCoord + 1; enum class InOutRegister : uint32_t { // IF ANY OF THESE ARE CHANGED, WriteInputSignature and WriteOutputSignature @@ -557,7 +586,6 @@ class DxbcShaderTranslator : public ShaderTranslator { kVSDSOutInterpolators = 0, kVSDSOutPointParameters = kVSDSOutInterpolators + xenos::kMaxInterpolators, - kVSDSOutClipSpaceZW, kVSDSOutPosition, // Clip and cull distances must be tightly packed in Direct3D! kVSDSOutClipDistance0123, @@ -569,7 +597,6 @@ class DxbcShaderTranslator : public ShaderTranslator { kPSInInterpolators = 0, kPSInPointParameters = kPSInInterpolators + xenos::kMaxInterpolators, - kPSInClipSpaceZW, kPSInPosition, // nointerpolation inputs. SV_IsFrontFace (X) is always present for // ps_param_gen, SV_SampleIndex (Y) is conditional (only for memexport when @@ -580,7 +607,7 @@ class DxbcShaderTranslator : public ShaderTranslator { // GetSystemConstantSrc + MarkSystemConstantUsed is for special cases of // building the source unconditionally - in general, LoadSystemConstant must // be used instead. - void MarkSystemConstantUsed(SystemConstantIndex index) { + void MarkSystemConstantUsed(SystemConstants::Index index) { system_constants_used_ |= uint64_t(1) << uint32_t(index); } // Offset should be offsetof(SystemConstants, field). Swizzle values are @@ -589,7 +616,7 @@ class DxbcShaderTranslator : public ShaderTranslator { // vector, it will be turned into YYYY, and so on. The swizzle may include // out-of-bounds components of the vector for simplicity of use, assuming they // will be dropped anyway later. - dxbc::Src GetSystemConstantSrc(size_t offset, uint32_t swizzle) { + dxbc::Src GetSystemConstantSrc(size_t offset, uint32_t swizzle) const { uint32_t first_component = uint32_t((offset >> 2) & 3); return dxbc::Src::CB( cbuffer_index_system_constants_, @@ -599,13 +626,13 @@ class DxbcShaderTranslator : public ShaderTranslator { std::min(((swizzle >> 4) & 3) + first_component, uint32_t(3)) << 4 | std::min(((swizzle >> 6) & 3) + first_component, uint32_t(3)) << 6); } - dxbc::Src LoadSystemConstant(SystemConstantIndex index, size_t offset, + dxbc::Src LoadSystemConstant(SystemConstants::Index index, size_t offset, uint32_t swizzle) { MarkSystemConstantUsed(index); return GetSystemConstantSrc(offset, swizzle); } dxbc::Src LoadFlagsSystemConstant() { - return LoadSystemConstant(SystemConstantIndex::kFlags, + return LoadSystemConstant(SystemConstants::Index::kFlags, offsetof(SystemConstants, flags), dxbc::Src::kXXXX); } @@ -650,6 +677,10 @@ class DxbcShaderTranslator : public ShaderTranslator { } bool IsDepthStencilSystemTempUsed() const { // See system_temp_depth_stencil_ documentation for explanation of cases. + if (edram_rov_used_) { + // Needed for all cases (early, late, late with oDepth). + return true; + } if (current_shader().writes_depth()) { // With host render targets, the depth format may be float24, in this // case, need to multiply it by 0.5 since 0...1 of the guest is stored as @@ -657,10 +688,6 @@ class DxbcShaderTranslator : public ShaderTranslator { // With ROV, need to store it to write later. return true; } - if (edram_rov_used_ && ROV_IsDepthStencilEarly()) { - // Calculated in the beginning, written possibly in the end. - return true; - } return false; } // Whether the current non-ROV pixel shader should convert the depth to 20e4. @@ -741,15 +768,16 @@ class DxbcShaderTranslator : public ShaderTranslator { void ExportToMemory(); void CompleteVertexOrDomainShader(); // For RTV, adds the sample to coverage_temp.coverage_temp_component if it - // passes alpha to mask (except for sample 0, which overwrites the output to - // initialize it). + // passes alpha to mask (or, if initialize == true (for the first sample + // tested), overwrites the output to initialize it). // For ROV, masks the sample away from coverage_temp.coverage_temp_component // if it doesn't pass alpha to mask. // threshold_offset and temp.temp_component can be the same if needed. void CompletePixelShader_AlphaToMaskSample( - uint32_t sample_index, float threshold_base, dxbc::Src threshold_offset, - float threshold_offset_scale, uint32_t coverage_temp, - uint32_t coverage_temp_component, uint32_t temp, uint32_t temp_component); + bool initialize, uint32_t sample_index, float threshold_base, + dxbc::Src threshold_offset, float threshold_offset_scale, + uint32_t coverage_temp, uint32_t coverage_temp_component, uint32_t temp, + uint32_t temp_component); // Performs alpha to coverage if necessary, for RTV, writing to oMask, and for // ROV, updating the low (coverage) bits of system_temp_rov_params_.x. Done // manually even for RTV to maintain the guest dithering pattern and because @@ -928,7 +956,6 @@ class DxbcShaderTranslator : public ShaderTranslator { kFloat2, kFloat3, kFloat4, - kInt, kUint, kUint2, kUint4, @@ -982,9 +1009,9 @@ class DxbcShaderTranslator : public ShaderTranslator { uint32_t padding_after; }; static const SystemConstantRdef - system_constant_rdef_[size_t(SystemConstantIndex::kCount)]; - // Mask of system constants (1 << SystemConstantIndex) used in the shader, so - // the remaining ones can be marked as unused in RDEF. + system_constant_rdef_[size_t(SystemConstants::Index::kCount)]; + // Mask of system constants (1 << SystemConstants::Index) used in the shader, + // so the remaining ones can be marked as unused in RDEF. uint64_t system_constants_used_; // Mask of domain location actually used in the domain shader. @@ -1032,15 +1059,18 @@ class DxbcShaderTranslator : public ShaderTranslator { // W - Base-relative resolution-scaled EDRAM offset for 64bpp color data, in // dwords. uint32_t system_temp_rov_params_; - // Two purposes: + // Different purposes: // - When writing to oDepth: X also used to hold the depth written by the // shader, which, for host render targets, if the depth buffer is float24, // needs to be remapped from guest 0...1 to host 0...0.5 and, if needed, // converted to float24 precision; and for ROV, needs to be written in the // end of the shader. - // - Otherwise, when using ROV output with ROV_IsDepthStencilEarly being true: - // New per-sample depth / stencil values, generated during early - // depth / stencil test (actual writing checks coverage bits). + // - When not writing to oDepth, but using ROV: + // - ROV_IsDepthStencilEarly: New per-sample depth / stencil values, + // generated during early depth / stencil test (actual writing checks + // the remaining coverage bits). + // - Not ROV_IsDepthStencilEarly: Z gradients in .xy taken in the beginning + // of the shader before any return statement is possibly reached. uint32_t system_temp_depth_stencil_; // Up to 4 color outputs in pixel shaders (needs to be readable, because of // alpha test, alpha to coverage, exponent bias, gamma, and also for ROV diff --git a/src/xenia/gpu/dxbc_shader_translator_fetch.cc b/src/xenia/gpu/dxbc_shader_translator_fetch.cc index a0fd92c64..cb2d529da 100644 --- a/src/xenia/gpu/dxbc_shader_translator_fetch.cc +++ b/src/xenia/gpu/dxbc_shader_translator_fetch.cc @@ -945,7 +945,7 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( // calculations. assert_zero(used_result_nonzero_components & 0b1000); a_.OpAnd(dxbc::Dest::R(system_temp_result_, 0b1000), - LoadSystemConstant(SystemConstantIndex::kTexturesResolved, + LoadSystemConstant(SystemConstants::Index::kTexturesResolved, offsetof(SystemConstants, textures_resolved), dxbc::Src::kXXXX), dxbc::Src::LU(uint32_t(1) << tfetch_index)); @@ -1006,7 +1006,7 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( uint32_t signs_temp = UINT32_MAX; if (instr.opcode == FetchOpcode::kTextureFetch) { signs_temp = PushSystemTemp(); - MarkSystemConstantUsed(SystemConstantIndex::kTextureSwizzledSigns); + MarkSystemConstantUsed(SystemConstants::Index::kTextureSwizzledSigns); a_.OpUBFE(dxbc::Dest::R(signs_temp, used_result_nonzero_components), dxbc::Src::LU(2), dxbc::Src::LU(signs_shift, signs_shift + 2, signs_shift + 4, @@ -1069,7 +1069,7 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( // resolution scale inverse - sampler not loaded yet. a_.OpAnd( dxbc::Dest::R(coord_and_sampler_temp, 0b1000), - LoadSystemConstant(SystemConstantIndex::kTexturesResolved, + LoadSystemConstant(SystemConstants::Index::kTexturesResolved, offsetof(SystemConstants, textures_resolved), dxbc::Src::kXXXX), dxbc::Src::LU(uint32_t(1) << tfetch_index)); @@ -1135,7 +1135,7 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( // resolution scale inverse - sampler not loaded yet. a_.OpAnd( dxbc::Dest::R(coord_and_sampler_temp, 0b1000), - LoadSystemConstant(SystemConstantIndex::kTexturesResolved, + LoadSystemConstant(SystemConstants::Index::kTexturesResolved, offsetof(SystemConstants, textures_resolved), dxbc::Src::kXXXX), dxbc::Src::LU(uint32_t(1) << tfetch_index)); @@ -1312,7 +1312,7 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( // Check which SRV needs to be accessed - signed or unsigned. If there is // at least one non-signed component, will be using the unsigned one. uint32_t is_unsigned_temp = PushSystemTemp(); - MarkSystemConstantUsed(SystemConstantIndex::kTextureSwizzledSigns); + MarkSystemConstantUsed(SystemConstants::Index::kTextureSwizzledSigns); a_.OpUBFE(dxbc::Dest::R(is_unsigned_temp, 0b0001), dxbc::Src::LU(8), dxbc::Src::LU(signs_shift), signs_uint_src); a_.OpINE( @@ -2055,7 +2055,7 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( // `if`, with `else` for sRGB resolved render targets. a_.OpAnd( dxbc::Dest::R(gamma_temp, 0b0001), - LoadSystemConstant(SystemConstantIndex::kTexturesResolved, + LoadSystemConstant(SystemConstants::Index::kTexturesResolved, offsetof(SystemConstants, textures_resolved), dxbc::Src::kXXXX), dxbc::Src::LU(uint32_t(1) << tfetch_index)); diff --git a/src/xenia/gpu/dxbc_shader_translator_om.cc b/src/xenia/gpu/dxbc_shader_translator_om.cc index 13c009973..1002bf14d 100644 --- a/src/xenia/gpu/dxbc_shader_translator_om.cc +++ b/src/xenia/gpu/dxbc_shader_translator_om.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2018 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -224,7 +224,7 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { // system_temp_rov_params_.w = Y guest sample 0 position a_.OpIShL(dxbc::Dest::R(system_temp_rov_params_, 0b1100), dxbc::Src::R(system_temp_rov_params_), - LoadSystemConstant(SystemConstantIndex::kSampleCountLog2, + LoadSystemConstant(SystemConstants::Index::kSampleCountLog2, offsetof(SystemConstants, sample_count_log2), 0b0100 << 4)); // Get 80x16 samples tile index - start dividing X by 80 by getting the high @@ -251,7 +251,7 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { // system_temp_rov_params_.w = Y guest sample 0 position a_.OpUMAd(dxbc::Dest::R(system_temp_rov_params_, 0b0010), dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY), - LoadSystemConstant(SystemConstantIndex::kEdramPitchTiles, + LoadSystemConstant(SystemConstants::Index::kEdramPitchTiles, offsetof(SystemConstants, edram_pitch_tiles), dxbc::Src::kXXXX), dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX)); @@ -330,7 +330,7 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { a_.OpIAdd( dxbc::Dest::R(system_temp_rov_params_, 0b0010), dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY), - LoadSystemConstant(SystemConstantIndex::kEdramDepthBaseDwords, + LoadSystemConstant(SystemConstants::Index::kEdramDepthBaseDwords, offsetof(SystemConstants, edram_depth_base_dwords), dxbc::Src::kXXXX)); if (draw_resolution_scale_ > 1) { @@ -371,7 +371,7 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { // MSAA, handling samples 0 and 3 (upper-left and lower-right) as 0 and 1. // Check if 4x MSAA is enabled. - a_.OpIf(true, LoadSystemConstant(SystemConstantIndex::kSampleCountLog2, + a_.OpIf(true, LoadSystemConstant(SystemConstants::Index::kSampleCountLog2, offsetof(SystemConstants, sample_count_log2), dxbc::Src::kXXXX)); { @@ -426,8 +426,99 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // temp.x = free a_.OpIf(true, temp_x_src); - bool depth_stencil_early = ROV_IsDepthStencilEarly(); bool shader_writes_depth = current_shader().writes_depth(); + bool depth_stencil_early = ROV_IsDepthStencilEarly(); + + dxbc::Src z_ddx_src(dxbc::Src::LF(0.0f)), z_ddy_src(dxbc::Src::LF(0.0f)); + + if (shader_writes_depth) { + // Convert the shader-generated depth to 24-bit, using temp.x as + // temporary. oDepth is already written by StoreResult with saturation, + // no need to clamp here. Adreno 200 doesn't have PA_SC_VPORT_ZMIN/ZMAX, + // so likely there's no need to clamp to the viewport depth bounds. + ROV_DepthTo24Bit(system_temp_depth_stencil_, 0, system_temp_depth_stencil_, + 0, temp, 0); + } else { + dxbc::Src in_position_z( + dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition), dxbc::Src::kZZZZ)); + // Get the derivatives of the screen-space (but not clamped to the viewport + // depth bounds yet - this happens after the pixel shader in Direct3D 11+; + // also linear within the triangle - thus constant derivatives along the + // triangle) Z for calculating per-sample depth values and the slope-scaled + // polygon offset. + // We're using derivatives instead of eval_sample_index for various reasons: + // - eval_sample_index doesn't work with SV_Position - need to use an + // additional interpolant. + // - On AMD, eval_sample_index is actually implemented via calculation and + // scaling of derivatives of barycentric coordinates, therefore there's no + // advantage of using it there. + // - eval_sample_index is (inconsistently, but often) one of the sources of + // the infamous AMD shader compiler crashes when ROV is used in Xenia, in + // addition to shader compiler crashes on WARP. + if (depth_stencil_early) { + z_ddx_src = dxbc::Src::R(temp, dxbc::Src::kXXXX); + z_ddy_src = dxbc::Src::R(temp, dxbc::Src::kYYYY); + // temp.x = ddx(z) + // temp.y = ddy(z) + in_position_used_ |= 0b0100; + a_.OpDerivRTXCoarse(temp_x_dest, in_position_z); + a_.OpDerivRTYCoarse(temp_y_dest, in_position_z); + } else { + // For late depth / stencil testing, derivatives are calculated in the + // beginning of the shader before any return statement is possibly + // reached, and written to system_temp_depth_stencil_.xy. + assert_true(system_temp_depth_stencil_ != UINT32_MAX); + z_ddx_src = dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kXXXX); + z_ddy_src = dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kYYYY); + } + // Get the maximum depth slope for polygon offset. + // https://docs.microsoft.com/en-us/windows/desktop/direct3d9/depth-bias + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = max(|ddx(z)|, |ddy(z)|) + a_.OpMax(temp_z_dest, z_ddx_src.Abs(), z_ddy_src.Abs()); + // Calculate the depth bias for the needed faceness. + in_front_face_used_ = true; + a_.OpIf(true, + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + dxbc::Src::kXXXX)); + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = front face polygon offset + // temp.w = free + a_.OpMAd( + temp_z_dest, temp_z_src, + LoadSystemConstant(SystemConstants::Index::kEdramPolyOffsetFront, + offsetof(SystemConstants, edram_poly_offset_front), + dxbc::Src::kXXXX), + LoadSystemConstant(SystemConstants::Index::kEdramPolyOffsetFront, + offsetof(SystemConstants, edram_poly_offset_front), + dxbc::Src::kYYYY)); + a_.OpElse(); + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = back face polygon offset + // temp.w = free + a_.OpMAd( + temp_z_dest, temp_z_src, + LoadSystemConstant(SystemConstants::Index::kEdramPolyOffsetBack, + offsetof(SystemConstants, edram_poly_offset_back), + dxbc::Src::kXXXX), + LoadSystemConstant(SystemConstants::Index::kEdramPolyOffsetBack, + offsetof(SystemConstants, edram_poly_offset_back), + dxbc::Src::kYYYY)); + a_.OpEndIf(); + // Apply the post-clip and post-viewport polygon offset to the fragment's + // depth. Not clamping yet as this is at the center, which is not + // necessarily covered and not necessarily inside the bounds - derivatives + // scaled by sample positions will be added to this value, and it must be + // linear. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + in_position_used_ |= 0b0100; + a_.OpAdd(temp_z_dest, temp_z_src, in_position_z); + } for (uint32_t i = 0; i < 4; ++i) { // With early depth/stencil, depth/stencil writing may be deferred to the @@ -437,231 +528,26 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // temporary register. dxbc::Dest sample_depth_stencil_dest( depth_stencil_early ? dxbc::Dest::R(system_temp_depth_stencil_, 1 << i) - : temp_x_dest); + : temp_w_dest); dxbc::Src sample_depth_stencil_src( depth_stencil_early ? dxbc::Src::R(system_temp_depth_stencil_).Select(i) - : temp_x_src); + : temp_w_src); - if (!i) { - if (shader_writes_depth) { - // Convert the shader-generated depth to 24-bit, using temp.x as - // temporary. oDepth is already written by StoreResult with saturation, - // no need to clamp here. Adreno 200 doesn't have PA_SC_VPORT_ZMIN/ZMAX, - // so likely there's no need to clamp to the viewport depth bounds. - ROV_DepthTo24Bit(system_temp_depth_stencil_, 0, - system_temp_depth_stencil_, 0, temp, 0); - } else { - // Load the first sample's Z*W and W to temp.xy - need this regardless - // of coverage for polygon offset. - // temp.x = first sample's clip space Z*W - // temp.y = first sample's clip space W - a_.OpEvalSampleIndex( - dxbc::Dest::R(temp, 0b0011), - dxbc::Src::V(uint32_t(InOutRegister::kPSInClipSpaceZW)), - dxbc::Src::LU(0)); - // Calculate the first sample's Z/W to temp.x for conversion to 24-bit - // and depth test. - // temp.x? = first sample's clip space Z - // temp.y = free - a_.OpDiv(sample_depth_stencil_dest, temp_x_src, temp_y_src, true); - // Apply viewport Z range to the first sample because this would affect - // the slope-scaled depth bias (tested on PC on Direct3D 12, by - // comparing the fraction of the polygon's area with depth clamped - - // affected by the constant bias, but not affected by the slope-scaled - // bias, also depth range clamping should be done after applying the - // offset as well). - // temp.x? = first sample's viewport space Z - a_.OpMAd(sample_depth_stencil_dest, sample_depth_stencil_src, - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_scale), - dxbc::Src::kXXXX), - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_offset), - dxbc::Src::kXXXX), - true); - // Get the derivatives of a sample's depth, for the slope-scaled polygon - // offset. Probably not very significant that it's for the sample 0 - // rather than for the center, likely neither is accurate because Xenos - // probably calculates the slope between 16ths of a pixel according to - // the meaning of the slope-scaled polygon offset in R5xx Acceleration. - // temp.x? = first sample's viewport space Z - // temp.y = ddx(z) - // temp.z = ddy(z) - a_.OpDerivRTXCoarse(temp_y_dest, sample_depth_stencil_src); - a_.OpDerivRTYCoarse(temp_z_dest, sample_depth_stencil_src); - // Get the maximum depth slope for polygon offset to temp.y. - // https://docs.microsoft.com/en-us/windows/desktop/direct3d9/depth-bias - // temp.x? = first sample's viewport space Z - // temp.y = max(|ddx(z)|, |ddy(z)|) - // temp.z = free - a_.OpMax(temp_y_dest, temp_y_src.Abs(), temp_z_src.Abs()); - // Copy the needed polygon offset values to temp.zw. - // temp.x? = first sample's viewport space Z - // temp.y = max(|ddx(z)|, |ddy(z)|) - // temp.z = polygon offset scale - // temp.w = polygon offset bias - in_front_face_used_ = true; - a_.OpMovC( - dxbc::Dest::R(temp, 0b1100), - dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), - dxbc::Src::kXXXX), - LoadSystemConstant( - SystemConstantIndex::kEdramPolyOffsetFront, - offsetof(SystemConstants, edram_poly_offset_front), - 0b0100 << 4), - LoadSystemConstant( - SystemConstantIndex::kEdramPolyOffsetBack, - offsetof(SystemConstants, edram_poly_offset_back), - 0b0100 << 4)); - // Apply the slope scale and the constant bias to the offset. - // temp.x? = first sample's viewport space Z - // temp.y = polygon offset - // temp.z = free - // temp.w = free - a_.OpMAd(temp_y_dest, temp_y_src, temp_z_src, temp_w_src); - // Calculate the upper Z range bound to temp.z for clamping after - // biasing. - // temp.x? = first sample's viewport space Z - // temp.y = polygon offset - // temp.z = viewport maximum depth - a_.OpAdd(temp_z_dest, - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_offset), - dxbc::Src::kXXXX), - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_scale), - dxbc::Src::kXXXX)); - } - } - - // Get if the current sample is covered to temp.w. - // temp.x = first sample's viewport space Z if not writing to oDepth - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth + // Get if the current sample is covered. + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center // temp.w = coverage of the current sample a_.OpAnd(temp_w_dest, dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), dxbc::Src::LU(1 << i)); - // Check if the current sample is covered. Release 1 VGPR. - // temp.x = first sample's viewport space Z if not writing to oDepth - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth + // Check if the current sample is covered. + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center // temp.w = free a_.OpIf(true, temp_w_src); - if (shader_writes_depth) { - // Copy the 24-bit depth common to all samples to sample_depth_stencil. - // temp.x = shader-generated 24-bit depth - a_.OpMov(sample_depth_stencil_dest, - dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kXXXX)); - } else { - if (i) { - // Sample's depth precalculated for sample 0 (for slope-scaled depth - // bias calculation), but need to calculate it for other samples. - // - // Reusing temp.x because it may contain the depth value for the first - // sample, but it has been written already. - // - // For 2x: - // Using ForcedSampleCount of 4 (2 is not supported on Nvidia), so for - // 2x MSAA, handling samples 0 and 3 (upper-left and lower-right) as 0 - // and 1. Thus, evaluating Z/W at sample 3 when 4x is not enabled. - // - // For 4x: - // Direct3D 12's sample pattern has 1 as top-right, 2 as bottom-left. - // Xbox 360's render targets are 2x taller with 2x MSAA, 2x wider with - // 4x, thus, likely 1 is bottom-left, 2 is top-right - swapping these. - // - // temp.x = sample's clip space Z*W - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = sample's clip space W - if (i == 1) { - a_.OpMovC( - sample_depth_stencil_dest, - LoadSystemConstant(SystemConstantIndex::kSampleCountLog2, - offsetof(SystemConstants, sample_count_log2), - dxbc::Src::kXXXX), - dxbc::Src::LU(3), dxbc::Src::LU(2)); - a_.OpEvalSampleIndex( - dxbc::Dest::R(temp, 0b1001), - dxbc::Src::V(uint32_t(InOutRegister::kPSInClipSpaceZW), - 0b01000000), - sample_depth_stencil_src); - } else { - a_.OpEvalSampleIndex( - dxbc::Dest::R(temp, 0b1001), - dxbc::Src::V(uint32_t(InOutRegister::kPSInClipSpaceZW), - 0b01000000), - dxbc::Src::LU(i == 2 ? 1 : i)); - } - // Calculate Z/W for the current sample from the evaluated Z*W and W. - // temp.x? = sample's clip space Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = free - a_.OpDiv(sample_depth_stencil_dest, temp_x_src, temp_w_src, true); - // Apply viewport Z range the same way as it was applied to sample 0. - // temp.x? = sample's viewport space Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - a_.OpMAd(sample_depth_stencil_dest, sample_depth_stencil_src, - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_scale), - dxbc::Src::kXXXX), - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_offset), - dxbc::Src::kXXXX), - true); - } - // Add the bias to the depth of the sample. - // temp.x? = sample's unclamped biased Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - a_.OpAdd(sample_depth_stencil_dest, sample_depth_stencil_src, temp_y_src); - // Clamp the biased depth to the lower viewport depth bound. - // temp.x? = sample's lower-clamped biased Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - a_.OpMax(sample_depth_stencil_dest, sample_depth_stencil_src, - LoadSystemConstant( - SystemConstantIndex::kEdramDepthRange, - offsetof(SystemConstants, edram_depth_range_offset), - dxbc::Src::kXXXX)); - // Clamp the biased depth to the upper viewport depth bound. - // temp.x? = sample's biased Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - a_.OpMin(sample_depth_stencil_dest, sample_depth_stencil_src, temp_z_src, - true); - // Convert the sample's depth to 24-bit, using temp.w as a temporary. - // temp.x? = sample's 24-bit Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - ROV_DepthTo24Bit(sample_depth_stencil_src.index_1d_.index_, - sample_depth_stencil_src.swizzle_ & 3, - sample_depth_stencil_src.index_1d_.index_, - sample_depth_stencil_src.swizzle_ & 3, temp, 3); - } - // Load the old depth/stencil value to temp.w. - // temp.x? = sample's 24-bit Z - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = old depth/stencil - if (uav_index_edram_ == kBindingIndexUnallocated) { - uav_index_edram_ = uav_count_++; - } - a_.OpLdUAVTyped( - temp_w_dest, dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY), 1, - dxbc::Src::U(uav_index_edram_, uint32_t(UAVRegister::kEdram), - dxbc::Src::kXXXX)); - uint32_t sample_temp = PushSystemTemp(); dxbc::Dest sample_temp_x_dest(dxbc::Dest::R(sample_temp, 0b0001)); dxbc::Src sample_temp_x_src(dxbc::Src::R(sample_temp, dxbc::Src::kXXXX)); @@ -669,65 +555,205 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { dxbc::Src sample_temp_y_src(dxbc::Src::R(sample_temp, dxbc::Src::kYYYY)); dxbc::Dest sample_temp_z_dest(dxbc::Dest::R(sample_temp, 0b0100)); dxbc::Src sample_temp_z_src(dxbc::Src::R(sample_temp, dxbc::Src::kZZZZ)); + dxbc::Dest sample_temp_w_dest(dxbc::Dest::R(sample_temp, 0b1000)); + dxbc::Src sample_temp_w_src(dxbc::Src::R(sample_temp, dxbc::Src::kWWWW)); + + if (shader_writes_depth) { + // Copy the 24-bit depth common to all samples to sample_depth_stencil. + // temp.w = shader-generated 24-bit depth + assert_false(depth_stencil_early); + a_.OpMov(sample_depth_stencil_dest, + dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kXXXX)); + } else { + // Adreno 200 doesn't have PA_SC_VPORT_ZMIN/ZMAX, so likely there's no + // need to clamp to the viewport depth bounds, just to 0...1 - thus only + // saturating in the end of the per-sample depth calculation. + switch (i) { + case 0: + // First sample - off-center for MSAA, in the center without it. + // Using ForcedSampleCount 4 for both 2x and 4x MSAA because + // ForcedSampleCount 2 is not supported on Nvidia, thus the position + // of the top-left sample (0 in Xenia) is always that of the top-left + // sample of host 4x MSAA. + // Calculate the depth in the sample 0 for 2x or 4x MSAA. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + // temp.w if late = unsaturated sample 0 depth at 4x MSAA + a_.OpMAd( + sample_depth_stencil_dest, z_ddx_src, + dxbc::Src::LF(draw_util::kD3D10StandardSamplePositions4x[0][0] * + (1.0f / 16.0f)), + temp_z_src); + a_.OpMAd( + sample_depth_stencil_dest, z_ddy_src, + dxbc::Src::LF(draw_util::kD3D10StandardSamplePositions4x[0][1] * + (1.0f / 16.0f)), + sample_depth_stencil_src); + // Choose between the sample and the center depth depending on whether + // at least 2x MSAA is enabled and saturate. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + // temp.w if late = sample 0 depth + a_.OpMovC( + sample_depth_stencil_dest, + LoadSystemConstant(SystemConstants::Index::kSampleCountLog2, + offsetof(SystemConstants, sample_count_log2), + dxbc::Src::kYYYY), + sample_depth_stencil_src, temp_z_src, true); + break; + case 1: + // - 2x MSAA: Bottom sample -> bottom-right (3) with Direct3D 11's + // ForcedSampleCount 4. + // - 4x MSAA: Bottom-left Xenia sample -> Direct3D 11 sample 2. + // Check if 4x MSAA is used. + a_.OpIf(true, LoadSystemConstant( + SystemConstants::Index::kSampleCountLog2, + offsetof(SystemConstants, sample_count_log2), + dxbc::Src::kXXXX)); + // 4x MSAA. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + // temp.w if late = saturated sample 1 depth at 4x MSAA + a_.OpMAd( + sample_depth_stencil_dest, z_ddx_src, + dxbc::Src::LF(draw_util::kD3D10StandardSamplePositions4x[2][0] * + (1.0f / 16.0f)), + temp_z_src); + a_.OpMAd( + sample_depth_stencil_dest, z_ddy_src, + dxbc::Src::LF(draw_util::kD3D10StandardSamplePositions4x[2][1] * + (1.0f / 16.0f)), + sample_depth_stencil_src, true); + a_.OpElse(); + // 2x MSAA as ForcedSampleCount 4 on the host. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + // temp.w if late = saturated sample 1 depth at 2x MSAA + a_.OpMAd( + sample_depth_stencil_dest, z_ddx_src, + dxbc::Src::LF(draw_util::kD3D10StandardSamplePositions4x[3][0] * + (1.0f / 16.0f)), + temp_z_src); + a_.OpMAd( + sample_depth_stencil_dest, z_ddy_src, + dxbc::Src::LF(draw_util::kD3D10StandardSamplePositions4x[3][1] * + (1.0f / 16.0f)), + sample_depth_stencil_src, true); + a_.OpEndIf(); + break; + default: { + // Xenia samples 2 and 3 (top-right and bottom-right) -> Direct3D 11 + // samples 1 and 3. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + // temp.w if late = saturated sample 2 or 3 depth + const int8_t* sample_position = + draw_util::kD3D10StandardSamplePositions4x[i ^ + (((i & 1) ^ (i >> 1)) * + 0b11)]; + a_.OpMAd(sample_depth_stencil_dest, z_ddx_src, + dxbc::Src::LF(sample_position[0] * (1.0f / 16.0f)), + temp_z_src); + a_.OpMAd(sample_depth_stencil_dest, z_ddy_src, + dxbc::Src::LF(sample_position[1] * (1.0f / 16.0f)), + sample_depth_stencil_src, true); + } break; + } + // Convert the sample's depth to 24-bit, using sample_temp.x as a + // temporary. + // temp.x if early = ddx(z) + // temp.y if early = ddy(z) + // temp.z = biased depth in the center + // temp.w if late = sample's 24-bit Z + ROV_DepthTo24Bit(sample_depth_stencil_src.index_1d_.index_, + sample_depth_stencil_src.swizzle_ & 3, + sample_depth_stencil_src.index_1d_.index_, + sample_depth_stencil_src.swizzle_ & 3, sample_temp, 0); + } + + // Load the old depth/stencil value. + // sample_temp.x = old depth/stencil + if (uav_index_edram_ == kBindingIndexUnallocated) { + uav_index_edram_ = uav_count_++; + } + a_.OpLdUAVTyped( + sample_temp_x_dest, + dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY), 1, + dxbc::Src::U(uav_index_edram_, uint32_t(UAVRegister::kEdram), + dxbc::Src::kXXXX)); // Depth test. // Extract the old depth part to sample_depth_stencil. - // sample_temp.x = old depth - a_.OpUShR(sample_temp_x_dest, temp_w_src, dxbc::Src::LU(8)); + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + a_.OpUShR(sample_temp_y_dest, sample_temp_x_src, dxbc::Src::LU(8)); // Get the difference between the new and the old depth, > 0 - greater, // == 0 - equal, < 0 - less. - // sample_temp.x = old depth - // sample_temp.y = depth difference - a_.OpIAdd(sample_temp_y_dest, sample_depth_stencil_src, -sample_temp_x_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = depth difference + a_.OpIAdd(sample_temp_z_dest, sample_depth_stencil_src, -sample_temp_y_src); // Check if the depth is "less" or "greater or equal". - // sample_temp.x = old depth - // sample_temp.y = depth difference - // sample_temp.z = depth difference less than 0 - a_.OpILT(sample_temp_z_dest, sample_temp_y_src, dxbc::Src::LI(0)); + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = depth difference + // sample_temp.w = depth difference less than 0 + a_.OpILT(sample_temp_w_dest, sample_temp_z_src, dxbc::Src::LI(0)); // Choose the passed depth function bits for "less" or for "greater". - // sample_temp.x = old depth - // sample_temp.y = depth difference - // sample_temp.z = depth function passed bits for "less" or "greater" - a_.OpMovC(sample_temp_z_dest, sample_temp_z_src, + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = depth difference + // sample_temp.w = depth function passed bits for "less" or "greater" + a_.OpMovC(sample_temp_w_dest, sample_temp_w_src, dxbc::Src::LU(kSysFlag_ROVDepthPassIfLess), dxbc::Src::LU(kSysFlag_ROVDepthPassIfGreater)); // Do the "equal" testing. - // sample_temp.x = old depth - // sample_temp.y = depth function passed bits - // sample_temp.z = free - a_.OpMovC(sample_temp_y_dest, sample_temp_y_src, sample_temp_z_src, + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = depth function passed bits + // sample_temp.w = free + a_.OpMovC(sample_temp_z_dest, sample_temp_z_src, sample_temp_w_src, dxbc::Src::LU(kSysFlag_ROVDepthPassIfEqual)); // Mask the resulting bits with the ones that should pass. - // sample_temp.x = old depth - // sample_temp.y = masked depth function passed bits - // sample_temp.z = free - a_.OpAnd(sample_temp_y_dest, sample_temp_y_src, LoadFlagsSystemConstant()); + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = masked depth function passed bits + a_.OpAnd(sample_temp_z_dest, sample_temp_z_src, LoadFlagsSystemConstant()); // Check if depth test has passed. - // sample_temp.x = old depth - // sample_temp.y = free - a_.OpIf(true, sample_temp_y_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = free + a_.OpIf(true, sample_temp_z_src); { // Extract the depth write flag. - // sample_temp.x = old depth - // sample_temp.y = depth write mask - a_.OpAnd(sample_temp_y_dest, LoadFlagsSystemConstant(), + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth + // sample_temp.z = depth write mask + a_.OpAnd(sample_temp_z_dest, LoadFlagsSystemConstant(), dxbc::Src::LU(kSysFlag_ROVDepthWrite)); // If depth writing is disabled, don't change the depth. - // temp.x? = resulting sample depth after the depth test - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = old depth/stencil - // sample_temp.x = free + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center + // temp.w if late = resulting sample depth after the depth test + // sample_temp.x = old depth/stencil // sample_temp.y = free - a_.OpMovC(sample_depth_stencil_dest, sample_temp_y_src, - sample_depth_stencil_src, sample_temp_x_src); + // sample_temp.z = free + a_.OpMovC(sample_depth_stencil_dest, sample_temp_z_src, + sample_depth_stencil_src, sample_temp_y_src); } // Depth test has failed. a_.OpElse(); { // Exclude the bit from the covered sample mask. - // sample_temp.x = old depth + // sample_temp.x = old depth/stencil + // sample_temp.y = old depth a_.OpAnd(dxbc::Dest::R(system_temp_rov_params_, 0b0001), dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), dxbc::Src::LU(~uint32_t(1 << i))); @@ -735,22 +761,25 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { a_.OpEndIf(); // Create packed depth/stencil, with the stencil value unchanged at this // point. - // temp.x? = resulting sample depth, current resulting stencil - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = old depth/stencil + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center + // temp.w if late = resulting sample depth, current resulting stencil + // sample_temp.x = old depth/stencil a_.OpBFI(sample_depth_stencil_dest, dxbc::Src::LU(24), dxbc::Src::LU(8), - sample_depth_stencil_src, temp_w_src); + sample_depth_stencil_src, sample_temp_x_src); // Stencil test. // Extract the stencil test bit. - // sample_temp.x = stencil test enabled - a_.OpAnd(sample_temp_x_dest, LoadFlagsSystemConstant(), + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil test enabled + a_.OpAnd(sample_temp_y_dest, LoadFlagsSystemConstant(), dxbc::Src::LU(kSysFlag_ROVStencilTest)); // Check if stencil test is enabled. - // sample_temp.x = free - a_.OpIf(true, sample_temp_x_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = free + a_.OpIf(true, sample_temp_y_src); { // Check the current face to get the reference and apply the read mask. in_front_face_used_ = true; @@ -763,104 +792,118 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { a_.OpElse(); } dxbc::Src stencil_read_mask_src(LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, j ? offsetof(SystemConstants, edram_stencil_back_read_mask) : offsetof(SystemConstants, edram_stencil_front_read_mask), dxbc::Src::kXXXX)); // Read-mask the stencil reference. - // sample_temp.x = read-masked stencil reference + // sample_temp.x = old depth/stencil + // sample_temp.y = read-masked stencil reference a_.OpAnd( - sample_temp_x_dest, + sample_temp_y_dest, LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, j ? offsetof(SystemConstants, edram_stencil_back_reference) : offsetof(SystemConstants, edram_stencil_front_reference), dxbc::Src::kXXXX), stencil_read_mask_src); // Read-mask the old stencil value (also dropping the depth bits). - // sample_temp.x = read-masked stencil reference - // sample_temp.y = read-masked old stencil - a_.OpAnd(sample_temp_y_dest, temp_w_src, stencil_read_mask_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = read-masked stencil reference + // sample_temp.z = read-masked old stencil + a_.OpAnd(sample_temp_z_dest, sample_temp_x_src, stencil_read_mask_src); } // Close the face check. a_.OpEndIf(); // Get the difference between the stencil reference and the old stencil, // > 0 - greater, == 0 - equal, < 0 - less. - // sample_temp.x = stencil difference - // sample_temp.y = free - a_.OpIAdd(sample_temp_x_dest, sample_temp_x_src, -sample_temp_y_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil difference + // sample_temp.z = free + a_.OpIAdd(sample_temp_y_dest, sample_temp_y_src, -sample_temp_z_src); // Check if the stencil is "less" or "greater or equal". - // sample_temp.x = stencil difference - // sample_temp.y = stencil difference less than 0 - a_.OpILT(sample_temp_y_dest, sample_temp_x_src, dxbc::Src::LI(0)); + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil difference + // sample_temp.z = stencil difference less than 0 + a_.OpILT(sample_temp_z_dest, sample_temp_y_src, dxbc::Src::LI(0)); // Choose the passed depth function bits for "less" or for "greater". - // sample_temp.x = stencil difference - // sample_temp.y = stencil function passed bits for "less" or "greater" - a_.OpMovC(sample_temp_y_dest, sample_temp_y_src, + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil difference + // sample_temp.z = stencil function passed bits for "less" or "greater" + a_.OpMovC(sample_temp_z_dest, sample_temp_z_src, dxbc::Src::LU(uint32_t(xenos::CompareFunction::kLess)), dxbc::Src::LU(uint32_t(xenos::CompareFunction::kGreater))); // Do the "equal" testing. - // sample_temp.x = stencil function passed bits - // sample_temp.y = free - a_.OpMovC(sample_temp_x_dest, sample_temp_x_src, sample_temp_y_src, + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil function passed bits + // sample_temp.z = free + a_.OpMovC(sample_temp_y_dest, sample_temp_y_src, sample_temp_z_src, dxbc::Src::LU(uint32_t(xenos::CompareFunction::kEqual))); // Get the comparison function and the operations for the current face. - // sample_temp.x = stencil function passed bits - // sample_temp.y = stencil function and operations + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil function passed bits + // sample_temp.z = stencil function and operations in_front_face_used_ = true; a_.OpMovC( - sample_temp_y_dest, + sample_temp_z_dest, dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), dxbc::Src::kXXXX), LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, offsetof(SystemConstants, edram_stencil_front_func_ops), dxbc::Src::kXXXX), LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, offsetof(SystemConstants, edram_stencil_back_func_ops), dxbc::Src::kXXXX)); // Mask the resulting bits with the ones that should pass (the comparison // function is in the low 3 bits of the constant, and only ANDing 3-bit // values with it, so safe not to UBFE the function). - // sample_temp.x = stencil test result - // sample_temp.y = stencil function and operations - a_.OpAnd(sample_temp_x_dest, sample_temp_x_src, sample_temp_y_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil test result + // sample_temp.z = stencil function and operations + a_.OpAnd(sample_temp_y_dest, sample_temp_y_src, sample_temp_z_src); // Handle passing and failure of the stencil test, to choose the operation // and to discard the sample. - // sample_temp.x = free - // sample_temp.y = stencil function and operations - a_.OpIf(true, sample_temp_x_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = free + // sample_temp.z = stencil function and operations + a_.OpIf(true, sample_temp_y_src); { - // Check if depth test has passed for this sample to sample_temp.y (the - // sample will only be processed if it's covered, so the only thing that - // could unset the bit at this point that matters is the depth test). - // sample_temp.x = depth test result - // sample_temp.y = stencil function and operations - a_.OpAnd(sample_temp_x_dest, + // Check if depth test has passed for this sample (the sample will only + // be processed if it's covered, so the only thing that could unset the + // bit at this point that matters is the depth test). + // sample_temp.x = old depth/stencil + // sample_temp.y = depth test result + // sample_temp.z = stencil function and operations + a_.OpAnd(sample_temp_y_dest, dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), dxbc::Src::LU(1 << i)); // Choose the bit offset of the stencil operation. - // sample_temp.x = sample operation offset - // sample_temp.y = stencil function and operations - a_.OpMovC(sample_temp_x_dest, sample_temp_x_src, dxbc::Src::LU(6), + // sample_temp.x = old depth/stencil + // sample_temp.y = sample operation offset + // sample_temp.z = stencil function and operations + a_.OpMovC(sample_temp_y_dest, sample_temp_y_src, dxbc::Src::LU(6), dxbc::Src::LU(9)); // Extract the stencil operation. - // sample_temp.x = stencil operation - // sample_temp.y = free - a_.OpUBFE(sample_temp_x_dest, dxbc::Src::LU(3), sample_temp_x_src, - sample_temp_y_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil operation + // sample_temp.z = free + a_.OpUBFE(sample_temp_y_dest, dxbc::Src::LU(3), sample_temp_y_src, + sample_temp_z_src); } // Stencil test has failed. a_.OpElse(); { // Extract the stencil fail operation. - // sample_temp.x = stencil operation - // sample_temp.y = free - a_.OpUBFE(sample_temp_x_dest, dxbc::Src::LU(3), dxbc::Src::LU(3), - sample_temp_y_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil operation + // sample_temp.z = free + a_.OpUBFE(sample_temp_y_dest, dxbc::Src::LU(3), dxbc::Src::LU(3), + sample_temp_z_src); // Exclude the bit from the covered sample mask. - // sample_temp.x = stencil operation + // sample_temp.x = old depth/stencil + // sample_temp.y = stencil operation a_.OpAnd(dxbc::Dest::R(system_temp_rov_params_, 0b0001), dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), dxbc::Src::LU(~uint32_t(1 << i))); @@ -870,26 +913,27 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // Open the stencil operation switch for writing the new stencil (not // caring about bits 8:31). - // sample_temp.x = will contain unmasked new stencil in 0:7 and junk above - a_.OpSwitch(sample_temp_x_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = will contain unmasked new stencil in 0:7 and junk above + a_.OpSwitch(sample_temp_y_src); { // Zero. a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kZero))); - a_.OpMov(sample_temp_x_dest, dxbc::Src::LU(0)); + a_.OpMov(sample_temp_y_dest, dxbc::Src::LU(0)); a_.OpBreak(); // Replace. a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kReplace))); in_front_face_used_ = true; a_.OpMovC( - sample_temp_x_dest, + sample_temp_y_dest, dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), dxbc::Src::kXXXX), LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, offsetof(SystemConstants, edram_stencil_front_reference), dxbc::Src::kXXXX), LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, offsetof(SystemConstants, edram_stencil_back_reference), dxbc::Src::kXXXX)); a_.OpBreak(); @@ -897,11 +941,12 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kIncrementClamp))); { // Clear the upper bits for saturation. - a_.OpAnd(sample_temp_x_dest, temp_w_src, dxbc::Src::LU(UINT8_MAX)); + a_.OpAnd(sample_temp_y_dest, sample_temp_x_src, + dxbc::Src::LU(UINT8_MAX)); // Increment. - a_.OpIAdd(sample_temp_x_dest, sample_temp_x_src, dxbc::Src::LI(1)); + a_.OpIAdd(sample_temp_y_dest, sample_temp_y_src, dxbc::Src::LI(1)); // Clamp. - a_.OpIMin(sample_temp_x_dest, sample_temp_x_src, + a_.OpIMin(sample_temp_y_dest, sample_temp_y_src, dxbc::Src::LI(UINT8_MAX)); } a_.OpBreak(); @@ -909,126 +954,133 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kDecrementClamp))); { // Clear the upper bits for saturation. - a_.OpAnd(sample_temp_x_dest, temp_w_src, dxbc::Src::LU(UINT8_MAX)); + a_.OpAnd(sample_temp_y_dest, sample_temp_x_src, + dxbc::Src::LU(UINT8_MAX)); // Increment. - a_.OpIAdd(sample_temp_x_dest, sample_temp_x_src, dxbc::Src::LI(-1)); + a_.OpIAdd(sample_temp_y_dest, sample_temp_y_src, dxbc::Src::LI(-1)); // Clamp. - a_.OpIMax(sample_temp_x_dest, sample_temp_x_src, dxbc::Src::LI(0)); + a_.OpIMax(sample_temp_y_dest, sample_temp_y_src, dxbc::Src::LI(0)); } a_.OpBreak(); // Invert. a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kInvert))); - a_.OpNot(sample_temp_x_dest, temp_w_src); + a_.OpNot(sample_temp_y_dest, sample_temp_x_src); a_.OpBreak(); // Increment and wrap. a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kIncrementWrap))); - a_.OpIAdd(sample_temp_x_dest, temp_w_src, dxbc::Src::LI(1)); + a_.OpIAdd(sample_temp_y_dest, sample_temp_x_src, dxbc::Src::LI(1)); a_.OpBreak(); // Decrement and wrap. a_.OpCase(dxbc::Src::LU(uint32_t(xenos::StencilOp::kDecrementWrap))); - a_.OpIAdd(sample_temp_x_dest, temp_w_src, dxbc::Src::LI(-1)); + a_.OpIAdd(sample_temp_y_dest, sample_temp_x_src, dxbc::Src::LI(-1)); a_.OpBreak(); // Keep. a_.OpDefault(); - a_.OpMov(sample_temp_x_dest, temp_w_src); + a_.OpMov(sample_temp_y_dest, sample_temp_x_src); a_.OpBreak(); } // Close the new stencil switch. a_.OpEndSwitch(); // Select the stencil write mask for the face. - // sample_temp.x = unmasked new stencil in 0:7 and junk above - // sample_temp.y = stencil write mask + // sample_temp.x = old depth/stencil + // sample_temp.y = unmasked new stencil in 0:7 and junk above + // sample_temp.z = stencil write mask in_front_face_used_ = true; a_.OpMovC( - sample_temp_y_dest, + sample_temp_z_dest, dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), dxbc::Src::kXXXX), LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, offsetof(SystemConstants, edram_stencil_front_write_mask), dxbc::Src::kXXXX), LoadSystemConstant( - SystemConstantIndex::kEdramStencil, + SystemConstants::Index::kEdramStencil, offsetof(SystemConstants, edram_stencil_back_write_mask), dxbc::Src::kXXXX)); // Apply the write mask to the new stencil, also dropping the upper 24 // bits. - // sample_temp.x = masked new stencil - // sample_temp.y = stencil write mask - a_.OpAnd(sample_temp_x_dest, sample_temp_x_src, sample_temp_y_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = masked new stencil + // sample_temp.z = stencil write mask + a_.OpAnd(sample_temp_y_dest, sample_temp_y_src, sample_temp_z_src); // Invert the write mask for keeping the old stencil and the depth bits. - // sample_temp.x = masked new stencil - // sample_temp.y = inverted stencil write mask - a_.OpNot(sample_temp_y_dest, sample_temp_y_src); - // Remove the bits that will be replaced from the new combined - // depth/stencil. - // sample_temp.x = masked new stencil - // sample_temp.y = free + // sample_temp.x = old depth/stencil + // sample_temp.y = masked new stencil + // sample_temp.z = inverted stencil write mask + a_.OpNot(sample_temp_z_dest, sample_temp_z_src); + // Remove the bits that will be replaced from the combined depth/stencil + // before inserting their new values. + // sample_temp.x = old depth/stencil + // sample_temp.y = masked new stencil + // sample_temp.z = free + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center + // temp.w if late = resulting sample depth, inverse-write-masked old + // stencil a_.OpAnd(sample_depth_stencil_dest, sample_depth_stencil_src, - sample_temp_y_src); + sample_temp_z_src); // Merge the old and the new stencil. - // temp.x? = resulting sample depth/stencil - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = old depth/stencil - // sample_temp.x = free + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center + // temp.w if late = resulting sample depth/stencil + // sample_temp.x = old depth/stencil + // sample_temp.y = free a_.OpOr(sample_depth_stencil_dest, sample_depth_stencil_src, - sample_temp_x_src); + sample_temp_y_src); } // Close the stencil test check. a_.OpEndIf(); // Check if the depth/stencil has failed not to modify the depth if it has. - // sample_temp.x = whether depth/stencil has passed for this sample - a_.OpAnd(sample_temp_x_dest, + // sample_temp.x = old depth/stencil + // sample_temp.y = whether depth/stencil has passed for this sample + a_.OpAnd(sample_temp_y_dest, dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), dxbc::Src::LU(1 << i)); // If the depth/stencil test has failed, don't change the depth. - // sample_temp.x = free - a_.OpIf(false, sample_temp_x_src); + // sample_temp.x = old depth/stencil + // sample_temp.y = free + a_.OpIf(false, sample_temp_y_src); { // Copy the new stencil over the old depth. - // temp.x? = resulting sample depth/stencil - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = old depth/stencil + // temp.x if no oDepth and early = ddx(z) + // temp.y if no oDepth and early = ddy(z) + // temp.z if no oDepth = biased depth in the center + // temp.w if late = resulting sample depth/stencil a_.OpBFI(sample_depth_stencil_dest, dxbc::Src::LU(8), dxbc::Src::LU(0), - sample_depth_stencil_src, temp_w_src); + sample_depth_stencil_src, sample_temp_x_src); } // Close the depth/stencil passing check. a_.OpEndIf(); // Check if the new depth/stencil is different, and thus needs to be - // written, to temp.w. - // temp.x? = resulting sample depth/stencil - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = whether depth/stencil has been modified - a_.OpINE(temp_w_dest, sample_depth_stencil_src, temp_w_src); + // written. + // sample_temp.x = old depth/stencil + a_.OpINE(sample_temp_x_dest, sample_depth_stencil_src, sample_temp_x_src); if (depth_stencil_early && !current_shader().implicit_early_z_write_allowed()) { // Set the sample bit in bits 4:7 of system_temp_rov_params_.x - always // need to write late in this shader, as it may do something like // explicitly killing pixels. a_.OpBFI(dxbc::Dest::R(system_temp_rov_params_, 0b0001), dxbc::Src::LU(1), - dxbc::Src::LU(4 + i), temp_w_src, + dxbc::Src::LU(4 + i), sample_temp_x_src, dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX)); } else { // Check if need to write. - // temp.x? = resulting sample depth/stencil - // temp.y = polygon offset if not writing to oDepth - // temp.z = viewport maximum depth if not writing to oDepth - // temp.w = free - a_.OpIf(true, temp_w_src); + // sample_temp.x = free + a_.OpIf(true, sample_temp_x_src); { if (depth_stencil_early) { - // Get if early depth/stencil write is enabled to temp.w. - // temp.w = whether early depth/stencil write is enabled - a_.OpAnd(temp_w_dest, LoadFlagsSystemConstant(), + // Get if early depth/stencil write is enabled. + // sample_temp.x = whether early depth/stencil write is enabled + a_.OpAnd(sample_temp_x_dest, LoadFlagsSystemConstant(), dxbc::Src::LU(kSysFlag_ROVDepthStencilEarlyWrite)); // Check if need to write early. - // temp.w = free - a_.OpIf(true, temp_w_src); + // sample_temp.x = free + a_.OpIf(true, sample_temp_x_src); } // Write the new depth/stencil. if (uav_index_edram_ == kBindingIndexUnallocated) { @@ -1138,7 +1190,7 @@ void DxbcShaderTranslator::ROV_UnpackColor( // Choose the packing based on the render target's format. a_.OpSwitch( - LoadSystemConstant(SystemConstantIndex::kEdramRTFormatFlags, + LoadSystemConstant(SystemConstants::Index::kEdramRTFormatFlags, offsetof(SystemConstants, edram_rt_format_flags) + sizeof(uint32_t) * rt_index, dxbc::Src::kXXXX)); @@ -1299,7 +1351,7 @@ void DxbcShaderTranslator::ROV_PackPreClampedColor( // Choose the packing based on the render target's format. a_.OpSwitch( - LoadSystemConstant(SystemConstantIndex::kEdramRTFormatFlags, + LoadSystemConstant(SystemConstants::Index::kEdramRTFormatFlags, offsetof(SystemConstants, edram_rt_format_flags) + sizeof(uint32_t) * rt_index, dxbc::Src::kXXXX)); @@ -1515,7 +1567,7 @@ void DxbcShaderTranslator::ROV_HandleColorBlendFactorCases( // kConstantColor a_.OpCase(dxbc::Src::LU(uint32_t(xenos::BlendFactor::kConstantColor))); a_.OpMov(factor_dest, - LoadSystemConstant(SystemConstantIndex::kEdramBlendConstant, + LoadSystemConstant(SystemConstants::Index::kEdramBlendConstant, offsetof(SystemConstants, edram_blend_constant), dxbc::Src::kXYZW)); a_.OpBreak(); @@ -1524,7 +1576,7 @@ void DxbcShaderTranslator::ROV_HandleColorBlendFactorCases( a_.OpCase( dxbc::Src::LU(uint32_t(xenos::BlendFactor::kOneMinusConstantColor))); a_.OpAdd(factor_dest, one_src, - -LoadSystemConstant(SystemConstantIndex::kEdramBlendConstant, + -LoadSystemConstant(SystemConstants::Index::kEdramBlendConstant, offsetof(SystemConstants, edram_blend_constant), dxbc::Src::kXYZW)); a_.OpBreak(); @@ -1532,7 +1584,7 @@ void DxbcShaderTranslator::ROV_HandleColorBlendFactorCases( // kConstantAlpha a_.OpCase(dxbc::Src::LU(uint32_t(xenos::BlendFactor::kConstantAlpha))); a_.OpMov(factor_dest, - LoadSystemConstant(SystemConstantIndex::kEdramBlendConstant, + LoadSystemConstant(SystemConstants::Index::kEdramBlendConstant, offsetof(SystemConstants, edram_blend_constant), dxbc::Src::kWWWW)); a_.OpBreak(); @@ -1541,7 +1593,7 @@ void DxbcShaderTranslator::ROV_HandleColorBlendFactorCases( a_.OpCase( dxbc::Src::LU(uint32_t(xenos::BlendFactor::kOneMinusConstantAlpha))); a_.OpAdd(factor_dest, one_src, - -LoadSystemConstant(SystemConstantIndex::kEdramBlendConstant, + -LoadSystemConstant(SystemConstants::Index::kEdramBlendConstant, offsetof(SystemConstants, edram_blend_constant), dxbc::Src::kWWWW)); a_.OpBreak(); @@ -1606,7 +1658,7 @@ void DxbcShaderTranslator::ROV_HandleAlphaBlendFactorCases( a_.OpCase(dxbc::Src::LU(uint32_t(xenos::BlendFactor::kConstantColor))); a_.OpCase(dxbc::Src::LU(uint32_t(xenos::BlendFactor::kConstantAlpha))); a_.OpMov(factor_dest, - LoadSystemConstant(SystemConstantIndex::kEdramBlendConstant, + LoadSystemConstant(SystemConstants::Index::kEdramBlendConstant, offsetof(SystemConstants, edram_blend_constant), dxbc::Src::kWWWW)); a_.OpBreak(); @@ -1617,7 +1669,7 @@ void DxbcShaderTranslator::ROV_HandleAlphaBlendFactorCases( a_.OpCase( dxbc::Src::LU(uint32_t(xenos::BlendFactor::kOneMinusConstantAlpha))); a_.OpAdd(factor_dest, one_src, - -LoadSystemConstant(SystemConstantIndex::kEdramBlendConstant, + -LoadSystemConstant(SystemConstants::Index::kEdramBlendConstant, offsetof(SystemConstants, edram_blend_constant), dxbc::Src::kWWWW)); a_.OpBreak(); @@ -1644,10 +1696,10 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToRTVs() { // unbiased alpha from the shader a_.OpMul(dxbc::Dest::R(system_temps_color_[i]), dxbc::Src::R(system_temps_color_[i]), - LoadSystemConstant(SystemConstantIndex::kColorExpBias, - offsetof(SystemConstants, color_exp_bias) + - sizeof(uint32_t) * i, - dxbc::Src::kXXXX)); + LoadSystemConstant( + SystemConstants::Index::kColorExpBias, + offsetof(SystemConstants, color_exp_bias) + sizeof(float) * i, + dxbc::Src::kXXXX)); if (!gamma_render_target_as_srgb_) { // Convert to gamma space - this is incorrect, since it must be done after // blending on the Xbox 360, but this is just one of many blending issues @@ -1776,9 +1828,10 @@ void DxbcShaderTranslator::CompletePixelShader_DSV_DepthTo24Bit() { } void DxbcShaderTranslator::CompletePixelShader_AlphaToMaskSample( - uint32_t sample_index, float threshold_base, dxbc::Src threshold_offset, - float threshold_offset_scale, uint32_t coverage_temp, - uint32_t coverage_temp_component, uint32_t temp, uint32_t temp_component) { + bool initialize, uint32_t sample_index, float threshold_base, + dxbc::Src threshold_offset, float threshold_offset_scale, + uint32_t coverage_temp, uint32_t coverage_temp_component, uint32_t temp, + uint32_t temp_component) { dxbc::Dest temp_dest(dxbc::Dest::R(temp, 1 << temp_component)); dxbc::Src temp_src(dxbc::Src::R(temp).Select(temp_component)); // Calculate the threshold. @@ -1806,16 +1859,16 @@ void DxbcShaderTranslator::CompletePixelShader_AlphaToMaskSample( // Clear the coverage for samples that have failed the test. a_.OpAnd(coverage_dest, coverage_src, temp_src); } else { - if (sample_index) { - // Not first sample - add. - a_.OpAnd(temp_dest, temp_src, dxbc::Src::LU(uint32_t(1) << sample_index)); - a_.OpOr(coverage_dest, coverage_src, temp_src); - } else { - // First sample - initialize. + if (initialize) { + // First sample tested - initialize. assert_true(coverage_temp != temp || coverage_temp_component != temp_component); a_.OpAnd(coverage_dest, temp_src, dxbc::Src::LU(uint32_t(1) << sample_index)); + } else { + // Not first sample tested - add. + a_.OpAnd(temp_dest, temp_src, dxbc::Src::LU(uint32_t(1) << sample_index)); + a_.OpOr(coverage_dest, coverage_src, temp_src); } } } @@ -1834,7 +1887,7 @@ void DxbcShaderTranslator::CompletePixelShader_AlphaToMask() { // Check if alpha to coverage is enabled. dxbc::Src alpha_to_mask_constant_src(LoadSystemConstant( - SystemConstantIndex::kAlphaToMask, + SystemConstants::Index::kAlphaToMask, offsetof(SystemConstants, alpha_to_mask), dxbc::Src::kXXXX)); a_.OpIf(true, alpha_to_mask_constant_src); @@ -1866,44 +1919,50 @@ void DxbcShaderTranslator::CompletePixelShader_AlphaToMask() { uint32_t coverage_temp_component = edram_rov_used_ ? 0 : 2; // Check if MSAA is enabled. - a_.OpIf(true, LoadSystemConstant(SystemConstantIndex::kSampleCountLog2, + a_.OpIf(true, LoadSystemConstant(SystemConstants::Index::kSampleCountLog2, offsetof(SystemConstants, sample_count_log2), dxbc::Src::kYYYY)); { // Check if MSAA is 4x or 2x. a_.OpIf(true, - LoadSystemConstant(SystemConstantIndex::kSampleCountLog2, + LoadSystemConstant(SystemConstants::Index::kSampleCountLog2, offsetof(SystemConstants, sample_count_log2), dxbc::Src::kXXXX)); // 4x MSAA. // Sample 0 must be checked first - CompletePixelShader_AlphaToMaskSample // initializes the result for sample index 0. - CompletePixelShader_AlphaToMaskSample(0, 0.75f, temp_x_src, 1.0f / 16.0f, - coverage_temp, + CompletePixelShader_AlphaToMaskSample(true, 0, 0.75f, temp_x_src, + 1.0f / 16.0f, coverage_temp, coverage_temp_component, temp, 1); - CompletePixelShader_AlphaToMaskSample(1, 0.25f, temp_x_src, 1.0f / 16.0f, - coverage_temp, + CompletePixelShader_AlphaToMaskSample(false, 1, 0.25f, temp_x_src, + 1.0f / 16.0f, coverage_temp, coverage_temp_component, temp, 1); - CompletePixelShader_AlphaToMaskSample(2, 0.5f, temp_x_src, 1.0f / 16.0f, - coverage_temp, + CompletePixelShader_AlphaToMaskSample(false, 2, 0.5f, temp_x_src, + 1.0f / 16.0f, coverage_temp, coverage_temp_component, temp, 1); - CompletePixelShader_AlphaToMaskSample(3, 1.0f, temp_x_src, 1.0f / 16.0f, - coverage_temp, + CompletePixelShader_AlphaToMaskSample(false, 3, 1.0f, temp_x_src, + 1.0f / 16.0f, coverage_temp, coverage_temp_component, temp, 1); - // 2x MSAA (as 2x or samples 0 and 3 of 4x). + // 2x MSAA. + // With ROV, using guest sample indices. + // Without ROV: + // - Native 2x: top (0 in Xenia) is 1 in D3D10.1+, bottom (1 in Xenia) is 0. + // - 2x as 4x: top is 0, bottom is 3. a_.OpElse(); - CompletePixelShader_AlphaToMaskSample(0, 0.5f, temp_x_src, 1.0f / 8.0f, - coverage_temp, - coverage_temp_component, temp, 1); CompletePixelShader_AlphaToMaskSample( - (!edram_rov_used_ && !msaa_2x_supported_) ? 3 : 1, 1.0f, temp_x_src, - 1.0f / 8.0f, coverage_temp, coverage_temp_component, temp, 1); + true, (!edram_rov_used_ && msaa_2x_supported_) ? 1 : 0, 0.5f, + temp_x_src, 1.0f / 8.0f, coverage_temp, coverage_temp_component, temp, + 1); + CompletePixelShader_AlphaToMaskSample( + false, edram_rov_used_ ? 1 : (msaa_2x_supported_ ? 0 : 3), 1.0f, + temp_x_src, 1.0f / 8.0f, coverage_temp, coverage_temp_component, temp, + 1); // Close the 4x check. a_.OpEndIf(); } // MSAA is disabled. a_.OpElse(); - CompletePixelShader_AlphaToMaskSample(0, 1.0f, temp_x_src, 1.0f / 4.0f, + CompletePixelShader_AlphaToMaskSample(true, 0, 1.0f, temp_x_src, 1.0f / 4.0f, coverage_temp, coverage_temp_component, temp, 1); // Close the 2x/4x check. @@ -2010,7 +2069,7 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { // This includes a swizzle to choose XY for even render targets or ZW for // odd ones - use SelectFromSwizzled and SwizzleSwizzled. dxbc::Src keep_mask_src( - LoadSystemConstant(SystemConstantIndex::kEdramRTKeepMask, + LoadSystemConstant(SystemConstants::Index::kEdramRTKeepMask, offsetof(SystemConstants, edram_rt_keep_mask) + sizeof(uint32_t) * 2 * i, 0b0100)); @@ -2044,31 +2103,31 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { // unbiased alpha from the shader. a_.OpMul(dxbc::Dest::R(system_temps_color_[i]), dxbc::Src::R(system_temps_color_[i]), - LoadSystemConstant(SystemConstantIndex::kColorExpBias, - offsetof(SystemConstants, color_exp_bias) + - sizeof(uint32_t) * i, - dxbc::Src::kXXXX)); + LoadSystemConstant( + SystemConstants::Index::kColorExpBias, + offsetof(SystemConstants, color_exp_bias) + sizeof(float) * i, + dxbc::Src::kXXXX)); // Add the EDRAM bases of the render target to system_temp_rov_params_.zw. a_.OpIAdd(dxbc::Dest::R(system_temp_rov_params_, 0b1100), dxbc::Src::R(system_temp_rov_params_), LoadSystemConstant( - SystemConstantIndex::kEdramRTBaseDwordsScaled, + SystemConstants::Index::kEdramRTBaseDwordsScaled, offsetof(SystemConstants, edram_rt_base_dwords_scaled) + sizeof(uint32_t) * i, dxbc::Src::kXXXX)); dxbc::Src rt_blend_factors_ops_src(LoadSystemConstant( - SystemConstantIndex::kEdramRTBlendFactorsOps, + SystemConstants::Index::kEdramRTBlendFactorsOps, offsetof(SystemConstants, edram_rt_blend_factors_ops) + sizeof(uint32_t) * i, dxbc::Src::kXXXX)); dxbc::Src rt_clamp_vec_src(LoadSystemConstant( - SystemConstantIndex::kEdramRTClamp, - offsetof(SystemConstants, edram_rt_clamp) + sizeof(uint32_t) * 4 * i, + SystemConstants::Index::kEdramRTClamp, + offsetof(SystemConstants, edram_rt_clamp) + sizeof(float) * 4 * i, dxbc::Src::kXYZW)); dxbc::Src rt_format_flags_src(LoadSystemConstant( - SystemConstantIndex::kEdramRTFormatFlags, + SystemConstants::Index::kEdramRTFormatFlags, offsetof(SystemConstants, edram_rt_format_flags) + sizeof(uint32_t) * i, dxbc::Src::kXXXX)); // Get if not blending to pack the color once for all 4 samples. @@ -2800,7 +2859,7 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { a_.OpIAdd(dxbc::Dest::R(system_temp_rov_params_, 0b1100), dxbc::Src::R(system_temp_rov_params_), -LoadSystemConstant( - SystemConstantIndex::kEdramRTBaseDwordsScaled, + SystemConstants::Index::kEdramRTBaseDwordsScaled, offsetof(SystemConstants, edram_rt_base_dwords_scaled) + sizeof(uint32_t) * i, dxbc::Src::kXXXX)); @@ -2853,7 +2912,7 @@ void DxbcShaderTranslator::CompletePixelShader() { dxbc::Src alpha_src( dxbc::Src::R(system_temps_color_[0], dxbc::Src::kWWWW)); dxbc::Src alpha_test_reference_src(LoadSystemConstant( - SystemConstantIndex::kAlphaTestReference, + SystemConstants::Index::kAlphaTestReference, offsetof(SystemConstants, alpha_test_reference), dxbc::Src::kXXXX)); // Less than. a_.OpLT(alpha_test_op_dest, alpha_src, alpha_test_reference_src); diff --git a/src/xenia/gpu/primitive_processor.cc b/src/xenia/gpu/primitive_processor.cc new file mode 100644 index 000000000..b00e4ce50 --- /dev/null +++ b/src/xenia/gpu/primitive_processor.cc @@ -0,0 +1,1530 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/gpu/primitive_processor.h" + +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/base/byte_order.h" +#include "xenia/base/cvar.h" +#include "xenia/base/logging.h" +#include "xenia/base/math.h" +#include "xenia/base/profiling.h" +#include "xenia/gpu/register_file.h" +#include "xenia/gpu/registers.h" +#include "xenia/gpu/shader.h" +#include "xenia/gpu/trace_writer.h" +#include "xenia/gpu/xenos.h" + +// All these overrides are always safe to use as all backends are expected to +// support triangle lists and line strips. +DEFINE_bool( + force_convert_triangle_fans_to_lists, false, + "For host graphics API downlevel support testing only, force CPU " + "conversion of triangle fans to triangle lists even if the host supports " + "triangle fan primitives natively.", + "GPU"); +DEFINE_bool( + force_convert_line_loops_to_strips, false, + "For host graphics API downlevel support testing only, force CPU " + "conversion of line loops to line strips even if the host supports line " + "loop primitives natively.", + "GPU"); +DEFINE_bool( + force_convert_quad_lists_to_triangle_lists, false, + "For host graphics API downlevel support testing only, force CPU " + "conversion of quad lists to quad strips even if the host supports quad " + "list primitives natively or via geometry shader emulation.\n" + "May also be useful for graphics debugging when the debugger doesn't " + "display the geometry generated by geometry shaders properly.", + "GPU"); +DEFINE_bool( + ignore_32bit_vertex_index_support, false, + "For host graphics API downlevel testing only (useful only for Qualcomm " + "Adreno 4xx-level host GPU testing), force indirection or pre-masking and " + "pre-swapping of 32-bit vertex indices as if the host only supports 24-bit " + "indices.", + "GPU"); +// TODO(Triang3l): More investigation of the cache threshold as cache lookups +// and insertions require global critical region locking, and insertions also +// require protecting pages. At 1024, the cache only made the performance worse +// (Tony Hawk's American Wasteland, 16-bit primitive reset index replacement). +DEFINE_int32( + primitive_processor_cache_min_indices, 4096, + "Smallest number of guest indices to store in the cache to try reusing " + "later in the same frame if processing (such as primitive type conversion " + "or reset index replacement) is performed.\n" + "Setting this to a very high value may result in excessive CPU processing, " + "while a very low value may result in excessive locking and lookups.\n" + "Negative values disable caching.", + "GPU"); + +namespace xe { +namespace gpu { + +// SIMD processing here assumes that alignment is not required (neither AVX nor +// Neon requires it) and there's no punishment for using an unaligned access +// instruction when the data is actually aligned (AVX has separate aligned / +// unaligned movs, but they have the same performance nowadays; Neon dropped the +// alignment specifier in AArch64), but truly unaligned access may result in two +// hardware memory operations if some boundary that is >= vector size is +// crossed. +// +// Therefore, to minimize unaligned access (primarily reads - since we depend on +// the data immediately), SIMD usage here is performed according to the +// following pattern (though we try to co-align the destination and the source +// prior to calling, but still doing all the operations for more code +// correctness and fewer unobvious conditions): +// - Until the source pointer is vector-aligned, process the first indices +// without SIMD. +// - The best possible outcome of this is that both the source and the +// destination will be vector-aligned (if they were co-aligned prior to the +// call), in this case, neither load nor store instructions will be crossing +// cache lines. +// - The other possible outcome is that the source will be aligned (1 memory +// read per load), while the destination will be unaligned (1-2 memory +// writes per store). +// - Process whole vectors with SIMD. +// - If there are less elements than a vector can hold remaining, process them +// without SIMD. +// +// We assume that indices are at least aligned to their natural alignment (2 or +// 4 bytes depending on the format) - the R6xx documentation says that in +// DRAW_INDEX, INDEX_BASE_LO is word-aligned, and that's required by host +// graphics APIs. + +PrimitiveProcessor::~PrimitiveProcessor() { ShutdownCommon(); } + +bool PrimitiveProcessor::InitializeCommon( + bool full_32bit_vertex_indices_supported, bool triangle_fans_supported, + bool line_loops_supported, bool quad_lists_supported) { + full_32bit_vertex_indices_used_ = full_32bit_vertex_indices_supported; + convert_triangle_fans_to_lists_ = + !triangle_fans_supported || cvars::force_convert_triangle_fans_to_lists; + convert_line_loops_to_strips_ = + !line_loops_supported || cvars::force_convert_line_loops_to_strips; + convert_quad_lists_to_triangle_lists_ = + !quad_lists_supported || + cvars::force_convert_quad_lists_to_triangle_lists; + + // Initialize the index buffer for conversion of auto-indexed primitive types. + uint32_t builtin_index_count = 0; + if (convert_triangle_fans_to_lists_) { + builtin_ib_offset_triangle_fans_to_lists_ = + sizeof(uint16_t) * builtin_index_count; + builtin_index_count += GetTriangleFanListIndexCount(UINT16_MAX); + } else { + builtin_ib_offset_triangle_fans_to_lists_ = SIZE_MAX; + } + if (convert_quad_lists_to_triangle_lists_) { + builtin_ib_offset_quad_lists_to_triangle_lists_ = + sizeof(uint16_t) * builtin_index_count; + builtin_index_count += GetQuadListTriangleListIndexCount(UINT16_MAX); + } else { + builtin_ib_offset_quad_lists_to_triangle_lists_ = SIZE_MAX; + } + if (builtin_index_count) { + if (!InitializeBuiltin16BitIndexBuffer( + builtin_index_count, [this](uint16_t* mapping) { + if (builtin_ib_offset_triangle_fans_to_lists_ != SIZE_MAX) { + // Triangle fans as triangle lists. + // Ordered as (v1, v2, v0), (v2, v3, v0) in Direct3D. + // https://docs.microsoft.com/en-us/windows/desktop/direct3d9/triangle-fans + uint16_t* triangle_list_ptr = + mapping + builtin_ib_offset_triangle_fans_to_lists_ / + sizeof(uint16_t); + for (uint32_t i = 2; i < UINT16_MAX; ++i) { + *(triangle_list_ptr++) = uint16_t(i - 1); + *(triangle_list_ptr++) = uint16_t(i); + *(triangle_list_ptr++) = 0; + } + } + if (builtin_ib_offset_quad_lists_to_triangle_lists_ != SIZE_MAX) { + uint16_t* triangle_list_ptr = + mapping + builtin_ib_offset_quad_lists_to_triangle_lists_ / + sizeof(uint16_t); + // TODO(Triang3l): SIMD for faster initialization? + for (uint32_t i = 0; i < UINT16_MAX / 4; ++i) { + uint16_t quad_first_index = uint16_t(i * 4); + // TODO(Triang3l): Find the correct order. + // v0, v1, v2. + *(triangle_list_ptr++) = quad_first_index; + *(triangle_list_ptr++) = quad_first_index + 1; + *(triangle_list_ptr++) = quad_first_index + 2; + // v0, v2, v3. + *(triangle_list_ptr++) = quad_first_index; + *(triangle_list_ptr++) = quad_first_index + 2; + *(triangle_list_ptr++) = quad_first_index + 3; + } + } + })) { + ShutdownCommon(); + return false; + } + } + + return true; +} + +void PrimitiveProcessor::ShutdownCommon() { + if (memory_invalidation_callback_handle_) { + // Clear the cache if it has ever been used and unregister the invalidation + // callback. + { + auto global_lock = global_critical_region_.Acquire(); + cache_map_.clear(); + cache_bucket_free_first_entry_ = SIZE_MAX; + std::memset(cache_buckets_non_empty_l1_, 0, + sizeof(cache_buckets_non_empty_l1_)); + std::memset(cache_buckets_non_empty_l2_, 0, + sizeof(cache_buckets_non_empty_l2_)); + } + memory_.UnregisterPhysicalMemoryInvalidationCallback( + memory_invalidation_callback_handle_); + memory_invalidation_callback_handle_ = nullptr; + cache_entry_pool_.clear(); + } +} + +void PrimitiveProcessor::ClearPerFrameCache() { + if (!memory_invalidation_callback_handle_) { + // Only do clearing if cache has ever been used. + return; + } + auto global_lock = global_critical_region_.Acquire(); + for (const std::pair& cache_map_entry : cache_map_) { + cache_entry_pool_[cache_map_entry.second].free_next = + cache_bucket_free_first_entry_; + cache_bucket_free_first_entry_ = cache_map_entry.second; + } + cache_map_.clear(); + std::memset(cache_buckets_non_empty_l1_, 0, + sizeof(cache_buckets_non_empty_l1_)); + std::memset(cache_buckets_non_empty_l2_, 0, + sizeof(cache_buckets_non_empty_l2_)); +} + +bool PrimitiveProcessor::Process(ProcessingResult& result_out) { + SCOPE_profile_cpu_f("gpu"); + + const RegisterFile& regs = register_file_; + auto vgt_draw_initiator = regs.Get(); + + // Parse the primitive type and the tessellation state (VGT_OUTPUT_PATH_CNTL + // is only used in the explicit major mode) - there are cases in games when + // this register is left over after usage of tessellation in draws that don't + // need it. + xenos::PrimitiveType guest_primitive_type = vgt_draw_initiator.prim_type; + xenos::PrimitiveType host_primitive_type = guest_primitive_type; + bool tessellation_enabled = + xenos::IsMajorModeExplicit(vgt_draw_initiator.major_mode, + vgt_draw_initiator.prim_type) && + regs.Get().path_select == + xenos::VGTOutputPath::kTessellationEnable; + xenos::TessellationMode tessellation_mode = + regs.Get().tess_mode; + Shader::HostVertexShaderType host_vertex_shader_type; + if (tessellation_enabled) { + // Currently only supporting tessellation in known cases for safety, and not + // yet converting patch strips / fans to patch lists until games using them + // are found for easier debugging when it actually happens. + // TODO(Triang3l): Conversion of patch strips / fans if found. + host_vertex_shader_type = Shader::HostVertexShaderType(-1); + switch (guest_primitive_type) { + case xenos::PrimitiveType::kTriangleList: + // Also supported by triangle strips and fans according to: + // https://www.khronos.org/registry/OpenGL/extensions/AMD/AMD_vertex_shader_tessellator.txt + // Would need to convert those to triangle lists, but haven't seen any + // games using tessellated strips / fans so far. + switch (tessellation_mode) { + case xenos::TessellationMode::kDiscrete: + // - Call of Duty 3 - nets above barrels in the beginning of the + // first mission (turn right after the end of the intro) - + // kTriangleList. + host_vertex_shader_type = + Shader::HostVertexShaderType::kTriangleDomainCPIndexed; + break; + case xenos::TessellationMode::kContinuous: + // - Viva Pinata - tree building with a beehive in the beginning + // (visible on the start screen behind the logo), waterfall in the + // beginning - kTriangleList. + host_vertex_shader_type = + Shader::HostVertexShaderType::kTriangleDomainCPIndexed; + break; + default: + break; + } + break; + case xenos::PrimitiveType::kQuadList: + switch (tessellation_mode) { + // Also supported by quad strips according to: + // https://www.khronos.org/registry/OpenGL/extensions/AMD/AMD_vertex_shader_tessellator.txt + // Would need to convert those to quad lists, but haven't seen any + // games using tessellated strips so far. + case xenos::TessellationMode::kDiscrete: + // Not seen in games so far. + host_vertex_shader_type = + Shader::HostVertexShaderType::kQuadDomainCPIndexed; + break; + case xenos::TessellationMode::kContinuous: + // - Defender - retro screen and beams in the main menu - kQuadList. + host_vertex_shader_type = + Shader::HostVertexShaderType::kQuadDomainCPIndexed; + break; + default: + break; + } + break; + case xenos::PrimitiveType::kTrianglePatch: + // - Banjo-Kazooie: Nuts & Bolts - water - adaptive. + // - Halo 3 - water - adaptive. + host_vertex_shader_type = + Shader::HostVertexShaderType::kTriangleDomainPatchIndexed; + break; + case xenos::PrimitiveType::kQuadPatch: + // - Fable II - continuous. + // - Viva Pinata - garden ground - adaptive. + host_vertex_shader_type = + Shader::HostVertexShaderType::kQuadDomainPatchIndexed; + break; + default: + // TODO(Triang3l): Support line patches. + break; + } + if (host_vertex_shader_type == Shader::HostVertexShaderType(-1)) { + XELOGE( + "Primitive processor: Unsupported tessellation mode {} for primitive " + "type {}. Report the game to Xenia developers!", + uint32_t(tessellation_mode), uint32_t(guest_primitive_type)); + assert_always(); + return false; + } + } else { + switch (guest_primitive_type) { + case xenos::PrimitiveType::kPointList: + case xenos::PrimitiveType::kLineList: + case xenos::PrimitiveType::kLineStrip: + case xenos::PrimitiveType::kTriangleList: + case xenos::PrimitiveType::kTriangleStrip: + case xenos::PrimitiveType::kRectangleList: + // Supported natively or through geometry or compute shaders on all + // backends. + break; + case xenos::PrimitiveType::kTriangleFan: + if (convert_triangle_fans_to_lists_) { + host_primitive_type = xenos::PrimitiveType::kTriangleList; + } + break; + case xenos::PrimitiveType::kLineLoop: + if (convert_line_loops_to_strips_) { + host_primitive_type = xenos::PrimitiveType::kLineStrip; + } + break; + case xenos::PrimitiveType::kQuadList: + if (convert_quad_lists_to_triangle_lists_) { + host_primitive_type = xenos::PrimitiveType::kQuadList; + } + break; + default: + XELOGE( + "Primitive processor: Unsupported primitive type {}. Report the " + "game to Xenia developers!", + uint32_t(guest_primitive_type)); + assert_always(); + return false; + } + host_vertex_shader_type = Shader::HostVertexShaderType::kVertex; + } + + // Process the indices. + uint32_t guest_draw_vertex_count = vgt_draw_initiator.num_indices; + uint32_t line_loop_closing_index = 0; + uint32_t guest_index_base; + CachedResult cacheable; + cacheable.host_draw_vertex_count = guest_draw_vertex_count; + cacheable.host_primitive_reset_enabled = false; + cacheable.host_index_buffer_handle = SIZE_MAX; + if (vgt_draw_initiator.source_select == xenos::SourceSelect::kAutoIndex) { + // Auto-indexed - use a remapping index buffer if needed to change the + // primitive type. + if (tessellation_enabled && + tessellation_mode == xenos::TessellationMode::kAdaptive) { + XELOGE( + "Primitive processor: Adaptive tessellation requires 32-bit " + "floating-point edge tessellation factors in the index buffer, but " + "no index buffer is provided by the guest."); + assert_always(); + return false; + } + guest_index_base = 0; + cacheable.host_index_format = xenos::IndexFormat::kInt16; + cacheable.host_index_endian = xenos::Endian::kNone; + cacheable.host_primitive_reset_enabled = false; + cacheable.index_buffer_type = ProcessedIndexBufferType::kNone; + if (host_primitive_type != guest_primitive_type) { + switch (guest_primitive_type) { + case xenos::PrimitiveType::kTriangleFan: + assert_true(host_primitive_type == + xenos::PrimitiveType::kTriangleList); + cacheable.host_draw_vertex_count = + GetTriangleFanListIndexCount(cacheable.host_draw_vertex_count); + cacheable.index_buffer_type = ProcessedIndexBufferType::kHostBuiltin; + assert_true(builtin_ib_offset_triangle_fans_to_lists_ != SIZE_MAX); + cacheable.host_index_buffer_handle = + builtin_ib_offset_triangle_fans_to_lists_; + break; + case xenos::PrimitiveType::kLineLoop: + // Plus 1 element (if there's anything to draw) in the strip, still + // auto-indexed, but the added excess index should be treated as 0 by + // the vertex shaders. + assert_true(host_primitive_type == xenos::PrimitiveType::kLineStrip); + cacheable.host_draw_vertex_count = + GetLineLoopStripIndexCount(cacheable.host_draw_vertex_count); + if (cacheable.host_draw_vertex_count) { + line_loop_closing_index = cacheable.host_draw_vertex_count - 1; + } + break; + case xenos::PrimitiveType::kQuadList: + assert_true(host_primitive_type == + xenos::PrimitiveType::kTriangleList); + cacheable.host_draw_vertex_count = GetQuadListTriangleListIndexCount( + cacheable.host_draw_vertex_count); + cacheable.index_buffer_type = ProcessedIndexBufferType::kHostBuiltin; + assert_true(builtin_ib_offset_quad_lists_to_triangle_lists_ != + SIZE_MAX); + cacheable.host_index_buffer_handle = + builtin_ib_offset_quad_lists_to_triangle_lists_; + break; + default: + assert_always(); + return false; + } + } + } else { + // There is an index buffer. + assert_true(vgt_draw_initiator.source_select == xenos::SourceSelect::kDMA); + if (vgt_draw_initiator.source_select != xenos::SourceSelect::kDMA) { + // TODO(Triang3l): Support immediate-indexed vertices. + XELOGE( + "Primitive processor: Unsupported vertex index source {}. Report the " + "game to Xenia developers!", + uint32_t(vgt_draw_initiator.source_select)); + return false; + } + + auto vgt_dma_size = regs.Get(); + + xenos::IndexFormat guest_index_format = vgt_draw_initiator.index_size; + cacheable.host_index_format = guest_index_format; + // Normalize the endian and the reset index. + xenos::Endian guest_index_endian = vgt_dma_size.swap_mode; + if (guest_index_format == xenos::IndexFormat::kInt16 && + (guest_index_endian != xenos::Endian::kNone && + guest_index_endian != xenos::Endian::k8in16)) { + XELOGW( + "Primitive processor: 32-bit endian swap mode {} is used for 16-bit " + "indices. This shouldn't normally be happening, but report the game " + "to Xenia developers for investigation of the intended behavior " + "(ignore or actually swap across adjacent indices)! Currently " + "disabling the swap for 16-and-32 and replacing 8-in-32 with " + "8-in-16.", + uint32_t(guest_index_endian)); + guest_index_endian = guest_index_endian == xenos::Endian::k8in32 + ? xenos::Endian::k8in16 + : xenos::Endian::kNone; + } + bool guest_primitive_reset_enabled = false; + uint32_t guest_primitive_reset_index_guest_endian = 0; + if (tessellation_enabled && + tessellation_mode == xenos::TessellationMode::kAdaptive) { + // Adaptive tessellation uses the index buffer not for indices, but for + // 32-bit floating-point edge factors - no primitive reset. + if (guest_index_format != xenos::IndexFormat::kInt32) { + XELOGE( + "Primitive processor: Adaptive tessellation requires 32-bit " + "floating-point edge tessellation factors in the index buffer, but " + "16-bit index buffer is provided by the guest."); + assert_always(); + return false; + } + } else { + if (regs.Get().multi_prim_ib_ena) { + switch (guest_primitive_type) { + case xenos::PrimitiveType::kLineStrip: + case xenos::PrimitiveType::kTriangleFan: + case xenos::PrimitiveType::kTriangleStrip: + case xenos::PrimitiveType::kLineLoop: + case xenos::PrimitiveType::kQuadStrip: + case xenos::PrimitiveType::kPolygon: + case xenos::PrimitiveType::k2DLineStrip: + case xenos::PrimitiveType::k2DTriStrip: + guest_primitive_reset_index_guest_endian = xenos::GpuSwap( + regs.Get().reset_indx, + guest_index_endian); + // - VGT, what does the guest say about its primitive reset index? + // - It's over 0xFFFF!!! + // - What!? 0xFFFF!? There's no way that can be stored in 16 bits! + guest_primitive_reset_enabled = + guest_index_format == xenos::IndexFormat::kInt16 + ? guest_primitive_reset_index_guest_endian <= UINT16_MAX + : true; + break; + default: + // Vulkan explicitly disallows primitive restart index for "list" + // topologies. In Direct3D 12, it's valid for non-strips, but has + // implementation-defined behavior. Make backend usage simpler by + // explicitly filtering lists out, and hope the guest never uses + // primitive reset for lists. + break; + } + } + } + + // Get the index buffer memory range. + if (guest_draw_vertex_count > vgt_dma_size.num_words) { + XELOGW( + "Primitive processor: {} vertices attempted to be drawn with an " + "index buffer only containing {}. Should be fetching zero indices " + "instead of overflowing ones, but this is a rare situation, so not " + "handled yet. Report the game to Xenia developers!", + guest_draw_vertex_count, vgt_dma_size.num_words); + guest_draw_vertex_count = vgt_dma_size.num_words; + } + uint32_t index_size_log2 = + guest_index_format == xenos::IndexFormat::kInt16 ? 1 : 2; + // The base should already be aligned, but aligning here too for safety. + guest_index_base = regs[XE_GPU_REG_VGT_DMA_BASE].u32 & + ~uint32_t((1 << index_size_log2) - 1); + uint32_t guest_index_buffer_needed_bytes = guest_draw_vertex_count + << index_size_log2; + if (guest_index_base > SharedMemory::kBufferSize || + SharedMemory::kBufferSize - guest_index_base < + guest_index_buffer_needed_bytes) { + XELOGE( + "Primitive processor: Index buffer at 0x{:8X}, 0x{:X} bytes " + "required, is out of the physical memory bounds", + guest_index_base, guest_index_buffer_needed_bytes); + assert_always(); + return false; + } + + cacheable.host_index_format = guest_index_format; + cacheable.host_index_endian = guest_index_endian; + uint32_t guest_index_mask_guest_endian = + guest_index_format == xenos::IndexFormat::kInt16 + ? UINT16_MAX + : GpuSwap(xenos::kVertexIndexMask, guest_index_endian); + if (host_primitive_type != guest_primitive_type) { + // Already converting to a different index type - primitive reset is + // performed during conversion here. Also doing the endian swap here for + // hosts not supporting 32-bit indices because indirection is only used + // for the shared memory buffer. + // Writing to the trace irrespective of the cache lookup result because + // cache behavior depends on runtime configuration and state. + trace_writer_.WriteMemoryRead(guest_index_base, + guest_index_buffer_needed_bytes); + CacheTransaction cache_transaction( + *this, CacheKey(guest_index_base, guest_draw_vertex_count, + guest_index_format, guest_index_endian, + guest_primitive_reset_enabled, guest_primitive_type)); + if (cache_transaction.GetFoundResult()) { + cacheable = *cache_transaction.GetFoundResult(); + } else { + const void* guest_indices_ptr = + memory_.TranslatePhysical(guest_index_base); + cacheable.index_buffer_type = ProcessedIndexBufferType::kHostConverted; + cacheable.host_primitive_reset_enabled = false; + std::function host_index_count_getter; + switch (guest_primitive_type) { + case xenos::PrimitiveType::kTriangleFan: + host_index_count_getter = GetTriangleFanListIndexCount; + break; + case xenos::PrimitiveType::kLineLoop: + host_index_count_getter = GetLineLoopStripIndexCount; + break; + case xenos::PrimitiveType::kQuadList: + host_index_count_getter = GetQuadListTriangleListIndexCount; + break; + default: + assert_unhandled_case(guest_primitive_type); + return false; + } + single_primitive_ranges_.clear(); + if (guest_index_format == xenos::IndexFormat::kInt16) { + // 16-bit indices - just convert the primitive (or multiple + // primitives) to the host topology. + // TODO(Triang3l): 16-bit > 32-bit primitive type conversion for + // Metal, where primitive reset is always enabled, if UINT16_MAX is + // used as a real vertex index. + auto guest_indices = + reinterpret_cast(guest_indices_ptr); + if (guest_primitive_reset_enabled && + IsResetUsed(guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian)) { + // Multiple primitives in the index buffer - gather all single + // primitives. + cacheable.host_draw_vertex_count = + GetMultiPrimitiveHostIndexCountAndRanges( + host_index_count_getter, guest_indices, + guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + single_primitive_ranges_); + } else { + cacheable.host_draw_vertex_count = + host_index_count_getter(guest_draw_vertex_count); + single_primitive_ranges_.emplace_back( + 0, guest_draw_vertex_count, cacheable.host_draw_vertex_count); + } + auto host_indices = reinterpret_cast( + RequestHostConvertedIndexBufferForCurrentFrame( + xenos::IndexFormat::kInt16, cacheable.host_draw_vertex_count, + false, guest_index_base, cacheable.host_index_buffer_handle)); + if (!host_indices) { + return false; + } + ConvertSinglePrimitiveRanges( + host_indices, guest_indices, guest_primitive_type, + PassthroughIndexTransform(), single_primitive_ranges_.cbegin(), + single_primitive_ranges_.cend()); + } else { + // 32-bit indices - may need to pre-swap and pre-mask also if the host + // doesn't support full 32-bit vertex indices. + auto guest_indices = + reinterpret_cast(guest_indices_ptr); + if (guest_primitive_reset_enabled && + IsResetUsed(guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian)) { + // Multiple primitives in the index buffer - gather all single + // primitives. + cacheable.host_draw_vertex_count = + GetMultiPrimitiveHostIndexCountAndRanges( + host_index_count_getter, guest_indices, + guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian, single_primitive_ranges_); + } else { + cacheable.host_draw_vertex_count = + host_index_count_getter(guest_draw_vertex_count); + single_primitive_ranges_.emplace_back( + 0, guest_draw_vertex_count, cacheable.host_draw_vertex_count); + } + auto host_indices = reinterpret_cast( + RequestHostConvertedIndexBufferForCurrentFrame( + xenos::IndexFormat::kInt32, cacheable.host_draw_vertex_count, + false, guest_index_base, cacheable.host_index_buffer_handle)); + if (!host_indices) { + return false; + } + auto single_primitive_ranges_beginning = + single_primitive_ranges_.cbegin(); + auto single_primitive_ranges_end = single_primitive_ranges_.cend(); + if (full_32bit_vertex_indices_used_) { + ConvertSinglePrimitiveRanges( + host_indices, guest_indices, guest_primitive_type, + PassthroughIndexTransform(), single_primitive_ranges_beginning, + single_primitive_ranges_end); + } else { + switch (guest_index_endian) { + case xenos::Endian::kNone: + ConvertSinglePrimitiveRanges(host_indices, guest_indices, + guest_primitive_type, + To24NonSwappingIndexTransform(), + single_primitive_ranges_beginning, + single_primitive_ranges_end); + break; + case xenos::Endian::k8in16: + ConvertSinglePrimitiveRanges(host_indices, guest_indices, + guest_primitive_type, + To24Swapping8In16IndexTransform(), + single_primitive_ranges_beginning, + single_primitive_ranges_end); + break; + case xenos::Endian::k8in32: + ConvertSinglePrimitiveRanges(host_indices, guest_indices, + guest_primitive_type, + To24Swapping8In32IndexTransform(), + single_primitive_ranges_beginning, + single_primitive_ranges_end); + break; + case xenos::Endian::k16in32: + ConvertSinglePrimitiveRanges(host_indices, guest_indices, + guest_primitive_type, + To24Swapping16In32IndexTransform(), + single_primitive_ranges_beginning, + single_primitive_ranges_end); + break; + default: + assert_unhandled_case(guest_index_endian); + return false; + } + cacheable.host_index_endian = xenos::Endian::kNone; + } + } + cache_transaction.SetNewResult(cacheable); + } + } else { + // Using the same indices on the host as on the guest, either directly or + // (for backends not supporting full 32-bit indices, thus unable to + // endian-swap, or even to safely drop the upper 8 bits if no swap is even + // needed) indirectly. + cacheable.host_draw_vertex_count = guest_draw_vertex_count; + cacheable.index_buffer_type = ProcessedIndexBufferType::kGuest; + cacheable.host_primitive_reset_enabled = guest_primitive_reset_enabled; + if (guest_primitive_reset_enabled) { + if (guest_index_format == xenos::IndexFormat::kInt16) { + // The whole 16-bit index is compared to the primitive reset index. + // Does not need indirection on backends not supporting full 32-bit + // indices. + if (guest_primitive_reset_index_guest_endian != UINT16_MAX) { + // If primitive reset is with a non-0xFFFF index is used, replace + // with 0xFFFF if 0xFFFF is not used as a real index, or with + // 0xFFFFFFFF if it is. + // Writing to the trace irrespective of the cache lookup result + // because cache behavior depends on runtime configuration and + // state. + trace_writer_.WriteMemoryRead(guest_index_base, + guest_index_buffer_needed_bytes); + // Not specifying the primitive type in the cache key because not + // replacing it, only the reset index in a type-independent way. + CacheTransaction cache_transaction( + *this, CacheKey(guest_index_base, guest_draw_vertex_count, + guest_index_format, guest_index_endian, + guest_primitive_reset_enabled)); + if (cache_transaction.GetFoundResult()) { + cacheable = *cache_transaction.GetFoundResult(); + } else { + auto guest_indices = + memory_.TranslatePhysical(guest_index_base); + bool is_reset_index_used, is_ffff_used_as_vertex_index; + Get16BitResetIndexUsage(guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + is_reset_index_used, + is_ffff_used_as_vertex_index); + if (is_reset_index_used) { + cacheable.index_buffer_type = + ProcessedIndexBufferType::kHostConverted; + cacheable.host_index_format = is_ffff_used_as_vertex_index + ? xenos::IndexFormat::kInt32 + : xenos::IndexFormat::kInt16; + void* host_indices_ptr = + RequestHostConvertedIndexBufferForCurrentFrame( + cacheable.host_index_format, guest_draw_vertex_count, + true, guest_index_base, + cacheable.host_index_buffer_handle); + if (!host_indices_ptr) { + return false; + } + if (is_ffff_used_as_vertex_index) { + ReplaceResetIndex16To24( + reinterpret_cast(host_indices_ptr), + guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian); + } else { + ReplaceResetIndex16To16( + reinterpret_cast(host_indices_ptr), + guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian); + } + } + cache_transaction.SetNewResult(cacheable); + } + } + } else { + // Low 24 bits of the guest index are compared to the primitive reset + // index. If the backend doesn't support full 32-bit indices, for + // ProcessedIndexBufferType::kGuest, the host needs to read the buffer + // indirectly in the vertex shaders and swap, and for + // ProcessedIndexBufferType::kHostConverted (if primitive reset is + // actually used, thus exactly 0xFFFFFFFF must be sent to the host for + // it in a true index buffer), no indirection is done, but + // pre-swapping and pre-masking is done here. + // Writing to the trace irrespective of the cache lookup result + // because cache behavior depends on runtime configuration and state. + trace_writer_.WriteMemoryRead(guest_index_base, + guest_index_buffer_needed_bytes); + // Not specifying the primitive type in the cache key because not + // replacing it, only the reset index in a type-independent way. + CacheTransaction cache_transaction( + *this, CacheKey(guest_index_base, guest_draw_vertex_count, + guest_index_format, guest_index_endian, + guest_primitive_reset_enabled)); + if (cache_transaction.GetFoundResult()) { + cacheable = *cache_transaction.GetFoundResult(); + } else { + auto guest_indices = + memory_.TranslatePhysical(guest_index_base); + if (IsResetUsed(guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian)) { + cacheable.index_buffer_type = + ProcessedIndexBufferType::kHostConverted; + auto host_indices = reinterpret_cast( + RequestHostConvertedIndexBufferForCurrentFrame( + xenos::IndexFormat::kInt32, guest_draw_vertex_count, true, + guest_index_base, cacheable.host_index_buffer_handle)); + if (!host_indices) { + return false; + } + if (full_32bit_vertex_indices_used_ || + guest_index_endian == xenos::Endian::kNone) { + ReplaceResetIndex32To24( + host_indices, guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian); + } else if (guest_index_endian == xenos::Endian::k8in16) { + ReplaceResetIndex32To24( + host_indices, guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian); + } else if (guest_index_endian == xenos::Endian::k8in32) { + ReplaceResetIndex32To24( + host_indices, guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian); + } else if (guest_index_endian == xenos::Endian::k16in32) { + ReplaceResetIndex32To24( + host_indices, guest_indices, guest_draw_vertex_count, + guest_primitive_reset_index_guest_endian, + guest_index_mask_guest_endian); + } else { + assert_unhandled_case(guest_index_endian); + return false; + } + cacheable.host_index_endian = full_32bit_vertex_indices_used_ + ? guest_index_endian + : xenos::Endian::kNone; + } + cache_transaction.SetNewResult(cacheable); + } + } + } + if (cacheable.index_buffer_type == ProcessedIndexBufferType::kGuest) { + // Request the index buffer memory. + // TODO(Triang3l): Shared memory request cache. + if (!shared_memory_.RequestRange(guest_index_base, + guest_index_buffer_needed_bytes)) { + XELOGE( + "PrimitiveProcessor: Failed to request index buffer 0x{:8X}, " + "0x{:X} bytes needed, in the shared memory", + guest_index_base, guest_index_buffer_needed_bytes); + return false; + } + } + } + } + + result_out.guest_primitive_type = guest_primitive_type; + result_out.host_primitive_type = host_primitive_type; + result_out.host_vertex_shader_type = host_vertex_shader_type; + result_out.tessellation_mode = tessellation_mode; + result_out.host_draw_vertex_count = cacheable.host_draw_vertex_count; + result_out.line_loop_closing_index = line_loop_closing_index; + result_out.index_buffer_type = cacheable.index_buffer_type; + result_out.guest_index_base = guest_index_base; + result_out.host_index_format = cacheable.host_index_format; + result_out.host_index_endian = cacheable.host_index_endian; + result_out.host_primitive_reset_enabled = + cacheable.host_primitive_reset_enabled; + result_out.host_index_buffer_handle = cacheable.host_index_buffer_handle; + return true; +} + +bool PrimitiveProcessor::IsResetUsed(const uint16_t* source, uint32_t count, + uint16_t reset_index_guest_endian) { +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count && (reinterpret_cast(source) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1))) { + --count; + if (*(source++) == reset_index_guest_endian) { + return true; + } + } + if (count >= kSimdVectorU16Elements) { + SimdVectorU16 reset_index_guest_endian_simd = + ReplicateU16(reset_index_guest_endian); + while (count >= kSimdVectorU16Elements) { + count -= kSimdVectorU16Elements; + SimdVectorU16 source_simd = LoadAlignedVectorU16(source); + source += kSimdVectorU16Elements; +#if XE_ARCH_AMD64 + if (_mm_movemask_epi8( + _mm_cmpeq_epi16(source_simd, reset_index_guest_endian_simd))) { + return true; + } +#elif XE_ARCH_ARM64 + uint64x1_t is_any = vreinterpret_u64_u32(vqmovn_u64(vreinterpretq_u64_u16( + vceqq_u16(source_simd, reset_index_guest_endian_simd)))); + if (*reinterpret_cast(&is_any)) { + return true; + } +#else +#error SIMD 16-bit IsResetUsed not implemented. +#endif // XE_ARCH + } + } +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count--) { + if (*(source++) == reset_index_guest_endian) { + return true; + } + } + return false; +} + +void PrimitiveProcessor::Get16BitResetIndexUsage( + const uint16_t* source, uint32_t count, uint16_t reset_index_guest_endian, + bool& is_reset_index_used_out, bool& is_ffff_used_as_vertex_index_out) { + // Optimized for the more common case (reset index not used at all), therefore + // not doing early-outs if both conditions are true for a simpler loop body. + // Using the index 0xFFFF is likely not that common in general. + // TODO(Triang3l): Revisit this - maybe the early-out will be free if this + // function is bandwidth-bound. + is_ffff_used_as_vertex_index_out = false; + if (reset_index_guest_endian == UINT16_MAX) { + is_reset_index_used_out = + IsResetUsed(source, count, reset_index_guest_endian); + return; + } + is_reset_index_used_out = false; +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count && (reinterpret_cast(source) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1))) { + --count; + uint16_t index = *(source++); + if (index == reset_index_guest_endian) { + is_reset_index_used_out = true; + } + if (index == UINT16_MAX) { + is_ffff_used_as_vertex_index_out = true; + } + } + if (count >= kSimdVectorU16Elements) { + SimdVectorU16 reset_index_guest_endian_simd = + ReplicateU16(reset_index_guest_endian); + SimdVectorU16 ffff_simd = ReplicateU16(UINT16_MAX); + SimdVectorU16 is_reset_simd = ReplicateU16(0); + SimdVectorU16 is_ffff_simd = ReplicateU16(0); + while (count >= kSimdVectorU16Elements) { + count -= kSimdVectorU16Elements; + SimdVectorU16 source_simd = LoadAlignedVectorU16(source); + source += kSimdVectorU16Elements; +#if XE_ARCH_AMD64 + is_reset_simd = _mm_or_si128( + is_reset_simd, + _mm_cmpeq_epi16(source_simd, reset_index_guest_endian_simd)); + is_ffff_simd = + _mm_or_si128(is_ffff_simd, _mm_cmpeq_epi16(source_simd, ffff_simd)); +#elif XE_ARCH_ARM64 + is_reset_simd = vcorrq_u16( + is_reset_simd, vceqq_u16(source_simd, reset_index_guest_endian_simd)); + is_ffff_simd = vmaxq_u16(is_ffff_simd, source_simd); +#else +#error SIMD Get16BitResetIndexUsage not implemented. +#endif // XE_ARCH + } +#if XE_ARCH_AMD64 + if (_mm_movemask_epi8(is_reset_simd)) { + is_reset_index_used_out = true; + } + if (_mm_movemask_epi8(is_ffff_simd)) { + is_ffff_used_as_vertex_index_out = true; + } +#elif XE_ARCH_ARM64 + uint64x1_t is_reset_any = + vreinterpret_u64_u32(vqmovn_u64(vreinterpretq_u64_u16(is_reset_simd))); + if (*reinterpret_cast(&is_reset_any)) { + is_reset_index_used_out = true; + } + uint64x1_t is_ffff_any = vreinterpret_u64_u32( + vqmovn_u64(vreinterpretq_u64_u16(vceqq_u16(is_ffff_simd, ffff_simd)))); + if (*reinterpret_cast(&is_ffff_any)) { + is_ffff_used_as_vertex_index_out = true; + } +#else +#error SIMD Get16BitResetIndexUsage not implemented. +#endif // XE_ARCH + } +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count--) { + uint16_t index = *(source++); + if (index == reset_index_guest_endian) { + is_reset_index_used_out = true; + } + if (index == UINT16_MAX) { + is_ffff_used_as_vertex_index_out = true; + } + } +} + +bool PrimitiveProcessor::IsResetUsed(const uint32_t* source, uint32_t count, + uint32_t reset_index_guest_endian, + uint32_t low_bits_mask_guest_endian) { + // The Xbox 360's GPU only uses the low 24 bits of the index - masking before + // comparing. +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count && (reinterpret_cast(source) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1))) { + --count; + if ((*(source++) & low_bits_mask_guest_endian) == + reset_index_guest_endian) { + return true; + } + } + if (count >= kSimdVectorU32Elements) { + SimdVectorU32 reset_index_guest_endian_simd = + ReplicateU32(reset_index_guest_endian); + while (count >= kSimdVectorU32Elements) { + count -= kSimdVectorU32Elements; + SimdVectorU32 source_simd = LoadAlignedVectorU32(source); + source += kSimdVectorU32Elements; + SimdVectorU32 low_bits_mask_guest_endian_simd = + ReplicateU32(low_bits_mask_guest_endian); +#if XE_ARCH_AMD64 + source_simd = _mm_and_si128(source_simd, low_bits_mask_guest_endian_simd); + if (_mm_movemask_epi8( + _mm_cmpeq_epi32(source_simd, reset_index_guest_endian_simd))) { + return true; + } +#elif XE_ARCH_ARM64 + source_simd = vandq_u32(source_simd, low_bits_mask_guest_endian_simd); + uint64x1_t is_any = vreinterpret_u64_u32(vqmovn_u64(vreinterpretq_u64_u32( + vceqq_u32(source_simd, reset_index_guest_endian_simd)))); + if (*reinterpret_cast(&is_any)) { + return true; + } +#else +#error SIMD 32-bit IsResetUsed not implemented. +#endif // XE_ARCH + } + } +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count--) { + if ((*(source++) & low_bits_mask_guest_endian) == + reset_index_guest_endian) { + return true; + } + } + return false; +} + +void PrimitiveProcessor::ReplaceResetIndex16To16( + uint16_t* dest, const uint16_t* source, uint32_t count, + uint16_t reset_index_guest_endian) { +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count && (reinterpret_cast(source) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1))) { + --count; + uint16_t index = *(source++); + *(dest++) = index != reset_index_guest_endian ? index : UINT16_MAX; + } + if (count >= kSimdVectorU16Elements) { + SimdVectorU16 reset_index_guest_endian_simd = + ReplicateU16(reset_index_guest_endian); + while (count >= kSimdVectorU16Elements) { + count -= kSimdVectorU16Elements; + // Comparison produces 0 or 0xFFFF on AVX and Neon - we need 0xFFFF as the + // result for the primitive reset indices, so the result is + // `index | (index == reset_index)`. + SimdVectorU16 source_simd = LoadAlignedVectorU16(source); + source += kSimdVectorU16Elements; + SimdVectorU16 result_simd; +#if XE_ARCH_AMD64 + result_simd = _mm_or_si128( + source_simd, + _mm_cmpeq_epi16(source_simd, reset_index_guest_endian_simd)); +#elif XE_ARCH_ARM64 + result_simd = vorrq_u16( + source_simd, vceqq_u16(source_simd, reset_index_guest_endian_simd)); +#else +#error SIMD ReplaceResetIndex16To16 not implemented. +#endif // XE_ARCH + StoreUnalignedVectorU16(dest, result_simd); + dest += kSimdVectorU16Elements; + } + } +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count--) { + uint16_t index = *(source++); + *(dest++) = index != reset_index_guest_endian ? index : UINT16_MAX; + } +} + +void PrimitiveProcessor::ReplaceResetIndex16To24( + uint32_t* dest, const uint16_t* source, uint32_t count, + uint16_t reset_index_guest_endian) { +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count && (reinterpret_cast(source) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1))) { + --count; + uint16_t index = *(source++); + *(dest++) = index != reset_index_guest_endian ? index : UINT32_MAX; + } + if (count >= kSimdVectorU16Elements) { + SimdVectorU16 reset_index_guest_endian_simd = + ReplicateU16(reset_index_guest_endian); + while (count >= kSimdVectorU16Elements) { + count -= kSimdVectorU16Elements; + SimdVectorU16 source_simd = LoadAlignedVectorU16(source); + source += kSimdVectorU16Elements; + // 1) Compare to the reset index as uint16, getting 0 or 0xFFFF. + // 2) For primitive reset indices, replace the lower 16 bits with 0xFFFF + // via OR with the comparison result. + // 3) Expand to 32-bit, putting 0xFFFF in the upper 16 bits where + // the comparison has passed, creating 0xFFFFFFFF for primitive reset + // or 0x0000#### for non-primitive-reset indices (including + // 0x0000FFFF if the original index buffer had 0xFFFF, but the + // primitive reset index is different). + // 4) Store. +#if XE_ARCH_AMD64 + __m128i are_reset = + _mm_cmpeq_epi16(source_simd, reset_index_guest_endian_simd); + __m128i result = _mm_or_si128(source_simd, are_reset); + StoreUnalignedVectorU32(dest, _mm_unpacklo_epi16(result, are_reset)); + // Expecting kSimdVectorU16Elements / 2 to be in the immediate offset + // part of the address. + StoreUnalignedVectorU32(dest + kSimdVectorU16Elements / 2, + _mm_unpackhi_epi16(result, are_reset)); +#elif XE_ARCH_ARM64 + // Interleaving the indices and 0 / 0xFFFF via st2. + uint16x8x2_t result; + result.val[1] = vceqq_u16(source_simd, reset_index_guest_endian_simd); + result.val[0] = vorrq_u16(source_simd, result.val[1]); + vst2q_u16(reinterpret_cast(dest), result); +#else +#error SIMD ReplaceResetIndex16To24 not implemented. +#endif // XE_ARCH + dest += kSimdVectorU16Elements; + } + } +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count--) { + uint16_t index = *(source++); + *(dest++) = index != reset_index_guest_endian ? index : UINT32_MAX; + } +} + +template void PrimitiveProcessor::ReplaceResetIndex32To24( + uint32_t* dest, const uint32_t* source, uint32_t count, + uint32_t reset_index_guest_endian, uint32_t low_bits_mask_guest_endian); +template void +PrimitiveProcessor::ReplaceResetIndex32To24( + uint32_t* dest, const uint32_t* source, uint32_t count, + uint32_t reset_index_guest_endian, uint32_t low_bits_mask_guest_endian); +template void +PrimitiveProcessor::ReplaceResetIndex32To24( + uint32_t* dest, const uint32_t* source, uint32_t count, + uint32_t reset_index_guest_endian, uint32_t low_bits_mask_guest_endian); +template void +PrimitiveProcessor::ReplaceResetIndex32To24( + uint32_t* dest, const uint32_t* source, uint32_t count, + uint32_t reset_index_guest_endian, uint32_t low_bits_mask_guest_endian); + +#define XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION_NO_PASSTHROUGH( \ + ConverterName) \ + template void PrimitiveProcessor::ConverterName( \ + uint32_t* dest, const uint32_t* source, uint32_t source_index_count, \ + const To24NonSwappingIndexTransform& index_transform); \ + template void PrimitiveProcessor::ConverterName( \ + uint32_t* dest, const uint32_t* source, uint32_t source_index_count, \ + const To24Swapping8In16IndexTransform& index_transform); \ + template void PrimitiveProcessor::ConverterName( \ + uint32_t* dest, const uint32_t* source, uint32_t source_index_count, \ + const To24Swapping8In32IndexTransform& index_transform); \ + template void PrimitiveProcessor::ConverterName( \ + uint32_t* dest, const uint32_t* source, uint32_t source_index_count, \ + const To24Swapping16In32IndexTransform& index_transform); +#define XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION(ConverterName) \ + template void PrimitiveProcessor::ConverterName( \ + uint16_t* dest, const uint16_t* source, uint32_t source_index_count, \ + const PassthroughIndexTransform& index_transform); \ + template void PrimitiveProcessor::ConverterName( \ + uint32_t* dest, const uint32_t* source, uint32_t source_index_count, \ + const PassthroughIndexTransform& index_transform); \ + XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION_NO_PASSTHROUGH( \ + ConverterName) +XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION(TriangleFanToList) +XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION_NO_PASSTHROUGH( + LineLoopToStrip) +// TODO(Triang3l): SIMD quad conversion maybe - 2 vectors to 3 vectors (though +// multiple quads are rarely drawn anyway). +XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION(QuadListToTriangleList) +#undef XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION_NO_PASSTHROUGH +#undef XE_GPU_PRIMITIVE_PROCESSOR_INSTANTIATE_CONVERSION + +void PrimitiveProcessor::LineLoopToStrip( + uint16_t* dest, const uint16_t* source, uint32_t source_index_count, + const PassthroughIndexTransform& index_transform) { + if (source_index_count <= 1) { + // To match GetLineLoopStripIndexCount. + return; + } + std::memcpy(dest, source, sizeof(*source) * source_index_count); + dest[source_index_count] = source[0]; +} +void PrimitiveProcessor::LineLoopToStrip( + uint32_t* dest, const uint32_t* source, uint32_t source_index_count, + const PassthroughIndexTransform& index_transform) { + if (source_index_count <= 1) { + // To match GetLineLoopStripIndexCount. + return; + } + std::memcpy(dest, source, sizeof(*source) * source_index_count); + dest[source_index_count] = source[0]; +} + +uint32_t PrimitiveProcessor::GetMultiPrimitiveHostIndexCountAndRanges( + std::function single_primitive_guest_to_host_count, + const uint16_t* source, uint32_t source_index_count, + uint16_t reset_index_guest_endian, + std::deque& ranges_append_out) { + uint32_t host_total_index_count = 0; + uint32_t guest_index_offset = 0; + for (;;) { + uint32_t guest_primitive_offset = guest_index_offset; + while (guest_index_offset < source_index_count) { + if (source[guest_index_offset] == reset_index_guest_endian) { + break; + } + ++guest_index_offset; + } + // Reset encountered or end of the index buffer - add the range. + uint32_t guest_primitive_index_count = + guest_index_offset - guest_primitive_offset; + uint32_t host_primitive_index_count = + single_primitive_guest_to_host_count(guest_primitive_index_count); + if (host_primitive_index_count) { + ranges_append_out.emplace_back(guest_primitive_offset, + guest_primitive_index_count, + host_primitive_index_count); + host_total_index_count += host_primitive_index_count; + } + if (guest_index_offset >= source_index_count) { + // End of the index buffer. + break; + } + // Reset index encountered - skip. + ++guest_index_offset; + } + return host_total_index_count; +} + +uint32_t PrimitiveProcessor::GetMultiPrimitiveHostIndexCountAndRanges( + std::function single_primitive_guest_to_host_count, + const uint32_t* source, uint32_t source_index_count, + uint32_t reset_index_guest_endian, uint32_t low_bits_mask_guest_endian, + std::deque& ranges_append_out) { + uint32_t host_total_index_count = 0; + uint32_t guest_index_offset = 0; + for (;;) { + uint32_t guest_primitive_offset = guest_index_offset; + while (guest_index_offset < source_index_count) { + if ((source[guest_index_offset] & low_bits_mask_guest_endian) == + reset_index_guest_endian) { + break; + } + ++guest_index_offset; + } + // Reset encountered or end of the index buffer - add the range. + uint32_t guest_primitive_index_count = + guest_index_offset - guest_primitive_offset; + uint32_t host_primitive_index_count = + single_primitive_guest_to_host_count(guest_primitive_index_count); + if (host_primitive_index_count) { + ranges_append_out.emplace_back(guest_primitive_offset, + guest_primitive_index_count, + host_primitive_index_count); + host_total_index_count += host_primitive_index_count; + } + if (guest_index_offset >= source_index_count) { + // End of the index buffer. + break; + } + // Reset index encountered - skip. + ++guest_index_offset; + } + return host_total_index_count; +} + +PrimitiveProcessor::CacheTransaction::CacheTransaction( + PrimitiveProcessor& processor, CacheKey key) + : processor_(processor), key_(key) { + assert_zero(processor_.cache_currently_processing_size_bytes_); + if (cvars::primitive_processor_cache_min_indices < 0 || + key_.count < uint32_t(cvars::primitive_processor_cache_min_indices)) { + // Don't cache if the vertex count is too small. + key_.key = 0; + } + if (!key_.count) { + return; + } + uint32_t size_bytes = + (key_.format == xenos::IndexFormat::kInt16 ? sizeof(uint16_t) + : sizeof(uint32_t)) * + key_.count; + { + auto global_lock = processor_.global_critical_region_.Acquire(); + auto cache_map_it = processor_.cache_map_.find(key_); + if (cache_map_it != processor_.cache_map_.end()) { + result_ = processor_.cache_entry_pool_[cache_map_it->second].result; + result_type_ = ResultType::kExisting; + } else { + // Inhibit writing the new result if the range happens to be modified + // during the processing outside the lock. + processor_.cache_currently_processing_base_ = key_.base; + processor_.cache_currently_processing_size_bytes_ = size_bytes; + } + } + if (result_type_ != ResultType::kExisting) { + // Enable the invalidation callback before reading the indices. + // Also, only enable invalidation callbacks if anything needed processing at + // all - don't waste time in the access violation handler doing nothing if + // the guest doesn't use anything requiring host conversion. + if (!processor_.memory_invalidation_callback_handle_) { + processor_.memory_invalidation_callback_handle_ = + processor_.memory_.RegisterPhysicalMemoryInvalidationCallback( + MemoryInvalidationCallbackThunk, &processor_); + } + processor_.memory_.EnablePhysicalMemoryAccessCallbacks( + key_.base, size_bytes, true, false); + } +} + +PrimitiveProcessor::CacheTransaction::~CacheTransaction() { + if (!key_.count || result_type_ == ResultType::kExisting) { + return; + } + + auto global_lock = processor_.global_critical_region_.Acquire(); + + processor_.cache_currently_processing_base_ = 0; + processor_.cache_currently_processing_size_bytes_ = 0; + + if (result_type_ == ResultType::kNewSet) { + size_t new_entry_index; + if (processor_.cache_bucket_free_first_entry_ != SIZE_MAX) { + new_entry_index = processor_.cache_bucket_free_first_entry_; + processor_.cache_bucket_free_first_entry_ = + processor_.cache_entry_pool_[new_entry_index].free_next; + } else { + new_entry_index = processor_.cache_entry_pool_.size(); + processor_.cache_entry_pool_.emplace_back(); + } + CacheEntry& new_entry = processor_.cache_entry_pool_[new_entry_index]; + + // Put the entry in 1 or 2 buckets. + uint32_t bucket_start_index = key_.base >> kCacheBucketSizeBytesLog2; + uint32_t bucket_count = CacheEntry::GetBucketCount(key_); + for (uint32_t link_index = 0; link_index < bucket_count; ++link_index) { + new_entry.buckets_prev[link_index] = SIZE_MAX; + uint32_t bucket_index = bucket_start_index + link_index; + uint64_t& bucket_non_empty_l1_ref = + processor_.cache_buckets_non_empty_l1_[bucket_index >> 6]; + uint64_t bucket_non_empty_l1_bit = uint64_t(1) << (bucket_index & 63); + size_t& bucket_first_entry_ref = + processor_.cache_bucket_first_entries_[bucket_index]; + if (bucket_non_empty_l1_ref & bucket_non_empty_l1_bit) { + // There is at least one entry already in the bucket - link to the + // first. + new_entry.buckets_next[link_index] = bucket_first_entry_ref; + CacheEntry& bucket_first_entry = + processor_.cache_entry_pool_[bucket_first_entry_ref]; + // If the start ([0]) bucket of bucket_first_entry is bucket_index, + // update its link [0]. Otherwise, since a cache entry may belong only + // to at most 2 buckets, bucket_index must be its [1] bucket. + bucket_first_entry + .buckets_prev[size_t((bucket_first_entry.key.base >> + kCacheBucketSizeBytesLog2) != bucket_index)] = + new_entry_index; + } else { + new_entry.buckets_next[link_index] = SIZE_MAX; + bucket_non_empty_l1_ref |= bucket_non_empty_l1_bit; + processor_.UpdateCacheBucketsNonEmptyL2(bucket_index >> 6, global_lock); + } + bucket_first_entry_ref = new_entry_index; + } + + new_entry.key = key_; + new_entry.result = result_; + + processor_.cache_map_.emplace(key_, new_entry_index); + } +} + +std::pair PrimitiveProcessor::MemoryInvalidationCallback( + uint32_t physical_address_start, uint32_t length, bool exact_range) { + if (length == 0 || physical_address_start >= SharedMemory::kBufferSize) { + return std::make_pair(uint32_t(0), UINT32_MAX); + } + length = std::min(length, SharedMemory::kBufferSize - physical_address_start); + uint32_t physical_address_end = physical_address_start + length; + if (!exact_range) { + // Invalidate entire buckets if this is an access callback rather than + // something like a file read to disable access violation handling for a + // bigger range for higher performance. + physical_address_start &= ~(kCacheBucketSizeBytes - 1); + physical_address_end = + xe::align(physical_address_end, kCacheBucketSizeBytes); + } + bool any_invalidated = false; + uint32_t bucket_index_first = + physical_address_start >> kCacheBucketSizeBytesLog2; + uint32_t bucket_index_last = + (physical_address_end - 1) >> kCacheBucketSizeBytesLog2; + uint32_t bucket_l1_bits_index_first = bucket_index_first >> 6; + uint32_t bucket_l1_bits_index_last = bucket_index_last >> 6; + uint32_t bucket_l2_bits_index_first = bucket_index_first >> 12; + uint32_t bucket_l2_bits_index_last = bucket_index_last >> 12; + auto global_lock = global_critical_region_.Acquire(); + for (uint32_t bucket_l2_bits_index = bucket_l2_bits_index_first; + bucket_l2_bits_index <= bucket_l2_bits_index_last; + ++bucket_l2_bits_index) { + uint64_t bucket_l2_bits_mask = UINT64_MAX; + if (bucket_l2_bits_index == bucket_l2_bits_index_first) { + bucket_l2_bits_mask &= + ~((uint64_t(1) << (bucket_l1_bits_index_first & 63)) - 1); + } + if (bucket_l2_bits_index == bucket_l2_bits_index_last && + (bucket_l1_bits_index_last & 63) != 63) { + bucket_l2_bits_mask &= + (uint64_t(1) << ((bucket_l1_bits_index_last & 63) + 1)) - 1; + } + // Not caching L2 bits because they may be modified by unlinking. + // Loop until any bits in the 64-bit portion of the L2 bit set are left. + while (bucket_l2_bits_mask) { + uint32_t bucket_l2_bit_shift; + if (!xe::bit_scan_forward( + cache_buckets_non_empty_l2_[bucket_l2_bits_index] & + bucket_l2_bits_mask, + &bucket_l2_bit_shift)) { + break; + } + bucket_l2_bits_mask &= ~(uint64_t(1) << bucket_l2_bit_shift); + uint32_t bucket_l1_bits_index = + (bucket_l2_bits_index << 6) | bucket_l2_bit_shift; + uint64_t bucket_l1_bits_mask = UINT64_MAX; + if (bucket_l1_bits_index == bucket_l1_bits_index_first) { + bucket_l1_bits_mask &= + ~((uint64_t(1) << (bucket_index_first & 63)) - 1); + } + if (bucket_l1_bits_index == bucket_l1_bits_index_last && + (bucket_index_last & 63) != 63) { + bucket_l1_bits_mask &= + (uint64_t(1) << ((bucket_index_last & 63) + 1)) - 1; + } + // Not caching L1 bits because they may be modified by unlinking. + // Loop over buckets until any bits in the 64-bit portion of the L1 bit + // set are left. + while (bucket_l1_bits_mask) { + uint32_t bucket_l1_bit_shift; + if (!xe::bit_scan_forward( + cache_buckets_non_empty_l1_[bucket_l1_bits_index] & + bucket_l1_bits_mask, + &bucket_l1_bit_shift)) { + break; + } + bucket_l1_bits_mask &= ~(uint64_t(1) << bucket_l1_bit_shift); + uint32_t bucket_index = + (bucket_l1_bits_index << 6) | bucket_l1_bit_shift; + // Invalidate the entries in the bucket, fully or partially. + size_t entry_index = cache_bucket_first_entries_[bucket_index]; + do { + CacheEntry& entry = cache_entry_pool_[entry_index]; + CacheKey entry_key = entry.key; + // If the start ([0]) bucket of the entry is bucket_index, the link + // within this bucket is its link [0]. Otherwise, since a cache entry + // may belong only to at most 2 buckets, bucket_index must be its [1] + // bucket. + uint32_t entry_bucket_index_first = + entry_key.base >> kCacheBucketSizeBytesLog2; + assert_true((bucket_index - entry_bucket_index_first) <= 1, + "Cache entries only store list links within two buckets"); + size_t next_entry_index = + entry.buckets_next[bucket_index - entry_bucket_index_first]; + // For exact_range, don't invalidate bucket entries that are outside + // the specified range. + if (entry_key.base < physical_address_end) { + uint32_t entry_end = entry_key.base + entry_key.GetSizeBytes(); + if (entry_end > physical_address_end) { + // Invalidate the entry. + any_invalidated = true; + // Remove the entry from the cache map. + auto entry_map_it = cache_map_.find(entry_key); + assert_true(entry_map_it != cache_map_.end()); + if (entry_map_it != cache_map_.end()) { + cache_map_.erase(entry_map_it); + } + // Unlink the entry from the bucket's list. + uint32_t entry_link_index_last = + ((entry_end - 1) >> kCacheBucketSizeBytesLog2) - + entry_bucket_index_first; + assert_true( + entry_link_index_last <= 1, + "Cache entries only store list links within two buckets"); + for (uint32_t entry_link_index = 0; + entry_link_index <= entry_link_index_last; + ++entry_link_index) { + uint32_t entry_bucket_index = + entry_bucket_index_first + entry_link_index; + size_t entry_link_prev = entry.buckets_prev[entry_link_index]; + size_t entry_link_next = entry.buckets_next[entry_link_index]; + if (entry_link_prev != SIZE_MAX) { + CacheEntry& entry_prev = cache_entry_pool_[entry_link_prev]; + entry_prev.buckets_next[size_t( + (entry_prev.key.base >> kCacheBucketSizeBytesLog2) != + entry_bucket_index)] = entry_link_next; + } else { + if (entry_link_next != SIZE_MAX) { + cache_bucket_first_entries_[entry_bucket_index] = + entry_link_next; + } else { + // The only entry that was remaining in the bucket - it's + // empty now. + cache_buckets_non_empty_l1_[entry_bucket_index >> 6] &= + ~(uint64_t(1) << (entry_bucket_index & 63)); + UpdateCacheBucketsNonEmptyL2(entry_bucket_index >> 6, + global_lock); + } + } + if (entry_link_next != SIZE_MAX) { + CacheEntry& entry_next = cache_entry_pool_[entry_link_next]; + entry_next.buckets_prev[size_t( + (entry_next.key.base >> kCacheBucketSizeBytesLog2) != + entry_bucket_index)] = entry_link_prev; + } + } + // Make the entry free for reuse. + entry.free_next = cache_bucket_free_first_entry_; + cache_bucket_free_first_entry_ = entry_index; + } + } + entry_index = next_entry_index; + } while (entry_index != SIZE_MAX); + } + } + } + return any_invalidated + ? std::make_pair(physical_address_start, + physical_address_end - physical_address_start) + : std::make_pair(uint32_t(0), UINT32_MAX); +} + +std::pair +PrimitiveProcessor::MemoryInvalidationCallbackThunk( + void* context_ptr, uint32_t physical_address_start, uint32_t length, + bool exact_range) { + return reinterpret_cast(context_ptr) + ->MemoryInvalidationCallback(physical_address_start, length, exact_range); +} + +} // namespace gpu +} // namespace xe diff --git a/src/xenia/gpu/primitive_processor.h b/src/xenia/gpu/primitive_processor.h new file mode 100644 index 000000000..046928738 --- /dev/null +++ b/src/xenia/gpu/primitive_processor.h @@ -0,0 +1,870 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_GPU_PRIMITIVE_PROCESSOR_H_ +#define XENIA_GPU_PRIMITIVE_PROCESSOR_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/base/cvar.h" +#include "xenia/base/math.h" +#include "xenia/base/mutex.h" +#include "xenia/base/platform.h" +#include "xenia/gpu/register_file.h" +#include "xenia/gpu/shader.h" +#include "xenia/gpu/shared_memory.h" +#include "xenia/gpu/trace_writer.h" +#include "xenia/gpu/xenos.h" +#include "xenia/memory.h" + +#if XE_ARCH_AMD64 +// 128-bit SSSE3-level (SSE2+ for integer comparison, SSSE3 for pshufb) or AVX +// (256-bit AVX only got integer operations such as comparison in AVX2, which is +// above the minimum requirements of Xenia). +#include +#define XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE 16 +#elif XE_ARCH_ARM64 +#include +#define XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE 16 +#else +#define XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE 0 +#endif // XE_ARCH + +// The idea behind this config variable is to force both indirection without +// primitive reset and pre-masking / pre-swapping with primitive reset, +// therefore this is supposed to be checked only by the host if it supports +// indirection. It's pretty pointless to do only half of this on backends that +// support full 32-bit indices unconditionally. +DECLARE_bool(ignore_32bit_vertex_index_support); + +namespace xe { +namespace gpu { + +// Normalizes primitive data in various ways for use with Direct3D 12 and Vulkan +// (down to its minimum requirements plus the portability subset). +// +// This solves various issues: +// - Triangle fans not supported on Direct3D 10+ and the Vulkan portability +// subset. +// - Converts to triangle lists, both with and without primitive reset. +// - Line loops are not supported on Direct3D 12 or Vulkan. +// - Converts to line strips. +// - Quads not reproducible with line lists with adjacency without geometry +// shaders (some Vulkan implementations), as well as being hard to debug in +// PIX due to "catastrophic failures". +// - Converts to triangle lists. +// - Vulkan requiring 0xFFFF primitive restart index for 16-bit indices and +// 0xFFFFFFFF for 32-bit (Direct3D 12 slightly relaxes this, allowing 0xFFFF +// for 32-bit also, but it's of no use to Xenia since guest indices are +// big-endian usually. Also, only 24 lower bits of the vertex index being used +// on the guest (tested on an Adreno 200 phone with drawing, though not with +// primitive restart as OpenGL ES 2.0 doesn't expose it), so the upper 8 bits +// likely shouldn't have effect on primitive restart (guest reset index +// 0xFFFFFF likely working for 0xFFFFFF, 0xFFFFFFFF, and 254 more indices), +// while Vulkan and Direct3D 12 require exactly 0xFFFFFFFF. +// - For 16-bit indices with guest reset index other than 0xFFFF (passing +// 0xFFFF directly to the host is fine because it's the same irrespective of +// endianness), there are two possible solutions: +// - If the index buffer otherwise doesn't contain 0xFFFF otherwise (since +// it's a valid vertex index in this case), replacing the primitive reset +// index with 0xFFFF in the 16-bit buffer. +// - If the index buffer contains any usage of 0xFFFF as a real vertex +// index, converting the index buffer to 32-bit, and replacing the +// primitive reset index with 0xFFFFFFFF. +// - For 32-bit indices, there are two paths: +// - If the guest reset index is 0xFFFFFF, and the index buffer actually +// uses only 0xFFFFFFFF for reset, using it without changes. +// - If the guest uses something other than 0xFFFFFFFF for primitive reset, +// replacing elements with (index & 0xFFFFFF) == reset_index with +// 0xFFFFFFFF. +// - Some Vulkan implementations only support 24-bit indices. The guests usually +// pass big-endian vertices, so we need all 32 bits (as the least significant +// bits will be in 24...31) to perform the byte swapping. For this reason, we +// load 32-bit indices indirectly, doing non-indexed draws and fetching the +// indices from the shared memory. This, however, is not compatible with +// primitive restart. +// - Pre-swapping, masking to 24 bits, and converting the reset index to +// 0xFFFFFFFF, resulting in an index buffer that can be used directly. + +class PrimitiveProcessor { + public: + enum ProcessedIndexBufferType { + // Auto-indexed on the host. + kNone, + // GPU DMA, from the shared memory. + // For 32-bit, indirection is needed if the host only supports 24-bit + // indices (even for non-endian-swapped, as the GPU should be ignoring the + // upper 8 bits completely, rather than exhibiting undefined behavior. + kGuest, + // Converted and stored in the primitive converter for the current draw + // command. For 32-bit indices, if the host doesn't support all 32 bits, + // this kind of an index buffer will always be pre-masked and pre-swapped. + kHostConverted, + // Auto-indexed on the guest, but with an adapter index buffer on the host. + kHostBuiltin, + }; + + struct ProcessingResult { + xenos::PrimitiveType guest_primitive_type; + xenos::PrimitiveType host_primitive_type; + // Includes whether tessellation is enabled (not kVertex) and the type of + // tessellation. + Shader::HostVertexShaderType host_vertex_shader_type; + // Only used for non-kVertex host_vertex_shader_type. For kAdaptive, the + // index buffer is always from the guest and fully 32-bit, and contains the + // floating-point tessellation factors. + xenos::TessellationMode tessellation_mode; + // TODO(Triang3l): If important, split into the index count and the actual + // index buffer size, using zeros for out-of-bounds indices. + uint32_t host_draw_vertex_count; + uint32_t line_loop_closing_index; + ProcessedIndexBufferType index_buffer_type; + uint32_t guest_index_base; + xenos::IndexFormat host_index_format; + xenos::Endian host_index_endian; + // The reset index, if enabled, is always 0xFFFF for host_index_format + // kInt16 and 0xFFFFFFFF for kInt32. Never enabled for "list" primitive + // types, thus safe for direct usage on Vulkan. + bool host_primitive_reset_enabled; + // Backend-specific handle for the index buffer valid for the current draw, + // only valid for index_buffer_type kHostConverted and kHostBuiltin. + size_t host_index_buffer_handle; + bool IsTessellated() const { + return host_vertex_shader_type != Shader::HostVertexShaderType::kVertex; + } + }; + + virtual ~PrimitiveProcessor(); + + bool AreFull32BitVertexIndicesUsed() const { + return full_32bit_vertex_indices_used_; + } + bool IsConvertingTriangleFansToLists() const { + return convert_triangle_fans_to_lists_; + } + bool IsConvertingLineLoopsToStrips() const { + return convert_line_loops_to_strips_; + } + // Quad lists may be emulated as line lists with adjacency and a geometry + // shader, but geometry shaders must be supported for this. + bool IsConvertingQuadListsToTriangleLists() const { + return convert_quad_lists_to_triangle_lists_; + } + + // Submission must be open to call (may request the index buffer in the shared + // memory). + bool Process(ProcessingResult& result_out); + + // Invalidates the cache within the range. + std::pair MemoryInvalidationCallback( + uint32_t physical_address_start, uint32_t length, bool exact_range); + + protected: + // For host-side index buffer creation, the biggest possibly needed contiguous + // allocation, in indices. + // - No conversion: up to 0xFFFF vertices (as the vertex count in + // VGT_DRAW_INITIATOR is 16-bit). + // - Triangle fans to lists: since the 3rd vertex, every guest vertex creates + // a triangle, thus the maximum is 3 * (UINT16_MAX - 2), or 0x2FFF7. + // Primitive reset can only slow down the amplification - the 3 vertices + // after a reset add 1 host vertex each, not 3 each. + // - Line loops to strips: adding 1 vertex if there are at least 2 vertices in + // the original primitive, either replacing the primitive reset index with + // this new closing vertex, or in case of the final primitive, just adding a + // vertex - thus the absolute limit is UINT16_MAX + 1, or 0x10000. + // - Quad lists to triangle lists: vertices are processed in groups of 4, each + // group converted to 6 vertices, so the limit is 1.5 * 0xFFFC, or 0x17FFA. + // Thus, the maximum vertex count is defined by triangle fan to list + // conversion. + // Also include padding for co-alignment of the source and the destination for + // SIMD. + static constexpr uint32_t kMinRequiredConvertedIndexBufferSize = + sizeof(uint32_t) * (UINT16_MAX - 2) * 3 * + +XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE; + + PrimitiveProcessor(const RegisterFile& register_file, Memory& memory, + TraceWriter& trace_writer, SharedMemory& shared_memory) + : register_file_(register_file), + memory_(memory), + trace_writer_(trace_writer), + shared_memory_(shared_memory) {} + + // Call from the backend-specific initialization function. + // - full_32bit_vertex_indices_supported: + // - If the backend supports 32-bit indices unconditionally, and doesn't + // generate indirection logic in vertex shaders, pass hard-coded `true`. + // - Otherwise: + // - If the host doesn't support full 32-bit indices (but supports at + // least 24-bit indices), pass `false`. + // - If the host supports 32-bit indices, but the backend can handle both + // cases, pass `cvars::ignore_32bit_vertex_index_support`, and + // afterwards, check `AreFull32BitVertexIndicesUsed()` externally to see + // if indirection may be needed. + // - When full 32-bit indices are not supported, the host must be using + // auto-indexed draws for 32-bit indices of ProcessedIndexBufferType + // kGuest, while fetching the index data manually from the shared memory + // buffer and endian-swapping it. + // - Indirection, however, precludes primitive reset usage - so if + // primitive reset is needed, the primitive processor will pre-swap and + // pre-mask the index buffer so there are only host-endian 0x00###### or + // 0xFFFFFFFF values in it. In this case, a kHostConverted index buffer + // is returned from Process, and indirection is not needed (and + // impossible since the index buffer is not in the shared memory buffer + // anymore), though byte swap is still needed as 16-bit indices may also + // be kHostConverted, while they are completely unaffected by this. The + // same applies to primitive type conversion - if it happens for 32-bit + // guest indices, and kHostConverted is returned, they will be + // pre-swapped and pre-masked. + // - triangle_fans_supported, line_loops_supported, quad_lists_supported: + // - Pass true or false depending on whether the host actually supports + // those guest primitive types directly or through geometry shader + // emulation. Debug overriding will be resolved in the common code if + // needed. + bool InitializeCommon(bool full_32bit_vertex_indices_supported, + bool triangle_fans_supported, bool line_loops_supported, + bool quad_lists_supported); + // If any primitive type conversion is needed for auto-indexed draws, called + // from InitializeCommon (thus only once in the primitive processor's + // lifetime) to set up the backend's index buffer containing indices for + // primitive type remapping. The backend must allocate a `sizeof(uint16_t) * + // index_count` buffer and call fill_callback for its mapping if creation is + // successful. 16-bit indices are enough even if the backend has primitive + // reset enabled all the time (Metal) as auto-indexed draws are limited to + // UINT16_MAX vertices, not UINT16_MAX + 1. + virtual bool InitializeBuiltin16BitIndexBuffer( + uint32_t index_count, std::function fill_callback) = 0; + // Call last in implementation-specific shutdown, also callable from the + // destructor. + void ShutdownCommon(); + + // Call at boundaries of lifespans of converted data (between frames, + // preferably in the end of a frame so between the swap and the next draw, + // access violation handlers need to do less work). + void ClearPerFrameCache(); + + static constexpr size_t GetBuiltinIndexBufferOffsetBytes(size_t handle) { + // For simplicity, just using the handles as byte offsets. + return handle; + } + + // The destination allocation must have XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + // excess bytes. + static ptrdiff_t GetSimdCoalignmentOffset(const void* host_index_ptr, + uint32_t guest_index_base) { +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + // Always moving the host pointer only forward into the allocation padding + // space of XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE bytes. Without relying on + // two's complement wrapping overflow behavior, the logic would look like: + // uintptr_t host_subalignment = + // reinterpret_cast(host_index_ptr) & + // (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1); + // uint32_t guest_subalignment = guest_index_base & + // (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1); + // uintptr_t host_index_address_aligned = host_index_address; + // if (guest_subalignment >= host_subalignment) { + // return guest_subalignment - host_subalignment; + // } + // return XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - + // (host_subalignment - guest_subalignment); + return ptrdiff_t( + (guest_index_base - reinterpret_cast(host_index_ptr)) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1)); +#else + return 0; +#endif + } + + // Requests a buffer to write the new transformed indices to. The lifetime of + // the returned buffer must be that of the current frame. Returns the mapping + // of the buffer to write to, or nullptr in case of failure, in addition to, + // if successful, a handle that can be used by the backend's command processor + // to access the backend-specific data for binding the buffer. + virtual void* RequestHostConvertedIndexBufferForCurrentFrame( + xenos::IndexFormat format, uint32_t index_count, bool coalign_for_simd, + uint32_t coalignment_original_address, size_t& backend_handle_out) = 0; + + private: +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE +#if XE_ARCH_AMD64 + // SSSE3 or AVX. + using SimdVectorU16 = __m128i; + using SimdVectorU32 = __m128i; + static SimdVectorU16 ReplicateU16(uint16_t value) { + return _mm_set1_epi16(int16_t(value)); + } + static SimdVectorU32 ReplicateU32(uint32_t value) { + return _mm_set1_epi32(int32_t(value)); + } + static SimdVectorU16 LoadAlignedVectorU16(const uint16_t* source) { + return _mm_load_si128(reinterpret_cast(source)); + } + static SimdVectorU32 LoadAlignedVectorU32(const uint32_t* source) { + return _mm_load_si128(reinterpret_cast(source)); + } + static void StoreUnalignedVectorU16(uint16_t* dest, SimdVectorU16 source) { + _mm_storeu_si128(reinterpret_cast<__m128i*>(dest), source); + } + static void StoreUnalignedVectorU32(uint32_t* dest, SimdVectorU32 source) { + _mm_storeu_si128(reinterpret_cast<__m128i*>(dest), source); + } +#elif XE_ARCH_ARM64 + // NEON. + using SimdVectorU16 = uint16x8_t; + using SimdVectorU32 = uint32x4_t; + static SimdVectorU16 ReplicateU16(uint16_t value) { + return vdupq_n_u16(value); + } + static SimdVectorU32 ReplicateU32(uint32_t value) { + return vdupq_n_u32(value); + } + static SimdVectorU16 LoadAlignedVectorU16(const uint16_t* source) { +#if XE_COMPILER_MSVC + return vld1q_u16_ex(source, sizeof(uint16x8_t) * CHAR_BIT); +#else + return vld1q_u16(reinterpret_cast( + __builtin_assume_aligned(source, sizeof(uint16x8_t)))); +#endif + } + static SimdVectorU32 LoadAlignedVectorU32(const uint32_t* source) { +#if XE_COMPILER_MSVC + return vld1q_u32_ex(source, sizeof(uint16x8_t) * CHAR_BIT); +#else + return vld1q_u32(reinterpret_cast( + __builtin_assume_aligned(source, sizeof(uint32x4_t)))); +#endif + } + static void StoreUnalignedVectorU16(uint16_t* dest, SimdVectorU16 source) { + vst1q_u16(dest, source); + } + static void StoreUnalignedVectorU32(uint32_t* dest, SimdVectorU32 source) { + vst1q_u32(dest, source); + } +#else +#error SIMD vector types and constant loads not specified. +#endif // XE_ARCH + static_assert( + sizeof(SimdVectorU16) == XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE, + "XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE must reflect the vector size " + "actually used"); + static_assert( + sizeof(SimdVectorU32) == XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE, + "XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE must reflect the vector size " + "actually used"); + static constexpr uint32_t kSimdVectorU16Elements = + sizeof(SimdVectorU16) / sizeof(uint16_t); + static constexpr uint32_t kSimdVectorU32Elements = + sizeof(SimdVectorU32) / sizeof(uint32_t); +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + + static bool IsResetUsed(const uint16_t* source, uint32_t count, + uint16_t reset_index_guest_endian); + static void Get16BitResetIndexUsage(const uint16_t* source, uint32_t count, + uint16_t reset_index_guest_endian, + bool& is_reset_index_used_out, + bool& is_ffff_used_as_vertex_index_out); + static bool IsResetUsed(const uint32_t* source, uint32_t count, + uint32_t reset_index_guest_endian, + uint32_t low_bits_mask_guest_endian); + static void ReplaceResetIndex16To16(uint16_t* dest, const uint16_t* source, + uint32_t count, + uint16_t reset_index_guest_endian); + // For use when the reset index is not 0xFFFF, and 0xFFFF is also used as a + // valid index - keeps 0xFFFF as a real index and replaces the reset index + // with 0xFFFFFFFF instead. + static void ReplaceResetIndex16To24(uint32_t* dest, const uint16_t* source, + uint32_t count, + uint16_t reset_index_guest_endian); + // The reset index and the low 24 bits mask are taken explicitly because this + // function may be used two ways: + // - Passthrough - when the vertex shader swaps the indices (when 32-bit + // indices are supported on the host), in this case HostSwap is kNone, but + // the reset index and the guest low bits mask can be swapped according to + // the guest endian. + // - Swapping for the host - when only 24 bits of an index are supported on + // the host. In this case, masking and comparison are done before applying + // HostSwap, but according to HostSwap, if needed, the data is swapped from + // the PowerPC's big endianness to the host GPU little endianness that we + // assume, which matches the Xenos's little endianness. + template + static void ReplaceResetIndex32To24(uint32_t* dest, const uint32_t* source, + uint32_t count, + uint32_t reset_index_guest_endian, + uint32_t low_bits_mask_guest_endian) { + // The Xbox 360's GPU only uses the low 24 bits of the index - masking. +#if XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count && (reinterpret_cast(source) & + (XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE - 1))) { + --count; + uint32_t index = *(source++) & low_bits_mask_guest_endian; + *(dest++) = index != reset_index_guest_endian + ? xenos::GpuSwap(index, HostSwap) + : UINT32_MAX; + } + if (count >= kSimdVectorU32Elements) { + SimdVectorU32 reset_index_guest_endian_simd = + ReplicateU32(reset_index_guest_endian); + SimdVectorU32 low_bits_mask_guest_endian_simd = + ReplicateU32(low_bits_mask_guest_endian); +#if XE_ARCH_AMD64 + __m128i host_swap_shuffle; + if constexpr (HostSwap != xenos::Endian::kNone) { + host_swap_shuffle = _mm_set_epi32( + int32_t(xenos::GpuSwap(uint32_t(0x0F0E0D0C), HostSwap)), + int32_t(xenos::GpuSwap(uint32_t(0x0B0A0908), HostSwap)), + int32_t(xenos::GpuSwap(uint32_t(0x07060504), HostSwap)), + int32_t(xenos::GpuSwap(uint32_t(0x03020100), HostSwap))); + } +#endif // XE_ARCH_AMD64 + while (count >= kSimdVectorU32Elements) { + count -= kSimdVectorU32Elements; + // Comparison produces 0 or 0xFFFF on AVX and Neon - we need 0xFFFF as + // the result for the primitive reset indices, so the result is + // `index | (index == reset_index)`. + SimdVectorU32 source_simd = LoadAlignedVectorU32(source); + source += kSimdVectorU32Elements; + SimdVectorU32 result_simd; +#if XE_ARCH_AMD64 + source_simd = + _mm_and_si128(source_simd, low_bits_mask_guest_endian_simd); + result_simd = _mm_or_si128( + source_simd, + _mm_cmpeq_epi32(source_simd, reset_index_guest_endian_simd)); + if constexpr (HostSwap != xenos::Endian::kNone) { + result_simd = _mm_shuffle_epi8(result_simd, host_swap_shuffle); + } +#elif XE_ARCH_ARM64 + source_simd = vandq_u32(source_simd, low_bits_mask_guest_endian_simd); + result_simd = vorrq_u32( + source_simd, vceqq_u32(source_simd, reset_index_guest_endian_simd)); + if constexpr (HostSwap == xenos::Endian::k8in16) { + result_simd = vreinterpretq_u32_u8( + vrev16q_u8(vreinterpretq_u8_u32(result_simd))); + } else if constexpr (HostSwap == xenos::Endian::k8in32) { + result_simd = vreinterpretq_u32_u8( + vrev32q_u8(vreinterpretq_u8_u32(result_simd))); + } else if constexpr (HostSwap == xenos::Endian::k16in32) { + result_simd = vreinterpretq_u32_u16( + vrev32q_u16(vreinterpretq_u16_u32(result_simd))); + } +#else +#error SIMD ReplaceResetIndex32To24 not implemented. +#endif // XE_ARCH + StoreUnalignedVectorU32(dest, result_simd); + dest += kSimdVectorU32Elements; + } + } +#endif // XE_GPU_PRIMITIVE_PROCESSOR_SIMD_SIZE + while (count--) { + uint32_t index = *(source++) & low_bits_mask_guest_endian; + *(dest++) = index != reset_index_guest_endian + ? xenos::GpuSwap(index, HostSwap) + : UINT32_MAX; + } + } + + // TODO(Triang3l): 16-bit > 32-bit primitive type conversion for Metal, where + // primitive reset is always enabled, if UINT16_MAX is used as a real vertex + // index. + + struct PassthroughIndexTransform { + uint16_t operator()(uint16_t index) const { return index; } + uint32_t operator()(uint32_t index) const { return index; } + }; + struct To24NonSwappingIndexTransform { + uint32_t operator()(uint32_t index) const { + return index & xenos::kVertexIndexMask; + } + }; + struct To24Swapping8In16IndexTransform { + uint32_t operator()(uint32_t index) const { + return xenos::GpuSwap(index, xenos::Endian::k8in16) & + xenos::kVertexIndexMask; + } + }; + struct To24Swapping8In32IndexTransform { + uint32_t operator()(uint32_t index) const { + return xenos::GpuSwap(index, xenos::Endian::k8in32) & + xenos::kVertexIndexMask; + } + }; + struct To24Swapping16In32IndexTransform { + uint32_t operator()(uint32_t index) const { + return xenos::GpuSwap(index, xenos::Endian::k16in32) & + xenos::kVertexIndexMask; + } + }; + + // Triangle fans as triangle lists. + // Ordered as (v1, v2, v0), (v2, v3, v0) in Direct3D. + // https://docs.microsoft.com/en-us/windows/desktop/direct3d9/triangle-fans + static constexpr uint32_t GetTriangleFanListIndexCount( + uint32_t fan_index_count) { + return fan_index_count > 2 ? (fan_index_count - 2) * 3 : 0; + } + template + static void TriangleFanToList(Index* dest, const Index* source, + uint32_t source_index_count, + const IndexTransform& index_transform) { + if (source_index_count <= 2) { + // To match GetTriangleFanListIndexCount. + return; + } + Index index_first = index_transform(source[0]); + Index index_previous = index_transform(source[1]); + for (uint32_t i = 2; i < source_index_count; ++i) { + Index index_current = index_transform(source[i]); + *(dest++) = index_previous; + *(dest++) = index_current; + *(dest++) = index_first; + index_previous = index_current; + } + } + + static constexpr uint32_t GetLineLoopStripIndexCount( + uint32_t loop_index_count) { + // Even if 2 vertices are supplied, two lines are still drawn between them. + // https://www.khronos.org/opengl/wiki/Primitive + // "You get n lines for n input vertices" + // "If the user only specifies 1 vertex, the drawing command is ignored" + return loop_index_count > 1 ? loop_index_count + 1 : 0; + } + template + static void LineLoopToStrip(Index* dest, const Index* source, + uint32_t source_index_count, + const IndexTransform& index_transform) { + if (source_index_count <= 1) { + // To match GetLineLoopStripIndexCount. + return; + } + Index index_first = index_transform(source[0]); + dest[0] = index_first; + for (uint32_t i = 1; i < source_index_count; ++i) { + dest[i] = index_transform(source[i]); + } + dest[source_index_count] = index_first; + } + static void LineLoopToStrip(uint16_t* dest, const uint16_t* source, + uint32_t source_index_count, + const PassthroughIndexTransform& index_transform); + static void LineLoopToStrip(uint32_t* dest, const uint32_t* source, + uint32_t source_index_count, + const PassthroughIndexTransform& index_transform); + + static constexpr uint32_t GetQuadListTriangleListIndexCount( + uint32_t quad_list_index_count) { + return (quad_list_index_count / 4) * 6; + } + template + static void QuadListToTriangleList(Index* dest, const Index* source, + uint32_t source_index_count, + const IndexTransform& index_transform) { + uint32_t quad_count = source_index_count / 4; + for (uint32_t i = 0; i < quad_count; ++i) { + // TODO(Triang3l): Find the correct order. + // v0, v1, v2. + Index common_index_0 = index_transform(*(source++)); + *(dest++) = common_index_0; + *(dest++) = index_transform(*(source++)); + Index common_index_2 = index_transform(*(source++)); + *(dest++) = common_index_2; + // v0, v2, v3. + *(dest++) = common_index_0; + *(dest++) = common_index_2; + *(dest++) = index_transform(*(source++)); + } + } + + // Pre-gathering the ranges allows for usage of the same functions for + // conversion with and without reset. In addition, this increases safety in + // weird cases - there won't be mismatch between the pre-calculation of the + // post-conversion index count and the actual conversion if the game for some + // reason modifies the index buffer between the two and adds or removes reset + // indices in it. + struct SinglePrimitiveRange { + SinglePrimitiveRange(uint32_t guest_offset, uint32_t guest_index_count, + uint32_t host_index_count) + : guest_offset(guest_offset), + guest_index_count(guest_index_count), + host_index_count(host_index_count) {} + uint32_t guest_offset; + uint32_t guest_index_count; + uint32_t host_index_count; + }; + static uint32_t GetMultiPrimitiveHostIndexCountAndRanges( + std::function single_primitive_guest_to_host_count, + const uint16_t* source, uint32_t source_index_count, + uint16_t reset_index_guest_endian, + std::deque& ranges_append_out); + static uint32_t GetMultiPrimitiveHostIndexCountAndRanges( + std::function single_primitive_guest_to_host_count, + const uint32_t* source, uint32_t source_index_count, + uint32_t reset_index_guest_endian, uint32_t low_bits_mask_guest_endian, + std::deque& ranges_append_out); + + template + static void ConvertSinglePrimitiveRanges( + Index* dest, const Index* source, + xenos::PrimitiveType source_primitive_type, + const IndexTransform& index_transform, + PrimitiveRangeIterator ranges_beginning, + PrimitiveRangeIterator ranges_end) { + Index* dest_write_ptr = dest; + switch (source_primitive_type) { + case xenos::PrimitiveType::kTriangleFan: + for (PrimitiveRangeIterator range_it = ranges_beginning; + range_it != ranges_end; ++range_it) { + TriangleFanToList(dest_write_ptr, source + range_it->guest_offset, + range_it->guest_index_count, index_transform); + dest_write_ptr += range_it->host_index_count; + } + break; + case xenos::PrimitiveType::kLineLoop: + for (PrimitiveRangeIterator range_it = ranges_beginning; + range_it != ranges_end; ++range_it) { + LineLoopToStrip(dest_write_ptr, source + range_it->guest_offset, + range_it->guest_index_count, index_transform); + dest_write_ptr += range_it->host_index_count; + } + break; + case xenos::PrimitiveType::kQuadList: + for (PrimitiveRangeIterator range_it = ranges_beginning; + range_it != ranges_end; ++range_it) { + QuadListToTriangleList(dest_write_ptr, + source + range_it->guest_offset, + range_it->guest_index_count, index_transform); + dest_write_ptr += range_it->host_index_count; + } + break; + default: + assert_unhandled_case(source_primitive_type); + } + } + + const RegisterFile& register_file_; + Memory& memory_; + TraceWriter& trace_writer_; + SharedMemory& shared_memory_; + + bool full_32bit_vertex_indices_used_ = false; + bool convert_triangle_fans_to_lists_ = false; + bool convert_line_loops_to_strips_ = false; + bool convert_quad_lists_to_triangle_lists_ = false; + + // Byte offsets used, for simplicity, directly as handles. + size_t builtin_ib_offset_triangle_fans_to_lists_ = SIZE_MAX; + size_t builtin_ib_offset_quad_lists_to_triangle_lists_ = SIZE_MAX; + + std::deque single_primitive_ranges_; + + // Caching for reuse of converted indices within a frame. + + // 256 KB as the largest possible guest index buffer - 0xFFFF 32-bit indices - + // is slightly smaller than 256 KB, thus cache entries need store links within + // at most 2 buckets. + static constexpr uint32_t kCacheBucketSizeBytesLog2 = 18; + static constexpr uint32_t kCacheBucketSizeBytes = + uint32_t(1) << kCacheBucketSizeBytesLog2; + static constexpr uint32_t kCacheBucketCount = + xe::align(SharedMemory::kBufferSize, kCacheBucketSizeBytes) / + kCacheBucketSizeBytes; + + union CacheKey { + struct { + uint32_t base; // 32 total + uint32_t count : 16; // 48 + xenos::IndexFormat format : 1; // 49 + xenos::Endian endian : 2; // 52 + uint32_t is_reset_enabled : 1; // 53 + // kNone if not changing the type (like only processing the reset index). + xenos::PrimitiveType conversion_guest_primitive_type : 6; // 59 + }; + uint64_t key = 0; + + CacheKey() = default; + CacheKey(uint32_t base, uint32_t count, xenos::IndexFormat format, + xenos::Endian endian, bool is_reset_enabled, + xenos::PrimitiveType conversion_guest_primitive_type = + xenos::PrimitiveType::kNone) + : base(base), + count(count), + format(format), + endian(endian), + is_reset_enabled(is_reset_enabled), + conversion_guest_primitive_type(conversion_guest_primitive_type) {} + + struct Hasher { + size_t operator()(const CacheKey& key) const { + return std::hash{}(key.key); + } + }; + bool operator==(const CacheKey& other_key) const { + return key == other_key.key; + } + + uint32_t GetSizeBytes() const { + return count * (format == xenos::IndexFormat::kInt16 ? sizeof(uint16_t) + : sizeof(uint32_t)); + } + }; + + // Subset of ConversionResult that can be reused for different primitive types + // if the same result is used irrespective of one (like when only processing + // the reset index). + struct CachedResult { + uint32_t host_draw_vertex_count; + ProcessedIndexBufferType index_buffer_type; + xenos::IndexFormat host_index_format; + xenos::Endian host_index_endian; + bool host_primitive_reset_enabled; + size_t host_index_buffer_handle; + }; + + struct CacheEntry { + static_assert( + UINT16_MAX * sizeof(uint32_t) <= + (size_t(1) << kCacheBucketSizeBytesLog2), + "Assuming that primitive processor cache entries need to store to the " + "previous and to the next entries only within up to 2 buckets, so the " + "size of the cache buckets must be not smaller than the maximum guest " + "index buffer size"); + union { + size_t free_next; + size_t buckets_prev[2]; + }; + size_t buckets_next[2]; + CacheKey key; + CachedResult result; + static uint32_t GetBucketCount(CacheKey key) { + uint32_t count = + ((key.base + (key.GetSizeBytes() - 1)) >> kCacheBucketSizeBytesLog2) - + (key.base >> kCacheBucketSizeBytesLog2) + 1; + assert_true(count <= 2, + "Cache entries only store list links within two buckets"); + return count; + } + uint32_t GetBucketCount() const { return GetBucketCount(key); } + }; + + // A cache transaction performs a few operations in a RAII-like way (so + // processing may return an error for any reason, and won't have to clean up + // cache_currently_processing_base_ / size_bytes_ explicitly): + // - Transaction initialization: + // - Lookup of previously processed indices in the cache. + // - If not found, beginning to add a new entry that is going to be + // processed: + // - Marking the range as currently being processed, for slightly safer + // race condition handling if one happens - if invalidation happens + // during the transaction (but outside a global critical region lock, + // since processing may take a long time), the new cache entry won't be + // stored as it will already be invalid at the time of the completion of + // the transaction. + // - Enabling an access callback for the range. + // - Setting the new result after processing (if not found in the cache + // previously). + // - Transaction completion: + // - If the range wasn't invalidated during the transaction, storing the new + // entry in the cache. + // If an entry was found in the cache (GetFoundResult results non-null), it + // MUST be used instead of processing - this class doesn't provide the + // possibility replace existing entries. + class CacheTransaction final { + public: + CacheTransaction(PrimitiveProcessor& processor, CacheKey key); + const CachedResult* GetFoundResult() const { + return result_type_ == ResultType::kExisting ? &result_ : nullptr; + } + void SetNewResult(const CachedResult& new_result) { + // Replacement of an existing entry is not allowed. + assert_true(result_type_ != ResultType::kExisting); + result_ = new_result; + result_type_ = ResultType::kNewSet; + } + ~CacheTransaction(); + + private: + PrimitiveProcessor& processor_; + // If key_.count == 0, this transaction shouldn't do anything - for empty + // ranges it's pointless, and it's unsafe to get the end pointer without + // special logic, and count == 0 is also used as a special indicator for + // vertex count below the cache usage threshold. + CacheKey key_; + CachedResult result_; + enum class ResultType { + kNewUnset, + kNewSet, + kExisting, + }; + ResultType result_type_ = ResultType::kNewUnset; + }; + + std::deque cache_entry_pool_; + + void* memory_invalidation_callback_handle_ = nullptr; + + xe::global_critical_region global_critical_region_; + // Modified by both the processor and the invalidation callback. + std::unordered_map cache_map_; + // The conversion is performed while the lock is released since it may take a + // long time. + // If during the conversion the region currently being converted is + // invalidated, the current entry will not be added to the cache. + // Modified by the processor, read by the invalidation callback. + uint32_t cache_currently_processing_base_ = 0; + // 0 if not in a cache transaction that hasn't found an existing entry + // currently. + uint32_t cache_currently_processing_size_bytes_ = 0; + // Modified by both the processor and the invalidation callback. + size_t cache_bucket_free_first_entry_ = SIZE_MAX; + // Modified by both the processor and the invalidation callback. + uint64_t cache_buckets_non_empty_l1_[(kCacheBucketCount + 63) / 64] = {}; + // For even faster handling of memory invalidation - whether any bit is set in + // each cache_buckets_non_empty_l1_. + // Modified by both the processor and the invalidation callback. + uint64_t cache_buckets_non_empty_l2_[(kCacheBucketCount + (64 * 64 - 1)) / + (64 * 64)] = {}; + // Must be called in a global critical region. + void UpdateCacheBucketsNonEmptyL2( + uint32_t bucket_index_div_64, + [[maybe_unused]] const std::unique_lock& + global_lock) { + uint64_t& cache_buckets_non_empty_l2_ref = + cache_buckets_non_empty_l2_[bucket_index_div_64 >> 6]; + uint64_t cache_buckets_non_empty_l2_bit = uint64_t(1) + << (bucket_index_div_64 & 63); + if (cache_buckets_non_empty_l1_[bucket_index_div_64]) { + cache_buckets_non_empty_l2_ref |= cache_buckets_non_empty_l2_bit; + } else { + cache_buckets_non_empty_l2_ref &= ~cache_buckets_non_empty_l2_bit; + } + } + // cache_buckets_non_empty_l1_ (along with cache_buckets_non_empty_l2_, which + // must be kept in sync) used for indication whether each entry is non-empty, + // for faster clearing (there's no special index here for an empty entry). + // Huge, so it's the last in the class. + // Modified by both the processor and the invalidation callback. + size_t cache_bucket_first_entries_[kCacheBucketCount]; + static std::pair MemoryInvalidationCallbackThunk( + void* context_ptr, uint32_t physical_address_start, uint32_t length, + bool exact_range); +}; + +} // namespace gpu +} // namespace xe + +#endif // XENIA_GPU_PRIMITIVE_PROCESSOR_H_ diff --git a/src/xenia/gpu/register_table.inc b/src/xenia/gpu/register_table.inc index 31e08e60e..8da898a5a 100644 --- a/src/xenia/gpu/register_table.inc +++ b/src/xenia/gpu/register_table.inc @@ -342,6 +342,8 @@ XE_GPU_REGISTER(0x2184, kDword, SQ_WRAPPING_1) // These three registers are set by the command processor. XE_GPU_REGISTER(0x21F9, kDword, VGT_EVENT_INITIATOR) +XE_GPU_REGISTER(0x21FA, kDword, VGT_DMA_BASE) +XE_GPU_REGISTER(0x21FB, kDword, VGT_DMA_SIZE) XE_GPU_REGISTER(0x21FC, kDword, VGT_DRAW_INITIATOR) XE_GPU_REGISTER(0x21FD, kDword, VGT_IMMED_DATA) @@ -419,6 +421,11 @@ XE_GPU_REGISTER(0x2323, kDword, RB_COPY_SURFACE_SLICE) XE_GPU_REGISTER(0x2324, kDword, RB_SAMPLE_COUNT_CTL) XE_GPU_REGISTER(0x2325, kDword, RB_SAMPLE_COUNT_ADDR) +// Polygon offset scales and offsets are 32-bit floating-point. +// "slope computed in subpixels (1/12 or 1/16)" - R5xx Acceleration. +// But the correct scale for conversion of the slope scale (FRONT_BACK/SCALE) +// from subpixels to pixels is likely 1/16 according to: +// https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L946 XE_GPU_REGISTER(0x2380, kFloat, PA_SU_POLY_OFFSET_FRONT_SCALE) XE_GPU_REGISTER(0x2381, kFloat, PA_SU_POLY_OFFSET_FRONT_OFFSET) XE_GPU_REGISTER(0x2382, kFloat, PA_SU_POLY_OFFSET_BACK_SCALE) diff --git a/src/xenia/gpu/registers.h b/src/xenia/gpu/registers.h index 9d1ce4886..2fc23b2c8 100644 --- a/src/xenia/gpu/registers.h +++ b/src/xenia/gpu/registers.h @@ -185,6 +185,16 @@ static_assert_size(SQ_INTERPOLATOR_CNTL, sizeof(uint32_t)); *******************************************************************************/ +union alignas(uint32_t) VGT_DMA_SIZE { + struct { + uint32_t num_words : 24; // +0 + uint32_t : 6; // +24 + xenos::Endian swap_mode : 2; // +30 + }; + uint32_t value; + static constexpr Register register_index = XE_GPU_REG_VGT_DMA_SIZE; +}; + union alignas(uint32_t) VGT_DRAW_INITIATOR { // Different than on A2xx and R6xx/R7xx. struct { @@ -202,6 +212,69 @@ union alignas(uint32_t) VGT_DRAW_INITIATOR { }; static_assert_size(VGT_DRAW_INITIATOR, sizeof(uint32_t)); +// Unlike on R6xx (but closer to R5xx), and according to the Adreno 200 header, +// the registers related to the vertex index are 24-bit. Vertex indices are +// unsigned, and only the lower 24 bits of them are actually used by the GPU - +// this has been verified on an Adreno 200 phone (LG Optimus L7) on OpenGL ES +// using a GL_UNSIGNED_INT element array buffer with junk in the upper 8 bits +// that had no effect on drawing. + +// The order of operations is primitive reset index checking -> offsetting -> +// clamping. + +union alignas(uint32_t) VGT_MULTI_PRIM_IB_RESET_INDX { + struct { + // The upper 8 bits of the value from the index buffer are confirmed to be + // ignored. So, though this specifically is untested (because + // GL_PRIMITIVE_RESTART_FIXED_INDEX was added only in OpenGL ES 3.0, though + // it behaves conceptually close to our expectations anyway - uses the + // 0xFFFFFFFF restart index while GL_MAX_ELEMENT_INDEX may be 0xFFFFFF), + // the restart index check likely only involves the lower 24 bit of the + // vertex index - therefore, if reset_indx is 0xFFFFFF, likely 0xFFFFFF, + // 0x1FFFFFF, 0xFFFFFFFF all cause primitive reset. + uint32_t reset_indx : 24; + }; + uint32_t value; + static constexpr Register register_index = + XE_GPU_REG_VGT_MULTI_PRIM_IB_RESET_INDX; +}; +static_assert_size(VGT_MULTI_PRIM_IB_RESET_INDX, sizeof(uint32_t)); + +union alignas(uint32_t) VGT_INDX_OFFSET { + struct { + // Unlike R5xx's VAP_INDEX_OFFSET, which is signed 25-bit, this is 24-bit - + // and signedness doesn't matter as index calculations are done in 24-bit + // integers, and ((0xFFFFFE + 3) & 0xFFFFFF) == 1 anyway, just like + // ((0xFFFFFFFE + 3) & 0xFFFFFF) == 1 if we treated it as signed by + // sign-extending on the host. Direct3D 9 just writes BaseVertexIndex as a + // signed int32 to the entire register, but the upper 8 bits are ignored + // anyway, and that has no effect on offsets that fit in 24 bits. + uint32_t indx_offset : 24; + }; + uint32_t value; + static constexpr Register register_index = XE_GPU_REG_VGT_INDX_OFFSET; +}; +static_assert_size(VGT_INDX_OFFSET, sizeof(uint32_t)); + +union alignas(uint32_t) VGT_MIN_VTX_INDX { + struct { + uint32_t min_indx : 24; + }; + uint32_t value; + static constexpr Register register_index = XE_GPU_REG_VGT_MIN_VTX_INDX; +}; +static_assert_size(VGT_MIN_VTX_INDX, sizeof(uint32_t)); + +union alignas(uint32_t) VGT_MAX_VTX_INDX { + struct { + // Usually 0xFFFF or 0xFFFFFF. + uint32_t max_indx : 24; + }; + uint32_t value; + static constexpr Register register_index = XE_GPU_REG_VGT_MAX_VTX_INDX; +}; +static_assert_size(VGT_MAX_VTX_INDX, sizeof(uint32_t)); + union alignas(uint32_t) VGT_OUTPUT_PATH_CNTL { struct { xenos::VGTOutputPath path_select : 2; // +0 @@ -261,7 +334,11 @@ union alignas(uint32_t) PA_SU_SC_MODE_CNTL { uint32_t cull_front : 1; // +0 uint32_t cull_back : 1; // +1 // 0 - front is CCW, 1 - front is CW. - uint32_t face : 1; // +2 + uint32_t face : 1; // +2 + // The game Fuse uses poly_mode 2 for triangles, which is "reserved" on R6xx + // and not defined on Adreno 2xx, but polymode_front/back_ptype are 0 + // (points) in this case in Fuse, which should not be respected for + // non-kDualMode as the game wants to draw filled triangles. xenos::PolygonModeEnable poly_mode : 2; // +3 xenos::PolygonType polymode_front_ptype : 3; // +5 xenos::PolygonType polymode_back_ptype : 3; // +8 @@ -430,10 +507,15 @@ union alignas(uint32_t) PA_SC_WINDOW_SCISSOR_BR { static_assert_size(PA_SC_WINDOW_SCISSOR_BR, sizeof(uint32_t)); /******************************************************************************* - ___ ___ - | _ \ _ ) - | / _ \ - |_|_\___/ + ___ ___ _ _ ___ ___ ___ + | _ \ __| \| | \| __| _ \ + | / _|| .` | |) | _|| / + |_|_\___|_|\_|___/|___|_|_\ + + ___ _ ___ _ _____ _ _ ___ + | _ ) /_\ / __| |/ / __| \| | \ + | _ \/ _ \ (__| ' <| _|| .` | |) | + |___/_/ \_\___|_|\_\___|_|\_|___/ *******************************************************************************/ diff --git a/src/xenia/gpu/render_target_cache.cc b/src/xenia/gpu/render_target_cache.cc index f87f7272d..76a3a2ef8 100644 --- a/src/xenia/gpu/render_target_cache.cc +++ b/src/xenia/gpu/render_target_cache.cc @@ -424,7 +424,7 @@ bool RenderTargetCache::Update(bool is_rasterization_done, uint32_t depth_and_color_rts_used_bits = 0; // depth_and_color_rts_used_bits -> EDRAM base. uint32_t edram_bases[1 + xenos::kMaxColorRenderTargets]; - uint32_t host_relevant_formats[1 + xenos::kMaxColorRenderTargets]; + uint32_t resource_formats[1 + xenos::kMaxColorRenderTargets]; uint32_t rts_are_64bpp = 0; uint32_t color_rts_are_gamma = 0; if (is_rasterization_done) { @@ -438,7 +438,7 @@ bool RenderTargetCache::Update(bool is_rasterization_done, std::min(rb_depth_info.depth_base, xenos::kEdramTileCount); // With pixel shader interlock, always the same addressing disregarding // the format. - host_relevant_formats[0] = + resource_formats[0] = interlock_barrier_only ? 0 : uint32_t(rb_depth_info.depth_format); } if (regs.Get().edram_mode == @@ -468,20 +468,19 @@ bool RenderTargetCache::Update(bool is_rasterization_done, if (color_format == xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) { color_rts_are_gamma |= uint32_t(1) << rt_index; } - xenos::ColorRenderTargetFormat color_host_relevant_format; + xenos::ColorRenderTargetFormat color_resource_format; if (interlock_barrier_only) { // Only changes in mapping between coordinates and addresses are // interesting (along with access overlap between draw calls), thus // only pixel size is relevant. - color_host_relevant_format = + color_resource_format = is_64bpp ? xenos::ColorRenderTargetFormat::k_16_16_16_16 : xenos::ColorRenderTargetFormat::k_8_8_8_8; } else { - color_host_relevant_format = GetHostRelevantColorFormat( + color_resource_format = GetColorResourceFormat( xenos::GetStorageColorFormat(color_format)); } - host_relevant_formats[rt_bit_index] = - uint32_t(color_host_relevant_format); + resource_formats[rt_bit_index] = uint32_t(color_resource_format); } } } @@ -585,10 +584,11 @@ bool RenderTargetCache::Update(bool is_rasterization_done, // Using floor, or, rather, truncation (because maxing with zero anyway) // similar to how viewport scissoring behaves on real AMD, Intel and Nvidia // GPUs on Direct3D 12, also like in draw_util::GetHostViewportInfo. - // fmax to drop NaN and < 0, min as float (height_used is well below 2^24) - // to safely drop very large values. - height_used = uint32_t( - std::min(std::fmax(viewport_bottom, 0.0f), float(height_used))); + // max(0.0f, viewport_bottom) to drop NaN and < 0 - max picks the first + // argument in the !(a < b) case (always for NaN), min as float (height_used + // is well below 2^24) to safely drop very large values. + height_used = + uint32_t(std::min(float(height_used), std::max(0.0f, viewport_bottom))); } int32_t scissor_bottom = int32_t(regs.Get().br_y); @@ -658,7 +658,7 @@ bool RenderTargetCache::Update(bool is_rasterization_done, rt_key.pitch_tiles_at_32bpp = pitch_tiles_at_32bpp; rt_key.msaa_samples = msaa_samples; rt_key.is_depth = rt_bit_index == 0; - rt_key.host_relevant_format = host_relevant_formats[rt_bit_index]; + rt_key.resource_format = resource_formats[rt_bit_index]; if (!interlock_barrier_only) { RenderTarget* render_target = GetOrCreateRenderTarget(rt_key); if (!render_target) { @@ -800,6 +800,7 @@ bool RenderTargetCache::Update(bool is_rasterization_done, } uint32_t RenderTargetCache::GetLastUpdateBoundRenderTargets( + bool distinguish_gamma_formats, uint32_t* depth_and_color_formats_out) const { if (GetPath() != Path::kHostRenderTargets) { if (depth_and_color_formats_out) { @@ -821,7 +822,11 @@ uint32_t RenderTargetCache::GetLastUpdateBoundRenderTargets( rts_used |= uint32_t(1) << i; if (depth_and_color_formats_out) { depth_and_color_formats_out[i] = - render_target->key().host_relevant_format; + (distinguish_gamma_formats && i && + (last_update_accumulated_color_targets_are_gamma_ & + (uint32_t(1) << (i - 1)))) + ? uint32_t(xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) + : render_target->key().resource_format; } } return rts_used; @@ -840,7 +845,9 @@ RenderTargetCache::GetConfigDepthFloat24Conversion() { uint32_t RenderTargetCache::GetRenderTargetHeight( uint32_t pitch_tiles_at_32bpp, xenos::MsaaSamples msaa_samples) const { - assert_not_zero(pitch_tiles_at_32bpp); + if (!pitch_tiles_at_32bpp) { + return 0; + } // Down to the end of EDRAM. uint32_t tile_rows = (xenos::kEdramTileCount + (pitch_tiles_at_32bpp - 1)) / pitch_tiles_at_32bpp; @@ -1082,7 +1089,7 @@ bool RenderTargetCache::PrepareHostRenderTargetsResolveClear( depth_render_target_key.pitch_tiles_at_32bpp = pitch_tiles_at_32bpp; depth_render_target_key.msaa_samples = msaa_samples; depth_render_target_key.is_depth = 1; - depth_render_target_key.host_relevant_format = + depth_render_target_key.resource_format = resolve_info.depth_edram_info.format; depth_render_target = GetOrCreateRenderTarget(depth_render_target_key); if (!depth_render_target) { @@ -1097,9 +1104,8 @@ bool RenderTargetCache::PrepareHostRenderTargetsResolveClear( color_render_target_key.pitch_tiles_at_32bpp = pitch_tiles_at_32bpp; color_render_target_key.msaa_samples = msaa_samples; color_render_target_key.is_depth = 0; - color_render_target_key.host_relevant_format = - uint32_t(GetHostRelevantColorFormat(xenos::ColorRenderTargetFormat( - resolve_info.color_edram_info.format))); + color_render_target_key.resource_format = uint32_t(GetColorResourceFormat( + xenos::ColorRenderTargetFormat(resolve_info.color_edram_info.format))); color_render_target = GetOrCreateRenderTarget(color_render_target_key); if (!color_render_target) { color_render_target_key = RenderTargetKey(); @@ -1160,8 +1166,8 @@ RenderTargetCache::PrepareFullEdram1280xRenderTargetForSnapshotRestoration( } RenderTargetKey render_target_key; render_target_key.pitch_tiles_at_32bpp = kPitchTilesAt32bpp; - render_target_key.host_relevant_format = uint32_t( - GetHostRelevantColorFormat(xenos::GetStorageColorFormat(color_format))); + render_target_key.resource_format = + uint32_t(GetColorResourceFormat(color_format)); RenderTarget* render_target = GetOrCreateRenderTarget(render_target_key); if (!render_target) { return nullptr; @@ -1213,14 +1219,14 @@ RenderTargetCache::RenderTarget* RenderTargetCache::GetOrCreateRenderTarget( "Created a {}x{} {}xMSAA {} render target with guest format {} at " "EDRAM base {}", width, height, uint32_t(1) << uint32_t(key.msaa_samples), - key.is_depth ? "depth" : "color", key.host_relevant_format, + key.is_depth ? "depth" : "color", key.resource_format, key.base_tiles); } else { XELOGE( "Failed to create a {}x{} {}xMSAA {} render target with guest format " "{} at EDRAM base {}", width, height, uint32_t(1) << uint32_t(key.msaa_samples), - key.is_depth ? "depth" : "color", key.host_relevant_format, + key.is_depth ? "depth" : "color", key.resource_format, key.base_tiles); } // Insert even if failed to create, not to try to create again. @@ -1338,8 +1344,7 @@ void RenderTargetCache::ChangeOwnership( nullptr, resolve_clear_cutout)) { RenderTargetKey transfer_host_depth_source = host_depth_encoding_different - ? it->second - .host_depth_render_targets[dest.host_relevant_format] + ? it->second.host_depth_render_targets[dest.resource_format] : RenderTargetKey(); if (transfer_host_depth_source == transfer_source) { // Same render target, don't provide a separate host depth source. @@ -1384,7 +1389,7 @@ void RenderTargetCache::ChangeOwnership( // Claim the current range. it->second.render_target = dest; if (host_depth_encoding_different) { - it->second.host_depth_render_targets[dest.host_relevant_format] = dest; + it->second.host_depth_render_targets[dest.resource_format] = dest; } // Check if can merge with the next range after claiming. std::map::iterator it_next; diff --git a/src/xenia/gpu/render_target_cache.h b/src/xenia/gpu/render_target_cache.h index bd4def049..a3d580356 100644 --- a/src/xenia/gpu/render_target_cache.h +++ b/src/xenia/gpu/render_target_cache.h @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -180,8 +181,10 @@ class RenderTargetCache { // Returns bits where 0 is whether a depth render target is currently bound on // the host and 1... are whether the same applies to color render targets, and - // "host-relevant" formats of each. + // formats (resource formats, but if needed, with gamma taken into account) of + // each. uint32_t GetLastUpdateBoundRenderTargets( + bool distinguish_gamma_formats, uint32_t* depth_and_color_formats_out = nullptr) const; protected: @@ -222,16 +225,13 @@ class RenderTargetCache { uint32_t pitch_tiles_at_32bpp : 8; // 19 xenos::MsaaSamples msaa_samples : xenos::kMsaaSamplesBits; // 21 uint32_t is_depth : 1; // 22 - // Not always the original format - blending precision ignored, formats - // handled through the same render targets on the host are normalized, and - // with pixel shader interlock, replaced with some single 32bpp or 64bpp - // format because it's only needed for addressing. - uint32_t host_relevant_format : xenos::kRenderTargetFormatBits; // 26 + // Ignoring the blending precision and sRGB. + uint32_t resource_format : xenos::kRenderTargetFormatBits; // 26 }; uint32_t key = 0; struct Hasher { - size_t operator()(const RenderTargetKey& key) const { - return std::hash{}(key.key); + size_t operator()(const RenderTargetKey& render_target_key) const { + return std::hash{}(render_target_key.key); } }; bool operator==(const RenderTargetKey& other_key) const { @@ -249,11 +249,11 @@ class RenderTargetCache { xenos::ColorRenderTargetFormat GetColorFormat() const { assert_false(is_depth); - return xenos::ColorRenderTargetFormat(host_relevant_format); + return xenos::ColorRenderTargetFormat(resource_format); } xenos::DepthRenderTargetFormat GetDepthFormat() const { assert_true(is_depth); - return xenos::DepthRenderTargetFormat(host_relevant_format); + return xenos::DepthRenderTargetFormat(resource_format); } bool Is64bpp() const { if (is_depth) { @@ -265,11 +265,15 @@ class RenderTargetCache { uint32_t GetPitchTiles() const { return pitch_tiles_at_32bpp << uint32_t(Is64bpp()); } - uint32_t GetWidth() const { + static constexpr uint32_t GetWidth(uint32_t pitch_tiles_at_32bpp, + xenos::MsaaSamples msaa_samples) { return pitch_tiles_at_32bpp * (xenos::kEdramTileWidthSamples >> uint32_t(msaa_samples >= xenos::MsaaSamples::k4X)); } + uint32_t GetWidth() const { + return GetWidth(pitch_tiles_at_32bpp, msaa_samples); + } std::string GetDebugName() const { return fmt::format( @@ -435,15 +439,6 @@ class RenderTargetCache { uint32_t GetRenderTargetHeight(uint32_t pitch_tiles_at_32bpp, xenos::MsaaSamples msaa_samples) const; - // Normalizes the format if it's fine to use the same render target textures - // for the provided and the returned guest formats. - // xenos::GetStorageColorFormat is supposed to be done before calling, so - // redoing what it does in the implementations is not needed. - virtual xenos::ColorRenderTargetFormat GetHostRelevantColorFormat( - xenos::ColorRenderTargetFormat format) const { - return format; - } - virtual RenderTarget* CreateRenderTarget(RenderTargetKey key) = 0; // Whether depth buffer is encoded differently on the host, thus after @@ -566,7 +561,7 @@ class RenderTargetCache { return false; } if (host_depth_encoding_different && !key.is_depth && - host_depth_render_targets[key.host_relevant_format] != key) { + host_depth_render_targets[key.resource_format] != key) { // Depth encoding is the same, but different addressing is needed. return false; } @@ -581,6 +576,16 @@ class RenderTargetCache { } }; + static constexpr xenos::ColorRenderTargetFormat GetColorResourceFormat( + xenos::ColorRenderTargetFormat format) { + // sRGB, if used on the host, is a view property or global state - linear + // and sRGB host render targets can share data directly without transfers. + if (format == xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) { + return xenos::ColorRenderTargetFormat::k_8_8_8_8; + } + return xenos::GetStorageColorFormat(format); + } + RenderTarget* GetOrCreateRenderTarget(RenderTargetKey key); // Checks if changing ownership of the range to the specified render target diff --git a/src/xenia/gpu/d3d12/shaders/adaptive_quad.hs.hlsl b/src/xenia/gpu/shaders/adaptive_quad.hs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/adaptive_quad.hs.hlsl rename to src/xenia/gpu/shaders/adaptive_quad.hs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/adaptive_triangle.hs.hlsl b/src/xenia/gpu/shaders/adaptive_triangle.hs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/adaptive_triangle.hs.hlsl rename to src/xenia/gpu/shaders/adaptive_triangle.hs.hlsl diff --git a/src/xenia/gpu/shaders/bytecode/.clang-format b/src/xenia/gpu/shaders/bytecode/.clang-format new file mode 100644 index 000000000..e3845288a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/.clang-format @@ -0,0 +1 @@ +DisableFormat: true diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_quad_hs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_quad_hs.h new file mode 100644 index 000000000..ecae25810 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_quad_hs.h @@ -0,0 +1,287 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Patch Constant signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_TessFactor 0 x 0 QUADEDGE float x +// SV_TessFactor 1 x 1 QUADEDGE float x +// SV_TessFactor 2 x 2 QUADEDGE float x +// SV_TessFactor 3 x 3 QUADEDGE float x +// SV_InsideTessFactor 0 x 4 QUADINT float x +// SV_InsideTessFactor 1 x 5 QUADINT float x +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XETESSFACTOR 0 x 0 NONE float x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// Tessellation Domain # of control points +// -------------------- -------------------- +// Quadrilateral 4 +// +// Tessellation Output Primitive Partitioning Type +// ------------------------------ ------------------ +// Clockwise Triangles Even Fractional +// +hs_5_1 +hs_decls +dcl_input_control_point_count 4 +dcl_output_control_point_count 4 +dcl_tessellator_domain domain_quad +dcl_tessellator_partitioning partitioning_fractional_even +dcl_tessellator_output_primitive output_triangle_cw +dcl_globalFlags refactoringAllowed +hs_control_point_phase +dcl_output o0.x +mov o0.x, l(0) +ret +hs_fork_phase +dcl_hs_fork_phase_instance_count 4 +dcl_input vForkInstanceID +dcl_input vicp[4][0].x +dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor +dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor +dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor +dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor +dcl_temps 1 +dcl_indexrange o0.x 4 +iadd r0.x, vForkInstanceID.x, l(3) +and r0.x, r0.x, l(3) +mov r0.y, vForkInstanceID.x +mov o[r0.y + 0].x, vicp[r0.x + 0][0].x +ret +hs_fork_phase +dcl_hs_fork_phase_instance_count 2 +dcl_input vForkInstanceID +dcl_input vicp[4][0].x +dcl_output_siv o4.x, finalQuadUInsideTessFactor +dcl_output_siv o5.x, finalQuadVInsideTessFactor +dcl_temps 1 +dcl_indexrange o4.x 2 +ult r0.x, vForkInstanceID.x, l(1) +movc r0.x, r0.x, l(0), l(3) +ineg r0.y, vForkInstanceID.x +min r0.x, vicp[r0.y + 2][0].x, vicp[r0.x + 0][0].x +mov r0.y, vForkInstanceID.x +mov o[r0.y + 4].x, r0.x +ret +// Approximately 14 instruction slots used +#endif + +const BYTE adaptive_quad_hs[] = +{ + 68, 88, 66, 67, 94, 229, + 104, 122, 195, 92, 144, 36, + 252, 149, 235, 210, 131, 205, + 139, 42, 1, 0, 0, 0, + 176, 4, 0, 0, 6, 0, + 0, 0, 56, 0, 0, 0, + 164, 0, 0, 0, 220, 0, + 0, 0, 16, 1, 0, 0, + 212, 1, 0, 0, 20, 4, + 0, 0, 82, 68, 69, 70, + 100, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 60, 0, + 0, 0, 1, 5, 83, 72, + 0, 5, 4, 0, 60, 0, + 0, 0, 19, 19, 68, 37, + 60, 0, 0, 0, 24, 0, + 0, 0, 40, 0, 0, 0, + 40, 0, 0, 0, 36, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 77, 105, + 99, 114, 111, 115, 111, 102, + 116, 32, 40, 82, 41, 32, + 72, 76, 83, 76, 32, 83, + 104, 97, 100, 101, 114, 32, + 67, 111, 109, 112, 105, 108, + 101, 114, 32, 49, 48, 46, + 49, 0, 73, 83, 71, 78, + 48, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 1, 1, 0, 0, + 88, 69, 84, 69, 83, 83, + 70, 65, 67, 84, 79, 82, + 0, 171, 171, 171, 79, 83, + 71, 78, 44, 0, 0, 0, + 1, 0, 0, 0, 8, 0, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 1, 14, + 0, 0, 88, 69, 86, 69, + 82, 84, 69, 88, 73, 68, + 0, 171, 80, 67, 83, 71, + 188, 0, 0, 0, 6, 0, + 0, 0, 8, 0, 0, 0, + 152, 0, 0, 0, 0, 0, + 0, 0, 11, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 1, 14, 0, 0, + 152, 0, 0, 0, 1, 0, + 0, 0, 11, 0, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 0, 1, 14, 0, 0, + 152, 0, 0, 0, 2, 0, + 0, 0, 11, 0, 0, 0, + 3, 0, 0, 0, 2, 0, + 0, 0, 1, 14, 0, 0, + 152, 0, 0, 0, 3, 0, + 0, 0, 11, 0, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 1, 14, 0, 0, + 166, 0, 0, 0, 0, 0, + 0, 0, 12, 0, 0, 0, + 3, 0, 0, 0, 4, 0, + 0, 0, 1, 14, 0, 0, + 166, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 3, 0, 0, 0, 5, 0, + 0, 0, 1, 14, 0, 0, + 83, 86, 95, 84, 101, 115, + 115, 70, 97, 99, 116, 111, + 114, 0, 83, 86, 95, 73, + 110, 115, 105, 100, 101, 84, + 101, 115, 115, 70, 97, 99, + 116, 111, 114, 0, 171, 171, + 83, 72, 69, 88, 56, 2, + 0, 0, 81, 0, 3, 0, + 142, 0, 0, 0, 113, 0, + 0, 1, 147, 32, 0, 1, + 148, 32, 0, 1, 149, 24, + 0, 1, 150, 32, 0, 1, + 151, 24, 0, 1, 106, 8, + 0, 1, 114, 0, 0, 1, + 101, 0, 0, 3, 18, 32, + 16, 0, 0, 0, 0, 0, + 54, 0, 0, 5, 18, 32, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 115, 0, 0, 1, 153, 0, + 0, 2, 4, 0, 0, 0, + 95, 0, 0, 2, 0, 112, + 1, 0, 95, 0, 0, 4, + 18, 144, 33, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 103, 0, 0, 4, 18, 32, + 16, 0, 0, 0, 0, 0, + 11, 0, 0, 0, 103, 0, + 0, 4, 18, 32, 16, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 103, 0, 0, 4, + 18, 32, 16, 0, 2, 0, + 0, 0, 13, 0, 0, 0, + 103, 0, 0, 4, 18, 32, + 16, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 104, 0, + 0, 2, 1, 0, 0, 0, + 91, 0, 0, 4, 18, 32, + 16, 0, 0, 0, 0, 0, + 4, 0, 0, 0, 30, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 112, + 1, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 7, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 54, 0, 0, 4, + 34, 0, 16, 0, 0, 0, + 0, 0, 10, 112, 1, 0, + 54, 0, 0, 8, 18, 32, + 144, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 10, 144, + 161, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 115, 0, 0, 1, 153, 0, + 0, 2, 2, 0, 0, 0, + 95, 0, 0, 2, 0, 112, + 1, 0, 95, 0, 0, 4, + 18, 144, 33, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 103, 0, 0, 4, 18, 32, + 16, 0, 4, 0, 0, 0, + 15, 0, 0, 0, 103, 0, + 0, 4, 18, 32, 16, 0, + 5, 0, 0, 0, 16, 0, + 0, 0, 104, 0, 0, 2, + 1, 0, 0, 0, 91, 0, + 0, 4, 18, 32, 16, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 79, 0, 0, 6, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 112, 1, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 55, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 40, 0, 0, 4, + 34, 0, 16, 0, 0, 0, + 0, 0, 10, 112, 1, 0, + 51, 0, 0, 12, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 144, 225, 0, 2, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 10, 144, 161, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 4, 34, 0, + 16, 0, 0, 0, 0, 0, + 10, 112, 1, 0, 54, 0, + 0, 7, 18, 32, 208, 0, + 4, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 14, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 5, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 3, 0, 0, 0, 4, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_triangle_hs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_triangle_hs.h new file mode 100644 index 000000000..682d79b83 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/adaptive_triangle_hs.h @@ -0,0 +1,242 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Patch Constant signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_TessFactor 0 x 0 TRIEDGE float x +// SV_TessFactor 1 x 1 TRIEDGE float x +// SV_TessFactor 2 x 2 TRIEDGE float x +// SV_InsideTessFactor 0 x 3 TRIINT float x +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XETESSFACTOR 0 x 0 NONE float x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// Tessellation Domain # of control points +// -------------------- -------------------- +// Triangle 3 +// +// Tessellation Output Primitive Partitioning Type +// ------------------------------ ------------------ +// Clockwise Triangles Even Fractional +// +hs_5_1 +hs_decls +dcl_input_control_point_count 3 +dcl_output_control_point_count 3 +dcl_tessellator_domain domain_tri +dcl_tessellator_partitioning partitioning_fractional_even +dcl_tessellator_output_primitive output_triangle_cw +dcl_globalFlags refactoringAllowed +hs_control_point_phase +dcl_output o0.x +mov o0.x, l(0) +ret +hs_fork_phase +dcl_hs_fork_phase_instance_count 3 +dcl_input vForkInstanceID +dcl_input vicp[3][0].x +dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor +dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor +dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor +dcl_temps 1 +dcl_indexrange o0.x 3 +iadd r0.x, vForkInstanceID.x, l(1) +udiv null, r0.x, r0.x, l(3) +mov r0.y, vForkInstanceID.x +mov o[r0.y + 0].x, vicp[r0.x + 0][0].x +ret +hs_fork_phase +dcl_input vicp[3][0].x +dcl_output_siv o3.x, finalTriInsideTessFactor +dcl_temps 1 +min r0.x, vicp[2][0].x, vicp[1][0].x +min o3.x, r0.x, vicp[0][0].x +ret +// Approximately 10 instruction slots used +#endif + +const BYTE adaptive_triangle_hs[] = +{ + 68, 88, 66, 67, 86, 168, + 189, 119, 111, 17, 238, 147, + 225, 129, 174, 39, 170, 24, + 24, 225, 1, 0, 0, 0, + 224, 3, 0, 0, 6, 0, + 0, 0, 56, 0, 0, 0, + 164, 0, 0, 0, 220, 0, + 0, 0, 16, 1, 0, 0, + 164, 1, 0, 0, 68, 3, + 0, 0, 82, 68, 69, 70, + 100, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 60, 0, + 0, 0, 1, 5, 83, 72, + 0, 5, 4, 0, 60, 0, + 0, 0, 19, 19, 68, 37, + 60, 0, 0, 0, 24, 0, + 0, 0, 40, 0, 0, 0, + 40, 0, 0, 0, 36, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 77, 105, + 99, 114, 111, 115, 111, 102, + 116, 32, 40, 82, 41, 32, + 72, 76, 83, 76, 32, 83, + 104, 97, 100, 101, 114, 32, + 67, 111, 109, 112, 105, 108, + 101, 114, 32, 49, 48, 46, + 49, 0, 73, 83, 71, 78, + 48, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 1, 1, 0, 0, + 88, 69, 84, 69, 83, 83, + 70, 65, 67, 84, 79, 82, + 0, 171, 171, 171, 79, 83, + 71, 78, 44, 0, 0, 0, + 1, 0, 0, 0, 8, 0, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 1, 14, + 0, 0, 88, 69, 86, 69, + 82, 84, 69, 88, 73, 68, + 0, 171, 80, 67, 83, 71, + 140, 0, 0, 0, 4, 0, + 0, 0, 8, 0, 0, 0, + 104, 0, 0, 0, 0, 0, + 0, 0, 13, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 1, 14, 0, 0, + 104, 0, 0, 0, 1, 0, + 0, 0, 13, 0, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 0, 1, 14, 0, 0, + 104, 0, 0, 0, 2, 0, + 0, 0, 13, 0, 0, 0, + 3, 0, 0, 0, 2, 0, + 0, 0, 1, 14, 0, 0, + 118, 0, 0, 0, 0, 0, + 0, 0, 14, 0, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 1, 14, 0, 0, + 83, 86, 95, 84, 101, 115, + 115, 70, 97, 99, 116, 111, + 114, 0, 83, 86, 95, 73, + 110, 115, 105, 100, 101, 84, + 101, 115, 115, 70, 97, 99, + 116, 111, 114, 0, 171, 171, + 83, 72, 69, 88, 152, 1, + 0, 0, 81, 0, 3, 0, + 102, 0, 0, 0, 113, 0, + 0, 1, 147, 24, 0, 1, + 148, 24, 0, 1, 149, 16, + 0, 1, 150, 32, 0, 1, + 151, 24, 0, 1, 106, 8, + 0, 1, 114, 0, 0, 1, + 101, 0, 0, 3, 18, 32, + 16, 0, 0, 0, 0, 0, + 54, 0, 0, 5, 18, 32, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 115, 0, 0, 1, 153, 0, + 0, 2, 3, 0, 0, 0, + 95, 0, 0, 2, 0, 112, + 1, 0, 95, 0, 0, 4, + 18, 144, 33, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 103, 0, 0, 4, 18, 32, + 16, 0, 0, 0, 0, 0, + 17, 0, 0, 0, 103, 0, + 0, 4, 18, 32, 16, 0, + 1, 0, 0, 0, 18, 0, + 0, 0, 103, 0, 0, 4, + 18, 32, 16, 0, 2, 0, + 0, 0, 19, 0, 0, 0, + 104, 0, 0, 2, 1, 0, + 0, 0, 91, 0, 0, 4, + 18, 32, 16, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 30, 0, 0, 6, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 112, 1, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 78, 0, 0, 8, 0, 208, + 0, 0, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 54, 0, 0, 4, + 34, 0, 16, 0, 0, 0, + 0, 0, 10, 112, 1, 0, + 54, 0, 0, 8, 18, 32, + 144, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 10, 144, + 161, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 115, 0, 0, 1, 95, 0, + 0, 4, 18, 144, 33, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 103, 0, 0, 4, + 18, 32, 16, 0, 3, 0, + 0, 0, 20, 0, 0, 0, + 104, 0, 0, 2, 1, 0, + 0, 0, 51, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 144, 33, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 10, 144, 33, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 51, 0, 0, 8, + 18, 32, 16, 0, 3, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 10, 144, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 10, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/clear_uint2_ps.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/clear_uint2_ps.h new file mode 100644 index 000000000..12d936ccf --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/clear_uint2_ps.h @@ -0,0 +1,157 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeClearConstants +// { +// +// uint2 xe_clear_value; // Offset: 0 Size: 8 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// XeClearConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xy 0 TARGET uint xy +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_output o0.xy +mov o0.xy, CB0[0][0].xyxx +ret +// Approximately 2 instruction slots used +#endif + +const BYTE clear_uint2_ps[] = +{ + 68, 88, 66, 67, 37, 23, + 17, 1, 102, 148, 181, 42, + 241, 102, 112, 167, 142, 147, + 73, 7, 1, 0, 0, 0, + 148, 2, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 88, 1, 0, 0, 104, 1, + 0, 0, 156, 1, 0, 0, + 248, 1, 0, 0, 82, 68, + 69, 70, 28, 1, 0, 0, + 1, 0, 0, 0, 120, 0, + 0, 0, 1, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 255, 255, 0, 5, 4, 0, + 244, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 100, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 88, 101, + 67, 108, 101, 97, 114, 67, + 111, 110, 115, 116, 97, 110, + 116, 115, 0, 171, 171, 171, + 100, 0, 0, 0, 1, 0, + 0, 0, 144, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 184, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 2, 0, 0, 0, 208, 0, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 99, 108, 101, 97, 114, + 95, 118, 97, 108, 117, 101, + 0, 117, 105, 110, 116, 50, + 0, 171, 171, 171, 1, 0, + 19, 0, 1, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 199, 0, 0, 0, 77, 105, + 99, 114, 111, 115, 111, 102, + 116, 32, 40, 82, 41, 32, + 72, 76, 83, 76, 32, 83, + 104, 97, 100, 101, 114, 32, + 67, 111, 109, 112, 105, 108, + 101, 114, 32, 49, 48, 46, + 49, 0, 73, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 79, 83, 71, 78, 44, 0, + 0, 0, 1, 0, 0, 0, + 8, 0, 0, 0, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 3, 12, 0, 0, 83, 86, + 95, 84, 97, 114, 103, 101, + 116, 0, 171, 171, 83, 72, + 69, 88, 84, 0, 0, 0, + 81, 0, 0, 0, 21, 0, + 0, 0, 106, 8, 0, 1, + 89, 0, 0, 7, 70, 142, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 101, 0, + 0, 3, 50, 32, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 7, 50, 32, 16, 0, + 0, 0, 0, 0, 70, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/continuous_quad_hs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/continuous_quad_hs.h new file mode 100644 index 000000000..0294c95bf --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/continuous_quad_hs.h @@ -0,0 +1,716 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer xe_system_cbuffer +// { +// +// uint xe_flags; // Offset: 0 Size: 4 [unused] +// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 +// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 [unused] +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 [unused] +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 [unused] +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 [unused] +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 [unused] +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 [unused] +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Patch Constant signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_TessFactor 0 x 0 QUADEDGE float x +// SV_TessFactor 1 x 1 QUADEDGE float x +// SV_TessFactor 2 x 2 QUADEDGE float x +// SV_TessFactor 3 x 3 QUADEDGE float x +// SV_InsideTessFactor 0 x 4 QUADINT float x +// SV_InsideTessFactor 1 x 5 QUADINT float x +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// Tessellation Domain # of control points +// -------------------- -------------------- +// Quadrilateral 4 +// +// Tessellation Output Primitive Partitioning Type +// ------------------------------ ------------------ +// Clockwise Triangles Even Fractional +// +hs_5_1 +hs_decls +dcl_input_control_point_count 4 +dcl_output_control_point_count 4 +dcl_tessellator_domain domain_quad +dcl_tessellator_partitioning partitioning_fractional_even +dcl_tessellator_output_primitive output_triangle_cw +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +hs_fork_phase +dcl_hs_fork_phase_instance_count 4 +dcl_input vForkInstanceID +dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor +dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor +dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor +dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor +dcl_temps 1 +dcl_indexrange o0.x 4 +mov r0.x, vForkInstanceID.x +mov o[r0.x + 0].x, CB0[0][0].z +ret +hs_fork_phase +dcl_hs_fork_phase_instance_count 2 +dcl_input vForkInstanceID +dcl_output_siv o4.x, finalQuadUInsideTessFactor +dcl_output_siv o5.x, finalQuadVInsideTessFactor +dcl_temps 1 +dcl_indexrange o4.x 2 +mov r0.x, vForkInstanceID.x +mov o[r0.x + 4].x, CB0[0][0].z +ret +// Approximately 6 instruction slots used +#endif + +const BYTE continuous_quad_hs[] = +{ + 68, 88, 66, 67, 235, 115, + 46, 207, 211, 220, 116, 112, + 161, 205, 93, 240, 127, 133, + 74, 91, 1, 0, 0, 0, + 220, 13, 0, 0, 6, 0, + 0, 0, 56, 0, 0, 0, + 168, 10, 0, 0, 220, 10, + 0, 0, 16, 11, 0, 0, + 212, 11, 0, 0, 64, 13, + 0, 0, 82, 68, 69, 70, + 104, 10, 0, 0, 1, 0, + 0, 0, 120, 0, 0, 0, + 1, 0, 0, 0, 60, 0, + 0, 0, 1, 5, 83, 72, + 0, 5, 4, 0, 62, 10, + 0, 0, 19, 19, 68, 37, + 60, 0, 0, 0, 24, 0, + 0, 0, 40, 0, 0, 0, + 40, 0, 0, 0, 36, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 100, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 115, + 121, 115, 116, 101, 109, 95, + 99, 98, 117, 102, 102, 101, + 114, 0, 171, 171, 100, 0, + 0, 0, 32, 0, 0, 0, + 144, 0, 0, 0, 224, 1, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 144, 5, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 196, 5, 0, 0, + 4, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 232, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 6, 0, 0, 12, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 39, 6, + 0, 0, 16, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 62, 6, 0, 0, + 20, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 85, 6, 0, 0, 24, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 116, 6, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 152, 6, + 0, 0, 32, 0, 0, 0, + 96, 0, 0, 0, 0, 0, + 0, 0, 180, 6, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 216, 6, 0, 0, + 128, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 236, 6, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 16, 7, 0, 0, 140, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 40, 7, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 76, 7, + 0, 0, 144, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 236, 6, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 90, 7, 0, 0, + 156, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 40, 7, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 106, 7, 0, 0, 160, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 232, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 128, 7, + 0, 0, 168, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 232, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 151, 7, 0, 0, + 176, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 184, 7, 0, 0, 180, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 200, 7, + 0, 0, 184, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 116, 6, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 221, 7, 0, 0, + 192, 0, 0, 0, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 8, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 36, 8, 0, 0, 224, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 57, 8, + 0, 0, 228, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 40, 7, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 81, 8, 0, 0, + 232, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 98, 8, 0, 0, 236, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 119, 8, + 0, 0, 240, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 140, 8, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 176, 8, 0, 0, + 0, 1, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 232, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 203, 8, 0, 0, 8, 1, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 232, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 229, 8, + 0, 0, 16, 1, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 0, 9, 0, 0, + 32, 1, 0, 0, 32, 0, + 0, 0, 0, 0, 0, 0, + 20, 9, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 56, 9, 0, 0, 64, 1, + 0, 0, 16, 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[unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 [unused] +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 [unused] +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 [unused] +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 [unused] +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 [unused] +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 [unused] +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Patch Constant signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_TessFactor 0 x 0 TRIEDGE float x +// SV_TessFactor 1 x 1 TRIEDGE float x +// SV_TessFactor 2 x 2 TRIEDGE float x +// SV_InsideTessFactor 0 x 3 TRIINT float x +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// Tessellation Domain # of control points +// -------------------- -------------------- +// Triangle 3 +// +// Tessellation Output Primitive Partitioning Type +// ------------------------------ ------------------ +// Clockwise Triangles Even Fractional +// +hs_5_1 +hs_decls +dcl_input_control_point_count 3 +dcl_output_control_point_count 3 +dcl_tessellator_domain domain_tri +dcl_tessellator_partitioning partitioning_fractional_even +dcl_tessellator_output_primitive output_triangle_cw +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +hs_fork_phase +dcl_hs_fork_phase_instance_count 3 +dcl_input vForkInstanceID +dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor +dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor +dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor +dcl_temps 1 +dcl_indexrange o0.x 3 +mov r0.x, vForkInstanceID.x +mov o[r0.x + 0].x, CB0[0][0].z +ret +hs_fork_phase +dcl_output_siv o3.x, finalTriInsideTessFactor +mov o3.x, CB0[0][0].z +ret +// Approximately 5 instruction slots used +#endif + +const BYTE continuous_triangle_hs[] = +{ + 68, 88, 66, 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+// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer xe_system_cbuffer +// { +// +// uint xe_flags; // Offset: 0 Size: 4 [unused] +// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 +// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 [unused] +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 [unused] +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 [unused] +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 [unused] +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 [unused] +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 [unused] +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Patch Constant signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_TessFactor 0 x 0 QUADEDGE float x +// SV_TessFactor 1 x 1 QUADEDGE float x +// SV_TessFactor 2 x 2 QUADEDGE float x +// SV_TessFactor 3 x 3 QUADEDGE float x +// SV_InsideTessFactor 0 x 4 QUADINT float x +// SV_InsideTessFactor 1 x 5 QUADINT float x +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// Tessellation Domain # of control points +// -------------------- -------------------- +// Quadrilateral 4 +// +// Tessellation Output Primitive Partitioning Type +// ------------------------------ ------------------ +// Clockwise Triangles Integer +// +hs_5_1 +hs_decls +dcl_input_control_point_count 4 +dcl_output_control_point_count 4 +dcl_tessellator_domain domain_quad +dcl_tessellator_partitioning partitioning_integer +dcl_tessellator_output_primitive output_triangle_cw +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +hs_fork_phase +dcl_hs_fork_phase_instance_count 4 +dcl_input vForkInstanceID +dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor +dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor +dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor +dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor +dcl_temps 1 +dcl_indexrange o0.x 4 +mov r0.x, vForkInstanceID.x +mov o[r0.x + 0].x, CB0[0][0].z +ret +hs_fork_phase +dcl_hs_fork_phase_instance_count 2 +dcl_input vForkInstanceID +dcl_output_siv o4.x, finalQuadUInsideTessFactor +dcl_output_siv o5.x, finalQuadVInsideTessFactor +dcl_temps 1 +dcl_indexrange o4.x 2 +mov r0.x, vForkInstanceID.x +mov o[r0.x + 4].x, CB0[0][0].z +ret +// Approximately 6 instruction slots used +#endif + +const BYTE discrete_quad_hs[] = +{ + 68, 88, 66, 67, 133, 207, + 137, 232, 78, 97, 5, 29, + 188, 112, 65, 159, 75, 218, + 107, 227, 1, 0, 0, 0, + 220, 13, 0, 0, 6, 0, + 0, 0, 56, 0, 0, 0, + 168, 10, 0, 0, 220, 10, + 0, 0, 16, 11, 0, 0, + 212, 11, 0, 0, 64, 13, + 0, 0, 82, 68, 69, 70, + 104, 10, 0, 0, 1, 0, + 0, 0, 120, 0, 0, 0, + 1, 0, 0, 0, 60, 0, + 0, 0, 1, 5, 83, 72, + 0, 5, 4, 0, 62, 10, + 0, 0, 19, 19, 68, 37, + 60, 0, 0, 0, 24, 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0, + 81, 0, 3, 0, 89, 0, + 0, 0, 113, 0, 0, 1, + 147, 32, 0, 1, 148, 32, + 0, 1, 149, 24, 0, 1, + 150, 8, 0, 1, 151, 24, + 0, 1, 106, 8, 0, 1, + 89, 0, 0, 7, 70, 142, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 115, 0, + 0, 1, 153, 0, 0, 2, + 4, 0, 0, 0, 95, 0, + 0, 2, 0, 112, 1, 0, + 103, 0, 0, 4, 18, 32, + 16, 0, 0, 0, 0, 0, + 11, 0, 0, 0, 103, 0, + 0, 4, 18, 32, 16, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 103, 0, 0, 4, + 18, 32, 16, 0, 2, 0, + 0, 0, 13, 0, 0, 0, + 103, 0, 0, 4, 18, 32, + 16, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 104, 0, + 0, 2, 1, 0, 0, 0, + 91, 0, 0, 4, 18, 32, + 16, 0, 0, 0, 0, 0, + 4, 0, 0, 0, 54, 0, + 0, 4, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 112, + 1, 0, 54, 0, 0, 8, + 18, 32, 144, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 42, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 115, 0, 0, 1, + 153, 0, 0, 2, 2, 0, + 0, 0, 95, 0, 0, 2, + 0, 112, 1, 0, 103, 0, + 0, 4, 18, 32, 16, 0, + 4, 0, 0, 0, 15, 0, + 0, 0, 103, 0, 0, 4, + 18, 32, 16, 0, 5, 0, + 0, 0, 16, 0, 0, 0, + 104, 0, 0, 2, 1, 0, + 0, 0, 91, 0, 0, 4, + 18, 32, 16, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 54, 0, 0, 4, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 112, 1, 0, 54, 0, + 0, 9, 18, 32, 208, 0, + 4, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 42, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 6, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 5, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/discrete_triangle_hs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/discrete_triangle_hs.h new file mode 100644 index 000000000..451a46b86 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/discrete_triangle_hs.h @@ -0,0 +1,683 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer xe_system_cbuffer +// { +// +// uint xe_flags; // Offset: 0 Size: 4 [unused] +// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 +// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 [unused] +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 [unused] +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 [unused] +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 [unused] +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 [unused] +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 [unused] +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Patch Constant signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_TessFactor 0 x 0 TRIEDGE float x +// SV_TessFactor 1 x 1 TRIEDGE float x +// SV_TessFactor 2 x 2 TRIEDGE float x +// SV_InsideTessFactor 0 x 3 TRIINT float x +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +// Tessellation Domain # of control points +// -------------------- -------------------- +// Triangle 3 +// +// Tessellation Output Primitive Partitioning Type +// ------------------------------ ------------------ +// Clockwise Triangles Integer +// +hs_5_1 +hs_decls +dcl_input_control_point_count 3 +dcl_output_control_point_count 3 +dcl_tessellator_domain domain_tri +dcl_tessellator_partitioning partitioning_integer +dcl_tessellator_output_primitive output_triangle_cw +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +hs_fork_phase +dcl_hs_fork_phase_instance_count 3 +dcl_input vForkInstanceID +dcl_output_siv o0.x, finalTriUeq0EdgeTessFactor +dcl_output_siv o1.x, finalTriVeq0EdgeTessFactor +dcl_output_siv o2.x, finalTriWeq0EdgeTessFactor +dcl_temps 1 +dcl_indexrange o0.x 3 +mov r0.x, vForkInstanceID.x +mov o[r0.x + 0].x, CB0[0][0].z +ret +hs_fork_phase +dcl_output_siv o3.x, finalTriInsideTessFactor +mov o3.x, CB0[0][0].z +ret +// Approximately 5 instruction slots used +#endif + +const BYTE discrete_triangle_hs[] = +{ + 68, 88, 66, 67, 106, 99, + 99, 223, 105, 193, 70, 218, + 33, 84, 217, 184, 177, 180, + 199, 65, 1, 0, 0, 0, + 76, 13, 0, 0, 6, 0, + 0, 0, 56, 0, 0, 0, + 168, 10, 0, 0, 220, 10, + 0, 0, 16, 11, 0, 0, + 164, 11, 0, 0, 176, 12, + 0, 0, 82, 68, 69, 70, + 104, 10, 0, 0, 1, 0, + 0, 0, 120, 0, 0, 0, + 1, 0, 0, 0, 60, 0, + 0, 0, 1, 5, 83, 72, + 0, 5, 4, 0, 62, 10, + 0, 0, 19, 19, 68, 37, + 60, 0, 0, 0, 24, 0, + 0, 0, 40, 0, 0, 0, + 40, 0, 0, 0, 36, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 100, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 115, + 121, 115, 116, 101, 109, 95, + 99, 98, 117, 102, 102, 101, + 114, 0, 171, 171, 100, 0, + 0, 0, 32, 0, 0, 0, + 144, 0, 0, 0, 224, 1, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 144, 5, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 196, 5, 0, 0, + 4, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 232, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 6, 0, 0, 12, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 39, 6, + 0, 0, 16, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 62, 6, 0, 0, + 20, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 85, 6, 0, 0, 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float +// TEXCOORD 11 xyzw 11 NONE float +// TEXCOORD 12 xyzw 12 NONE float +// TEXCOORD 13 xyzw 13 NONE float +// TEXCOORD 14 xyzw 14 NONE float +// TEXCOORD 15 xyzw 15 NONE float +// TEXCOORD 16 xyz 16 NONE float +// SV_Position 0 xyzw 17 POS float z +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Depth 0 N/A oDepth DEPTH float YES +// +// Pixel Shader runs at sample frequency +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_input_ps_siv linear noperspective sample v17.z, position +dcl_output oDepth +dcl_temps 2 +mul_sat [precise(x)] r0.x, v17.z, l(2.000000) +uge [precise(y)] r0.y, l(0x7fffffff), r0.x +and [precise(x)] r0.x, r0.x, r0.y +umin [precise(x)] r0.x, r0.x, l(0x3ffffff8) +bfi [precise(y)] r0.y, l(23), l(0), r0.x, l(0x00800000) +ushr [precise(z)] r0.z, r0.x, l(23) +iadd [precise(z)] r0.z, -r0.z, l(113) +umin [precise(z)] r0.z, r0.z, l(24) +ushr [precise(y)] r0.y, r0.y, r0.z +ult [precise(z)] r0.z, r0.x, l(0x38800000) +iadd [precise(x)] r0.x, r0.x, l(0xc8000000) +movc [precise(x)] r0.x, r0.z, r0.y, r0.x +iadd [precise(y)] r0.y, r0.x, l(3) +ubfe [precise(x)] r0.x, l(1), l(3), r0.x +iadd [precise(x)] r0.x, r0.x, r0.y +ubfe [precise(xyz)] r0.xyz, l(24, 20, 4, 0), l(3, 3, 23, 0), r0.xxxx +firstbit_hi [precise(w)] r0.w, r0.y +iadd [precise(w)] r0.w, r0.w, l(-11) +movc [precise(w)] r0.w, r0.y, r0.w, l(21) +iadd [precise(x)] r1.x, -r0.w, l(1) +movc [precise(x)] r1.x, r0.z, r0.z, r1.x +ishl [precise(w)] r0.w, r0.y, r0.w +and [precise(w)] r0.w, r0.w, l(0x000fffff) +movc [precise(y)] r0.y, r0.z, r0.y, r0.w +ishl [precise(z)] r0.z, r1.x, l(23) +iadd [precise(z)] r0.z, r0.z, l(0x37800000) +ishl [precise(y)] r0.y, r0.y, l(3) +iadd [precise(y)] r0.y, r0.z, r0.y +movc [precise(x)] oDepth, r0.x, r0.y, l(0) +ret +// Approximately 30 instruction slots used +#endif + +const BYTE float24_round_ps[] = +{ + 68, 88, 66, 67, 23, 65, + 158, 4, 125, 87, 131, 240, + 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0, + 0, 0, 30, 0, 16, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 138, 0, 8, 9, 18, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 30, 0, 8, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 138, 0, + 56, 15, 114, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 24, 0, 0, 0, + 20, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 23, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 135, 0, + 64, 5, 130, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 30, 0, 64, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 245, 255, 255, 255, 55, 0, + 64, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 21, 0, 0, 0, 30, 0, + 8, 8, 18, 0, 16, 0, + 1, 0, 0, 0, 58, 0, + 16, 128, 65, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 55, 0, 8, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 41, 0, 64, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 1, 0, + 64, 7, 130, 0, 16, 0, + 0, 0, 0, 0, 58, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 255, 255, + 15, 0, 55, 0, 16, 9, + 34, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 41, 0, 32, 7, + 66, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 23, 0, 0, 0, + 30, 0, 32, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 128, 55, 41, 0, + 16, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 30, 0, 16, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 55, 0, 8, 8, 1, 192, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 30, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 11, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 5, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/float24_truncate_ps.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/float24_truncate_ps.h new file mode 100644 index 000000000..1111cd47f --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/float24_truncate_ps.h @@ -0,0 +1,255 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float +// TEXCOORD 1 xyzw 1 NONE float +// TEXCOORD 2 xyzw 2 NONE float +// TEXCOORD 3 xyzw 3 NONE float +// TEXCOORD 4 xyzw 4 NONE float +// TEXCOORD 5 xyzw 5 NONE float +// TEXCOORD 6 xyzw 6 NONE float +// TEXCOORD 7 xyzw 7 NONE float +// TEXCOORD 8 xyzw 8 NONE float +// TEXCOORD 9 xyzw 9 NONE float +// TEXCOORD 10 xyzw 10 NONE float +// TEXCOORD 11 xyzw 11 NONE float +// TEXCOORD 12 xyzw 12 NONE float +// TEXCOORD 13 xyzw 13 NONE float +// TEXCOORD 14 xyzw 14 NONE float +// TEXCOORD 15 xyzw 15 NONE float +// TEXCOORD 16 xyz 16 NONE float +// SV_Position 0 xyzw 17 POS float z +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_DepthLessEqual 0 N/A oDepthLE DEPTHLE float YES +// +// Pixel Shader runs at sample frequency +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_input_ps_siv linear noperspective sample v17.z, position +dcl_output oDepthLE +dcl_temps 1 +mul_sat [precise(x)] r0.x, v17.z, l(2.000000) +uge [precise(y)] r0.y, r0.x, l(0x2e800000) +if_nz r0.y + ubfe [precise(y)] r0.y, l(8), l(23), r0.x + iadd [precise(y)] r0.y, -r0.y, l(116) + imax [precise(y)] r0.y, r0.y, l(3) + bfi [precise(x)] r0.x, r0.y, l(0), l(0), r0.x +else + mov [precise(x)] r0.x, l(0) +endif +mul [precise(x)] oDepthLE, r0.x, l(0.500000) +ret +// Approximately 12 instruction slots used +#endif + +const BYTE float24_truncate_ps[] = +{ + 68, 88, 66, 67, 73, 81, + 190, 30, 130, 230, 10, 4, + 35, 6, 194, 2, 204, 207, + 200, 64, 1, 0, 0, 0, + 140, 4, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 160, 0, 0, 0, 120, 2, + 0, 0, 180, 2, 0, 0, + 240, 3, 0, 0, 82, 68, + 69, 70, 100, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 255, 255, 0, 5, 4, 0, + 60, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 73, 83, + 71, 78, 208, 1, 0, 0, + 18, 0, 0, 0, 8, 0, + 0, 0, 184, 1, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 2, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 4, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 5, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 6, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 6, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 7, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 8, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 9, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 10, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 11, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 12, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 13, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 13, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 14, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 15, 0, 0, 0, 15, 0, + 0, 0, 184, 1, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 16, 0, 0, 0, 7, 0, + 0, 0, 193, 1, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 17, 0, 0, 0, 15, 4, + 0, 0, 84, 69, 88, 67, + 79, 79, 82, 68, 0, 83, + 86, 95, 80, 111, 115, 105, + 116, 105, 111, 110, 0, 171, + 171, 171, 79, 83, 71, 78, + 52, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 255, 255, + 255, 255, 1, 14, 0, 0, + 83, 86, 95, 68, 101, 112, + 116, 104, 76, 101, 115, 115, + 69, 113, 117, 97, 108, 0, + 171, 171, 83, 72, 69, 88, + 52, 1, 0, 0, 81, 0, + 0, 0, 77, 0, 0, 0, + 106, 8, 0, 1, 100, 56, + 0, 4, 66, 16, 16, 0, + 17, 0, 0, 0, 1, 0, + 0, 0, 101, 0, 0, 2, + 1, 112, 2, 0, 104, 0, + 0, 2, 1, 0, 0, 0, + 56, 32, 8, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 42, 16, 16, 0, 17, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 64, 80, 0, + 16, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 128, 46, 31, 0, 4, 3, + 26, 0, 16, 0, 0, 0, + 0, 0, 138, 0, 16, 9, + 34, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 8, 0, 0, 0, 1, 64, + 0, 0, 23, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 30, 0, 16, 8, + 34, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 128, + 65, 0, 0, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 116, 0, 0, 0, 36, 0, + 16, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 140, 0, 8, 11, + 18, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 8, 5, + 18, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 21, 0, + 0, 1, 56, 0, 8, 6, + 1, 112, 2, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 63, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 12, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 2, 0, 0, 0, 2, 0, + 0, 0, 1, 0, 0, 0, + 2, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_tc_vs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_tc_vs.h new file mode 100644 index 000000000..c14aebabf --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_tc_vs.h @@ -0,0 +1,166 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_VertexID 0 x 0 VERTID uint x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xy 0 NONE float xy +// SV_Position 0 xyzw 1 POS float xyzw +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input_sgv v0.x, vertex_id +dcl_output o0.xy +dcl_output_siv o1.xyzw, position +dcl_temps 1 +ishl r0.y, v0.x, l(1) +mov r0.x, v0.x +and r0.xy, r0.xyxx, l(2, 2, 0, 0) +utof r0.xy, r0.xyxx +mad o1.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000) +mov o1.zw, l(0,0,0,1.000000) +mov o0.xy, r0.xyxx +ret +// Approximately 8 instruction slots used +#endif + +const BYTE fullscreen_tc_vs[] = +{ + 68, 88, 66, 67, 194, 19, + 91, 0, 93, 21, 209, 27, + 252, 153, 187, 171, 84, 80, + 251, 138, 1, 0, 0, 0, + 240, 2, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 160, 0, 0, 0, 212, 0, + 0, 0, 44, 1, 0, 0, + 84, 2, 0, 0, 82, 68, + 69, 70, 100, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 254, 255, 0, 5, 4, 0, + 60, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 73, 83, + 71, 78, 44, 0, 0, 0, + 1, 0, 0, 0, 8, 0, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 1, 1, + 0, 0, 83, 86, 95, 86, + 101, 114, 116, 101, 120, 73, + 68, 0, 79, 83, 71, 78, + 80, 0, 0, 0, 2, 0, + 0, 0, 8, 0, 0, 0, + 56, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 12, 0, 0, + 65, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 0, 15, 0, 0, 0, + 84, 69, 88, 67, 79, 79, + 82, 68, 0, 83, 86, 95, + 80, 111, 115, 105, 116, 105, + 111, 110, 0, 171, 171, 171, + 83, 72, 69, 88, 32, 1, + 0, 0, 81, 0, 1, 0, + 72, 0, 0, 0, 106, 8, + 0, 1, 96, 0, 0, 4, + 18, 16, 16, 0, 0, 0, + 0, 0, 6, 0, 0, 0, + 101, 0, 0, 3, 50, 32, + 16, 0, 0, 0, 0, 0, + 103, 0, 0, 4, 242, 32, + 16, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 104, 0, + 0, 2, 1, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 10, 16, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 16, + 16, 0, 0, 0, 0, 0, + 1, 0, 0, 10, 50, 0, + 16, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 86, 0, + 0, 5, 50, 0, 16, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 50, 0, 0, 15, 50, 32, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 64, 0, 0, + 0, 192, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 128, 191, + 0, 0, 128, 63, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 8, 194, 32, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 128, 63, 54, 0, 0, 5, + 50, 32, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_vs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_vs.h new file mode 100644 index 000000000..f12247ce4 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_vs.h @@ -0,0 +1,151 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_VertexID 0 x 0 VERTID uint x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Position 0 xyzw 0 POS float xyzw +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input_sgv v0.x, vertex_id +dcl_output_siv o0.xyzw, position +dcl_temps 1 +ushr r0.y, v0.x, l(1) +mov r0.x, v0.x +and r0.xy, r0.xyxx, l(1, 1, 0, 0) +utof r0.xy, r0.xyxx +mad o0.xy, r0.xyxx, l(4.000000, 4.000000, 0.000000, 0.000000), l(-1.000000, -1.000000, 0.000000, 0.000000) +mov o0.zw, l(0,0,0,1.000000) +ret +// Approximately 7 instruction slots used +#endif + +const BYTE fullscreen_vs[] = +{ + 68, 88, 66, 67, 11, 43, + 171, 43, 233, 188, 20, 107, + 115, 148, 0, 215, 116, 165, + 194, 26, 1, 0, 0, 0, + 172, 2, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 160, 0, 0, 0, 212, 0, + 0, 0, 8, 1, 0, 0, + 16, 2, 0, 0, 82, 68, + 69, 70, 100, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 254, 255, 0, 5, 4, 0, + 60, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 73, 83, + 71, 78, 44, 0, 0, 0, + 1, 0, 0, 0, 8, 0, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 1, 1, + 0, 0, 83, 86, 95, 86, + 101, 114, 116, 101, 120, 73, + 68, 0, 79, 83, 71, 78, + 44, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 15, 0, 0, 0, + 83, 86, 95, 80, 111, 115, + 105, 116, 105, 111, 110, 0, + 83, 72, 69, 88, 0, 1, + 0, 0, 81, 0, 1, 0, + 64, 0, 0, 0, 106, 8, + 0, 1, 96, 0, 0, 4, + 18, 16, 16, 0, 0, 0, + 0, 0, 6, 0, 0, 0, + 103, 0, 0, 4, 242, 32, + 16, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 104, 0, + 0, 2, 1, 0, 0, 0, + 85, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 10, 16, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 16, + 16, 0, 0, 0, 0, 0, + 1, 0, 0, 10, 50, 0, + 16, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 86, 0, + 0, 5, 50, 0, 16, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 50, 0, 0, 15, 50, 32, + 16, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 128, 64, 0, 0, + 128, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 128, 191, + 0, 0, 128, 191, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 8, 194, 32, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 128, 63, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 7, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_1xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_1xmsaa_cs.h new file mode 100644 index 000000000..92579af44 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_1xmsaa_cs.h @@ -0,0 +1,502 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeHostDepthStoreRectangleConstants +// { +// +// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 +// +// } +// +// cbuffer XeHostDepthStoreRenderTargetConstants +// { +// +// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_host_depth_store_source texture float 2d T0 t0 1 +// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 +// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 +// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 +dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 4 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(2), l(10), CB1[1][0].x +ubfe r0.y, l(10), l(20), CB0[0][0].x +imul null, r0.y, r0.x, r0.y +ult r0.y, r0.y, vThreadID.x +if_nz r0.y + ret +endif +ushr r1.y, CB0[0][0].x, l(10) +mov r1.x, CB0[0][0].x +bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) +ishl r1.x, vThreadID.x, l(3) +mov r1.y, vThreadID.y +imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx +and r0.y, CB1[1][0].x, l(1023) +imul null, r0.xz, r0.xxxx, l(80, 0, 16, 0) +udiv r2.xy, null, r1.xyxx, r0.xzxx +imad r0.y, r2.y, r0.y, r2.x +imad r2.xy, -r2.xyxx, r0.xzxx, r1.xyxx +imul null, r0.z, r0.z, r0.x +imad r0.x, r2.y, r0.x, r2.x +imad r0.x, r0.y, r0.z, r0.x +ushr r0.x, r0.x, l(2) +mov r1.zw, l(0,0,0,0) +ld r2.x, r1.xyww, T0[0].xyzw +iadd r3.xyzw, r1.xyww, l(1, 0, 0, 0) +ld r2.y, r3.xyzw, T0[0].yxzw +iadd r3.xyzw, r1.xyww, l(2, 0, 0, 0) +ld r2.z, r3.xyzw, T0[0].yzxw +iadd r3.xyzw, r1.xyww, l(3, 0, 0, 0) +ld r2.w, r3.xyzw, T0[0].yzwx +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.y, r0.x, l(1) +iadd r2.xyzw, r1.xyww, l(4, 0, 0, 0) +ld r2.x, r2.xyzw, T0[0].xyzw +iadd r3.xyzw, r1.xyww, l(5, 0, 0, 0) +ld r2.y, r3.xyzw, T0[0].yxzw +iadd r3.xyzw, r1.xyww, l(6, 0, 0, 0) +ld r2.z, r3.xyzw, T0[0].yzxw +iadd r1.xyzw, r1.xyzw, l(7, 0, 0, 0) +ld r2.w, r1.xyzw, T0[0].yzwx +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw +ret +// Approximately 42 instruction slots used +#endif + +const BYTE host_depth_store_1xmsaa_cs[] = +{ + 68, 88, 66, 67, 201, 213, + 112, 124, 150, 112, 103, 4, + 67, 70, 247, 238, 236, 19, + 131, 143, 1, 0, 0, 0, + 100, 9, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 172, 2, 0, 0, 188, 2, + 0, 0, 204, 2, 0, 0, + 200, 8, 0, 0, 82, 68, + 69, 70, 112, 2, 0, 0, + 2, 0, 0, 0, 92, 1, + 0, 0, 4, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 70, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 220, 0, 0, 0, 2, 0, + 0, 0, 5, 0, 0, 0, + 4, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 247, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 16, 1, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 51, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 120, 101, + 95, 104, 111, 115, 116, 95, + 100, 101, 112, 116, 104, 95, + 115, 116, 111, 114, 101, 95, + 115, 111, 117, 114, 99, 101, + 0, 120, 101, 95, 104, 111, + 115, 116, 95, 100, 101, 112, + 116, 104, 95, 115, 116, 111, + 114, 101, 95, 100, 101, 115, + 116, 0, 88, 101, 72, 111, + 115, 116, 68, 101, 112, 116, + 104, 83, 116, 111, 114, 101, + 82, 101, 99, 116, 97, 110, + 103, 108, 101, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 88, 101, 72, 111, 115, + 116, 68, 101, 112, 116, 104, + 83, 116, 111, 114, 101, 82, + 101, 110, 100, 101, 114, 84, + 97, 114, 103, 101, 116, 67, + 111, 110, 115, 116, 97, 110, + 116, 115, 0, 171, 171, 171, + 16, 1, 0, 0, 1, 0, + 0, 0, 140, 1, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 51, 1, 0, 0, 1, 0, + 0, 0, 252, 1, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 180, 1, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 216, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 104, 111, 115, 116, 95, + 100, 101, 112, 116, 104, 95, + 115, 116, 111, 114, 101, 95, + 114, 101, 99, 116, 97, 110, + 103, 108, 101, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 210, 1, 0, 0, 36, 2, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 216, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 101, 95, 104, + 111, 115, 116, 95, 100, 101, + 112, 116, 104, 95, 115, 116, + 111, 114, 101, 95, 114, 101, + 110, 100, 101, 114, 95, 116, + 97, 114, 103, 101, 116, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 171, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 244, 5, 0, 0, 81, 0, + 5, 0, 125, 1, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 89, 0, 0, 7, + 70, 142, 48, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 88, 24, 0, 7, 70, 126, + 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b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_2xmsaa_cs.h @@ -0,0 +1,593 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeHostDepthStoreRectangleConstants +// { +// +// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 +// +// } +// +// cbuffer XeHostDepthStoreRenderTargetConstants +// { +// +// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_host_depth_store_source texture float 2dMS T0 t0 1 +// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 +// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 +// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 +dcl_resource_texture2dms(0) (float,float,float,float) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 5 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(2), l(10), CB1[1][0].x +ubfe r0.y, l(10), l(20), CB0[0][0].x +imul null, r0.y, r0.x, r0.y +ult r0.y, r0.y, vThreadID.x +if_nz r0.y + ret +endif +ushr r1.y, CB0[0][0].x, l(10) +mov r1.x, CB0[0][0].x +bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) +ishl r1.x, vThreadID.x, l(3) +ushr r1.y, vThreadID.y, l(1) +imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx +and r2.y, vThreadID.y, l(1) +and r0.y, CB1[1][0].x, l(1023) +ishl r1.z, r1.y, l(1) +mov r2.x, l(0) +iadd r0.zw, r1.xxxz, r2.xxxy +imul null, r2.xz, r0.xxxx, l(80, 0, 16, 0) +udiv r3.xy, null, r0.zwzz, r2.xzxx +imad r0.x, r3.y, r0.y, r3.x +imad r0.yz, -r3.xxyx, r2.xxzx, r0.zzwz +imul null, r0.w, r2.z, r2.x +imad r0.y, r0.z, r2.x, r0.y +imad r0.x, r0.x, r0.w, r0.y +ushr r0.x, r0.x, l(2) +ubfe r0.y, l(1), l(12), CB1[1][0].x +movc r0.zw, r2.yyyy, l(0,0,0,3), l(0,0,1,0) +movc r0.y, r0.y, r0.z, r0.w +mov r1.w, l(0) +ldms r2.x, r1.xyww, T0[0].xyzw, r0.y +iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.y, r4.xyzw, T0[0].yxzw, r0.y +mov r3.zw, l(0,0,0,0) +ldms r2.z, r3.xyzw, T0[0].yzxw, r0.y +iadd r3.xyzw, r1.xyxy, l(4, 0, 3, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.w, r4.xyzw, T0[0].yzwx, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.z, r0.x, l(1) +mov r3.zw, l(0,0,0,0) +ldms r2.x, r3.xyzw, T0[0].xyzw, r0.y +iadd r3.xyzw, r1.xyxy, l(6, 0, 5, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.y, r4.xyzw, T0[0].yxzw, r0.y +mov r3.zw, l(0,0,0,0) +ldms r2.z, r3.xyzw, T0[0].yzxw, r0.y +iadd r1.xy, r1.xyxx, l(7, 0, 0, 0) +mov r1.zw, l(0,0,0,0) +ldms r2.w, r1.xyzw, T0[0].yzwx, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw +ret +// Approximately 56 instruction slots used +#endif + +const BYTE host_depth_store_2xmsaa_cs[] = +{ + 68, 88, 66, 67, 15, 231, + 223, 186, 190, 135, 229, 39, + 211, 185, 26, 121, 39, 17, + 25, 229, 1, 0, 0, 0, + 52, 11, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 172, 2, 0, 0, 188, 2, + 0, 0, 204, 2, 0, 0, + 152, 10, 0, 0, 82, 68, + 69, 70, 112, 2, 0, 0, + 2, 0, 0, 0, 92, 1, + 0, 0, 4, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 70, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 220, 0, 0, 0, 2, 0, + 0, 0, 5, 0, 0, 0, + 6, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 247, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_4xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_4xmsaa_cs.h new file mode 100644 index 000000000..b99a06d46 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_4xmsaa_cs.h @@ -0,0 +1,526 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeHostDepthStoreRectangleConstants +// { +// +// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 +// +// } +// +// cbuffer XeHostDepthStoreRenderTargetConstants +// { +// +// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_host_depth_store_source texture float 2dMS T0 t0 1 +// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 +// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 +// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 +dcl_resource_texture2dms(0) (float,float,float,float) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 5 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(2), l(10), CB1[1][0].x +ushr r0.y, vThreadID.x, l(1) +ubfe r0.z, l(10), l(20), CB0[0][0].x +imul null, r0.z, r0.x, r0.z +ult r0.y, r0.z, r0.y +if_nz r0.y + ret +endif +ushr r1.y, CB0[0][0].x, l(10) +mov r1.x, CB0[0][0].x +bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) +ishl r1.x, vThreadID.x, l(2) +ushr r1.y, vThreadID.y, l(1) +imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx +bfi r0.yz, l(0, 31, 31, 0), l(0, 1, 1, 0), r1.xxyx, vThreadID.xxyx +and r0.w, CB1[1][0].x, l(1023) +imul null, r2.xy, r0.xxxx, l(80, 16, 0, 0) +udiv r2.zw, null, r0.yyyz, r2.xxxy +imad r0.x, r2.w, r0.w, r2.z +imad r0.yz, -r2.zzwz, r2.xxyx, r0.yyzy +imul null, r0.w, r2.y, r2.x +imad r0.y, r0.z, r2.x, r0.y +imad r0.x, r0.x, r0.w, r0.y +ushr r0.x, r0.x, l(2) +bfi r0.y, l(1), l(1), vThreadID.y, l(0) +iadd r0.zw, r0.yyyx, l(0, 0, 1, 1) +mov r1.zw, l(0,0,0,0) +ldms r2.x, r1.xyww, T0[0].xyzw, r0.y +ldms r2.y, r1.xyzw, T0[0].yxzw, r0.z +iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.z, r4.xyww, T0[0].yzxw, r0.y +ldms r2.w, r4.xyzw, T0[0].yzwx, r0.z +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +mov r3.zw, l(0,0,0,0) +ldms r2.x, r3.xyww, T0[0].xyzw, r0.y +ldms r2.y, r3.xyzw, T0[0].yxzw, r0.z +iadd r1.xy, r1.xyxx, l(3, 0, 0, 0) +mov r1.zw, l(0,0,0,0) +ldms r2.z, r1.xyww, T0[0].yzxw, r0.y +ldms r2.w, r1.xyzw, T0[0].yzwx, r0.z +store_uav_typed U0[0].xyzw, r0.wwww, r2.xyzw +ret +// Approximately 44 instruction slots used +#endif + +const BYTE host_depth_store_4xmsaa_cs[] = +{ + 68, 88, 66, 67, 100, 194, + 8, 49, 89, 51, 189, 50, + 214, 126, 192, 98, 132, 90, + 183, 36, 1, 0, 0, 0, + 232, 9, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 172, 2, 0, 0, 188, 2, + 0, 0, 204, 2, 0, 0, + 76, 9, 0, 0, 82, 68, + 69, 70, 112, 2, 0, 0, + 2, 0, 0, 0, 92, 1, + 0, 0, 4, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 70, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 220, 0, 0, 0, 2, 0, + 0, 0, 5, 0, 0, 0, + 6, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 247, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 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b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/passthrough_position_xy_vs.h @@ -0,0 +1,120 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xy 0 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Position 0 xyzw 0 POS float xyzw +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input v0.xy +dcl_output_siv o0.xyzw, position +mov o0.xy, v0.xyxx +mov o0.zw, l(0,0,0,1.000000) +ret +// Approximately 3 instruction slots used +#endif + +const BYTE passthrough_position_xy_vs[] = +{ + 68, 88, 66, 67, 228, 252, + 150, 103, 204, 200, 35, 231, + 157, 180, 182, 79, 123, 204, + 157, 78, 1, 0, 0, 0, + 12, 2, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 160, 0, 0, 0, 212, 0, + 0, 0, 8, 1, 0, 0, + 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0, + 0, 0, 1, 0, 0, 0, + 54, 0, 0, 5, 50, 32, + 16, 0, 0, 0, 0, 0, + 70, 16, 16, 0, 0, 0, + 0, 0, 54, 0, 0, 8, + 194, 32, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 128, 63, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_point_list_gs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_point_list_gs.h new file mode 100644 index 000000000..c71626f88 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_point_list_gs.h @@ -0,0 +1,1533 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer xe_system_cbuffer +// { +// +// uint xe_flags; // Offset: 0 Size: 4 [unused] +// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 [unused] +// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 [unused] +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 [unused] +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 [unused] +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float xyzw +// TEXCOORD 1 xyzw 1 NONE float xyzw +// TEXCOORD 2 xyzw 2 NONE float xyzw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// TEXCOORD 4 xyzw 4 NONE float xyzw +// TEXCOORD 5 xyzw 5 NONE float xyzw +// TEXCOORD 6 xyzw 6 NONE float xyzw +// TEXCOORD 7 xyzw 7 NONE float xyzw +// TEXCOORD 8 xyzw 8 NONE float xyzw +// TEXCOORD 9 xyzw 9 NONE float xyzw +// TEXCOORD 10 xyzw 10 NONE float xyzw +// TEXCOORD 11 xyzw 11 NONE float xyzw +// TEXCOORD 12 xyzw 12 NONE float xyzw +// TEXCOORD 13 xyzw 13 NONE float xyzw +// TEXCOORD 14 xyzw 14 NONE float xyzw +// TEXCOORD 15 xyzw 15 NONE float xyzw +// TEXCOORD 16 xyz 16 NONE float z +// SV_Position 0 xyzw 17 POS float xyzw +// SV_ClipDistance 0 xyzw 18 CLIPDST float xyzw +// SV_ClipDistance 1 xy 19 CLIPDST float xy +// SV_CullDistance 0 z 19 CULLDST float z +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float xyzw +// TEXCOORD 1 xyzw 1 NONE float xyzw +// TEXCOORD 2 xyzw 2 NONE float xyzw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// TEXCOORD 4 xyzw 4 NONE float xyzw +// TEXCOORD 5 xyzw 5 NONE float xyzw +// TEXCOORD 6 xyzw 6 NONE float xyzw +// TEXCOORD 7 xyzw 7 NONE float xyzw +// TEXCOORD 8 xyzw 8 NONE float xyzw +// TEXCOORD 9 xyzw 9 NONE float xyzw +// TEXCOORD 10 xyzw 10 NONE float xyzw +// TEXCOORD 11 xyzw 11 NONE float xyzw +// TEXCOORD 12 xyzw 12 NONE float xyzw +// TEXCOORD 13 xyzw 13 NONE float xyzw +// TEXCOORD 14 xyzw 14 NONE float xyzw +// TEXCOORD 15 xyzw 15 NONE float xyzw +// TEXCOORD 16 xyz 16 NONE float xyz +// SV_Position 0 xyzw 17 POS float xyzw +// SV_ClipDistance 0 xyzw 18 CLIPDST float xyzw +// SV_ClipDistance 1 xy 19 CLIPDST float xy +// +gs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][11], immediateIndexed, space=0 +dcl_input v[1][0].xyzw +dcl_input v[1][1].xyzw +dcl_input v[1][2].xyzw +dcl_input v[1][3].xyzw +dcl_input v[1][4].xyzw +dcl_input v[1][5].xyzw +dcl_input v[1][6].xyzw +dcl_input v[1][7].xyzw +dcl_input v[1][8].xyzw +dcl_input v[1][9].xyzw +dcl_input v[1][10].xyzw +dcl_input v[1][11].xyzw +dcl_input v[1][12].xyzw +dcl_input v[1][13].xyzw +dcl_input v[1][14].xyzw +dcl_input v[1][15].xyzw +dcl_input v[1][16].xyz +dcl_input_siv v[1][17].xyzw, position +dcl_input v[1][18].xyzw +dcl_input v[1][19].xy +dcl_input v[1][19].z +dcl_temps 3 +dcl_inputprimitive point +dcl_stream m0 +dcl_outputtopology trianglestrip +dcl_output o0.xyzw +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_output o6.xyzw +dcl_output o7.xyzw +dcl_output o8.xyzw +dcl_output o9.xyzw +dcl_output o10.xyzw +dcl_output o11.xyzw +dcl_output o12.xyzw +dcl_output o13.xyzw +dcl_output o14.xyzw +dcl_output o15.xyzw +dcl_output o16.xyz +dcl_output_siv o17.xyzw, position +dcl_output_siv o18.xyzw, clip_distance +dcl_output_siv o19.xy, clip_distance +dcl_maxout 4 +lt [precise(x)] r0.x, v[0][19].z, l(0.000000) +ne [precise] r1.xyzw, v[0][17].xyzw, v[0][17].xyzw +or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx +or [precise(y)] r0.y, r0.z, r0.y +or [precise(x)] r0.x, r0.y, r0.x +if_nz r0.x + ret +endif +lt [precise(x)] r0.x, l(0.000000), v[0][16].z +movc [precise(x)] r1.x, r0.x, v[0][16].z, CB0[0][8].w +movc [precise(y)] r1.y, r0.x, v[0][16].z, CB0[0][9].w +max [precise(xy)] r0.xy, r1.xyxx, CB0[0][10].xxxx +min [precise(xy)] r0.xy, r0.xyxx, CB0[0][10].yyyy +mul [precise(xy)] r0.xy, r0.xyxx, CB0[0][10].zwzz +mul [precise(xy)] r0.xy, r0.xyxx, v[0][17].wwww +mov [precise(xyz)] r1.xyz, -r0.xxyx +mov [precise(w)] r1.w, r0.y +add [precise] r2.xyzw, r1.xwyz, v[0][17].xyxy +mov o0.xyzw, v[0][0].xyzw +mov o1.xyzw, v[0][1].xyzw +mov o2.xyzw, v[0][2].xyzw +mov o3.xyzw, v[0][3].xyzw +mov o4.xyzw, v[0][4].xyzw +mov o5.xyzw, v[0][5].xyzw +mov o6.xyzw, v[0][6].xyzw +mov o7.xyzw, v[0][7].xyzw +mov o8.xyzw, v[0][8].xyzw +mov o9.xyzw, v[0][9].xyzw +mov o10.xyzw, v[0][10].xyzw +mov o11.xyzw, v[0][11].xyzw +mov o12.xyzw, v[0][12].xyzw +mov o13.xyzw, v[0][13].xyzw +mov o14.xyzw, v[0][14].xyzw +mov o15.xyzw, v[0][15].xyzw +mov o16.xy, l(0,0,0,0) +mov o16.z, v[0][16].z +mov o17.xy, r2.xyxx +mov o17.zw, v[0][17].zzzw +mov o18.xyzw, v[0][18].xyzw +mov o19.xy, v[0][19].xyxx +emit_stream m0 +mov o0.xyzw, v[0][0].xyzw +mov o1.xyzw, v[0][1].xyzw +mov o2.xyzw, v[0][2].xyzw +mov o3.xyzw, v[0][3].xyzw +mov o4.xyzw, v[0][4].xyzw +mov o5.xyzw, v[0][5].xyzw +mov o6.xyzw, v[0][6].xyzw +mov o7.xyzw, v[0][7].xyzw +mov o8.xyzw, v[0][8].xyzw +mov o9.xyzw, v[0][9].xyzw +mov o10.xyzw, v[0][10].xyzw +mov o11.xyzw, v[0][11].xyzw +mov o12.xyzw, v[0][12].xyzw +mov o13.xyzw, v[0][13].xyzw +mov o14.xyzw, v[0][14].xyzw +mov o15.xyzw, v[0][15].xyzw +mov o16.xy, l(0,1.000000,0,0) +mov o16.z, v[0][16].z +mov o17.xy, r2.zwzz +mov o17.zw, v[0][17].zzzw +mov o18.xyzw, v[0][18].xyzw +mov o19.xy, v[0][19].xyxx +emit_stream m0 +add [precise(yw)] r0.yw, r0.xxxy, v[0][17].xxxy +mov o0.xyzw, v[0][0].xyzw +mov o1.xyzw, v[0][1].xyzw +mov o2.xyzw, v[0][2].xyzw +mov o3.xyzw, v[0][3].xyzw +mov o4.xyzw, v[0][4].xyzw +mov o5.xyzw, v[0][5].xyzw +mov o6.xyzw, v[0][6].xyzw +mov o7.xyzw, v[0][7].xyzw +mov o8.xyzw, v[0][8].xyzw +mov o9.xyzw, v[0][9].xyzw +mov o10.xyzw, v[0][10].xyzw +mov o11.xyzw, v[0][11].xyzw +mov o12.xyzw, v[0][12].xyzw +mov o13.xyzw, v[0][13].xyzw +mov o14.xyzw, v[0][14].xyzw +mov o15.xyzw, v[0][15].xyzw +mov o16.xy, l(1.000000,0,0,0) +mov o16.z, v[0][16].z +mov o17.xy, r0.ywyy +mov o17.zw, v[0][17].zzzw +mov o18.xyzw, v[0][18].xyzw +mov o19.xy, v[0][19].xyxx +emit_stream m0 +mov [precise(z)] r0.z, r1.z +add [precise(xy)] r0.xy, r0.xzxx, v[0][17].xyxx +mov o0.xyzw, v[0][0].xyzw +mov o1.xyzw, v[0][1].xyzw +mov o2.xyzw, v[0][2].xyzw +mov o3.xyzw, v[0][3].xyzw +mov o4.xyzw, v[0][4].xyzw +mov o5.xyzw, v[0][5].xyzw +mov o6.xyzw, v[0][6].xyzw +mov o7.xyzw, v[0][7].xyzw +mov o8.xyzw, v[0][8].xyzw +mov o9.xyzw, v[0][9].xyzw +mov o10.xyzw, v[0][10].xyzw +mov o11.xyzw, v[0][11].xyzw +mov o12.xyzw, v[0][12].xyzw +mov o13.xyzw, v[0][13].xyzw +mov o14.xyzw, v[0][14].xyzw +mov o15.xyzw, v[0][15].xyzw +mov o16.xy, l(1.000000,1.000000,0,0) +mov o16.z, v[0][16].z +mov o17.xy, r0.xyxx +mov o17.zw, v[0][17].zzzw +mov o18.xyzw, v[0][18].xyzw +mov o19.xy, v[0][19].xyxx +emit_stream m0 +cut_stream m0 +ret +// Approximately 115 instruction slots used +#endif + +const BYTE primitive_point_list_gs[] = +{ + 68, 88, 66, 67, 115, 124, + 241, 219, 23, 99, 136, 233, + 199, 163, 73, 55, 23, 40, + 165, 211, 1, 0, 0, 0, + 116, 29, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 164, 10, 0, 0, 228, 12, + 0, 0, 76, 15, 0, 0, + 216, 28, 0, 0, 82, 68, + 69, 70, 104, 10, 0, 0, + 1, 0, 0, 0, 120, 0, + 0, 0, 1, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 71, 0, 5, 4, 0, + 62, 10, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 100, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 120, 101, + 95, 115, 121, 115, 116, 101, + 109, 95, 99, 98, 117, 102, + 102, 101, 114, 0, 171, 171, + 100, 0, 0, 0, 32, 0, + 0, 0, 144, 0, 0, 0, + 224, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 144, 5, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 196, 5, + 0, 0, 4, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 232, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 12, 6, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 39, 6, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 62, 6, + 0, 0, 20, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 85, 6, 0, 0, + 24, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 116, 6, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 152, 6, 0, 0, 32, 0, + 0, 0, 96, 0, 0, 0, + 0, 0, 0, 0, 180, 6, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 216, 6, + 0, 0, 128, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 236, 6, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 16, 7, 0, 0, + 140, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 40, 7, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 76, 7, 0, 0, 144, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 236, 6, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 90, 7, + 0, 0, 156, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 40, 7, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 106, 7, 0, 0, + 160, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 232, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 128, 7, 0, 0, 168, 0, + 0, 0, 8, 0, 0, 0, + 2, 0, 0, 0, 232, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 151, 7, + 0, 0, 176, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 184, 7, 0, 0, + 180, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 200, 7, 0, 0, 184, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 116, 6, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 221, 7, + 0, 0, 192, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 8, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 36, 8, 0, 0, + 224, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 57, 8, 0, 0, 228, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 40, 7, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 81, 8, + 0, 0, 232, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 160, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 98, 8, 0, 0, + 236, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 119, 8, 0, 0, 240, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 140, 8, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 176, 8, + 0, 0, 0, 1, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 232, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 203, 8, 0, 0, + 8, 1, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 232, 5, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 229, 8, 0, 0, 16, 1, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 0, 9, + 0, 0, 32, 1, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 20, 9, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 56, 9, 0, 0, + 64, 1, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 88, 9, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 124, 9, 0, 0, 80, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 88, 9, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 149, 9, + 0, 0, 96, 1, 0, 0, + 64, 0, 0, 0, 0, 0, + 0, 0, 168, 9, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 204, 9, 0, 0, + 160, 1, 0, 0, 32, 0, + 0, 0, 0, 0, 0, 0, + 228, 9, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 8, 10, 0, 0, 192, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 88, 9, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 38, 10, + 0, 0, 208, 1, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 140, 8, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 101, 95, 102, + 108, 97, 103, 115, 0, 100, + 119, 111, 114, 100, 0, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 153, 5, 0, 0, + 120, 101, 95, 116, 101, 115, + 115, 101, 108, 108, 97, 116, + 105, 111, 110, 95, 102, 97, + 99, 116, 111, 114, 95, 114, + 97, 110, 103, 101, 0, 102, + 108, 111, 97, 116, 50, 0, + 1, 0, 3, 0, 1, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 225, 5, 0, 0, + 120, 101, 95, 108, 105, 110, + 101, 95, 108, 111, 111, 112, + 95, 99, 108, 111, 115, 105, + 110, 103, 95, 105, 110, 100, + 101, 120, 0, 120, 101, 95, + 118, 101, 114, 116, 101, 120, + 95, 105, 110, 100, 101, 120, + 95, 101, 110, 100, 105, 97, + 110, 0, 120, 101, 95, 118, + 101, 114, 116, 101, 120, 95, + 105, 110, 100, 101, 120, 95, + 111, 102, 102, 115, 101, 116, + 0, 120, 101, 95, 118, 101, + 114, 116, 101, 120, 95, 105, + 110, 100, 101, 120, 95, 109, + 105, 110, 95, 109, 97, 120, + 0, 117, 105, 110, 116, 50, + 0, 171, 1, 0, 19, 0, + 1, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 109, 6, + 0, 0, 120, 101, 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b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_quad_list_gs.h new file mode 100644 index 000000000..ac77eae81 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_quad_list_gs.h @@ -0,0 +1,886 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float xyzw +// TEXCOORD 1 xyzw 1 NONE float xyzw +// TEXCOORD 2 xyzw 2 NONE float xyzw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// TEXCOORD 4 xyzw 4 NONE float xyzw +// TEXCOORD 5 xyzw 5 NONE float xyzw +// TEXCOORD 6 xyzw 6 NONE float xyzw +// TEXCOORD 7 xyzw 7 NONE float xyzw +// TEXCOORD 8 xyzw 8 NONE float xyzw +// TEXCOORD 9 xyzw 9 NONE float xyzw +// TEXCOORD 10 xyzw 10 NONE float xyzw +// TEXCOORD 11 xyzw 11 NONE float xyzw +// TEXCOORD 12 xyzw 12 NONE float xyzw +// TEXCOORD 13 xyzw 13 NONE float xyzw +// TEXCOORD 14 xyzw 14 NONE float xyzw +// TEXCOORD 15 xyzw 15 NONE float xyzw +// TEXCOORD 16 xyz 16 NONE float xyz +// SV_Position 0 xyzw 17 POS float xyzw +// SV_ClipDistance 0 xyzw 18 CLIPDST float xyzw +// SV_ClipDistance 1 xy 19 CLIPDST float xy +// SV_CullDistance 0 z 19 CULLDST float +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float xyzw +// TEXCOORD 1 xyzw 1 NONE float xyzw +// TEXCOORD 2 xyzw 2 NONE float xyzw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// TEXCOORD 4 xyzw 4 NONE float xyzw +// TEXCOORD 5 xyzw 5 NONE float xyzw +// TEXCOORD 6 xyzw 6 NONE float xyzw +// TEXCOORD 7 xyzw 7 NONE float xyzw +// TEXCOORD 8 xyzw 8 NONE float xyzw +// TEXCOORD 9 xyzw 9 NONE float xyzw +// TEXCOORD 10 xyzw 10 NONE float xyzw +// TEXCOORD 11 xyzw 11 NONE float xyzw +// TEXCOORD 12 xyzw 12 NONE float xyzw +// TEXCOORD 13 xyzw 13 NONE float xyzw +// TEXCOORD 14 xyzw 14 NONE float xyzw +// TEXCOORD 15 xyzw 15 NONE float xyzw +// TEXCOORD 16 xyz 16 NONE float xyz +// SV_Position 0 xyzw 17 POS float xyzw +// SV_ClipDistance 0 xyzw 18 CLIPDST float xyzw +// SV_ClipDistance 1 xy 19 CLIPDST float xy +// +gs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input v[4][0].xyzw +dcl_input v[4][1].xyzw +dcl_input v[4][2].xyzw +dcl_input v[4][3].xyzw +dcl_input v[4][4].xyzw +dcl_input v[4][5].xyzw +dcl_input v[4][6].xyzw +dcl_input v[4][7].xyzw +dcl_input v[4][8].xyzw +dcl_input v[4][9].xyzw +dcl_input v[4][10].xyzw +dcl_input v[4][11].xyzw +dcl_input v[4][12].xyzw +dcl_input v[4][13].xyzw +dcl_input v[4][14].xyzw +dcl_input v[4][15].xyzw +dcl_input v[4][16].xyz +dcl_input_siv v[4][17].xyzw, position +dcl_input v[4][18].xyzw +dcl_input v[4][19].xy +dcl_input v[4][19].z +dcl_inputprimitive lineadj +dcl_stream m0 +dcl_outputtopology trianglestrip +dcl_output o0.xyzw +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_output o6.xyzw +dcl_output o7.xyzw +dcl_output o8.xyzw +dcl_output o9.xyzw +dcl_output o10.xyzw +dcl_output o11.xyzw +dcl_output o12.xyzw +dcl_output o13.xyzw +dcl_output o14.xyzw +dcl_output o15.xyzw +dcl_output o16.xyz +dcl_output_siv o17.xyzw, position +dcl_output_siv o18.xyzw, clip_distance +dcl_output_siv o19.xy, clip_distance +dcl_maxout 4 +mov o0.xyzw, v[0][0].xyzw +mov o1.xyzw, v[0][1].xyzw +mov o2.xyzw, v[0][2].xyzw +mov o3.xyzw, v[0][3].xyzw +mov o4.xyzw, v[0][4].xyzw +mov o5.xyzw, v[0][5].xyzw +mov o6.xyzw, v[0][6].xyzw +mov o7.xyzw, v[0][7].xyzw +mov o8.xyzw, v[0][8].xyzw +mov o9.xyzw, v[0][9].xyzw +mov o10.xyzw, v[0][10].xyzw +mov o11.xyzw, v[0][11].xyzw +mov o12.xyzw, v[0][12].xyzw +mov o13.xyzw, v[0][13].xyzw +mov o14.xyzw, v[0][14].xyzw +mov o15.xyzw, v[0][15].xyzw +mov o16.xyz, v[0][16].xyzx +mov o17.xyzw, v[0][17].xyzw +mov o18.xyzw, v[0][18].xyzw +mov o19.xy, v[0][19].xyxx +emit_stream m0 +mov o0.xyzw, v[1][0].xyzw +mov o1.xyzw, v[1][1].xyzw +mov o2.xyzw, v[1][2].xyzw +mov o3.xyzw, v[1][3].xyzw +mov o4.xyzw, v[1][4].xyzw +mov o5.xyzw, v[1][5].xyzw +mov o6.xyzw, v[1][6].xyzw +mov o7.xyzw, v[1][7].xyzw +mov o8.xyzw, v[1][8].xyzw +mov o9.xyzw, v[1][9].xyzw +mov o10.xyzw, v[1][10].xyzw +mov o11.xyzw, v[1][11].xyzw +mov o12.xyzw, v[1][12].xyzw +mov o13.xyzw, v[1][13].xyzw +mov o14.xyzw, v[1][14].xyzw +mov o15.xyzw, v[1][15].xyzw +mov o16.xyz, v[1][16].xyzx +mov o17.xyzw, v[1][17].xyzw +mov o18.xyzw, v[1][18].xyzw +mov o19.xy, v[1][19].xyxx +emit_stream m0 +mov o0.xyzw, v[3][0].xyzw +mov o1.xyzw, v[3][1].xyzw +mov o2.xyzw, v[3][2].xyzw +mov o3.xyzw, v[3][3].xyzw +mov o4.xyzw, v[3][4].xyzw +mov o5.xyzw, v[3][5].xyzw +mov o6.xyzw, v[3][6].xyzw +mov o7.xyzw, v[3][7].xyzw +mov o8.xyzw, v[3][8].xyzw +mov o9.xyzw, v[3][9].xyzw +mov o10.xyzw, v[3][10].xyzw +mov o11.xyzw, v[3][11].xyzw +mov o12.xyzw, v[3][12].xyzw +mov o13.xyzw, v[3][13].xyzw +mov o14.xyzw, v[3][14].xyzw +mov o15.xyzw, v[3][15].xyzw +mov o16.xyz, v[3][16].xyzx +mov o17.xyzw, v[3][17].xyzw +mov o18.xyzw, v[3][18].xyzw +mov o19.xy, v[3][19].xyxx +emit_stream m0 +mov o0.xyzw, v[2][0].xyzw +mov o1.xyzw, v[2][1].xyzw +mov o2.xyzw, v[2][2].xyzw +mov o3.xyzw, v[2][3].xyzw +mov o4.xyzw, v[2][4].xyzw +mov o5.xyzw, v[2][5].xyzw +mov o6.xyzw, v[2][6].xyzw +mov o7.xyzw, v[2][7].xyzw +mov o8.xyzw, v[2][8].xyzw +mov o9.xyzw, v[2][9].xyzw +mov o10.xyzw, v[2][10].xyzw +mov o11.xyzw, v[2][11].xyzw +mov o12.xyzw, v[2][12].xyzw +mov o13.xyzw, v[2][13].xyzw +mov o14.xyzw, v[2][14].xyzw +mov o15.xyzw, v[2][15].xyzw +mov o16.xyz, v[2][16].xyzx +mov o17.xyzw, v[2][17].xyzw +mov o18.xyzw, v[2][18].xyzw +mov o19.xy, v[2][19].xyxx +emit_stream m0 +cut_stream m0 +ret +// Approximately 86 instruction slots used +#endif + +const BYTE primitive_quad_list_gs[] = +{ + 68, 88, 66, 67, 60, 29, + 113, 120, 166, 105, 127, 75, + 174, 160, 2, 184, 182, 91, + 66, 12, 1, 0, 0, 0, + 36, 16, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 160, 0, 0, 0, 224, 2, + 0, 0, 72, 5, 0, 0, + 136, 15, 0, 0, 82, 68, + 69, 70, 100, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 71, 0, 5, 4, 0, + 60, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 73, 83, + 71, 78, 56, 2, 0, 0, + 21, 0, 0, 0, 8, 0, + 0, 0, 0, 2, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 2, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 4, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 5, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 6, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 6, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 7, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 8, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 9, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 10, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 11, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 12, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 13, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 13, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 14, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 15, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 16, 0, 0, 0, 7, 7, + 0, 0, 9, 2, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 17, 0, 0, 0, 15, 15, + 0, 0, 21, 2, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 3, 0, 0, 0, + 18, 0, 0, 0, 15, 15, + 0, 0, 21, 2, 0, 0, + 1, 0, 0, 0, 2, 0, + 0, 0, 3, 0, 0, 0, + 19, 0, 0, 0, 3, 3, + 0, 0, 37, 2, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 19, 0, 0, 0, 4, 0, + 0, 0, 84, 69, 88, 67, + 79, 79, 82, 68, 0, 83, + 86, 95, 80, 111, 115, 105, + 116, 105, 111, 110, 0, 83, + 86, 95, 67, 108, 105, 112, + 68, 105, 115, 116, 97, 110, + 99, 101, 0, 83, 86, 95, + 67, 117, 108, 108, 68, 105, + 115, 116, 97, 110, 99, 101, + 0, 171, 171, 171, 79, 83, + 71, 53, 96, 2, 0, 0, + 20, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 1, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 2, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 4, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 5, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 6, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 6, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 7, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 8, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 9, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 9, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 10, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 11, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 12, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 13, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 13, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 14, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 15, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 16, 0, 0, 0, + 7, 8, 0, 0, 0, 0, + 0, 0, 65, 2, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 17, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 77, 2, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 3, 0, 0, 0, 18, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 77, 2, + 0, 0, 1, 0, 0, 0, + 2, 0, 0, 0, 3, 0, + 0, 0, 19, 0, 0, 0, + 3, 12, 0, 0, 84, 69, + 88, 67, 79, 79, 82, 68, + 0, 83, 86, 95, 80, 111, + 115, 105, 116, 105, 111, 110, + 0, 83, 86, 95, 67, 108, + 105, 112, 68, 105, 115, 116, + 97, 110, 99, 101, 0, 171, + 171, 171, 83, 72, 69, 88, + 56, 10, 0, 0, 81, 0, + 2, 0, 142, 2, 0, 0, + 106, 8, 0, 1, 95, 0, + 0, 4, 242, 16, 32, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 4, + 242, 16, 32, 0, 4, 0, + 0, 0, 1, 0, 0, 0, + 95, 0, 0, 4, 242, 16, + 32, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 95, 0, + 0, 4, 242, 16, 32, 0, + 4, 0, 0, 0, 3, 0, + 0, 0, 95, 0, 0, 4, + 242, 16, 32, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 95, 0, 0, 4, 242, 16, + 32, 0, 4, 0, 0, 0, + 5, 0, 0, 0, 95, 0, + 0, 4, 242, 16, 32, 0, + 4, 0, 0, 0, 6, 0, + 0, 0, 95, 0, 0, 4, + 242, 16, 32, 0, 4, 0, + 0, 0, 7, 0, 0, 0, + 95, 0, 0, 4, 242, 16, + 32, 0, 4, 0, 0, 0, + 8, 0, 0, 0, 95, 0, + 0, 4, 242, 16, 32, 0, + 4, 0, 0, 0, 9, 0, + 0, 0, 95, 0, 0, 4, + 242, 16, 32, 0, 4, 0, + 0, 0, 10, 0, 0, 0, + 95, 0, 0, 4, 242, 16, + 32, 0, 4, 0, 0, 0, + 11, 0, 0, 0, 95, 0, + 0, 4, 242, 16, 32, 0, + 4, 0, 0, 0, 12, 0, + 0, 0, 95, 0, 0, 4, + 242, 16, 32, 0, 4, 0, + 0, 0, 13, 0, 0, 0, + 95, 0, 0, 4, 242, 16, + 32, 0, 4, 0, 0, 0, + 14, 0, 0, 0, 95, 0, + 0, 4, 242, 16, 32, 0, + 4, 0, 0, 0, 15, 0, + 0, 0, 95, 0, 0, 4, + 114, 16, 32, 0, 4, 0, + 0, 0, 16, 0, 0, 0, + 97, 0, 0, 5, 242, 16, + 32, 0, 4, 0, 0, 0, + 17, 0, 0, 0, 1, 0, + 0, 0, 95, 0, 0, 4, + 242, 16, 32, 0, 4, 0, + 0, 0, 18, 0, 0, 0, + 95, 0, 0, 4, 50, 16, + 32, 0, 4, 0, 0, 0, + 19, 0, 0, 0, 95, 0, + 0, 4, 66, 16, 32, 0, + 4, 0, 0, 0, 19, 0, + 0, 0, 93, 48, 0, 1, + 143, 0, 0, 3, 0, 0, + 17, 0, 0, 0, 0, 0, + 92, 40, 0, 1, 101, 0, + 0, 3, 242, 32, 16, 0, + 0, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 1, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 2, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 3, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 4, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 5, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 6, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 7, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 8, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 9, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 10, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 11, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 12, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 13, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 14, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 15, 0, 0, 0, 101, 0, + 0, 3, 114, 32, 16, 0, + 16, 0, 0, 0, 103, 0, + 0, 4, 242, 32, 16, 0, + 17, 0, 0, 0, 1, 0, + 0, 0, 103, 0, 0, 4, + 242, 32, 16, 0, 18, 0, + 0, 0, 2, 0, 0, 0, + 103, 0, 0, 4, 50, 32, + 16, 0, 19, 0, 0, 0, + 2, 0, 0, 0, 94, 0, + 0, 2, 4, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 0, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 1, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 2, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 3, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 4, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 5, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 5, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 6, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 6, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 7, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 7, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 8, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 9, 0, 0, 0, + 70, 30, 32, 0, 0, 0, + 0, 0, 9, 0, 0, 0, + 54, 0, 0, 6, 242, 32, + 16, 0, 10, 0, 0, 0, + 70, 30, 32, 0, 0, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_rectangle_list_gs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_rectangle_list_gs.h new file mode 100644 index 000000000..6ce8c711d --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/primitive_rectangle_list_gs.h @@ -0,0 +1,2145 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float xyzw +// TEXCOORD 1 xyzw 1 NONE float xyzw +// TEXCOORD 2 xyzw 2 NONE float xyzw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// TEXCOORD 4 xyzw 4 NONE float xyzw +// TEXCOORD 5 xyzw 5 NONE float xyzw +// TEXCOORD 6 xyzw 6 NONE float xyzw +// TEXCOORD 7 xyzw 7 NONE float xyzw +// TEXCOORD 8 xyzw 8 NONE float xyzw +// TEXCOORD 9 xyzw 9 NONE float xyzw +// TEXCOORD 10 xyzw 10 NONE float xyzw +// TEXCOORD 11 xyzw 11 NONE float xyzw +// TEXCOORD 12 xyzw 12 NONE float xyzw +// TEXCOORD 13 xyzw 13 NONE float xyzw +// TEXCOORD 14 xyzw 14 NONE float xyzw +// TEXCOORD 15 xyzw 15 NONE float xyzw +// TEXCOORD 16 xyz 16 NONE float xyz +// SV_Position 0 xyzw 17 POS float xyzw +// SV_ClipDistance 0 xyzw 18 CLIPDST float xyzw +// SV_ClipDistance 1 xy 19 CLIPDST float xy +// SV_CullDistance 0 z 19 CULLDST float z +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xyzw 0 NONE float xyzw +// TEXCOORD 1 xyzw 1 NONE float xyzw +// TEXCOORD 2 xyzw 2 NONE float xyzw +// TEXCOORD 3 xyzw 3 NONE float xyzw +// TEXCOORD 4 xyzw 4 NONE float xyzw +// TEXCOORD 5 xyzw 5 NONE float xyzw +// TEXCOORD 6 xyzw 6 NONE float xyzw +// TEXCOORD 7 xyzw 7 NONE float xyzw +// TEXCOORD 8 xyzw 8 NONE float xyzw +// TEXCOORD 9 xyzw 9 NONE float xyzw +// TEXCOORD 10 xyzw 10 NONE float xyzw +// TEXCOORD 11 xyzw 11 NONE float xyzw +// TEXCOORD 12 xyzw 12 NONE float xyzw +// TEXCOORD 13 xyzw 13 NONE float xyzw +// TEXCOORD 14 xyzw 14 NONE float xyzw +// TEXCOORD 15 xyzw 15 NONE float xyzw +// TEXCOORD 16 xyz 16 NONE float xyz +// SV_Position 0 xyzw 17 POS float xyzw +// SV_ClipDistance 0 xyzw 18 CLIPDST float xyzw +// SV_ClipDistance 1 xy 19 CLIPDST float xy +// +gs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input v[3][0].xyzw +dcl_input v[3][1].xyzw +dcl_input v[3][2].xyzw +dcl_input v[3][3].xyzw +dcl_input v[3][4].xyzw +dcl_input v[3][5].xyzw +dcl_input v[3][6].xyzw +dcl_input v[3][7].xyzw +dcl_input v[3][8].xyzw +dcl_input v[3][9].xyzw +dcl_input v[3][10].xyzw +dcl_input v[3][11].xyzw +dcl_input v[3][12].xyzw +dcl_input v[3][13].xyzw +dcl_input v[3][14].xyzw +dcl_input v[3][15].xyzw +dcl_input v[3][16].xyz +dcl_input_siv v[3][17].xyzw, position +dcl_input v[3][18].xyzw +dcl_input v[3][19].xy +dcl_input v[3][19].z +dcl_temps 20 +dcl_inputprimitive triangle +dcl_stream m0 +dcl_outputtopology trianglestrip +dcl_output o0.xyzw +dcl_output o1.xyzw +dcl_output o2.xyzw +dcl_output o3.xyzw +dcl_output o4.xyzw +dcl_output o5.xyzw +dcl_output o6.xyzw +dcl_output o7.xyzw +dcl_output o8.xyzw +dcl_output o9.xyzw +dcl_output o10.xyzw +dcl_output o11.xyzw +dcl_output o12.xyzw +dcl_output o13.xyzw +dcl_output o14.xyzw +dcl_output o15.xyzw +dcl_output o16.xyz +dcl_output_siv o17.xyzw, position +dcl_output_siv o18.xyzw, clip_distance +dcl_output_siv o19.xy, clip_distance +dcl_maxout 6 +max [precise(x)] r0.x, v[1][19].z, v[0][19].z +max [precise(x)] r0.x, r0.x, v[2][19].z +lt [precise(x)] r0.x, r0.x, l(0.000000) +ne [precise] r1.xyzw, v[0][17].xyzw, v[0][17].xyzw +or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx +or [precise(y)] r0.y, r0.z, r0.y +or [precise(x)] r0.x, r0.y, r0.x +ne [precise] r1.xyzw, v[1][17].xyzw, v[1][17].xyzw +or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx +or [precise(y)] r0.y, r0.z, r0.y +or [precise(x)] r0.x, r0.y, r0.x +ne [precise] r1.xyzw, v[2][17].xyzw, v[2][17].xyzw +or [precise(yz)] r0.yz, r1.zzwz, r1.xxyx +or [precise(y)] r0.y, r0.z, r0.y +or [precise(x)] r0.x, r0.y, r0.x +if_nz r0.x + ret +endif +mov o0.xyzw, v[0][0].xyzw +mov o1.xyzw, v[0][1].xyzw +mov o2.xyzw, v[0][2].xyzw +mov o3.xyzw, v[0][3].xyzw +mov o4.xyzw, v[0][4].xyzw +mov o5.xyzw, v[0][5].xyzw +mov o6.xyzw, v[0][6].xyzw +mov o7.xyzw, v[0][7].xyzw +mov o8.xyzw, v[0][8].xyzw +mov o9.xyzw, v[0][9].xyzw +mov o10.xyzw, v[0][10].xyzw +mov o11.xyzw, v[0][11].xyzw +mov o12.xyzw, v[0][12].xyzw +mov o13.xyzw, v[0][13].xyzw +mov o14.xyzw, v[0][14].xyzw +mov o15.xyzw, v[0][15].xyzw +mov o16.xyz, v[0][16].xyzx +mov o17.xyzw, v[0][17].xyzw +mov o18.xyzw, v[0][18].xyzw +mov o19.xy, v[0][19].xyxx +emit_stream m0 +mov o0.xyzw, v[1][0].xyzw +mov o1.xyzw, v[1][1].xyzw +mov o2.xyzw, v[1][2].xyzw +mov o3.xyzw, v[1][3].xyzw +mov o4.xyzw, v[1][4].xyzw +mov o5.xyzw, v[1][5].xyzw +mov o6.xyzw, v[1][6].xyzw +mov o7.xyzw, v[1][7].xyzw +mov o8.xyzw, v[1][8].xyzw +mov o9.xyzw, v[1][9].xyzw +mov o10.xyzw, v[1][10].xyzw +mov o11.xyzw, v[1][11].xyzw +mov o12.xyzw, v[1][12].xyzw +mov o13.xyzw, v[1][13].xyzw +mov o14.xyzw, v[1][14].xyzw +mov o15.xyzw, v[1][15].xyzw +mov o16.xyz, v[1][16].xyzx +mov o17.xyzw, v[1][17].xyzw +mov o18.xyzw, v[1][18].xyzw +mov o19.xy, v[1][19].xyxx +emit_stream m0 +mov o0.xyzw, v[2][0].xyzw +mov o1.xyzw, v[2][1].xyzw +mov o2.xyzw, v[2][2].xyzw +mov o3.xyzw, v[2][3].xyzw +mov o4.xyzw, v[2][4].xyzw +mov o5.xyzw, v[2][5].xyzw +mov o6.xyzw, v[2][6].xyzw +mov o7.xyzw, v[2][7].xyzw +mov o8.xyzw, v[2][8].xyzw +mov o9.xyzw, v[2][9].xyzw +mov o10.xyzw, v[2][10].xyzw +mov o11.xyzw, v[2][11].xyzw +mov o12.xyzw, v[2][12].xyzw +mov o13.xyzw, v[2][13].xyzw +mov o14.xyzw, v[2][14].xyzw +mov o15.xyzw, v[2][15].xyzw +mov o16.xyz, v[2][16].xyzx +mov o17.xyzw, v[2][17].xyzw +mov o18.xyzw, v[2][18].xyzw +mov o19.xy, v[2][19].xyxx +emit_stream m0 +cut_stream m0 +add [precise(xyz)] r0.xyz, -v[0][17].xyzx, v[1][17].xyzx +add [precise(xyz)] r1.xyz, -v[0][17].xyzx, v[2][17].xyzx +add [precise(xyz)] r2.xyz, -v[1][17].xyzx, v[2][17].xyzx +dp3 [precise(x)] r0.x, r0.xyzx, r0.xyzx +dp3 [precise(y)] r0.y, r1.xyzx, r1.xyzx +dp3 [precise(z)] r0.z, r2.xyzx, r2.xyzx +lt [precise(w)] r0.w, r0.x, r0.z +lt [precise(x)] r1.x, r0.y, r0.z +and [precise(w)] r0.w, r0.w, r1.x +if_nz r0.w + mov o0.xyzw, v[2][0].xyzw + mov o1.xyzw, v[2][1].xyzw + mov o2.xyzw, v[2][2].xyzw + mov o3.xyzw, v[2][3].xyzw + mov o4.xyzw, v[2][4].xyzw + mov o5.xyzw, v[2][5].xyzw + mov o6.xyzw, v[2][6].xyzw + mov o7.xyzw, v[2][7].xyzw + mov o8.xyzw, v[2][8].xyzw + mov o9.xyzw, v[2][9].xyzw + mov o10.xyzw, v[2][10].xyzw + mov o11.xyzw, v[2][11].xyzw + mov o12.xyzw, v[2][12].xyzw + mov o13.xyzw, v[2][13].xyzw + mov o14.xyzw, v[2][14].xyzw + mov o15.xyzw, v[2][15].xyzw + mov o16.xyz, v[2][16].xyzx + mov o17.xyzw, v[2][17].xyzw + mov o18.xyzw, v[2][18].xyzw + mov o19.xy, v[2][19].xyxx + emit_stream m0 + mov o0.xyzw, v[1][0].xyzw + mov o1.xyzw, v[1][1].xyzw + mov o2.xyzw, v[1][2].xyzw + mov o3.xyzw, v[1][3].xyzw + mov o4.xyzw, v[1][4].xyzw + mov o5.xyzw, v[1][5].xyzw + mov o6.xyzw, v[1][6].xyzw + mov o7.xyzw, v[1][7].xyzw + mov o8.xyzw, v[1][8].xyzw + mov o9.xyzw, v[1][9].xyzw + mov o10.xyzw, v[1][10].xyzw + mov o11.xyzw, v[1][11].xyzw + mov o12.xyzw, v[1][12].xyzw + mov o13.xyzw, v[1][13].xyzw + mov o14.xyzw, v[1][14].xyzw + mov o15.xyzw, v[1][15].xyzw + mov o16.xyz, v[1][16].xyzx + mov o17.xyzw, v[1][17].xyzw + mov o18.xyzw, v[1][18].xyzw + mov o19.xy, v[1][19].xyxx + emit_stream m0 + mov [precise(xyz)] r0.xyz, l(1.000000,1.000000,-1.000000,0) +else + lt [precise(x)] r0.x, r0.x, r0.y + lt [precise(y)] r0.y, r0.z, r0.y + and [precise(x)] r0.x, r0.y, r0.x + if_nz r0.x + mov o0.xyzw, v[0][0].xyzw + mov o1.xyzw, v[0][1].xyzw + mov o2.xyzw, v[0][2].xyzw + mov o3.xyzw, v[0][3].xyzw + mov o4.xyzw, v[0][4].xyzw + mov o5.xyzw, v[0][5].xyzw + mov o6.xyzw, v[0][6].xyzw + mov o7.xyzw, v[0][7].xyzw + mov o8.xyzw, v[0][8].xyzw + mov o9.xyzw, v[0][9].xyzw + mov o10.xyzw, v[0][10].xyzw + mov o11.xyzw, v[0][11].xyzw + mov o12.xyzw, v[0][12].xyzw + mov o13.xyzw, v[0][13].xyzw + mov o14.xyzw, v[0][14].xyzw + mov o15.xyzw, v[0][15].xyzw + mov o16.xyz, v[0][16].xyzx + mov o17.xyzw, v[0][17].xyzw + mov o18.xyzw, v[0][18].xyzw + mov o19.xy, v[0][19].xyxx + emit_stream m0 + mov o0.xyzw, v[2][0].xyzw + mov o1.xyzw, v[2][1].xyzw + mov o2.xyzw, v[2][2].xyzw + mov o3.xyzw, v[2][3].xyzw + mov o4.xyzw, v[2][4].xyzw + mov o5.xyzw, v[2][5].xyzw + mov o6.xyzw, v[2][6].xyzw + mov o7.xyzw, v[2][7].xyzw + mov o8.xyzw, v[2][8].xyzw + mov o9.xyzw, v[2][9].xyzw + mov o10.xyzw, v[2][10].xyzw + mov o11.xyzw, v[2][11].xyzw + mov o12.xyzw, v[2][12].xyzw + mov o13.xyzw, v[2][13].xyzw + mov o14.xyzw, v[2][14].xyzw + mov o15.xyzw, v[2][15].xyzw + mov o16.xyz, v[2][16].xyzx + mov o17.xyzw, v[2][17].xyzw + mov o18.xyzw, v[2][18].xyzw + mov o19.xy, v[2][19].xyxx + emit_stream m0 + mov [precise(xy)] r0.xy, l(-1.000000,1.000000,0,0) + else + mov o0.xyzw, v[1][0].xyzw + mov o1.xyzw, v[1][1].xyzw + mov o2.xyzw, v[1][2].xyzw + mov o3.xyzw, v[1][3].xyzw + mov o4.xyzw, v[1][4].xyzw + mov o5.xyzw, v[1][5].xyzw + mov o6.xyzw, v[1][6].xyzw + mov o7.xyzw, v[1][7].xyzw + mov o8.xyzw, v[1][8].xyzw + mov o9.xyzw, v[1][9].xyzw + mov o10.xyzw, v[1][10].xyzw + mov o11.xyzw, v[1][11].xyzw + mov o12.xyzw, v[1][12].xyzw + mov o13.xyzw, v[1][13].xyzw + mov o14.xyzw, v[1][14].xyzw + mov o15.xyzw, v[1][15].xyzw + mov o16.xyz, v[1][16].xyzx + mov o17.xyzw, v[1][17].xyzw + mov o18.xyzw, v[1][18].xyzw + mov o19.xy, v[1][19].xyxx + emit_stream m0 + mov o0.xyzw, v[0][0].xyzw + mov o1.xyzw, v[0][1].xyzw + mov o2.xyzw, v[0][2].xyzw + mov o3.xyzw, v[0][3].xyzw + mov o4.xyzw, v[0][4].xyzw + mov o5.xyzw, v[0][5].xyzw + mov o6.xyzw, v[0][6].xyzw + mov o7.xyzw, v[0][7].xyzw + mov o8.xyzw, v[0][8].xyzw + mov o9.xyzw, v[0][9].xyzw + mov o10.xyzw, v[0][10].xyzw + mov o11.xyzw, v[0][11].xyzw + mov o12.xyzw, v[0][12].xyzw + mov o13.xyzw, v[0][13].xyzw + mov o14.xyzw, v[0][14].xyzw + mov o15.xyzw, v[0][15].xyzw + mov o16.xyz, v[0][16].xyzx + mov o17.xyzw, v[0][17].xyzw + mov o18.xyzw, v[0][18].xyzw + mov o19.xy, v[0][19].xyxx + emit_stream m0 + mov [precise(xy)] r0.xy, l(1.000000,-1.000000,0,0) + endif + mov [precise(z)] r0.z, l(1.000000) +endif +mul r1.xyzw, r0.xxxx, v[1][0].xyzw +mad r1.xyzw, r0.zzzz, v[0][0].xyzw, r1.xyzw +mad r1.xyzw, r0.yyyy, v[2][0].xyzw, r1.xyzw +mul r2.xyzw, r0.xxxx, v[1][1].xyzw +mad r2.xyzw, r0.zzzz, v[0][1].xyzw, r2.xyzw +mad r2.xyzw, r0.yyyy, v[2][1].xyzw, r2.xyzw +mul r3.xyzw, r0.xxxx, v[1][2].xyzw +mad r3.xyzw, r0.zzzz, v[0][2].xyzw, r3.xyzw +mad r3.xyzw, r0.yyyy, v[2][2].xyzw, r3.xyzw +mul r4.xyzw, r0.xxxx, v[1][3].xyzw +mad r4.xyzw, r0.zzzz, v[0][3].xyzw, r4.xyzw +mad r4.xyzw, r0.yyyy, v[2][3].xyzw, r4.xyzw +mul r5.xyzw, r0.xxxx, v[1][4].xyzw +mad r5.xyzw, r0.zzzz, v[0][4].xyzw, r5.xyzw +mad r5.xyzw, r0.yyyy, v[2][4].xyzw, r5.xyzw +mul r6.xyzw, r0.xxxx, v[1][5].xyzw +mad r6.xyzw, r0.zzzz, v[0][5].xyzw, r6.xyzw +mad r6.xyzw, r0.yyyy, v[2][5].xyzw, r6.xyzw +mul r7.xyzw, r0.xxxx, v[1][6].xyzw +mad r7.xyzw, r0.zzzz, v[0][6].xyzw, r7.xyzw +mad r7.xyzw, r0.yyyy, v[2][6].xyzw, r7.xyzw +mul r8.xyzw, r0.xxxx, v[1][7].xyzw +mad r8.xyzw, r0.zzzz, v[0][7].xyzw, r8.xyzw +mad r8.xyzw, r0.yyyy, v[2][7].xyzw, r8.xyzw +mul r9.xyzw, r0.xxxx, v[1][8].xyzw +mad r9.xyzw, r0.zzzz, v[0][8].xyzw, r9.xyzw +mad r9.xyzw, r0.yyyy, v[2][8].xyzw, r9.xyzw +mul r10.xyzw, r0.xxxx, v[1][9].xyzw +mad r10.xyzw, r0.zzzz, v[0][9].xyzw, r10.xyzw +mad r10.xyzw, r0.yyyy, v[2][9].xyzw, r10.xyzw +mul r11.xyzw, r0.xxxx, v[1][10].xyzw +mad r11.xyzw, r0.zzzz, v[0][10].xyzw, r11.xyzw +mad r11.xyzw, r0.yyyy, v[2][10].xyzw, r11.xyzw +mul r12.xyzw, r0.xxxx, v[1][11].xyzw +mad r12.xyzw, r0.zzzz, v[0][11].xyzw, r12.xyzw +mad r12.xyzw, r0.yyyy, v[2][11].xyzw, r12.xyzw +mul r13.xyzw, r0.xxxx, v[1][12].xyzw +mad r13.xyzw, r0.zzzz, v[0][12].xyzw, r13.xyzw +mad r13.xyzw, r0.yyyy, v[2][12].xyzw, r13.xyzw +mul r14.xyzw, r0.xxxx, v[1][13].xyzw +mad r14.xyzw, r0.zzzz, v[0][13].xyzw, r14.xyzw +mad r14.xyzw, r0.yyyy, v[2][13].xyzw, r14.xyzw +mul r15.xyzw, r0.xxxx, v[1][14].xyzw +mad r15.xyzw, r0.zzzz, v[0][14].xyzw, r15.xyzw +mad r15.xyzw, r0.yyyy, v[2][14].xyzw, r15.xyzw +mul r16.xyzw, r0.xxxx, v[1][15].xyzw +mad r16.xyzw, r0.zzzz, v[0][15].xyzw, r16.xyzw +mad r16.xyzw, r0.yyyy, v[2][15].xyzw, r16.xyzw +mul r17.xyz, r0.xxxx, v[1][16].xyzx +mad r17.xyz, r0.zzzz, v[0][16].xyzx, r17.xyzx +mad r17.xyz, r0.yyyy, v[2][16].xyzx, r17.xyzx +mul [precise] r18.xyzw, r0.zzzz, v[0][17].xyzw +mul [precise] r19.xyzw, r0.xxxx, v[1][17].xyzw +add [precise] r18.xyzw, r18.xyzw, r19.xyzw +mul [precise] r19.xyzw, r0.yyyy, v[2][17].xyzw +add [precise] r18.xyzw, r18.xyzw, r19.xyzw +mul r19.xyzw, r0.xxxx, v[1][18].xyzw +mad r19.xyzw, r0.zzzz, v[0][18].xyzw, r19.xyzw +mad r19.xyzw, r0.yyyy, v[2][18].xyzw, r19.xyzw +mul r0.xw, r0.xxxx, v[1][19].xxxy +mad r0.xz, r0.zzzz, v[0][19].xxyx, r0.xxwx +mad r0.xy, r0.yyyy, v[2][19].xyxx, r0.xzxx +mov o0.xyzw, r1.xyzw +mov o1.xyzw, r2.xyzw +mov o2.xyzw, r3.xyzw +mov o3.xyzw, r4.xyzw +mov o4.xyzw, r5.xyzw +mov o5.xyzw, r6.xyzw +mov o6.xyzw, r7.xyzw +mov o7.xyzw, r8.xyzw +mov o8.xyzw, r9.xyzw +mov o9.xyzw, r10.xyzw +mov o10.xyzw, r11.xyzw +mov o11.xyzw, r12.xyzw +mov o12.xyzw, r13.xyzw +mov o13.xyzw, r14.xyzw +mov o14.xyzw, r15.xyzw +mov o15.xyzw, r16.xyzw +mov o16.xyz, r17.xyzx +mov o17.xyzw, r18.xyzw +mov o18.xyzw, r19.xyzw +mov o19.xy, r0.xyxx +emit_stream m0 +cut_stream m0 +ret +// Approximately 315 instruction slots used +#endif + +const BYTE primitive_rectangle_list_gs[] = +{ + 68, 88, 66, 67, 8, 81, + 101, 117, 123, 39, 249, 189, + 184, 94, 218, 115, 216, 148, + 125, 96, 1, 0, 0, 0, + 68, 40, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 160, 0, 0, 0, 224, 2, + 0, 0, 72, 5, 0, 0, + 168, 39, 0, 0, 82, 68, + 69, 70, 100, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 71, 0, 5, 4, 0, + 60, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 73, 83, + 71, 78, 56, 2, 0, 0, + 21, 0, 0, 0, 8, 0, + 0, 0, 0, 2, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 2, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 4, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 5, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 6, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 6, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 7, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 8, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 9, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 10, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 11, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 12, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 13, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 13, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 14, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 15, 0, 0, 0, 15, 15, + 0, 0, 0, 2, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 16, 0, 0, 0, 7, 7, + 0, 0, 9, 2, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 17, 0, 0, 0, 15, 15, + 0, 0, 21, 2, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 3, 0, 0, 0, + 18, 0, 0, 0, 15, 15, + 0, 0, 21, 2, 0, 0, + 1, 0, 0, 0, 2, 0, + 0, 0, 3, 0, 0, 0, + 19, 0, 0, 0, 3, 3, + 0, 0, 37, 2, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 19, 0, 0, 0, 4, 4, + 0, 0, 84, 69, 88, 67, + 79, 79, 82, 68, 0, 83, + 86, 95, 80, 111, 115, 105, + 116, 105, 111, 110, 0, 83, + 86, 95, 67, 108, 105, 112, + 68, 105, 115, 116, 97, 110, + 99, 101, 0, 83, 86, 95, + 67, 117, 108, 108, 68, 105, + 115, 116, 97, 110, 99, 101, + 0, 171, 171, 171, 79, 83, + 71, 53, 96, 2, 0, 0, + 20, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 1, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 2, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 4, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 5, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 6, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 6, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 7, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 8, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 9, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 9, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 10, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 11, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 12, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 13, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 13, 0, 0, 0, + 15, 0, 0, 0, 0, 0, + 0, 0, 56, 2, 0, 0, + 14, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 14, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 56, 2, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 15, 0, + 0, 0, 15, 0, 0, 0, + 0, 0, 0, 0, 56, 2, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 16, 0, 0, 0, + 7, 8, 0, 0, 0, 0, + 0, 0, 65, 2, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 17, 0, 0, 0, 15, 0, + 0, 0, 0, 0, 0, 0, + 77, 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xe_resolve_edram_info; // Offset: 8 Size: 4 +// uint xe_resolve_address_info; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) +udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) +imad r0.w, r1.w, r1.x, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx +if_nz r1.y + uge r0.w, r0.x, l(40) + movc r0.w, r0.w, l(-40), l(40) + iadd r0.x, r0.w, r0.x +endif +imad r0.x, r0.y, l(80), r0.x +imad r0.x, r0.z, l(1280), r0.x +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx +iadd r0.yzw, r0.xxxx, l(0, 1, 3, 7) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(2, 4, 5, 6) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r0.wwww, CB0[0][0].xxxx +ret +// Approximately 39 instruction slots used +#endif + +const BYTE resolve_clear_32bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 140, 19, + 54, 17, 139, 47, 113, 249, + 181, 109, 144, 226, 191, 108, + 237, 69, 1, 0, 0, 0, + 128, 8, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 64, 2, 0, 0, 80, 2, + 0, 0, 96, 2, 0, 0, + 228, 7, 0, 0, 82, 68, + 69, 70, 4, 2, 0, 0, + 1, 0, 0, 0, 176, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 220, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 156, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 0, + 88, 101, 82, 101, 115, 111, + 108, 118, 101, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 156, 0, 0, 0, + 3, 0, 0, 0, 200, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 64, 1, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 96, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 132, 1, 0, 0, 8, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 160, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 196, 1, + 0, 0, 12, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 160, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 99, 108, 101, 97, 114, + 95, 118, 97, 108, 117, 101, + 0, 117, 105, 110, 116, 50, + 0, 171, 171, 171, 1, 0, + 19, 0, 1, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 87, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 154, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 124, 5, 0, 0, 81, 0, + 5, 0, 95, 1, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 3, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 138, 0, 0, 17, + 50, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 230, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 10, 82, 0, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 80, 0, + 0, 6, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 26, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 6, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 2, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 85, 0, 0, 9, 34, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 5, 0, 0, 0, + 55, 0, 0, 15, 50, 0, + 16, 0, 0, 0, 0, 0, + 134, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 4, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 7, 18, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 17, 50, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 4, 34, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 2, 0, 30, 0, + 0, 7, 50, 0, 16, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 138, 0, 0, 11, + 66, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 12, 0, 0, 0, 1, 64, + 0, 0, 13, 0, 0, 0, + 42, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 12, 50, 0, 16, 0, + 1, 0, 0, 0, 166, 138, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 255, 3, 0, 0, 0, 16, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 78, 0, + 0, 11, 194, 0, 16, 0, + 1, 0, 0, 0, 0, 208, + 0, 0, 6, 4, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 35, 0, 0, 9, 130, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 42, 0, + 16, 0, 1, 0, 0, 0, + 30, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 35, 0, + 0, 13, 50, 0, 16, 0, + 0, 0, 0, 0, 230, 10, + 16, 128, 65, 0, 0, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 80, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 31, 0, 4, 3, + 26, 0, 16, 0, 1, 0, + 0, 0, 80, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 40, 0, 0, 0, + 55, 0, 0, 9, 130, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 216, 255, 255, 255, 1, 64, + 0, 0, 40, 0, 0, 0, + 30, 0, 0, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 21, 0, + 0, 1, 35, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 80, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 5, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 164, 0, 0, 10, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 30, 0, 0, 10, 226, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 3, 0, 0, 0, + 7, 0, 0, 0, 164, 0, + 0, 10, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 86, 5, 16, 0, + 0, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 2, 0, 0, 0, + 4, 0, 0, 0, 5, 0, + 0, 0, 6, 0, 0, 0, + 164, 0, 0, 10, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 1, 0, 0, 0, + 6, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 164, 0, + 0, 10, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 166, 10, 16, 0, + 0, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 0, 0, 10, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 86, 5, 16, 0, 1, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 164, 0, 0, 10, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 166, 10, + 16, 0, 1, 0, 0, 0, + 6, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 164, 0, + 0, 10, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 1, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 0, 0, 10, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 246, 15, 16, 0, 0, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 39, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 11, 0, 0, 0, + 7, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_3xres_cs.h new file mode 100644 index 000000000..f9abc694c --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_3xres_cs.h @@ -0,0 +1,562 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 +// uint xe_resolve_edram_info; // Offset: 8 Size: 4 +// uint xe_resolve_address_info; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) +udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) +imad r0.w, r1.w, r1.x, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx +if_nz r1.y + uge r0.w, r0.x, l(40) + movc r0.w, r0.w, l(-40), l(40) + iadd r0.x, r0.w, r0.x +endif +imad r0.x, r0.y, l(80), r0.x +imad r0.x, r0.z, l(1280), r0.x +imul null, r0.x, r0.x, l(9) +ushr r0.x, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx +iadd r0.y, r0.x, l(1) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(2, 3, 4, 5) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(6, 7, 8, 9) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(10, 11, 12, 13) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(14, 15, 16, 17) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +ret +// Approximately 54 instruction slots used +#endif + +const BYTE resolve_clear_32bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 51, 137, + 123, 106, 36, 61, 194, 60, + 107, 228, 69, 223, 155, 48, + 117, 12, 1, 0, 0, 0, + 184, 10, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 64, 2, 0, 0, 80, 2, + 0, 0, 96, 2, 0, 0, + 28, 10, 0, 0, 82, 68, + 69, 70, 4, 2, 0, 0, + 1, 0, 0, 0, 176, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 220, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 156, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 0, + 88, 101, 82, 101, 115, 111, + 108, 118, 101, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 156, 0, 0, 0, + 3, 0, 0, 0, 200, 0, + 0, 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0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 18, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_cs.h new file mode 100644 index 000000000..960fc26a4 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_32bpp_cs.h @@ -0,0 +1,402 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 +// uint xe_resolve_edram_info; // Offset: 8 Size: 4 +// uint xe_resolve_address_info; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) +udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) +imad r0.w, r1.w, r1.x, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx +if_nz r1.y + uge r0.w, r0.x, l(40) + movc r0.w, r0.w, l(-40), l(40) + iadd r0.x, r0.w, r0.x +endif +imad r0.x, r0.y, l(80), r0.x +imad r0.x, r0.z, l(1280), r0.x +ushr r0.x, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx +iadd r0.y, r0.x, l(1) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx +ret +// Approximately 33 instruction slots used +#endif + +const BYTE resolve_clear_32bpp_cs[] = +{ + 68, 88, 66, 67, 212, 33, + 57, 169, 71, 99, 28, 75, + 202, 138, 254, 170, 245, 39, + 113, 44, 1, 0, 0, 0, + 120, 7, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 64, 2, 0, 0, 80, 2, + 0, 0, 96, 2, 0, 0, + 220, 6, 0, 0, 82, 68, + 69, 70, 4, 2, 0, 0, + 1, 0, 0, 0, 176, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 220, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 156, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 0, + 88, 101, 82, 101, 115, 111, + 108, 118, 101, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 156, 0, 0, 0, + 3, 0, 0, 0, 200, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 64, 1, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 96, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 132, 1, 0, 0, 8, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 160, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 196, 1, + 0, 0, 12, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 160, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 99, 108, 101, 97, 114, + 95, 118, 97, 108, 117, 101, + 0, 117, 105, 110, 116, 50, + 0, 171, 171, 171, 1, 0, + 19, 0, 1, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 87, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 154, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 116, 4, 0, 0, 81, 0, + 5, 0, 29, 1, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 3, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 138, 0, 0, 17, + 50, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 230, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 10, 82, 0, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 80, 0, + 0, 6, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 26, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 6, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 2, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 85, 0, 0, 9, 34, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 5, 0, 0, 0, + 55, 0, 0, 15, 50, 0, + 16, 0, 0, 0, 0, 0, + 134, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 4, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 7, 18, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 17, 50, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 4, 34, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 2, 0, 30, 0, + 0, 7, 50, 0, 16, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 138, 0, 0, 11, + 66, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 12, 0, 0, 0, 1, 64, + 0, 0, 13, 0, 0, 0, + 42, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 12, 50, 0, 16, 0, + 1, 0, 0, 0, 166, 138, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 255, 3, 0, 0, 0, 16, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 78, 0, + 0, 11, 194, 0, 16, 0, + 1, 0, 0, 0, 0, 208, + 0, 0, 6, 4, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 35, 0, 0, 9, 130, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 42, 0, + 16, 0, 1, 0, 0, 0, + 30, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 35, 0, + 0, 13, 50, 0, 16, 0, + 0, 0, 0, 0, 230, 10, + 16, 128, 65, 0, 0, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 80, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 0, 0, + 0, 0, 31, 0, 4, 3, + 26, 0, 16, 0, 1, 0, + 0, 0, 80, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 40, 0, 0, 0, + 55, 0, 0, 9, 130, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 216, 255, 255, 255, 1, 64, + 0, 0, 40, 0, 0, 0, + 30, 0, 0, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 21, 0, + 0, 1, 35, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 80, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 5, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 85, 0, 0, 7, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 164, 0, 0, 10, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 6, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 30, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 164, 0, 0, 10, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 86, 5, 16, 0, 0, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 33, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 10, 0, 0, 0, + 8, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_2xres_cs.h new file mode 100644 index 000000000..6e8279075 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_2xres_cs.h @@ -0,0 +1,515 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 +// uint xe_resolve_edram_info; // Offset: 8 Size: 4 +// uint xe_resolve_address_info; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r0.w, CB0[0][0].z, l(1023) +udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) +ishl r1.z, r1.x, l(1) +imad r0.w, r1.y, r0.w, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, l(1) +imad r0.x, r0.z, l(1280), r0.x +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(1, 3, 7, 15) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +iadd r2.xyzw, r0.xxxx, l(2, 4, 5, 6) +store_uav_typed U0[0].xyzw, r2.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r2.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r2.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r2.wwww, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +iadd r2.xyzw, r0.xxxx, l(8, 9, 10, 11) +store_uav_typed U0[0].xyzw, r2.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r2.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r2.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r2.wwww, CB0[0][0].xyxy +iadd r0.yzw, r0.xxxx, l(0, 12, 13, 14) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r0.wwww, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +ret +// Approximately 46 instruction slots used +#endif + +const BYTE resolve_clear_64bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 83, 196, + 195, 117, 81, 175, 248, 206, + 212, 200, 214, 225, 96, 167, + 204, 10, 1, 0, 0, 0, + 208, 9, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 64, 2, 0, 0, 80, 2, + 0, 0, 96, 2, 0, 0, + 52, 9, 0, 0, 82, 68, + 69, 70, 4, 2, 0, 0, + 1, 0, 0, 0, 176, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 220, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 156, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 0, + 88, 101, 82, 101, 115, 111, + 108, 118, 101, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 156, 0, 0, 0, + 3, 0, 0, 0, 200, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 64, 1, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 96, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 132, 1, 0, 0, 8, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 160, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 196, 1, + 0, 0, 12, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 160, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 99, 108, 101, 97, 114, + 95, 118, 97, 108, 117, 101, + 0, 117, 105, 110, 116, 50, + 0, 171, 171, 171, 1, 0, + 19, 0, 1, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 87, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 154, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 204, 6, 0, 0, 81, 0, + 5, 0, 179, 1, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 3, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 138, 0, 0, 17, + 50, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 230, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 10, 82, 0, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 80, 0, + 0, 6, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 26, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 6, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 2, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 85, 0, 0, 9, 34, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 5, 0, 0, 0, + 55, 0, 0, 15, 50, 0, + 16, 0, 0, 0, 0, 0, + 134, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 4, 0, 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0, 80, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 41, 0, 0, 7, 66, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 35, 0, + 0, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 66, 0, 16, 0, + 0, 0, 0, 0, 58, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 13, + 50, 0, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 128, + 65, 0, 0, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 80, 0, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 35, 0, 0, 9, 18, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 80, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 41, 0, 0, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 35, 0, + 0, 9, 18, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 5, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 164, 0, + 0, 10, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 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+ 6, 0, 0, 0, 2, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_3xres_cs.h new file mode 100644 index 000000000..706ad9a65 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_clear_64bpp_3xres_cs.h @@ -0,0 +1,724 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 +// uint xe_resolve_edram_info; // Offset: 8 Size: 4 +// uint xe_resolve_address_info; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r0.w, CB0[0][0].z, l(1023) +udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) +ishl r1.z, r1.x, l(1) +imad r0.w, r1.y, r0.w, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, l(1) +imad r0.x, r0.z, l(1280), r0.x +imul null, r0.x, r0.x, l(9) +ushr r0.x, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy +iadd r0.yz, r0.xxxx, l(0, 1, 3, 0) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +iadd r0.y, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(4, 5, 6, 7) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(8, 9, 10, 11) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(12, 13, 14, 15) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(16, 17, 18, 19) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(20, 21, 22, 23) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(24, 25, 26, 27) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(28, 29, 30, 31) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(32, 33, 34, 35) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +ret +// Approximately 74 instruction slots used +#endif + +const BYTE resolve_clear_64bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 171, 211, + 186, 178, 117, 238, 37, 217, + 139, 177, 150, 24, 232, 77, + 219, 176, 1, 0, 0, 0, + 16, 14, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 64, 2, 0, 0, 80, 2, + 0, 0, 96, 2, 0, 0, + 116, 13, 0, 0, 82, 68, + 69, 70, 4, 2, 0, 0, + 1, 0, 0, 0, 176, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 220, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 156, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 0, + 88, 101, 82, 101, 115, 111, + 108, 118, 101, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 156, 0, 0, 0, + 3, 0, 0, 0, 200, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 64, 1, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 96, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 132, 1, 0, 0, 8, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 160, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 196, 1, + 0, 0, 12, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 160, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 99, 108, 101, 97, 114, + 95, 118, 97, 108, 117, 101, + 0, 117, 105, 110, 116, 50, + 0, 171, 171, 171, 1, 0, + 19, 0, 1, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 87, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 154, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 12, 11, 0, 0, 81, 0, + 5, 0, 195, 2, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 3, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 138, 0, 0, 17, + 50, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 230, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 10, 82, 0, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 80, 0, + 0, 6, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 26, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 6, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 2, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 85, 0, 0, 9, 34, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 5, 0, 0, 0, + 55, 0, 0, 15, 50, 0, + 16, 0, 0, 0, 0, 0, + 134, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 4, 0, 0, 0, 4, 0, + 0, 0, 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+// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r0.w, CB0[0][0].z, l(1023) +udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) +ishl r1.z, r1.x, l(1) +imad r0.w, r1.y, r0.w, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, l(1) +imad r0.x, r0.z, l(1280), r0.x +ushr r0.x, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy +iadd r0.yz, r0.xxxx, l(0, 1, 3, 0) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +iadd r0.y, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy +ret +// Approximately 33 instruction slots used +#endif + +const BYTE resolve_clear_64bpp_cs[] = +{ + 68, 88, 66, 67, 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0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_1x2xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_1x2xmsaa_cs.h new file mode 100644 index 000000000..97c5aa10b --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_1x2xmsaa_cs.h @@ -0,0 +1,1267 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 7 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +and r3.xyzw, CB0[0][0].xxzz, l(1023, 4096, 0x01000000, 7) +uge r1.w, l(3), r1.y +if_nz r1.w + mov r4.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.yw, r2.wwww, l(0, 2, 0, 1) +and r1.yw, r1.yyyw, l(0, 1, 0, 1) +ishl r1.yw, r2.xxxy, r1.yyyw +ushr r4.x, r4.y, l(1) +and r2.xy, r4.xyxx, l(1, 1, 0, 0) +iadd r1.yw, r1.yyyw, r2.xxxy +udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) +imad r2.w, r2.y, r3.x, r2.x +iadd r2.z, r2.w, r2.z +imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw +if_nz r3.y + uge r2.x, r1.y, l(40) + movc r2.x, r2.x, l(-40), l(40) + iadd r1.y, r1.y, r2.x +endif +imad r1.y, r1.w, l(80), r1.y +imad r1.y, r2.z, l(1280), r1.y +ushr r1.y, r1.y, l(2) +ld r2.xyzw, r1.yyyy, T0[0].xyzw +iadd r1.y, r1.y, l(1) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + switch r1.y + case l(0) + case l(1) + and r5.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r5.xyzw + ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw + iadd r2.xyzw, r5.xyzw, r6.xyzw + and r5.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r5.xyzw + ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw + iadd r4.xyzw, r5.xyzw, r6.xyzw + break + case l(2) + case l(3) + case l(10) + case l(12) + and r5.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r5.xyzw + ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw + iadd r2.xyzw, r5.xyzw, r6.xyzw + and r5.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r5.xyzw + ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw + iadd r4.xyzw, r5.xyzw, r6.xyzw + break + default + break + endswitch +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +and r1.y, CB0[0][0].z, l(8) +if_nz r1.y + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r5.x + ushr r3.x, r1.x, l(5) + imad r1.z, r1.z, r3.x, r5.y + ishl r3.x, r0.z, l(10) + ishr r3.x, r3.x, l(6) + and r3.x, r3.x, l(96) + iadd r1.w, r1.w, r5.z + bfi r3.y, l(1), l(1), r1.w, l(0) + iadd r3.y, r3.y, r5.w + bfi r3.y, l(2), l(1), r3.y, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.y + bfi r3.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r1.zzzz, l(0, 0, 0, 0) + imad r3.xy, r3.xxxx, l(2, 16, 0, 0), r3.yzyy + bfi r1.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r1.yyyy, r3.xxyx + bfi r3.x, l(1), l(4), r0.z, l(0) + ubfe r3.y, l(3), l(6), r1.y + and r3.z, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.y, l(32), r1.w + imad r1.w, r3.z, l(4), r1.w + bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.xxxx, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r0.yw, r0.zzzz, l(0, 5, 0, 7) + and r0.yw, r0.yyyw, l(0, 448, 0, 2048) + bfi r1.x, l(23), l(9), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r1.x, r1.x, r0.z + ishl r1.zw, r0.yyyy, l(0, 0, 3, 2) + bfi r0.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r0.xxxx, r1.zwzz + imad r0.xy, r0.zzzz, l(8, 4, 0, 0), r0.xyxx + bfi r0.x, l(12), l(0), r0.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r5.z, l(2) + iadd r0.y, r5.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.y, l(6), l(0), r1.x, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ieq r0.yzw, r3.wwww, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.x, r0.x, l(2) +if_nz r0.y + ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ret +// Approximately 163 instruction slots used +#endif + +const BYTE resolve_fast_32bpp_1x2xmsaa_cs[] = +{ + 68, 88, 66, 67, 170, 170, + 165, 130, 168, 176, 195, 98, + 149, 147, 242, 194, 180, 42, + 229, 247, 1, 0, 0, 0, + 156, 24, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 0, 24, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, 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0, 0, 0, 16, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 21, 0, + 0, 1, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 30, 0, + 0, 7, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 2, 0, + 0, 0, 31, 0, 4, 3, + 26, 0, 16, 0, 0, 0, + 0, 0, 41, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 85, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 21, 0, + 0, 1, 31, 0, 4, 3, + 42, 0, 16, 0, 0, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 140, 0, 0, 17, 242, 0, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 21, 0, 0, 1, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 163, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 45, 0, + 0, 0, 37, 0, 0, 0, + 8, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 5, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_2xres_cs.h new file mode 100644 index 000000000..b2eeaa15a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_2xres_cs.h @@ -0,0 +1,1380 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 7 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r2.zw, l(0, 0, 2, 12), l(0, 0, 10, 13), CB0[0][0].xxxx +and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) +uge r1.w, l(3), r1.y +if_nz r1.w + mov r4.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.yw, r2.zzzz, l(0, 2, 0, 1) +and r4.zw, r1.yyyw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r4.zwzz +ushr r4.x, r4.y, l(1) +and r4.xy, r4.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r4.xyxx +udiv r4.xy, null, r2.xyxx, l(80, 16, 0, 0) +imad r1.w, r4.y, r3.x, r4.x +iadd r1.w, r1.w, r2.w +imad r2.xy, -r4.xyxx, l(80, 16, 0, 0), r2.xyxx +if_nz r3.y + uge r2.z, r2.x, l(40) + movc r2.z, r2.z, l(-40), l(40) + iadd r2.x, r2.z, r2.x +endif +imad r2.x, r2.y, l(80), r2.x +imad r1.w, r1.w, l(1280), r2.x +ld r2.xyzw, r1.wwww, T0[0].xyzw +movc r1.y, r1.y, l(2), l(1) +iadd r1.y, r1.y, r1.w +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + switch r1.y + case l(0) + case l(1) + and r5.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r5.xyzw + ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw + iadd r2.xyzw, r5.xyzw, r6.xyzw + and r5.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r5.xyzw + ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw + iadd r4.xyzw, r5.xyzw, r6.xyzw + break + case l(2) + case l(3) + case l(10) + case l(12) + and r5.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r5.xyzw + ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw + iadd r2.xyzw, r5.xyzw, r6.xyzw + and r5.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r5.xyzw + ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw + iadd r4.xyzw, r5.xyzw, r6.xyzw + break + default + break + endswitch + mov r5.yzw, r2.xxyz +else + mov r5.yzw, r2.xxyz +endif +if_nz r3.w + if_z r0.w + mov r5.x, r5.z + mov r2.z, r2.w + else + mov r5.x, r5.y + mov r2.z, r5.w + endif + if_z vThreadID.y + mov r2.xy, r2.zwzz + mov r4.xy, r4.zwzz + else + mov r2.xy, r5.xzxx + endif +else + mov r2.xyz, r5.yzwy +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +and r1.yz, CB0[0][0].zzzz, l(0, 7, 8, 0) +if_nz r1.z + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r1.w, CB0[0][0].w, l(10) + ishl r1.w, r1.w, l(5) + ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r5.x, r1.z, l(2) + ushr r1.w, r1.w, l(4) + and r1.w, r1.w, l(0x00007ffe) + imad r1.w, r5.x, r1.w, r3.x + ushr r3.x, r1.x, l(5) + imad r1.w, r1.w, r3.x, r3.y + ishl r3.x, r0.z, l(10) + and r3.x, r3.x, l(6144) + bfi r3.x, l(3), l(8), r0.w, r3.x + ishr r3.x, r3.x, l(6) + iadd r3.y, r3.z, r5.x + bfi r3.z, l(1), l(1), r3.y, l(0) + iadd r3.z, r3.z, r3.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r3.y, l(1), l(0), r3.y, r3.z + and r3.z, r3.x, l(112) + bfi r5.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r1.wwww, l(0, 0, 0, 0) + imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r5.xxxy + bfi r3.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r3.xxxx, r3.zzwz + bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 8, 11), r1.zzzz, r3.xxxz + ubfe r3.x, l(3), l(6), r1.z + and r3.z, r3.y, l(6) + bfi r3.y, l(1), l(8), r3.y, l(0) + imad r3.x, r3.x, l(32), r3.y + imad r3.x, r3.z, l(4), r3.x + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r1.zzzw + bfi r1.w, l(9), l(3), r3.x, r1.w + bfi r1.z, l(6), l(0), r1.z, r1.w +else + ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r3.y, r0.x, r3.x + ishl r1.xw, r0.zzzz, l(4, 0, 0, 7) + and r1.xw, r1.xxxw, l(224, 0, 0, 2048) + bfi r0.y, l(3), l(2), r0.w, r1.x + ishl r1.x, r1.x, l(1) + bfi r0.w, l(3), l(3), r0.w, r1.x + and r0.w, r0.w, l(480) + bfi r1.x, l(23), l(9), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r3.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r1.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r3.z, l(2) + iadd r0.y, r3.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.z, l(6), l(0), r1.x, r0.x +endif +ushr r0.x, r1.z, l(2) +ieq r0.yzw, r1.yyyy, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.w, r0.x, l(1) +if_nz r0.y + ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.wwww, r4.xyzw +ret +// Approximately 189 instruction slots used +#endif + +const BYTE resolve_fast_32bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 95, 241, + 122, 59, 132, 237, 21, 232, + 105, 199, 1, 55, 91, 71, + 66, 93, 1, 0, 0, 0, + 172, 26, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 16, 26, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 84, 23, 0, 0, 81, 0, + 5, 0, 213, 5, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 7, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 9, 146, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 2, 0, 2, 64, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 140, 0, 0, 11, 18, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 11, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 18, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 21, 0, + 0, 1, 85, 0, 0, 12, + 50, 0, 16, 0, 1, 0, + 0, 0, 86, 133, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 7, + 66, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 20, 50, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 38, 10, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 4, + 98, 0, 16, 0, 0, 0, + 0, 0, 86, 5, 2, 0, + 30, 0, 0, 7, 50, 0, + 16, 0, 2, 0, 0, 0, + 182, 15, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 138, 0, + 0, 17, 194, 0, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 12, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 10, 0, 0, 0, 13, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 3, 0, 0, 0, + 6, 130, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 255, 3, 0, 0, + 0, 16, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 64, + 80, 0, 0, 7, 130, 0, + 16, 0, 1, 0, 0, 0, + 1, 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0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 21, 0, 0, 1, 31, 0, + 4, 3, 42, 0, 16, 0, + 0, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 21, 0, + 0, 1, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 30, 0, + 0, 7, 130, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 31, 0, 4, 3, + 26, 0, 16, 0, 0, 0, + 0, 0, 41, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 85, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 21, 0, + 0, 1, 31, 0, 4, 3, + 42, 0, 16, 0, 0, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 140, 0, 0, 17, 242, 0, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 21, 0, 0, 1, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 246, 15, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 189, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 43, 0, + 0, 0, 38, 0, 0, 0, + 12, 0, 0, 0, 14, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 15, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h new file mode 100644 index 000000000..d013aab7c --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h @@ -0,0 +1,1908 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 9 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) +uge r1.w, l(3), r1.y +if_nz r1.w + mov r4.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.yw, r2.wwww, l(0, 2, 0, 1) +and r1.yw, r1.yyyw, l(0, 1, 0, 1) +ishl r1.yw, r2.xxxy, r1.yyyw +ushr r4.x, r4.y, l(1) +and r2.xy, r4.xyxx, l(1, 1, 0, 0) +iadd r1.yw, r1.yyyw, r2.xxxy +udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) +imad r2.w, r2.y, r3.x, r2.x +iadd r2.z, r2.w, r2.z +imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw +if_nz r3.y + uge r2.x, r1.y, l(40) + movc r2.x, r2.x, l(-40), l(40) + iadd r1.y, r1.y, r2.x +endif +imad r1.y, r1.w, l(80), r1.y +imad r1.y, r2.z, l(1280), r1.y +imul null, r1.y, r1.y, l(9) +ushr r1.y, r1.y, l(1) +ld r2.xy, r1.yyyy, T0[0].xyzw +iadd r4.xyzw, r1.yyyy, l(1, 2, 3, 4) +ld r2.zw, r4.xxxx, T0[0].zwxy +ld r5.xy, r4.yyyy, T0[0].xywz +ld r5.zw, r4.zzzz, T0[0].zwxy +ld r4.xy, r4.wwww, T0[0].yxzw +iadd r6.xyzw, r1.yyyy, l(5, 6, 7, 8) +ld r4.zw, r6.xxxx, T0[0].zwxy +ld r7.xy, r6.yyyy, T0[0].xyzw +ld r7.zw, r6.zzzz, T0[0].zwxy +ld r1.yw, r6.wwww, T0[0].zxwy +if_nz r3.z + ubfe r3.x, l(4), l(25), CB0[0][0].x + switch r3.x + case l(0) + case l(1) + and r6.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw + iadd r2.xyzw, r6.xyzw, r8.xyzw + and r6.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw + iadd r5.xyzw, r6.xyzw, r8.xyzw + mov r4.xyzw, r4.yxzw + and r6.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw + iadd r4.xyzw, r6.yxzw, r8.yxzw + and r6.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw + iadd r7.xyzw, r6.xyzw, r8.xyzw + and r3.xy, r1.ywyy, l(0xff00ff00, 0xff00ff00, 0, 0) + bfi r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r1.ywyy, r3.xyxx + ubfe r6.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r1.ywyy + iadd r1.yw, r3.xxxy, r6.xxxy + break + case l(2) + case l(3) + case l(10) + case l(12) + and r6.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw + iadd r2.xyzw, r6.xyzw, r8.xyzw + and r6.xyzw, r5.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw + iadd r5.xyzw, r6.xyzw, r8.xyzw + mov r4.xyzw, r4.yxzw + and r6.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw + iadd r4.xyzw, r6.yxzw, r8.yxzw + and r6.xyzw, r7.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw + iadd r7.xyzw, r6.xyzw, r8.xyzw + and r3.xy, r1.ywyy, l(0xc00ffc00, 0xc00ffc00, 0, 0) + bfi r3.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r1.ywyy, r3.xyxx + ubfe r6.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r1.ywyy + iadd r1.yw, r3.xxxy, r6.xxxy + break + default + break + endswitch +endif +if_nz r3.w + if_z r0.w + mov r2.x, r2.y + mov r5.z, r5.x + mov r3.x, r5.w + else + mov r3.x, r5.z + mov r5.z, r2.w + endif + if_z vThreadID.y + mov r2.xyz, r5.zxyz + mov r4.xzw, r7.xxyz + endif + mov r2.w, r5.z + mov r5.z, r3.x +endif +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r3.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +and r3.xy, CB0[0][0].zzzz, l(7, 8, 0, 0) +if_nz r3.y + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r3.y, CB0[0][0].w, l(10) + ishl r3.y, r3.y, l(5) + ishr r6.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r3.z, r1.z, l(2) + ushr r3.y, r3.y, l(4) + and r3.y, r3.y, l(0x00007ffe) + imad r3.y, r3.z, r3.y, r6.x + ushr r3.w, r1.x, l(5) + imad r3.y, r3.y, r3.w, r6.y + ishl r3.w, r0.z, l(10) + and r3.w, r3.w, l(6144) + bfi r3.w, l(3), l(8), r0.w, r3.w + ishr r3.w, r3.w, l(6) + iadd r3.z, r3.z, r6.z + bfi r6.xyz, l(1, 20, 20, 0), l(1, 10, 13, 0), r3.zyyz, l(0, 0, 0, 0) + iadd r6.x, r6.x, r6.w + bfi r6.x, l(2), l(1), r6.x, l(0) + bfi r3.z, l(1), l(0), r3.z, r6.x + and r6.x, r3.w, l(112) + imad r6.xy, r6.xxxx, l(2, 16, 0, 0), r6.yzyy + bfi r3.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r3.wwww, r6.xxxy + bfi r3.yw, l(0, 2, 0, 2), l(0, 8, 0, 11), r1.zzzz, r3.yyyw + ubfe r1.z, l(3), l(6), r3.y + and r6.x, r3.z, l(6) + bfi r3.z, l(1), l(8), r3.z, l(0) + imad r1.z, r1.z, l(32), r3.z + imad r1.z, r6.x, l(4), r1.z + bfi r3.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r3.yywy + bfi r1.z, l(9), l(3), r1.z, r3.z + bfi r1.z, l(6), l(0), r3.y, r1.z +else + ishr r6.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r6.y, r0.x, r6.x + ishl r3.yz, r0.zzzz, l(0, 4, 7, 0) + and r3.yz, r3.yyzy, l(0, 224, 2048, 0) + bfi r0.y, l(3), l(2), r0.w, r3.y + ishl r1.x, r3.y, l(1) + bfi r0.w, l(3), l(3), r0.w, r1.x + and r0.w, r0.w, l(480) + bfi r1.x, l(23), l(9), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r3.yw, r0.wwww, l(0, 3, 0, 2) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.yyyw + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r3.z, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r6.z, l(2) + iadd r0.y, r6.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.z, l(6), l(0), r1.x, r0.x +endif +imul null, r0.x, r1.z, l(9) +ushr r0.x, r0.x, l(3) +ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r6.xyzw +endif +if_nz r0.z + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +if_nz r0.y + ishl r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r3.xyzw, r6.xyzw +endif +if_nz r0.z + ushr r3.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r3.xyzw +endif +if_nz r0.y + ishl r3.xyzw, r4.yxzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.yxzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r3.yxzw, r6.yxzw +endif +if_nz r0.z + ushr r3.xyzw, r4.yxzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.yxzw +endif +if_nz r0.y + ishl r3.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r3.xyzw, r6.xyzw +endif +if_nz r0.z + ushr r3.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r3.xyzw +endif +if_nz r0.y + ishl r0.yw, r1.yyyw, l(0, 8, 0, 8) + and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r1.xz, r1.yywy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0x00ff00ff, 0, 0x00ff00ff, 0) + iadd r1.yw, r0.yyyw, r1.xxxz +endif +if_nz r0.z + ushr r0.yz, r1.yywy, l(0, 16, 16, 0) + bfi r1.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r1.yyyw, r0.yyyz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r3.xxxx, r2.zwzz +store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyxx +store_uav_typed U0[0].xyzw, r3.zzzz, r5.zwzz +store_uav_typed U0[0].xyzw, r3.wwww, r4.yxyy +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r2.xxxx, r4.zwzz +store_uav_typed U0[0].xyzw, r2.yyyy, r7.xyxx +store_uav_typed U0[0].xyzw, r2.zzzz, r7.zwzz +store_uav_typed U0[0].xyzw, r2.wwww, r1.ywyy +ret +// Approximately 261 instruction slots used +#endif + +const BYTE resolve_fast_32bpp_3xres_1x2xmsaa_cs[] = +{ + 68, 88, 66, 67, 61, 236, + 60, 105, 77, 120, 119, 136, + 114, 54, 33, 255, 107, 110, + 93, 108, 1, 0, 0, 0, + 88, 37, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 188, 36, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 0, 34, 0, 0, 81, 0, + 5, 0, 128, 8, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 9, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 9, 146, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 2, 0, 2, 64, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 140, 0, 0, 11, 18, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 11, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 18, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 21, 0, + 0, 1, 85, 0, 0, 12, + 50, 0, 16, 0, 1, 0, + 0, 0, 86, 133, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 7, + 66, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 20, 50, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 38, 10, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 4, + 98, 0, 16, 0, 0, 0, + 0, 0, 86, 5, 2, 0, + 30, 0, 0, 7, 50, 0, + 16, 0, 2, 0, 0, 0, + 182, 15, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 138, 0, + 0, 17, 194, 0, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 12, 0, + 0, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 13, 0, 0, 0, 10, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 3, 0, 0, 0, + 6, 130, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 255, 3, 0, 0, + 0, 16, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 64, + 80, 0, 0, 7, 130, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 31, 0, + 4, 3, 58, 0, 16, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 18, 0, 0, 1, 32, 0, + 0, 7, 130, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 5, 0, + 0, 0, 31, 0, 4, 3, + 58, 0, 16, 0, 1, 0, + 0, 0, 54, 0, 0, 5, + 34, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 2, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 34, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 21, 0, + 0, 1, 21, 0, 0, 1, + 80, 0, 0, 10, 162, 0, + 16, 0, 1, 0, 0, 0, + 246, 15, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 10, 162, 0, 16, 0, + 1, 0, 0, 0, 86, 13, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 41, 0, 0, 7, + 162, 0, 16, 0, 1, 0, + 0, 0, 6, 4, 16, 0, + 2, 0, 0, 0, 86, 13, + 16, 0, 1, 0, 0, 0, + 85, 0, 0, 7, 18, 0, + 16, 0, 4, 0, 0, 0, + 26, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 10, 50, 0, 16, 0, + 2, 0, 0, 0, 70, 0, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 162, 0, 16, 0, 1, 0, + 0, 0, 86, 13, 16, 0, + 1, 0, 0, 0, 6, 4, + 16, 0, 2, 0, 0, 0, + 78, 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15, 16, 0, 2, 0, + 0, 0, 214, 5, 16, 0, + 1, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 5, 1, + 0, 0, 9, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 59, 0, 0, 0, 57, 0, + 0, 0, 9, 0, 0, 0, + 20, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 9, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 16, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 9, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_4xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_4xmsaa_cs.h new file mode 100644 index 000000000..67728f003 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_3xres_4xmsaa_cs.h @@ -0,0 +1,2037 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 10 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r1.w, l(12), l(13), CB0[0][0].x +and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) +uge r2.z, l(3), r1.y +if_nz r2.z + mov r4.y, r1.y +else + ieq r2.z, r1.y, l(5) + if_nz r2.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) +ushr r4.x, r4.y, l(1) +bfi r2.xy, l(2, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx +udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) +imad r3.x, r2.w, r3.x, r2.z +iadd r1.w, r1.w, r3.x +imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx +if_nz r3.y + uge r2.z, r2.x, l(40) + movc r2.z, r2.z, l(-40), l(40) + iadd r2.x, r2.z, r2.x +endif +imad r2.x, r2.y, l(80), r2.x +imad r1.w, r1.w, l(1280), r2.x +imul null, r1.w, r1.w, l(9) +ushr r1.w, r1.w, l(1) +ine r2.xy, r1.yyyy, l(2, 3, 0, 0) +and r1.y, r2.y, r2.x +if_nz r1.y + ld r2.yz, r1.wwww, T0[0].wxyz + iadd r1.y, r1.w, l(1) + ld r2.xw, r1.yyyy, T0[0].yzwx + iadd r4.xyzw, r1.wwww, l(2, 3, 4, 9) + ld r5.xy, r4.xxxx, T0[0].xyzw + ld r5.zw, r4.yyyy, T0[0].zwxy + ld r6.x, r4.zzzz, T0[0].xyzw + ld r6.yz, r4.wwww, T0[0].zxyw + iadd r4.xyzw, r1.wwww, l(10, 11, 12, 13) + ld r3.xy, r4.xxxx, T0[0].xyzw + ld r7.yz, r4.yyyy, T0[0].zxyw + ld r4.xy, r4.zzzz, T0[0].xyzw + ld r4.w, r4.wwww, T0[0].zwyx + mov r6.w, r3.x + mov r7.x, r3.y + mov r7.w, r4.x + mov r4.zw, r4.yyyw +else + iadd r8.xyzw, r1.wwww, l(4, 5, 6, 7) + ld r2.y, r8.xxxx, T0[0].wyxz + ld r2.zw, r8.yyyy, T0[0].wzxy + ld r8.xy, r8.zzzz, T0[0].xyzw + ld r5.yz, r8.wwww, T0[0].zxyw + iadd r9.xyzw, r1.wwww, l(8, 13, 14, 15) + ld r8.zw, r9.xxxx, T0[0].zwxy + ld r6.y, r9.yyyy, T0[0].xyzw + ld r6.zw, r9.zzzz, T0[0].zwxy + ld r7.xy, r9.wwww, T0[0].xyzw + iadd r1.yw, r1.wwww, l(0, 16, 0, 17) + ld r7.zw, r1.yyyy, T0[0].zwxy + ld r4.zw, r1.wwww, T0[0].zwxy + mov r2.x, r8.x + mov r5.xw, r8.yyyz + mov r6.x, r8.w +endif +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + switch r1.y + case l(0) + case l(1) + and r8.xyzw, r2.yzwx, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.yzwx, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.yzwx + iadd r2.xyzw, r8.wxyz, r9.wxyz + and r8.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw + iadd r5.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r6.xyzw, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r6.xyzw + iadd r6.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw + iadd r7.xyzw, r8.xyzw, r9.xyzw + and r1.yw, r4.zzzw, l(0, 0xff00ff00, 0, 0xff00ff00) + bfi r1.yw, l(0, 8, 0, 8), l(0, 16, 0, 16), r4.zzzw, r1.yyyw + ubfe r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r4.zwzz + iadd r4.zw, r1.yyyw, r3.xxxy + break + case l(2) + case l(3) + case l(10) + case l(12) + and r8.xyzw, r2.yzwx, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.yzwx, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.yzwx + iadd r2.xyzw, r8.wxyz, r9.wxyz + and r8.xyzw, r5.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw + iadd r5.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r6.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r6.xyzw, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r6.xyzw + iadd r6.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r7.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw + iadd r7.xyzw, r8.xyzw, r9.xyzw + and r1.yw, r4.zzzw, l(0, 0xc00ffc00, 0, 0xc00ffc00) + bfi r1.yw, l(0, 10, 0, 10), l(0, 20, 0, 20), r4.zzzw, r1.yyyw + ubfe r3.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r4.zwzz + iadd r4.zw, r1.yyyw, r3.xxxy + break + default + break + endswitch +endif +if_nz r3.w + if_z r0.w + mov r2.y, r2.z + mov r5.z, r5.x + mov r1.y, r5.w + else + mov r1.y, r5.z + mov r5.z, r2.x + endif + if_z vThreadID.y + mov r2.yzw, r5.zzxy + mov r6.yzw, r7.xxyz + endif + mov r2.x, r5.z + mov r5.z, r1.y +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +and r1.yz, CB0[0][0].zzzz, l(0, 7, 8, 0) +if_nz r1.z + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r1.w, CB0[0][0].w, l(10) + ishl r1.w, r1.w, l(5) + ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r4.x, r1.z, l(2) + ushr r1.w, r1.w, l(4) + and r1.w, r1.w, l(0x00007ffe) + imad r1.w, r4.x, r1.w, r3.x + ushr r3.x, r1.x, l(5) + imad r1.w, r1.w, r3.x, r3.y + ishl r3.x, r0.z, l(10) + and r3.x, r3.x, l(6144) + bfi r3.x, l(3), l(8), r0.w, r3.x + ishr r3.x, r3.x, l(6) + iadd r3.y, r3.z, r4.x + bfi r3.z, l(1), l(1), r3.y, l(0) + iadd r3.z, r3.z, r3.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r3.y, l(1), l(0), r3.y, r3.z + and r3.z, r3.x, l(112) + bfi r4.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r1.wwww, l(0, 0, 0, 0) + imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r4.xxxy + bfi r3.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r3.xxxx, r3.zzwz + bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 8, 11), r1.zzzz, r3.xxxz + ubfe r3.x, l(3), l(6), r1.z + and r3.z, r3.y, l(6) + bfi r3.y, l(1), l(8), r3.y, l(0) + imad r3.x, r3.x, l(32), r3.y + imad r3.x, r3.z, l(4), r3.x + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r1.zzzw + bfi r1.w, l(9), l(3), r3.x, r1.w + bfi r1.z, l(6), l(0), r1.z, r1.w +else + ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r3.y, r0.x, r3.x + ishl r1.xw, r0.zzzz, l(4, 0, 0, 7) + and r1.xw, r1.xxxw, l(224, 0, 0, 2048) + bfi r0.y, l(3), l(2), r0.w, r1.x + ishl r1.x, r1.x, l(1) + bfi r0.w, l(3), l(3), r0.w, r1.x + and r0.w, r0.w, l(480) + bfi r1.x, l(23), l(9), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r3.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r1.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r3.z, l(2) + iadd r0.y, r3.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.z, l(6), l(0), r1.x, r0.x +endif +imul null, r0.x, r1.z, l(9) +ushr r0.x, r0.x, l(3) +ieq r0.yzw, r1.yyyy, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.yzwx, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.yzwx, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.wxyz, r3.wxyz +endif +if_nz r0.z + ushr r1.xyzw, r2.yzwx, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.wxyz +endif +if_nz r0.y + ishl r1.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw +endif +if_nz r0.y + ishl r1.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r1.xyzw +endif +if_nz r0.y + ishl r1.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r1.xyzw +endif +if_nz r0.y + ishl r0.yw, r4.zzzw, l(0, 8, 0, 8) + and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r1.xy, r4.zwzz, l(8, 8, 0, 0) + and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.zw, r0.yyyw, r1.xxxy +endif +if_nz r0.z + ushr r0.yz, r4.zzwz, l(0, 16, 16, 0) + bfi r4.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r4.zzzw, r0.yyyz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.yzyy +iadd r1.xyzw, r0.xxxx, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r1.xxxx, r2.wxww +store_uav_typed U0[0].xyzw, r1.yyyy, r5.xyxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.zwzz +store_uav_typed U0[0].xyzw, r1.wwww, r6.xyxx +iadd r1.xyzw, r0.xxxx, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r1.xxxx, r6.zwzz +store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyxx +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zwzz +store_uav_typed U0[0].xyzw, r1.wwww, r4.zwzz +ret +// Approximately 284 instruction slots used +#endif + +const BYTE resolve_fast_32bpp_3xres_4xmsaa_cs[] = +{ + 68, 88, 66, 67, 56, 110, + 223, 60, 95, 235, 224, 131, + 100, 72, 149, 194, 53, 218, + 234, 102, 1, 0, 0, 0, + 216, 39, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 60, 39, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 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105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 128, 36, 0, 0, 81, 0, + 5, 0, 32, 9, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 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0, 0, + 0, 0, 20, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_4xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_4xmsaa_cs.h new file mode 100644 index 000000000..bcb270bb0 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_32bpp_4xmsaa_cs.h @@ -0,0 +1,1328 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 7 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r1.w, l(12), l(13), CB0[0][0].x +and r3.xyzw, CB0[0][0].xxzz, l(1023, 4096, 0x01000000, 7) +uge r2.z, l(3), r1.y +if_nz r2.z + mov r4.y, r1.y +else + ieq r2.z, r1.y, l(5) + if_nz r2.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) +ushr r4.x, r4.y, l(1) +bfi r2.xy, l(4, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx +udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) +imad r3.x, r2.w, r3.x, r2.z +iadd r1.w, r1.w, r3.x +imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx +if_nz r3.y + uge r2.z, r2.x, l(40) + movc r2.z, r2.z, l(-40), l(40) + iadd r2.x, r2.z, r2.x +endif +imad r2.x, r2.y, l(80), r2.x +imad r1.w, r1.w, l(1280), r2.x +ushr r1.w, r1.w, l(2) +ine r2.xy, r1.yyyy, l(2, 3, 0, 0) +and r1.y, r2.y, r2.x +if_nz r1.y + ld r2.xy, r1.wwww, T0[0].xzyw + iadd r1.y, r1.w, l(1) + ld r2.zw, r1.yyyy, T0[0].ywxz + iadd r3.xy, r1.wwww, l(2, 3, 0, 0) + ld r4.xy, r3.xxxx, T0[0].xzyw + ld r4.zw, r3.yyyy, T0[0].ywxz +else + ld r2.xy, r1.wwww, T0[0].ywxz + iadd r1.y, r1.w, l(1) + ld r2.zw, r1.yyyy, T0[0].xzyw + iadd r1.yw, r1.wwww, l(0, 2, 0, 3) + ld r4.xy, r1.yyyy, T0[0].ywxz + ld r4.zw, r1.wwww, T0[0].xzyw +endif +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + switch r1.y + case l(0) + case l(1) + and r5.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r5.xyzw + ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw + iadd r2.xyzw, r5.xyzw, r6.xyzw + and r5.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r5.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r5.xyzw + ubfe r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw + iadd r4.xyzw, r5.xyzw, r6.xyzw + break + case l(2) + case l(3) + case l(10) + case l(12) + and r5.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r5.xyzw + ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw + iadd r2.xyzw, r5.xyzw, r6.xyzw + and r5.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r5.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r5.xyzw + ubfe r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw + iadd r4.xyzw, r5.xyzw, r6.xyzw + break + default + break + endswitch +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +and r1.y, CB0[0][0].z, l(8) +if_nz r1.y + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r5.x + ushr r3.x, r1.x, l(5) + imad r1.z, r1.z, r3.x, r5.y + ishl r3.x, r0.z, l(10) + ishr r3.x, r3.x, l(6) + and r3.x, r3.x, l(96) + iadd r1.w, r1.w, r5.z + bfi r3.y, l(1), l(1), r1.w, l(0) + iadd r3.y, r3.y, r5.w + bfi r3.y, l(2), l(1), r3.y, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.y + bfi r3.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r1.zzzz, l(0, 0, 0, 0) + imad r3.xy, r3.xxxx, l(2, 16, 0, 0), r3.yzyy + bfi r1.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r1.yyyy, r3.xxyx + bfi r3.x, l(1), l(4), r0.z, l(0) + ubfe r3.y, l(3), l(6), r1.y + and r3.z, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.y, l(32), r1.w + imad r1.w, r3.z, l(4), r1.w + bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.xxxx, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r0.yw, r0.zzzz, l(0, 5, 0, 7) + and r0.yw, r0.yyyw, l(0, 448, 0, 2048) + bfi r1.x, l(23), l(9), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r1.x, r1.x, r0.z + ishl r1.zw, r0.yyyy, l(0, 0, 3, 2) + bfi r0.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r0.xxxx, r1.zwzz + imad r0.xy, r0.zzzz, l(8, 4, 0, 0), r0.xyxx + bfi r0.x, l(12), l(0), r0.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r5.z, l(2) + iadd r0.y, r5.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.y, l(6), l(0), r1.x, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ieq r0.yzw, r3.wwww, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.x, r0.x, l(2) +if_nz r0.y + ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ret +// Approximately 174 instruction slots used +#endif + +const BYTE resolve_fast_32bpp_4xmsaa_cs[] = +{ + 68, 88, 66, 67, 157, 47, + 205, 189, 191, 234, 36, 109, + 43, 57, 16, 89, 240, 4, + 171, 220, 1, 0, 0, 0, + 196, 25, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 40, 25, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 98, 97, 115, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 48, 22, 0, 0, 81, 0, + 5, 0, 140, 5, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 7, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 9, 146, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 2, 0, 2, 64, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 85, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 140, 0, 0, 11, 18, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 11, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 18, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 21, 0, + 0, 1, 85, 0, 0, 12, + 50, 0, 16, 0, 1, 0, + 0, 0, 86, 133, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 7, + 66, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 20, 50, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 38, 10, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 4, + 98, 0, 16, 0, 0, 0, + 0, 0, 86, 5, 2, 0, + 30, 0, 0, 7, 50, 0, + 16, 0, 2, 0, 0, 0, + 182, 15, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 138, 0, + 0, 11, 130, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 12, 0, 0, 0, + 1, 64, 0, 0, 13, 0, + 0, 0, 10, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 3, 0, 0, 0, + 6, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 255, 3, 0, 0, + 0, 16, 0, 0, 0, 0, + 0, 1, 7, 0, 0, 0, + 80, 0, 0, 7, 66, 0, + 16, 0, 2, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 2, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 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16, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 21, 0, + 0, 1, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 174, 0, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 48, 0, 0, 0, 35, 0, + 0, 0, 9, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 5, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_1x2xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_1x2xmsaa_cs.h new file mode 100644 index 000000000..f95def9db --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_1x2xmsaa_cs.h @@ -0,0 +1,1196 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 6 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) +ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r4.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.yw, r2.wwww, l(0, 2, 0, 1) +and r1.yw, r1.yyyw, l(0, 1, 0, 1) +ishl r1.yw, r2.xxxy, r1.yyyw +ushr r4.x, r4.y, l(1) +and r2.xy, r4.xyxx, l(1, 1, 0, 0) +iadd r1.yw, r1.yyyw, r2.xxxy +udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) +ishl r2.w, r2.x, l(1) +imad r2.w, r2.y, r3.y, r2.w +iadd r2.z, r2.w, r2.z +imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw +imad r1.y, r1.w, l(80), r1.y +ishl r1.y, r1.y, l(1) +imad r1.y, r2.z, l(1280), r1.y +ushr r1.y, r1.y, l(2) +ld r2.xyzw, r1.yyyy, T0[0].xyzw +iadd r1.y, r1.y, l(1) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + ieq r1.yw, r1.yyyy, l(0, 5, 0, 7) + or r1.y, r1.w, r1.y + if_nz r1.y + bfi r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r2.yxwz, r2.xyzw + bfi r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.yxwz, r4.xyzw + endif +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r5.x + ushr r3.y, r1.x, l(5) + imad r1.z, r1.z, r3.y, r5.y + ishl r3.y, r0.z, l(11) + and r3.y, r3.y, l(0x00003000) + bfi r3.y, l(3), l(9), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r1.w, r1.w, r5.z + bfi r3.z, l(1), l(1), r1.w, l(0) + iadd r3.z, r3.z, r5.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.z + bfi r3.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r1.zzzz, l(0, 0, 0, 0) + imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz + bfi r1.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r1.yyyy, r3.yyzy + bfi r3.y, l(1), l(4), r0.z, l(0) + ubfe r3.z, l(3), l(6), r1.y + and r3.w, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.z, l(32), r1.w + imad r1.w, r3.w, l(4), r1.w + bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r1.xz, r0.zzzz, l(6, 0, 7, 0) + and r1.xz, r1.xxzx, l(896, 0, 2048, 0) + bfi r0.y, l(3), l(4), r0.w, r1.x + bfi r0.y, l(22), l(10), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r0.y, r0.y, r0.z + ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) + bfi r1.xw, l(3, 0, 0, 3), l(7, 0, 0, 6), r0.wwww, r1.xxxw + bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r1.xxxw + imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.z, r0.z, l(1792) + iadd r0.x, r0.x, r0.z + and r0.z, r5.z, l(2) + iadd r0.z, r5.w, r0.z + bfi r0.z, l(2), l(6), r0.z, l(0) + iadd r0.x, r0.x, r0.z + bfi r1.y, l(6), l(0), r0.y, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ieq r0.y, r3.x, l(4) +if_nz r0.y + mov r2.xyzw, r2.yxwz + mov r0.z, l(2) +else + mov r0.z, r3.x +endif +ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) +or r0.zw, r1.yyyz, r1.xxxy +if_nz r0.z + ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xyzw, r5.xyzw +endif +if_nz r0.w + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.x, r0.x, l(2) +if_nz r0.y + mov r4.xyzw, r4.yxwz + mov r3.x, l(2) +endif +ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ret +// Approximately 153 instruction slots used +#endif + +const BYTE resolve_fast_64bpp_1x2xmsaa_cs[] = +{ + 68, 88, 66, 67, 78, 70, + 8, 119, 17, 170, 63, 177, + 54, 46, 223, 196, 239, 196, + 246, 206, 1, 0, 0, 0, + 44, 23, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 144, 22, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 98, 97, 115, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 152, 19, 0, 0, 81, 0, + 5, 0, 230, 4, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 6, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 9, 146, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 2, 0, 2, 64, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 85, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 140, 0, 0, 11, 18, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 11, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 18, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 21, 0, + 0, 1, 85, 0, 0, 12, + 50, 0, 16, 0, 1, 0, + 0, 0, 86, 133, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 7, + 66, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 20, 50, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 38, 10, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 4, + 98, 0, 16, 0, 0, 0, + 0, 0, 86, 5, 2, 0, + 30, 0, 0, 7, 50, 0, + 16, 0, 2, 0, 0, 0, + 182, 15, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 1, 0, + 0, 12, 242, 0, 16, 0, + 3, 0, 0, 0, 38, 138, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 7, 0, 0, 0, 255, 3, + 0, 0, 0, 0, 0, 1, + 8, 0, 0, 0, 138, 0, + 0, 17, 194, 0, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 12, 0, + 0, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 13, 0, 0, 0, 10, 0, + 0, 0, 6, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 80, 0, 0, 7, 130, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 31, 0, + 4, 3, 58, 0, 16, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 18, 0, 0, 1, 32, 0, + 0, 7, 130, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 5, 0, + 0, 0, 31, 0, 4, 3, + 58, 0, 16, 0, 1, 0, + 0, 0, 54, 0, 0, 5, + 34, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 2, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 34, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 21, 0, + 0, 1, 21, 0, 0, 1, + 80, 0, 0, 10, 162, 0, + 16, 0, 1, 0, 0, 0, + 246, 15, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 10, 162, 0, 16, 0, + 1, 0, 0, 0, 86, 13, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 41, 0, 0, 7, + 162, 0, 16, 0, 1, 0, + 0, 0, 6, 4, 16, 0, + 2, 0, 0, 0, 86, 13, + 16, 0, 1, 0, 0, 0, + 85, 0, 0, 7, 18, 0, + 16, 0, 4, 0, 0, 0, + 26, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 10, 50, 0, 16, 0, + 2, 0, 0, 0, 70, 0, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 162, 0, 16, 0, 1, 0, + 0, 0, 86, 13, 16, 0, + 1, 0, 0, 0, 6, 4, + 16, 0, 2, 0, 0, 0, + 78, 0, 0, 11, 50, 0, + 16, 0, 2, 0, 0, 0, + 0, 208, 0, 0, 214, 5, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 41, 0, 0, 7, + 130, 0, 16, 0, 2, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 35, 0, 0, 9, 130, 0, + 16, 0, 2, 0, 0, 0, + 26, 0, 16, 0, 2, 0, + 0, 0, 26, 0, 16, 0, + 3, 0, 0, 0, 58, 0, + 16, 0, 2, 0, 0, 0, + 30, 0, 0, 7, 66, 0, + 16, 0, 2, 0, 0, 0, + 58, 0, 16, 0, 2, 0, + 0, 0, 42, 0, 16, 0, + 2, 0, 0, 0, 35, 0, + 0, 13, 162, 0, 16, 0, + 1, 0, 0, 0, 6, 4, + 16, 128, 65, 0, 0, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 80, 0, 0, 0, 0, 0, + 0, 0, 16, 0, 0, 0, + 86, 13, 16, 0, 1, 0, + 0, 0, 35, 0, 0, 9, + 34, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 80, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 41, 0, 0, 7, + 34, 0, 16, 0, 1, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 35, 0, 0, 9, 34, 0, + 16, 0, 1, 0, 0, 0, + 42, 0, 16, 0, 2, 0, + 0, 0, 1, 64, 0, 0, + 0, 5, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 85, 0, 0, 7, 34, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 2, 0, 0, 0, 45, 0, + 0, 8, 242, 0, 16, 0, + 2, 0, 0, 0, 86, 5, + 16, 0, 1, 0, 0, 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0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 153, 0, 0, 0, 6, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 45, 0, 0, 0, + 33, 0, 0, 0, 6, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 10, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_2xres_cs.h new file mode 100644 index 000000000..98e495127 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_2xres_cs.h @@ -0,0 +1,1232 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 6 +dcl_thread_group 8, 8, 1 +ushr r0.x, CB0[0][0].y, l(7) +bfi r0.x, l(11), l(3), r0.x, l(0) +uge r0.x, vThreadID.x, r0.x +if_nz r0.x + ret +endif +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000) +ubfe r1.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r3.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r3.y, l(2) + else + mov r3.y, l(0) + endif +endif +uge r0.yw, r1.wwww, l(0, 2, 0, 1) +and r0.yw, r0.yyyw, l(0, 1, 0, 1) +ishl r0.yw, r1.xxxy, r0.yyyw +ushr r3.x, r3.y, l(1) +and r1.xy, r3.xyxx, l(1, 1, 0, 0) +iadd r0.yw, r0.yyyw, r1.xxxy +udiv r1.xy, null, r0.ywyy, l(80, 16, 0, 0) +ishl r1.w, r1.x, l(1) +imad r1.w, r1.y, r2.y, r1.w +iadd r1.z, r1.w, r1.z +imad r0.yw, -r1.xxxy, l(0, 80, 0, 16), r0.yyyw +imad r0.y, r0.w, l(80), r0.y +ishl r0.y, r0.y, l(1) +imad r0.y, r1.z, l(1280), r0.y +ld r1.xyzw, r0.yyyy, T0[0].xyzw +iadd r0.y, r0.y, l(1) +ld r3.xyzw, r0.yyyy, T0[0].xyzw +if_nz r2.z + ubfe r0.y, l(4), l(25), CB0[0][0].x + ieq r0.yw, r0.yyyy, l(0, 5, 0, 7) + or r0.y, r0.w, r0.y + if_nz r0.y + bfi r1.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r1.yxwz, r1.xyzw + bfi r3.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r3.yxwz, r3.xyzw + endif +endif +if_nz r2.w + if_z vThreadID.x + mov r1.xy, r1.zwzz + mov r3.xy, r3.zwzz + endif + if_z vThreadID.y + mov r1.xyzw, r3.xyzw + endif +endif +bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, vThreadID.xyyx +bfi r2.y, l(10), l(5), CB0[0][0].w, l(0) +and r2.z, CB0[0][0].z, l(8) +if_nz r2.z + ubfe r2.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r5.x, r2.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r5.x, r2.w, r4.x + ushr r4.x, r2.y, l(5) + imad r2.w, r2.w, r4.x, r4.y + ishl r4.x, r0.z, l(11) + and r4.x, r4.x, l(0x00003000) + bfi r4.x, l(3), l(9), r0.w, r4.x + ishr r4.x, r4.x, l(6) + iadd r4.y, r4.z, r5.x + bfi r4.z, l(1), l(1), r4.y, l(0) + iadd r4.z, r4.z, r4.w + bfi r4.z, l(2), l(1), r4.z, l(0) + bfi r4.y, l(1), l(0), r4.y, r4.z + and r4.z, r4.x, l(240) + bfi r5.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy + bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz + bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r2.zzzz, r4.xxxz + ubfe r4.x, l(3), l(6), r2.z + and r4.z, r4.y, l(6) + bfi r4.y, l(1), l(8), r4.y, l(0) + imad r4.x, r4.x, l(32), r4.y + imad r4.x, r4.z, l(4), r4.x + bfi r2.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r2.zzzw + bfi r2.w, l(9), l(3), r4.x, r2.w + bfi r2.z, l(6), l(0), r2.z, r2.w +else + ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r2.y, l(5) + imad r0.x, r4.y, r0.x, r4.x + ishl r2.yw, r0.zzzz, l(0, 5, 0, 7) + and r2.yw, r2.yyyw, l(0, 448, 0, 2048) + bfi r0.y, l(3), l(3), r0.w, r2.y + ishl r2.y, r2.y, l(1) + bfi r0.w, l(3), l(4), r0.w, r2.y + and r0.w, r0.w, l(992) + bfi r2.y, l(22), l(10), r0.x, r0.w + bfi r2.y, l(4), l(0), r0.y, r2.y + bfi r2.y, l(1), l(4), r0.z, r2.y + ishl r4.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r4.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r2.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r4.z, l(2) + iadd r0.y, r4.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r2.z, l(6), l(0), r2.y, r0.x +endif +ushr r0.x, r2.z, l(2) +ieq r0.y, r2.x, l(4) +if_nz r0.y + mov r1.xyzw, r1.yxwz + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) +or r0.zw, r2.zzzw, r2.yyyz +if_nz r0.z + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r0.w + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.z, r0.x, l(1) +if_nz r0.y + mov r3.zw, r3.wwwz + mov r3.xyzw, r3.yxzw + mov r2.x, l(2) +endif +ieq r1.xyz, r2.xxxx, l(1, 2, 3, 0) +or r0.yw, r1.yyyz, r1.xxxy +if_nz r0.y + ishl r1.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.w + ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r3.xyzw +ret +// Approximately 164 instruction slots used +#endif + +const BYTE resolve_fast_64bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 154, 242, + 185, 194, 35, 80, 132, 194, + 249, 160, 143, 188, 170, 215, + 160, 60, 1, 0, 0, 0, + 200, 23, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 44, 23, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 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b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_3xres_cs.h @@ -0,0 +1,2366 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 6 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].zxxz, l(7, 1023, 0x40000000, 8) +ubfe r1.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r3.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r3.y, l(2) + else + mov r3.y, l(0) + endif +endif +uge r0.yw, r1.wwww, l(0, 2, 0, 1) +and r0.yw, r0.yyyw, l(0, 1, 0, 1) +ishl r0.yw, r1.xxxy, r0.yyyw +ushr r3.x, r3.y, l(1) +and r1.xy, r3.xyxx, l(1, 1, 0, 0) +iadd r0.yw, r0.yyyw, r1.xxxy +udiv r1.xy, null, r0.ywyy, l(80, 16, 0, 0) +ishl r1.w, r1.x, l(1) +imad r1.w, r1.y, r2.y, r1.w +iadd r1.z, r1.w, r1.z +imad r0.yw, -r1.xxxy, l(0, 80, 0, 16), r0.yyyw +imad r0.y, r0.w, l(80), r0.y +ishl r0.y, r0.y, l(1) +imad r0.y, r1.z, l(1280), r0.y +imul null, r0.y, r0.y, l(9) +movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) +movc r1.xy, r2.zzzz, r1.xyxx, l(0,0,0,0) +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, vThreadID.xyyx +bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r2.w + ubfe r0.z, l(3), l(4), CB0[0][0].z + ushr r0.w, CB0[0][0].w, l(10) + ishl r0.w, r0.w, l(5) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.z, r0.z, l(2) + ushr r0.w, r0.w, l(4) + and r0.w, r0.w, l(0x00007ffe) + imad r0.w, r1.z, r0.w, r4.x + ushr r1.w, r0.x, l(5) + imad r0.w, r0.w, r1.w, r4.y + ishl r1.w, r3.z, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r3.w, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.z, r1.z, r4.z + bfi r2.y, l(1), l(1), r1.z, l(0) + iadd r2.y, r2.y, r4.w + bfi r2.y, l(2), l(1), r2.y, l(0) + bfi r1.z, l(1), l(0), r1.z, r2.y + and r2.y, r1.w, l(240) + bfi r2.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r0.wwww, l(0, 0, 0, 0) + imad r2.yz, r2.yyyy, l(0, 2, 16, 0), r2.zzwz + bfi r2.yz, l(0, 4, 4, 0), l(0, 0, 3, 0), r1.wwww, r2.yyzy + bfi r0.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r0.zzzz, r2.yyyz + ubfe r1.w, l(3), l(6), r0.z + and r2.y, r1.z, l(6) + bfi r1.z, l(1), l(8), r1.z, l(0) + imad r1.z, r1.w, l(32), r1.z + imad r1.z, r2.y, l(4), r1.z + bfi r0.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r3.zzzz, r0.zzzw + bfi r0.w, l(9), l(3), r1.z, r0.w + bfi r0.z, l(6), l(0), r0.z, r0.w +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + ushr r0.x, r0.x, l(5) + imad r0.x, r4.y, r0.x, r4.x + ishl r1.zw, r3.zzzz, l(0, 0, 5, 7) + and r1.zw, r1.zzzw, l(0, 0, 448, 2048) + bfi r0.w, l(3), l(3), r3.w, r1.z + ishl r1.z, r1.z, l(1) + bfi r1.z, l(3), l(4), r3.w, r1.z + and r1.z, r1.z, l(992) + bfi r2.y, l(22), l(10), r0.x, r1.z + bfi r2.y, l(4), l(0), r0.w, r2.y + bfi r2.y, l(1), l(4), r3.z, r2.y + ishl r2.zw, r1.zzzz, l(0, 0, 3, 2) + bfi r2.zw, l(0, 0, 22, 22), l(0, 0, 13, 12), r0.xxxx, r2.zzzw + bfi r0.xw, l(4, 0, 0, 4), l(3, 0, 0, 2), r0.wwww, r2.zzzw + bfi r0.xw, l(1, 0, 0, 1), l(7, 0, 0, 6), r3.zzzz, r0.xxxw + bfi r0.x, l(12), l(0), r1.w, r0.x + and r0.w, r0.w, l(1792) + iadd r0.x, r0.x, r0.w + and r0.w, r4.z, l(2) + iadd r0.w, r4.w, r0.w + bfi r0.w, l(2), l(6), r0.w, l(0) + iadd r0.x, r0.x, r0.w + bfi r0.z, l(6), l(0), r2.y, r0.x +endif +imul null, r0.x, r0.z, l(9) +ushr r0.xy, r0.xyxx, l(3, 1, 0, 0) +imad r0.z, r1.y, l(3), r0.y +iadd r0.w, r1.x, r0.z +ld r1.yz, r0.wwww, T0[0].zxyw +and r0.w, CB0[0][0].z, l(0x01000000) +if_nz r0.w + ubfe r1.w, l(4), l(25), CB0[0][0].x + ieq r2.yz, r1.wwww, l(0, 5, 7, 0) + or r1.w, r2.z, r2.y + if_nz r1.w + bfi r1.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r1.zzyz, r1.yyzy + endif +endif +ieq r1.w, r2.x, l(4) +if_nz r1.w + mov r1.yz, r1.zzyz + mov r2.y, l(2) +else + mov r2.y, r2.x +endif +ieq r2.yzw, r2.yyyy, l(0, 1, 2, 3) +or r2.yz, r2.zzwz, r2.yyzy +if_nz r2.y + ishl r2.yw, r1.yyyz, l(0, 8, 0, 8) + and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.yywy, r3.xxyx +endif +if_nz r2.z + ushr r2.yz, r1.yyzy, l(0, 16, 16, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.yyzy +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +iadd r1.yz, r0.zzzz, l(0, 1, 2, 0) +ld r2.yz, r1.yyyy, T0[0].zxyw +if_nz r0.w + ubfe r0.z, l(4), l(25), CB0[0][0].x + ieq r4.xy, r0.zzzz, l(5, 7, 0, 0) + or r0.z, r4.y, r4.x + if_nz r0.z + bfi r2.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r2.zzyz, r2.yyzy + endif +endif +if_nz r1.w + mov r2.yz, r2.zzyz + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r4.xyz, r0.zzzz, l(1, 2, 3, 0) +or r4.xy, r4.yzyy, r4.xyxx +if_nz r4.x + ishl r4.xz, r2.yyzy, l(8, 0, 8, 0) + and r4.xz, r4.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r5.xy, r2.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.yz, r4.xxzx, r5.xxyx +endif +if_nz r4.y + ushr r4.xy, r2.yzyy, l(16, 16, 0, 0) + bfi r2.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r2.yyzy, r4.xxyx +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r2.yzyy +ld r1.yz, r1.zzzz, T0[0].zxyw +if_nz r0.w + ubfe r0.z, l(4), l(25), CB0[0][0].x + ieq r2.yz, r0.zzzz, l(0, 5, 7, 0) + or r0.z, r2.z, r2.y + if_nz r0.z + bfi r1.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r1.zzyz, r1.yyzy + endif +endif +if_nz r1.w + mov r1.yz, r1.zzyz + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) +or r2.yz, r2.zzwz, r2.yyzy +if_nz r2.y + ishl r2.yw, r1.yyyz, l(0, 8, 0, 8) + and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.yywy, r4.xxyx +endif +if_nz r2.z + ushr r2.yz, r1.yyzy, l(0, 16, 16, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.yyzy +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r1.yzyy +iadd r0.z, r1.x, r0.y +iadd r1.xy, r0.zzzz, l(3, 6, 0, 0) +ld r1.xz, r1.xxxx, T0[0].xzyw +if_nz r0.w + ubfe r0.z, l(4), l(25), CB0[0][0].x + ieq r2.yz, r0.zzzz, l(0, 5, 7, 0) + or r0.z, r2.z, r2.y + if_nz r0.z + bfi r1.xz, l(16, 0, 16, 0), l(0, 0, 0, 0), r1.zzxz, r1.xxzx + endif +endif +if_nz r1.w + mov r1.xz, r1.zzxz + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) +or r2.yz, r2.zzwz, r2.yyzy +if_nz r2.y + ishl r2.yw, r1.xxxz, l(0, 8, 0, 8) + and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r3.xy, r1.xzxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.xz, r2.yywy, r3.xxyx +endif +if_nz r2.z + ushr r2.yz, r1.xxzx, l(0, 16, 16, 0) + bfi r1.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r1.xxzx, r2.yyzy +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r1.xzxx +iadd r4.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r0.yz, r4.xxxx, T0[0].zxyw +if_nz r0.w + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xz, r1.xxxx, l(5, 0, 7, 0) + or r1.x, r1.z, r1.x + if_nz r1.x + bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy + endif +endif +if_nz r1.w + mov r0.yz, r0.zzyz + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r2.yzw, r1.xxxx, l(0, 1, 2, 3) +or r1.xz, r2.zzwz, r2.yyzy +if_nz r1.x + ishl r2.yz, r0.yyzy, l(0, 8, 8, 0) + and r2.yz, r2.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r3.xy, r0.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yz, r2.yyzy, r3.xxyx +endif +if_nz r1.z + ushr r1.xz, r0.yyzy, l(16, 0, 16, 0) + bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxzx +endif +store_uav_typed U0[0].xyzw, r3.wwww, r0.yzyy +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r0.yz, r4.yyyy, T0[0].zxyw +if_nz r0.w + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xz, r1.xxxx, l(5, 0, 7, 0) + or r1.x, r1.z, r1.x + if_nz r1.x + bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy + endif +endif +if_nz r1.w + mov r0.yz, r0.zzyz + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r2.yzw, r1.xxxx, l(0, 1, 2, 3) +or r1.xz, r2.zzwz, r2.yyzy +if_nz r1.x + ishl r2.yz, r0.yyzy, l(0, 8, 8, 0) + and r2.yz, r2.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r4.xy, r0.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yz, r2.yyzy, r4.xxyx +endif +if_nz r1.z + ushr r1.xz, r0.yyzy, l(16, 0, 16, 0) + bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxzx +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r0.yzyy +ld r0.yz, r1.yyyy, T0[0].zxyw +if_nz r0.w + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xy, r1.xxxx, l(5, 7, 0, 0) + or r1.x, r1.y, r1.x + if_nz r1.x + bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy + endif +endif +if_nz r1.w + mov r0.yz, r0.zzyz + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r1.xz, r0.yyzy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r2.yz, r0.yyzy, l(0, 8, 8, 0) + and r2.yz, r2.yyzy, l(0, 0x00ff00ff, 0x00ff00ff, 0) + iadd r0.yz, r1.xxzx, r2.yyzy +endif +if_nz r1.y + ushr r1.xy, r0.yzyy, l(16, 16, 0, 0) + bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxyx +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r0.yzyy +ld r0.yz, r4.zzzz, T0[0].zxyw +if_nz r0.w + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xy, r1.xxxx, l(5, 7, 0, 0) + or r1.x, r1.y, r1.x + if_nz r1.x + bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy + endif +endif +if_nz r1.w + mov r0.yz, r0.zzyz + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r1.xz, r0.yyzy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r2.yz, r0.yyzy, l(0, 8, 8, 0) + and r2.yz, r2.yyzy, l(0, 0x00ff00ff, 0x00ff00ff, 0) + iadd r0.yz, r1.xxzx, r2.yyzy +endif +if_nz r1.y + ushr r1.xy, r0.yzyy, l(16, 16, 0, 0) + bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxyx +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r0.yzyy +ld r0.yz, r4.wwww, T0[0].zxyw +if_nz r0.w + ubfe r0.w, l(4), l(25), CB0[0][0].x + ieq r1.xy, r0.wwww, l(5, 7, 0, 0) + or r0.w, r1.y, r1.x + if_nz r0.w + bfi r0.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r0.zzyz, r0.yyzy + endif +endif +if_nz r1.w + mov r0.yz, r0.zzyz + mov r2.x, l(2) +endif +ieq r1.xyz, r2.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r1.xz, r0.yyzy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r2.xy, r0.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yz, r1.xxzx, r2.xxyx +endif +if_nz r1.y + ushr r1.xy, r0.yzyy, l(16, 16, 0, 0) + bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.xxyx +endif +store_uav_typed U0[0].xyzw, r3.wwww, r0.yzyy +ret +// Approximately 368 instruction slots used +#endif + +const BYTE resolve_fast_64bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 219, 151, + 199, 75, 219, 176, 140, 247, + 185, 45, 7, 186, 53, 222, + 73, 242, 1, 0, 0, 0, + 148, 45, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 248, 44, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 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0, 0, 10, 50, 0, + 16, 0, 1, 0, 0, 0, + 150, 5, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 17, 98, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 86, 6, 16, 0, + 0, 0, 0, 0, 6, 1, + 16, 0, 1, 0, 0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 3, 0, 0, 0, 150, 5, + 16, 0, 0, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 112, 1, 0, 0, 6, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 79, 0, 0, 0, + 76, 0, 0, 0, 12, 0, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 30, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_4xmsaa_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_4xmsaa_cs.h new file mode 100644 index 000000000..d3b5a85bd --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_fast_64bpp_4xmsaa_cs.h @@ -0,0 +1,1201 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 6 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r1.w, l(12), l(13), CB0[0][0].x +and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) +uge r2.z, l(3), r1.y +if_nz r2.z + mov r4.y, r1.y +else + ieq r2.z, r1.y, l(5) + if_nz r2.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) +ushr r4.x, r4.y, l(1) +bfi r2.xy, l(3, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx +udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) +ishl r1.y, r2.z, l(1) +imad r1.y, r2.w, r3.y, r1.y +iadd r1.y, r1.y, r1.w +imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx +imad r1.w, r2.y, l(80), r2.x +ishl r1.w, r1.w, l(1) +imad r1.y, r1.y, l(1280), r1.w +ushr r1.y, r1.y, l(1) +ld r2.xy, r1.yyyy, T0[0].xywz +iadd r4.xyz, r1.yyyy, l(2, 4, 6, 0) +ld r2.zw, r4.xxxx, T0[0].zwyx +ld r5.xy, r4.yyyy, T0[0].xywz +ld r5.zw, r4.zzzz, T0[0].zwyx +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + ieq r1.yw, r1.yyyy, l(0, 5, 0, 7) + or r1.y, r1.w, r1.y + if_nz r1.y + mov r2.xyzw, r2.yxzw + bfi r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r2.xywz, r2.yxzw + mov r5.xyzw, r5.yxzw + bfi r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xywz, r5.yxzw + endif +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r4.x + ushr r3.y, r1.x, l(5) + imad r1.z, r1.z, r3.y, r4.y + ishl r3.y, r0.z, l(11) + and r3.y, r3.y, l(0x00003000) + bfi r3.y, l(3), l(9), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r1.w, r1.w, r4.z + bfi r3.z, l(1), l(1), r1.w, l(0) + iadd r3.z, r3.z, r4.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.z + bfi r3.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r1.zzzz, l(0, 0, 0, 0) + imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz + bfi r1.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r1.yyyy, r3.yyzy + bfi r3.y, l(1), l(4), r0.z, l(0) + ubfe r3.z, l(3), l(6), r1.y + and r3.w, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.z, l(32), r1.w + imad r1.w, r3.w, l(4), r1.w + bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r4.y, r0.x, r4.x + ishl r1.xz, r0.zzzz, l(6, 0, 7, 0) + and r1.xz, r1.xxzx, l(896, 0, 2048, 0) + bfi r0.y, l(3), l(4), r0.w, r1.x + bfi r0.y, l(22), l(10), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r0.y, r0.y, r0.z + ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) + bfi r1.xw, l(3, 0, 0, 3), l(7, 0, 0, 6), r0.wwww, r1.xxxw + bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r1.xxxw + imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.z, r0.z, l(1792) + iadd r0.x, r0.x, r0.z + and r0.z, r4.z, l(2) + iadd r0.z, r4.w, r0.z + bfi r0.z, l(2), l(6), r0.z, l(0) + iadd r0.x, r0.x, r0.z + bfi r1.y, l(6), l(0), r0.y, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ieq r0.y, r3.x, l(4) +if_nz r0.y + mov r2.xyzw, r2.yxwz + mov r0.z, l(2) +else + mov r0.z, r3.x +endif +ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) +or r0.zw, r1.yyyz, r1.xxxy +if_nz r0.z + ishl r1.xyzw, r2.xywz, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xywz, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xywz, r4.xywz +endif +if_nz r0.w + ushr r1.xyzw, r2.xywz, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xywz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xywz +iadd r0.x, r0.x, l(2) +if_nz r0.y + mov r5.xyzw, r5.yxwz + mov r3.x, l(2) +endif +ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r5.xywz, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r5.xywz, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r1.xywz, r2.xywz +endif +if_nz r0.z + ushr r1.xyzw, r5.xywz, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xywz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xywz +ret +// Approximately 154 instruction slots used +#endif + +const BYTE resolve_fast_64bpp_4xmsaa_cs[] = +{ + 68, 88, 66, 67, 90, 193, + 104, 48, 155, 121, 170, 169, + 208, 91, 126, 110, 180, 25, + 102, 205, 1, 0, 0, 0, + 68, 23, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 168, 22, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 98, 97, 115, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 176, 19, 0, 0, 81, 0, + 5, 0, 236, 4, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 6, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 41, 0, 0, 9, 146, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 2, 0, 2, 64, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 85, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 140, 0, 0, 11, 18, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 11, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 18, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 21, 0, + 0, 1, 85, 0, 0, 12, + 50, 0, 16, 0, 1, 0, + 0, 0, 86, 133, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 7, + 66, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 20, 50, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 38, 10, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 4, + 98, 0, 16, 0, 0, 0, + 0, 0, 86, 5, 2, 0, + 30, 0, 0, 7, 50, 0, + 16, 0, 2, 0, 0, 0, + 182, 15, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 138, 0, + 0, 11, 130, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 12, 0, 0, 0, + 1, 64, 0, 0, 13, 0, + 0, 0, 10, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 3, 0, 0, 0, + 38, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 7, 0, 0, 0, + 255, 3, 0, 0, 0, 0, + 0, 1, 8, 0, 0, 0, + 80, 0, 0, 7, 66, 0, + 16, 0, 2, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 2, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 18, 0, 0, 1, 32, 0, + 0, 7, 66, 0, 16, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 5, 0, + 0, 0, 31, 0, 4, 3, + 42, 0, 16, 0, 2, 0, + 0, 0, 54, 0, 0, 5, + 34, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 2, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 34, 0, 16, 0, 4, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 21, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 10, 50, 0, + 16, 0, 2, 0, 0, 0, + 70, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 85, 0, + 0, 7, 18, 0, 16, 0, + 4, 0, 0, 0, 26, 0, + 16, 0, 4, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 140, 0, 0, 17, + 50, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 70, 0, 16, 0, 4, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 78, 0, + 0, 11, 194, 0, 16, 0, + 2, 0, 0, 0, 0, 208, + 0, 0, 6, 4, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 1, 0, 0, 0, + 42, 0, 16, 0, 2, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 35, 0, + 0, 9, 34, 0, 16, 0, + 1, 0, 0, 0, 58, 0, + 16, 0, 2, 0, 0, 0, + 26, 0, 16, 0, 3, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 34, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 35, 0, 0, 13, + 50, 0, 16, 0, 2, 0, + 0, 0, 230, 10, 16, 128, + 65, 0, 0, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 80, 0, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 2, 0, 0, 0, + 35, 0, 0, 9, 130, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 16, 0, 2, 0, + 0, 0, 1, 64, 0, 0, + 80, 0, 0, 0, 10, 0, + 16, 0, 2, 0, 0, 0, + 41, 0, 0, 7, 130, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 35, 0, + 0, 9, 34, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 0, 5, + 0, 0, 58, 0, 16, 0, + 1, 0, 0, 0, 85, 0, + 0, 7, 34, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 45, 0, 0, 8, + 50, 0, 16, 0, 2, 0, + 0, 0, 86, 5, 16, 0, + 1, 0, 0, 0, 70, 123, + 32, 0, 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0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 5, 0, 0, 0, 70, 11, + 16, 0, 1, 0, 0, 0, + 70, 11, 16, 0, 2, 0, + 0, 0, 21, 0, 0, 1, + 31, 0, 4, 3, 42, 0, + 16, 0, 0, 0, 0, 0, + 85, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 11, 16, 0, 5, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 140, 0, + 0, 17, 242, 0, 16, 0, + 5, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 70, 14, 16, 0, + 5, 0, 0, 0, 70, 11, + 16, 0, 1, 0, 0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 70, 11, + 16, 0, 5, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 154, 0, 0, 0, 6, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 44, 0, 0, 0, + 30, 0, 0, 0, 6, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_2xres_cs.h new file mode 100644 index 000000000..b8883e4a2 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_2xres_cs.h @@ -0,0 +1,7174 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 21 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000) +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +movc r0.w, r3.z, l(1), l(0) +ishl r3.y, r1.z, r0.w +imad r2.y, r1.w, r2.y, r3.y +iadd r2.y, r2.y, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w +imad r0.w, r2.y, l(1280), r0.w +ld r1.xyzw, r0.wwww, T0[0].xzyw +if_nz r3.z + iadd r2.y, r0.w, l(1) + ld r4.xyzw, r2.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r1.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r1.xz, r8.zzwz + ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r4.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.xz, r1.xxzx + f16tof32 r5.yw, r8.xxxy + f16tof32 r6.xz, r1.yywy + f16tof32 r6.yw, r8.zzzw + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r7.xz, r4.xxzx + f16tof32 r7.yw, r8.xxxy + f16tof32 r1.zw, r4.wwwy + f16tof32 r1.xy, r8.zwzz + break + default + mov r5.xy, r1.xzxx + mov r5.zw, l(0,0,0,0) + mov r6.xy, r1.ywyy + mov r6.zw, l(0,0,0,0) + mov r7.xy, r4.xzxx + mov r7.zw, l(0,0,0,0) + mov r1.xw, r4.wwwy + mov r1.yz, l(0,0,0,0) + break + endswitch +else + switch r3.w + case l(0) + case l(1) + ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) + and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) + and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) + mov r8.x, r1.x + mov r8.yz, r4.xxyx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + utof r3.xy, r4.zwzz + ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) + mov r8.x, r1.z + mov r8.yz, r4.xxwx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r4.x, r1.y + and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r9.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r11.xyz, r9.xyzx + iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) + movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) + iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) + movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx + ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) + iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r9.xyzx, r4.xyzx + movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) + utof r8.xy, r4.xwxx + mov r4.x, r1.w + and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r10.xyzx, r4.xyzx + movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) + mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r5.w, r3.x + mov r6.w, r3.y + mov r7.w, r4.x + mov r1.y, r4.y + break + case l(4) + ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r8.xz, r4.xxyx + mov r8.yw, r1.xxxz + ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r1.xz, r4.zzwz + ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.x, r1.x + f16tof32 r5.y, r4.x + f16tof32 r6.x, r1.z + f16tof32 r6.y, r4.y + f16tof32 r7.x, r1.y + f16tof32 r7.y, r4.z + f16tof32 r1.w, r1.w + f16tof32 r1.x, r4.w + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + default + mov r5.x, r1.x + mov r5.yzw, l(0,0,0,0) + mov r6.x, r1.z + mov r6.yzw, l(0,0,0,0) + mov r7.x, r1.y + mov r7.yzw, l(0,0,0,0) + mov r1.xyz, l(0,0,0,0) + break + endswitch +endif +ibfe r2.y, l(6), l(16), CB0[0][0].z +ishl r2.y, r2.y, l(23) +iadd r2.y, r2.y, l(0x3f800000) +uge r3.x, r0.y, l(4) +if_nz r3.x + mul r3.x, r2.y, l(0.500000) + ishl r3.y, l(80), r3.z + iadd r3.y, r0.w, r3.y + ld r4.xyzw, r3.yyyy, T0[0].xzyw + if_nz r3.z + iadd r3.y, r0.w, l(161) + ld r8.xyzw, r3.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r4.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r12.zzwz + ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.xz, r4.xxzx + f16tof32 r9.yw, r12.xxxy + f16tof32 r10.xz, r4.yywy + f16tof32 r10.yw, r12.zzzw + ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r11.xz, r8.xxzx + f16tof32 r11.yw, r12.xxxy + f16tof32 r4.zw, r8.wwwy + f16tof32 r4.xy, r12.zwzz + break + default + mov r9.xy, r4.xzxx + mov r9.zw, l(0,0,0,0) + mov r10.xy, r4.ywyy + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.xzxx + mov r11.zw, l(0,0,0,0) + mov r4.xw, r8.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r12.x, r4.x + mov r12.yz, r8.xxyx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + utof r8.xy, r8.zwzz + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r13.x, r4.z + mov r13.yz, r12.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mov r12.x, r4.y + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r8.zw, r12.xxxw + mov r12.x, r4.w + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) + mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r9.w, r8.x + mov r10.w, r8.y + mov r11.w, r8.z + mov r4.y, r8.w + break + case l(4) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r12.xz, r8.xxyx + mov r12.yw, r4.xxxz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.x, r4.x + f16tof32 r9.y, r8.x + f16tof32 r10.x, r4.z + f16tof32 r10.y, r8.y + f16tof32 r11.x, r4.y + f16tof32 r11.y, r8.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r8.w + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r9.x, r4.x + mov r9.yzw, l(0,0,0,0) + mov r10.x, r4.z + mov r10.yzw, l(0,0,0,0) + mov r11.x, r4.y + mov r11.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r5.xyzw, r9.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r11.xyzw + add r1.xyzw, r1.xyzw, r4.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r2.y, r2.y, l(0.250000) + ishl r4.xy, l(1, 81, 0, 0), r3.zzzz + iadd r4.xy, r0.wwww, r4.xyxx + ld r8.xyzw, r4.xxxx, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(3) + ld r9.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r8.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r13.zzwz + ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r9.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r9.xz, r13.zzwz + ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.xz, r8.xxzx + f16tof32 r10.yw, r13.xxxy + f16tof32 r11.xz, r8.yywy + f16tof32 r11.yw, r13.zzzw + ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + f16tof32 r12.xz, r9.xxzx + f16tof32 r12.yw, r13.xxxy + f16tof32 r8.zw, r9.wwwy + f16tof32 r8.xy, r13.zwzz + break + default + mov r10.xy, r8.xzxx + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.ywyy + mov r11.zw, l(0,0,0,0) + mov r12.xy, r9.xzxx + mov r12.zw, l(0,0,0,0) + mov r8.xw, r9.wwwy + mov r8.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) + and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) + and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) + mov r13.x, r8.x + mov r13.yz, r9.xxyx + and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) + utof r4.xz, r9.zzwz + ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) + mov r13.x, r8.z + mov r13.yz, r9.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r9.x, r8.y + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) + utof r13.xy, r9.xwxx + mov r9.x, r8.w + and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r15.xyzx, r9.xyzx + movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) + mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r10.w, r4.x + mov r11.w, r4.z + mov r12.w, r9.x + mov r8.y, r9.y + break + case l(4) + ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r9.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.xz, r9.zzwz + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.x, r8.x + f16tof32 r10.y, r9.x + f16tof32 r11.x, r8.z + f16tof32 r11.y, r9.y + f16tof32 r12.x, r8.y + f16tof32 r12.y, r9.z + f16tof32 r8.w, r8.w + f16tof32 r8.x, r9.w + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + default + mov r10.x, r8.x + mov r10.yzw, l(0,0,0,0) + mov r11.x, r8.z + mov r11.yzw, l(0,0,0,0) + mov r12.x, r8.y + mov r12.yzw, l(0,0,0,0) + mov r8.xyz, l(0,0,0,0) + break + endswitch + endif + add r9.xyzw, r5.xyzw, r10.xyzw + add r10.xyzw, r6.xyzw, r11.xyzw + add r11.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r1.wxzy, r8.wxzy + ld r4.xyzw, r4.yyyy, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(163) + ld r12.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r4.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r16.zzwz + ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r12.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r12.xz, r16.zzwz + ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.xz, r4.xxzx + f16tof32 r13.yw, r16.xxxy + f16tof32 r14.xz, r4.yywy + f16tof32 r14.yw, r16.zzzw + ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + f16tof32 r15.xz, r12.xxzx + f16tof32 r15.yw, r16.xxxy + f16tof32 r4.zw, r12.wwwy + f16tof32 r4.xy, r16.zwzz + break + default + mov r13.xy, r4.xzxx + mov r13.zw, l(0,0,0,0) + mov r14.xy, r4.ywyy + mov r14.zw, l(0,0,0,0) + mov r15.xy, r12.xzxx + mov r15.zw, l(0,0,0,0) + mov r4.xw, r12.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r16.x, r4.x + mov r16.yz, r12.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r0.yw, r12.zzzw + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r16.x, r4.z + mov r16.yz, r12.xxwx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r12.x, r4.y + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r16.xyzx, r12.xyzx + movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r3.yz, r12.xxwx + mov r12.x, r4.w + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r17.xyzx, r12.xyzx + movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r0.y + mov r14.w, r0.w + mov r15.w, r3.y + mov r4.y, r3.z + break + case l(4) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r16.xz, r12.xxyx + mov r16.yw, r4.xxxz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.x, r4.x + f16tof32 r13.y, r12.x + f16tof32 r14.x, r4.z + f16tof32 r14.y, r12.y + f16tof32 r15.x, r4.y + f16tof32 r15.y, r12.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r12.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r13.x, r4.x + mov r13.yzw, l(0,0,0,0) + mov r14.x, r4.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r4.y + mov r15.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r9.xyzw, r13.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + add r7.xyzw, r11.xyzw, r15.xyzw + add r1.xyzw, r4.xyzw, r8.ywzx + else + mov r2.y, r3.x + endif +endif +mul r3.xyzw, r2.yyyy, r5.xyzw +mul r4.xyzw, r2.yyyy, r6.xyzw +mul r5.xyzw, r2.yyyy, r7.xyzw +mul r1.xyzw, r1.wxzy, r2.yyyy +if_nz r2.z + mov r3.xz, r3.zzxz + mov r4.xz, r4.zzxz + mov r5.xz, r5.zzxz + mov r6.xy, r1.zxzz +else + mov r6.xy, r1.xzxx +endif +if_nz r2.w + if_z vThreadID.x + mov r3.xyzw, r4.xyzw + mov r6.zw, r1.yyyw + mov r5.xyzw, r6.xzyw + endif + if_z vThreadID.y + mov r3.xyzw, r5.xyzw + mov r4.xz, r6.xxyx + mov r4.yw, r1.yyyw + endif +endif +bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, vThreadID.xyyx +bfi r2.y, l(10), l(5), CB0[0][0].w, l(0) +and r2.z, CB0[0][0].z, l(8) +if_nz r2.z + ubfe r2.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r7.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r6.z, r2.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r6.z, r2.w, r7.x + ushr r6.w, r2.y, l(5) + imad r2.w, r2.w, r6.w, r7.y + ishl r6.w, r0.z, l(12) + and r6.w, r6.w, l(0x00006000) + bfi r6.w, l(3), l(10), r0.w, r6.w + ishr r6.w, r6.w, l(6) + iadd r6.z, r6.z, r7.z + bfi r7.x, l(1), l(1), r6.z, l(0) + iadd r7.x, r7.x, r7.w + bfi r7.x, l(2), l(1), r7.x, l(0) + bfi r6.z, l(1), l(0), r6.z, r7.x + bfi r7.xy, l(18, 18, 0, 0), l(12, 15, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r7.xy, r6.wwww, l(2, 16, 0, 0), r7.xyxx + bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 10, 13), r2.zzzz, r7.xxxy + bfi r6.w, l(1), l(4), r0.z, l(0) + ubfe r7.x, l(3), l(6), r2.z + and r7.y, r6.z, l(6) + bfi r6.z, l(1), l(8), r6.z, l(0) + imad r6.z, r7.x, l(32), r6.z + imad r6.z, r7.y, l(4), r6.z + bfi r2.zw, l(0, 0, 5, 5), l(0, 0, 0, 3), r6.wwww, r2.zzzw + bfi r2.w, l(9), l(3), r6.z, r2.w + bfi r2.z, l(6), l(0), r2.z, r2.w +else + ishr r7.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r2.y, l(5) + imad r0.x, r7.y, r0.x, r7.x + ishl r0.y, r0.z, l(7) + and r2.yw, r0.yyyy, l(0, 1792, 0, 2048) + bfi r0.y, l(3), l(5), r0.w, r2.y + bfi r0.y, l(21), l(11), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r0.y, r0.y, r0.z + ishl r6.zw, r2.yyyy, l(0, 0, 3, 2) + bfi r6.zw, l(0, 0, 3, 3), l(0, 0, 8, 7), r0.wwww, r6.zzzw + bfi r0.xw, l(21, 0, 0, 21), l(14, 0, 0, 13), r0.xxxx, r6.zzzw + imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx + bfi r0.x, l(12), l(0), r2.w, r0.x + and r0.z, r0.z, l(1792) + iadd r0.x, r0.x, r0.z + and r0.z, r7.z, l(2) + iadd r0.z, r7.w, r0.z + bfi r0.z, l(2), l(6), r0.z, l(0) + iadd r0.x, r0.x, r0.z + bfi r2.z, l(6), l(0), r0.y, r0.x +endif +ushr r0.x, r2.z, l(2) +ieq r0.y, r2.x, l(5) +if_nz r0.y + mov r3.xyzw, r3.wzyx + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r0.w, r0.z, l(4) +if_nz r0.w + mov r3.xyzw, r3.yxwz + mov r0.z, l(2) +endif +ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) +or r0.zw, r2.zzzw, r2.yyyz +if_nz r0.z + ishl r7.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r0.w + ushr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +iadd r0.zw, r0.xxxx, l(0, 0, 1, 3) +if_nz r0.y + mov r4.xyzw, r4.wzyx + mov r2.y, l(2) +else + mov r2.y, r2.x +endif +ieq r2.z, r2.y, l(4) +if_nz r2.z + mov r4.xyzw, r4.yxwz + mov r2.y, l(2) +endif +ieq r2.yzw, r2.yyyy, l(0, 1, 2, 3) +or r2.yz, r2.zzwz, r2.yyzy +if_nz r2.y + ishl r3.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r3.xyzw, r7.xyzw +endif +if_nz r2.z + ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r4.xyzw +iadd r0.z, r0.x, l(2) +if_nz r0.y + mov r5.xyzw, r5.wzyx + mov r2.y, l(2) +else + mov r2.y, r2.x +endif +ieq r2.z, r2.y, l(4) +if_nz r2.z + mov r5.xyzw, r5.yxwz + mov r2.y, l(2) +endif +ieq r2.yzw, r2.yyyy, l(0, 1, 2, 3) +or r2.yz, r2.zzwz, r2.yyzy +if_nz r2.y + ishl r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.z + ushr r3.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r5.xyzw +if_nz r0.y + mov r1.xz, r1.wwyw + mov r1.yw, r6.yyyx + mov r2.x, l(2) +else + mov r1.xz, r6.xxyx +endif +ieq r0.y, r2.x, l(4) +if_nz r0.y + mov r1.xyzw, r1.yxwz + mov r2.x, l(2) +endif +ieq r2.xyz, r2.xxxx, l(1, 2, 3, 0) +or r0.yz, r2.yyzy, r2.xxyx +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw +endif +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +ret +// Approximately 1169 instruction slots used +#endif + +const BYTE resolve_full_128bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 245, 108, + 135, 25, 193, 94, 85, 105, + 201, 96, 64, 44, 189, 82, + 61, 247, 1, 0, 0, 0, + 128, 139, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 228, 138, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, 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0, + 3, 0, 0, 0, 21, 0, + 0, 1, 31, 0, 4, 3, + 42, 0, 16, 0, 0, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 140, 0, 0, 17, 242, 0, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 21, 0, 0, 1, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 246, 15, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 145, 4, 0, 0, + 21, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 113, 0, 0, 0, 194, 0, + 0, 0, 178, 0, 0, 0, + 50, 0, 0, 0, 37, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 229, 0, 0, 0, 65, 0, + 0, 0, 64, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_cs.h new file mode 100644 index 000000000..69278c689 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_cs.h @@ -0,0 +1,4499 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 15 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) +ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r2.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r2.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.y, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w +iadd r2.x, r2.z, r4.z +ishl r2.x, l(4), r2.x +ishl r1.w, r1.w, l(2) +if_nz r4.z + ieq r2.y, r2.x, l(8) + if_nz r2.y + ld_raw r5.xyzw, r1.w, T0[0].zwxy + mov r6.xy, r5.zwzz + else + ld_raw r6.xy, r1.w, T0[0].xyxx + iadd r2.y, r2.x, r1.w + ld_raw r5.xy, r2.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) + ishr r7.xyzw, r6.zxwy, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) + ishr r7.xyzw, r5.zxwy, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r6.xxyx, l(0, 16, 16, 0) + f16tof32 r6.xz, r6.xxyx + f16tof32 r6.yw, r2.yyyz + ushr r2.yz, r5.xxyx, l(0, 16, 16, 0) + f16tof32 r5.xz, r5.xxyx + f16tof32 r5.yw, r2.yyyz + break + default + mov r6.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + endswitch +else + ieq r2.y, r2.x, l(4) + if_nz r2.y + ld_raw r5.xy, r1.w, T0[0].yxxx + mov r6.x, r5.y + else + ld_raw r6.x, r1.w, T0[0].xxxx + iadd r2.y, r2.x, r1.w + ld_raw r5.x, r2.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r7.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r7.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r2.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r7.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r8.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r9.xyz, r7.xyzx + iadd r9.xyz, r9.xyzx, l(-24, -24, -24, 0) + movc r9.xyz, r7.xyzx, r9.xyzx, l(8,8,8,0) + iadd r10.xyz, -r9.xyzx, l(1, 1, 1, 0) + movc r10.xyz, r8.xyzx, r8.xyzx, r10.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r9.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r7.xyz, r8.xyzx, r7.xyzx, r9.xyzx + ishl r8.xyz, r10.xyzx, l(23, 23, 23, 0) + iadd r8.xyz, r8.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r7.xyz, r7.xyzx, l(16, 16, 16, 0) + iadd r7.xyz, r8.xyzx, r7.xyzx + movc r6.xyz, r2.yzwy, r7.xyzx, l(0,0,0,0) + utof r2.y, r6.w + mul r6.w, r2.y, l(0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r2.yzw, r5.xxyz, l(0, 1023, 1023, 1023) + and r7.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r8.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r9.xyz, r7.xyzx + iadd r9.xyz, r9.xyzx, l(-24, -24, -24, 0) + movc r9.xyz, r7.xyzx, r9.xyzx, l(8,8,8,0) + iadd r10.xyz, -r9.xyzx, l(1, 1, 1, 0) + movc r10.xyz, r8.xyzx, r8.xyzx, r10.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r9.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r7.xyz, r8.xyzx, r7.xyzx, r9.xyzx + ishl r8.xyz, r10.xyzx, l(23, 23, 23, 0) + iadd r8.xyz, r8.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r7.xyz, r7.xyzx, l(16, 16, 16, 0) + iadd r7.xyz, r8.xyzx, r7.xyzx + movc r5.xyz, r2.yzwy, r7.xyzx, l(0,0,0,0) + utof r2.y, r5.w + mul r5.w, r2.y, l(0.333333) + break + case l(4) + ishl r6.y, r6.x, l(16) + ishr r2.yz, r6.yyxy, l(0, 16, 16, 0) + itof r2.yz, r2.yyzy + mul r2.yz, r2.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r6.xy, r2.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r2.yz, r5.yyxy, l(0, 16, 16, 0) + itof r2.yz, r2.yyzy + mul r2.yz, r2.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r5.xy, r2.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r2.y, r6.x, l(16) + f16tof32 r6.x, r6.x + f16tof32 r6.y, r2.y + ushr r2.y, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r2.y + mov r6.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break + endswitch +endif +ibfe r2.y, l(6), l(16), CB0[0][0].z +ishl r2.y, r2.y, l(23) +iadd r2.y, r2.y, l(0x3f800000) +uge r2.z, r1.y, l(4) +if_nz r2.z + mul r2.z, r2.y, l(0.500000) + ishl r2.w, l(320), r4.z + iadd r2.w, r1.w, r2.w + if_nz r4.z + ieq r3.y, r2.x, l(8) + if_nz r3.y + ld_raw r7.xyzw, r2.w, T0[0].zwxy + mov r8.xy, r7.zwzz + else + ld_raw r8.xy, r2.w, T0[0].xyxx + iadd r3.y, r2.x, r2.w + ld_raw r7.xy, r3.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.xyxx, l(16, 16, 0, 0) + f16tof32 r8.xz, r8.xxyx + f16tof32 r8.yw, r4.xxxy + ushr r4.xy, r7.xyxx, l(16, 16, 0, 0) + f16tof32 r7.xz, r7.xxyx + f16tof32 r7.yw, r4.xxxy + break + default + mov r8.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + endswitch + else + ieq r3.y, r2.x, l(4) + if_nz r3.y + ld_raw r7.xy, r2.w, T0[0].yxxx + mov r8.x, r7.y + else + ld_raw r8.x, r2.w, T0[0].xxxx + iadd r2.w, r2.x, r2.w + ld_raw r7.x, r2.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r8.yzw, r8.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r8.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.w, r8.w + mul r8.w, r2.w, l(0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r9.xyz, r7.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r7.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r7.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r7.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.w, r7.w + mul r7.w, r2.w, l(0.333333) + break + case l(4) + ishl r8.y, r8.x, l(16) + ishr r4.xy, r8.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r8.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r7.y, r7.x, l(16) + ishr r4.xy, r7.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + case l(6) + ushr r2.w, r8.x, l(16) + f16tof32 r8.x, r8.x + f16tof32 r8.y, r2.w + ushr r2.w, r7.x, l(16) + f16tof32 r7.x, r7.x + f16tof32 r7.y, r2.w + mov r8.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + default + mov r8.yzw, l(0,0,0,0) + mov r7.yzw, l(0,0,0,0) + break + endswitch + endif + add r6.xyzw, r6.xyzw, r8.xyzw + add r5.xyzw, r5.xyzw, r7.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r2.y, r2.y, l(0.250000) + ishl r4.xy, l(4, 324, 0, 0), r4.zzzz + iadd r1.yw, r1.wwww, r4.xxxy + if_nz r4.z + ieq r2.w, r2.x, l(8) + if_nz r2.w + ld_raw r7.xyzw, r1.y, T0[0].zwxy + mov r8.xy, r7.zwzz + else + ld_raw r8.xy, r1.y, T0[0].xyxx + iadd r2.w, r2.x, r1.y + ld_raw r7.xy, r2.w, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.xyxx, l(16, 16, 0, 0) + f16tof32 r8.xz, r8.xxyx + f16tof32 r8.yw, r4.xxxy + ushr r4.xy, r7.xyxx, l(16, 16, 0, 0) + f16tof32 r7.xz, r7.xxyx + f16tof32 r7.yw, r4.xxxy + break + default + mov r8.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + endswitch + else + ieq r2.w, r2.x, l(4) + if_nz r2.w + ld_raw r7.xy, r1.y, T0[0].yxxx + mov r8.x, r7.y + else + ld_raw r8.x, r1.y, T0[0].xxxx + iadd r1.y, r2.x, r1.y + ld_raw r7.x, r1.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r8.yzw, r8.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r8.yzw, r8.xxxx, l(0, 10, 20, 30) + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r8.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r1.y, r8.w + mul r8.w, r1.y, l(0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r9.xyz, r7.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r7.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r7.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r7.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r1.y, r7.w + mul r7.w, r1.y, l(0.333333) + break + case l(4) + ishl r8.y, r8.x, l(16) + ishr r4.xy, r8.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r8.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r7.y, r7.x, l(16) + ishr r4.xy, r7.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + case l(6) + ushr r1.y, r8.x, l(16) + f16tof32 r8.x, r8.x + f16tof32 r8.y, r1.y + ushr r1.y, r7.x, l(16) + f16tof32 r7.x, r7.x + f16tof32 r7.y, r1.y + mov r8.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + default + mov r8.yzw, l(0,0,0,0) + mov r7.yzw, l(0,0,0,0) + break + endswitch + endif + add r8.xyzw, r6.xyzw, r8.xyzw + add r7.xyzw, r5.xyzw, r7.xyzw + if_nz r4.z + ieq r1.y, r2.x, l(8) + if_nz r1.y + ld_raw r9.xyzw, r1.w, T0[0].zwxy + mov r10.xy, r9.zwzz + else + ld_raw r10.xy, r1.w, T0[0].xyxx + iadd r1.y, r2.x, r1.w + ld_raw r9.xy, r1.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r11.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r11.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + break + default + mov r10.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + endswitch + else + ieq r1.y, r2.x, l(4) + if_nz r1.y + ld_raw r9.xy, r1.w, T0[0].yxxx + mov r10.x, r9.y + else + ld_raw r10.x, r1.w, T0[0].xxxx + iadd r1.y, r2.x, r1.w + ld_raw r9.x, r1.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r4.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r10.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r4.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r9.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r4.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r10.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r4.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r9.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r4.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx + ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r10.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) + utof r1.y, r10.w + mul r10.w, r1.y, l(0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r4.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx + ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r9.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) + utof r1.y, r9.w + mul r9.w, r1.y, l(0.333333) + break + case l(4) + ishl r10.y, r10.x, l(16) + ishr r1.yw, r10.yyyx, l(0, 16, 0, 16) + itof r1.yw, r1.yyyw + mul r1.yw, r1.yyyw, l(0.000000, 0.000977, 0.000000, 0.000977) + max r10.xy, r1.ywyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r1.yw, r9.yyyx, l(0, 16, 0, 16) + itof r1.yw, r1.yyyw + mul r1.yw, r1.yyyw, l(0.000000, 0.000977, 0.000000, 0.000977) + max r9.xy, r1.ywyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r1.y, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r1.y + ushr r1.y, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r1.y + mov r10.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + endif + add r6.xyzw, r8.xyzw, r10.xyzw + add r5.xyzw, r7.xyzw, r9.xyzw + else + mov r2.y, r2.z + endif +endif +mul r4.xyzw, r2.yyyy, r6.xyzw +mul r2.xyzw, r2.yyyy, r5.xyzw +if_nz r3.z + mov r4.xz, r4.zzxz + mov r2.xz, r2.zzxz +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r5.x + ushr r3.y, r1.x, l(5) + imad r1.z, r1.z, r3.y, r5.y + ishl r3.y, r0.z, l(12) + and r3.y, r3.y, l(0x00006000) + bfi r3.y, l(3), l(10), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r1.w, r1.w, r5.z + bfi r3.z, l(1), l(1), r1.w, l(0) + iadd r3.z, r3.z, r5.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.z + bfi r3.zw, l(0, 0, 18, 18), l(0, 0, 12, 15), r1.zzzz, l(0, 0, 0, 0) + imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz + bfi r1.yz, l(0, 2, 2, 0), l(0, 10, 13, 0), r1.yyyy, r3.yyzy + bfi r3.y, l(1), l(4), r0.z, l(0) + ubfe r3.z, l(3), l(6), r1.y + and r3.w, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.z, l(32), r1.w + imad r1.w, r3.w, l(4), r1.w + bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r0.y, r0.z, l(7) + and r1.xz, r0.yyyy, l(1792, 0, 2048, 0) + bfi r0.y, l(3), l(5), r0.w, r1.x + bfi r0.y, l(21), l(11), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r0.y, r0.y, r0.z + ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) + bfi r1.xw, l(3, 0, 0, 3), l(8, 0, 0, 7), r0.wwww, r1.xxxw + bfi r0.xw, l(21, 0, 0, 21), l(14, 0, 0, 13), r0.xxxx, r1.xxxw + imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.z, r0.z, l(1792) + iadd r0.x, r0.x, r0.z + and r0.z, r5.z, l(2) + iadd r0.z, r5.w, r0.z + bfi r0.z, l(2), l(6), r0.z, l(0) + iadd r0.x, r0.x, r0.z + bfi r1.y, l(6), l(0), r0.y, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ieq r0.y, r3.x, l(5) +if_nz r0.y + mov r4.yw, r4.wwwy + mov r4.xyzw, r4.yzwx + mov r0.z, l(2) +else + mov r0.z, r3.x +endif +ieq r0.w, r0.z, l(4) +if_nz r0.w + mov r4.xyzw, r4.yxwz + mov r0.z, l(2) +endif +ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) +or r0.zw, r1.yyyz, r1.xxxy +if_nz r0.z + ishl r1.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r1.xyzw, r5.xyzw +endif +if_nz r0.w + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +iadd r0.x, r0.x, l(2) +if_nz r0.y + mov r2.yw, r2.wwwy + mov r2.xyzw, r2.yzwx + mov r3.x, l(2) +endif +ieq r0.y, r3.x, l(4) +if_nz r0.y + mov r2.xyzw, r2.yxwz + mov r3.x, l(2) +endif +ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +ret +// Approximately 745 instruction slots used +#endif + +const BYTE resolve_full_128bpp_cs[] = +{ + 68, 88, 66, 67, 101, 208, + 79, 108, 141, 119, 173, 225, + 137, 35, 154, 184, 244, 254, + 193, 1, 1, 0, 0, 0, + 180, 86, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 24, 86, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 98, 97, 115, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 32, 83, 0, 0, 81, 0, + 5, 0, 200, 20, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 161, 0, 0, 6, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 15, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 41, 0, 0, 9, + 146, 0, 16, 0, 0, 0, + 0, 0, 6, 0, 2, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 85, 0, 0, 9, + 18, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 7, 0, + 0, 0, 140, 0, 0, 11, + 18, 0, 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0, 0, 0, 0, + 0, 0, 59, 0, 0, 0, + 33, 0, 0, 0, 40, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..077734755 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,12101 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 25 +dcl_thread_group 8, 8, 1 +and r0.xyzw, CB0[0][0].zxzx, l(7, 0x40000000, 8, 1023) +ieq r1.xy, vThreadID.xyxx, l(0, 0, 0, 0) +movc r1.xy, r0.yyyy, r1.xyxx, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, vThreadID.xyyx +bfi r0.y, l(10), l(5), CB0[0][0].w, l(0) +if_nz r0.z + ubfe r0.z, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.w, r0.z, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r4.x + ushr r2.w, r0.y, l(5) + imad r1.z, r1.z, r2.w, r4.y + ishl r2.w, r3.z, l(12) + and r2.w, r2.w, l(0x00006000) + bfi r2.w, l(3), l(10), r3.w, r2.w + ishr r2.w, r2.w, l(6) + iadd r1.w, r1.w, r4.z + bfi r4.x, l(1), l(1), r1.w, l(0) + iadd r4.x, r4.x, r4.w + bfi r4.x, l(2), l(1), r4.x, l(0) + bfi r1.w, l(1), l(0), r1.w, r4.x + bfi r4.xy, l(18, 18, 0, 0), l(12, 15, 0, 0), r1.zzzz, l(0, 0, 0, 0) + imad r4.xy, r2.wwww, l(2, 16, 0, 0), r4.xyxx + bfi r4.xy, l(2, 2, 0, 0), l(10, 13, 0, 0), r0.zzzz, r4.xyxx + bfi r0.z, l(1), l(4), r3.z, l(0) + ubfe r1.z, l(3), l(6), r4.x + and r2.w, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.z, r1.z, l(32), r1.w + imad r1.z, r2.w, l(4), r1.z + bfi r4.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r0.zzzz, r4.xyxx + bfi r0.z, l(9), l(3), r1.z, r4.y + bfi r0.z, l(6), l(0), r4.x, r0.z +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + ushr r0.y, r0.y, l(5) + imad r0.y, r4.y, r0.y, r4.x + ishl r1.z, r3.z, l(7) + and r1.zw, r1.zzzz, l(0, 0, 1792, 2048) + bfi r2.w, l(3), l(5), r3.w, r1.z + bfi r2.w, l(21), l(11), r0.y, r2.w + bfi r3.x, l(1), l(4), r3.z, l(0) + iadd r2.w, r2.w, r3.x + ishl r3.yz, r1.zzzz, l(0, 3, 2, 0) + bfi r3.yz, l(0, 3, 3, 0), l(0, 8, 7, 0), r3.wwww, r3.yyzy + bfi r3.yz, l(0, 21, 21, 0), l(0, 14, 13, 0), r0.yyyy, r3.yyzy + imad r3.xy, r3.xxxx, l(8, 4, 0, 0), r3.yzyy + bfi r0.y, l(12), l(0), r1.w, r3.x + and r1.z, r3.y, l(1792) + iadd r0.y, r0.y, r1.z + and r1.z, r4.z, l(2) + iadd r1.z, r4.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r0.y, r0.y, r1.z + bfi r0.z, l(6), l(0), r2.w, r0.y +endif +imul null, r0.y, r0.z, l(9) +ushr r0.y, r0.y, l(4) +bfi r1.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) +iadd r1.zw, r1.zzzw, vThreadID.xxxy +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r0.z, l(3), r2.y +if_nz r0.z + mov r4.y, r2.y +else + ieq r0.z, r2.y, l(5) + if_nz r0.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.yyyy, l(2, 0, 1, 0) +and r2.xz, r2.xxzx, l(1, 0, 1, 0) +ishl r1.zw, r1.zzzw, r2.xxxz +ushr r4.x, r4.y, l(1) +and r2.xz, r4.xxyx, l(1, 0, 1, 0) +iadd r1.zw, r1.zzzw, r2.xxxz +udiv r2.xz, null, r1.zzwz, l(80, 0, 16, 0) +movc r0.z, r3.z, l(1), l(0) +ishl r2.w, r2.x, r0.z +imad r0.w, r2.z, r0.w, r2.w +iadd r0.w, r0.w, r3.x +imad r1.zw, -r2.xxxz, l(0, 0, 80, 16), r1.zzzw +imad r1.z, r1.w, l(80), r1.z +ishl r0.z, r1.z, r0.z +imad r0.z, r0.w, l(1280), r0.z +imul null, r0.w, r0.z, l(36) +ld_raw r4.xyzw, r0.w, T0[0].wxyz +imad r1.zw, r0.zzzz, l(0, 0, 36, 36), l(0, 0, 16, 20) +ld_raw r5.x, r1.z, T0[0].xxxx +switch r3.w + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r3.x, r4.y + mov r3.yz, r9.xxyx + and r2.xzw, r3.xxyz, l(1023, 0, 1023, 1023) + and r10.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r12.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r11.xyzx, r10.xyzx, r3.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r10.xyzx, r3.xyzx + movc r6.xyz, r2.xzwx, r3.xyzx, l(0,0,0,0) + utof r2.xz, r9.zzwz + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r3.x, r4.z + mov r3.yz, r9.xxwx + and r10.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r11.xyzx, r3.xyzx + movc r7.xyz, r10.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.xz, r2.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r9.x, r4.w + and r3.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r12.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r11.xyzx, r10.xyzx, r9.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r10.xyzx, r9.xyzx + movc r8.xyz, r3.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r3.xy, r9.xwxx + mov r9.x, r4.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r5.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r0.w, r5.w + mul r5.w, r0.w, l(0.333333) + mov r6.w, r2.x + mov r7.w, r2.z + mov r8.w, r3.x + mov r4.w, r3.y + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r2.xz, r5.yyxy, l(16, 0, 16, 0) + itof r2.xz, r2.xxzx + mul r2.xz, r2.xxzx, l(0.000977, 0.000000, 0.000977, 0.000000) + max r5.xy, r2.xzxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.w, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r1.z, r2.y, l(4) +if_nz r1.z + mul r2.x, r0.w, l(0.500000) + imad r2.zw, r0.zzzz, l(0, 0, 36, 36), l(0, 0, 2880, 2896) + ld_raw r9.xyzw, r2.z, T0[0].wxyz + ld_raw r10.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r3.x, r9.y + mov r3.yz, r14.xxyx + and r15.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r18.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r17.xyzx, r16.xyzx, r3.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r16.xyzx, r3.xyzx + movc r11.xyz, r15.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.zw, r14.zzzw + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r3.x, r9.z + mov r3.yz, r14.xxwx + and r15.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r18.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r17.xyzx, r16.xyzx, r3.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r16.xyzx, r3.xyzx + movc r12.xyz, r15.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r14.x, r9.w + and r3.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r3.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r3.xy, r14.xwxx + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r17.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r16.xyzx, r15.xyzx, r17.xyzx + ishl r16.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r10.xyz, r14.xyzx, r15.xyzx, l(0,0,0,0) + utof r3.z, r10.w + mul r10.w, r3.z, l(0.333333) + mov r11.w, r2.z + mov r12.w, r2.w + mov r13.w, r3.x + mov r9.w, r3.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r2.zw, r10.yyyx, l(0, 0, 16, 16) + itof r2.zw, r2.zzzw + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r10.xy, r2.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r2.z, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r2.z + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r2.z, r2.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + imad r9.xyzw, r0.zzzz, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r3.x, r10.y + mov r3.yz, r15.xxyx + and r16.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r19.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r18.xyzx, r17.xyzx, r3.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r17.xyzx, r3.xyzx + movc r12.xyz, r16.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.zw, r15.zzzw + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r3.x, r10.z + mov r3.yz, r15.xxwx + and r16.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r19.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r18.xyzx, r17.xyzx, r3.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r17.xyzx, r3.xyzx + movc r13.xyz, r16.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r15.x, r10.w + and r3.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r14.xyz, r3.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r3.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.z, r11.w + mul r11.w, r3.z, l(0.333333) + mov r12.w, r2.z + mov r13.w, r2.w + mov r14.w, r3.x + mov r10.w, r3.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r2.zw, r11.yyyx, l(0, 0, 16, 16) + itof r2.zw, r2.zzzw + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r11.xy, r2.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r2.z, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r2.z + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r3.x, r15.y + mov r3.yz, r19.xxyx + and r20.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r23.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r22.xyzx, r21.xyzx, r3.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r21.xyzx, r3.xyzx + movc r16.xyz, r20.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.zw, r19.zzzw + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r3.x, r15.z + mov r3.yz, r19.xxwx + and r20.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r23.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r22.xyzx, r21.xyzx, r3.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r21.xyzx, r3.xyzx + movc r17.xyz, r20.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r19.x, r15.w + and r3.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r20.xyzx, r19.xyzx + movc r18.xyz, r3.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r3.xy, r19.xwxx + mov r19.x, r15.x + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r22.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r21.xyzx, r20.xyzx, r22.xyzx + ishl r21.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r9.xyz, r19.xyzx, r20.xyzx, l(0,0,0,0) + utof r3.z, r9.w + mul r9.w, r3.z, l(0.333333) + mov r16.w, r2.z + mov r17.w, r2.w + mov r18.w, r3.x + mov r15.w, r3.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r2.zw, r9.yyyx, l(0, 0, 16, 16) + itof r2.zw, r2.zzzw + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r9.xy, r2.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r2.z, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r2.z + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r2.x, r0.w +endif +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xyzw +mul r8.xyzw, r2.xxxx, r8.xzyw +mul r4.xyzw, r2.xxxx, r4.xyzw +mul r5.xyzw, r2.xxxx, r5.xyzw +and r2.x, CB0[0][0].z, l(0x01000000) +if_nz r2.x + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xy, r8.yxyy + mov r4.xz, r4.zzxz + mov r9.xy, r5.zxzz +else + mov r9.xy, r5.xzxx +endif +if_nz r1.x + mov r6.xyzw, r7.xyzw + mov r9.zw, r5.yyyw + mov r4.xyzw, r9.xzyw +endif +if_nz r1.y + mov r6.xyzw, r4.xyzw + mov r7.xz, r9.xxyx + mov r7.yw, r5.yyyw +endif +ieq r2.z, r0.x, l(5) +if_nz r2.z + mov r6.xyzw, r6.wzyx + mov r7.xyzw, r7.wzyx + mov r4.xyzw, r4.wzyx + mov r5.xz, r5.wwyw + mov r5.yw, r9.yyyx + mov r2.w, l(2) +else + mov r5.xz, r9.xxyx + mov r2.w, r0.x +endif +ieq r3.x, r2.w, l(4) +if_nz r3.x + mov r6.xyzw, r6.yxwz + mov r7.xyzw, r7.yxwz + mov r4.xyzw, r4.yxwz + mov r5.xyzw, r5.yxwz + mov r2.w, l(2) +endif +ieq r3.xyz, r2.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r9.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r9.xyzw, r10.xyzw + ishl r9.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r9.xyzw, r10.xyzw + ishl r9.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r9.xyzw, r10.xyzw + ishl r9.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r9.xyzw, r10.xyzw +endif +if_nz r3.y + ushr r9.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r9.xyzw + ushr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r9.xyzw + ushr r9.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r9.xyzw + ushr r9.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r9.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw +iadd r6.xyzw, r0.yyyy, l(1, 3, 4, 2) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +store_uav_typed U0[0].xyzw, r6.yyyy, r4.xyzw +store_uav_typed U0[0].xyzw, r6.zzzz, r5.xyzw +ld_raw r4.xyzw, r1.w, T0[0].wxyz +switch r3.w + case l(0) + case l(1) + ushr r10.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r10.x, r4.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r10.x, r4.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r4.wwww, l(0, 8, 16, 24) + mov r10.x, r4.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r4.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r10.x, r4.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r10.x, r4.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r4.wwww, l(0, 10, 20, 30) + mov r10.x, r4.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r4.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r3.x, r4.y + mov r3.yz, r10.xxyx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r11.xyzx, r3.xyzx + movc r5.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + utof r3.xy, r10.zwzz + ushr r10.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r6.x, r4.z + mov r6.yz, r10.xxwx + and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r13.xyzx, r12.xyzx, r6.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r12.xyzx, r6.xyzx + movc r7.xyz, r11.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r10.x, r4.w + and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r9.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r6.xy, r10.xwxx + mov r10.x, r4.x + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r4.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r5.w, r3.x + mov r7.w, r3.y + mov r9.w, r6.x + mov r4.w, r6.y + break + case l(4) + ishl r10.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r11.xz, r10.xxyx + mov r11.yw, r4.yyyz + ishr r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r10.zzwz + ishr r10.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r5.x, r4.y + f16tof32 r5.y, r10.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r10.y + f16tof32 r9.x, r4.w + f16tof32 r9.y, r10.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r10.w + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + default + mov r5.x, r4.y + mov r5.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r9.x, r4.w + mov r9.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.z + mul r1.z, r0.w, l(0.500000) + imad r1.w, r0.z, l(36), l(2900) + ld_raw r10.xyzw, r1.w, T0[0].wxyz + switch r3.w + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r3.x, r10.y + mov r3.yz, r14.xxyx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r15.xyzx, r3.xyzx + movc r11.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + utof r3.xy, r14.zwzz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r6.x, r10.z + mov r6.yz, r14.xxwx + and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r16.xyzx, r6.xyzx + movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r14.x, r10.w + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r6.xy, r14.xwxx + mov r14.x, r10.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r3.x + mov r12.w, r3.y + mov r13.w, r6.x + mov r10.w, r6.y + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r9.xyzw, r9.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r10.xyzw + uge r1.w, r2.y, l(6) + if_nz r1.w + mul r0.w, r0.w, l(0.250000) + imad r2.yw, r0.zzzz, l(0, 36, 0, 36), l(0, 56, 0, 2936) + ld_raw r10.xyzw, r2.y, T0[0].wxyz + switch r3.w + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r3.x, r10.y + mov r3.yz, r14.xxyx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r15.xyzx, r3.xyzx + movc r11.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + utof r3.xy, r14.zwzz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r6.x, r10.z + mov r6.yz, r14.xxwx + and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r16.xyzx, r6.xyzx + movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r14.x, r10.w + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r6.xy, r14.xwxx + mov r14.x, r10.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r3.x + mov r12.w, r3.y + mov r13.w, r6.x + mov r10.w, r6.y + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r11.xyzw, r5.xyzw, r11.xyzw + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r9.xyzw, r13.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + ld_raw r14.xyzw, r2.w, T0[0].wxyz + switch r3.w + case l(0) + case l(1) + ushr r17.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r17.x, r14.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r3.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r17.x, r14.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r14.wwww, l(0, 8, 16, 24) + mov r17.x, r14.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r17.x, r14.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r3.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r17.x, r14.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r14.wwww, l(0, 10, 20, 30) + mov r17.x, r14.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r6.x, r14.y + mov r6.yz, r17.xxyx + and r18.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r3.xyz, r18.xyzx, r6.xyzx, l(0,0,0,0) + utof r2.yw, r17.zzzw + ushr r17.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r6.x, r14.z + mov r6.yz, r17.xxwx + and r18.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r15.xyz, r18.xyzx, r6.xyzx, l(0,0,0,0) + mul r2.yw, r2.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r17.x, r14.w + and r6.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r16.xyz, r6.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r6.xy, r17.xwxx + mov r17.x, r14.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r3.w, r2.y + mov r15.w, r2.w + mov r16.w, r6.x + mov r14.w, r6.y + break + case l(4) + ishl r17.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r14.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r17.zzwz + ishr r17.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r3.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r3.x, r14.y + f16tof32 r3.y, r17.x + f16tof32 r15.x, r14.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r14.w + f16tof32 r16.y, r17.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r17.w + mov r3.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r3.x, r14.y + mov r3.yzw, l(0,0,0,0) + mov r15.x, r14.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r14.w + mov r16.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r3.xyzw, r11.xyzw + add r7.xyzw, r12.xyzw, r15.xyzw + add r9.xyzw, r13.xyzw, r16.xyzw + add r4.xyzw, r10.xyzw, r14.xyzw + else + mov r0.w, r1.z + endif +endif +mul r3.xyzw, r0.wwww, r5.xyzw +mul r5.xyzw, r0.wwww, r7.xzyw +mul r7.xyzw, r0.wwww, r9.xyzw +mul r4.xyzw, r0.wwww, r4.xyzw +if_nz r2.x + mov r3.xz, r3.zzxz + mov r5.xy, r5.yxyy + mov r7.xz, r7.zzxz + mov r4.xz, r4.zzxz +endif +movc r8.xyzw, r1.yyyy, r3.xyzw, r8.xzyw +movc r1.xyzw, r1.xxxx, r7.xyzw, r5.xzyw +if_nz r2.z + mov r8.xyzw, r8.wzyx + mov r3.xyzw, r3.wzyx + mov r1.xyzw, r1.wzyx + mov r7.xyzw, r7.wzyx + mov r4.yw, r4.wwwy + mov r4.xyzw, r4.yzwx + mov r0.x, l(2) +endif +ieq r0.z, r0.x, l(4) +if_nz r0.z + mov r8.xyzw, r8.yxwz + mov r3.xyzw, r3.yxwz + mov r1.xyzw, r1.yxwz + mov r7.xyzw, r7.yxwz + mov r4.xyzw, r4.yxwz + mov r0.x, l(2) +endif +ieq r0.xzw, r0.xxxx, l(1, 0, 2, 3) +or r0.xz, r0.zzwz, r0.xxzx +if_nz r0.x + ishl r2.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r8.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r2.xyzw, r5.xyzw +endif +if_nz r0.z + ushr r2.xyzw, r8.xyzw, l(16, 16, 16, 16) + bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.xyzw + ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw + ushr r2.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r2.xyzw + ushr r2.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r2.xyzw +endif +store_uav_typed U0[0].xyzw, r6.wwww, r8.xyzw +iadd r2.xyzw, r0.yyyy, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r1.xyzw +store_uav_typed U0[0].xyzw, r2.zzzz, r7.xyzw +store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw +ret +// Approximately 1867 instruction slots used +#endif + +const BYTE resolve_full_128bpp_from_32bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 4, 72, + 138, 152, 119, 173, 250, 232, + 180, 16, 241, 235, 43, 87, + 168, 101, 1, 0, 0, 0, + 156, 238, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 0, 238, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 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0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 76, 1, + 0, 0, 148, 0, 0, 0, + 112, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_64bpp_3xres_cs.h new file mode 100644 index 000000000..1c4016e57 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_128bpp_from_64bpp_3xres_cs.h @@ -0,0 +1,5741 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 10 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].zxxz, l(7, 1023, 0x40000000, 8) +ubfe r3.xyz, l(12, 2, 4, 0), l(13, 10, 25, 0), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +ishl r0.w, r1.z, l(1) +imad r0.w, r1.w, r2.y, r0.w +iadd r0.w, r0.w, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r1.x, r1.x, l(1) +imad r0.w, r0.w, l(1280), r1.x +imul null, r0.w, r0.w, l(9) +movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) +movc r1.xy, r2.zzzz, r1.xyxx, l(0,0,0,0) +bfi r4.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r4.xyzw, r4.xyzw, vThreadID.xyyx +bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r2.w + ubfe r0.z, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r5.xyzw, r4.zwzw, l(4, 5, 3, 3) + ishr r1.w, r0.z, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r5.x + ushr r2.y, r0.x, l(5) + imad r1.z, r1.z, r2.y, r5.y + ishl r2.y, r4.z, l(12) + and r2.y, r2.y, l(0x00006000) + bfi r2.y, l(3), l(10), r4.w, r2.y + ishr r2.y, r2.y, l(6) + iadd r1.w, r1.w, r5.z + bfi r2.z, l(1), l(1), r1.w, l(0) + iadd r2.z, r2.z, r5.w + bfi r2.z, l(2), l(1), r2.z, l(0) + bfi r1.w, l(1), l(0), r1.w, r2.z + bfi r2.zw, l(0, 0, 18, 18), l(0, 0, 12, 15), r1.zzzz, l(0, 0, 0, 0) + imad r2.yz, r2.yyyy, l(0, 2, 16, 0), r2.zzwz + bfi r2.yz, l(0, 2, 2, 0), l(0, 10, 13, 0), r0.zzzz, r2.yyzy + bfi r0.z, l(1), l(4), r4.z, l(0) + ubfe r1.z, l(3), l(6), r2.y + and r2.w, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.z, r1.z, l(32), r1.w + imad r1.z, r2.w, l(4), r1.z + bfi r2.yz, l(0, 5, 5, 0), l(0, 0, 3, 0), r0.zzzz, r2.yyzy + bfi r0.z, l(9), l(3), r1.z, r2.z + bfi r0.z, l(6), l(0), r2.y, r0.z +else + ishr r5.xyzw, r4.xyzw, l(5, 5, 2, 3) + ushr r0.x, r0.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r1.z, r4.z, l(7) + and r1.zw, r1.zzzz, l(0, 0, 1792, 2048) + bfi r2.y, l(3), l(5), r4.w, r1.z + bfi r2.y, l(21), l(11), r0.x, r2.y + bfi r2.z, l(1), l(4), r4.z, l(0) + iadd r2.y, r2.y, r2.z + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r4.wwww, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r0.xxxx, r3.xyxx + imad r2.zw, r2.zzzz, l(0, 0, 8, 4), r3.xxxy + bfi r0.x, l(12), l(0), r1.w, r2.z + and r1.z, r2.w, l(1792) + iadd r0.x, r0.x, r1.z + and r1.z, r5.z, l(2) + iadd r1.z, r5.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r0.x, r0.x, r1.z + bfi r0.z, l(6), l(0), r2.y, r0.x +endif +imul null, r0.x, r0.z, l(9) +ushr r0.xw, r0.xxxw, l(4, 0, 0, 1) +imad r0.z, r1.y, l(3), r0.w +iadd r1.y, r1.x, r0.z +ld r4.yw, r1.yyyy, T0[0].zxwy +switch r3.z + case l(5) + ishl r4.xz, r4.yywy, l(16, 0, 16, 0) + ishr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.zw, r4.yyyw, l(0, 0, 16, 16) + f16tof32 r4.xy, r4.wyww + f16tof32 r4.zw, r1.wwwz + break + default + mov r4.xz, l(0,0,0,0) + break +endswitch +ibfe r1.z, l(6), l(16), CB0[0][0].z +ishl r1.z, r1.z, l(23) +iadd r1.z, r1.z, l(0x3f800000) +uge r1.w, r0.y, l(4) +if_nz r1.w + mul r2.y, r1.z, l(0.500000) + iadd r2.z, r1.y, l(720) + ld r5.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r4.xyzw, r4.xyzw, r5.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r2.y, r1.z, l(0.250000) + iadd r2.zw, r1.yyyy, l(0, 0, 9, 729) + ld r5.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r4.ywxz, r5.ywxz + ld r6.yw, r2.wwww, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r4.xyzw, r5.zxwy, r6.xyzw + endif +else + mov r2.y, r1.z +endif +mul r4.xyzw, r2.yyyy, r4.ywxz +and r1.y, CB0[0][0].z, l(0x01000000) +if_nz r1.y + mov r4.xz, r4.zzxz +endif +ieq r2.y, r2.x, l(5) +if_nz r2.y + mov r4.yw, r4.wwwy + mov r4.xyzw, r4.yzwx + mov r2.z, l(2) +else + mov r2.z, r2.x +endif +ieq r2.w, r2.z, l(4) +if_nz r2.w + mov r4.xyzw, r4.yxwz + mov r2.z, l(2) +endif +ieq r3.xyw, r2.zzzz, l(1, 2, 0, 3) +or r2.zw, r3.yyyw, r3.xxxy +if_nz r2.z + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r2.w + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +iadd r4.xyzw, r0.xxxx, l(1, 2, 3, 4) +iadd r2.zw, r0.zzzz, l(0, 0, 1, 2) +ld r5.yw, r2.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.z, r1.z, l(0.500000) + iadd r3.x, r0.z, l(721) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r3.x, r0.y, l(6) + if_nz r3.x + mul r2.z, r1.z, l(0.250000) + iadd r3.xy, r0.zzzz, l(10, 730, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.z, r1.z +endif +mul r5.xyzw, r2.zzzz, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +if_nz r2.y + mov r5.yw, r5.wwwy + mov r5.xyzw, r5.yzwx + mov r2.z, l(2) +else + mov r2.z, r2.x +endif +ieq r3.x, r2.z, l(4) +if_nz r3.x + mov r5.xyzw, r5.yxwz + mov r2.z, l(2) +endif +ieq r3.xyw, r2.zzzz, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +ld r5.yw, r2.wwww, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.z, r1.z, l(0.500000) + iadd r2.w, r0.z, l(722) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r0.y, l(6) + if_nz r2.w + mul r2.z, r1.z, l(0.250000) + iadd r3.xy, r0.zzzz, l(11, 731, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.z, r1.z +endif +mul r5.xyzw, r2.zzzz, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +if_nz r2.y + mov r5.yw, r5.wwwy + mov r5.xyzw, r5.yzwx + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r2.z, r0.z, l(4) +if_nz r2.z + mov r5.xyzw, r5.yxwz + mov r0.z, l(2) +endif +ieq r3.xyw, r0.zzzz, l(1, 2, 0, 3) +or r2.zw, r3.yyyw, r3.xxxy +if_nz r2.z + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r2.w + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r0.z, r1.x, r0.w +iadd r2.zw, r0.zzzz, l(0, 0, 3, 6) +ld r5.yw, r2.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.z, l(723) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r3.xy, r0.zzzz, l(12, 732, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.x, r1.z +endif +mul r5.xyzw, r1.xxxx, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +if_nz r2.y + mov r5.yw, r5.wwwy + mov r5.xyzw, r5.yzwx + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r2.z, r1.x, l(4) +if_nz r2.z + mov r5.xyzw, r5.yxwz + mov r1.x, l(2) +endif +ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyzw +iadd r5.xyzw, r0.wwww, l(4, 5, 7, 8) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.w, l(724) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r3.xy, r0.wwww, l(13, 733, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.z +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +if_nz r2.y + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r2.z, r1.x, l(4) +if_nz r2.z + mov r6.xyzw, r6.yxwz + mov r1.x, l(2) +endif +ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw +iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.yw, r5.yyyy, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.w, l(725) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r3.xy, r0.wwww, l(14, 734, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.z +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +if_nz r2.y + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r2.z, r1.x, l(4) +if_nz r2.z + mov r6.xyzw, r6.yxwz + mov r1.x, l(2) +endif +ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw +ld r6.yw, r2.wwww, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.z, l(726) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r2.zw, r0.zzzz, l(0, 0, 15, 735) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.z +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +if_nz r2.y + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r1.x, r0.z, l(4) +if_nz r1.x + mov r6.xyzw, r6.yxwz + mov r0.z, l(2) +endif +ieq r3.xyw, r0.zzzz, l(1, 2, 0, 3) +or r2.zw, r3.yyyw, r3.xxxy +if_nz r2.z + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r2.w + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r6.xyzw +ld r6.yw, r5.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r1.z, l(0.500000) + iadd r1.x, r0.w, l(727) + ld r7.yw, r1.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r1.x, r0.y, l(6) + if_nz r1.x + mul r0.z, r1.z, l(0.250000) + iadd r2.zw, r0.wwww, l(0, 0, 16, 736) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r0.z, r1.z +endif +mul r6.xyzw, r0.zzzz, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +if_nz r2.y + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r1.x, r0.z, l(4) +if_nz r1.x + mov r6.xyzw, r6.yxwz + mov r0.z, l(2) +endif +ieq r3.xyw, r0.zzzz, l(1, 2, 0, 3) +or r2.zw, r3.yyyw, r3.xxxy +if_nz r2.z + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r2.w + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw +ld r5.yw, r5.wwww, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r1.z, l(0.500000) + iadd r1.x, r0.w, l(728) + ld r6.yw, r1.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r1.z, r1.z, l(0.250000) + iadd r0.yw, r0.wwww, l(0, 17, 0, 737) + ld r6.yw, r0.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r0.wwww, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r3.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r3.xyzw, r3.xyzw + mul r3.xyzw, r3.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r3.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r0.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r0.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + else + mov r1.z, r0.z + endif +endif +mul r3.xyzw, r1.zzzz, r5.ywxz +if_nz r1.y + mov r3.xz, r3.zzxz +endif +if_nz r2.y + mov r3.yw, r3.wwwy + mov r3.xyzw, r3.yzwx + mov r2.x, l(2) +endif +ieq r0.y, r2.x, l(4) +if_nz r0.y + mov r3.xyzw, r3.yxwz + mov r2.x, l(2) +endif +ieq r0.yzw, r2.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r4.wwww, r3.xyzw +ret +// Approximately 1151 instruction slots used +#endif + +const BYTE resolve_full_128bpp_from_64bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 169, 174, + 150, 196, 97, 225, 7, 135, + 219, 96, 190, 77, 232, 139, + 121, 3, 1, 0, 0, 0, + 84, 106, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 184, 105, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 252, 102, 0, 0, 81, 0, + 5, 0, 191, 25, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 10, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 12, 50, 0, + 16, 0, 0, 0, 0, 0, + 86, 133, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 29, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 20, 50, 0, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 38, 10, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 30, 0, 0, 6, 50, 0, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 70, 0, 2, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 2, 0, 0, 0, + 38, 136, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 7, 0, 0, 0, + 255, 3, 0, 0, 0, 0, + 0, 64, 8, 0, 0, 0, + 138, 0, 0, 17, 114, 0, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 12, 0, + 0, 0, 2, 0, 0, 0, + 4, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 13, 0, 0, 0, 10, 0, + 0, 0, 25, 0, 0, 0, + 0, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 31, 0, 4, 3, 58, 0, + 16, 0, 0, 0, 0, 0, + 54, 0, 0, 5, 34, 0, + 16, 0, 4, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 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0, + 128, 191, 0, 0, 128, 191, + 0, 0, 128, 191, 0, 0, + 128, 191, 2, 0, 0, 1, + 6, 0, 0, 3, 1, 64, + 0, 0, 7, 0, 0, 0, + 85, 0, 0, 10, 162, 0, + 16, 0, 0, 0, 0, 0, + 86, 13, 16, 0, 7, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0, 131, 0, + 0, 5, 50, 0, 16, 0, + 7, 0, 0, 0, 118, 15, + 16, 0, 7, 0, 0, 0, + 131, 0, 0, 5, 194, 0, + 16, 0, 7, 0, 0, 0, + 246, 7, 16, 0, 0, 0, + 0, 0, 2, 0, 0, 1, + 10, 0, 0, 1, 54, 0, + 0, 8, 82, 0, 16, 0, + 7, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 1, 23, 0, + 0, 1, 0, 0, 0, 7, + 242, 0, 16, 0, 5, 0, + 0, 0, 38, 7, 16, 0, + 6, 0, 0, 0, 70, 14, + 16, 0, 7, 0, 0, 0, + 18, 0, 0, 1, 54, 0, + 0, 5, 66, 0, 16, 0, + 1, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 21, 0, + 0, 1, 56, 0, 0, 7, + 242, 0, 16, 0, 3, 0, + 0, 0, 166, 10, 16, 0, + 1, 0, 0, 0, 214, 8, + 16, 0, 5, 0, 0, 0, + 31, 0, 4, 3, 26, 0, + 16, 0, 1, 0, 0, 0, + 54, 0, 0, 5, 82, 0, + 16, 0, 3, 0, 0, 0, + 166, 8, 16, 0, 3, 0, + 0, 0, 21, 0, 0, 1, + 31, 0, 4, 3, 26, 0, + 16, 0, 2, 0, 0, 0, + 54, 0, 0, 5, 162, 0, + 16, 0, 3, 0, 0, 0, + 246, 7, 16, 0, 3, 0, + 0, 0, 54, 0, 0, 5, + 242, 0, 16, 0, 3, 0, + 0, 0, 150, 3, 16, 0, + 3, 0, 0, 0, 54, 0, + 0, 5, 18, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 21, 0, 0, 1, 32, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 2, 0, 0, 0, + 1, 64, 0, 0, 4, 0, + 0, 0, 31, 0, 4, 3, + 26, 0, 16, 0, 0, 0, + 0, 0, 54, 0, 0, 5, + 242, 0, 16, 0, 3, 0, + 0, 0, 22, 11, 16, 0, + 3, 0, 0, 0, 54, 0, + 0, 5, 18, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 21, 0, 0, 1, 32, 0, + 0, 10, 226, 0, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 2, 0, 0, 0, 3, 0, + 0, 0, 60, 0, 0, 7, + 98, 0, 16, 0, 0, 0, + 0, 0, 166, 11, 16, 0, + 0, 0, 0, 0, 86, 6, + 16, 0, 0, 0, 0, 0, + 31, 0, 4, 3, 26, 0, + 16, 0, 0, 0, 0, 0, + 41, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 85, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 21, 0, 0, 1, + 31, 0, 4, 3, 42, 0, + 16, 0, 0, 0, 0, 0, + 85, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 140, 0, + 0, 17, 242, 0, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 127, 4, 0, 0, 10, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 126, 0, + 0, 0, 172, 0, 0, 0, + 111, 0, 0, 0, 129, 0, + 0, 0, 102, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 36, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 111, 0, + 0, 0, 2, 0, 0, 0, + 36, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_2xres_cs.h new file mode 100644 index 000000000..ef4911452 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_2xres_cs.h @@ -0,0 +1,7619 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 21 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].xzxz, l(1023, 0x01000000, 0x40000000, 8) +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +movc r0.w, r3.z, l(1), l(0) +ishl r3.y, r1.z, r0.w +imad r2.x, r1.w, r2.x, r3.y +iadd r2.x, r2.x, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w +imad r0.w, r2.x, l(1280), r0.w +ld r1.xyzw, r0.wwww, T0[0].xzyw +if_nz r3.z + iadd r2.x, r0.w, l(1) + ld r4.xyzw, r2.xxxx, T0[0].xzyw + switch r3.w + case l(5) + ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r1.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r1.xz, r8.zzwz + ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r4.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.xz, r1.xxzx + f16tof32 r5.yw, r8.xxxy + f16tof32 r6.xz, r1.yywy + f16tof32 r6.yw, r8.zzzw + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r7.xz, r4.xxzx + f16tof32 r7.yw, r8.xxxy + f16tof32 r1.zw, r4.wwwy + f16tof32 r1.xy, r8.zwzz + break + default + mov r5.xy, r1.xzxx + mov r5.zw, l(0,0,0,0) + mov r6.xy, r1.ywyy + mov r6.zw, l(0,0,0,0) + mov r7.xy, r4.xzxx + mov r7.zw, l(0,0,0,0) + mov r1.xw, r4.wwwy + mov r1.yz, l(0,0,0,0) + break + endswitch +else + switch r3.w + case l(0) + case l(1) + ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) + and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) + and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) + mov r8.x, r1.x + mov r8.yz, r4.xxyx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + utof r3.xy, r4.zwzz + ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) + mov r8.x, r1.z + mov r8.yz, r4.xxwx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r4.x, r1.y + and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r9.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r11.xyz, r9.xyzx + iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) + movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) + iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) + movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx + ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) + iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r9.xyzx, r4.xyzx + movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) + utof r8.xy, r4.xwxx + mov r4.x, r1.w + and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r10.xyzx, r4.xyzx + movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) + mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r5.w, r3.x + mov r6.w, r3.y + mov r7.w, r4.x + mov r1.y, r4.y + break + case l(4) + ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r8.xz, r4.xxyx + mov r8.yw, r1.xxxz + ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r1.xz, r4.zzwz + ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.x, r1.x + f16tof32 r5.y, r4.x + f16tof32 r6.x, r1.z + f16tof32 r6.y, r4.y + f16tof32 r7.x, r1.y + f16tof32 r7.y, r4.z + f16tof32 r1.w, r1.w + f16tof32 r1.x, r4.w + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + default + mov r5.x, r1.x + mov r5.yzw, l(0,0,0,0) + mov r6.x, r1.z + mov r6.yzw, l(0,0,0,0) + mov r7.x, r1.y + mov r7.yzw, l(0,0,0,0) + mov r1.xyz, l(0,0,0,0) + break + endswitch +endif +ibfe r2.x, l(6), l(16), CB0[0][0].z +ishl r2.x, r2.x, l(23) +iadd r2.x, r2.x, l(0x3f800000) +uge r3.x, r0.y, l(4) +if_nz r3.x + mul r3.x, r2.x, l(0.500000) + ishl r3.y, l(80), r3.z + iadd r3.y, r0.w, r3.y + ld r4.xyzw, r3.yyyy, T0[0].xzyw + if_nz r3.z + iadd r3.y, r0.w, l(161) + ld r8.xyzw, r3.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r4.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r12.zzwz + ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.xz, r4.xxzx + f16tof32 r9.yw, r12.xxxy + f16tof32 r10.xz, r4.yywy + f16tof32 r10.yw, r12.zzzw + ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r11.xz, r8.xxzx + f16tof32 r11.yw, r12.xxxy + f16tof32 r4.zw, r8.wwwy + f16tof32 r4.xy, r12.zwzz + break + default + mov r9.xy, r4.xzxx + mov r9.zw, l(0,0,0,0) + mov r10.xy, r4.ywyy + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.xzxx + mov r11.zw, l(0,0,0,0) + mov r4.xw, r8.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r12.x, r4.x + mov r12.yz, r8.xxyx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + utof r8.xy, r8.zwzz + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r13.x, r4.z + mov r13.yz, r12.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mov r12.x, r4.y + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r8.zw, r12.xxxw + mov r12.x, r4.w + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) + mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r9.w, r8.x + mov r10.w, r8.y + mov r11.w, r8.z + mov r4.y, r8.w + break + case l(4) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r12.xz, r8.xxyx + mov r12.yw, r4.xxxz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.x, r4.x + f16tof32 r9.y, r8.x + f16tof32 r10.x, r4.z + f16tof32 r10.y, r8.y + f16tof32 r11.x, r4.y + f16tof32 r11.y, r8.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r8.w + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r9.x, r4.x + mov r9.yzw, l(0,0,0,0) + mov r10.x, r4.z + mov r10.yzw, l(0,0,0,0) + mov r11.x, r4.y + mov r11.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r5.xyzw, r9.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r11.xyzw + add r1.xyzw, r1.xyzw, r4.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r2.x, r2.x, l(0.250000) + ishl r4.xy, l(1, 81, 0, 0), r3.zzzz + iadd r4.xy, r0.wwww, r4.xyxx + ld r8.xyzw, r4.xxxx, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(3) + ld r9.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r8.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r13.zzwz + ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r9.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r9.xz, r13.zzwz + ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.xz, r8.xxzx + f16tof32 r10.yw, r13.xxxy + f16tof32 r11.xz, r8.yywy + f16tof32 r11.yw, r13.zzzw + ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + f16tof32 r12.xz, r9.xxzx + f16tof32 r12.yw, r13.xxxy + f16tof32 r8.zw, r9.wwwy + f16tof32 r8.xy, r13.zwzz + break + default + mov r10.xy, r8.xzxx + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.ywyy + mov r11.zw, l(0,0,0,0) + mov r12.xy, r9.xzxx + mov r12.zw, l(0,0,0,0) + mov r8.xw, r9.wwwy + mov r8.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) + and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) + and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) + mov r13.x, r8.x + mov r13.yz, r9.xxyx + and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) + utof r4.xz, r9.zzwz + ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) + mov r13.x, r8.z + mov r13.yz, r9.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r9.x, r8.y + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) + utof r13.xy, r9.xwxx + mov r9.x, r8.w + and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r15.xyzx, r9.xyzx + movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) + mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r10.w, r4.x + mov r11.w, r4.z + mov r12.w, r9.x + mov r8.y, r9.y + break + case l(4) + ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r9.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.xz, r9.zzwz + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.x, r8.x + f16tof32 r10.y, r9.x + f16tof32 r11.x, r8.z + f16tof32 r11.y, r9.y + f16tof32 r12.x, r8.y + f16tof32 r12.y, r9.z + f16tof32 r8.w, r8.w + f16tof32 r8.x, r9.w + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + default + mov r10.x, r8.x + mov r10.yzw, l(0,0,0,0) + mov r11.x, r8.z + mov r11.yzw, l(0,0,0,0) + mov r12.x, r8.y + mov r12.yzw, l(0,0,0,0) + mov r8.xyz, l(0,0,0,0) + break + endswitch + endif + add r9.xyzw, r5.xyzw, r10.xyzw + add r10.xyzw, r6.xyzw, r11.xyzw + add r11.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r1.wxzy, r8.wxzy + ld r4.xyzw, r4.yyyy, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(163) + ld r12.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r4.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r16.zzwz + ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r12.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r12.xz, r16.zzwz + ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.xz, r4.xxzx + f16tof32 r13.yw, r16.xxxy + f16tof32 r14.xz, r4.yywy + f16tof32 r14.yw, r16.zzzw + ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + f16tof32 r15.xz, r12.xxzx + f16tof32 r15.yw, r16.xxxy + f16tof32 r4.zw, r12.wwwy + f16tof32 r4.xy, r16.zwzz + break + default + mov r13.xy, r4.xzxx + mov r13.zw, l(0,0,0,0) + mov r14.xy, r4.ywyy + mov r14.zw, l(0,0,0,0) + mov r15.xy, r12.xzxx + mov r15.zw, l(0,0,0,0) + mov r4.xw, r12.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r16.x, r4.x + mov r16.yz, r12.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r0.yw, r12.zzzw + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r16.x, r4.z + mov r16.yz, r12.xxwx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r12.x, r4.y + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r16.xyzx, r12.xyzx + movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r3.yz, r12.xxwx + mov r12.x, r4.w + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r17.xyzx, r12.xyzx + movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r0.y + mov r14.w, r0.w + mov r15.w, r3.y + mov r4.y, r3.z + break + case l(4) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r16.xz, r12.xxyx + mov r16.yw, r4.xxxz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.x, r4.x + f16tof32 r13.y, r12.x + f16tof32 r14.x, r4.z + f16tof32 r14.y, r12.y + f16tof32 r15.x, r4.y + f16tof32 r15.y, r12.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r12.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r13.x, r4.x + mov r13.yzw, l(0,0,0,0) + mov r14.x, r4.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r4.y + mov r15.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r9.xyzw, r13.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + add r7.xyzw, r11.xyzw, r15.xyzw + add r1.xyzw, r4.xyzw, r8.ywzx + else + mov r2.x, r3.x + endif +endif +mul r3.xyzw, r2.xxxx, r5.xyzw +mul r4.xyzw, r2.xxxx, r6.xyzw +mul r5.xyzw, r2.xxxx, r7.xyzw +mul r1.xyzw, r1.wxzy, r2.xxxx +if_nz r2.y + mov r3.xz, r3.zzxz + mov r4.xz, r4.zzxz + mov r5.xz, r5.zzxz + mov r1.xz, r1.zzxz +endif +ubfe r0.y, l(6), l(7), CB0[0][0].z +switch r0.y + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r6.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.x, r6.y, l(32), r6.x + imad r2.x, r6.z, l(1024), r2.x + imad r2.x, r6.w, l(0x00008000), r2.x + mov_sat r4.xyzw, r4.xyzw + mad r6.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.y, r6.y, l(32), r6.x + imad r2.y, r6.z, l(1024), r2.y + ishl r6.x, r6.w, l(31) + imad r2.y, r2.y, l(0x00010000), r6.x + iadd r0.y, r2.y, r2.x + mov_sat r5.xyzw, r5.xyzw + mad r6.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.x, r6.y, l(32), r6.x + imad r2.x, r6.z, l(1024), r2.x + imad r2.x, r6.w, l(0x00008000), r2.x + mov_sat r1.xyzw, r1.xyzw + mad r6.xyzw, r1.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.y, r6.y, l(32), r6.x + imad r2.y, r6.z, l(1024), r2.y + ishl r6.x, r6.w, l(31) + imad r2.y, r2.y, l(0x00010000), r6.x + iadd r0.w, r2.y, r2.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r6.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.x, r6.y, l(32), r6.x + imad r2.x, r6.z, l(2048), r2.x + mov_sat r4.xyz, r4.xyzx + mad r6.xyz, r4.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.y, r6.y, l(32), r6.x + ishl r6.x, r6.z, l(27) + imad r2.y, r2.y, l(0x00010000), r6.x + iadd r0.y, r2.y, r2.x + mov_sat r5.xyz, r5.xyzx + mad r6.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.x, r6.y, l(32), r6.x + imad r2.x, r6.z, l(2048), r2.x + mov_sat r1.xyz, r1.xyzx + mad r6.xyz, r1.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.y, r6.y, l(32), r6.x + ishl r6.x, r6.z, l(27) + imad r2.y, r2.y, l(0x00010000), r6.x + iadd r0.w, r2.y, r2.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r6.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.x, r6.y, l(32), r6.x + imad r2.x, r6.z, l(1024), r2.x + mov_sat r4.xyz, r4.xyzx + mad r6.xyz, r4.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.y, r6.y, l(32), r6.x + ishl r6.x, r6.z, l(26) + imad r2.y, r2.y, l(0x00010000), r6.x + iadd r0.y, r2.y, r2.x + mov_sat r5.xyz, r5.xyzx + mad r6.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.x, r6.y, l(32), r6.x + imad r2.x, r6.z, l(1024), r2.x + mov_sat r1.xyz, r1.xyzx + mad r6.xyz, r1.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r6.xyz, r6.xyzx + imad r2.y, r6.y, l(32), r6.x + ishl r6.x, r6.z, l(26) + imad r2.y, r2.y, l(0x00010000), r6.x + iadd r0.w, r2.y, r2.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r4.xxxy + mad r6.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.x, r6.y, l(256), r6.x + imad r2.x, r6.z, l(0x00010000), r2.x + imad r0.y, r6.w, l(0x01000000), r2.x + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r1.xxxy + mad r6.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.x, r6.y, l(256), r6.x + imad r2.x, r6.z, l(0x00010000), r2.x + imad r0.w, r6.w, l(0x01000000), r2.x + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r6.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.x, r6.y, l(16), r6.x + imad r2.x, r6.z, l(256), r2.x + imad r2.x, r6.w, l(4096), r2.x + mov_sat r4.xyzw, r4.xyzw + mad r6.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.y, r6.y, l(16), r6.x + imad r2.y, r6.z, l(256), r2.y + ishl r3.y, r6.w, l(28) + imad r2.y, r2.y, l(0x00010000), r3.y + iadd r0.y, r2.y, r2.x + mov_sat r5.xyzw, r5.xyzw + mad r6.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.x, r6.y, l(16), r6.x + imad r2.x, r6.z, l(256), r2.x + imad r2.x, r6.w, l(4096), r2.x + mov_sat r1.xyzw, r1.xyzw + mad r6.xyzw, r1.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r2.y, r6.y, l(16), r6.x + imad r2.y, r6.z, l(256), r2.y + ishl r3.y, r6.w, l(28) + imad r2.y, r2.y, l(0x00010000), r3.y + iadd r0.w, r2.y, r2.x + break + case l(24) + mov_sat r1.z, r3.x + mov_sat r1.y, r4.x + mov_sat r1.w, r5.x + mov_sat r1.x, r1.x + mad r6.xyzw, r1.zywx, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r0.yw, r6.yyyw, l(0, 0x00010000, 0, 0x00010000), r6.xxxz + break + default + f32tof16 r2.x, r3.x + f32tof16 r2.y, r5.x + f32tof16 r3.x, r4.x + f32tof16 r3.y, r1.x + imad r0.yw, r3.xxxy, l(0, 0x00010000, 0, 0x00010000), r2.xxxy + break +endswitch +if_nz r2.z + if_z vThreadID.x + ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r1.xxxy, r0.yyyw + endif + if_z vThreadID.y + mov r0.y, r0.w + endif +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r1.xyzw, r1.xyzw, vThreadID.xyyx +bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r2.w + ubfe r0.z, l(3), l(4), CB0[0][0].z + ushr r2.x, CB0[0][0].w, l(10) + ishl r2.x, r2.x, l(5) + ishr r3.xyzw, r1.zwzw, l(4, 5, 3, 3) + ishr r2.y, r0.z, l(2) + ushr r2.x, r2.x, l(4) + and r2.x, r2.x, l(0x00007ffe) + imad r2.x, r2.y, r2.x, r3.x + ushr r2.z, r0.x, l(5) + imad r2.x, r2.x, r2.z, r3.y + ishl r2.z, r1.z, l(9) + and r2.z, r2.z, l(3072) + bfi r2.z, l(3), l(7), r1.w, r2.z + ishr r2.z, r2.z, l(6) + iadd r2.y, r2.y, r3.z + bfi r2.w, l(1), l(1), r2.y, l(0) + iadd r2.w, r2.w, r3.w + bfi r2.w, l(2), l(1), r2.w, l(0) + bfi r2.y, l(1), l(0), r2.y, r2.w + and r2.w, r2.z, l(48) + bfi r3.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.xxxx, l(0, 0, 0, 0) + imad r2.xw, r2.wwww, l(2, 0, 0, 16), r3.xxxy + bfi r2.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r2.zzzz, r2.xxwx + bfi r2.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), r0.zzzz, r2.xxzx + ubfe r0.z, l(3), l(6), r2.x + and r2.w, r2.y, l(6) + bfi r2.y, l(1), l(8), r2.y, l(0) + imad r0.z, r0.z, l(32), r2.y + imad r0.z, r2.w, l(4), r0.z + bfi r2.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r1.zzzz, r2.xzxx + bfi r0.z, l(9), l(3), r0.z, r2.y + bfi r0.z, l(6), l(0), r2.x, r0.z +else + ishr r2.xyzw, r1.xyzw, l(5, 5, 2, 3) + ushr r0.x, r0.x, l(5) + imad r0.x, r2.y, r0.x, r2.x + ishl r1.xy, r1.zzzz, l(3, 7, 0, 0) + and r1.xy, r1.xyxx, l(112, 2048, 0, 0) + bfi r2.x, l(3), l(1), r1.w, r1.x + ishl r1.x, r1.x, l(1) + bfi r1.x, l(3), l(2), r1.w, r1.x + and r1.x, r1.x, l(224) + bfi r1.w, l(24), l(8), r0.x, r1.x + bfi r1.w, l(4), l(0), r2.x, r1.w + bfi r1.w, l(1), l(4), r1.z, r1.w + ishl r3.xy, r1.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(24, 24, 0, 0), l(11, 10, 0, 0), r0.xxxx, r3.xyxx + bfi r2.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r2.xxxx, r3.xyxx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r1.zzzz, r2.xxyx + bfi r0.x, l(12), l(0), r1.y, r1.x + and r1.x, r1.z, l(1792) + iadd r0.x, r0.x, r1.x + and r1.x, r2.z, l(2) + iadd r1.x, r2.w, r1.x + bfi r1.x, l(2), l(6), r1.x, l(0) + iadd r0.x, r0.x, r1.x + bfi r0.z, l(6), l(0), r1.w, r0.x +endif +ushr r0.x, r0.z, l(1) +and r0.z, CB0[0][0].z, l(7) +ieq r0.z, r0.z, l(1) +if_nz r0.z + ishl r1.xy, r0.ywyy, l(8, 8, 0, 0) + ushr r1.zw, r0.yyyw, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.yw, r1.zzzw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r0.ywyy +ret +// Approximately 1219 instruction slots used +#endif + +const BYTE resolve_full_16bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 198, 107, + 122, 167, 115, 13, 16, 251, + 121, 239, 86, 184, 249, 176, + 231, 107, 1, 0, 0, 0, + 192, 148, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 36, 148, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 104, 145, 0, 0, 81, 0, + 5, 0, 90, 36, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 21, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 12, 50, 0, + 16, 0, 0, 0, 0, 0, + 86, 133, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 29, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 20, 50, 0, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 38, 10, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 30, 0, 0, 6, 50, 0, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 70, 0, 2, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 2, 0, 0, 0, + 134, 136, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 255, 3, 0, 0, + 0, 0, 0, 1, 0, 0, + 0, 64, 8, 0, 0, 0, + 138, 0, 0, 17, 242, 0, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 12, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 13, 0, 0, 0, 10, 0, + 0, 0, 29, 0, 0, 0, + 25, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 31, 0, 4, 3, 58, 0, + 16, 0, 0, 0, 0, 0, + 54, 0, 0, 5, 34, 0, + 16, 0, 4, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 18, 0, 0, 1, + 32, 0, 0, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 5, 0, 0, 0, 31, 0, + 4, 3, 58, 0, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 18, 0, 0, 1, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 21, 0, + 0, 1, 80, 0, 0, 10, + 194, 0, 16, 0, 1, 0, + 0, 0, 86, 5, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 10, 194, 0, + 16, 0, 1, 0, 0, 0, + 166, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 50, 0, 16, 0, + 1, 0, 0, 0, 70, 0, + 16, 0, 1, 0, 0, 0, + 230, 10, 16, 0, 1, 0, + 0, 0, 85, 0, 0, 7, + 18, 0, 16, 0, 4, 0, + 0, 0, 26, 0, 16, 0, + 4, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 10, 194, 0, + 16, 0, 1, 0, 0, 0, + 6, 4, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 50, 0, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 78, 0, 0, 11, + 194, 0, 16, 0, 1, 0, + 0, 0, 0, 208, 0, 0, + 6, 4, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 0, + 16, 0, 0, 0, 55, 0, + 0, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 3, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 41, 0, + 0, 7, 34, 0, 16, 0, + 3, 0, 0, 0, 42, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 18, 0, 16, 0, 2, 0, + 0, 0, 58, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 2, 0, 0, 0, + 26, 0, 16, 0, 3, 0, + 0, 0, 30, 0, 0, 7, + 18, 0, 16, 0, 2, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 3, 0, 0, 0, + 35, 0, 0, 13, 50, 0, + 16, 0, 1, 0, 0, 0, + 230, 10, 16, 128, 65, 0, + 0, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 1, 0, 0, 0, 35, 0, + 0, 9, 18, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 80, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 130, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 5, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 45, 0, 0, 8, + 242, 0, 16, 0, 1, 0, + 0, 0, 246, 15, 16, 0, + 0, 0, 0, 0, 134, 125, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 3, 0, 0, 0, 30, 0, + 0, 7, 18, 0, 16, 0, + 2, 0, 0, 0, 58, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 45, 0, 0, 8, + 242, 0, 16, 0, 4, 0, + 0, 0, 6, 0, 16, 0, + 2, 0, 0, 0, 134, 125, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 76, 0, + 0, 3, 58, 0, 16, 0, + 3, 0, 0, 0, 6, 0, + 0, 3, 1, 64, 0, 0, + 5, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 8, 0, 0, 0, 134, 13, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 54, 0, 0, 5, + 82, 0, 16, 0, 9, 0, + 0, 0, 6, 1, 16, 0, + 8, 0, 0, 0, 54, 0, + 0, 5, 162, 0, 16, 0, + 9, 0, 0, 0, 6, 8, + 16, 0, 1, 0, 0, 0, + 42, 0, 0, 10, 242, 0, + 16, 0, 9, 0, 0, 0, + 70, 14, 16, 0, 9, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 43, 0, + 0, 5, 242, 0, 16, 0, + 9, 0, 0, 0, 70, 14, + 16, 0, 9, 0, 0, 0, + 56, 0, 0, 10, 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0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 0, + 0, 0, 65, 0, 0, 0, + 83, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_cs.h new file mode 100644 index 000000000..29c9ac086 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_cs.h @@ -0,0 +1,8116 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 23 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].xzzz, l(1023, 0x01000000, 8, 7) +ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r2.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r2.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.x, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w +iadd r2.x, r2.z, r4.z +ishl r2.y, l(4), r2.x +ishl r1.w, r1.w, l(2) +if_nz r4.z + ieq r2.z, r2.y, l(8) + if_nz r2.z + ld_raw r5.xyzw, r1.w, T0[0].zwxy + iadd r2.z, r1.w, l(16) + ld_raw r6.xyzw, r2.z, T0[0].zwxy + mov r7.xy, r5.zwzz + mov r8.xy, r6.zwzz + else + ld_raw r7.xy, r1.w, T0[0].xyxx + iadd r2.z, r2.y, r1.w + ld_raw r5.xy, r2.z, T0[0].xyxx + ishl r2.zw, l(0, 0, 8, 12), r2.xxxx + iadd r2.zw, r1.wwww, r2.zzzw + ld_raw r8.xy, r2.z, T0[0].xyxx + ld_raw r6.xy, r2.w, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r5.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r6.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.xxxy, l(0, 0, 16, 16) + f16tof32 r7.xz, r7.xxyx + f16tof32 r7.yw, r2.zzzw + ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) + f16tof32 r5.xz, r5.xxyx + f16tof32 r5.yw, r2.zzzw + ushr r2.zw, r8.xxxy, l(0, 0, 16, 16) + f16tof32 r8.xz, r8.xxyx + f16tof32 r8.yw, r2.zzzw + ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) + f16tof32 r6.xz, r6.xxyx + f16tof32 r6.yw, r2.zzzw + break + default + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + endswitch +else + ieq r2.z, r2.y, l(4) + if_nz r2.z + ld_raw r6.xyzw, r1.w, T0[0].wxyz + else + ld_raw r6.y, r1.w, T0[0].xxxx + iadd r2.z, r2.y, r1.w + ld_raw r6.z, r2.z, T0[0].xxxx + ishl r2.zw, l(0, 0, 8, 12), r2.xxxx + iadd r2.zw, r1.wwww, r2.zzzw + ld_raw r6.w, r2.z, T0[0].xxxx + ld_raw r6.x, r2.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r9.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r9.x, r6.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r9.x, r6.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r6.wwww, l(0, 8, 16, 24) + mov r9.x, r6.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r9.x, r6.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r9.x, r6.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r6.wwww, l(0, 10, 20, 30) + mov r9.x, r6.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r10.x, r6.y + mov r10.yz, r9.xxyx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.zw, r9.zzzw + ushr r9.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r10.x, r6.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r5.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r9.x, r6.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r4.xy, r9.xwxx + mov r9.x, r6.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r6.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r7.w, r2.z + mov r5.w, r2.w + mov r8.w, r4.x + mov r6.w, r4.y + break + case l(4) + ishl r9.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r6.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r9.zzwz + ishr r9.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r9.x + f16tof32 r5.x, r6.z + f16tof32 r5.y, r9.y + f16tof32 r8.x, r6.w + f16tof32 r8.y, r9.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r9.w + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r5.x, r6.z + mov r5.yzw, l(0,0,0,0) + mov r8.x, r6.w + mov r8.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break + endswitch +endif +ibfe r2.z, l(6), l(16), CB0[0][0].z +ishl r2.z, r2.z, l(23) +iadd r2.z, r2.z, l(0x3f800000) +uge r2.w, r1.y, l(4) +if_nz r2.w + mul r2.w, r2.z, l(0.500000) + ishl r3.x, l(320), r4.z + iadd r3.x, r1.w, r3.x + if_nz r4.z + ieq r4.x, r2.y, l(8) + if_nz r4.x + ld_raw r9.xyzw, r3.x, T0[0].zwxy + iadd r4.x, r3.x, l(16) + ld_raw r10.xyzw, r4.x, T0[0].zwxy + mov r11.xy, r9.zwzz + mov r12.xy, r10.zwzz + else + ld_raw r11.xy, r3.x, T0[0].xyxx + iadd r4.x, r2.y, r3.x + ld_raw r9.xy, r4.x, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r3.xxxx, r4.xyxx + ld_raw r12.xy, r4.x, T0[0].xyxx + ld_raw r10.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) + f16tof32 r11.xz, r11.xxyx + f16tof32 r11.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) + f16tof32 r12.xz, r12.xxyx + f16tof32 r12.yw, r4.xxxy + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + break + default + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + endswitch + else + ieq r4.x, r2.y, l(4) + if_nz r4.x + ld_raw r10.xyzw, r3.x, T0[0].wxyz + else + ld_raw r10.y, r3.x, T0[0].xxxx + iadd r4.x, r2.y, r3.x + ld_raw r10.z, r4.x, T0[0].xxxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r3.xxxx, r4.xyxx + ld_raw r10.w, r4.x, T0[0].xxxx + ld_raw r10.x, r4.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r14.x, r10.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r4.xy, r13.zwzz + ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r14.x, r10.z + mov r14.yz, r13.xxwx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r13.x, r10.w + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r14.xy, r13.xwxx + mov r13.x, r10.x + and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r16.xyzx, r13.xyzx + movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) + mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r4.x + mov r9.w, r4.y + mov r12.w, r13.x + mov r10.w, r13.y + break + case l(4) + ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r10.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r13.zzwz + ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r13.x + f16tof32 r9.x, r10.z + f16tof32 r9.y, r13.y + f16tof32 r12.x, r10.w + f16tof32 r12.y, r13.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r13.w + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r9.x, r10.z + mov r9.yzw, l(0,0,0,0) + mov r12.x, r10.w + mov r12.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + endif + add r7.xyzw, r7.xyzw, r11.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r2.z, r2.z, l(0.250000) + ishl r4.xy, l(4, 324, 0, 0), r4.zzzz + iadd r1.yw, r1.wwww, r4.xxxy + if_nz r4.z + ieq r3.x, r2.y, l(8) + if_nz r3.x + ld_raw r9.xyzw, r1.y, T0[0].zwxy + iadd r3.x, r1.y, l(16) + ld_raw r10.xyzw, r3.x, T0[0].zwxy + mov r11.xy, r9.zwzz + mov r12.xy, r10.zwzz + else + ld_raw r11.xy, r1.y, T0[0].xyxx + iadd r3.x, r2.y, r1.y + ld_raw r9.xy, r3.x, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r12.xy, r4.x, T0[0].xyxx + ld_raw r10.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) + f16tof32 r11.xz, r11.xxyx + f16tof32 r11.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) + f16tof32 r12.xz, r12.xxyx + f16tof32 r12.yw, r4.xxxy + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + break + default + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + endswitch + else + ieq r3.x, r2.y, l(4) + if_nz r3.x + ld_raw r10.xyzw, r1.y, T0[0].wxyz + else + ld_raw r10.y, r1.y, T0[0].xxxx + iadd r3.x, r2.y, r1.y + ld_raw r10.z, r3.x, T0[0].xxxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r10.w, r4.x, T0[0].xxxx + ld_raw r10.x, r4.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r14.x, r10.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r4.xy, r13.zwzz + ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r14.x, r10.z + mov r14.yz, r13.xxwx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r13.x, r10.w + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r14.xy, r13.xwxx + mov r13.x, r10.x + and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r16.xyzx, r13.xyzx + movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) + mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r4.x + mov r9.w, r4.y + mov r12.w, r13.x + mov r10.w, r13.y + break + case l(4) + ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r10.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r13.zzwz + ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r13.x + f16tof32 r9.x, r10.z + f16tof32 r9.y, r13.y + f16tof32 r12.x, r10.w + f16tof32 r12.y, r13.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r13.w + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r9.x, r10.z + mov r9.yzw, l(0,0,0,0) + mov r12.x, r10.w + mov r12.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + endif + add r11.xyzw, r7.xyzw, r11.xyzw + add r9.xyzw, r5.xyzw, r9.xyzw + add r12.xyzw, r8.xyzw, r12.xyzw + add r10.xyzw, r6.xyzw, r10.xyzw + if_nz r4.z + ieq r1.y, r2.y, l(8) + if_nz r1.y + ld_raw r13.xyzw, r1.w, T0[0].zwxy + iadd r1.y, r1.w, l(16) + ld_raw r14.xyzw, r1.y, T0[0].zwxy + mov r15.xy, r13.zwzz + mov r16.xy, r14.zwzz + else + ld_raw r15.xy, r1.w, T0[0].xyxx + iadd r1.y, r2.y, r1.w + ld_raw r13.xy, r1.y, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.wwww, r4.xyxx + ld_raw r16.xy, r4.x, T0[0].xyxx + ld_raw r14.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r15.zw, r15.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r15.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.zw, r13.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r13.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.zw, r16.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r16.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r14.zw, r14.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r14.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r15.xyxx, l(16, 16, 0, 0) + f16tof32 r15.xz, r15.xxyx + f16tof32 r15.yw, r4.xxxy + ushr r4.xy, r13.xyxx, l(16, 16, 0, 0) + f16tof32 r13.xz, r13.xxyx + f16tof32 r13.yw, r4.xxxy + ushr r4.xy, r16.xyxx, l(16, 16, 0, 0) + f16tof32 r16.xz, r16.xxyx + f16tof32 r16.yw, r4.xxxy + ushr r4.xy, r14.xyxx, l(16, 16, 0, 0) + f16tof32 r14.xz, r14.xxyx + f16tof32 r14.yw, r4.xxxy + break + default + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + endswitch + else + ieq r1.y, r2.y, l(4) + if_nz r1.y + ld_raw r14.xyzw, r1.w, T0[0].wxyz + else + ld_raw r14.y, r1.w, T0[0].xxxx + iadd r1.y, r2.y, r1.w + ld_raw r14.z, r1.y, T0[0].xxxx + ishl r2.xy, l(8, 12, 0, 0), r2.xxxx + iadd r1.yw, r1.wwww, r2.xxxy + ld_raw r14.w, r1.y, T0[0].xxxx + ld_raw r14.x, r1.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r4.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r4.x, r14.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r4.x, r14.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r13.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r14.wwww, l(0, 8, 16, 24) + mov r4.x, r14.w + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r16.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r4.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r14.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r4.x, r14.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r4.x, r14.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r13.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r14.wwww, l(0, 10, 20, 30) + mov r4.x, r14.w + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r16.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r4.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r14.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r4.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r17.x, r14.y + mov r17.yz, r4.xxyx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r15.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + utof r1.yw, r4.zzzw + ushr r4.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r17.x, r14.z + mov r17.yz, r4.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r4.x, r14.w + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r16.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r2.xy, r4.xwxx + mov r4.x, r14.x + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r15.w, r1.y + mov r13.w, r1.w + mov r16.w, r2.x + mov r14.w, r2.y + break + case l(4) + ishl r4.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r17.xz, r4.xxyx + mov r17.yw, r14.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r4.zzwz + ishr r4.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r4.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r14.y + f16tof32 r15.y, r4.x + f16tof32 r13.x, r14.z + f16tof32 r13.y, r4.y + f16tof32 r16.x, r14.w + f16tof32 r16.y, r4.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r4.w + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r14.y + mov r15.yzw, l(0,0,0,0) + mov r13.x, r14.z + mov r13.yzw, l(0,0,0,0) + mov r16.x, r14.w + mov r16.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + endif + add r7.xyzw, r11.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r13.xyzw + add r8.xyzw, r12.xyzw, r16.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + else + mov r2.z, r2.w + endif +endif +mul r4.xyzw, r2.zzzz, r7.xyzw +mul r5.xyzw, r2.zzzz, r5.xyzw +mul r7.xyzw, r2.zzzz, r8.xyzw +mul r2.xyzw, r2.zzzz, r6.xyzw +if_nz r3.y + mov r4.xz, r4.zzxz + mov r5.xz, r5.zzxz + mov r7.xz, r7.zzxz + mov r2.xz, r2.zzxz +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.z + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r6.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r6.x + ushr r3.x, r1.x, l(5) + imad r1.z, r1.z, r3.x, r6.y + ishl r3.x, r0.z, l(9) + and r3.x, r3.x, l(3072) + bfi r3.x, l(3), l(7), r0.w, r3.x + ishr r3.x, r3.x, l(6) + iadd r1.w, r1.w, r6.z + bfi r3.y, l(1), l(1), r1.w, l(0) + iadd r3.y, r3.y, r6.w + bfi r3.y, l(2), l(1), r3.y, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.y + and r3.y, r3.x, l(48) + bfi r6.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r1.zzzz, l(0, 0, 0, 0) + imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r6.xxyx + bfi r3.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r3.xxxx, r3.yzyy + bfi r1.yz, l(0, 2, 2, 0), l(0, 7, 10, 0), r1.yyyy, r3.xxyx + ubfe r3.x, l(3), l(6), r1.y + and r3.y, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.x, l(32), r1.w + imad r1.w, r3.y, l(4), r1.w + bfi r1.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r6.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r6.y, r0.x, r6.x + ishl r1.xz, r0.zzzz, l(3, 0, 7, 0) + and r1.xz, r1.xxzx, l(112, 0, 2048, 0) + bfi r0.y, l(3), l(1), r0.w, r1.x + ishl r1.x, r1.x, l(1) + bfi r0.w, l(3), l(2), r0.w, r1.x + and r0.w, r0.w, l(224) + bfi r1.x, l(24), l(8), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r3.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(24, 0, 0, 24), l(11, 0, 0, 10), r0.xxxx, r3.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r6.z, l(2) + iadd r0.y, r6.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.y, l(6), l(0), r1.x, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(3) +ubfe r0.y, l(6), l(7), CB0[0][0].z +switch r0.y + case l(3) + mov_sat r4.xyzw, r4.xyzw + mad r1.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(1024), r0.w + imad r0.w, r1.w, l(0x00008000), r0.w + mov_sat r5.xyzw, r5.xyzw + mad r1.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r1.x, r1.y, l(32), r1.x + imad r1.x, r1.z, l(1024), r1.x + ishl r1.y, r1.w, l(31) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.y, r0.w, r1.x + mov_sat r7.xyzw, r7.xyzw + mad r1.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(1024), r0.w + imad r0.w, r1.w, l(0x00008000), r0.w + mov_sat r2.xyzw, r2.xyzw + mad r1.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r1.x, r1.y, l(32), r1.x + imad r1.x, r1.z, l(1024), r1.x + ishl r1.y, r1.w, l(31) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.z, r0.w, r1.x + break + case l(4) + mov_sat r4.xyz, r4.xyzx + mad r1.xyz, r4.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(2048), r0.w + mov_sat r5.xyz, r5.xyzx + mad r1.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r1.x, r1.y, l(32), r1.x + ishl r1.y, r1.z, l(27) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.y, r0.w, r1.x + mov_sat r7.xyz, r7.xyzx + mad r1.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(2048), r0.w + mov_sat r2.xyz, r2.xyzx + mad r1.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r1.x, r1.y, l(32), r1.x + ishl r1.y, r1.z, l(27) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.z, r0.w, r1.x + break + case l(5) + mov_sat r4.xyz, r4.xyzx + mad r1.xyz, r4.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(1024), r0.w + mov_sat r5.xyz, r5.xyzx + mad r1.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r1.x, r1.y, l(32), r1.x + ishl r1.y, r1.z, l(26) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.y, r0.w, r1.x + mov_sat r7.xyz, r7.xyzx + mad r1.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(1024), r0.w + mov_sat r2.xyz, r2.xyzx + mad r1.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r1.x, r1.y, l(32), r1.x + ishl r1.y, r1.z, l(26) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.z, r0.w, r1.x + break + case l(10) + mov_sat r4.xy, r4.xyxx + mov_sat r4.zw, r5.xxxy + mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(256), r1.x + imad r0.w, r1.z, l(0x00010000), r0.w + imad r0.y, r1.w, l(0x01000000), r0.w + mov_sat r7.xy, r7.xyxx + mov_sat r7.zw, r2.xxxy + mad r1.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(256), r1.x + imad r0.w, r1.z, l(0x00010000), r0.w + imad r0.z, r1.w, l(0x01000000), r0.w + break + case l(15) + mov_sat r4.xyzw, r4.xyzw + mad r1.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(16), r1.x + imad r0.w, r1.z, l(256), r0.w + imad r0.w, r1.w, l(4096), r0.w + mov_sat r5.xyzw, r5.xyzw + mad r1.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r1.x, r1.y, l(16), r1.x + imad r1.x, r1.z, l(256), r1.x + ishl r1.y, r1.w, l(28) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.y, r0.w, r1.x + mov_sat r7.xyzw, r7.xyzw + mad r1.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(16), r1.x + imad r0.w, r1.z, l(256), r0.w + imad r0.w, r1.w, l(4096), r0.w + mov_sat r2.xyzw, r2.xyzw + mad r1.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r1.x, r1.y, l(16), r1.x + imad r1.x, r1.z, l(256), r1.x + ishl r1.y, r1.w, l(28) + imad r1.x, r1.x, l(0x00010000), r1.y + iadd r0.z, r0.w, r1.x + break + case l(24) + mov_sat r2.z, r4.x + mov_sat r2.y, r5.x + mov_sat r2.w, r7.x + mov_sat r2.x, r2.x + mad r1.xyzw, r2.zywx, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.yz, r1.yywy, l(0, 0x00010000, 0x00010000, 0), r1.xxzx + break + default + f32tof16 r1.x, r4.x + f32tof16 r1.y, r7.x + f32tof16 r3.x, r5.x + f32tof16 r3.y, r2.x + imad r0.yz, r3.xxyx, l(0, 0x00010000, 0x00010000, 0), r1.xxyx + break +endswitch +ieq r0.w, r3.w, l(1) +if_nz r0.w + ishl r1.xy, r0.yzyy, l(8, 8, 0, 0) + ushr r1.zw, r0.yyyz, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.yz, r1.zzwz, r1.xxyx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r0.yzyy +ret +// Approximately 1298 instruction slots used +#endif + +const BYTE resolve_full_16bpp_cs[] = +{ + 68, 88, 66, 67, 137, 171, + 31, 51, 69, 131, 154, 245, + 20, 38, 13, 92, 93, 160, + 188, 198, 1, 0, 0, 0, + 136, 158, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 236, 157, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 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0, 0, 1, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 150, 5, 16, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 18, 5, 0, 0, + 23, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 133, 0, 0, 0, 30, 1, + 0, 0, 171, 0, 0, 0, + 61, 0, 0, 0, 29, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 44, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 194, 0, 0, 0, 65, 0, + 0, 0, 83, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..79cede576 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,50463 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 28 +dcl_thread_group 8, 8, 1 +ishl r0.x, vThreadID.x, l(2) +ushr r0.z, CB0[0][0].y, l(7) +bfi r0.z, l(11), l(3), r0.z, l(0) +uge r0.z, r0.x, r0.z +if_nz r0.z + ret +endif +and r1.xyzw, CB0[0][0].xzzx, l(0x40000000, 7, 8, 1023) +mov r0.y, vThreadID.y +ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) +movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r0.xyyx, r3.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r1.z + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r5.x, r1.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r5.x, r2.w, r4.x + ushr r4.x, r1.x, l(5) + imad r2.w, r2.w, r4.x, r4.y + ishl r4.x, r3.z, l(9) + and r4.x, r4.x, l(3072) + bfi r4.x, l(3), l(7), r3.w, r4.x + ishr r4.x, r4.x, l(6) + iadd r4.y, r4.z, r5.x + bfi r4.z, l(1), l(1), r4.y, l(0) + iadd r4.z, r4.z, r4.w + bfi r4.z, l(2), l(1), r4.z, l(0) + bfi r4.y, l(1), l(0), r4.y, r4.z + and r4.z, r4.x, l(48) + bfi r5.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy + bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz + bfi r4.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), r1.zzzz, r4.xxzx + ubfe r1.z, l(3), l(6), r4.x + and r2.w, r4.y, l(6) + bfi r4.y, l(1), l(8), r4.y, l(0) + imad r1.z, r1.z, l(32), r4.y + imad r1.z, r2.w, l(4), r1.z + bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xzxx + bfi r1.z, l(9), l(3), r1.z, r4.y + bfi r1.z, l(6), l(0), r4.x, r1.z +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + ushr r1.x, r1.x, l(5) + imad r1.x, r4.y, r1.x, r4.x + ishl r3.xy, r3.zzzz, l(3, 7, 0, 0) + and r3.xy, r3.xyxx, l(112, 2048, 0, 0) + bfi r2.w, l(3), l(1), r3.w, r3.x + ishl r3.x, r3.x, l(1) + bfi r3.x, l(3), l(2), r3.w, r3.x + and r3.x, r3.x, l(224) + bfi r3.w, l(24), l(8), r1.x, r3.x + bfi r3.w, l(4), l(0), r2.w, r3.w + bfi r3.w, l(1), l(4), r3.z, r3.w + ishl r4.xy, r3.xxxx, l(3, 2, 0, 0) + bfi r4.xy, l(24, 24, 0, 0), l(11, 10, 0, 0), r1.xxxx, r4.xyxx + bfi r4.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r2.wwww, r4.xyxx + bfi r3.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r3.zzzz, r4.xxyx + bfi r1.x, l(12), l(0), r3.y, r3.x + and r2.w, r3.z, l(1792) + iadd r1.x, r1.x, r2.w + and r2.w, r4.z, l(2) + iadd r2.w, r4.w, r2.w + bfi r2.w, l(2), l(6), r2.w, l(0) + iadd r1.x, r1.x, r2.w + bfi r1.z, l(6), l(0), r3.w, r1.x +endif +imul null, r1.x, r1.z, l(9) +ushr r1.x, r1.x, l(3) +bfi r2.xz, l(5, 0, 2, 0), l(3, 0, 3, 0), r2.zzxz, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r2.xzxx +ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx +uge r1.z, l(3), r2.y +if_nz r1.z + mov r4.y, r2.y +else + ieq r1.z, r2.y, l(5) + if_nz r1.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.zzzz, l(2, 0, 1, 0) +and r2.zw, r2.xxxz, l(0, 0, 1, 1) +ishl r0.xy, r0.xyxx, r2.zwzz +ushr r4.x, r4.y, l(1) +and r2.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r0.xy, r0.xyxx, r2.zwzz +udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) +movc r1.z, r3.w, l(1), l(0) +ishl r3.z, r2.z, r1.z +imad r1.w, r2.w, r1.w, r3.z +iadd r1.w, r1.w, r3.y +imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, r1.z +imad r0.x, r1.w, l(1280), r0.x +imul null, r0.y, r0.x, l(36) +ubfe r1.z, l(4), l(25), CB0[0][0].x +ld_raw r4.xyzw, r0.y, T0[0].wxyz +imad r2.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 16, 20) +ld_raw r5.x, r2.z, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + utof r3.yz, r9.zzwz + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r9.x, r4.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r10.xy, r9.xwxx + mov r9.x, r4.x + and r11.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r4.xyz, r11.xyzx, r9.xyzx, l(0,0,0,0) + mul r9.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx + ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r5.xyz, r10.xyzx, r11.xyzx, l(0,0,0,0) + utof r0.y, r5.w + mul r5.w, r0.y, l(0.333333) + mov r6.w, r3.y + mov r7.w, r3.z + mov r8.w, r9.x + mov r4.w, r9.y + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r3.yz, r5.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r5.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.y, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.y + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.y, l(6), l(16), CB0[0][0].z +ishl r0.y, r0.y, l(23) +iadd r0.y, r0.y, l(0x3f800000) +uge r1.w, r2.y, l(4) +if_nz r1.w + mul r2.z, r0.y, l(0.500000) + imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 2880, 2896, 0) + ld_raw r9.xyzw, r3.y, T0[0].wxyz + ld_raw r10.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.w, r10.w + mul r10.w, r3.w, l(0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r3.y, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.y + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.z, r0.y, l(0.250000) + imad r9.xyzw, r0.xxxx, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.w, r11.w + mul r11.w, r3.w, l(0.333333) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r3.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.y + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r3.w, r9.w + mul r9.w, r3.w, l(0.333333) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r3.y, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r3.y + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r2.z, r0.y +endif +mul r6.xyzw, r2.zzzz, r6.xyzw +mul r7.xyzw, r2.zzzz, r7.xyzw +mul r8.xyzw, r2.zzzz, r8.xyzw +mul r4.xyzw, r2.zzzz, r4.xyzw +mul r5.xyzw, r2.zzzz, r5.xyzw +and r2.z, CB0[0][0].z, l(0x01000000) +if_nz r2.z + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r4.xz, r4.zzxz + mov r5.xz, r5.zzxz +endif +switch r3.x + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r11.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.x, r11.w, l(0x00008000), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.z, r11.w, l(0x00008000), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.w, r11.w, l(0x00008000), r3.y + mov_sat r4.xyzw, r4.xyzw + mad r11.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.y, r11.w, l(0x00008000), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r10.x, r11.w, l(0x00008000), r3.y + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.x, r3.w, l(2048), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.z, r3.w, l(2048), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.w, r3.w, l(2048), r3.y + mov_sat r4.xyz, r4.xyzx + mad r3.yzw, r4.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.y, r3.w, l(2048), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r10.x, r3.w, l(2048), r3.y + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.x, r3.w, l(1024), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.z, r3.w, l(1024), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.w, r3.w, l(1024), r3.y + mov_sat r4.xyz, r4.xyzx + mad r3.yzw, r4.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.y, r3.w, l(1024), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r10.x, r3.w, l(1024), r3.y + break + case l(10) + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.x, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.z, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.w, r3.z, l(256), r3.y + mov_sat r4.xy, r4.xyxx + mad r3.yz, r4.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.y, r3.z, l(256), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.x, r3.z, l(256), r3.y + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r11.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.x, r11.w, l(4096), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.z, r11.w, l(4096), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.w, r11.w, l(4096), r3.y + mov_sat r4.xyzw, r4.xyzw + mad r11.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.y, r11.w, l(4096), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r10.x, r11.w, l(4096), r3.y + break + case l(24) + mov_sat r6.x, r6.x + mad r3.y, r6.x, l(65535.000000), l(0.500000) + ftou r9.x, r3.y + mov_sat r7.x, r7.x + mad r3.y, r7.x, l(65535.000000), l(0.500000) + ftou r9.z, r3.y + mov_sat r8.x, r8.x + mad r3.y, r8.x, l(65535.000000), l(0.500000) + ftou r9.w, r3.y + mov_sat r4.x, r4.x + mad r3.y, r4.x, l(65535.000000), l(0.500000) + ftou r9.y, r3.y + mov_sat r5.x, r5.x + mad r3.y, r5.x, l(65535.000000), l(0.500000) + ftou r10.x, r3.y + break + default + f32tof16 r9.x, r6.x + f32tof16 r9.z, r7.x + f32tof16 r9.w, r8.x + f32tof16 r9.y, r4.x + f32tof16 r10.x, r5.x + break +endswitch +ieq r1.y, r1.y, l(1) +if_nz r1.y + bfi r4.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r9.xzwy, l(0, 0, 0, 0) + ushr r5.xyzw, r9.xzwy, l(8, 8, 8, 8) + iadd r9.xyzw, r4.xwyz, r5.xwyz + bfi r3.y, l(8), l(8), r10.x, l(0) + ushr r3.z, r10.x, l(8) + iadd r10.x, r3.y, r3.z + mov r4.xy, r9.xwxx + mov r9.xy, r9.zyzz +else + mov r4.xy, r9.xwxx + mov r9.xy, r9.zyzz +endif +ld_raw r5.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.wwww, l(0, 8, 16, 24) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.wwww, l(0, 10, 20, 30) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r12.x, r5.y + mov r12.yz, r11.xxyx + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r6.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + utof r3.yz, r11.zzwz + ushr r11.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r12.x, r5.z + mov r12.yz, r11.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r7.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r11.x, r5.w + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r8.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r4.zw, r11.xxxw + mov r11.x, r5.x + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r5.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r6.w, r3.y + mov r7.w, r3.z + mov r8.w, r4.z + mov r5.w, r4.w + break + case l(4) + ishl r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r12.xz, r11.xxyx + mov r12.yw, r5.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r11.zzwz + ishr r11.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r5.y + f16tof32 r6.y, r11.x + f16tof32 r7.x, r5.z + f16tof32 r7.y, r11.y + f16tof32 r8.x, r5.w + f16tof32 r8.y, r11.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r11.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r5.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r5.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.w + mov r8.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.w, r0.y, l(0.500000) + imad r3.y, r0.x, l(36), l(2900) + ld_raw r11.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.wwww, l(0, 8, 16, 24) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.wwww, l(0, 10, 20, 30) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r16.x, r11.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r16.x, r11.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r11.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r4.zw, r15.xxxw + mov r15.x, r11.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r4.z + mov r11.w, r4.w + break + case l(4) + ishl r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r11.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r15.zzwz + ishr r15.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r11.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r11.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r11.w + f16tof32 r14.y, r15.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r11.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r11.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.w + mov r14.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r12.xyzw + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r5.xyzw, r5.xyzw, r11.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.w, r0.y, l(0.250000) + imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 56, 2936, 0) + ld_raw r11.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.wwww, l(0, 8, 16, 24) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.wwww, l(0, 10, 20, 30) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r16.x, r11.y + mov r16.yz, r15.xxyx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.yw, r15.zzzw + ushr r15.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r16.x, r11.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yw, r3.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r15.x, r11.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r4.zw, r15.xxxw + mov r15.x, r11.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r12.w, r3.y + mov r13.w, r3.w + mov r14.w, r4.z + mov r11.w, r4.w + break + case l(4) + ishl r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r11.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r15.zzwz + ishr r15.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r11.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r11.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r11.w + f16tof32 r14.y, r15.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r11.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r11.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.w + mov r14.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r3.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r4.zw, r19.xxxw + mov r19.x, r15.x + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r4.z + mov r15.w, r4.w + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r5.xyzw, r11.xyzw, r15.xyzw + endif +else + mov r2.w, r0.y +endif +mul r6.xyzw, r2.wwww, r6.xyzw +mul r7.xyzw, r2.wwww, r7.xyzw +mul r8.xyzw, r2.wwww, r8.xyzw +mul r5.xyzw, r2.wwww, r5.xyzw +if_nz r2.z + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r5.xz, r5.zzxz +endif +switch r3.x + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.y, r12.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.z, r12.w, l(0x00008000), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.w, r12.w, l(0x00008000), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r12.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.x, r12.w, l(0x00008000), r2.w + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.y, r3.w, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.z, r3.w, l(2048), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.w, r3.w, l(2048), r2.w + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.x, r3.w, l(2048), r2.w + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.y, r3.w, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.z, r3.w, l(1024), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.w, r3.w, l(1024), r2.w + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.x, r3.w, l(1024), r2.w + break + case l(10) + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.y, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.z, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.w, r3.z, l(256), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.x, r3.z, l(256), r3.y + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.y, r12.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.z, r12.w, l(4096), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.w, r12.w, l(4096), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r12.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.x, r12.w, l(4096), r2.w + break + case l(24) + mov_sat r6.x, r6.x + mad r2.w, r6.x, l(65535.000000), l(0.500000) + ftou r11.y, r2.w + mov_sat r7.x, r7.x + mad r2.w, r7.x, l(65535.000000), l(0.500000) + ftou r11.z, r2.w + mov_sat r8.x, r8.x + mad r2.w, r8.x, l(65535.000000), l(0.500000) + ftou r11.w, r2.w + mov_sat r5.x, r5.x + mad r2.w, r5.x, l(65535.000000), l(0.500000) + ftou r11.x, r2.w + break + default + f32tof16 r11.y, r6.x + f32tof16 r11.z, r7.x + f32tof16 r11.w, r8.x + f32tof16 r11.x, r5.x + break +endswitch +if_nz r1.y + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.yzwx, l(0, 0, 0, 0) + ushr r6.xyzw, r11.yzwx, l(8, 8, 8, 8) + iadd r11.xyzw, r5.wxyz, r6.wxyz + mov r9.zw, r11.yyyw + mov r10.y, r11.z +else + mov r9.zw, r11.yyyw + mov r10.y, r11.z +endif +if_nz r0.z + mov r4.x, r9.x + mov r9.y, r10.x + mov r10.y, r9.w +endif +if_nz r0.w + mov r4.xy, r9.yzyy + mov r9.x, r10.x +endif +imad r4.xyzw, r9.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r4.xyxx +store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw +iadd r4.xyzw, r1.xxxx, l(1, 2, 3, 4) +imad r5.xyzw, r9.zwzz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.xyxx +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +movc r0.z, r2.x, l(72), l(36) +imad r0.x, r0.x, l(36), r0.z +ld_raw r5.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r6.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r10.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.wwww, l(0, 8, 16, 24) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.wwww, l(0, 10, 20, 30) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r12.x, r5.y + mov r12.yz, r10.xxyx + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r7.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + utof r3.yz, r10.zzwz + ushr r10.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r12.x, r5.z + mov r12.yz, r10.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r10.x, r5.w + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r9.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r11.zw, r10.xxxw + mov r10.x, r5.x + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r5.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + mul r10.xy, r11.zwzz, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r12.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r15.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r14.xyzx, r13.xyzx, r15.xyzx + ishl r14.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r6.xyz, r12.xyzx, r13.xyzx, l(0,0,0,0) + utof r2.x, r6.w + mul r6.w, r2.x, l(0.333333) + mov r7.w, r3.y + mov r8.w, r3.z + mov r9.w, r10.x + mov r5.w, r10.y + break + case l(4) + ishl r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r12.xz, r10.xxyx + mov r12.yw, r5.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r10.zzwz + ishr r10.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r6.y, r6.x, l(16) + ishr r3.yz, r6.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r6.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r5.y + f16tof32 r7.y, r10.x + f16tof32 r8.x, r5.z + f16tof32 r8.y, r10.y + f16tof32 r9.x, r5.w + f16tof32 r9.y, r10.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r10.w + ushr r2.x, r6.x, l(16) + f16tof32 r6.x, r6.x + f16tof32 r6.y, r2.x + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r5.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r5.w + mov r9.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.x, r0.y, l(0.500000) + iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) + ld_raw r10.xyzw, r3.y, T0[0].wxyz + ld_raw r12.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r16.x, r10.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r16.x, r10.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r10.wwww, l(0, 8, 16, 24) + mov r16.x, r10.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r10.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r16.x, r10.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r16.x, r10.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r10.wwww, l(0, 10, 20, 30) + mov r16.x, r10.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r10.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r17.x, r10.y + mov r17.yz, r16.xxyx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + utof r3.yz, r16.zzwz + ushr r16.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r17.x, r10.z + mov r17.yz, r16.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r16.x, r10.w + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r11.zw, r16.xxxw + mov r16.x, r10.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r10.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx + ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) + utof r3.w, r12.w + mul r12.w, r3.w, l(0.333333) + mov r13.w, r3.y + mov r14.w, r3.z + mov r15.w, r11.z + mov r10.w, r11.w + break + case l(4) + ishl r16.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r10.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r16.zzwz + ishr r16.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r10.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r10.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r10.w + f16tof32 r15.y, r16.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r16.w + ushr r3.y, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r3.y + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r13.x, r10.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r10.w + mov r15.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r9.xyzw, r9.xyzw, r15.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + add r6.xyzw, r6.xyzw, r12.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.x, r0.y, l(0.250000) + iadd r10.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r12.xyzw, r10.x, T0[0].wxyz + ld_raw r13.x, r10.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r18.x, r12.y + mov r18.yz, r17.xxyx + and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r14.xyz, r3.yzwy, r18.xyzx, l(0,0,0,0) + utof r3.yz, r17.zzwz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r18.x, r12.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r12.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r10.xy, r17.xwxx + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r3.w, r13.w + mul r13.w, r3.w, l(0.333333) + mov r14.w, r3.y + mov r15.w, r3.z + mov r16.w, r10.x + mov r12.w, r10.y + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r3.y, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r3.y + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r7.xyzw, r14.xyzw + add r15.xyzw, r8.xyzw, r15.xyzw + add r16.xyzw, r9.xyzw, r16.xyzw + add r12.xyzw, r5.xyzw, r12.xyzw + add r13.xyzw, r6.xyzw, r13.xyzw + ld_raw r17.xyzw, r10.z, T0[0].wxyz + ld_raw r10.x, r10.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r10.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r10.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) + mov r22.x, r17.y + mov r22.yz, r21.xxyx + and r3.yzw, r22.xxyz, l(0, 1023, 1023, 1023) + and r23.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r25.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r24.xyzx, r23.xyzx, r22.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r18.xyz, r3.yzwy, r22.xyzx, l(0,0,0,0) + utof r3.yz, r21.zzwz + ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) + mov r22.x, r17.z + mov r22.yz, r21.xxwx + and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) + and r24.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r24.xyzx, r22.xyzx + movc r19.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r21.x, r17.w + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r20.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) + utof r11.zw, r21.xxxw + mov r21.x, r17.x + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r21.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r24.xyz, r24.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx + ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r10.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) + utof r3.w, r10.w + mul r10.w, r3.w, l(0.333333) + mov r18.w, r3.y + mov r19.w, r3.z + mov r20.w, r11.z + mov r17.w, r11.w + break + case l(4) + ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + mov r22.xz, r21.xxyx + mov r22.yw, r17.yyyz + ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.yz, r21.zzwz + ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + f16tof32 r18.x, r17.y + f16tof32 r18.y, r21.x + f16tof32 r19.x, r17.z + f16tof32 r19.y, r21.y + f16tof32 r20.x, r17.w + f16tof32 r20.y, r21.z + f16tof32 r17.x, r17.x + f16tof32 r17.y, r21.w + ushr r3.y, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.y + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r18.x, r17.y + mov r18.yzw, l(0,0,0,0) + mov r19.x, r17.z + mov r19.yzw, l(0,0,0,0) + mov r20.x, r17.w + mov r20.yzw, l(0,0,0,0) + mov r17.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r14.xyzw, r18.xyzw + add r8.xyzw, r15.xyzw, r19.xyzw + add r9.xyzw, r16.xyzw, r20.xyzw + add r5.xyzw, r12.xyzw, r17.xyzw + add r6.xyzw, r10.xyzw, r13.xyzw + endif +else + mov r2.x, r0.y +endif +mul r7.xyzw, r2.xxxx, r7.xyzw +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r9.xyzw, r2.xxxx, r9.xyzw +mul r5.xyzw, r2.xxxx, r5.xyzw +mul r6.xyzw, r2.xxxx, r6.xyzw +if_nz r2.z + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r5.xz, r5.zzxz + mov r6.xz, r6.zzxz +endif +switch r3.x + case l(3) + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.y, r13.w, l(0x00008000), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.z, r13.w, l(0x00008000), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.w, r13.w, l(0x00008000), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.x, r13.w, l(0x00008000), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r12.x, r13.w, l(0x00008000), r2.x + break + case l(4) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.y, r3.w, l(2048), r2.x + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.z, r3.w, l(2048), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.w, r3.w, l(2048), r2.x + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.x, r3.w, l(2048), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r12.x, r3.w, l(2048), r2.x + break + case l(5) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.y, r3.w, l(1024), r2.x + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.z, r3.w, l(1024), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.w, r3.w, l(1024), r2.x + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.x, r3.w, l(1024), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r12.x, r3.w, l(1024), r2.x + break + case l(10) + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.y, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.z, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.w, r3.z, l(256), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.x, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.x, r3.z, l(256), r3.y + break + case l(15) + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.y, r13.w, l(4096), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.z, r13.w, l(4096), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.w, r13.w, l(4096), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.x, r13.w, l(4096), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r12.x, r13.w, l(4096), r2.x + break + case l(24) + mov_sat r7.x, r7.x + mad r2.x, r7.x, l(65535.000000), l(0.500000) + ftou r10.y, r2.x + mov_sat r8.x, r8.x + mad r2.x, r8.x, l(65535.000000), l(0.500000) + ftou r10.z, r2.x + mov_sat r9.x, r9.x + mad r2.x, r9.x, l(65535.000000), l(0.500000) + ftou r10.w, r2.x + mov_sat r5.x, r5.x + mad r2.x, r5.x, l(65535.000000), l(0.500000) + ftou r10.x, r2.x + mov_sat r6.x, r6.x + mad r2.x, r6.x, l(65535.000000), l(0.500000) + ftou r12.x, r2.x + break + default + f32tof16 r10.y, r7.x + f32tof16 r10.z, r8.x + f32tof16 r10.w, r9.x + f32tof16 r10.x, r5.x + f32tof16 r12.x, r6.x + break +endswitch +if_nz r1.y + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.yzwx, l(0, 0, 0, 0) + ushr r6.xyzw, r10.yzwx, l(8, 8, 8, 8) + iadd r10.xyzw, r5.wxyz, r6.wxyz + bfi r2.x, l(8), l(8), r12.x, l(0) + ushr r3.y, r12.x, l(8) + iadd r12.x, r2.x, r3.y + mov r3.yz, r10.yywy + mov r11.y, r10.z +else + mov r3.yz, r10.yywy + mov r11.y, r10.z +endif +ld_raw r5.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r9.x, r5.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r9.x, r5.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r5.wwww, l(0, 8, 16, 24) + mov r9.x, r5.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r9.x, r5.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r9.x, r5.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r5.wwww, l(0, 10, 20, 30) + mov r9.x, r5.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r13.x, r5.y + mov r13.yz, r9.xxyx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r6.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r13.x, r5.z + mov r13.yz, r9.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r7.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r5.w + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r8.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r10.zw, r9.xxxw + mov r9.x, r5.x + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r5.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + mul r9.xy, r10.zwzz, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r6.w, r2.x + mov r7.w, r2.w + mov r8.w, r9.x + mov r5.w, r9.y + break + case l(4) + ishl r9.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r13.xz, r9.xxyx + mov r13.yw, r5.yyyz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r9.zzwz + ishr r9.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r5.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r5.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r5.w + f16tof32 r8.y, r9.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r9.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r5.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r5.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.w + mov r8.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.x, r0.y, l(0.500000) + iadd r2.w, r0.x, l(2900) + ld_raw r9.xyzw, r2.w, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r16.x, r9.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r16.x, r9.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r9.wwww, l(0, 8, 16, 24) + mov r16.x, r9.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r9.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r16.x, r9.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r16.x, r9.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r9.wwww, l(0, 10, 20, 30) + mov r16.x, r9.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r9.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r17.x, r9.y + mov r17.yz, r16.xxyx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + utof r10.zw, r16.zzzw + ushr r16.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r17.x, r9.z + mov r17.yz, r16.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r16.x, r9.w + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r11.zw, r16.xxxw + mov r16.x, r9.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r9.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r13.w, r10.z + mov r14.w, r10.w + mov r15.w, r11.z + mov r9.w, r11.w + break + case l(4) + ishl r16.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r9.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r16.zzwz + ishr r16.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r9.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r9.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r9.w + f16tof32 r15.y, r16.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r16.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r13.x, r9.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r9.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r9.w + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r13.xyzw + add r7.xyzw, r7.xyzw, r14.xyzw + add r8.xyzw, r8.xyzw, r15.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r2.x, r0.y, l(0.250000) + iadd r9.xy, r0.xxxx, l(56, 2936, 0, 0) + ld_raw r13.xyzw, r9.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r13.yyyy, l(0, 8, 16, 24) + mov r17.x, r13.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r13.zzzz, l(0, 8, 16, 24) + mov r17.x, r13.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r13.wwww, l(0, 8, 16, 24) + mov r17.x, r13.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r13.yyyy, l(0, 10, 20, 30) + mov r17.x, r13.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r13.zzzz, l(0, 10, 20, 30) + mov r17.x, r13.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r13.wwww, l(0, 10, 20, 30) + mov r17.x, r13.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r13.yyyz, l(10, 20, 30, 30) + mov r18.x, r13.y + mov r18.yz, r17.xxyx + and r9.xzw, r18.xxyz, l(1023, 0, 1023, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r14.xyz, r9.xzwx, r18.xyzx, l(0,0,0,0) + utof r9.xz, r17.zzwz + ushr r17.xyzw, r13.zwwz, l(10, 10, 20, 20) + mov r18.x, r13.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r9.xz, r9.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r17.x, r13.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r13.wxxx, l(30, 10, 20, 30) + utof r10.zw, r17.xxxw + mov r17.x, r13.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r14.w, r9.x + mov r15.w, r9.z + mov r16.w, r10.z + mov r13.w, r10.w + break + case l(4) + ishl r17.xyzw, r13.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r13.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.yz, r17.zzwz + ishr r17.xyzw, r13.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r13.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r13.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r13.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r13.w + f16tof32 r16.y, r17.z + f16tof32 r13.x, r13.x + f16tof32 r13.y, r17.w + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r13.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r13.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r13.w + mov r16.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r6.xyzw, r14.xyzw + add r15.xyzw, r7.xyzw, r15.xyzw + add r16.xyzw, r8.xyzw, r16.xyzw + add r13.xyzw, r5.xyzw, r13.xyzw + ld_raw r9.xyzw, r9.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r20.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r20.x, r9.y + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r20.x, r9.z + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r9.wwww, l(0, 8, 16, 24) + mov r20.x, r9.w + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r20.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r9.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r20.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r20.x, r9.y + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r20.x, r9.z + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r9.wwww, l(0, 10, 20, 30) + mov r20.x, r9.w + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r9.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r20.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r21.x, r9.y + mov r21.yz, r20.xxyx + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + utof r10.zw, r20.zzzw + ushr r20.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r21.x, r9.z + mov r21.yz, r20.xxwx + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r18.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r20.x, r9.w + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r19.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + ushr r20.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r11.zw, r20.xxxw + mov r20.x, r9.x + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r9.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r17.w, r10.z + mov r18.w, r10.w + mov r19.w, r11.z + mov r9.w, r11.w + break + case l(4) + ishl r20.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r21.xz, r20.xxyx + mov r21.yw, r9.yyyz + ishr r21.xyzw, r21.xyzw, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r18.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r20.zzwz + ishr r20.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r19.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r20.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r17.x, r9.y + f16tof32 r17.y, r20.x + f16tof32 r18.x, r9.z + f16tof32 r18.y, r20.y + f16tof32 r19.x, r9.w + f16tof32 r19.y, r20.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r20.w + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r17.x, r9.y + mov r17.yzw, l(0,0,0,0) + mov r18.x, r9.z + mov r18.yzw, l(0,0,0,0) + mov r19.x, r9.w + mov r19.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r14.xyzw, r17.xyzw + add r7.xyzw, r15.xyzw, r18.xyzw + add r8.xyzw, r16.xyzw, r19.xyzw + add r5.xyzw, r9.xyzw, r13.xyzw + endif +else + mov r2.x, r0.y +endif +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xyzw +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r5.xyzw, r2.xxxx, r5.xyzw +if_nz r2.z + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r5.xz, r5.zzxz +endif +switch r3.x + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.z, r13.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.w, r13.w, l(0x00008000), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.x, r13.w, l(0x00008000), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.y, r13.w, l(0x00008000), r2.x + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r13.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.z, r13.z, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r13.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.w, r13.z, l(2048), r2.x + mov_sat r8.xyz, r8.xyzx + mad r13.xyz, r8.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.x, r13.z, l(2048), r2.x + mov_sat r5.xyz, r5.xyzx + mad r13.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.y, r13.z, l(2048), r2.x + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r13.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.z, r13.z, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r13.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.w, r13.z, l(1024), r2.x + mov_sat r8.xyz, r8.xyzx + mad r13.xyz, r8.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.x, r13.z, l(1024), r2.x + mov_sat r5.xyz, r5.xyzx + mad r13.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.y, r13.z, l(1024), r2.x + break + case l(10) + mov_sat r6.xy, r6.xyxx + mad r2.xw, r6.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.z, r2.w, l(256), r2.x + mov_sat r7.xy, r7.xyxx + mad r2.xw, r7.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.w, r2.w, l(256), r2.x + mov_sat r8.xy, r8.xyxx + mad r2.xw, r8.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.x, r2.w, l(256), r2.x + mov_sat r5.xy, r5.xyxx + mad r2.xw, r5.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.y, r2.w, l(256), r2.x + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.z, r13.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.w, r13.w, l(4096), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.x, r13.w, l(4096), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.y, r13.w, l(4096), r2.x + break + case l(24) + mov_sat r6.x, r6.x + mad r2.x, r6.x, l(65535.000000), l(0.500000) + ftou r9.z, r2.x + mov_sat r7.x, r7.x + mad r2.x, r7.x, l(65535.000000), l(0.500000) + ftou r9.w, r2.x + mov_sat r8.x, r8.x + mad r2.x, r8.x, l(65535.000000), l(0.500000) + ftou r9.x, r2.x + mov_sat r5.x, r5.x + mad r2.x, r5.x, l(65535.000000), l(0.500000) + ftou r9.y, r2.x + break + default + f32tof16 r9.z, r6.x + f32tof16 r9.w, r7.x + f32tof16 r9.x, r8.x + f32tof16 r9.y, r5.x + break +endswitch +if_nz r1.y + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r9.zwxy, l(0, 0, 0, 0) + ushr r6.xyzw, r9.zwxy, l(8, 8, 8, 8) + iadd r9.xyzw, r5.zwxy, r6.zwxy + mov r10.y, r9.z + mov r12.y, r9.w +else + mov r10.y, r9.z + mov r12.y, r9.w +endif +if_nz r0.w + mov r3.yz, r10.xxyx + mov r11.y, r12.x +endif +imad r5.xyzw, r3.yzyy, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyxx +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +imad r5.xyzw, r12.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.xyxx +store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyzw +imad r5.xzw, r9.yyyy, l(0x00010000, 0, 0x00010000, 0x00010000), r9.xxxx +iadd r0.x, r0.z, r0.x +ld_raw r6.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r7.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.wwww, l(0, 8, 16, 24) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.wwww, l(0, 10, 20, 30) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r4.x, r6.y + mov r4.yz, r11.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r12.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r14.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r13.xyzx, r12.xyzx, r4.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r12.xyzx, r4.xyzx + movc r8.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r11.zzwz + ushr r11.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r4.x, r6.z + mov r4.yz, r11.xxwx + and r12.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r15.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r14.xyzx, r13.xyzx, r4.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r13.xyzx, r4.xyzx + movc r9.xyz, r12.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r11.x, r6.w + and r4.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r14.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r13.xyzx, r12.xyzx, r11.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r10.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r4.xy, r11.xwxx + mov r11.x, r6.x + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r6.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r11.xyz, r7.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r7.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r14.xyzx, r7.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r13.xyzx, r12.xyzx, r14.xyzx + ishl r13.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r7.xyz, r11.xyzx, r12.xyzx, l(0,0,0,0) + utof r2.x, r7.w + mul r7.w, r2.x, l(0.333333) + mov r8.w, r3.y + mov r9.w, r3.z + mov r10.w, r4.x + mov r6.w, r4.y + break + case l(4) + ishl r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r12.xz, r11.xxyx + mov r12.yw, r6.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r11.zzwz + ishr r11.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r7.y, r7.x, l(16) + ishr r3.yz, r7.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r7.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r8.x, r6.y + f16tof32 r8.y, r11.x + f16tof32 r9.x, r6.z + f16tof32 r9.y, r11.y + f16tof32 r10.x, r6.w + f16tof32 r10.y, r11.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r11.w + ushr r2.x, r7.x, l(16) + f16tof32 r7.x, r7.x + f16tof32 r7.y, r2.x + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + default + mov r8.x, r6.y + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.z + mov r9.yzw, l(0,0,0,0) + mov r10.x, r6.w + mov r10.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + mov r7.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.x, r0.y, l(0.500000) + iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) + ld_raw r11.xyzw, r3.y, T0[0].wxyz + ld_raw r12.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r4.x, r11.y + mov r4.yz, r16.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r19.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r18.xyzx, r17.xyzx, r4.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r17.xyzx, r4.xyzx + movc r13.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r16.zzwz + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r4.x, r11.z + mov r4.yz, r16.xxwx + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r16.x, r11.w + and r4.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r15.xyz, r4.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r4.xy, r16.xwxx + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx + ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) + utof r3.w, r12.w + mul r12.w, r3.w, l(0.333333) + mov r13.w, r3.y + mov r14.w, r3.z + mov r15.w, r4.x + mov r11.w, r4.y + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + ushr r3.y, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r3.y + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r13.xyzw + add r9.xyzw, r9.xyzw, r14.xyzw + add r10.xyzw, r10.xyzw, r15.xyzw + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.x, r0.y, l(0.250000) + iadd r11.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r12.xyzw, r11.x, T0[0].wxyz + ld_raw r13.x, r11.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r4.x, r12.y + mov r4.yz, r17.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r17.zzwz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r4.x, r12.z + mov r4.yz, r17.xxwx + and r18.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r21.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r20.xyzx, r19.xyzx, r4.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r19.xyzx, r4.xyzx + movc r15.xyz, r18.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r12.w + and r4.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r16.xyz, r4.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r4.xy, r17.xwxx + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r3.w, r13.w + mul r13.w, r3.w, l(0.333333) + mov r14.w, r3.y + mov r15.w, r3.z + mov r16.w, r4.x + mov r12.w, r4.y + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r3.y, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r3.y + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r8.xyzw, r14.xyzw + add r15.xyzw, r9.xyzw, r15.xyzw + add r16.xyzw, r10.xyzw, r16.xyzw + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + ld_raw r17.xyzw, r11.z, T0[0].wxyz + ld_raw r11.x, r11.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) + mov r4.x, r17.y + mov r4.yz, r21.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r22.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r24.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r23.xyzx, r22.xyzx, r4.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r22.xyzx, r4.xyzx + movc r18.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r21.zzwz + ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) + mov r4.x, r17.z + mov r4.yz, r21.xxwx + and r22.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r25.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r24.xyzx, r23.xyzx, r4.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r23.xyzx, r4.xyzx + movc r19.xyz, r22.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r21.x, r17.w + and r4.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r24.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r23.xyzx, r22.xyzx, r21.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r20.xyz, r4.xyzx, r21.xyzx, l(0,0,0,0) + ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) + utof r4.xy, r21.xwxx + mov r21.x, r17.x + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r24.xyz, r24.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx + ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r11.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) + utof r3.w, r11.w + mul r11.w, r3.w, l(0.333333) + mov r18.w, r3.y + mov r19.w, r3.z + mov r20.w, r4.x + mov r17.w, r4.y + break + case l(4) + ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + mov r22.xz, r21.xxyx + mov r22.yw, r17.yyyz + ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.yz, r21.zzwz + ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + f16tof32 r18.x, r17.y + f16tof32 r18.y, r21.x + f16tof32 r19.x, r17.z + f16tof32 r19.y, r21.y + f16tof32 r20.x, r17.w + f16tof32 r20.y, r21.z + f16tof32 r17.x, r17.x + f16tof32 r17.y, r21.w + ushr r3.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.y + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r18.x, r17.y + mov r18.yzw, l(0,0,0,0) + mov r19.x, r17.z + mov r19.yzw, l(0,0,0,0) + mov r20.x, r17.w + mov r20.yzw, l(0,0,0,0) + mov r17.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r14.xyzw, r18.xyzw + add r9.xyzw, r15.xyzw, r19.xyzw + add r10.xyzw, r16.xyzw, r20.xyzw + add r6.xyzw, r12.xyzw, r17.xyzw + add r7.xyzw, r11.xyzw, r13.xyzw + endif +else + mov r2.x, r0.y +endif +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r9.xyzw, r2.xxxx, r9.xyzw +mul r10.xyzw, r2.xxxx, r10.xyzw +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xyzw +if_nz r2.z + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r10.xz, r10.zzxz + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz +endif +switch r3.x + case l(3) + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.y, r12.w, l(0x00008000), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.x, r12.w, l(0x00008000), r2.x + mov_sat r10.xyzw, r10.xyzw + mad r12.xyzw, r10.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.z, r12.w, l(0x00008000), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.w, r12.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r4.y, r12.w, l(0x00008000), r2.x + break + case l(4) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.y, r3.w, l(2048), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.x, r3.w, l(2048), r2.x + mov_sat r10.xyz, r10.xyzx + mad r3.yzw, r10.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.z, r3.w, l(2048), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.w, r3.w, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r4.y, r3.w, l(2048), r2.x + break + case l(5) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.y, r3.w, l(1024), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.x, r3.w, l(1024), r2.x + mov_sat r10.xyz, r10.xyzx + mad r3.yzw, r10.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.z, r3.w, l(1024), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.w, r3.w, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r4.y, r3.w, l(1024), r2.x + break + case l(10) + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.y, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.x, r3.z, l(256), r3.y + mov_sat r10.xy, r10.xyxx + mad r3.yz, r10.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.z, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.w, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r4.y, r3.z, l(256), r3.y + break + case l(15) + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.y, r12.w, l(4096), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.x, r12.w, l(4096), r2.x + mov_sat r10.xyzw, r10.xyzw + mad r12.xyzw, r10.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.z, r12.w, l(4096), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.w, r12.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r4.y, r12.w, l(4096), r2.x + break + case l(24) + mov_sat r8.x, r8.x + mad r2.x, r8.x, l(65535.000000), l(0.500000) + ftou r11.y, r2.x + mov_sat r9.x, r9.x + mad r2.x, r9.x, l(65535.000000), l(0.500000) + ftou r11.x, r2.x + mov_sat r10.x, r10.x + mad r2.x, r10.x, l(65535.000000), l(0.500000) + ftou r11.z, r2.x + mov_sat r6.x, r6.x + mad r2.x, r6.x, l(65535.000000), l(0.500000) + ftou r11.w, r2.x + mov_sat r7.x, r7.x + mad r2.x, r7.x, l(65535.000000), l(0.500000) + ftou r4.y, r2.x + break + default + f32tof16 r11.y, r8.x + f32tof16 r11.x, r9.x + f32tof16 r11.z, r10.x + f32tof16 r11.w, r6.x + f32tof16 r4.y, r7.x + break +endswitch +if_nz r1.y + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.yxzw, l(0, 0, 0, 0) + ushr r7.xyzw, r11.yxzw, l(8, 8, 8, 8) + iadd r11.xyzw, r6.yxzw, r7.yxzw + bfi r2.x, l(8), l(8), r4.y, l(0) + ushr r3.y, r4.y, l(8) + iadd r4.y, r2.x, r3.y + mov r2.x, r11.y + mov r4.x, r11.z +else + mov r2.x, r11.y + mov r4.x, r11.z +endif +ld_raw r6.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r10.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r10.x, r6.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r10.x, r6.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r6.wwww, l(0, 8, 16, 24) + mov r10.x, r6.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r10.x, r6.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r10.x, r6.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r6.wwww, l(0, 10, 20, 30) + mov r10.x, r6.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r12.x, r6.y + mov r12.yz, r10.xxyx + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r7.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + utof r3.yz, r10.zzwz + ushr r10.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r12.x, r6.z + mov r12.yz, r10.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r10.x, r6.w + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r9.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r12.xy, r10.xwxx + mov r10.x, r6.x + and r13.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r16.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r15.xyzx, r14.xyzx, r10.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r14.xyzx, r10.xyzx + movc r6.xyz, r13.xyzx, r10.xyzx, l(0,0,0,0) + mul r10.xy, r12.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r7.w, r3.y + mov r8.w, r3.z + mov r9.w, r10.x + mov r6.w, r10.y + break + case l(4) + ishl r10.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r12.xz, r10.xxyx + mov r12.yw, r6.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r10.zzwz + ishr r10.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r10.x + f16tof32 r8.x, r6.z + f16tof32 r8.y, r10.y + f16tof32 r9.x, r6.w + f16tof32 r9.y, r10.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r10.w + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r6.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.w + mov r9.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.w, r0.y, l(0.500000) + iadd r3.y, r0.x, l(2900) + ld_raw r10.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r16.xy, r15.xwxx + mov r15.x, r10.x + and r17.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r20.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r19.xyzx, r18.xyzx, r15.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r18.xyzx, r15.xyzx + movc r10.xyz, r17.xyzx, r15.xyzx, l(0,0,0,0) + mul r15.xy, r16.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r15.x + mov r10.w, r15.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r9.xyzw, r9.xyzw, r14.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.w, r0.y, l(0.250000) + iadd r3.yz, r0.xxxx, l(0, 56, 2936, 0) + ld_raw r10.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.yw, r15.zzzw + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yw, r3.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r16.xy, r15.xwxx + mov r15.x, r10.x + and r17.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r20.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r19.xyzx, r18.xyzx, r15.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r18.xyzx, r15.xyzx + movc r10.xyz, r17.xyzx, r15.xyzx, l(0,0,0,0) + mul r15.xy, r16.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r12.w, r3.y + mov r13.w, r3.w + mov r14.w, r15.x + mov r10.w, r15.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r8.xyzw, r13.xyzw + add r14.xyzw, r9.xyzw, r14.xyzw + add r10.xyzw, r6.xyzw, r10.xyzw + ld_raw r15.xyzw, r3.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r12.xyzw, r16.xyzw + add r8.xyzw, r13.xyzw, r17.xyzw + add r9.xyzw, r14.xyzw, r18.xyzw + add r6.xyzw, r10.xyzw, r15.xyzw + endif +else + mov r2.w, r0.y +endif +mul r7.xyzw, r2.wwww, r7.xyzw +mul r8.xyzw, r2.wwww, r8.xyzw +mul r9.xyzw, r2.wwww, r9.xyzw +mul r6.xyzw, r2.wwww, r6.xyzw +if_nz r2.z + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r6.xz, r6.zzxz +endif +switch r3.x + case l(3) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.w, r12.w, l(0x00008000), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.x, r12.w, l(0x00008000), r2.w + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.y, r12.w, l(0x00008000), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.z, r12.w, l(0x00008000), r2.w + break + case l(4) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.w, r3.w, l(2048), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.x, r3.w, l(2048), r2.w + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.y, r3.w, l(2048), r2.w + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.z, r3.w, l(2048), r2.w + break + case l(5) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.w, r3.w, l(1024), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.x, r3.w, l(1024), r2.w + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.y, r3.w, l(1024), r2.w + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.z, r3.w, l(1024), r2.w + break + case l(10) + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.w, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.x, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.y, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.z, r3.z, l(256), r3.y + break + case l(15) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.w, r12.w, l(4096), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.x, r12.w, l(4096), r2.w + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.y, r12.w, l(4096), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.z, r12.w, l(4096), r2.w + break + case l(24) + mov_sat r7.x, r7.x + mad r2.w, r7.x, l(65535.000000), l(0.500000) + ftou r10.w, r2.w + mov_sat r8.x, r8.x + mad r2.w, r8.x, l(65535.000000), l(0.500000) + ftou r10.x, r2.w + mov_sat r9.x, r9.x + mad r2.w, r9.x, l(65535.000000), l(0.500000) + ftou r10.y, r2.w + mov_sat r6.x, r6.x + mad r2.w, r6.x, l(65535.000000), l(0.500000) + ftou r10.z, r2.w + break + default + f32tof16 r10.w, r7.x + f32tof16 r10.x, r8.x + f32tof16 r10.y, r9.x + f32tof16 r10.z, r6.x + break +endswitch +if_nz r1.y + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.wxyz, l(0, 0, 0, 0) + ushr r7.xyzw, r10.wxyz, l(8, 8, 8, 8) + iadd r10.xyzw, r6.yzwx, r7.yzwx + mov r11.y, r10.w +else + mov r11.y, r10.w +endif +if_nz r0.w + mov r2.x, r11.w + mov r11.x, r4.y + mov r4.x, r11.y +endif +imad r5.y, r11.x, l(0x00010000), r2.x +store_uav_typed U0[0].xyzw, r4.wwww, r5.xyzw +iadd r5.xyzw, r1.xxxx, l(5, 6, 7, 8) +imad r4.xyzw, r11.wyww, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r4.xyxx +store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw +imad r4.xzw, r10.yyyy, l(0x00010000, 0, 0x00010000, 0x00010000), r10.xxxx +iadd r0.x, r0.z, r0.x +ld_raw r6.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r7.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r12.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r12.x, r6.y + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r8.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r12.x, r6.z + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r9.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r6.wwww, l(0, 8, 16, 24) + mov r12.x, r6.w + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r12.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r6.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) + and r12.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r7.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r12.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r12.x, r6.y + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r8.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r12.x, r6.z + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r9.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r6.wwww, l(0, 10, 20, 30) + mov r12.x, r6.w + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r12.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r6.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r12.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r7.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r12.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r13.x, r6.y + mov r13.yz, r12.xxyx + and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r13.xyxz, l(127, 127, 0, 127) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r15.xyz, r10.xywx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r10.xywx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r15.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r14.xyxz, r10.xyxw, r13.xyxz + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r13.xyxz, r10.xyxw + movc r8.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r12.zzwz + ushr r12.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r13.x, r6.z + mov r13.yz, r12.xxwx + and r10.xyw, r13.xyxz, l(1023, 1023, 0, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r9.xyz, r10.xywx, r13.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r12.x, r6.w + and r10.xyw, r12.xyxz, l(1023, 1023, 0, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r11.xyz, r10.xywx, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r10.xy, r12.xwxx + mov r12.x, r6.x + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r6.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r12.xyz, r7.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r7.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r15.xyzx, r7.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r14.xyzx, r13.xyzx, r15.xyzx + ishl r14.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r7.xyz, r12.xyzx, r13.xyzx, l(0,0,0,0) + utof r0.z, r7.w + mul r7.w, r0.z, l(0.333333) + mov r8.w, r3.y + mov r9.w, r3.z + mov r11.w, r10.x + mov r6.w, r10.y + break + case l(4) + ishl r12.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r6.yyyz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r12.zzwz + ishr r12.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r7.y, r7.x, l(16) + ishr r3.yz, r7.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r7.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + case l(6) + ushr r12.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r8.x, r6.y + f16tof32 r8.y, r12.x + f16tof32 r9.x, r6.z + f16tof32 r9.y, r12.y + f16tof32 r11.x, r6.w + f16tof32 r11.y, r12.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r12.w + ushr r0.z, r7.x, l(16) + f16tof32 r7.x, r7.x + f16tof32 r7.y, r0.z + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + default + mov r8.x, r6.y + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.z + mov r9.yzw, l(0,0,0,0) + mov r11.x, r6.w + mov r11.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + mov r7.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r0.y, l(0.500000) + iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) + ld_raw r12.xyzw, r3.y, T0[0].wxyz + ld_raw r13.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r18.x, r12.y + mov r18.yz, r17.xxyx + and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r18.xyxz, l(127, 127, 0, 127) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r20.xyz, r10.xywx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r10.xywx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r20.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r19.xyxz, r10.xyxw, r18.xyxz + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r18.xyxz, r10.xyxw + movc r14.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r17.zzwz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r18.x, r12.z + mov r18.yz, r17.xxwx + and r10.xyw, r18.xyxz, l(1023, 1023, 0, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r15.xyz, r10.xywx, r18.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r12.w + and r10.xyw, r17.xyxz, l(1023, 1023, 0, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r16.xyz, r10.xywx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r10.xy, r17.xwxx + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r2.x, r13.w + mul r13.w, r2.x, l(0.333333) + mov r14.w, r3.y + mov r15.w, r3.z + mov r16.w, r10.x + mov r12.w, r10.y + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r2.x, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r2.x + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r14.xyzw + add r9.xyzw, r9.xyzw, r15.xyzw + add r11.xyzw, r11.xyzw, r16.xyzw + add r6.xyzw, r6.xyzw, r12.xyzw + add r7.xyzw, r7.xyzw, r13.xyzw + uge r2.x, r2.y, l(6) + if_nz r2.x + mul r0.z, r0.y, l(0.250000) + iadd r12.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r13.xyzw, r12.x, T0[0].wxyz + ld_raw r14.x, r12.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r18.yzw, r13.yyyy, l(0, 8, 16, 24) + mov r18.x, r13.y + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r13.zzzz, l(0, 8, 16, 24) + mov r18.x, r13.z + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r13.wwww, l(0, 8, 16, 24) + mov r18.x, r13.w + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r13.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r18.yzw, r13.yyyy, l(0, 10, 20, 30) + mov r18.x, r13.y + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r13.zzzz, l(0, 10, 20, 30) + mov r18.x, r13.z + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r13.wwww, l(0, 10, 20, 30) + mov r18.x, r13.w + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r13.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r18.xyzw, r13.yyyz, l(10, 20, 30, 30) + mov r19.x, r13.y + mov r19.yz, r18.xxyx + and r3.yzw, r19.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r19.xyxz, l(127, 127, 0, 127) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r21.xyz, r10.xywx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r10.xywx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r21.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r20.xyxz, r10.xyxw, r19.xyxz + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r19.xyxz, r10.xyxw + movc r15.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r18.zzwz + ushr r18.xyzw, r13.zwwz, l(10, 10, 20, 20) + mov r19.x, r13.z + mov r19.yz, r18.xxwx + and r10.xyw, r19.xyxz, l(1023, 1023, 0, 1023) + and r20.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r20.xyzx, r19.xyzx + movc r16.xyz, r10.xywx, r19.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r18.x, r13.w + and r10.xyw, r18.xyxz, l(1023, 1023, 0, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r17.xyz, r10.xywx, r18.xyzx, l(0,0,0,0) + ushr r18.xyzw, r13.wxxx, l(30, 10, 20, 30) + utof r10.xy, r18.xwxx + mov r18.x, r13.x + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r13.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r21.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r20.xyzx, r19.xyzx, r21.xyzx + ishl r20.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r20.xyzx, r19.xyzx + movc r14.xyz, r18.xyzx, r19.xyzx, l(0,0,0,0) + utof r2.x, r14.w + mul r14.w, r2.x, l(0.333333) + mov r15.w, r3.y + mov r16.w, r3.z + mov r17.w, r10.x + mov r13.w, r10.y + break + case l(4) + ishl r18.xyzw, r13.yzwx, l(16, 16, 16, 16) + mov r19.xz, r18.xxyx + mov r19.yw, r13.yyyz + ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.yz, r18.zzwz + ishr r18.xyzw, r13.ywzx, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r14.y, r14.x, l(16) + ishr r3.yz, r14.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r14.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r18.xyzw, r13.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r13.y + f16tof32 r15.y, r18.x + f16tof32 r16.x, r13.z + f16tof32 r16.y, r18.y + f16tof32 r17.x, r13.w + f16tof32 r17.y, r18.z + f16tof32 r13.x, r13.x + f16tof32 r13.y, r18.w + ushr r2.x, r14.x, l(16) + f16tof32 r14.x, r14.x + f16tof32 r14.y, r2.x + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r13.y + mov r15.yzw, l(0,0,0,0) + mov r16.x, r13.z + mov r16.yzw, l(0,0,0,0) + mov r17.x, r13.w + mov r17.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r15.xyzw, r8.xyzw, r15.xyzw + add r16.xyzw, r9.xyzw, r16.xyzw + add r17.xyzw, r11.xyzw, r17.xyzw + add r13.xyzw, r6.xyzw, r13.xyzw + add r14.xyzw, r7.xyzw, r14.xyzw + ld_raw r18.xyzw, r12.z, T0[0].wxyz + ld_raw r12.x, r12.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r22.yzw, r18.yyyy, l(0, 8, 16, 24) + mov r22.x, r18.y + and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r19.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r22.yzw, r18.zzzz, l(0, 8, 16, 24) + mov r22.x, r18.z + and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r20.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r22.yzw, r18.wwww, l(0, 8, 16, 24) + mov r22.x, r18.w + and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r21.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r18.xxxx, l(0, 8, 16, 24) + and r22.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r18.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r22.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r12.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r22.yzw, r18.yyyy, l(0, 10, 20, 30) + mov r22.x, r18.y + and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r19.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r22.yzw, r18.zzzz, l(0, 10, 20, 30) + mov r22.x, r18.z + and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r20.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r22.yzw, r18.wwww, l(0, 10, 20, 30) + mov r22.x, r18.w + and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r21.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r18.xxxx, l(0, 10, 20, 30) + and r22.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r18.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r22.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r12.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r22.xyzw, r18.yyyz, l(10, 20, 30, 30) + mov r23.x, r18.y + mov r23.yz, r22.xxyx + and r3.yzw, r23.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r23.xyxz, l(127, 127, 0, 127) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r23.xyzx + firstbit_hi r25.xyz, r10.xywx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r10.xywx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r25.xyzx, r23.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r24.xyxz, r10.xyxw, r23.xyxz + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r23.xyxz, r10.xyxw + movc r19.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r22.zzwz + ushr r22.xyzw, r18.zwwz, l(10, 10, 20, 20) + mov r23.x, r18.z + mov r23.yz, r22.xxwx + and r10.xyw, r23.xyxz, l(1023, 1023, 0, 1023) + and r24.xyz, r23.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r23.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r26.xyzx, r23.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r23.xyz, r25.xyzx, r24.xyzx, r23.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r23.xyz, r23.xyzx, l(16, 16, 16, 0) + iadd r23.xyz, r24.xyzx, r23.xyzx + movc r20.xyz, r10.xywx, r23.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r22.x, r18.w + and r10.xyw, r22.xyxz, l(1023, 1023, 0, 1023) + and r23.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r25.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r24.xyzx, r23.xyzx, r22.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r21.xyz, r10.xywx, r22.xyzx, l(0,0,0,0) + ushr r22.xyzw, r18.wxxx, l(30, 10, 20, 30) + utof r10.xy, r22.xwxx + mov r22.x, r18.x + and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) + and r24.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r24.xyzx, r22.xyzx + movc r18.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r22.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r25.xyz, l(7, 7, 7, 0), r25.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r25.xyz, r25.xyzx, l(127, 127, 127, 0) + movc r23.xyz, r24.xyzx, r23.xyzx, r25.xyzx + ishl r24.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r23.xyz, r23.xyzx, l(16, 16, 16, 0) + iadd r23.xyz, r24.xyzx, r23.xyzx + movc r12.xyz, r22.xyzx, r23.xyzx, l(0,0,0,0) + utof r2.x, r12.w + mul r12.w, r2.x, l(0.333333) + mov r19.w, r3.y + mov r20.w, r3.z + mov r21.w, r10.x + mov r18.w, r10.y + break + case l(4) + ishl r22.xyzw, r18.yzwx, l(16, 16, 16, 16) + mov r23.xz, r22.xxyx + mov r23.yw, r18.yyyz + ishr r23.xyzw, r23.xyzw, l(16, 16, 16, 16) + itof r23.xyzw, r23.xyzw + mul r23.xyzw, r23.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r19.xy, r23.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r20.xy, r23.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.yz, r22.zzwz + ishr r22.xyzw, r18.ywzx, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r21.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r18.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r21.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r22.xyzw, r18.yzwx, l(16, 16, 16, 16) + f16tof32 r19.x, r18.y + f16tof32 r19.y, r22.x + f16tof32 r20.x, r18.z + f16tof32 r20.y, r22.y + f16tof32 r21.x, r18.w + f16tof32 r21.y, r22.z + f16tof32 r18.x, r18.x + f16tof32 r18.y, r22.w + ushr r2.x, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r2.x + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r21.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r19.x, r18.y + mov r19.yzw, l(0,0,0,0) + mov r20.x, r18.z + mov r20.yzw, l(0,0,0,0) + mov r21.x, r18.w + mov r21.yzw, l(0,0,0,0) + mov r18.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r15.xyzw, r19.xyzw + add r9.xyzw, r16.xyzw, r20.xyzw + add r11.xyzw, r17.xyzw, r21.xyzw + add r6.xyzw, r13.xyzw, r18.xyzw + add r7.xyzw, r12.xyzw, r14.xyzw + endif +else + mov r0.z, r0.y +endif +mul r8.xyzw, r0.zzzz, r8.xyzw +mul r9.xyzw, r0.zzzz, r9.xyzw +mul r11.xyzw, r0.zzzz, r11.xyzw +mul r6.xyzw, r0.zzzz, r6.xyzw +mul r7.xyzw, r0.zzzz, r7.xyzw +if_nz r2.z + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r11.xz, r11.zzxz + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz +endif +switch r3.x + case l(3) + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.x, r13.w, l(0x00008000), r0.z + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.z, r13.w, l(0x00008000), r0.z + mov_sat r11.xyzw, r11.xyzw + mad r13.xyzw, r11.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.w, r13.w, l(0x00008000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.y, r13.w, l(0x00008000), r0.z + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r10.y, r13.w, l(0x00008000), r0.z + break + case l(4) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.x, r3.w, l(2048), r0.z + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.z, r3.w, l(2048), r0.z + mov_sat r11.xyz, r11.xyzx + mad r3.yzw, r11.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.w, r3.w, l(2048), r0.z + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.y, r3.w, l(2048), r0.z + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r10.y, r3.w, l(2048), r0.z + break + case l(5) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.x, r3.w, l(1024), r0.z + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.z, r3.w, l(1024), r0.z + mov_sat r11.xyz, r11.xyzx + mad r3.yzw, r11.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.w, r3.w, l(1024), r0.z + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.y, r3.w, l(1024), r0.z + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r10.y, r3.w, l(1024), r0.z + break + case l(10) + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.x, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.z, r3.z, l(256), r3.y + mov_sat r11.xy, r11.xyxx + mad r3.yz, r11.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.w, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.y, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.y, r3.z, l(256), r3.y + break + case l(15) + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.x, r13.w, l(4096), r0.z + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.z, r13.w, l(4096), r0.z + mov_sat r11.xyzw, r11.xyzw + mad r13.xyzw, r11.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.w, r13.w, l(4096), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.y, r13.w, l(4096), r0.z + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r10.y, r13.w, l(4096), r0.z + break + case l(24) + mov_sat r8.x, r8.x + mad r0.z, r8.x, l(65535.000000), l(0.500000) + ftou r12.x, r0.z + mov_sat r9.x, r9.x + mad r0.z, r9.x, l(65535.000000), l(0.500000) + ftou r12.z, r0.z + mov_sat r11.x, r11.x + mad r0.z, r11.x, l(65535.000000), l(0.500000) + ftou r12.w, r0.z + mov_sat r6.x, r6.x + mad r0.z, r6.x, l(65535.000000), l(0.500000) + ftou r12.y, r0.z + mov_sat r7.x, r7.x + mad r0.z, r7.x, l(65535.000000), l(0.500000) + ftou r10.y, r0.z + break + default + f32tof16 r12.x, r8.x + f32tof16 r12.z, r9.x + f32tof16 r12.w, r11.x + f32tof16 r12.y, r6.x + f32tof16 r10.y, r7.x + break +endswitch +if_nz r1.y + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r12.xzwy, l(0, 0, 0, 0) + ushr r7.xyzw, r12.xzwy, l(8, 8, 8, 8) + iadd r12.xyzw, r6.xwyz, r7.xwyz + bfi r0.z, l(8), l(8), r10.y, l(0) + ushr r2.x, r10.y, l(8) + iadd r10.y, r0.z, r2.x + mov r0.z, r12.x + mov r10.x, r12.w + mov r12.xy, r12.zyzz +else + mov r0.z, r12.x + mov r10.x, r12.w + mov r12.xy, r12.zyzz +endif +ld_raw r6.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.wwww, l(0, 8, 16, 24) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.wwww, l(0, 10, 20, 30) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r13.x, r6.y + mov r13.yz, r11.xxyx + and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r7.xyz, r3.yzwy, r13.xyzx, l(0,0,0,0) + utof r2.xw, r11.zzzw + ushr r11.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r13.x, r6.z + mov r13.yz, r11.xxwx + and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r8.xyz, r3.yzwy, r13.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r11.x, r6.w + and r3.yzw, r11.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r9.xyz, r3.yzwy, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r3.yz, r11.xxwx + mov r11.x, r6.x + and r13.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r16.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r15.xyzx, r14.xyzx, r11.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r14.xyzx, r11.xyzx + movc r6.xyz, r13.xyzx, r11.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r7.w, r2.x + mov r8.w, r2.w + mov r9.w, r3.y + mov r6.w, r3.z + break + case l(4) + ishl r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r13.xz, r11.xxyx + mov r13.yw, r6.yyyz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r11.zzwz + ishr r11.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r11.x + f16tof32 r8.x, r6.z + f16tof32 r8.y, r11.y + f16tof32 r9.x, r6.w + f16tof32 r9.y, r11.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r11.w + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r6.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.w + mov r9.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.w, r0.y, l(0.500000) + iadd r2.x, r0.x, l(2900) + ld_raw r11.xyzw, r2.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r17.x, r11.y + mov r17.yz, r16.xxyx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + utof r2.xw, r16.zzzw + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r17.x, r11.z + mov r17.yz, r16.xxwx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r14.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r16.x, r11.w + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r15.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r3.yz, r16.xxwx + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r2.x + mov r14.w, r2.w + mov r15.w, r3.y + mov r11.w, r3.z + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r9.xyzw, r9.xyzw, r15.xyzw + add r6.xyzw, r6.xyzw, r11.xyzw + uge r2.x, r2.y, l(6) + if_nz r2.x + mul r0.y, r0.y, l(0.250000) + iadd r2.xy, r0.xxxx, l(56, 2936, 0, 0) + ld_raw r11.xyzw, r2.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r17.x, r11.y + mov r17.yz, r16.xxyx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + utof r2.xw, r16.zzzw + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r17.x, r11.z + mov r17.yz, r16.xxwx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r14.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r16.x, r11.w + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r15.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r3.yz, r16.xxwx + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r2.x + mov r14.w, r2.w + mov r15.w, r3.y + mov r11.w, r3.z + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r15.xyzw, r9.xyzw, r15.xyzw + add r11.xyzw, r6.xyzw, r11.xyzw + ld_raw r16.xyzw, r2.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r20.yzw, r16.yyyy, l(0, 8, 16, 24) + mov r20.x, r16.y + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r16.zzzz, l(0, 8, 16, 24) + mov r20.x, r16.z + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r16.wwww, l(0, 8, 16, 24) + mov r20.x, r16.w + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r16.xxxx, l(0, 8, 16, 24) + and r20.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r16.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r20.yzw, r16.yyyy, l(0, 10, 20, 30) + mov r20.x, r16.y + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r16.zzzz, l(0, 10, 20, 30) + mov r20.x, r16.z + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r16.wwww, l(0, 10, 20, 30) + mov r20.x, r16.w + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r16.xxxx, l(0, 10, 20, 30) + and r20.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r16.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r20.xyzw, r16.yyyz, l(10, 20, 30, 30) + mov r21.x, r16.y + mov r21.yz, r20.xxyx + and r2.xyw, r21.xyxz, l(1023, 1023, 0, 1023) + and r3.yzw, r21.xxyz, l(0, 127, 127, 127) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r23.xyz, r3.yzwy + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r3.yzwy, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r23.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r3.yzw, r22.xxyz, r3.yyzw, r21.xxyz + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.yzw, r3.yyzw, l(0, 16, 16, 16) + iadd r3.yzw, r21.xxyz, r3.yyzw + movc r17.xyz, r2.xywx, r3.yzwy, l(0,0,0,0) + utof r2.xy, r20.zwzz + ushr r20.xyzw, r16.zwwz, l(10, 10, 20, 20) + mov r21.x, r16.z + mov r21.yz, r20.xxwx + and r3.yzw, r21.xxyz, l(0, 1023, 1023, 1023) + and r22.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r24.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r23.xyzx, r22.xyzx, r21.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r18.xyz, r3.yzwy, r21.xyzx, l(0,0,0,0) + mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r20.x, r16.w + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r19.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + ushr r20.xyzw, r16.wxxx, l(30, 10, 20, 30) + utof r3.yz, r20.xxwx + mov r20.x, r16.x + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r16.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.w, r2.x + mov r18.w, r2.y + mov r19.w, r3.y + mov r16.w, r3.z + break + case l(4) + ishl r20.xyzw, r16.yzwx, l(16, 16, 16, 16) + mov r21.xz, r20.xxyx + mov r21.yw, r16.yyyz + ishr r21.xyzw, r21.xyzw, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r18.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.yz, r20.zzwz + ishr r20.xyzw, r16.ywzx, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r19.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + break + case l(6) + ushr r20.xyzw, r16.yzwx, l(16, 16, 16, 16) + f16tof32 r17.x, r16.y + f16tof32 r17.y, r20.x + f16tof32 r18.x, r16.z + f16tof32 r18.y, r20.y + f16tof32 r19.x, r16.w + f16tof32 r19.y, r20.z + f16tof32 r16.x, r16.x + f16tof32 r16.y, r20.w + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + break + default + mov r17.x, r16.y + mov r17.yzw, l(0,0,0,0) + mov r18.x, r16.z + mov r18.yzw, l(0,0,0,0) + mov r19.x, r16.w + mov r19.yzw, l(0,0,0,0) + mov r16.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r9.xyzw, r15.xyzw, r19.xyzw + add r6.xyzw, r11.xyzw, r16.xyzw + else + mov r0.y, r1.w + endif +endif +mul r7.xyzw, r0.yyyy, r7.xyzw +mul r8.xyzw, r0.yyyy, r8.xyzw +mul r9.xyzw, r0.yyyy, r9.xyzw +mul r6.xyzw, r0.yyyy, r6.xyzw +if_nz r2.z + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r6.xz, r6.zzxz +endif +switch r3.x + case l(3) + mov_sat r7.xyzw, r7.xyzw + mad r3.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(32), r3.x + imad r0.x, r3.z, l(1024), r0.x + imad r2.x, r3.w, l(0x00008000), r0.x + mov_sat r8.xyzw, r8.xyzw + mad r3.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(32), r3.x + imad r0.x, r3.z, l(1024), r0.x + imad r2.z, r3.w, l(0x00008000), r0.x + mov_sat r9.xyzw, r9.xyzw + mad r3.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(32), r3.x + imad r0.x, r3.z, l(1024), r0.x + imad r2.y, r3.w, l(0x00008000), r0.x + mov_sat r6.xyzw, r6.xyzw + mad r3.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(32), r3.x + imad r0.x, r3.z, l(1024), r0.x + imad r2.w, r3.w, l(0x00008000), r0.x + break + case l(4) + mov_sat r7.xyz, r7.xyzx + mad r3.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.x, r3.z, l(2048), r0.x + mov_sat r8.xyz, r8.xyzx + mad r3.xyz, r8.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.z, r3.z, l(2048), r0.x + mov_sat r9.xyz, r9.xyzx + mad r3.xyz, r9.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.y, r3.z, l(2048), r0.x + mov_sat r6.xyz, r6.xyzx + mad r3.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.w, r3.z, l(2048), r0.x + break + case l(5) + mov_sat r7.xyz, r7.xyzx + mad r3.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.x, r3.z, l(1024), r0.x + mov_sat r8.xyz, r8.xyzx + mad r3.xyz, r8.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.z, r3.z, l(1024), r0.x + mov_sat r9.xyz, r9.xyzx + mad r3.xyz, r9.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.y, r3.z, l(1024), r0.x + mov_sat r6.xyz, r6.xyzx + mad r3.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r3.xyz, r3.xyzx + imad r0.x, r3.y, l(32), r3.x + imad r2.w, r3.z, l(1024), r0.x + break + case l(10) + mov_sat r7.xy, r7.xyxx + mad r0.xy, r7.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.x, r0.y, l(256), r0.x + mov_sat r8.xy, r8.xyxx + mad r0.xy, r8.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.z, r0.y, l(256), r0.x + mov_sat r9.xy, r9.xyxx + mad r0.xy, r9.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.y, r0.y, l(256), r0.x + mov_sat r6.xy, r6.xyxx + mad r0.xy, r6.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.w, r0.y, l(256), r0.x + break + case l(15) + mov_sat r7.xyzw, r7.xyzw + mad r3.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(16), r3.x + imad r0.x, r3.z, l(256), r0.x + imad r2.x, r3.w, l(4096), r0.x + mov_sat r8.xyzw, r8.xyzw + mad r3.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(16), r3.x + imad r0.x, r3.z, l(256), r0.x + imad r2.z, r3.w, l(4096), r0.x + mov_sat r9.xyzw, r9.xyzw + mad r3.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(16), r3.x + imad r0.x, r3.z, l(256), r0.x + imad r2.y, r3.w, l(4096), r0.x + mov_sat r6.xyzw, r6.xyzw + mad r3.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r0.x, r3.y, l(16), r3.x + imad r0.x, r3.z, l(256), r0.x + imad r2.w, r3.w, l(4096), r0.x + break + case l(24) + mov_sat r7.x, r7.x + mad r0.x, r7.x, l(65535.000000), l(0.500000) + ftou r2.x, r0.x + mov_sat r8.x, r8.x + mad r0.x, r8.x, l(65535.000000), l(0.500000) + ftou r2.z, r0.x + mov_sat r9.x, r9.x + mad r0.x, r9.x, l(65535.000000), l(0.500000) + ftou r2.y, r0.x + mov_sat r6.x, r6.x + mad r0.x, r6.x, l(65535.000000), l(0.500000) + ftou r2.w, r0.x + break + default + f32tof16 r2.x, r7.x + f32tof16 r2.z, r8.x + f32tof16 r2.y, r9.x + f32tof16 r2.w, r6.x + break +endswitch +if_nz r1.y + bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r2.xzyw, l(0, 0, 0, 0) + ushr r6.xyzw, r2.xzyw, l(8, 8, 8, 8) + iadd r2.xyzw, r3.xzyw, r6.xzyw +endif +if_nz r0.w + mov r0.z, r12.y + mov r12.x, r10.y + mov r10.x, r2.x +endif +imad r4.y, r0.z, l(0x00010000), r10.z +store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw +imad r0.xyzw, r10.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r12.xyxx +store_uav_typed U0[0].xyzw, r5.zzzz, r0.xyzw +imad r0.xyzw, r2.zwzz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r2.xyxx +store_uav_typed U0[0].xyzw, r5.wwww, r0.xyzw +ret +// Approximately 7971 instruction slots used +#endif + +const BYTE resolve_full_16bpp_from_32bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 170, 245, + 83, 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7, 0, 0, 0, 50, 0, + 0, 9, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 7, 0, 0, 0, + 1, 64, 0, 0, 0, 255, + 127, 71, 1, 64, 0, 0, + 0, 0, 0, 63, 28, 0, + 0, 5, 18, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 54, 32, 0, 5, 18, 0, + 16, 0, 8, 0, 0, 0, + 10, 0, 16, 0, 8, 0, + 0, 0, 50, 0, 0, 9, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 8, 0, 0, 0, 1, 64, + 0, 0, 0, 255, 127, 71, + 1, 64, 0, 0, 0, 0, + 0, 63, 28, 0, 0, 5, + 66, 0, 16, 0, 2, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 54, 32, + 0, 5, 18, 0, 16, 0, + 9, 0, 0, 0, 10, 0, + 16, 0, 9, 0, 0, 0, + 50, 0, 0, 9, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 9, 0, + 0, 0, 1, 64, 0, 0, + 0, 255, 127, 71, 1, 64, + 0, 0, 0, 0, 0, 63, + 28, 0, 0, 5, 34, 0, + 16, 0, 2, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 54, 32, 0, 5, + 18, 0, 16, 0, 6, 0, + 0, 0, 10, 0, 16, 0, + 6, 0, 0, 0, 50, 0, + 0, 9, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 6, 0, 0, 0, + 1, 64, 0, 0, 0, 255, + 127, 71, 1, 64, 0, 0, + 0, 0, 0, 63, 28, 0, + 0, 5, 130, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 2, 0, 0, 1, 10, 0, + 0, 1, 130, 0, 0, 5, + 18, 0, 16, 0, 2, 0, + 0, 0, 10, 0, 16, 0, + 7, 0, 0, 0, 130, 0, + 0, 5, 66, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 8, 0, 0, 0, + 130, 0, 0, 5, 34, 0, + 16, 0, 2, 0, 0, 0, + 10, 0, 16, 0, 9, 0, + 0, 0, 130, 0, 0, 5, + 130, 0, 16, 0, 2, 0, + 0, 0, 10, 0, 16, 0, + 6, 0, 0, 0, 2, 0, + 0, 1, 23, 0, 0, 1, + 31, 0, 4, 3, 26, 0, + 16, 0, 1, 0, 0, 0, + 140, 0, 0, 20, 242, 0, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 134, 13, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 6, 0, + 0, 0, 134, 13, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 2, 0, 0, 0, + 134, 13, 16, 0, 3, 0, + 0, 0, 134, 13, 16, 0, + 6, 0, 0, 0, 21, 0, + 0, 1, 31, 0, 4, 3, + 58, 0, 16, 0, 0, 0, + 0, 0, 54, 0, 0, 5, + 66, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 12, 0, 0, 0, 54, 0, + 0, 5, 18, 0, 16, 0, + 12, 0, 0, 0, 26, 0, + 16, 0, 10, 0, 0, 0, + 54, 0, 0, 5, 18, 0, + 16, 0, 10, 0, 0, 0, + 10, 0, 16, 0, 2, 0, + 0, 0, 21, 0, 0, 1, + 35, 0, 0, 9, 34, 0, + 16, 0, 4, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 1, 0, 42, 0, + 16, 0, 10, 0, 0, 0, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 86, 5, + 16, 0, 5, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 35, 0, 0, 12, + 242, 0, 16, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 10, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 70, 0, 16, 0, 12, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 35, 0, + 0, 12, 242, 0, 16, 0, + 0, 0, 0, 0, 230, 10, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 35, 31, 0, 0, 28, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 200, 3, + 0, 0, 195, 5, 0, 0, + 189, 4, 0, 0, 12, 1, + 0, 0, 81, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 162, 5, + 0, 0, 67, 2, 0, 0, + 152, 2, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_64bpp_3xres_cs.h new file mode 100644 index 000000000..efd7bdb78 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_16bpp_from_64bpp_3xres_cs.h @@ -0,0 +1,24573 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 11 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].xxzz, l(1023, 0x40000000, 7, 8) +ubfe r4.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r5.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r5.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +ishl r1.w, r5.x, l(1) +imad r1.w, r5.y, r3.x, r1.w +iadd r1.w, r1.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r2.x, r2.x, l(1) +imad r1.w, r1.w, l(1280), r2.x +imul null, r1.w, r1.w, l(9) +ushr r1.w, r1.w, l(1) +movc r2.x, r2.z, l(18), l(9) +movc r2.yz, r0.wwzw, l(0,0,0,0), l(0,1,1,0) +movc r2.yz, r3.yyyy, r2.yyzy, l(0,0,0,0) +bfi r5.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r5.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r3.x, r1.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r3.x, r2.w, r5.x + ushr r3.y, r1.x, l(5) + imad r2.w, r2.w, r3.y, r5.y + ishl r3.y, r0.z, l(9) + and r3.y, r3.y, l(3072) + bfi r3.y, l(3), l(7), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r3.x, r3.x, r5.z + bfi r3.w, l(1), l(1), r3.x, l(0) + iadd r3.w, r3.w, r5.w + bfi r3.w, l(2), l(1), r3.w, l(0) + bfi r3.x, l(1), l(0), r3.x, r3.w + and r3.w, r3.y, l(48) + bfi r4.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.xy, r3.wwww, l(2, 16, 0, 0), r4.xyxx + bfi r3.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r3.yyyy, r4.xxxy + bfi r3.yw, l(0, 2, 0, 2), l(0, 7, 0, 10), r1.zzzz, r3.yyyw + ubfe r1.z, l(3), l(6), r3.y + and r2.w, r3.x, l(6) + bfi r3.x, l(1), l(8), r3.x, l(0) + imad r1.z, r1.z, l(32), r3.x + imad r1.z, r2.w, l(4), r1.z + bfi r3.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r0.zzzz, r3.ywyy + bfi r1.z, l(9), l(3), r1.z, r3.y + bfi r1.z, l(6), l(0), r3.x, r1.z +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r3.xy, r0.zzzz, l(3, 7, 0, 0) + and r3.xy, r3.xyxx, l(112, 2048, 0, 0) + bfi r0.y, l(3), l(1), r0.w, r3.x + ishl r1.x, r3.x, l(1) + bfi r0.w, l(3), l(2), r0.w, r1.x + and r0.w, r0.w, l(224) + bfi r1.x, l(24), l(8), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r3.xw, r0.wwww, l(3, 0, 0, 2) + bfi r0.xw, l(24, 0, 0, 24), l(11, 0, 0, 10), r0.xxxx, r3.xxxw + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r3.y, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r5.z, l(2) + iadd r0.y, r5.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.z, l(6), l(0), r1.x, r0.x +endif +imul null, r0.x, r1.z, l(9) +ushr r0.x, r0.x, l(3) +imad r0.y, r2.z, l(3), r1.w +iadd r0.z, r2.y, r0.y +ld r5.yw, r0.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xz, r5.yywy, l(16, 0, 16, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r1.zzzx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r1.x, r1.y, l(4) +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.z, l(720) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.xy, r0.zzzz, l(9, 729, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.z, r0.w +endif +mul r5.xyzw, r1.zzzz, r5.ywxz +and r0.z, CB0[0][0].z, l(0x01000000) +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r3.xy, r0.yyyy, l(1, 2, 0, 0) +ld r6.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(721) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.xw, r0.yyyy, l(10, 0, 0, 730) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.z, r0.w +endif +mul r6.xyzw, r1.zzzz, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(32), r7.x + imad r1.z, r7.z, l(1024), r1.z + imad r1.z, r7.w, l(0x00008000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r1.z, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(32), r7.x + imad r1.z, r7.z, l(2048), r1.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r1.z, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(32), r7.x + imad r1.z, r7.z, l(1024), r1.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r1.z, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(256), r7.x + imad r1.z, r7.z, l(0x00010000), r1.z + imad r4.x, r7.w, l(0x01000000), r1.z + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(16), r7.x + imad r1.z, r7.z, l(256), r1.z + imad r1.z, r7.w, l(4096), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.x, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r1.z, r2.w + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r3.xw, r6.zzzx, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r3.xw, r3.xxxw + imad r4.x, r3.w, l(0x00010000), r3.x + break + default + f32tof16 r1.z, r5.x + f32tof16 r2.w, r6.x + imad r4.x, r2.w, l(0x00010000), r1.z + break +endswitch +ld r5.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(722) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(11, 731, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.z, r0.w +endif +mul r5.xyzw, r1.zzzz, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r0.y, r1.w, r2.y +iadd r3.xy, r0.yyyy, l(3, 6, 0, 0) +ld r6.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(723) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.xw, r0.yyyy, l(12, 0, 0, 732) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.z, r0.w +endif +mul r6.xyzw, r1.zzzz, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(32), r7.x + imad r1.z, r7.z, l(1024), r1.z + imad r1.z, r7.w, l(0x00008000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.z, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(32), r7.x + imad r1.z, r7.z, l(2048), r1.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.z, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(32), r7.x + imad r1.z, r7.z, l(1024), r1.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.z, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(256), r7.x + imad r1.z, r7.z, l(0x00010000), r1.z + imad r4.y, r7.w, l(0x01000000), r1.z + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(16), r7.x + imad r1.z, r7.z, l(256), r1.z + imad r1.z, r7.w, l(4096), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.x, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.z, r2.w + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r3.xw, r6.zzzx, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r3.xw, r3.xxxw + imad r4.y, r3.w, l(0x00010000), r3.x + break + default + f32tof16 r1.z, r5.x + f32tof16 r2.w, r6.x + imad r4.y, r2.w, l(0x00010000), r1.z + break +endswitch +ieq r1.z, r3.z, l(1) +if_nz r1.z + ishl r3.xz, r4.xxyx, l(8, 0, 8, 0) + and r3.xz, r3.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r3.xzxx, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx +iadd r5.xyzw, r1.wwww, l(4, 5, 7, 8) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(724) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xz, r1.wwww, l(13, 0, 733, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +ld r7.yw, r5.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(725) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xz, r1.wwww, l(14, 0, 734, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r9.yywy, l(16, 0, 16, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.zzzx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + imad r2.w, r8.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(32), r8.x + imad r3.x, r8.z, l(1024), r3.x + ishl r3.z, r8.w, l(31) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r3.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r2.w, r3.z, l(32), r3.x + imad r2.w, r3.w, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.xzw, r7.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r3.x, r3.z, l(32), r3.x + ishl r3.z, r3.w, l(27) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r3.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r2.w, r3.z, l(32), r3.x + imad r2.w, r3.w, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.xzw, r7.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r3.x, r3.z, l(32), r3.x + ishl r3.z, r3.w, l(26) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r7.xxxy + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(256), r8.x + imad r2.w, r8.z, l(0x00010000), r2.w + imad r4.x, r8.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + imad r2.w, r8.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(16), r8.x + imad r3.x, r8.z, l(256), r3.x + ishl r3.z, r8.w, l(28) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(24) + mov_sat r7.z, r6.x + mov_sat r7.x, r7.x + mad r3.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r3.xz, r3.xxzx + imad r4.x, r3.z, l(0x00010000), r3.x + break + default + f32tof16 r2.w, r6.x + f32tof16 r3.x, r7.x + imad r4.x, r3.x, l(0x00010000), r2.w + break +endswitch +ld r3.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r5.x, r0.y, l(726) + ld r6.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r5.x, r1.y, l(6) + if_nz r5.x + mul r2.w, r0.w, l(0.250000) + iadd r5.xy, r0.yyyy, l(15, 735, 0, 0) + ld r6.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r5.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.w, r0.w +endif +mul r3.xyzw, r2.wwww, r3.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +ld r6.yw, r5.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.y, r0.w, l(0.500000) + iadd r2.w, r1.w, l(727) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.y, r0.w, l(0.250000) + iadd r5.xy, r1.wwww, l(16, 736, 0, 0) + ld r7.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r5.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r0.y, r0.w +endif +mul r6.xyzw, r0.yyyy, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(32), r7.x + imad r0.y, r7.z, l(1024), r0.y + imad r0.y, r7.w, l(0x00008000), r0.y + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r5.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r5.x + iadd r4.y, r0.y, r2.w + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(32), r5.x + imad r0.y, r5.z, l(2048), r0.y + mov_sat r6.xyz, r6.xyzx + mad r5.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r2.w, r5.y, l(32), r5.x + ishl r5.x, r5.z, l(27) + imad r2.w, r2.w, l(0x00010000), r5.x + iadd r4.y, r0.y, r2.w + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(32), r5.x + imad r0.y, r5.z, l(1024), r0.y + mov_sat r6.xyz, r6.xyzx + mad r5.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r2.w, r5.y, l(32), r5.x + ishl r5.x, r5.z, l(26) + imad r2.w, r2.w, l(0x00010000), r5.x + iadd r4.y, r0.y, r2.w + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r6.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(256), r7.x + imad r0.y, r7.z, l(0x00010000), r0.y + imad r4.y, r7.w, l(0x01000000), r0.y + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(16), r7.x + imad r0.y, r7.z, l(256), r0.y + imad r0.y, r7.w, l(4096), r0.y + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.y, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.y + iadd r4.y, r0.y, r2.w + break + case l(24) + mov_sat r6.z, r3.x + mov_sat r6.x, r6.x + mad r3.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r4.y, r3.z, l(0x00010000), r3.y + break + default + f32tof16 r0.y, r3.x + f32tof16 r2.w, r6.x + imad r4.y, r2.w, l(0x00010000), r0.y + break +endswitch +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +if_nz r1.z + ishl r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r4.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r5.xyxx, r6.xyxx +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyxx +ld r5.yw, r5.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.y, r0.w, l(0.500000) + iadd r2.w, r1.w, l(728) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.y, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(17, 737, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r0.y, r0.w +endif +mul r5.xyzw, r0.yyyy, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r0.y, r1.w, r2.x +imad r1.w, r2.z, l(3), r0.y +iadd r2.w, r2.y, r1.w +ld r6.yw, r2.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r3.x, r0.w, l(0.500000) + iadd r4.x, r2.w, l(720) + ld r7.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r3.x, r0.w, l(0.250000) + iadd r4.xy, r2.wwww, l(9, 729, 0, 0) + ld r7.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r3.x, r0.w +endif +mul r6.xyzw, r3.xxxx, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + imad r2.w, r7.w, l(0x00008000), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.x, r7.y, l(32), r7.x + imad r3.x, r7.z, l(1024), r3.x + ishl r7.x, r7.w, l(31) + imad r3.x, r3.x, l(0x00010000), r7.x + iadd r4.x, r2.w, r3.x + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(2048), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.x, r7.y, l(32), r7.x + ishl r7.x, r7.z, l(27) + imad r3.x, r3.x, l(0x00010000), r7.x + iadd r4.x, r2.w, r3.x + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.x, r7.y, l(32), r7.x + ishl r7.x, r7.z, l(26) + imad r3.x, r3.x, l(0x00010000), r7.x + iadd r4.x, r2.w, r3.x + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(256), r7.x + imad r2.w, r7.z, l(0x00010000), r2.w + imad r4.x, r7.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + imad r2.w, r7.w, l(4096), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.x, r7.y, l(16), r7.x + imad r3.x, r7.z, l(256), r3.x + ishl r5.y, r7.w, l(28) + imad r3.x, r3.x, l(0x00010000), r5.y + iadd r4.x, r2.w, r3.x + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r5.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r4.x, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.x, r6.x + imad r4.x, r3.x, l(0x00010000), r2.w + break +endswitch +iadd r5.xy, r1.wwww, l(1, 2, 0, 0) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(721) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r5.xz, r1.wwww, l(10, 0, 730, 0) + ld r7.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r5.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +ld r5.yw, r5.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r7.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(722) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r7.xy, r1.wwww, l(11, 731, 0, 0) + ld r8.yw, r7.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r7.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r5.ywxz, r8.ywxz + ld r7.yw, r7.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r9.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.xyzw, r8.zxwy + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(2048), r1.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r5.xxxy + mad r7.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r4.y, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.x, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(24) + mov_sat r5.z, r6.x + mov_sat r5.x, r5.x + mad r5.yz, r5.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r4.y, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r1.w, r6.x + f32tof16 r2.w, r5.x + imad r4.y, r2.w, l(0x00010000), r1.w + break +endswitch +if_nz r1.z + ishl r5.xy, r4.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r4.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.xy, r5.zwzz, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyxx +iadd r1.w, r2.y, r0.y +iadd r3.xy, r1.wwww, l(3, 6, 0, 0) +ld r5.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(723) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(12, 732, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r7.yw, r6.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(724) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r4.xy, r0.yyyy, l(13, 733, 0, 0) + ld r8.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r9.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r4.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + imad r2.w, r8.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(32), r8.x + imad r3.x, r8.z, l(1024), r3.x + ishl r6.x, r8.w, l(31) + imad r3.x, r3.x, l(0x00010000), r6.x + iadd r4.x, r2.w, r3.x + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r6.x, r8.z, l(27) + imad r3.x, r3.x, l(0x00010000), r6.x + iadd r4.x, r2.w, r3.x + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r6.x, r8.z, l(26) + imad r3.x, r3.x, l(0x00010000), r6.x + iadd r4.x, r2.w, r3.x + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r7.xxxy + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(256), r8.x + imad r2.w, r8.z, l(0x00010000), r2.w + imad r4.x, r8.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + imad r2.w, r8.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(16), r8.x + imad r3.x, r8.z, l(256), r3.x + ishl r5.y, r8.w, l(28) + imad r3.x, r3.x, l(0x00010000), r5.y + iadd r4.x, r2.w, r3.x + break + case l(24) + mov_sat r7.z, r5.x + mov_sat r7.x, r7.x + mad r5.yz, r7.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r4.x, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.x, r7.x + imad r4.x, r3.x, l(0x00010000), r2.w + break +endswitch +ld r5.yw, r6.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(725) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r6.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r6.xy, r0.yyyy, l(14, 734, 0, 0) + ld r7.yw, r6.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r8.yw, r6.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +ld r7.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(726) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r1.wwww, l(15, 735, 0, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + imad r1.w, r8.w, l(0x00008000), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + ishl r3.x, r8.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(2048), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.x, r8.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.x, r8.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r7.xxxy + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(256), r8.x + imad r1.w, r8.z, l(0x00010000), r1.w + imad r4.y, r8.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(16), r8.x + imad r1.w, r8.z, l(256), r1.w + imad r1.w, r8.w, l(4096), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + ishl r3.x, r8.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(24) + mov_sat r7.z, r5.x + mov_sat r7.x, r7.x + mad r3.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r3.xy, r3.xyxx + imad r4.y, r3.y, l(0x00010000), r3.x + break + default + f32tof16 r1.w, r5.x + f32tof16 r2.w, r7.x + imad r4.y, r2.w, l(0x00010000), r1.w + break +endswitch +if_nz r1.z + ishl r3.xy, r4.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r3.xyxx, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyxx +ld r5.yw, r6.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(727) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r5.xyzw, r1.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +ld r6.yw, r6.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(728) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(17, 737, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r6.xyzw, r1.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.z, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(2048), r1.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.z, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.z, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r3.x, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.z, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r4.xy, r6.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r3.x, r4.y, l(0x00010000), r4.x + break + default + f32tof16 r1.w, r5.x + f32tof16 r2.w, r6.x + imad r3.x, r2.w, l(0x00010000), r1.w + break +endswitch +iadd r0.y, r2.x, r0.y +imad r1.w, r2.z, l(3), r0.y +iadd r2.w, r2.y, r1.w +ld r5.yw, r2.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r3.z, r0.w, l(0.500000) + iadd r4.x, r2.w, l(720) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r3.z, r0.w, l(0.250000) + iadd r4.xy, r2.wwww, l(9, 729, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r3.z, r0.w +endif +mul r5.xyzw, r3.zzzz, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r4.xy, r1.wwww, l(1, 2, 0, 0) +ld r6.yw, r4.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.z, r1.w, l(721) + ld r7.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.z, r1.y, l(6) + if_nz r3.z + mul r2.w, r0.w, l(0.250000) + iadd r7.xy, r1.wwww, l(10, 730, 0, 0) + ld r8.yw, r7.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r7.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r6.ywxz, r8.ywxz + ld r7.yw, r7.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r9.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.xyzw, r8.zxwy + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + imad r2.w, r7.w, l(0x00008000), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.z, r7.y, l(32), r7.x + imad r3.z, r7.z, l(1024), r3.z + ishl r4.x, r7.w, l(31) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(2048), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.z, r7.y, l(32), r7.x + ishl r4.x, r7.z, l(27) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.z, r7.y, l(32), r7.x + ishl r4.x, r7.z, l(26) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(256), r7.x + imad r2.w, r7.z, l(0x00010000), r2.w + imad r3.y, r7.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + imad r2.w, r7.w, l(4096), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.z, r7.y, l(16), r7.x + imad r3.z, r7.z, l(256), r3.z + ishl r4.x, r7.w, l(28) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r5.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r3.y, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.z, r6.x + imad r3.y, r3.z, l(0x00010000), r2.w + break +endswitch +if_nz r1.z + ishl r5.xy, r3.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r3.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r5.zwzz, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r3.wwww, r3.xyxx +ld r3.yw, r4.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r5.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r4.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r4.x, r1.w, l(722) + ld r5.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r5.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r2.w, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(11, 731, 0, 0) + ld r5.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r3.ywxz, r5.ywxz + ld r6.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r5.zxwy, r6.xyzw + endif +else + mov r2.w, r0.w +endif +mul r3.xyzw, r2.wwww, r3.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +iadd r1.w, r2.y, r0.y +iadd r4.xy, r1.wwww, l(3, 6, 0, 0) +ld r5.yw, r4.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r4.x, r1.w, l(723) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r2.w, r0.w, l(0.250000) + iadd r6.xy, r1.wwww, l(12, 732, 0, 0) + ld r7.yw, r6.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r6.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r6.yw, r6.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r8.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.xyzw, r7.zxwy + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + imad r2.w, r7.w, l(0x00008000), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r4.x, r7.y, l(32), r7.x + imad r4.x, r7.z, l(1024), r4.x + ishl r6.z, r7.w, l(31) + imad r4.x, r4.x, l(0x00010000), r6.z + iadd r6.x, r2.w, r4.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r7.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(2048), r2.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r4.x, r7.y, l(32), r7.x + ishl r6.z, r7.z, l(27) + imad r4.x, r4.x, l(0x00010000), r6.z + iadd r6.x, r2.w, r4.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r7.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r4.x, r7.y, l(32), r7.x + ishl r6.z, r7.z, l(26) + imad r4.x, r4.x, l(0x00010000), r6.z + iadd r6.x, r2.w, r4.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r5.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(256), r7.x + imad r2.w, r7.z, l(0x00010000), r2.w + imad r6.x, r7.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + imad r2.w, r7.w, l(4096), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.y, r7.y, l(16), r7.x + imad r3.y, r7.z, l(256), r3.y + ishl r3.z, r7.w, l(28) + imad r3.y, r3.y, l(0x00010000), r3.z + iadd r6.x, r2.w, r3.y + break + case l(24) + mov_sat r5.z, r3.x + mov_sat r5.x, r5.x + mad r3.yz, r5.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r6.x, r3.z, l(0x00010000), r3.y + break + default + f32tof16 r2.w, r3.x + f32tof16 r3.x, r5.x + imad r6.x, r3.x, l(0x00010000), r2.w + break +endswitch +iadd r3.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r5.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(724) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r6.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r6.zw, r0.yyyy, l(0, 0, 13, 733) + ld r7.yw, r6.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r8.yw, r6.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +ld r7.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(725) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(14, 734, 0, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + imad r2.w, r8.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(32), r8.x + imad r3.x, r8.z, l(1024), r3.x + ishl r3.y, r8.w, l(31) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r3.y, r8.z, l(27) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r3.y, r8.z, l(26) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r7.xxxy + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(256), r8.x + imad r2.w, r8.z, l(0x00010000), r2.w + imad r6.y, r8.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + imad r2.w, r8.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(16), r8.x + imad r3.x, r8.z, l(256), r3.x + ishl r3.y, r8.w, l(28) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(24) + mov_sat r7.z, r5.x + mov_sat r7.x, r7.x + mad r3.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r3.xy, r3.xyxx + imad r6.y, r3.y, l(0x00010000), r3.x + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.x, r7.x + imad r6.y, r3.x, l(0x00010000), r2.w + break +endswitch +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +if_nz r1.z + ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r3.xyxx, r6.zwzz +endif +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyxx +ld r6.yw, r4.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(726) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r1.wwww, l(15, 735, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +ld r7.yw, r3.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(727) + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r1.w, r0.w +endif +mul r7.xyzw, r1.wwww, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + imad r1.w, r8.w, l(0x00008000), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + ishl r3.z, r8.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r8.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(2048), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.z, r8.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r8.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.z, r8.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r7.xxxy + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(256), r8.x + imad r1.w, r8.z, l(0x00010000), r1.w + imad r3.x, r8.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(16), r8.x + imad r1.w, r8.z, l(256), r1.w + imad r1.w, r8.w, l(4096), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + ishl r3.z, r8.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(24) + mov_sat r7.z, r6.x + mov_sat r7.x, r7.x + mad r4.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r3.x, r4.y, l(0x00010000), r4.x + break + default + f32tof16 r1.w, r6.x + f32tof16 r2.w, r7.x + imad r3.x, r2.w, l(0x00010000), r1.w + break +endswitch +ld r6.yw, r3.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(728) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.zw, r0.yyyy, l(0, 0, 17, 737) + ld r7.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r6.xyzw, r1.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +iadd r0.y, r2.x, r0.y +imad r1.w, r2.z, l(3), r0.y +iadd r2.x, r2.y, r1.w +ld r7.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.z, r0.w, l(0.500000) + iadd r2.w, r2.x, l(720) + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r2.z, r0.w, l(0.250000) + iadd r2.xw, r2.xxxx, l(9, 0, 0, 729) + ld r8.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r9.yyyw, l(16, 0, 0, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.wwwx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.z, r0.w +endif +mul r7.xyzw, r2.zzzz, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(32), r8.x + imad r2.x, r8.z, l(1024), r2.x + imad r2.x, r8.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(32), r8.x + imad r2.z, r8.z, l(1024), r2.z + ishl r2.w, r8.w, l(31) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(27) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(26) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r7.xxxy + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(256), r8.x + imad r2.x, r8.z, l(0x00010000), r2.x + imad r3.y, r8.w, l(0x01000000), r2.x + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(16), r8.x + imad r2.x, r8.z, l(256), r2.x + imad r2.x, r8.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(16), r8.x + imad r2.z, r8.z, l(256), r2.z + ishl r2.w, r8.w, l(28) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(24) + mov_sat r7.z, r6.x + mov_sat r7.x, r7.x + mad r2.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r3.y, r2.z, l(0x00010000), r2.x + break + default + f32tof16 r2.x, r6.x + f32tof16 r2.z, r7.x + imad r3.y, r2.z, l(0x00010000), r2.x + break +endswitch +if_nz r1.z + ishl r2.xz, r3.xxyx, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r2.xzxx, r3.zwzz +endif +store_uav_typed U0[0].xyzw, r5.yyyy, r3.xyxx +iadd r2.xz, r1.wwww, l(1, 0, 2, 0) +ld r3.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r3.yyyw, l(16, 0, 0, 16) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r2.wwwx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.w, r1.w, l(721) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r2.x, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(10, 730, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.x, r0.w +endif +mul r3.xyzw, r2.xxxx, r3.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +ld r6.yw, r2.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r1.w, l(722) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r1.wwww, l(0, 0, 11, 731) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.x, r0.w +endif +mul r6.xyzw, r2.xxxx, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.x, r7.y, l(32), r7.x + imad r2.x, r7.z, l(1024), r2.x + ishl r2.z, r7.w, l(31) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(32), r2.x + imad r1.w, r2.w, l(2048), r1.w + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + ishl r2.z, r2.w, l(27) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(32), r2.x + imad r1.w, r2.w, l(1024), r1.w + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + ishl r2.z, r2.w, l(26) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r6.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r4.x, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.x, r7.y, l(16), r7.x + imad r2.x, r7.z, l(256), r2.x + ishl r2.z, r7.w, l(28) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(24) + mov_sat r6.z, r3.x + mov_sat r6.x, r6.x + mad r2.xz, r6.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r4.x, r2.z, l(0x00010000), r2.x + break + default + f32tof16 r1.w, r3.x + f32tof16 r2.x, r6.x + imad r4.x, r2.x, l(0x00010000), r1.w + break +endswitch +iadd r1.w, r2.y, r0.y +iadd r2.xy, r1.wwww, l(3, 6, 0, 0) +ld r3.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r3.yywy, l(16, 0, 16, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r2.zzzx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r1.w, l(723) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r1.wwww, l(0, 0, 12, 732) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.x, r0.w +endif +mul r3.xyzw, r2.xxxx, r3.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r7.yw, r6.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r0.y, l(724) + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r0.yyyy, l(0, 0, 13, 733) + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r9.yyyw, l(0, 0, 16, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.wwwz + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.x, r0.w +endif +mul r7.xyzw, r2.xxxx, r7.ywxz +if_nz r0.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r8.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(32), r8.x + imad r2.x, r8.z, l(1024), r2.x + imad r2.x, r8.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(32), r8.x + imad r2.z, r8.z, l(1024), r2.z + ishl r2.w, r8.w, l(31) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(27) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(26) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r7.xxxy + mad r8.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(256), r8.x + imad r2.x, r8.z, l(0x00010000), r2.x + imad r4.y, r8.w, l(0x01000000), r2.x + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r8.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(16), r8.x + imad r2.x, r8.z, l(256), r2.x + imad r2.x, r8.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(16), r8.x + imad r2.z, r8.z, l(256), r2.z + ishl r2.w, r8.w, l(28) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(24) + mov_sat r7.z, r3.x + mov_sat r7.x, r7.x + mad r2.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r4.y, r2.z, l(0x00010000), r2.x + break + default + f32tof16 r2.x, r3.x + f32tof16 r2.z, r7.x + imad r4.y, r2.z, l(0x00010000), r2.x + break +endswitch +if_nz r1.z + ishl r2.xz, r4.xxyx, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.xy, r4.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r2.xzxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyxx +ld r3.yw, r6.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r3.yywy, l(16, 0, 16, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r2.zzzx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r0.y, l(725) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r7.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r0.yyyy, l(0, 0, 14, 734) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r3.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.x, r0.w +endif +mul r3.xyzw, r2.xxxx, r3.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +ld r2.yw, r2.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r2.xz, r2.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r2.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r2.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r2.ywyy, l(16, 16, 0, 0) + f16tof32 r2.xy, r2.wyww + f16tof32 r2.zw, r4.yyyx + break + default + mov r2.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r4.x, r0.w, l(0.500000) + iadd r4.y, r1.w, l(726) + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r2.xyzw, r7.xyzw + uge r4.y, r1.y, l(6) + if_nz r4.y + mul r4.x, r0.w, l(0.250000) + iadd r5.xy, r1.wwww, l(15, 735, 0, 0) + ld r7.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r2.ywxz, r7.ywxz + ld r8.yw, r5.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r4.x, r0.w +endif +mul r2.xyzw, r2.ywxz, r4.xxxx +if_nz r0.z + mov r2.xz, r2.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r2.xyzw, r2.xyzw + mad r7.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r5.x, r7.y, l(32), r7.x + imad r5.x, r7.z, l(1024), r5.x + ishl r5.y, r7.w, l(31) + imad r5.x, r5.x, l(0x00010000), r5.y + iadd r4.x, r1.w, r5.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r1.w, r5.y, l(32), r5.x + imad r1.w, r5.z, l(2048), r1.w + mov_sat r2.xyz, r2.xyzx + mad r5.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r5.x, r5.y, l(32), r5.x + ishl r5.y, r5.z, l(27) + imad r5.x, r5.x, l(0x00010000), r5.y + iadd r4.x, r1.w, r5.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r1.w, r5.y, l(32), r5.x + imad r1.w, r5.z, l(1024), r1.w + mov_sat r2.xyz, r2.xyzx + mad r5.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r5.x, r5.y, l(32), r5.x + ishl r5.y, r5.z, l(26) + imad r5.x, r5.x, l(0x00010000), r5.y + iadd r4.x, r1.w, r5.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r2.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r4.x, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r2.xyzw, r2.xyzw + mad r7.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.y, r7.y, l(16), r7.x + imad r2.y, r7.z, l(256), r2.y + ishl r2.w, r7.w, l(28) + imad r2.y, r2.y, l(0x00010000), r2.w + iadd r4.x, r1.w, r2.y + break + case l(24) + mov_sat r2.z, r3.x + mov_sat r2.x, r2.x + mad r2.yz, r2.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r2.yz, r2.yyzy + imad r4.x, r2.z, l(0x00010000), r2.y + break + default + f32tof16 r1.w, r3.x + f32tof16 r2.x, r2.x + imad r4.x, r2.x, l(0x00010000), r1.w + break +endswitch +ld r2.yw, r6.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r2.xz, r2.yywy, l(16, 0, 16, 0) + ishr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + itof r3.xyzw, r3.xyzw + mul r3.xyzw, r3.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r2.xyzw, r3.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r2.ywyy, l(16, 16, 0, 0) + f16tof32 r2.xy, r2.wyww + f16tof32 r2.zw, r3.yyyx + break + default + mov r2.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(727) + ld r3.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r2.xyzw, r3.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r2.ywxz, r7.ywxz + ld r3.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r3.xyzw, r7.zxwy + endif +else + mov r1.w, r0.w +endif +mul r2.xyzw, r1.wwww, r2.ywxz +if_nz r0.z + mov r2.xz, r2.zzxz +endif +ld r3.yw, r6.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.x, r0.w, l(0.500000) + iadd r1.w, r0.y, l(728) + ld r6.yw, r1.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r0.w, r0.w, l(0.250000) + iadd r1.yw, r0.yyyy, l(0, 17, 0, 737) + ld r6.yw, r1.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r1.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r1.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + else + mov r0.w, r1.x + endif +endif +mul r3.xyzw, r0.wwww, r3.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +switch r4.z + case l(3) + mov_sat r2.xyzw, r2.xyzw + mad r6.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r0.y, r6.y, l(32), r6.x + imad r0.y, r6.z, l(1024), r0.y + imad r0.y, r6.w, l(0x00008000), r0.y + mov_sat r3.xyzw, r3.xyzw + mad r6.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r0.z, r6.y, l(32), r6.x + imad r0.z, r6.z, l(1024), r0.z + ishl r0.w, r6.w, l(31) + imad r0.z, r0.z, l(0x00010000), r0.w + iadd r4.y, r0.z, r0.y + break + case l(4) + mov_sat r2.xyz, r2.xyzx + mad r0.yzw, r2.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(32), r0.y + imad r0.y, r0.w, l(2048), r0.y + mov_sat r3.xyz, r3.xyzx + mad r1.xyw, r3.xyxz, l(31.000000, 63.000000, 0.000000, 31.000000), l(0.500000, 0.500000, 0.000000, 0.500000) + ftou r1.xyw, r1.xyxw + imad r0.z, r1.y, l(32), r1.x + ishl r0.w, r1.w, l(27) + imad r0.z, r0.z, l(0x00010000), r0.w + iadd r4.y, r0.z, r0.y + break + case l(5) + mov_sat r2.xyz, r2.xyzx + mad r0.yzw, r2.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(32), r0.y + imad r0.y, r0.w, l(1024), r0.y + mov_sat r3.xyz, r3.xyzx + mad r1.xyw, r3.xyxz, l(31.000000, 31.000000, 0.000000, 63.000000), l(0.500000, 0.500000, 0.000000, 0.500000) + ftou r1.xyw, r1.xyxw + imad r0.z, r1.y, l(32), r1.x + ishl r0.w, r1.w, l(26) + imad r0.z, r0.z, l(0x00010000), r0.w + iadd r4.y, r0.z, r0.y + break + case l(10) + mov_sat r2.xy, r2.xyxx + mov_sat r2.zw, r3.xxxy + mad r6.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r0.y, r6.y, l(256), r6.x + imad r0.y, r6.z, l(0x00010000), r0.y + imad r4.y, r6.w, l(0x01000000), r0.y + break + case l(15) + mov_sat r2.xyzw, r2.xyzw + mad r6.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r0.y, r6.y, l(16), r6.x + imad r0.y, r6.z, l(256), r0.y + imad r0.y, r6.w, l(4096), r0.y + mov_sat r3.xyzw, r3.xyzw + mad r6.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r0.z, r6.y, l(16), r6.x + imad r0.z, r6.z, l(256), r0.z + ishl r0.w, r6.w, l(28) + imad r0.z, r0.z, l(0x00010000), r0.w + iadd r4.y, r0.z, r0.y + break + case l(24) + mov_sat r3.z, r2.x + mov_sat r3.x, r3.x + mad r0.yz, r3.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r4.y, r0.z, l(0x00010000), r0.y + break + default + f32tof16 r0.y, r2.x + f32tof16 r0.z, r3.x + imad r4.y, r0.z, l(0x00010000), r0.y + break +endswitch +if_nz r1.z + ishl r0.yz, r4.xxyx, l(0, 8, 8, 0) + and r0.yz, r0.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r1.xy, r4.xyxx, l(8, 8, 0, 0) + and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r0.yzyy, r1.xyxx +endif +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyxx +ret +// Approximately 4948 instruction slots used +#endif + +const BYTE resolve_full_16bpp_from_64bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 173, 51, + 196, 145, 139, 44, 212, 132, + 201, 191, 20, 82, 22, 232, + 94, 125, 1, 0, 0, 0, + 180, 202, 1, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 24, 202, 1, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 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0, + 15, 4, 0, 0, 231, 0, + 0, 0, 87, 2, 0, 0, + 27, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 144, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 181, 1, 0, 0, + 3, 0, 0, 0, 68, 1, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 9, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_2xres_cs.h new file mode 100644 index 000000000..dbec20332 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_2xres_cs.h @@ -0,0 +1,7645 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 21 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].xzxz, l(1023, 0x01000000, 0x40000000, 8) +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +movc r0.w, r3.z, l(1), l(0) +ishl r3.y, r1.z, r0.w +imad r2.x, r1.w, r2.x, r3.y +iadd r2.x, r2.x, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w +imad r0.w, r2.x, l(1280), r0.w +ld r1.xyzw, r0.wwww, T0[0].xzyw +if_nz r3.z + iadd r2.x, r0.w, l(1) + ld r4.xyzw, r2.xxxx, T0[0].xzyw + switch r3.w + case l(5) + ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r1.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r1.xz, r8.zzwz + ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r4.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.xz, r1.xxzx + f16tof32 r5.yw, r8.xxxy + f16tof32 r6.xz, r1.yywy + f16tof32 r6.yw, r8.zzzw + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r7.xz, r4.xxzx + f16tof32 r7.yw, r8.xxxy + f16tof32 r1.zw, r4.wwwy + f16tof32 r1.xy, r8.zwzz + break + default + mov r5.xy, r1.xzxx + mov r5.zw, l(0,0,0,0) + mov r6.xy, r1.ywyy + mov r6.zw, l(0,0,0,0) + mov r7.xy, r4.xzxx + mov r7.zw, l(0,0,0,0) + mov r1.xw, r4.wwwy + mov r1.yz, l(0,0,0,0) + break + endswitch +else + switch r3.w + case l(0) + case l(1) + ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) + and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) + and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) + mov r8.x, r1.x + mov r8.yz, r4.xxyx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + utof r3.xy, r4.zwzz + ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) + mov r8.x, r1.z + mov r8.yz, r4.xxwx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r4.x, r1.y + and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r9.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r11.xyz, r9.xyzx + iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) + movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) + iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) + movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx + ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) + iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r9.xyzx, r4.xyzx + movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) + utof r8.xy, r4.xwxx + mov r4.x, r1.w + and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r10.xyzx, r4.xyzx + movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) + mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r5.w, r3.x + mov r6.w, r3.y + mov r7.w, r4.x + mov r1.y, r4.y + break + case l(4) + ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r8.xz, r4.xxyx + mov r8.yw, r1.xxxz + ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r1.xz, r4.zzwz + ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.x, r1.x + f16tof32 r5.y, r4.x + f16tof32 r6.x, r1.z + f16tof32 r6.y, r4.y + f16tof32 r7.x, r1.y + f16tof32 r7.y, r4.z + f16tof32 r1.w, r1.w + f16tof32 r1.x, r4.w + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + default + mov r5.x, r1.x + mov r5.yzw, l(0,0,0,0) + mov r6.x, r1.z + mov r6.yzw, l(0,0,0,0) + mov r7.x, r1.y + mov r7.yzw, l(0,0,0,0) + mov r1.xyz, l(0,0,0,0) + break + endswitch +endif +ibfe r2.x, l(6), l(16), CB0[0][0].z +ishl r2.x, r2.x, l(23) +iadd r2.x, r2.x, l(0x3f800000) +uge r3.x, r0.y, l(4) +if_nz r3.x + mul r3.x, r2.x, l(0.500000) + ishl r3.y, l(80), r3.z + iadd r3.y, r0.w, r3.y + ld r4.xyzw, r3.yyyy, T0[0].xzyw + if_nz r3.z + iadd r3.y, r0.w, l(161) + ld r8.xyzw, r3.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r4.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r12.zzwz + ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.xz, r4.xxzx + f16tof32 r9.yw, r12.xxxy + f16tof32 r10.xz, r4.yywy + f16tof32 r10.yw, r12.zzzw + ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r11.xz, r8.xxzx + f16tof32 r11.yw, r12.xxxy + f16tof32 r4.zw, r8.wwwy + f16tof32 r4.xy, r12.zwzz + break + default + mov r9.xy, r4.xzxx + mov r9.zw, l(0,0,0,0) + mov r10.xy, r4.ywyy + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.xzxx + mov r11.zw, l(0,0,0,0) + mov r4.xw, r8.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r12.x, r4.x + mov r12.yz, r8.xxyx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + utof r8.xy, r8.zwzz + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r13.x, r4.z + mov r13.yz, r12.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mov r12.x, r4.y + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r8.zw, r12.xxxw + mov r12.x, r4.w + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) + mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r9.w, r8.x + mov r10.w, r8.y + mov r11.w, r8.z + mov r4.y, r8.w + break + case l(4) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r12.xz, r8.xxyx + mov r12.yw, r4.xxxz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.x, r4.x + f16tof32 r9.y, r8.x + f16tof32 r10.x, r4.z + f16tof32 r10.y, r8.y + f16tof32 r11.x, r4.y + f16tof32 r11.y, r8.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r8.w + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r9.x, r4.x + mov r9.yzw, l(0,0,0,0) + mov r10.x, r4.z + mov r10.yzw, l(0,0,0,0) + mov r11.x, r4.y + mov r11.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r5.xyzw, r9.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r11.xyzw + add r1.xyzw, r1.xyzw, r4.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r2.x, r2.x, l(0.250000) + ishl r4.xy, l(1, 81, 0, 0), r3.zzzz + iadd r4.xy, r0.wwww, r4.xyxx + ld r8.xyzw, r4.xxxx, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(3) + ld r9.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r8.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r13.zzwz + ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r9.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r9.xz, r13.zzwz + ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.xz, r8.xxzx + f16tof32 r10.yw, r13.xxxy + f16tof32 r11.xz, r8.yywy + f16tof32 r11.yw, r13.zzzw + ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + f16tof32 r12.xz, r9.xxzx + f16tof32 r12.yw, r13.xxxy + f16tof32 r8.zw, r9.wwwy + f16tof32 r8.xy, r13.zwzz + break + default + mov r10.xy, r8.xzxx + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.ywyy + mov r11.zw, l(0,0,0,0) + mov r12.xy, r9.xzxx + mov r12.zw, l(0,0,0,0) + mov r8.xw, r9.wwwy + mov r8.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) + and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) + and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) + mov r13.x, r8.x + mov r13.yz, r9.xxyx + and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) + utof r4.xz, r9.zzwz + ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) + mov r13.x, r8.z + mov r13.yz, r9.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r9.x, r8.y + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) + utof r13.xy, r9.xwxx + mov r9.x, r8.w + and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r15.xyzx, r9.xyzx + movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) + mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r10.w, r4.x + mov r11.w, r4.z + mov r12.w, r9.x + mov r8.y, r9.y + break + case l(4) + ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r9.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.xz, r9.zzwz + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.x, r8.x + f16tof32 r10.y, r9.x + f16tof32 r11.x, r8.z + f16tof32 r11.y, r9.y + f16tof32 r12.x, r8.y + f16tof32 r12.y, r9.z + f16tof32 r8.w, r8.w + f16tof32 r8.x, r9.w + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + default + mov r10.x, r8.x + mov r10.yzw, l(0,0,0,0) + mov r11.x, r8.z + mov r11.yzw, l(0,0,0,0) + mov r12.x, r8.y + mov r12.yzw, l(0,0,0,0) + mov r8.xyz, l(0,0,0,0) + break + endswitch + endif + add r9.xyzw, r5.xyzw, r10.xyzw + add r10.xyzw, r6.xyzw, r11.xyzw + add r11.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r1.wxzy, r8.wxzy + ld r4.xyzw, r4.yyyy, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(163) + ld r12.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r4.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r16.zzwz + ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r12.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r12.xz, r16.zzwz + ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.xz, r4.xxzx + f16tof32 r13.yw, r16.xxxy + f16tof32 r14.xz, r4.yywy + f16tof32 r14.yw, r16.zzzw + ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + f16tof32 r15.xz, r12.xxzx + f16tof32 r15.yw, r16.xxxy + f16tof32 r4.zw, r12.wwwy + f16tof32 r4.xy, r16.zwzz + break + default + mov r13.xy, r4.xzxx + mov r13.zw, l(0,0,0,0) + mov r14.xy, r4.ywyy + mov r14.zw, l(0,0,0,0) + mov r15.xy, r12.xzxx + mov r15.zw, l(0,0,0,0) + mov r4.xw, r12.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r16.x, r4.x + mov r16.yz, r12.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r0.yw, r12.zzzw + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r16.x, r4.z + mov r16.yz, r12.xxwx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r12.x, r4.y + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r16.xyzx, r12.xyzx + movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r3.yz, r12.xxwx + mov r12.x, r4.w + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r17.xyzx, r12.xyzx + movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r0.y + mov r14.w, r0.w + mov r15.w, r3.y + mov r4.y, r3.z + break + case l(4) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r16.xz, r12.xxyx + mov r16.yw, r4.xxxz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.x, r4.x + f16tof32 r13.y, r12.x + f16tof32 r14.x, r4.z + f16tof32 r14.y, r12.y + f16tof32 r15.x, r4.y + f16tof32 r15.y, r12.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r12.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r13.x, r4.x + mov r13.yzw, l(0,0,0,0) + mov r14.x, r4.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r4.y + mov r15.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r9.xyzw, r13.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + add r7.xyzw, r11.xyzw, r15.xyzw + add r1.xyzw, r4.xyzw, r8.ywzx + else + mov r2.x, r3.x + endif +endif +mul r3.xyzw, r2.xxxx, r5.xyzw +mul r4.xyzw, r2.xxxx, r6.xyzw +mul r5.xyzw, r2.xxxx, r7.xyzw +mul r1.xyzw, r1.wxzy, r2.xxxx +if_nz r2.y + mov r3.xz, r3.zzxz + mov r4.xz, r4.zzxz + mov r6.xz, r5.zzxz + mov r1.xz, r1.zzxz +else + mov r6.xz, r5.xxzx +endif +ubfe r0.y, l(6), l(7), CB0[0][0].z +switch r0.y + case l(6) + case l(14) + case l(50) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(256), r7.x + imad r0.y, r7.z, l(0x00010000), r0.y + imad r7.x, r7.w, l(0x01000000), r0.y + mov_sat r4.xyzw, r4.xyzw + mad r8.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(256), r8.x + imad r0.y, r8.z, l(0x00010000), r0.y + imad r7.y, r8.w, l(0x01000000), r0.y + mov r6.yw, r5.yyyw + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(256), r8.x + imad r0.y, r8.z, l(0x00010000), r0.y + imad r7.z, r8.w, l(0x01000000), r0.y + mov_sat r1.xyzw, r1.xyzw + mad r8.xyzw, r1.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(256), r8.x + imad r0.y, r8.z, l(0x00010000), r0.y + imad r1.x, r8.w, l(0x01000000), r0.y + mov r6.xyz, r7.zyxz + break + case l(7) + case l(54) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(1024), r7.x + imad r0.y, r7.z, l(0x00100000), r0.y + imad r7.x, r7.w, l(0x40000000), r0.y + mov_sat r4.xyzw, r4.xyzw + mad r8.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(1024), r8.x + imad r0.y, r8.z, l(0x00100000), r0.y + imad r7.y, r8.w, l(0x40000000), r0.y + mov_sat r5.xz, r6.xxzx + mov_sat r5.yw, r5.yyyw + mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(1024), r8.x + imad r0.y, r8.z, l(0x00100000), r0.y + imad r7.z, r8.w, l(0x40000000), r0.y + mov_sat r1.xyzw, r1.xyzw + mad r8.xyzw, r1.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(1024), r8.x + imad r0.y, r8.z, l(0x00100000), r0.y + imad r1.x, r8.w, l(0x40000000), r0.y + mov r6.xyz, r7.zyxz + break + case l(16) + case l(55) + mov_sat r3.xyz, r3.xyzx + mad r7.xyz, r3.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r0.y, r7.y, l(2048), r7.x + imad r7.x, r7.z, l(0x00400000), r0.y + mov_sat r4.xyz, r4.xyzx + mad r8.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r0.y, r8.y, l(2048), r8.x + imad r7.y, r8.z, l(0x00400000), r0.y + mov_sat r5.xz, r6.xxzx + mov_sat r5.y, r5.y + mad r8.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r0.y, r8.y, l(2048), r8.x + imad r7.z, r8.z, l(0x00400000), r0.y + mov_sat r1.xyz, r1.xyzx + mad r8.xyz, r1.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r0.y, r8.y, l(2048), r8.x + imad r1.x, r8.z, l(0x00400000), r0.y + mov r6.xyz, r7.zyxz + break + case l(17) + case l(56) + mov_sat r3.xyz, r3.xyzx + mad r7.xyz, r3.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r0.y, r7.y, l(1024), r7.x + imad r7.x, r7.z, l(0x00200000), r0.y + mov_sat r4.xyz, r4.xyzx + mad r8.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r0.y, r8.y, l(1024), r8.x + imad r7.y, r8.z, l(0x00200000), r0.y + mov_sat r5.xz, r6.xxzx + mov_sat r5.y, r5.y + mad r8.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r0.y, r8.y, l(1024), r8.x + imad r7.z, r8.z, l(0x00200000), r0.y + mov_sat r1.xyz, r1.xyzx + mad r8.xyz, r1.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r0.y, r8.y, l(1024), r8.x + imad r1.x, r8.z, l(0x00200000), r0.y + mov r6.xyz, r7.zyxz + break + case l(25) + mov_sat r3.xy, r3.xyxx + mad r0.yw, r3.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r0.yw, r0.yyyw + imad r6.z, r0.w, l(0x00010000), r0.y + mov_sat r4.xy, r4.xyxx + mad r0.yw, r4.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r0.yw, r0.yyyw + imad r6.y, r0.w, l(0x00010000), r0.y + mov_sat r5.x, r6.x + mov_sat r5.y, r5.y + mad r0.yw, r5.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r0.yw, r0.yyyw + imad r6.x, r0.w, l(0x00010000), r0.y + mov_sat r1.xy, r1.xyxx + mad r0.yw, r1.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r0.yw, r0.yyyw + imad r1.x, r0.w, l(0x00010000), r0.y + break + case l(31) + f32tof16 r7.x, r3.x + f32tof16 r7.y, r4.x + f32tof16 r7.z, r6.x + f32tof16 r7.w, r1.x + f32tof16 r8.x, r3.y + f32tof16 r8.y, r4.y + f32tof16 r8.z, r5.y + f32tof16 r8.w, r1.y + imad r1.xyzw, r8.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r7.wyxz + mov r6.xyz, r1.wyzw + break + default + mov r6.z, r3.x + mov r6.y, r4.x + break +endswitch +if_nz r2.z + if_z vThreadID.x + mov r6.w, r6.y + mov r1.w, r1.x + else + mov r6.w, r6.z + mov r1.w, r6.x + endif + if_z vThreadID.y + mov r1.yz, r1.xxwx + else + mov r1.yz, r6.yywy + endif +else + mov r1.yzw, r6.yyzx +endif +bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, vThreadID.xyyx +bfi r2.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r2.w + ubfe r2.y, l(3), l(4), CB0[0][0].z + ushr r2.z, CB0[0][0].w, l(10) + ishl r2.z, r2.z, l(5) + ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r2.w, r2.y, l(2) + ushr r2.z, r2.z, l(4) + and r2.z, r2.z, l(0x00007ffe) + imad r2.z, r2.w, r2.z, r3.x + ushr r3.x, r2.x, l(5) + imad r2.z, r2.z, r3.x, r3.y + ishl r3.x, r0.z, l(10) + and r3.x, r3.x, l(6144) + bfi r3.x, l(3), l(8), r0.w, r3.x + ishr r3.x, r3.x, l(6) + iadd r2.w, r2.w, r3.z + bfi r3.y, l(1), l(1), r2.w, l(0) + iadd r3.y, r3.y, r3.w + bfi r3.y, l(2), l(1), r3.y, l(0) + bfi r2.w, l(1), l(0), r2.w, r3.y + and r3.y, r3.x, l(112) + bfi r3.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r2.zzzz, l(0, 0, 0, 0) + imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz + bfi r3.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r3.xxxx, r3.yzyy + bfi r2.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r2.yyyy, r3.xxyx + ubfe r3.x, l(3), l(6), r2.y + and r3.y, r2.w, l(6) + bfi r2.w, l(1), l(8), r2.w, l(0) + imad r2.w, r3.x, l(32), r2.w + imad r2.w, r3.y, l(4), r2.w + bfi r2.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r2.yyzy + bfi r2.z, l(9), l(3), r2.w, r2.z + bfi r2.y, l(6), l(0), r2.y, r2.z +else + ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r2.x, l(5) + imad r0.x, r3.y, r0.x, r3.x + ishl r2.xz, r0.zzzz, l(4, 0, 7, 0) + and r2.xz, r2.xxzx, l(224, 0, 2048, 0) + bfi r0.y, l(3), l(2), r0.w, r2.x + ishl r2.x, r2.x, l(1) + bfi r0.w, l(3), l(3), r0.w, r2.x + and r0.w, r0.w, l(480) + bfi r2.x, l(23), l(9), r0.x, r0.w + bfi r2.x, l(4), l(0), r0.y, r2.x + bfi r2.x, l(1), l(4), r0.z, r2.x + ishl r3.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r2.z, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r3.z, l(2) + iadd r0.y, r3.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r2.y, l(6), l(0), r2.x, r0.x +endif +ushr r0.x, r2.y, l(2) +and r0.y, CB0[0][0].z, l(7) +ieq r0.yzw, r0.yyyy, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r2.xyzw, r1.zywx, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.zywx, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.wyxz, r3.wyxz +endif +if_nz r0.z + ushr r2.xyzw, r1.zywx, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.wyxz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.zywx +ret +// Approximately 1234 instruction slots used +#endif + +const BYTE resolve_full_32bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 168, 163, + 39, 82, 134, 125, 13, 39, + 252, 228, 22, 156, 122, 213, + 73, 149, 1, 0, 0, 0, + 0, 149, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 100, 148, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 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0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 85, 0, 0, 10, 242, 0, + 16, 0, 3, 0, 0, 0, + 102, 3, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 1, 0, + 0, 0, 118, 8, 16, 0, + 2, 0, 0, 0, 118, 8, + 16, 0, 3, 0, 0, 0, + 21, 0, 0, 1, 31, 0, + 4, 3, 42, 0, 16, 0, + 0, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 102, 3, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 118, 8, 16, 0, + 2, 0, 0, 0, 21, 0, + 0, 1, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 102, 3, 16, 0, + 1, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 210, 4, + 0, 0, 21, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 133, 0, 0, 0, + 222, 0, 0, 0, 165, 0, + 0, 0, 56, 0, 0, 0, + 24, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 241, 0, 0, 0, + 65, 0, 0, 0, 84, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_cs.h new file mode 100644 index 000000000..6f8b8d9f7 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_cs.h @@ -0,0 +1,8096 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 23 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].xzzz, l(1023, 0x01000000, 8, 7) +ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r2.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r2.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.x, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w +iadd r2.x, r2.z, r4.z +ishl r2.y, l(4), r2.x +ishl r1.w, r1.w, l(2) +if_nz r4.z + ieq r2.z, r2.y, l(8) + if_nz r2.z + ld_raw r5.xyzw, r1.w, T0[0].zwxy + iadd r2.z, r1.w, l(16) + ld_raw r6.xyzw, r2.z, T0[0].zwxy + mov r7.xy, r5.zwzz + mov r8.xy, r6.zwzz + else + ld_raw r7.xy, r1.w, T0[0].xyxx + iadd r2.z, r2.y, r1.w + ld_raw r5.xy, r2.z, T0[0].xyxx + ishl r2.zw, l(0, 0, 8, 12), r2.xxxx + iadd r2.zw, r1.wwww, r2.zzzw + ld_raw r8.xy, r2.z, T0[0].xyxx + ld_raw r6.xy, r2.w, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r5.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r6.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.xxxy, l(0, 0, 16, 16) + f16tof32 r7.xz, r7.xxyx + f16tof32 r7.yw, r2.zzzw + ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) + f16tof32 r5.xz, r5.xxyx + f16tof32 r5.yw, r2.zzzw + ushr r2.zw, r8.xxxy, l(0, 0, 16, 16) + f16tof32 r8.xz, r8.xxyx + f16tof32 r8.yw, r2.zzzw + ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) + f16tof32 r6.xz, r6.xxyx + f16tof32 r6.yw, r2.zzzw + break + default + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + endswitch +else + ieq r2.z, r2.y, l(4) + if_nz r2.z + ld_raw r6.xyzw, r1.w, T0[0].wxyz + else + ld_raw r6.y, r1.w, T0[0].xxxx + iadd r2.z, r2.y, r1.w + ld_raw r6.z, r2.z, T0[0].xxxx + ishl r2.zw, l(0, 0, 8, 12), r2.xxxx + iadd r2.zw, r1.wwww, r2.zzzw + ld_raw r6.w, r2.z, T0[0].xxxx + ld_raw r6.x, r2.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r9.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r9.x, r6.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r9.x, r6.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r6.wwww, l(0, 8, 16, 24) + mov r9.x, r6.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r9.x, r6.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r9.x, r6.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r6.wwww, l(0, 10, 20, 30) + mov r9.x, r6.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r10.x, r6.y + mov r10.yz, r9.xxyx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.zw, r9.zzzw + ushr r9.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r10.x, r6.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r5.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r9.x, r6.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r4.xy, r9.xwxx + mov r9.x, r6.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r6.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r7.w, r2.z + mov r5.w, r2.w + mov r8.w, r4.x + mov r6.w, r4.y + break + case l(4) + ishl r9.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r6.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r9.zzwz + ishr r9.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r9.x + f16tof32 r5.x, r6.z + f16tof32 r5.y, r9.y + f16tof32 r8.x, r6.w + f16tof32 r8.y, r9.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r9.w + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r5.x, r6.z + mov r5.yzw, l(0,0,0,0) + mov r8.x, r6.w + mov r8.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break + endswitch +endif +ibfe r2.z, l(6), l(16), CB0[0][0].z +ishl r2.z, r2.z, l(23) +iadd r2.z, r2.z, l(0x3f800000) +uge r2.w, r1.y, l(4) +if_nz r2.w + mul r2.w, r2.z, l(0.500000) + ishl r3.x, l(320), r4.z + iadd r3.x, r1.w, r3.x + if_nz r4.z + ieq r4.x, r2.y, l(8) + if_nz r4.x + ld_raw r9.xyzw, r3.x, T0[0].zwxy + iadd r4.x, r3.x, l(16) + ld_raw r10.xyzw, r4.x, T0[0].zwxy + mov r11.xy, r9.zwzz + mov r12.xy, r10.zwzz + else + ld_raw r11.xy, r3.x, T0[0].xyxx + iadd r4.x, r2.y, r3.x + ld_raw r9.xy, r4.x, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r3.xxxx, r4.xyxx + ld_raw r12.xy, r4.x, T0[0].xyxx + ld_raw r10.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) + f16tof32 r11.xz, r11.xxyx + f16tof32 r11.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) + f16tof32 r12.xz, r12.xxyx + f16tof32 r12.yw, r4.xxxy + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + break + default + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + endswitch + else + ieq r4.x, r2.y, l(4) + if_nz r4.x + ld_raw r10.xyzw, r3.x, T0[0].wxyz + else + ld_raw r10.y, r3.x, T0[0].xxxx + iadd r4.x, r2.y, r3.x + ld_raw r10.z, r4.x, T0[0].xxxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r3.xxxx, r4.xyxx + ld_raw r10.w, r4.x, T0[0].xxxx + ld_raw r10.x, r4.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r14.x, r10.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r4.xy, r13.zwzz + ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r14.x, r10.z + mov r14.yz, r13.xxwx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r13.x, r10.w + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r14.xy, r13.xwxx + mov r13.x, r10.x + and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r16.xyzx, r13.xyzx + movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) + mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r4.x + mov r9.w, r4.y + mov r12.w, r13.x + mov r10.w, r13.y + break + case l(4) + ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r10.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r13.zzwz + ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r13.x + f16tof32 r9.x, r10.z + f16tof32 r9.y, r13.y + f16tof32 r12.x, r10.w + f16tof32 r12.y, r13.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r13.w + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r9.x, r10.z + mov r9.yzw, l(0,0,0,0) + mov r12.x, r10.w + mov r12.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + endif + add r7.xyzw, r7.xyzw, r11.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r2.z, r2.z, l(0.250000) + ishl r4.xy, l(4, 324, 0, 0), r4.zzzz + iadd r1.yw, r1.wwww, r4.xxxy + if_nz r4.z + ieq r3.x, r2.y, l(8) + if_nz r3.x + ld_raw r9.xyzw, r1.y, T0[0].zwxy + iadd r3.x, r1.y, l(16) + ld_raw r10.xyzw, r3.x, T0[0].zwxy + mov r11.xy, r9.zwzz + mov r12.xy, r10.zwzz + else + ld_raw r11.xy, r1.y, T0[0].xyxx + iadd r3.x, r2.y, r1.y + ld_raw r9.xy, r3.x, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r12.xy, r4.x, T0[0].xyxx + ld_raw r10.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) + f16tof32 r11.xz, r11.xxyx + f16tof32 r11.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) + f16tof32 r12.xz, r12.xxyx + f16tof32 r12.yw, r4.xxxy + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + break + default + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + endswitch + else + ieq r3.x, r2.y, l(4) + if_nz r3.x + ld_raw r10.xyzw, r1.y, T0[0].wxyz + else + ld_raw r10.y, r1.y, T0[0].xxxx + iadd r3.x, r2.y, r1.y + ld_raw r10.z, r3.x, T0[0].xxxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r10.w, r4.x, T0[0].xxxx + ld_raw r10.x, r4.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r14.x, r10.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r4.xy, r13.zwzz + ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r14.x, r10.z + mov r14.yz, r13.xxwx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r13.x, r10.w + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r14.xy, r13.xwxx + mov r13.x, r10.x + and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r16.xyzx, r13.xyzx + movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) + mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r4.x + mov r9.w, r4.y + mov r12.w, r13.x + mov r10.w, r13.y + break + case l(4) + ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r10.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r13.zzwz + ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r13.x + f16tof32 r9.x, r10.z + f16tof32 r9.y, r13.y + f16tof32 r12.x, r10.w + f16tof32 r12.y, r13.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r13.w + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r9.x, r10.z + mov r9.yzw, l(0,0,0,0) + mov r12.x, r10.w + mov r12.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + endif + add r11.xyzw, r7.xyzw, r11.xyzw + add r9.xyzw, r5.xyzw, r9.xyzw + add r12.xyzw, r8.xyzw, r12.xyzw + add r10.xyzw, r6.xyzw, r10.xyzw + if_nz r4.z + ieq r1.y, r2.y, l(8) + if_nz r1.y + ld_raw r13.xyzw, r1.w, T0[0].zwxy + iadd r1.y, r1.w, l(16) + ld_raw r14.xyzw, r1.y, T0[0].zwxy + mov r15.xy, r13.zwzz + mov r16.xy, r14.zwzz + else + ld_raw r15.xy, r1.w, T0[0].xyxx + iadd r1.y, r2.y, r1.w + ld_raw r13.xy, r1.y, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.wwww, r4.xyxx + ld_raw r16.xy, r4.x, T0[0].xyxx + ld_raw r14.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r15.zw, r15.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r15.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.zw, r13.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r13.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.zw, r16.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r16.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r14.zw, r14.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r14.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r15.xyxx, l(16, 16, 0, 0) + f16tof32 r15.xz, r15.xxyx + f16tof32 r15.yw, r4.xxxy + ushr r4.xy, r13.xyxx, l(16, 16, 0, 0) + f16tof32 r13.xz, r13.xxyx + f16tof32 r13.yw, r4.xxxy + ushr r4.xy, r16.xyxx, l(16, 16, 0, 0) + f16tof32 r16.xz, r16.xxyx + f16tof32 r16.yw, r4.xxxy + ushr r4.xy, r14.xyxx, l(16, 16, 0, 0) + f16tof32 r14.xz, r14.xxyx + f16tof32 r14.yw, r4.xxxy + break + default + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + endswitch + else + ieq r1.y, r2.y, l(4) + if_nz r1.y + ld_raw r14.xyzw, r1.w, T0[0].wxyz + else + ld_raw r14.y, r1.w, T0[0].xxxx + iadd r1.y, r2.y, r1.w + ld_raw r14.z, r1.y, T0[0].xxxx + ishl r2.xy, l(8, 12, 0, 0), r2.xxxx + iadd r1.yw, r1.wwww, r2.xxxy + ld_raw r14.w, r1.y, T0[0].xxxx + ld_raw r14.x, r1.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r4.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r4.x, r14.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r4.x, r14.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r13.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r14.wwww, l(0, 8, 16, 24) + mov r4.x, r14.w + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r16.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r4.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r14.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r4.x, r14.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r4.x, r14.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r13.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r14.wwww, l(0, 10, 20, 30) + mov r4.x, r14.w + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r16.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r4.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r14.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r4.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r17.x, r14.y + mov r17.yz, r4.xxyx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r15.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + utof r1.yw, r4.zzzw + ushr r4.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r17.x, r14.z + mov r17.yz, r4.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r4.x, r14.w + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r16.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r2.xy, r4.xwxx + mov r4.x, r14.x + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r15.w, r1.y + mov r13.w, r1.w + mov r16.w, r2.x + mov r14.w, r2.y + break + case l(4) + ishl r4.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r17.xz, r4.xxyx + mov r17.yw, r14.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r4.zzwz + ishr r4.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r4.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r14.y + f16tof32 r15.y, r4.x + f16tof32 r13.x, r14.z + f16tof32 r13.y, r4.y + f16tof32 r16.x, r14.w + f16tof32 r16.y, r4.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r4.w + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r14.y + mov r15.yzw, l(0,0,0,0) + mov r13.x, r14.z + mov r13.yzw, l(0,0,0,0) + mov r16.x, r14.w + mov r16.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + endif + add r7.xyzw, r11.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r13.xyzw + add r8.xyzw, r12.xyzw, r16.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + else + mov r2.z, r2.w + endif +endif +mul r4.xyzw, r2.zzzz, r7.xyzw +mul r5.xyzw, r2.zzzz, r5.xyzw +mul r7.xyzw, r2.zzzz, r8.xyzw +mul r2.xyzw, r2.zzzz, r6.xyzw +if_nz r3.y + mov r4.xz, r4.zzxz + mov r5.xz, r5.zzxz + mov r7.xz, r7.zzxz + mov r6.xz, r2.zzxz +else + mov r6.xz, r2.xxzx +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.z + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r8.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r8.x + ushr r3.x, r1.x, l(5) + imad r1.z, r1.z, r3.x, r8.y + ishl r3.x, r0.z, l(10) + and r3.x, r3.x, l(6144) + bfi r3.x, l(3), l(8), r0.w, r3.x + ishr r3.x, r3.x, l(6) + iadd r1.w, r1.w, r8.z + bfi r3.y, l(1), l(1), r1.w, l(0) + iadd r3.y, r3.y, r8.w + bfi r3.y, l(2), l(1), r3.y, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.y + bfi r3.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r1.zzzz, l(0, 0, 0, 0) + imad r3.xy, r3.xxxx, l(2, 16, 0, 0), r3.yzyy + bfi r1.yz, l(0, 2, 2, 0), l(0, 8, 11, 0), r1.yyyy, r3.xxyx + bfi r3.x, l(1), l(4), r0.z, l(0) + ubfe r3.y, l(3), l(6), r1.y + and r3.z, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.y, l(32), r1.w + imad r1.w, r3.z, l(4), r1.w + bfi r1.yz, l(0, 5, 5, 0), l(0, 0, 3, 0), r3.xxxx, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r8.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r8.y, r0.x, r8.x + ishl r1.xz, r0.zzzz, l(5, 0, 7, 0) + and r1.xz, r1.xxzx, l(448, 0, 2048, 0) + bfi r0.y, l(3), l(3), r0.w, r1.x + bfi r0.y, l(23), l(9), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r0.y, r0.y, r0.z + ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) + bfi r1.xw, l(3, 0, 0, 3), l(6, 0, 0, 5), r0.wwww, r1.xxxw + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r1.xxxw + imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.z, r0.z, l(1792) + iadd r0.x, r0.x, r0.z + and r0.z, r8.z, l(2) + iadd r0.z, r8.w, r0.z + bfi r0.z, l(2), l(6), r0.z, l(0) + iadd r0.x, r0.x, r0.z + bfi r1.y, l(6), l(0), r0.y, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ubfe r0.y, l(6), l(7), CB0[0][0].z +switch r0.y + case l(6) + case l(14) + case l(50) + mov_sat r4.xyzw, r4.xyzw + mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.y, r1.y, l(256), r1.x + imad r0.y, r1.z, l(0x00010000), r0.y + imad r1.x, r1.w, l(0x01000000), r0.y + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(256), r8.x + imad r0.y, r8.z, l(0x00010000), r0.y + imad r1.y, r8.w, l(0x01000000), r0.y + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(256), r8.x + imad r0.y, r8.z, l(0x00010000), r0.y + imad r1.z, r8.w, l(0x01000000), r0.y + mov r6.yw, r2.yyyw + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(256), r8.x + imad r0.y, r8.z, l(0x00010000), r0.y + imad r1.w, r8.w, l(0x01000000), r0.y + mov r6.xyzw, r1.wyxz + break + case l(7) + case l(54) + mov_sat r4.xyzw, r4.xyzw + mad r1.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.y, r1.y, l(1024), r1.x + imad r0.y, r1.z, l(0x00100000), r0.y + imad r1.x, r1.w, l(0x40000000), r0.y + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(1024), r8.x + imad r0.y, r8.z, l(0x00100000), r0.y + imad r1.y, r8.w, l(0x40000000), r0.y + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(1024), r8.x + imad r0.y, r8.z, l(0x00100000), r0.y + imad r1.z, r8.w, l(0x40000000), r0.y + mov_sat r2.xz, r6.xxzx + mov_sat r2.yw, r2.yyyw + mad r8.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r0.y, r8.y, l(1024), r8.x + imad r0.y, r8.z, l(0x00100000), r0.y + imad r1.w, r8.w, l(0x40000000), r0.y + mov r6.xyzw, r1.wyxz + break + case l(16) + case l(55) + mov_sat r4.xyz, r4.xyzx + mad r0.yzw, r4.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(2048), r0.y + imad r1.x, r0.w, l(0x00400000), r0.y + mov_sat r5.xyz, r5.xyzx + mad r0.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(2048), r0.y + imad r1.y, r0.w, l(0x00400000), r0.y + mov_sat r7.xyz, r7.xyzx + mad r0.yzw, r7.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(2048), r0.y + imad r1.z, r0.w, l(0x00400000), r0.y + mov_sat r2.xz, r6.xxzx + mov_sat r2.y, r2.y + mad r0.yzw, r2.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(2048), r0.y + imad r1.w, r0.w, l(0x00400000), r0.y + mov r6.xyzw, r1.wyxz + break + case l(17) + case l(56) + mov_sat r4.xyz, r4.xyzx + mad r0.yzw, r4.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(1024), r0.y + imad r1.x, r0.w, l(0x00200000), r0.y + mov_sat r5.xyz, r5.xyzx + mad r0.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(1024), r0.y + imad r1.y, r0.w, l(0x00200000), r0.y + mov_sat r7.xyz, r7.xyzx + mad r0.yzw, r7.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(1024), r0.y + imad r1.z, r0.w, l(0x00200000), r0.y + mov_sat r2.xz, r6.xxzx + mov_sat r2.y, r2.y + mad r0.yzw, r2.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(1024), r0.y + imad r1.w, r0.w, l(0x00200000), r0.y + mov r6.xyzw, r1.wyxz + break + case l(25) + mov_sat r4.xy, r4.xyxx + mad r0.yz, r4.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r6.z, r0.z, l(0x00010000), r0.y + mov_sat r5.xy, r5.xyxx + mad r0.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r6.y, r0.z, l(0x00010000), r0.y + mov_sat r7.xy, r7.xyxx + mad r0.yz, r7.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r6.w, r0.z, l(0x00010000), r0.y + mov_sat r2.x, r6.x + mov_sat r2.y, r2.y + mad r0.yz, r2.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r6.x, r0.z, l(0x00010000), r0.y + break + case l(31) + f32tof16 r1.x, r4.x + f32tof16 r1.y, r5.x + f32tof16 r1.z, r7.x + f32tof16 r1.w, r6.x + f32tof16 r8.x, r4.y + f32tof16 r8.y, r5.y + f32tof16 r8.z, r7.y + f32tof16 r8.w, r2.y + imad r6.xyzw, r8.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r1.wyxz + break + default + mov r6.z, r4.x + mov r6.y, r5.x + mov r6.w, r7.x + break +endswitch +ieq r0.yzw, r3.wwww, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r6.zywx, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r6.zywx, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r1.wyxz, r2.wyxz +endif +if_nz r0.z + ushr r1.xyzw, r6.zywx, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r1.wyxz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r6.zywx +ret +// Approximately 1302 instruction slots used +#endif + +const BYTE resolve_full_32bpp_cs[] = +{ + 68, 88, 66, 67, 37, 105, + 52, 235, 204, 56, 87, 92, + 177, 87, 116, 179, 182, 176, + 204, 107, 1, 0, 0, 0, + 244, 157, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 88, 157, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 98, 97, 115, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 96, 154, 0, 0, 81, 0, + 5, 0, 152, 38, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 161, 0, 0, 6, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 23, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 41, 0, 0, 9, + 146, 0, 16, 0, 0, 0, + 0, 0, 6, 0, 2, 0, + 2, 64, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 85, 0, 0, 9, + 18, 0, 16, 0, 1, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 7, 0, + 0, 0, 140, 0, 0, 11, + 18, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 11, 0, 0, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 10, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 7, 18, 0, 16, 0, + 1, 0, 0, 0, 58, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 1, 0, + 0, 0, 31, 0, 4, 3, + 10, 0, 16, 0, 1, 0, + 0, 0, 62, 0, 0, 1, + 21, 0, 0, 1, 85, 0, + 0, 12, 50, 0, 16, 0, + 1, 0, 0, 0, 86, 133, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 29, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 54, 0, + 0, 7, 66, 0, 16, 0, + 1, 0, 0, 0, 26, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 140, 0, 0, 20, + 50, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 38, 10, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 54, 0, + 0, 4, 98, 0, 16, 0, + 0, 0, 0, 0, 86, 5, + 2, 0, 30, 0, 0, 7, + 50, 0, 16, 0, 2, 0, + 0, 0, 182, 15, 16, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 2, 0, 0, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 3, 0, 0, 0, + 134, 138, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 255, 3, 0, 0, + 0, 0, 0, 1, 8, 0, + 0, 0, 7, 0, 0, 0, + 138, 0, 0, 17, 242, 0, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 12, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 13, 0, 0, 0, 10, 0, + 0, 0, 29, 0, 0, 0, + 25, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 130, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 58, 0, + 16, 0, 1, 0, 0, 0, + 54, 0, 0, 5, 34, 0, + 16, 0, 5, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 18, 0, 0, 1, + 32, 0, 0, 7, 130, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 5, 0, 0, 0, 31, 0, + 4, 3, 58, 0, 16, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 5, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 18, 0, 0, 1, 54, 0, + 0, 5, 34, 0, 16, 0, + 5, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 21, 0, + 0, 1, 80, 0, 0, 10, + 194, 0, 16, 0, 2, 0, + 0, 0, 86, 5, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 10, 194, 0, + 16, 0, 2, 0, 0, 0, + 166, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 50, 0, 16, 0, + 2, 0, 0, 0, 70, 0, + 16, 0, 2, 0, 0, 0, + 230, 10, 16, 0, 2, 0, + 0, 0, 85, 0, 0, 7, + 18, 0, 16, 0, 5, 0, + 0, 0, 26, 0, 16, 0, + 5, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 10, 50, 0, + 16, 0, 5, 0, 0, 0, + 70, 0, 16, 0, 5, 0, + 0, 0, 2, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 30, 0, + 0, 7, 50, 0, 16, 0, + 2, 0, 0, 0, 70, 0, + 16, 0, 2, 0, 0, 0, + 70, 0, 16, 0, 5, 0, + 0, 0, 78, 0, 0, 11, + 50, 0, 16, 0, 5, 0, + 0, 0, 0, 208, 0, 0, + 70, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 80, 0, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 55, 0, + 0, 9, 130, 0, 16, 0, + 1, 0, 0, 0, 42, 0, + 16, 0, 4, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 41, 0, + 0, 7, 130, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 5, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 2, 0, + 0, 0, 26, 0, 16, 0, + 5, 0, 0, 0, 10, 0, + 16, 0, 3, 0, 0, 0, + 58, 0, 16, 0, 2, 0, + 0, 0, 30, 0, 0, 7, + 130, 0, 16, 0, 2, 0, + 0, 0, 58, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 4, 0, 0, 0, + 35, 0, 0, 13, 50, 0, + 16, 0, 2, 0, 0, 0, + 70, 0, 16, 128, 65, 0, + 0, 0, 5, 0, 0, 0, + 2, 64, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 35, 0, + 0, 9, 18, 0, 16, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 2, 0, 0, 0, + 1, 64, 0, 0, 80, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 41, 0, + 0, 7, 130, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 2, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 5, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 30, 0, 0, 7, + 18, 0, 16, 0, 2, 0, + 0, 0, 42, 0, 16, 0, + 2, 0, 0, 0, 42, 0, + 16, 0, 4, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 2, 0, 0, 0, + 1, 64, 0, 0, 4, 0, + 0, 0, 10, 0, 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16, 0, 2, 0, 0, 0, + 50, 0, 0, 15, 226, 0, + 16, 0, 0, 0, 0, 0, + 6, 9, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 192, + 127, 68, 0, 224, 255, 68, + 0, 224, 255, 68, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 63, 0, 0, + 0, 63, 0, 0, 0, 63, + 28, 0, 0, 5, 226, 0, + 16, 0, 0, 0, 0, 0, + 86, 14, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 34, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 4, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 32, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 54, 0, 0, 5, + 242, 0, 16, 0, 6, 0, + 0, 0, 118, 8, 16, 0, + 1, 0, 0, 0, 2, 0, + 0, 1, 6, 0, 0, 3, + 1, 64, 0, 0, 25, 0, + 0, 0, 54, 32, 0, 5, + 50, 0, 16, 0, 4, 0, + 0, 0, 70, 0, 16, 0, + 4, 0, 0, 0, 50, 0, + 0, 15, 98, 0, 16, 0, + 0, 0, 0, 0, 6, 1, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 255, 127, 71, + 0, 255, 127, 71, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 63, 0, 0, 0, 63, + 0, 0, 0, 0, 28, 0, + 0, 5, 98, 0, 16, 0, + 0, 0, 0, 0, 86, 6, + 16, 0, 0, 0, 0, 0, + 35, 0, 0, 9, 66, 0, + 16, 0, 6, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 1, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 54, 32, 0, 5, 50, 0, + 16, 0, 5, 0, 0, 0, + 70, 0, 16, 0, 5, 0, + 0, 0, 50, 0, 0, 15, + 98, 0, 16, 0, 0, 0, + 0, 0, 6, 1, 16, 0, + 5, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 255, 127, 71, 0, 255, + 127, 71, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 63, + 0, 0, 0, 63, 0, 0, + 0, 0, 28, 0, 0, 5, + 98, 0, 16, 0, 0, 0, + 0, 0, 86, 6, 16, 0, + 0, 0, 0, 0, 35, 0, + 0, 9, 34, 0, 16, 0, + 6, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 1, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 54, 32, + 0, 5, 50, 0, 16, 0, + 7, 0, 0, 0, 70, 0, + 16, 0, 7, 0, 0, 0, + 50, 0, 0, 15, 98, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 7, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 255, + 127, 71, 0, 255, 127, 71, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 63, 0, 0, + 0, 63, 0, 0, 0, 0, + 28, 0, 0, 5, 98, 0, + 16, 0, 0, 0, 0, 0, + 86, 6, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 6, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 1, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 54, 32, 0, 5, + 18, 0, 16, 0, 2, 0, + 0, 0, 10, 0, 16, 0, + 6, 0, 0, 0, 54, 32, + 0, 5, 34, 0, 16, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 2, 0, 0, 0, + 50, 0, 0, 15, 98, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 255, + 127, 71, 0, 255, 127, 71, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 63, 0, 0, + 0, 63, 0, 0, 0, 0, + 28, 0, 0, 5, 98, 0, + 16, 0, 0, 0, 0, 0, + 86, 6, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 18, 0, 16, 0, 6, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 1, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 2, 0, 0, 1, + 6, 0, 0, 3, 1, 64, + 0, 0, 31, 0, 0, 0, + 130, 0, 0, 5, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 16, 0, 4, 0, + 0, 0, 130, 0, 0, 5, + 34, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 5, 0, 0, 0, 130, 0, + 0, 5, 66, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 7, 0, 0, 0, + 130, 0, 0, 5, 130, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 16, 0, 6, 0, + 0, 0, 130, 0, 0, 5, + 18, 0, 16, 0, 8, 0, + 0, 0, 26, 0, 16, 0, + 4, 0, 0, 0, 130, 0, + 0, 5, 34, 0, 16, 0, + 8, 0, 0, 0, 26, 0, + 16, 0, 5, 0, 0, 0, + 130, 0, 0, 5, 66, 0, + 16, 0, 8, 0, 0, 0, + 26, 0, 16, 0, 7, 0, + 0, 0, 130, 0, 0, 5, + 130, 0, 16, 0, 8, 0, + 0, 0, 26, 0, 16, 0, + 2, 0, 0, 0, 35, 0, + 0, 12, 242, 0, 16, 0, + 6, 0, 0, 0, 118, 8, + 16, 0, 8, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 118, 8, 16, 0, + 1, 0, 0, 0, 2, 0, + 0, 1, 10, 0, 0, 1, + 54, 0, 0, 5, 66, 0, + 16, 0, 6, 0, 0, 0, + 10, 0, 16, 0, 4, 0, + 0, 0, 54, 0, 0, 5, + 34, 0, 16, 0, 6, 0, + 0, 0, 10, 0, 16, 0, + 5, 0, 0, 0, 54, 0, + 0, 5, 130, 0, 16, 0, + 6, 0, 0, 0, 10, 0, + 16, 0, 7, 0, 0, 0, + 2, 0, 0, 1, 23, 0, + 0, 1, 32, 0, 0, 10, + 226, 0, 16, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 2, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 7, 98, 0, + 16, 0, 0, 0, 0, 0, + 166, 11, 16, 0, 0, 0, + 0, 0, 86, 6, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 26, 0, 16, 0, + 0, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 1, 0, 0, 0, 102, 3, + 16, 0, 6, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 85, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 102, 3, 16, 0, 6, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 6, 0, + 0, 0, 118, 8, 16, 0, + 1, 0, 0, 0, 118, 8, + 16, 0, 2, 0, 0, 0, + 21, 0, 0, 1, 31, 0, + 4, 3, 42, 0, 16, 0, + 0, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 1, 0, 0, 0, 102, 3, + 16, 0, 6, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 6, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 70, 14, 16, 0, 6, 0, + 0, 0, 118, 8, 16, 0, + 1, 0, 0, 0, 21, 0, + 0, 1, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 102, 3, 16, 0, + 6, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 22, 5, + 0, 0, 23, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 134, 0, 0, 0, + 12, 1, 0, 0, 172, 0, + 0, 0, 62, 0, 0, 0, + 30, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 44, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 203, 0, 0, 0, + 65, 0, 0, 0, 84, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..ec5aca66b --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,26039 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 28 +dcl_thread_group 8, 8, 1 +ishl r0.x, vThreadID.x, l(1) +ushr r0.z, CB0[0][0].y, l(7) +bfi r0.z, l(11), l(3), r0.z, l(0) +uge r0.z, r0.x, r0.z +if_nz r0.z + ret +endif +and r1.xyzw, CB0[0][0].xzzx, l(0x40000000, 7, 8, 1023) +mov r0.y, vThreadID.y +ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) +movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r0.xyyx, r3.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r1.z + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r5.x, r1.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r5.x, r2.w, r4.x + ushr r4.x, r1.x, l(5) + imad r2.w, r2.w, r4.x, r4.y + ishl r4.x, r3.z, l(10) + and r4.x, r4.x, l(6144) + bfi r4.x, l(3), l(8), r3.w, r4.x + ishr r4.x, r4.x, l(6) + iadd r4.y, r4.z, r5.x + bfi r4.z, l(1), l(1), r4.y, l(0) + iadd r4.z, r4.z, r4.w + bfi r4.z, l(2), l(1), r4.z, l(0) + bfi r4.y, l(1), l(0), r4.y, r4.z + and r4.z, r4.x, l(112) + bfi r5.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.zw, r4.zzzz, l(0, 0, 2, 16), r5.xxxy + bfi r4.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r4.xxxx, r4.zzwz + bfi r4.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), r1.zzzz, r4.xxzx + ubfe r1.z, l(3), l(6), r4.x + and r2.w, r4.y, l(6) + bfi r4.y, l(1), l(8), r4.y, l(0) + imad r1.z, r1.z, l(32), r4.y + imad r1.z, r2.w, l(4), r1.z + bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xzxx + bfi r1.z, l(9), l(3), r1.z, r4.y + bfi r1.z, l(6), l(0), r4.x, r1.z +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + ushr r1.x, r1.x, l(5) + imad r1.x, r4.y, r1.x, r4.x + ishl r3.xy, r3.zzzz, l(4, 7, 0, 0) + and r3.xy, r3.xyxx, l(224, 2048, 0, 0) + bfi r2.w, l(3), l(2), r3.w, r3.x + ishl r3.x, r3.x, l(1) + bfi r3.x, l(3), l(3), r3.w, r3.x + and r3.x, r3.x, l(480) + bfi r3.w, l(23), l(9), r1.x, r3.x + bfi r3.w, l(4), l(0), r2.w, r3.w + bfi r3.w, l(1), l(4), r3.z, r3.w + ishl r4.xy, r3.xxxx, l(3, 2, 0, 0) + bfi r4.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.xxxx, r4.xyxx + bfi r4.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r2.wwww, r4.xyxx + bfi r3.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r3.zzzz, r4.xxyx + bfi r1.x, l(12), l(0), r3.y, r3.x + and r2.w, r3.z, l(1792) + iadd r1.x, r1.x, r2.w + and r2.w, r4.z, l(2) + iadd r2.w, r4.w, r2.w + bfi r2.w, l(2), l(6), r2.w, l(0) + iadd r1.x, r1.x, r2.w + bfi r1.z, l(6), l(0), r3.w, r1.x +endif +imul null, r1.x, r1.z, l(9) +ushr r1.x, r1.x, l(3) +bfi r2.xz, l(5, 0, 2, 0), l(3, 0, 3, 0), r2.zzxz, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r2.xzxx +ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx +uge r1.z, l(3), r2.y +if_nz r1.z + mov r4.y, r2.y +else + ieq r1.z, r2.y, l(5) + if_nz r1.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.zzzz, l(2, 0, 1, 0) +and r2.zw, r2.xxxz, l(0, 0, 1, 1) +ishl r0.xy, r0.xyxx, r2.zwzz +ushr r4.x, r4.y, l(1) +and r2.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r0.xy, r0.xyxx, r2.zwzz +udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) +movc r1.z, r3.w, l(1), l(0) +ishl r3.z, r2.z, r1.z +imad r1.w, r2.w, r1.w, r3.z +iadd r1.w, r1.w, r3.y +imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, r1.z +imad r0.x, r1.w, l(1280), r0.x +imul null, r0.y, r0.x, l(36) +ubfe r1.z, l(4), l(25), CB0[0][0].x +ld_raw r4.xyzw, r0.y, T0[0].wxyz +imad r2.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 16, 20) +ld_raw r5.x, r2.z, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + utof r3.yz, r9.zzwz + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r9.x, r4.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r10.xy, r9.xwxx + mov r9.x, r4.x + and r11.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r4.xyz, r11.xyzx, r9.xyzx, l(0,0,0,0) + mul r9.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx + ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r5.xyz, r10.xyzx, r11.xyzx, l(0,0,0,0) + utof r0.y, r5.w + mul r5.w, r0.y, l(0.333333) + mov r6.w, r3.y + mov r7.w, r3.z + mov r8.w, r9.x + mov r4.w, r9.y + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r3.yz, r5.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r5.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.y, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.y + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.y, l(6), l(16), CB0[0][0].z +ishl r0.y, r0.y, l(23) +iadd r0.y, r0.y, l(0x3f800000) +uge r1.w, r2.y, l(4) +if_nz r1.w + mul r2.z, r0.y, l(0.500000) + imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 2880, 2896, 0) + ld_raw r9.xyzw, r3.y, T0[0].wxyz + ld_raw r10.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.w, r10.w + mul r10.w, r3.w, l(0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r3.y, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.y + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.z, r0.y, l(0.250000) + imad r9.xyzw, r0.xxxx, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.w, r11.w + mul r11.w, r3.w, l(0.333333) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r3.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.y + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r3.w, r9.w + mul r9.w, r3.w, l(0.333333) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r3.y, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r3.y + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r2.z, r0.y +endif +mul r6.xyzw, r2.zzzz, r6.xyzw +mul r7.xyzw, r2.zzzz, r7.xyzw +mul r8.xyzw, r2.zzzz, r8.xyzw +mul r4.xyzw, r2.zzzz, r4.xyzw +mul r5.xyzw, r2.zzzz, r5.xyzw +and r2.z, CB0[0][0].z, l(0x01000000) +if_nz r2.z + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r4.zzxz + mov r5.xz, r5.zzxz +else + mov r9.xz, r4.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r3.y, r10.y, l(256), r10.x + imad r3.y, r10.z, l(0x00010000), r3.y + imad r10.x, r10.w, l(0x01000000), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r10.y, r11.w, l(0x01000000), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r10.z, r11.w, l(0x01000000), r3.y + mov r9.yw, r4.yyyw + mov_sat r9.xyzw, r9.xyzw + mad r11.xyzw, r9.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r10.w, r11.w, l(0x01000000), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r5.x, r11.w, l(0x01000000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(7) + case l(54) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r3.y, r10.y, l(1024), r10.x + imad r3.y, r10.z, l(0x00100000), r3.y + imad r10.x, r10.w, l(0x40000000), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r10.y, r11.w, l(0x40000000), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r10.z, r11.w, l(0x40000000), r3.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.yw, r4.yyyw + mad r11.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r10.w, r11.w, l(0x40000000), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r5.x, r11.w, l(0x40000000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(16) + case l(55) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.x, r3.w, l(0x00400000), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.y, r3.w, l(0x00400000), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.z, r3.w, l(0x00400000), r3.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r3.yzw, r4.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.w, r3.w, l(0x00400000), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r5.x, r3.w, l(0x00400000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(17) + case l(56) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.x, r3.w, l(0x00200000), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.y, r3.w, l(0x00200000), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.z, r3.w, l(0x00200000), r3.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r3.yzw, r4.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.w, r3.w, l(0x00200000), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r5.x, r3.w, l(0x00200000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(25) + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.z, r3.z, l(0x00010000), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.y, r3.z, l(0x00010000), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.w, r3.z, l(0x00010000), r3.y + mov_sat r4.x, r9.x + mov_sat r4.y, r4.y + mad r3.yz, r4.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.x, r3.z, l(0x00010000), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r5.x, r3.z, l(0x00010000), r3.y + break + case l(31) + f32tof16 r10.x, r6.x + f32tof16 r10.y, r7.x + f32tof16 r10.z, r8.x + f32tof16 r10.w, r9.x + f32tof16 r11.x, r6.y + f32tof16 r11.y, r7.y + f32tof16 r11.z, r8.y + f32tof16 r11.w, r4.y + imad r9.xyzw, r11.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.wyxz + f32tof16 r3.yz, r5.xxyx + imad r5.x, r3.z, l(0x00010000), r3.y + break + default + mov r9.z, r6.x + mov r9.y, r7.x + mov r9.w, r8.x + break +endswitch +ieq r3.yzw, r1.yyyy, l(0, 1, 2, 3) +or r3.yz, r3.zzwz, r3.yyzy +if_nz r3.y + ishl r4.xyzw, r9.zywx, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r9.zywx, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r9.xyzw, r4.wyxz, r6.wyxz + ishl r1.y, r5.x, l(8) + and r1.y, r1.y, l(0xff00ff00) + ushr r3.w, r5.x, l(8) + and r3.w, r3.w, l(0x00ff00ff) + iadd r5.x, r1.y, r3.w +endif +if_nz r3.z + ushr r4.xyzw, r9.zywx, l(16, 16, 16, 16) + bfi r9.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r9.xyzw, r4.wyxz + ushr r1.y, r5.x, l(16) + bfi r5.x, l(16), l(16), r5.x, r1.y + mov r5.yz, r9.xxwx +else + mov r5.yz, r9.xxwx +endif +if_nz r0.z + mov r9.z, r9.y + mov r5.y, r5.x +endif +if_nz r0.w + mov r9.yz, r5.xxyx +endif +store_uav_typed U0[0].xyzw, r1.xxxx, r9.zyzz +ld_raw r4.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r6.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + utof r9.xy, r9.zwzz + ushr r10.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r11.x, r4.z + mov r11.yz, r10.xxwx + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r7.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mov r10.x, r4.w + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r8.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r9.zw, r10.xxxw + mov r10.x, r4.x + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r4.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r9.xyzw, r9.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r6.w, r9.x + mov r7.w, r9.y + mov r8.w, r9.z + mov r4.w, r9.w + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.y, r0.y, l(0.500000) + imad r2.w, r0.x, l(36), l(2900) + ld_raw r9.xyzw, r2.w, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r13.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r13.x, r9.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r13.x, r9.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r9.wwww, l(0, 8, 16, 24) + mov r13.x, r9.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r13.x, r9.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r13.x, r9.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r9.wwww, l(0, 10, 20, 30) + mov r13.x, r9.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r14.x, r9.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r13.xy, r13.zwzz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r12.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r13.zw, r14.xxxw + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r13.xyzw, r13.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r10.w, r13.x + mov r11.w, r13.y + mov r12.w, r13.z + mov r9.w, r13.w + break + case l(4) + ishl r13.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r9.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r13.zzwz + ishr r13.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r10.x, r9.y + f16tof32 r10.y, r13.x + f16tof32 r11.x, r9.z + f16tof32 r11.y, r13.y + f16tof32 r12.x, r9.w + f16tof32 r12.y, r13.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r13.w + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.x, r9.y + mov r10.yzw, l(0,0,0,0) + mov r11.x, r9.z + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.w + mov r12.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r11.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r1.y, r0.y, l(0.250000) + imad r9.xy, r0.xxxx, l(36, 36, 0, 0), l(56, 2936, 0, 0) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r15.x, r10.y + mov r15.yz, r14.xxyx + and r9.xzw, r15.xxyz, l(1023, 0, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r11.xyz, r9.xzwx, r15.xyzx, l(0,0,0,0) + utof r9.xz, r14.zzwz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r15.x, r10.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xz, r9.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r14.x, r10.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r10.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r10.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r9.x + mov r12.w, r9.z + mov r13.w, r14.x + mov r10.w, r14.y + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r11.xyzw, r6.xyzw, r11.xyzw + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r8.xyzw, r13.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + ld_raw r9.xyzw, r9.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r17.x, r9.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r17.x, r9.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r9.wwww, l(0, 8, 16, 24) + mov r17.x, r9.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r9.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r17.x, r9.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r17.x, r9.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r9.wwww, l(0, 10, 20, 30) + mov r17.x, r9.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r9.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r18.x, r9.y + mov r18.yz, r17.xxyx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r14.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + utof r17.xy, r17.zwzz + ushr r18.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r19.x, r9.z + mov r19.yz, r18.xxwx + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + mov r18.x, r9.w + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r16.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + ushr r18.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r17.zw, r18.xxxw + mov r18.x, r9.x + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r9.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r17.xyzw, r17.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r14.w, r17.x + mov r15.w, r17.y + mov r16.w, r17.z + mov r9.w, r17.w + break + case l(4) + ishl r17.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r9.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r17.zzwz + ishr r17.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r9.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r9.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r9.w + f16tof32 r16.y, r17.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r17.w + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r14.x, r9.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r9.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r9.w + mov r16.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r11.xyzw, r14.xyzw + add r7.xyzw, r12.xyzw, r15.xyzw + add r8.xyzw, r13.xyzw, r16.xyzw + add r4.xyzw, r9.xyzw, r10.xyzw + endif +else + mov r1.y, r0.y +endif +mul r6.xyzw, r1.yyyy, r6.xyzw +mul r7.xyzw, r1.yyyy, r7.xyzw +mul r8.xyzw, r1.yyyy, r8.xyzw +mul r4.xyzw, r1.yyyy, r4.xyzw +if_nz r2.z + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r4.zzxz +else + mov r9.xz, r4.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r1.y, r10.y, l(256), r10.x + imad r1.y, r10.z, l(0x00010000), r1.y + imad r10.x, r10.w, l(0x01000000), r1.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(256), r11.x + imad r1.y, r11.z, l(0x00010000), r1.y + imad r10.y, r11.w, l(0x01000000), r1.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(256), r11.x + imad r1.y, r11.z, l(0x00010000), r1.y + imad r10.z, r11.w, l(0x01000000), r1.y + mov r9.yw, r4.yyyw + mov_sat r9.xyzw, r9.xyzw + mad r11.xyzw, r9.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(256), r11.x + imad r1.y, r11.z, l(0x00010000), r1.y + imad r10.w, r11.w, l(0x01000000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(7) + case l(54) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r1.y, r10.y, l(1024), r10.x + imad r1.y, r10.z, l(0x00100000), r1.y + imad r10.x, r10.w, l(0x40000000), r1.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(1024), r11.x + imad r1.y, r11.z, l(0x00100000), r1.y + imad r10.y, r11.w, l(0x40000000), r1.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(1024), r11.x + imad r1.y, r11.z, l(0x00100000), r1.y + imad r10.z, r11.w, l(0x40000000), r1.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.yw, r4.yyyw + mad r11.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(1024), r11.x + imad r1.y, r11.z, l(0x00100000), r1.y + imad r10.w, r11.w, l(0x40000000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(16) + case l(55) + mov_sat r6.xyz, r6.xyzx + mad r10.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r10.xyz, r10.xyzx + imad r1.y, r10.y, l(2048), r10.x + imad r10.x, r10.z, l(0x00400000), r1.y + mov_sat r7.xyz, r7.xyzx + mad r11.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(2048), r11.x + imad r10.y, r11.z, l(0x00400000), r1.y + mov_sat r8.xyz, r8.xyzx + mad r11.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(2048), r11.x + imad r10.z, r11.z, l(0x00400000), r1.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r11.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(2048), r11.x + imad r10.w, r11.z, l(0x00400000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(17) + case l(56) + mov_sat r6.xyz, r6.xyzx + mad r10.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r10.xyz, r10.xyzx + imad r1.y, r10.y, l(1024), r10.x + imad r10.x, r10.z, l(0x00200000), r1.y + mov_sat r7.xyz, r7.xyzx + mad r11.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(1024), r11.x + imad r10.y, r11.z, l(0x00200000), r1.y + mov_sat r8.xyz, r8.xyzx + mad r11.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(1024), r11.x + imad r10.z, r11.z, l(0x00200000), r1.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r11.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(1024), r11.x + imad r10.w, r11.z, l(0x00200000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(25) + mov_sat r6.xy, r6.xyxx + mad r4.zw, r6.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r4.zw, r4.zzzw + imad r9.z, r4.w, l(0x00010000), r4.z + mov_sat r7.xy, r7.xyxx + mad r4.zw, r7.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r4.zw, r4.zzzw + imad r9.y, r4.w, l(0x00010000), r4.z + mov_sat r8.xy, r8.xyxx + mad r4.zw, r8.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r4.zw, r4.zzzw + imad r9.w, r4.w, l(0x00010000), r4.z + mov_sat r4.x, r9.x + mov_sat r4.y, r4.y + mad r4.xz, r4.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r4.xz, r4.xxzx + imad r9.x, r4.z, l(0x00010000), r4.x + break + case l(31) + f32tof16 r10.x, r6.x + f32tof16 r10.y, r7.x + f32tof16 r10.z, r8.x + f32tof16 r10.w, r9.x + f32tof16 r11.x, r6.y + f32tof16 r11.y, r7.y + f32tof16 r11.z, r8.y + f32tof16 r11.w, r4.y + imad r9.xyzw, r11.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.wyxz + break + default + mov r9.z, r6.x + mov r9.y, r7.x + mov r9.w, r8.x + break +endswitch +if_nz r3.y + ishl r4.xyzw, r9.zywx, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r9.zywx, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r9.xyzw, r4.wyxz, r6.wyxz +endif +if_nz r3.z + ushr r4.xyzw, r9.zywx, l(16, 16, 16, 16) + bfi r9.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r9.xyzw, r4.wyxz + mov r5.w, r9.z + mov r9.xzw, r9.xxyw +else + mov r5.w, r9.z + mov r9.xzw, r9.xxyw +endif +if_nz r0.z + mov r9.z, r9.w +endif +if_nz r0.w + mov r5.z, r5.w +endif +iadd r4.xyzw, r1.xxxx, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.zyzz +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xwxx +store_uav_typed U0[0].xyzw, r4.zzzz, r9.zwzz +movc r0.z, r2.x, l(72), l(36) +imad r0.x, r0.x, l(36), r0.z +ld_raw r5.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r6.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.wwww, l(0, 8, 16, 24) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.wwww, l(0, 10, 20, 30) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r4.x, r5.y + mov r4.yz, r11.xxyx + and r12.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r15.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r14.xyzx, r13.xyzx, r4.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r13.xyzx, r4.xyzx + movc r7.xyz, r12.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r11.zwzz + ushr r11.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r12.x, r5.z + mov r12.yz, r11.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.x, r5.w + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r10.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r9.yw, r11.xxxw + mov r11.x, r5.x + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r5.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r13.xyzx, r12.xyzx, r14.xyzx + ishl r13.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r6.xyz, r11.xyzx, r12.xyzx, l(0,0,0,0) + utof r0.z, r6.w + mul r6.w, r0.z, l(0.333333) + mov r7.w, r4.x + mov r8.w, r4.y + mov r10.w, r9.y + mov r5.w, r9.w + break + case l(4) + ishl r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r12.xz, r11.xxyx + mov r12.yw, r5.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r11.zzwz + ishr r11.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r6.y, r6.x, l(16) + ishr r4.xy, r6.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r6.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r5.y + f16tof32 r7.y, r11.x + f16tof32 r8.x, r5.z + f16tof32 r8.y, r11.y + f16tof32 r10.x, r5.w + f16tof32 r10.y, r11.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r11.w + ushr r0.z, r6.x, l(16) + f16tof32 r6.x, r6.x + f16tof32 r6.y, r0.z + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r5.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.z + mov r8.yzw, l(0,0,0,0) + mov r10.x, r5.w + mov r10.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r0.y, l(0.500000) + iadd r4.xy, r0.xxxx, l(2880, 2896, 0, 0) + ld_raw r11.xyzw, r4.x, T0[0].wxyz + ld_raw r12.x, r4.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r4.x, r11.y + mov r4.yz, r16.xxyx + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r13.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r16.zwzz + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r17.x, r11.z + mov r17.yz, r16.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r16.x, r11.w + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r9.yw, r16.xxxw + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx + ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) + utof r1.y, r12.w + mul r12.w, r1.y, l(0.333333) + mov r13.w, r4.x + mov r14.w, r4.y + mov r15.w, r9.y + mov r11.w, r9.w + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r4.xy, r12.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r12.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + ushr r1.y, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r1.y + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r5.xyzw, r11.xyzw + add r6.xyzw, r6.xyzw, r12.xyzw + uge r1.y, r2.y, l(6) + if_nz r1.y + mul r0.z, r0.y, l(0.250000) + iadd r11.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r12.xyzw, r11.x, T0[0].wxyz + ld_raw r13.x, r11.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r4.x, r12.y + mov r4.yz, r17.xxyx + and r18.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r21.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r20.xyzx, r19.xyzx, r4.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r19.xyzx, r4.xyzx + movc r14.xyz, r18.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r17.zwzz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r18.x, r12.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r17.x, r12.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r9.yw, r17.xxxw + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r1.y, r13.w + mul r13.w, r1.y, l(0.333333) + mov r14.w, r4.x + mov r15.w, r4.y + mov r16.w, r9.y + mov r12.w, r9.w + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r4.xy, r13.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r13.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r1.y, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r1.y + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r7.xyzw, r14.xyzw + add r15.xyzw, r8.xyzw, r15.xyzw + add r16.xyzw, r10.xyzw, r16.xyzw + add r12.xyzw, r5.xyzw, r12.xyzw + add r13.xyzw, r6.xyzw, r13.xyzw + ld_raw r17.xyzw, r11.z, T0[0].wxyz + ld_raw r11.x, r11.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) + mov r4.x, r17.y + mov r4.yz, r21.xxyx + and r22.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r25.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r24.xyzx, r23.xyzx, r4.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r23.xyzx, r4.xyzx + movc r18.xyz, r22.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r21.zwzz + ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) + mov r22.x, r17.z + mov r22.yz, r21.xxwx + and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) + and r24.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r24.xyzx, r22.xyzx + movc r19.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r21.x, r17.w + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r20.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) + utof r9.yw, r21.xxxw + mov r21.x, r17.x + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r24.xyz, r24.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx + ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r11.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) + utof r1.y, r11.w + mul r11.w, r1.y, l(0.333333) + mov r18.w, r4.x + mov r19.w, r4.y + mov r20.w, r9.y + mov r17.w, r9.w + break + case l(4) + ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + mov r22.xz, r21.xxyx + mov r22.yw, r17.yyyz + ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.yz, r21.zzwz + ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r4.xy, r11.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r11.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + f16tof32 r18.x, r17.y + f16tof32 r18.y, r21.x + f16tof32 r19.x, r17.z + f16tof32 r19.y, r21.y + f16tof32 r20.x, r17.w + f16tof32 r20.y, r21.z + f16tof32 r17.x, r17.x + f16tof32 r17.y, r21.w + ushr r1.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r1.y + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r18.x, r17.y + mov r18.yzw, l(0,0,0,0) + mov r19.x, r17.z + mov r19.yzw, l(0,0,0,0) + mov r20.x, r17.w + mov r20.yzw, l(0,0,0,0) + mov r17.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r14.xyzw, r18.xyzw + add r8.xyzw, r15.xyzw, r19.xyzw + add r10.xyzw, r16.xyzw, r20.xyzw + add r5.xyzw, r12.xyzw, r17.xyzw + add r6.xyzw, r11.xyzw, r13.xyzw + endif +else + mov r0.z, r0.y +endif +mul r7.xyzw, r0.zzzz, r7.xyzw +mul r8.xyzw, r0.zzzz, r8.xyzw +mul r10.xyzw, r0.zzzz, r10.xyzw +mul r5.xyzw, r0.zzzz, r5.xyzw +mul r6.xyzw, r0.zzzz, r6.xyzw +if_nz r2.z + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r10.xz, r10.zzxz + mov r11.xz, r5.zzxz + mov r6.xz, r6.zzxz +else + mov r11.xz, r5.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r0.z, r12.y, l(256), r12.x + imad r0.z, r12.z, l(0x00010000), r0.z + imad r12.x, r12.w, l(0x01000000), r0.z + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r12.y, r13.w, l(0x01000000), r0.z + mov_sat r10.xyzw, r10.xyzw + mad r13.xyzw, r10.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r12.z, r13.w, l(0x01000000), r0.z + mov r11.yw, r5.yyyw + mov_sat r11.xyzw, r11.xyzw + mad r13.xyzw, r11.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r12.w, r13.w, l(0x01000000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r6.x, r13.w, l(0x01000000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(7) + case l(54) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r0.z, r12.y, l(1024), r12.x + imad r0.z, r12.z, l(0x00100000), r0.z + imad r12.x, r12.w, l(0x40000000), r0.z + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r12.y, r13.w, l(0x40000000), r0.z + mov_sat r10.xyzw, r10.xyzw + mad r13.xyzw, r10.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r12.z, r13.w, l(0x40000000), r0.z + mov_sat r5.xz, r11.xxzx + mov_sat r5.yw, r5.yyyw + mad r13.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r12.w, r13.w, l(0x40000000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r6.x, r13.w, l(0x40000000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(16) + case l(55) + mov_sat r7.xyz, r7.xyzx + mad r4.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.x, r4.z, l(0x00400000), r0.z + mov_sat r8.xyz, r8.xyzx + mad r4.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.y, r4.z, l(0x00400000), r0.z + mov_sat r10.xyz, r10.xyzx + mad r4.xyz, r10.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.z, r4.z, l(0x00400000), r0.z + mov_sat r5.xz, r11.xxzx + mov_sat r5.y, r5.y + mad r4.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.w, r4.z, l(0x00400000), r0.z + mov_sat r6.xyz, r6.xyzx + mad r4.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r6.x, r4.z, l(0x00400000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(17) + case l(56) + mov_sat r7.xyz, r7.xyzx + mad r4.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.x, r4.z, l(0x00200000), r0.z + mov_sat r8.xyz, r8.xyzx + mad r4.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.y, r4.z, l(0x00200000), r0.z + mov_sat r10.xyz, r10.xyzx + mad r4.xyz, r10.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.z, r4.z, l(0x00200000), r0.z + mov_sat r5.xz, r11.xxzx + mov_sat r5.y, r5.y + mad r4.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.w, r4.z, l(0x00200000), r0.z + mov_sat r6.xyz, r6.xyzx + mad r4.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r6.x, r4.z, l(0x00200000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(25) + mov_sat r7.xy, r7.xyxx + mad r4.xy, r7.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.z, r4.y, l(0x00010000), r4.x + mov_sat r8.xy, r8.xyxx + mad r4.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.y, r4.y, l(0x00010000), r4.x + mov_sat r10.xy, r10.xyxx + mad r4.xy, r10.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.w, r4.y, l(0x00010000), r4.x + mov_sat r5.x, r11.x + mov_sat r5.y, r5.y + mad r4.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.x, r4.y, l(0x00010000), r4.x + mov_sat r6.xy, r6.xyxx + mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r6.x, r4.y, l(0x00010000), r4.x + break + case l(31) + f32tof16 r12.x, r7.x + f32tof16 r12.y, r8.x + f32tof16 r12.z, r10.x + f32tof16 r12.w, r11.x + f32tof16 r13.x, r7.y + f32tof16 r13.y, r8.y + f32tof16 r13.z, r10.y + f32tof16 r13.w, r5.y + imad r11.xyzw, r13.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r12.wyxz + f32tof16 r0.z, r6.x + f32tof16 r1.y, r6.y + imad r6.x, r1.y, l(0x00010000), r0.z + break + default + mov r11.z, r7.x + mov r11.y, r8.x + mov r11.w, r10.x + break +endswitch +if_nz r3.y + ishl r5.xyzw, r11.zywx, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r11.zywx, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r11.xyzw, r5.wyxz, r7.wyxz + ishl r0.z, r6.x, l(8) + and r0.z, r0.z, l(0xff00ff00) + ushr r1.y, r6.x, l(8) + and r1.y, r1.y, l(0x00ff00ff) + iadd r6.x, r0.z, r1.y +endif +if_nz r3.z + ushr r5.xyzw, r11.zywx, l(16, 16, 16, 16) + bfi r11.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r11.xyzw, r5.wyxz + ushr r0.z, r6.x, l(16) + bfi r6.x, l(16), l(16), r6.x, r0.z + mov r9.z, r11.z + mov r11.zw, r11.yyyw + mov r6.z, r11.x +else + mov r9.z, r11.z + mov r11.zw, r11.yyyw + mov r6.z, r11.x +endif +if_nz r0.w + mov r9.z, r6.z + mov r11.z, r6.x +endif +store_uav_typed U0[0].xyzw, r4.wwww, r9.xzxx +ld_raw r4.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r5.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r7.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r4.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r6.yw, r9.xxxw + mov r9.x, r4.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r5.w, r2.x + mov r7.w, r2.w + mov r8.w, r6.y + mov r4.w, r6.w + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r5.x, r4.y + f16tof32 r5.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + default + mov r5.x, r4.y + mov r5.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r0.y, l(0.500000) + iadd r1.y, r0.x, l(2900) + ld_raw r9.xyzw, r1.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + utof r1.yw, r14.zzzw + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r2.xw, r14.xxxw + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r10.w, r1.y + mov r12.w, r1.w + mov r13.w, r2.x + mov r9.w, r2.w + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r10.x, r9.y + f16tof32 r10.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.x, r9.y + mov r10.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + uge r1.y, r2.y, l(6) + if_nz r1.y + mul r0.y, r0.y, l(0.250000) + iadd r1.yw, r0.xxxx, l(0, 56, 0, 2936) + ld_raw r9.xyzw, r1.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r2.xyw, r15.xyxz, l(1023, 1023, 0, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r10.xyz, r2.xywx, r15.xyzx, l(0,0,0,0) + utof r2.xy, r14.zwzz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r6.yw, r14.xxxw + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r10.w, r2.x + mov r12.w, r2.y + mov r13.w, r6.y + mov r9.w, r6.w + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r10.x, r9.y + f16tof32 r10.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.x, r9.y + mov r10.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r10.xyzw, r5.xyzw, r10.xyzw + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r8.xyzw, r13.xyzw + add r9.xyzw, r4.xyzw, r9.xyzw + ld_raw r14.xyzw, r1.w, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r18.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r18.x, r14.y + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r18.x, r14.z + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r14.wwww, l(0, 8, 16, 24) + mov r18.x, r14.w + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r18.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r18.x, r14.y + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r18.x, r14.z + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r14.wwww, l(0, 10, 20, 30) + mov r18.x, r14.w + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r18.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r19.x, r14.y + mov r19.yz, r18.xxyx + and r1.yzw, r19.xxyz, l(0, 1023, 1023, 1023) + and r2.xyw, r19.xyxz, l(127, 127, 0, 127) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r21.xyz, r2.xywx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r2.xywx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r21.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r2.xyw, r20.xyxz, r2.xyxw, r19.xyxz + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r2.xyw, r2.xyxw, l(16, 16, 0, 16) + iadd r2.xyw, r19.xyxz, r2.xyxw + movc r15.xyz, r1.yzwy, r2.xywx, l(0,0,0,0) + utof r1.yz, r18.zzwz + ushr r18.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r19.x, r14.z + mov r19.yz, r18.xxwx + and r2.xyw, r19.xyxz, l(1023, 1023, 0, 1023) + and r20.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r20.xyzx, r19.xyzx + movc r16.xyz, r2.xywx, r19.xyzx, l(0,0,0,0) + mul r1.yz, r1.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r18.x, r14.w + and r2.xyw, r18.xyxz, l(1023, 1023, 0, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r17.xyz, r2.xywx, r18.xyzx, l(0,0,0,0) + ushr r18.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r2.xy, r18.xwxx + mov r18.x, r14.x + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r14.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r15.w, r1.y + mov r16.w, r1.z + mov r17.w, r2.x + mov r14.w, r2.y + break + case l(4) + ishl r18.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r19.xz, r18.xxyx + mov r19.yw, r14.yyyz + ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r18.zzwz + ishr r18.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r18.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r14.y + f16tof32 r15.y, r18.x + f16tof32 r16.x, r14.z + f16tof32 r16.y, r18.y + f16tof32 r17.x, r14.w + f16tof32 r17.y, r18.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r18.w + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r14.y + mov r15.yzw, l(0,0,0,0) + mov r16.x, r14.z + mov r16.yzw, l(0,0,0,0) + mov r17.x, r14.w + mov r17.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r10.xyzw, r15.xyzw + add r7.xyzw, r12.xyzw, r16.xyzw + add r8.xyzw, r13.xyzw, r17.xyzw + add r4.xyzw, r9.xyzw, r14.xyzw + else + mov r0.y, r0.z + endif +endif +mul r5.xyzw, r0.yyyy, r5.xyzw +mul r7.xyzw, r0.yyyy, r7.xyzw +mul r8.xyzw, r0.yyyy, r8.xyzw +mul r4.xyzw, r0.yyyy, r4.xyzw +if_nz r2.z + mov r5.xz, r5.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r2.xz, r4.zzxz +else + mov r2.xz, r4.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r9.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(256), r9.x + imad r0.x, r9.z, l(0x00010000), r0.x + imad r9.x, r9.w, l(0x01000000), r0.x + mov_sat r7.xyzw, r7.xyzw + mad r10.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(256), r10.x + imad r0.x, r10.z, l(0x00010000), r0.x + imad r9.y, r10.w, l(0x01000000), r0.x + mov_sat r8.xyzw, r8.xyzw + mad r10.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(256), r10.x + imad r0.x, r10.z, l(0x00010000), r0.x + imad r9.z, r10.w, l(0x01000000), r0.x + mov r2.yw, r4.yyyw + mov_sat r2.xyzw, r2.xyzw + mad r10.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(256), r10.x + imad r0.x, r10.z, l(0x00010000), r0.x + imad r9.w, r10.w, l(0x01000000), r0.x + mov r2.xyzw, r9.wyxz + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r9.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(1024), r9.x + imad r0.x, r9.z, l(0x00100000), r0.x + imad r9.x, r9.w, l(0x40000000), r0.x + mov_sat r7.xyzw, r7.xyzw + mad r10.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(1024), r10.x + imad r0.x, r10.z, l(0x00100000), r0.x + imad r9.y, r10.w, l(0x40000000), r0.x + mov_sat r8.xyzw, r8.xyzw + mad r10.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(1024), r10.x + imad r0.x, r10.z, l(0x00100000), r0.x + imad r9.z, r10.w, l(0x40000000), r0.x + mov_sat r4.xz, r2.xxzx + mov_sat r4.yw, r4.yyyw + mad r10.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(1024), r10.x + imad r0.x, r10.z, l(0x00100000), r0.x + imad r9.w, r10.w, l(0x40000000), r0.x + mov r2.xyzw, r9.wyxz + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r0.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.x, r0.z, l(0x00400000), r0.x + mov_sat r7.xyz, r7.xyzx + mad r0.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.y, r0.z, l(0x00400000), r0.x + mov_sat r8.xyz, r8.xyzx + mad r0.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.z, r0.z, l(0x00400000), r0.x + mov_sat r4.xz, r2.xxzx + mov_sat r4.y, r4.y + mad r0.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.w, r0.z, l(0x00400000), r0.x + mov r2.xyzw, r9.wyxz + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r0.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.x, r0.z, l(0x00200000), r0.x + mov_sat r7.xyz, r7.xyzx + mad r0.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.y, r0.z, l(0x00200000), r0.x + mov_sat r8.xyz, r8.xyzx + mad r0.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.z, r0.z, l(0x00200000), r0.x + mov_sat r4.xz, r2.xxzx + mov_sat r4.y, r4.y + mad r0.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.w, r0.z, l(0x00200000), r0.x + mov r2.xyzw, r9.wyxz + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r0.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.z, r0.y, l(0x00010000), r0.x + mov_sat r7.xy, r7.xyxx + mad r0.xy, r7.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.y, r0.y, l(0x00010000), r0.x + mov_sat r8.xy, r8.xyxx + mad r0.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.w, r0.y, l(0x00010000), r0.x + mov_sat r4.x, r2.x + mov_sat r4.y, r4.y + mad r0.xy, r4.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r2.x, r0.y, l(0x00010000), r0.x + break + case l(31) + f32tof16 r9.x, r5.x + f32tof16 r9.y, r7.x + f32tof16 r9.z, r8.x + f32tof16 r9.w, r2.x + f32tof16 r10.x, r5.y + f32tof16 r10.y, r7.y + f32tof16 r10.z, r8.y + f32tof16 r10.w, r4.y + imad r2.xyzw, r10.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.wyxz + break + default + mov r2.z, r5.x + mov r2.y, r7.x + mov r2.w, r8.x + break +endswitch +if_nz r3.y + ishl r4.xyzw, r2.zywx, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.zywx, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.wyxz, r5.wyxz +endif +if_nz r3.z + ushr r3.xyzw, r2.zywx, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.wyxz +endif +if_nz r0.w + mov r11.w, r2.z +endif +iadd r0.xyzw, r1.xxxx, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r0.xxxx, r11.zwzz +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +store_uav_typed U0[0].xyzw, r0.zzzz, r2.zyzz +store_uav_typed U0[0].xyzw, r0.wwww, r2.wxww +ret +// Approximately 4124 instruction slots used +#endif + +const BYTE resolve_full_32bpp_from_32bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 130, 124, + 252, 204, 148, 22, 94, 211, + 240, 204, 11, 239, 2, 113, + 29, 153, 1, 0, 0, 0, + 96, 0, 2, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 196, 255, 1, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 8, 253, 1, 0, 81, 0, + 5, 0, 66, 127, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 161, 0, 0, 6, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 28, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 41, 0, 0, 6, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 2, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 85, 0, 0, 9, + 66, 0, 16, 0, 0, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 7, 0, + 0, 0, 140, 0, 0, 11, + 66, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 11, 0, 0, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 7, 66, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 31, 0, 4, 3, + 42, 0, 16, 0, 0, 0, + 0, 0, 62, 0, 0, 1, + 21, 0, 0, 1, 1, 0, + 0, 12, 242, 0, 16, 0, + 1, 0, 0, 0, 134, 130, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 64, 7, 0, + 0, 0, 8, 0, 0, 0, + 255, 3, 0, 0, 54, 0, + 0, 4, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 2, 0, 32, 0, 0, 10, + 194, 0, 16, 0, 0, 0, + 0, 0, 6, 4, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 55, 0, 0, 12, 194, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 1, 0, + 0, 0, 166, 14, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 85, 0, 0, 12, 50, 0, + 16, 0, 2, 0, 0, 0, + 86, 133, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 29, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 7, 66, 0, + 16, 0, 2, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, 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000000000..356e56ba7 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_32bpp_from_64bpp_3xres_cs.h @@ -0,0 +1,13057 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 12 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].xxzz, l(1023, 0x40000000, 7, 8) +ubfe r4.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r5.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r5.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +ishl r1.w, r5.x, l(1) +imad r1.w, r5.y, r3.x, r1.w +iadd r1.w, r1.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r2.x, r2.x, l(1) +imad r1.w, r1.w, l(1280), r2.x +imul null, r1.w, r1.w, l(9) +ushr r1.w, r1.w, l(1) +movc r2.xy, r0.wzww, l(0,0,0,0), l(1,1,0,0) +movc r2.xy, r3.yyyy, r2.xyxx, l(0,0,0,0) +bfi r5.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r5.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r3.x, r1.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r3.x, r2.w, r5.x + ushr r3.y, r1.x, l(5) + imad r2.w, r2.w, r3.y, r5.y + ishl r3.y, r0.z, l(10) + and r3.y, r3.y, l(6144) + bfi r3.y, l(3), l(8), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r3.x, r3.x, r5.z + bfi r3.w, l(1), l(1), r3.x, l(0) + iadd r3.w, r3.w, r5.w + bfi r3.w, l(2), l(1), r3.w, l(0) + bfi r3.x, l(1), l(0), r3.x, r3.w + and r3.w, r3.y, l(112) + bfi r4.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.xy, r3.wwww, l(2, 16, 0, 0), r4.xyxx + bfi r3.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r3.yyyy, r4.xxxy + bfi r3.yw, l(0, 2, 0, 2), l(0, 8, 0, 11), r1.zzzz, r3.yyyw + ubfe r1.z, l(3), l(6), r3.y + and r2.w, r3.x, l(6) + bfi r3.x, l(1), l(8), r3.x, l(0) + imad r1.z, r1.z, l(32), r3.x + imad r1.z, r2.w, l(4), r1.z + bfi r3.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r0.zzzz, r3.ywyy + bfi r1.z, l(9), l(3), r1.z, r3.y + bfi r1.z, l(6), l(0), r3.x, r1.z +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r3.xy, r0.zzzz, l(4, 7, 0, 0) + and r3.xy, r3.xyxx, l(224, 2048, 0, 0) + bfi r0.y, l(3), l(2), r0.w, r3.x + ishl r1.x, r3.x, l(1) + bfi r0.w, l(3), l(3), r0.w, r1.x + and r0.w, r0.w, l(480) + bfi r1.x, l(23), l(9), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r3.xw, r0.wwww, l(3, 0, 0, 2) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxw + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r3.y, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r5.z, l(2) + iadd r0.y, r5.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.z, l(6), l(0), r1.x, r0.x +endif +imul null, r0.x, r1.z, l(9) +ushr r0.x, r0.x, l(3) +imad r0.y, r2.y, l(3), r1.w +iadd r0.z, r2.x, r0.y +ld r5.yw, r0.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xz, r5.yywy, l(16, 0, 16, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r1.zzzx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r1.x, r1.y, l(4) +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.z, l(720) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.xy, r0.zzzz, l(9, 729, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.z, r0.w +endif +mul r5.xyzw, r1.zzzz, r5.ywxz +and r0.z, CB0[0][0].z, l(0x01000000) +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r3.xy, r0.yyyy, l(1, 2, 0, 0) +ld r6.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(721) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.xw, r0.yyyy, l(10, 0, 0, 730) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.z, r0.w +endif +mul r6.xyzw, r1.zzzz, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(256), r7.x + imad r1.z, r7.z, l(0x00010000), r1.z + imad r4.x, r7.w, l(0x01000000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(256), r7.x + imad r1.z, r7.z, l(0x00010000), r1.z + imad r4.y, r7.w, l(0x01000000), r1.z + mov r6.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(1024), r7.x + imad r1.z, r7.z, l(0x00100000), r1.z + imad r4.x, r7.w, l(0x40000000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.z, r7.y, l(1024), r7.x + imad r1.z, r7.z, l(0x00100000), r1.z + imad r4.y, r7.w, l(0x40000000), r1.z + mov r6.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(2048), r7.x + imad r4.x, r7.z, l(0x00400000), r1.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(2048), r7.x + imad r4.y, r7.z, l(0x00400000), r1.z + mov r6.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(1024), r7.x + imad r4.x, r7.z, l(0x00200000), r1.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.z, r7.y, l(1024), r7.x + imad r4.y, r7.z, l(0x00200000), r1.z + mov r6.xz, r4.yyxy + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r3.xw, r5.xxxy, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r3.xw, r3.xxxw + imad r6.z, r3.w, l(0x00010000), r3.x + mov_sat r6.xy, r6.xyxx + mad r3.xw, r6.xxxy, l(65535.000000, 0.000000, 0.000000, 65535.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r3.xw, r3.xxxw + imad r6.x, r3.w, l(0x00010000), r3.x + break + case l(31) + f32tof16 r4.x, r5.x + f32tof16 r4.y, r6.x + f32tof16 r7.x, r5.y + f32tof16 r7.y, r6.y + imad r6.xz, r7.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r6.z, r5.x + break +endswitch +ieq r3.xzw, r3.zzzz, l(1, 0, 2, 3) +or r3.xz, r3.zzwz, r3.xxzx +if_nz r3.x + ishl r4.xy, r6.zxzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r6.zxzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xz, r4.yyxy, r5.yyxy +endif +if_nz r3.z + ushr r4.xy, r6.zxzz, l(16, 16, 0, 0) + bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r4.yyxy +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r6.zxzz +ld r5.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r5.yyyw, l(0, 16, 0, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.wwwy + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(722) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwy + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.yw, r0.yyyy, l(0, 11, 0, 731) + ld r6.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.z, r0.w +endif +mul r5.xyzw, r1.zzzz, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r0.y, r1.w, r2.x +iadd r3.yw, r0.yyyy, l(0, 3, 0, 6) +ld r6.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(723) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r4.xy, r0.yyyy, l(12, 732, 0, 0) + ld r7.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.z, r0.w +endif +mul r6.xyzw, r1.zzzz, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +iadd r7.xyzw, r0.xxxx, l(1, 2, 3, 4) +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(256), r8.x + imad r1.z, r8.z, l(0x00010000), r1.z + imad r4.x, r8.w, l(0x01000000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(256), r8.x + imad r1.z, r8.z, l(0x00010000), r1.z + imad r4.y, r8.w, l(0x01000000), r1.z + mov r6.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(1024), r8.x + imad r1.z, r8.z, l(0x00100000), r1.z + imad r4.x, r8.w, l(0x40000000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(1024), r8.x + imad r1.z, r8.z, l(0x00100000), r1.z + imad r4.y, r8.w, l(0x40000000), r1.z + mov r6.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(2048), r8.x + imad r4.x, r8.z, l(0x00400000), r1.z + mov_sat r6.xyz, r6.xyzx + mad r8.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(2048), r8.x + imad r4.y, r8.z, l(0x00400000), r1.z + mov r6.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(1024), r8.x + imad r4.x, r8.z, l(0x00200000), r1.z + mov_sat r6.xyz, r6.xyzx + mad r8.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(1024), r8.x + imad r4.y, r8.z, l(0x00200000), r1.z + mov r6.xz, r4.yyxy + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r4.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r6.z, r4.y, l(0x00010000), r4.x + mov_sat r6.xy, r6.xyxx + mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r6.x, r4.y, l(0x00010000), r4.x + break + case l(31) + f32tof16 r4.x, r5.x + f32tof16 r4.y, r6.x + f32tof16 r8.x, r5.y + f32tof16 r8.y, r6.y + imad r6.xz, r8.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r6.z, r5.x + break +endswitch +if_nz r3.x + ishl r4.xy, r6.zxzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r6.zxzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xz, r4.yyxy, r5.yyxy +endif +if_nz r3.z + ushr r4.xy, r6.zxzz, l(16, 16, 0, 0) + bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r4.yyxy +endif +store_uav_typed U0[0].xyzw, r7.xxxx, r6.zxzz +iadd r5.xyzw, r1.wwww, l(4, 5, 7, 8) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r1.w, l(724) + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r8.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(13, 733, 0, 0) + ld r8.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r9.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r6.ywxz, r8.ywxz + ld r9.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r4.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r1.z, r0.w +endif +mul r6.xyzw, r1.zzzz, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +ld r8.yw, r5.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r1.w, l(725) + ld r9.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r4.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r9.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(14, 734, 0, 0) + ld r9.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r5.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r9.xyzw, r8.ywxz, r9.ywxz + ld r10.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r10.xz, r10.yywy, l(16, 0, 16, 0) + ishr r11.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r10.ywyy, l(16, 16, 0, 0) + f16tof32 r10.xy, r10.wyww + f16tof32 r10.zw, r4.yyyx + break + default + mov r10.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r9.zxwy, r10.xyzw + endif +else + mov r1.z, r0.w +endif +mul r8.xyzw, r1.zzzz, r8.ywxz +if_nz r0.z + mov r8.xz, r8.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.z, r9.y, l(256), r9.x + imad r1.z, r9.z, l(0x00010000), r1.z + imad r4.x, r9.w, l(0x01000000), r1.z + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.z, r9.y, l(256), r9.x + imad r1.z, r9.z, l(0x00010000), r1.z + imad r4.y, r9.w, l(0x01000000), r1.z + mov r8.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.z, r9.y, l(1024), r9.x + imad r1.z, r9.z, l(0x00100000), r1.z + imad r4.x, r9.w, l(0x40000000), r1.z + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.z, r9.y, l(1024), r9.x + imad r1.z, r9.z, l(0x00100000), r1.z + imad r4.y, r9.w, l(0x40000000), r1.z + mov r8.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r6.xyz, r6.xyzx + mad r9.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r1.z, r9.y, l(2048), r9.x + imad r4.x, r9.z, l(0x00400000), r1.z + mov_sat r8.xyz, r8.xyzx + mad r9.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r1.z, r9.y, l(2048), r9.x + imad r4.y, r9.z, l(0x00400000), r1.z + mov r8.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r6.xyz, r6.xyzx + mad r9.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r1.z, r9.y, l(1024), r9.x + imad r4.x, r9.z, l(0x00200000), r1.z + mov_sat r8.xyz, r8.xyzx + mad r9.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r1.z, r9.y, l(1024), r9.x + imad r4.y, r9.z, l(0x00200000), r1.z + mov r8.xz, r4.yyxy + break + case l(25) + mov_sat r6.xy, r6.xyxx + mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r8.z, r4.y, l(0x00010000), r4.x + mov_sat r8.xy, r8.xyxx + mad r4.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r8.x, r4.y, l(0x00010000), r4.x + break + case l(31) + f32tof16 r4.x, r6.x + f32tof16 r4.y, r8.x + f32tof16 r5.x, r6.y + f32tof16 r5.y, r8.y + imad r8.xz, r5.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r8.z, r6.x + break +endswitch +if_nz r3.x + ishl r4.xy, r8.zxzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r8.zxzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r8.xz, r4.yyxy, r5.yyxy +endif +if_nz r3.z + ushr r4.xy, r8.zxzz, l(16, 16, 0, 0) + bfi r8.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r8.xxzx, r4.yyxy +endif +store_uav_typed U0[0].xyzw, r7.yyyy, r8.zxzz +ld r6.yw, r3.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwy + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(726) + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r8.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.z, r0.w, l(0.250000) + iadd r3.yw, r0.yyyy, l(0, 15, 0, 735) + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r6.ywxz, r8.ywxz + ld r9.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r9.yyyw, l(0, 16, 0, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.wwwy + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r1.z, r0.w +endif +mul r6.xyzw, r1.zzzz, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +ld r8.yw, r5.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwy + break + default + mov r8.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.y, r0.w, l(0.500000) + iadd r1.z, r1.w, l(727) + ld r9.yw, r1.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r9.yyyw, l(0, 16, 0, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.wwwy + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r9.xyzw + uge r1.z, r1.y, l(6) + if_nz r1.z + mul r0.y, r0.w, l(0.250000) + iadd r3.yw, r1.wwww, l(0, 16, 0, 736) + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r4.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r9.xyzw, r8.ywxz, r9.ywxz + ld r10.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r10.xz, r10.yywy, l(16, 0, 16, 0) + ishr r11.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r10.yyyw, l(0, 16, 0, 16) + f16tof32 r10.xy, r10.wyww + f16tof32 r10.zw, r3.wwwy + break + default + mov r10.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r9.zxwy, r10.xyzw + endif +else + mov r0.y, r0.w +endif +mul r8.xyzw, r0.yyyy, r8.ywxz +if_nz r0.z + mov r8.xz, r8.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.y, r9.y, l(256), r9.x + imad r0.y, r9.z, l(0x00010000), r0.y + imad r4.x, r9.w, l(0x01000000), r0.y + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.y, r9.y, l(256), r9.x + imad r0.y, r9.z, l(0x00010000), r0.y + imad r4.y, r9.w, l(0x01000000), r0.y + mov r8.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.y, r9.y, l(1024), r9.x + imad r0.y, r9.z, l(0x00100000), r0.y + imad r4.x, r9.w, l(0x40000000), r0.y + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.y, r9.y, l(1024), r9.x + imad r0.y, r9.z, l(0x00100000), r0.y + imad r4.y, r9.w, l(0x40000000), r0.y + mov r8.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r6.xyz, r6.xyzx + mad r5.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(2048), r5.x + imad r4.x, r5.z, l(0x00400000), r0.y + mov_sat r8.xyz, r8.xyzx + mad r5.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(2048), r5.x + imad r4.y, r5.z, l(0x00400000), r0.y + mov r8.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r6.xyz, r6.xyzx + mad r5.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(1024), r5.x + imad r4.x, r5.z, l(0x00200000), r0.y + mov_sat r8.xyz, r8.xyzx + mad r5.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(1024), r5.x + imad r4.y, r5.z, l(0x00200000), r0.y + mov r8.xz, r4.yyxy + break + case l(25) + mov_sat r6.xy, r6.xyxx + mad r3.yw, r6.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r3.yw, r3.yyyw + imad r8.z, r3.w, l(0x00010000), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yw, r8.xxxy, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r3.yw, r3.yyyw + imad r8.x, r3.w, l(0x00010000), r3.y + break + case l(31) + f32tof16 r4.x, r6.x + f32tof16 r4.y, r8.x + f32tof16 r5.x, r6.y + f32tof16 r5.y, r8.y + imad r8.xz, r5.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r8.z, r6.x + break +endswitch +if_nz r3.x + ishl r3.yw, r8.zzzx, l(0, 8, 0, 8) + and r3.yw, r3.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r4.xy, r8.zxzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r8.xz, r3.wwyw, r4.yyxy +endif +if_nz r3.z + ushr r3.yw, r8.zzzx, l(0, 16, 0, 16) + bfi r8.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r8.xxzx, r3.wwyw +endif +store_uav_typed U0[0].xyzw, r7.zzzz, r8.zxzz +ld r5.yw, r5.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r5.yyyw, l(0, 16, 0, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.wwwy + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.y, r0.w, l(0.500000) + iadd r1.z, r1.w, l(728) + ld r6.yw, r1.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwy + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r1.z, r1.y, l(6) + if_nz r1.z + mul r0.y, r0.w, l(0.250000) + iadd r3.yw, r1.wwww, l(0, 17, 0, 737) + ld r6.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r8.xyzw + endif +else + mov r0.y, r0.w +endif +mul r5.xyzw, r0.yyyy, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +movc r0.y, r2.z, l(18), l(9) +iadd r0.y, r0.y, r1.w +imad r1.z, r2.y, l(3), r0.y +iadd r1.w, r2.x, r1.z +ld r6.yw, r1.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r6.yywy, l(0, 16, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.zzzy + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.y, r0.w, l(0.500000) + iadd r2.z, r1.w, l(720) + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r8.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.y, r0.w, l(0.250000) + iadd r2.zw, r1.wwww, l(0, 0, 9, 729) + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r6.ywxz, r8.ywxz + ld r9.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r9.yyyw, l(0, 0, 16, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.wwwz + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.y, r0.w +endif +mul r6.xyzw, r2.yyyy, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(256), r8.x + imad r1.w, r8.z, l(0x00010000), r1.w + imad r4.x, r8.w, l(0x01000000), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(256), r8.x + imad r1.w, r8.z, l(0x00010000), r1.w + imad r4.y, r8.w, l(0x01000000), r1.w + mov r6.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(1024), r8.x + imad r1.w, r8.z, l(0x00100000), r1.w + imad r4.x, r8.w, l(0x40000000), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(1024), r8.x + imad r1.w, r8.z, l(0x00100000), r1.w + imad r4.y, r8.w, l(0x40000000), r1.w + mov r6.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r2.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.w, r2.z, l(2048), r2.y + imad r4.x, r2.w, l(0x00400000), r1.w + mov_sat r6.xyz, r6.xyzx + mad r2.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.w, r2.z, l(2048), r2.y + imad r4.y, r2.w, l(0x00400000), r1.w + mov r6.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r2.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.w, r2.z, l(1024), r2.y + imad r4.x, r2.w, l(0x00200000), r1.w + mov_sat r6.xyz, r6.xyzx + mad r2.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.w, r2.z, l(1024), r2.y + imad r4.y, r2.w, l(0x00200000), r1.w + mov r6.xz, r4.yyxy + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r2.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r2.yz, r2.yyzy + imad r6.z, r2.z, l(0x00010000), r2.y + mov_sat r6.xy, r6.xyxx + mad r2.yz, r6.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r2.yz, r2.yyzy + imad r6.x, r2.z, l(0x00010000), r2.y + break + case l(31) + f32tof16 r4.x, r5.x + f32tof16 r4.y, r6.x + f32tof16 r7.x, r5.y + f32tof16 r7.y, r6.y + imad r6.xz, r7.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r6.z, r5.x + break +endswitch +if_nz r3.x + ishl r2.yz, r6.zzxz, l(0, 8, 8, 0) + and r2.yz, r2.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r3.yw, r6.zzzx, l(0, 8, 0, 8) + and r3.yw, r3.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) + iadd r6.xz, r2.zzyz, r3.wwyw +endif +if_nz r3.z + ushr r2.yz, r6.zzxz, l(0, 16, 16, 0) + bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r2.zzyz +endif +store_uav_typed U0[0].xyzw, r7.wwww, r6.zxzz +iadd r2.yz, r1.zzzz, l(0, 1, 2, 0) +ld r5.yw, r2.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yw, r5.yyyw, l(0, 16, 0, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwy + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.y, r1.z, l(721) + ld r6.yw, r2.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yw, r6.yyyw, l(0, 16, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwy + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.y, r1.y, l(6) + if_nz r2.y + mul r1.w, r0.w, l(0.250000) + iadd r2.yw, r1.zzzz, l(0, 10, 0, 730) + ld r6.yw, r2.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r6.yyyw, l(0, 16, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwy + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.w, r0.w +endif +mul r5.xyzw, r1.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +ld r6.yw, r2.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r6.yywy, l(0, 16, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.zzzy + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.y, r1.z, l(722) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r7.yywy, l(0, 16, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.zzzy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.y, r1.y, l(6) + if_nz r2.y + mul r1.w, r0.w, l(0.250000) + iadd r2.yz, r1.zzzz, l(0, 11, 731, 0) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r8.yywy, l(0, 16, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.zzzy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r6.xyzw, r1.wwww, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +iadd r7.xyzw, r0.xxxx, l(5, 6, 7, 8) +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(256), r8.x + imad r1.z, r8.z, l(0x00010000), r1.z + imad r4.x, r8.w, l(0x01000000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(256), r8.x + imad r1.z, r8.z, l(0x00010000), r1.z + imad r4.y, r8.w, l(0x01000000), r1.z + mov r6.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(1024), r8.x + imad r1.z, r8.z, l(0x00100000), r1.z + imad r4.x, r8.w, l(0x40000000), r1.z + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(1024), r8.x + imad r1.z, r8.z, l(0x00100000), r1.z + imad r4.y, r8.w, l(0x40000000), r1.z + mov r6.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r2.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.z, r2.z, l(2048), r2.y + imad r4.x, r2.w, l(0x00400000), r1.z + mov_sat r6.xyz, r6.xyzx + mad r2.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.z, r2.z, l(2048), r2.y + imad r4.y, r2.w, l(0x00400000), r1.z + mov r6.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r2.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.z, r2.z, l(1024), r2.y + imad r4.x, r2.w, l(0x00200000), r1.z + mov_sat r6.xyz, r6.xyzx + mad r2.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r2.yzw, r2.yyzw + imad r1.z, r2.z, l(1024), r2.y + imad r4.y, r2.w, l(0x00200000), r1.z + mov r6.xz, r4.yyxy + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r1.zw, r5.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r1.zw, r1.zzzw + imad r6.z, r1.w, l(0x00010000), r1.z + mov_sat r6.xy, r6.xyxx + mad r1.zw, r6.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r1.zw, r1.zzzw + imad r6.x, r1.w, l(0x00010000), r1.z + break + case l(31) + f32tof16 r4.x, r5.x + f32tof16 r4.y, r6.x + f32tof16 r8.x, r5.y + f32tof16 r8.y, r6.y + imad r6.xz, r8.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r6.z, r5.x + break +endswitch +if_nz r3.x + ishl r1.zw, r6.zzzx, l(0, 0, 8, 8) + and r1.zw, r1.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r2.yz, r6.zzxz, l(0, 8, 8, 0) + and r2.yz, r2.yyzy, l(0, 0x00ff00ff, 0x00ff00ff, 0) + iadd r6.xz, r1.wwzw, r2.zzyz +endif +if_nz r3.z + ushr r1.zw, r6.zzzx, l(0, 0, 16, 16) + bfi r6.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r6.xxzx, r1.wwzw +endif +store_uav_typed U0[0].xyzw, r7.xxxx, r6.zxzz +iadd r1.z, r2.x, r0.y +iadd r2.xy, r1.zzzz, l(3, 6, 0, 0) +ld r5.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r5.yywy, l(16, 0, 16, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.zzzx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.x, r1.z, l(723) + ld r6.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.x, r1.y, l(6) + if_nz r2.x + mul r1.w, r0.w, l(0.250000) + iadd r2.xz, r1.zzzz, l(12, 0, 732, 0) + ld r6.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r5.xyzw, r1.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r8.yw, r6.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.x, r0.y, l(724) + ld r9.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r9.yywy, l(16, 0, 16, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.zzzx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r9.xyzw + uge r2.x, r1.y, l(6) + if_nz r2.x + mul r1.w, r0.w, l(0.250000) + iadd r2.xz, r0.yyyy, l(13, 0, 733, 0) + ld r9.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r9.yyyw, l(16, 0, 0, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.wwwx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r9.xyzw, r8.ywxz, r9.ywxz + ld r10.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r10.xz, r10.yywy, l(16, 0, 16, 0) + ishr r11.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r10.yywy, l(16, 0, 16, 0) + f16tof32 r10.xy, r10.wyww + f16tof32 r10.zw, r2.zzzx + break + default + mov r10.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r9.zxwy, r10.xyzw + endif +else + mov r1.w, r0.w +endif +mul r8.xyzw, r1.wwww, r8.ywxz +if_nz r0.z + mov r8.xz, r8.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r9.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.w, r9.y, l(256), r9.x + imad r1.w, r9.z, l(0x00010000), r1.w + imad r4.x, r9.w, l(0x01000000), r1.w + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.w, r9.y, l(256), r9.x + imad r1.w, r9.z, l(0x00010000), r1.w + imad r4.y, r9.w, l(0x01000000), r1.w + mov r8.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r9.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.w, r9.y, l(1024), r9.x + imad r1.w, r9.z, l(0x00100000), r1.w + imad r4.x, r9.w, l(0x40000000), r1.w + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r1.w, r9.y, l(1024), r9.x + imad r1.w, r9.z, l(0x00100000), r1.w + imad r4.y, r9.w, l(0x40000000), r1.w + mov r8.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r2.xzw, r5.xxyz, l(2047.000000, 0.000000, 2047.000000, 1023.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(2048), r2.x + imad r4.x, r2.w, l(0x00400000), r1.w + mov_sat r8.xyz, r8.xyzx + mad r2.xzw, r8.xxyz, l(2047.000000, 0.000000, 2047.000000, 1023.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(2048), r2.x + imad r4.y, r2.w, l(0x00400000), r1.w + mov r8.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r2.xzw, r5.xxyz, l(1023.000000, 0.000000, 2047.000000, 2047.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(1024), r2.x + imad r4.x, r2.w, l(0x00200000), r1.w + mov_sat r8.xyz, r8.xyzx + mad r2.xzw, r8.xxyz, l(1023.000000, 0.000000, 2047.000000, 2047.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(1024), r2.x + imad r4.y, r2.w, l(0x00200000), r1.w + mov r8.xz, r4.yyxy + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r2.xz, r5.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r8.z, r2.z, l(0x00010000), r2.x + mov_sat r8.xy, r8.xyxx + mad r2.xz, r8.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r8.x, r2.z, l(0x00010000), r2.x + break + case l(31) + f32tof16 r4.x, r5.x + f32tof16 r4.y, r8.x + f32tof16 r9.x, r5.y + f32tof16 r9.y, r8.y + imad r8.xz, r9.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r8.z, r5.x + break +endswitch +if_nz r3.x + ishl r2.xz, r8.zzxz, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.yw, r8.zzzx, l(0, 8, 0, 8) + and r3.yw, r3.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) + iadd r8.xz, r2.zzxz, r3.wwyw +endif +if_nz r3.z + ushr r2.xz, r8.zzxz, l(16, 0, 16, 0) + bfi r8.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r8.xxzx, r2.zzxz +endif +store_uav_typed U0[0].xyzw, r7.yyyy, r8.zxzz +ld r5.yw, r6.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r5.yywy, l(16, 0, 16, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.zzzx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.x, r0.y, l(725) + ld r8.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r8.xyzw + uge r2.x, r1.y, l(6) + if_nz r2.x + mul r1.w, r0.w, l(0.250000) + iadd r2.xz, r0.yyyy, l(14, 0, 734, 0) + ld r8.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r8.yyyw, l(16, 0, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r5.ywxz, r8.ywxz + ld r9.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r9.yywy, l(16, 0, 16, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.zzzx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r1.w, r0.w +endif +mul r5.xyzw, r1.wwww, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +ld r2.yw, r2.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r2.xz, r2.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r2.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r2.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r2.yyyw, l(0, 16, 0, 16) + f16tof32 r2.xy, r2.wyww + f16tof32 r2.zw, r3.wwwy + break + default + mov r2.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r3.y, r1.z, l(726) + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r2.xyzw, r8.xyzw + uge r3.y, r1.y, l(6) + if_nz r3.y + mul r1.w, r0.w, l(0.250000) + iadd r3.yw, r1.zzzz, l(0, 15, 0, 735) + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r2.ywxz, r8.ywxz + ld r9.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r9.yyyw, l(0, 16, 0, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.wwwy + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r1.w, r0.w +endif +mul r2.xyzw, r1.wwww, r2.ywxz +if_nz r0.z + mov r2.xz, r2.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(256), r8.x + imad r1.z, r8.z, l(0x00010000), r1.z + imad r4.x, r8.w, l(0x01000000), r1.z + mov_sat r2.xyzw, r2.xyzw + mad r8.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(256), r8.x + imad r1.z, r8.z, l(0x00010000), r1.z + imad r4.y, r8.w, l(0x01000000), r1.z + mov r2.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(1024), r8.x + imad r1.z, r8.z, l(0x00100000), r1.z + imad r4.x, r8.w, l(0x40000000), r1.z + mov_sat r2.xyzw, r2.xyzw + mad r8.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.z, r8.y, l(1024), r8.x + imad r1.z, r8.z, l(0x00100000), r1.z + imad r4.y, r8.w, l(0x40000000), r1.z + mov r2.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(2048), r8.x + imad r4.x, r8.z, l(0x00400000), r1.z + mov_sat r2.xyz, r2.xyzx + mad r8.xyz, r2.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(2048), r8.x + imad r4.y, r8.z, l(0x00400000), r1.z + mov r2.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(1024), r8.x + imad r4.x, r8.z, l(0x00200000), r1.z + mov_sat r2.xyz, r2.xyzx + mad r8.xyz, r2.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.z, r8.y, l(1024), r8.x + imad r4.y, r8.z, l(0x00200000), r1.z + mov r2.xz, r4.yyxy + break + case l(25) + mov_sat r5.xy, r5.xyxx + mad r1.zw, r5.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r1.zw, r1.zzzw + imad r2.z, r1.w, l(0x00010000), r1.z + mov_sat r2.xy, r2.xyxx + mad r1.zw, r2.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r1.zw, r1.zzzw + imad r2.x, r1.w, l(0x00010000), r1.z + break + case l(31) + f32tof16 r4.x, r5.x + f32tof16 r4.y, r2.x + f32tof16 r6.x, r5.y + f32tof16 r6.y, r2.y + imad r2.xz, r6.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r2.z, r5.x + break +endswitch +if_nz r3.x + ishl r1.zw, r2.zzzx, l(0, 0, 8, 8) + and r1.zw, r1.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r2.yw, r2.zzzx, l(0, 8, 0, 8) + and r2.yw, r2.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) + iadd r2.xz, r1.wwzw, r2.wwyw +endif +if_nz r3.z + ushr r1.zw, r2.zzzx, l(0, 0, 16, 16) + bfi r2.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r2.xxzx, r1.wwzw +endif +store_uav_typed U0[0].xyzw, r7.zzzz, r2.zxzz +ld r2.yw, r6.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r2.xz, r2.yywy, l(16, 0, 16, 0) + ishr r5.xyzw, r2.xyzw, l(16, 16, 16, 16) + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r2.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.zw, r2.yyyw, l(0, 0, 16, 16) + f16tof32 r2.xy, r2.wyww + f16tof32 r2.zw, r1.wwwz + break + default + mov r2.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.z, r0.w, l(0.500000) + iadd r1.w, r0.y, l(727) + ld r5.yw, r1.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r5.yyyw, l(0, 16, 0, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.wwwy + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r2.xyzw, r5.xyzw + uge r1.w, r1.y, l(6) + if_nz r1.w + mul r1.z, r0.w, l(0.250000) + iadd r3.yw, r0.yyyy, l(0, 16, 0, 736) + ld r5.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r2.ywxz, r5.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.yw, r8.yyyw, l(0, 16, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r5.zxwy, r8.xyzw + endif +else + mov r1.z, r0.w +endif +mul r2.xyzw, r1.zzzz, r2.ywxz +if_nz r0.z + mov r2.xz, r2.zzxz +endif +ld r5.yw, r6.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r1.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.x, r0.w, l(0.500000) + iadd r1.z, r0.y, l(728) + ld r6.yw, r1.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r0.w, r0.w, l(0.250000) + iadd r1.yz, r0.yyyy, l(0, 17, 737, 0) + ld r6.yw, r1.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.yw, r6.yyyw, l(0, 16, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.wwwy + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r8.yw, r1.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.yz, r8.yywy, l(0, 16, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r1.zzzy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r8.xyzw + else + mov r0.w, r1.x + endif +endif +mul r1.xyzw, r0.wwww, r5.ywxz +if_nz r0.z + mov r1.xz, r1.zzxz +endif +switch r4.z + case l(6) + case l(14) + case l(50) + mov_sat r2.xyzw, r2.xyzw + mad r4.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r4.xyzw, r4.xyzw + imad r0.y, r4.y, l(256), r4.x + imad r0.y, r4.z, l(0x00010000), r0.y + imad r4.x, r4.w, l(0x01000000), r0.y + mov_sat r1.xyzw, r1.xyzw + mad r5.xyzw, r1.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r5.xyzw, r5.xyzw + imad r0.y, r5.y, l(256), r5.x + imad r0.y, r5.z, l(0x00010000), r0.y + imad r4.y, r5.w, l(0x01000000), r0.y + mov r1.xz, r4.yyxy + break + case l(7) + case l(54) + mov_sat r2.xyzw, r2.xyzw + mad r4.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r4.xyzw, r4.xyzw + imad r0.y, r4.y, l(1024), r4.x + imad r0.y, r4.z, l(0x00100000), r0.y + imad r4.x, r4.w, l(0x40000000), r0.y + mov_sat r1.xyzw, r1.xyzw + mad r5.xyzw, r1.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r5.xyzw, r5.xyzw + imad r0.y, r5.y, l(1024), r5.x + imad r0.y, r5.z, l(0x00100000), r0.y + imad r4.y, r5.w, l(0x40000000), r0.y + mov r1.xz, r4.yyxy + break + case l(16) + case l(55) + mov_sat r2.xyz, r2.xyzx + mad r0.yzw, r2.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(2048), r0.y + imad r4.x, r0.w, l(0x00400000), r0.y + mov_sat r1.xyz, r1.xyzx + mad r0.yzw, r1.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(2048), r0.y + imad r4.y, r0.w, l(0x00400000), r0.y + mov r1.xz, r4.yyxy + break + case l(17) + case l(56) + mov_sat r2.xyz, r2.xyzx + mad r0.yzw, r2.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(1024), r0.y + imad r4.x, r0.w, l(0x00200000), r0.y + mov_sat r1.xyz, r1.xyzx + mad r0.yzw, r1.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r0.yzw, r0.yyzw + imad r0.y, r0.z, l(1024), r0.y + imad r4.y, r0.w, l(0x00200000), r0.y + mov r1.xz, r4.yyxy + break + case l(25) + mov_sat r2.xy, r2.xyxx + mad r0.yz, r2.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r1.z, r0.z, l(0x00010000), r0.y + mov_sat r1.xy, r1.xyxx + mad r0.yz, r1.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r0.yz, r0.yyzy + imad r1.x, r0.z, l(0x00010000), r0.y + break + case l(31) + f32tof16 r4.x, r2.x + f32tof16 r4.y, r1.x + f32tof16 r5.x, r2.y + f32tof16 r5.y, r1.y + imad r1.xz, r5.yyxy, l(0x00010000, 0, 0x00010000, 0), r4.yyxy + break + default + mov r1.z, r2.x + break +endswitch +if_nz r3.x + ishl r0.yz, r1.zzxz, l(0, 8, 8, 0) + and r0.yz, r0.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r1.yw, r1.zzzx, l(0, 8, 0, 8) + and r1.yw, r1.yyyw, l(0, 0x00ff00ff, 0, 0x00ff00ff) + iadd r1.xz, r0.zzyz, r1.wwyw +endif +if_nz r3.z + ushr r0.yz, r1.zzxz, l(0, 16, 16, 0) + bfi r1.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r1.xxzx, r0.zzyz +endif +store_uav_typed U0[0].xyzw, r7.wwww, r1.zxzz +ret +// Approximately 2606 instruction slots used +#endif + +const BYTE resolve_full_32bpp_from_64bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 49, 195, + 26, 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0, 0, 0, 0, + 0, 0, 248, 0, 0, 0, + 3, 0, 0, 0, 162, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 9, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_2xres_cs.h new file mode 100644 index 000000000..b9b95cccb --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_2xres_cs.h @@ -0,0 +1,7123 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 21 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].zxzx, l(7, 1023, 0x01000000, 0x40000000) +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +movc r0.w, r3.z, l(1), l(0) +ishl r3.y, r1.z, r0.w +imad r2.y, r1.w, r2.y, r3.y +iadd r2.y, r2.y, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w +imad r0.w, r2.y, l(1280), r0.w +ld r1.xyzw, r0.wwww, T0[0].xzyw +if_nz r3.z + iadd r2.y, r0.w, l(1) + ld r4.xyzw, r2.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r1.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r1.xz, r8.zzwz + ishr r8.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r9.xz, r8.xxyx + mov r9.yw, r4.xxxz + ishr r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r1.xyzw, r8.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.xz, r1.xxzx + f16tof32 r5.yw, r8.xxxy + f16tof32 r6.xz, r1.yywy + f16tof32 r6.yw, r8.zzzw + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r7.xz, r4.xxzx + f16tof32 r7.yw, r8.xxxy + f16tof32 r1.zw, r4.wwwy + f16tof32 r1.xy, r8.zwzz + break + default + mov r5.xy, r1.xzxx + mov r5.zw, l(0,0,0,0) + mov r6.xy, r1.ywyy + mov r6.zw, l(0,0,0,0) + mov r7.xy, r4.xzxx + mov r7.zw, l(0,0,0,0) + mov r1.xw, r4.wwwy + mov r1.yz, l(0,0,0,0) + break + endswitch +else + switch r3.w + case l(0) + case l(1) + ushr r4.yzw, r1.xxxx, l(0, 8, 16, 24) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.zzzz, l(0, 8, 16, 24) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r1.yyyy, l(0, 8, 16, 24) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.xyz, r1.wwww, l(8, 24, 16, 0) + and r4.xyzw, r1.wxzy, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r1.xxxx, l(0, 10, 20, 30) + mov r4.x, r1.x + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r5.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.zzzz, l(0, 10, 20, 30) + mov r4.x, r1.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r6.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r1.yyyy, l(0, 10, 20, 30) + mov r4.x, r1.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r1.xyz, r1.wwww, l(10, 30, 20, 0) + and r4.xyzw, r1.wxzy, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r1.xyzw, r4.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r4.xyzw, r1.xxxz, l(10, 20, 30, 30) + mov r8.x, r1.x + mov r8.yz, r4.xxyx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r5.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + utof r3.xy, r4.zwzz + ushr r4.xyzw, r1.zyyz, l(10, 10, 20, 20) + mov r8.x, r1.z + mov r8.yz, r4.xxwx + and r9.xyz, r8.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r8.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r8.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r8.xyz, l(7, 7, 7, 0), r12.xyzx, r8.xyzx, l(0, 0, 0, 0) + and r8.xyz, r8.xyzx, l(127, 127, 127, 0) + movc r8.xyz, r11.xyzx, r10.xyzx, r8.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r8.xyz, r8.xyzx, l(16, 16, 16, 0) + iadd r8.xyz, r10.xyzx, r8.xyzx + movc r6.xyz, r9.xyzx, r8.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r4.x, r1.y + and r8.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r9.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r10.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r11.xyz, r9.xyzx + iadd r11.xyz, r11.xyzx, l(-24, -24, -24, 0) + movc r11.xyz, r9.xyzx, r11.xyzx, l(8,8,8,0) + iadd r12.xyz, -r11.xyzx, l(1, 1, 1, 0) + movc r12.xyz, r10.xyzx, r10.xyzx, r12.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r11.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r10.xyzx, r9.xyzx, r4.xyzx + ishl r9.xyz, r12.xyzx, l(23, 23, 23, 0) + iadd r9.xyz, r9.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r9.xyzx, r4.xyzx + movc r7.xyz, r8.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r1.ywww, l(30, 10, 20, 30) + utof r8.xy, r4.xwxx + mov r4.x, r1.w + and r9.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r12.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r11.xyzx, r10.xyzx, r4.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r10.xyzx, r4.xyzx + movc r1.xzw, r9.yyzx, r4.yyzx, l(0,0,0,0) + mul r4.xy, r8.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r5.w, r3.x + mov r6.w, r3.y + mov r7.w, r4.x + mov r1.y, r4.y + break + case l(4) + ishl r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + mov r8.xz, r4.xxyx + mov r8.yw, r1.xxxz + ishr r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r8.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r1.xz, r4.zzwz + ishr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r1.xw, r4.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r1.xzyw, l(16, 16, 16, 16) + f16tof32 r5.x, r1.x + f16tof32 r5.y, r4.x + f16tof32 r6.x, r1.z + f16tof32 r6.y, r4.y + f16tof32 r7.x, r1.y + f16tof32 r7.y, r4.z + f16tof32 r1.w, r1.w + f16tof32 r1.x, r4.w + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r1.yz, l(0,0,0,0) + break + default + mov r5.x, r1.x + mov r5.yzw, l(0,0,0,0) + mov r6.x, r1.z + mov r6.yzw, l(0,0,0,0) + mov r7.x, r1.y + mov r7.yzw, l(0,0,0,0) + mov r1.xyz, l(0,0,0,0) + break + endswitch +endif +ibfe r2.y, l(6), l(16), CB0[0][0].z +ishl r2.y, r2.y, l(23) +iadd r2.y, r2.y, l(0x3f800000) +uge r3.x, r0.y, l(4) +if_nz r3.x + mul r3.x, r2.y, l(0.500000) + ishl r3.y, l(80), r3.z + iadd r3.y, r0.w, r3.y + ld r4.xyzw, r3.yyyy, T0[0].xzyw + if_nz r3.z + iadd r3.y, r0.w, l(161) + ld r8.xyzw, r3.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r4.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r12.zzwz + ishr r12.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r12.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.xz, r4.xxzx + f16tof32 r9.yw, r12.xxxy + f16tof32 r10.xz, r4.yywy + f16tof32 r10.yw, r12.zzzw + ushr r12.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r11.xz, r8.xxzx + f16tof32 r11.yw, r12.xxxy + f16tof32 r4.zw, r8.wwwy + f16tof32 r4.xy, r12.zwzz + break + default + mov r9.xy, r4.xzxx + mov r9.zw, l(0,0,0,0) + mov r10.xy, r4.ywyy + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.xzxx + mov r11.zw, l(0,0,0,0) + mov r4.xw, r8.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r8.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r8.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r8.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r8.x, r4.x + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r8.x, r4.z + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r10.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r8.x, r4.y + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r11.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r8.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r8.xyzw, r8.xyzw + mul r4.xyzw, r8.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r8.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r12.x, r4.x + mov r12.yz, r8.xxyx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r9.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + utof r8.xy, r8.zwzz + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r13.x, r4.z + mov r13.yz, r12.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r10.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mov r12.x, r4.y + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r11.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r8.zw, r12.xxxw + mov r12.x, r4.w + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r4.xzw, r13.yyzx, r12.yyzx, l(0,0,0,0) + mul r8.xyzw, r8.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r9.w, r8.x + mov r10.w, r8.y + mov r11.w, r8.z + mov r4.y, r8.w + break + case l(4) + ishl r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r12.xz, r8.xxyx + mov r12.yw, r4.xxxz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r8.zzwz + ishr r8.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r8.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r8.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r8.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r9.x, r4.x + f16tof32 r9.y, r8.x + f16tof32 r10.x, r4.z + f16tof32 r10.y, r8.y + f16tof32 r11.x, r4.y + f16tof32 r11.y, r8.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r8.w + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r9.x, r4.x + mov r9.yzw, l(0,0,0,0) + mov r10.x, r4.z + mov r10.yzw, l(0,0,0,0) + mov r11.x, r4.y + mov r11.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r5.xyzw, r9.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r11.xyzw + add r1.xyzw, r1.xyzw, r4.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r2.y, r2.y, l(0.250000) + ishl r4.xy, l(1, 81, 0, 0), r3.zzzz + iadd r4.xy, r0.wwww, r4.xyxx + ld r8.xyzw, r4.xxxx, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(3) + ld r9.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r8.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r8.xz, r13.zzwz + ishr r13.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r9.xxxz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r14.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r9.xz, r13.zzwz + ishr r13.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r13.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r13.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.xz, r8.xxzx + f16tof32 r10.yw, r13.xxxy + f16tof32 r11.xz, r8.yywy + f16tof32 r11.yw, r13.zzzw + ushr r13.xyzw, r9.xzyw, l(16, 16, 16, 16) + f16tof32 r12.xz, r9.xxzx + f16tof32 r12.yw, r13.xxxy + f16tof32 r8.zw, r9.wwwy + f16tof32 r8.xy, r13.zwzz + break + default + mov r10.xy, r8.xzxx + mov r10.zw, l(0,0,0,0) + mov r11.xy, r8.ywyy + mov r11.zw, l(0,0,0,0) + mov r12.xy, r9.xzxx + mov r12.zw, l(0,0,0,0) + mov r8.xw, r9.wwwy + mov r8.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r9.yzw, r8.xxxx, l(0, 8, 16, 24) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.zzzz, l(0, 8, 16, 24) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r8.yyyy, l(0, 8, 16, 24) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyz, r8.wwww, l(8, 24, 16, 0) + and r9.xyzw, r8.wxzy, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r8.xxxx, l(0, 10, 20, 30) + mov r9.x, r8.x + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.zzzz, l(0, 10, 20, 30) + mov r9.x, r8.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r11.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r8.yyyy, l(0, 10, 20, 30) + mov r9.x, r8.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r12.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r8.xyz, r8.wwww, l(10, 30, 20, 0) + and r9.xyzw, r8.wxzy, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r9.xyzw, r8.xxxz, l(10, 20, 30, 30) + mov r13.x, r8.x + mov r13.yz, r9.xxyx + and r4.xzw, r13.xxyz, l(1023, 0, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r10.xyz, r4.xzwx, r13.xyzx, l(0,0,0,0) + utof r4.xz, r9.zzwz + ushr r9.xyzw, r8.zyyz, l(10, 10, 20, 20) + mov r13.x, r8.z + mov r13.yz, r9.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r11.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mul r4.xz, r4.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r9.x, r8.y + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r12.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r8.ywww, l(30, 10, 20, 30) + utof r13.xy, r9.xwxx + mov r9.x, r8.w + and r14.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r17.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r16.xyzx, r15.xyzx, r9.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r15.xyzx, r9.xyzx + movc r8.xzw, r14.yyzx, r9.yyzx, l(0,0,0,0) + mul r9.xy, r13.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r10.w, r4.x + mov r11.w, r4.z + mov r12.w, r9.x + mov r8.y, r9.y + break + case l(4) + ishl r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + mov r13.xz, r9.xxyx + mov r13.yw, r8.xxxz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.xz, r9.zzwz + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xw, r9.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r8.xzyw, l(16, 16, 16, 16) + f16tof32 r10.x, r8.x + f16tof32 r10.y, r9.x + f16tof32 r11.x, r8.z + f16tof32 r11.y, r9.y + f16tof32 r12.x, r8.y + f16tof32 r12.y, r9.z + f16tof32 r8.w, r8.w + f16tof32 r8.x, r9.w + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r8.yz, l(0,0,0,0) + break + default + mov r10.x, r8.x + mov r10.yzw, l(0,0,0,0) + mov r11.x, r8.z + mov r11.yzw, l(0,0,0,0) + mov r12.x, r8.y + mov r12.yzw, l(0,0,0,0) + mov r8.xyz, l(0,0,0,0) + break + endswitch + endif + add r9.xyzw, r5.xyzw, r10.xyzw + add r10.xyzw, r6.xyzw, r11.xyzw + add r11.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r1.wxzy, r8.wxzy + ld r4.xyzw, r4.yyyy, T0[0].xzyw + if_nz r3.z + iadd r0.y, r0.w, l(163) + ld r12.xyzw, r0.yyyy, T0[0].xzyw + switch r3.w + case l(5) + ishl r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r4.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r4.xz, r16.zzwz + ishr r16.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r16.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r12.xxxz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r12.xz, r16.zzwz + ishr r16.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r16.ywzx, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r16.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.xz, r4.xxzx + f16tof32 r13.yw, r16.xxxy + f16tof32 r14.xz, r4.yywy + f16tof32 r14.yw, r16.zzzw + ushr r16.xyzw, r12.xzyw, l(16, 16, 16, 16) + f16tof32 r15.xz, r12.xxzx + f16tof32 r15.yw, r16.xxxy + f16tof32 r4.zw, r12.wwwy + f16tof32 r4.xy, r16.zwzz + break + default + mov r13.xy, r4.xzxx + mov r13.zw, l(0,0,0,0) + mov r14.xy, r4.ywyy + mov r14.zw, l(0,0,0,0) + mov r15.xy, r12.xzxx + mov r15.zw, l(0,0,0,0) + mov r4.xw, r12.wwwy + mov r4.yz, l(0,0,0,0) + break + endswitch + else + switch r3.w + case l(0) + case l(1) + ushr r12.yzw, r4.xxxx, l(0, 8, 16, 24) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyz, r4.wwww, l(8, 24, 16, 0) + and r12.xyzw, r4.wxzy, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r12.yzw, r4.xxxx, l(0, 10, 20, 30) + mov r12.x, r4.x + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r13.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r12.x, r4.z + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r14.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r12.x, r4.y + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r15.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.xyz, r4.wwww, l(10, 30, 20, 0) + and r12.xyzw, r4.wxzy, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r4.xyzw, r12.ywzx, l(0.000978, 0.333333, 0.000978, 0.000978) + break + case l(3) + case l(12) + ushr r12.xyzw, r4.xxxz, l(10, 20, 30, 30) + mov r16.x, r4.x + mov r16.yz, r12.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r13.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r0.yw, r12.zzzw + ushr r12.xyzw, r4.zyyz, l(10, 10, 20, 20) + mov r16.x, r4.z + mov r16.yz, r12.xxwx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r14.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + mul r0.yw, r0.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r12.x, r4.y + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r18.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r17.xyzx, r16.xyzx, r12.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r16.xyzx, r12.xyzx + movc r15.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r4.ywww, l(30, 10, 20, 30) + utof r3.yz, r12.xxwx + mov r12.x, r4.w + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r18.xyzx, r17.xyzx, r12.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r17.xyzx, r12.xyzx + movc r4.xzw, r16.yyzx, r12.yyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r0.y + mov r14.w, r0.w + mov r15.w, r3.y + mov r4.y, r3.z + break + case l(4) + ishl r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + mov r16.xz, r12.xxyx + mov r16.yw, r4.xxxz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.xz, r12.zzwz + ishr r12.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xw, r12.wwwz, l(-1.000000, 0.000000, 0.000000, -1.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + case l(6) + ushr r12.xyzw, r4.xzyw, l(16, 16, 16, 16) + f16tof32 r13.x, r4.x + f16tof32 r13.y, r12.x + f16tof32 r14.x, r4.z + f16tof32 r14.y, r12.y + f16tof32 r15.x, r4.y + f16tof32 r15.y, r12.z + f16tof32 r4.w, r4.w + f16tof32 r4.x, r12.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r4.yz, l(0,0,0,0) + break + default + mov r13.x, r4.x + mov r13.yzw, l(0,0,0,0) + mov r14.x, r4.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r4.y + mov r15.yzw, l(0,0,0,0) + mov r4.xyz, l(0,0,0,0) + break + endswitch + endif + add r5.xyzw, r9.xyzw, r13.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + add r7.xyzw, r11.xyzw, r15.xyzw + add r1.xyzw, r4.xyzw, r8.ywzx + else + mov r2.y, r3.x + endif +endif +mul r3.xyzw, r2.yyyy, r5.xyzw +mul r4.xyzw, r2.yyyy, r6.xzwy +mul r5.xyzw, r2.yyyy, r7.xyzw +mul r1.xyzw, r1.wzyx, r2.yyyy +if_nz r2.z + mov r3.xz, r3.zzxz + mov r6.xz, r4.yyxy + mov r5.xz, r5.zzxz + mov r7.xz, r1.yyxy +else + mov r6.xz, r4.xxyx + mov r7.xz, r1.xxyx +endif +ubfe r0.y, l(6), l(7), CB0[0][0].z +switch r0.y + case l(26) + mov_sat r3.xyzw, r3.xyzw + mad r8.xyzw, r3.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r4.xy, r8.ywyy, l(0x00010000, 0x00010000, 0, 0), r8.xzxx + mov r6.yw, r4.wwwz + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r4.zw, r8.yyyw, l(0, 0, 0x00010000, 0x00010000), r8.xxxz + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.xy, r8.ywyy, l(0x00010000, 0x00010000, 0, 0), r8.xzxx + mov r7.yw, r1.wwwz + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.zw, r8.yyyw, l(0, 0, 0x00010000, 0x00010000), r8.xxxz + break + case l(32) + f32tof16 r8.xy, r3.xzxx + f32tof16 r8.zw, r6.xxxz + f32tof16 r9.xy, r3.ywyy + f32tof16 r9.zw, r4.wwwz + imad r4.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r8.xyzw + f32tof16 r8.xy, r5.xzxx + f32tof16 r8.zw, r7.xxxz + f32tof16 r9.xy, r5.ywyy + f32tof16 r9.zw, r1.wwwz + imad r1.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r8.xyzw + break + default + mov r4.xy, r3.xyxx + mov r4.z, r6.x + mov r1.xy, r5.xyxx + mov r1.z, r7.x + break +endswitch +if_nz r2.w + if_z vThreadID.x + mov r4.xy, r4.zwzz + mov r1.xy, r1.zwzz + endif + if_z vThreadID.y + mov r4.xyzw, r1.xyzw + endif +endif +bfi r0.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, vThreadID.xyyx +bfi r2.y, l(10), l(5), CB0[0][0].w, l(0) +and r2.z, CB0[0][0].z, l(8) +if_nz r2.z + ubfe r2.z, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r5.x, r2.z, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r5.x, r2.w, r3.x + ushr r3.x, r2.y, l(5) + imad r2.w, r2.w, r3.x, r3.y + ishl r3.x, r0.z, l(11) + and r3.x, r3.x, l(0x00003000) + bfi r3.x, l(3), l(9), r0.w, r3.x + ishr r3.x, r3.x, l(6) + iadd r3.y, r3.z, r5.x + bfi r3.z, l(1), l(1), r3.y, l(0) + iadd r3.z, r3.z, r3.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r3.y, l(1), l(0), r3.y, r3.z + and r3.z, r3.x, l(240) + bfi r5.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r5.xxxy + bfi r3.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r3.xxxx, r3.zzwz + bfi r2.zw, l(0, 0, 2, 2), l(0, 0, 9, 12), r2.zzzz, r3.xxxz + ubfe r3.x, l(3), l(6), r2.z + and r3.z, r3.y, l(6) + bfi r3.y, l(1), l(8), r3.y, l(0) + imad r3.x, r3.x, l(32), r3.y + imad r3.x, r3.z, l(4), r3.x + bfi r2.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r2.zzzw + bfi r2.w, l(9), l(3), r3.x, r2.w + bfi r2.z, l(6), l(0), r2.z, r2.w +else + ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r2.y, l(5) + imad r0.x, r3.y, r0.x, r3.x + ishl r2.yw, r0.zzzz, l(0, 5, 0, 7) + and r2.yw, r2.yyyw, l(0, 448, 0, 2048) + bfi r0.y, l(3), l(3), r0.w, r2.y + ishl r2.y, r2.y, l(1) + bfi r0.w, l(3), l(4), r0.w, r2.y + and r0.w, r0.w, l(992) + bfi r2.y, l(22), l(10), r0.x, r0.w + bfi r2.y, l(4), l(0), r0.y, r2.y + bfi r2.y, l(1), l(4), r0.z, r2.y + ishl r3.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r3.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r2.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r3.z, l(2) + iadd r0.y, r3.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r2.z, l(6), l(0), r2.y, r0.x +endif +ushr r0.x, r2.z, l(2) +ieq r0.y, r2.x, l(4) +if_nz r0.y + mov r4.xyzw, r4.yxwz + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r2.yzw, r0.zzzz, l(0, 1, 2, 3) +or r0.zw, r2.zzzw, r2.yyyz +if_nz r0.z + ishl r3.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r3.xyzw, r5.xyzw +endif +if_nz r0.w + ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +iadd r0.z, r0.x, l(1) +if_nz r0.y + mov r1.zw, r1.wwwz + mov r1.xyzw, r1.yxzw + mov r2.x, l(2) +endif +ieq r2.xyz, r2.xxxx, l(1, 2, 3, 0) +or r0.yw, r2.yyyz, r2.xxxy +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +if_nz r0.w + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +ret +// Approximately 1149 instruction slots used +#endif + +const BYTE resolve_full_64bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 72, 8, + 189, 104, 195, 145, 183, 93, + 117, 221, 96, 189, 222, 125, + 72, 152, 1, 0, 0, 0, + 196, 138, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 40, 138, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 108, 135, 0, 0, 81, 0, + 5, 0, 219, 33, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 156, 8, 0, 7, 70, 238, + 49, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 2, 50, 0, 2, 0, + 104, 0, 0, 2, 21, 0, + 0, 0, 155, 0, 0, 4, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 12, 50, 0, + 16, 0, 0, 0, 0, 0, + 86, 133, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 29, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 20, 50, 0, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 38, 10, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 30, 0, 0, 6, 50, 0, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 70, 0, 2, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 2, 0, 0, 0, + 38, 130, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 7, 0, 0, 0, + 255, 3, 0, 0, 0, 0, + 0, 1, 0, 0, 0, 64, + 138, 0, 0, 17, 242, 0, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 12, 0, + 0, 0, 2, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 13, 0, 0, 0, 10, 0, + 0, 0, 29, 0, 0, 0, + 25, 0, 0, 0, 6, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 31, 0, 4, 3, 58, 0, + 16, 0, 0, 0, 0, 0, + 54, 0, 0, 5, 34, 0, + 16, 0, 4, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 18, 0, 0, 1, + 32, 0, 0, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 5, 0, 0, 0, 31, 0, + 4, 3, 58, 0, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 18, 0, 0, 1, 54, 0, + 0, 5, 34, 0, 16, 0, + 4, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 21, 0, + 0, 1, 80, 0, 0, 10, + 194, 0, 16, 0, 1, 0, + 0, 0, 86, 5, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 10, 194, 0, + 16, 0, 1, 0, 0, 0, + 166, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 50, 0, 16, 0, + 1, 0, 0, 0, 70, 0, + 16, 0, 1, 0, 0, 0, + 230, 10, 16, 0, 1, 0, + 0, 0, 85, 0, 0, 7, + 18, 0, 16, 0, 4, 0, + 0, 0, 26, 0, 16, 0, + 4, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 10, 194, 0, + 16, 0, 1, 0, 0, 0, + 6, 4, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 50, 0, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 78, 0, 0, 11, + 194, 0, 16, 0, 1, 0, + 0, 0, 0, 208, 0, 0, + 6, 4, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 0, 0, 0, + 16, 0, 0, 0, 55, 0, + 0, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 3, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 41, 0, + 0, 7, 34, 0, 16, 0, + 3, 0, 0, 0, 42, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 34, 0, 16, 0, 2, 0, + 0, 0, 58, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 2, 0, 0, 0, + 26, 0, 16, 0, 3, 0, + 0, 0, 30, 0, 0, 7, + 34, 0, 16, 0, 2, 0, + 0, 0, 26, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 3, 0, 0, 0, + 35, 0, 0, 13, 50, 0, + 16, 0, 1, 0, 0, 0, + 230, 10, 16, 128, 65, 0, + 0, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 80, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 70, 0, 16, 0, + 1, 0, 0, 0, 35, 0, + 0, 9, 18, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 80, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 130, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 5, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 45, 0, 0, 8, + 242, 0, 16, 0, 1, 0, + 0, 0, 246, 15, 16, 0, + 0, 0, 0, 0, 134, 125, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 3, 0, 0, 0, 30, 0, + 0, 7, 34, 0, 16, 0, + 2, 0, 0, 0, 58, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 45, 0, 0, 8, + 242, 0, 16, 0, 4, 0, + 0, 0, 86, 5, 16, 0, + 2, 0, 0, 0, 134, 125, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 76, 0, + 0, 3, 58, 0, 16, 0, + 3, 0, 0, 0, 6, 0, + 0, 3, 1, 64, 0, 0, + 5, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 8, 0, 0, 0, 134, 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0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 125, 4, 0, 0, 21, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 117, 0, + 0, 0, 188, 0, 0, 0, + 170, 0, 0, 0, 50, 0, + 0, 0, 28, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 222, 0, + 0, 0, 65, 0, 0, 0, + 68, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_cs.h new file mode 100644 index 000000000..6f9f18eb7 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_cs.h @@ -0,0 +1,7592 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 23 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].zxzz, l(7, 1023, 0x01000000, 8) +ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r2.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r2.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.y, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w +iadd r2.x, r2.z, r4.z +ishl r2.y, l(4), r2.x +ishl r1.w, r1.w, l(2) +if_nz r4.z + ieq r2.z, r2.y, l(8) + if_nz r2.z + ld_raw r5.xyzw, r1.w, T0[0].zwxy + iadd r2.z, r1.w, l(16) + ld_raw r6.xyzw, r2.z, T0[0].zwxy + mov r7.xy, r5.zwzz + mov r8.xy, r6.zwzz + else + ld_raw r7.xy, r1.w, T0[0].xyxx + iadd r2.z, r2.y, r1.w + ld_raw r5.xy, r2.z, T0[0].xyxx + ishl r2.zw, l(0, 0, 8, 12), r2.xxxx + iadd r2.zw, r1.wwww, r2.zzzw + ld_raw r8.xy, r2.z, T0[0].xyxx + ld_raw r6.xy, r2.w, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r7.zw, r7.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r7.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r5.zw, r5.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r5.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r8.zw, r8.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r8.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r6.zw, r6.xxxy, l(0, 0, 16, 16) + ishr r9.xyzw, r6.zxwy, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.xxxy, l(0, 0, 16, 16) + f16tof32 r7.xz, r7.xxyx + f16tof32 r7.yw, r2.zzzw + ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) + f16tof32 r5.xz, r5.xxyx + f16tof32 r5.yw, r2.zzzw + ushr r2.zw, r8.xxxy, l(0, 0, 16, 16) + f16tof32 r8.xz, r8.xxyx + f16tof32 r8.yw, r2.zzzw + ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) + f16tof32 r6.xz, r6.xxyx + f16tof32 r6.yw, r2.zzzw + break + default + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + endswitch +else + ieq r2.z, r2.y, l(4) + if_nz r2.z + ld_raw r6.xyzw, r1.w, T0[0].wxyz + else + ld_raw r6.y, r1.w, T0[0].xxxx + iadd r2.z, r2.y, r1.w + ld_raw r6.z, r2.z, T0[0].xxxx + ishl r2.zw, l(0, 0, 8, 12), r2.xxxx + iadd r2.zw, r1.wwww, r2.zzzw + ld_raw r6.w, r2.z, T0[0].xxxx + ld_raw r6.x, r2.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r9.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r9.x, r6.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r9.x, r6.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r6.wwww, l(0, 8, 16, 24) + mov r9.x, r6.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r9.x, r6.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r9.x, r6.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r6.wwww, l(0, 10, 20, 30) + mov r9.x, r6.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r10.x, r6.y + mov r10.yz, r9.xxyx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.zw, r9.zzzw + ushr r9.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r10.x, r6.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r5.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r9.x, r6.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r4.xy, r9.xwxx + mov r9.x, r6.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r6.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r7.w, r2.z + mov r5.w, r2.w + mov r8.w, r4.x + mov r6.w, r4.y + break + case l(4) + ishl r9.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r6.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r9.zzwz + ishr r9.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r9.x + f16tof32 r5.x, r6.z + f16tof32 r5.y, r9.y + f16tof32 r8.x, r6.w + f16tof32 r8.y, r9.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r9.w + mov r7.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r5.x, r6.z + mov r5.yzw, l(0,0,0,0) + mov r8.x, r6.w + mov r8.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break + endswitch +endif +ibfe r2.z, l(6), l(16), CB0[0][0].z +ishl r2.z, r2.z, l(23) +iadd r2.z, r2.z, l(0x3f800000) +uge r2.w, r1.y, l(4) +if_nz r2.w + mul r2.w, r2.z, l(0.500000) + ishl r3.y, l(320), r4.z + iadd r3.y, r1.w, r3.y + if_nz r4.z + ieq r4.x, r2.y, l(8) + if_nz r4.x + ld_raw r9.xyzw, r3.y, T0[0].zwxy + iadd r4.x, r3.y, l(16) + ld_raw r10.xyzw, r4.x, T0[0].zwxy + mov r11.xy, r9.zwzz + mov r12.xy, r10.zwzz + else + ld_raw r11.xy, r3.y, T0[0].xyxx + iadd r4.x, r2.y, r3.y + ld_raw r9.xy, r4.x, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r3.yyyy, r4.xyxx + ld_raw r12.xy, r4.x, T0[0].xyxx + ld_raw r10.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) + f16tof32 r11.xz, r11.xxyx + f16tof32 r11.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) + f16tof32 r12.xz, r12.xxyx + f16tof32 r12.yw, r4.xxxy + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + break + default + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + endswitch + else + ieq r4.x, r2.y, l(4) + if_nz r4.x + ld_raw r10.xyzw, r3.y, T0[0].wxyz + else + ld_raw r10.y, r3.y, T0[0].xxxx + iadd r4.x, r2.y, r3.y + ld_raw r10.z, r4.x, T0[0].xxxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r3.yyyy, r4.xyxx + ld_raw r10.w, r4.x, T0[0].xxxx + ld_raw r10.x, r4.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r14.x, r10.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r4.xy, r13.zwzz + ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r14.x, r10.z + mov r14.yz, r13.xxwx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r13.x, r10.w + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r14.xy, r13.xwxx + mov r13.x, r10.x + and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r16.xyzx, r13.xyzx + movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) + mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r4.x + mov r9.w, r4.y + mov r12.w, r13.x + mov r10.w, r13.y + break + case l(4) + ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r10.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r13.zzwz + ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r13.x + f16tof32 r9.x, r10.z + f16tof32 r9.y, r13.y + f16tof32 r12.x, r10.w + f16tof32 r12.y, r13.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r13.w + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r9.x, r10.z + mov r9.yzw, l(0,0,0,0) + mov r12.x, r10.w + mov r12.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + endif + add r7.xyzw, r7.xyzw, r11.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r2.z, r2.z, l(0.250000) + ishl r4.xy, l(4, 324, 0, 0), r4.zzzz + iadd r1.yw, r1.wwww, r4.xxxy + if_nz r4.z + ieq r3.y, r2.y, l(8) + if_nz r3.y + ld_raw r9.xyzw, r1.y, T0[0].zwxy + iadd r3.y, r1.y, l(16) + ld_raw r10.xyzw, r3.y, T0[0].zwxy + mov r11.xy, r9.zwzz + mov r12.xy, r10.zwzz + else + ld_raw r11.xy, r1.y, T0[0].xyxx + iadd r3.y, r2.y, r1.y + ld_raw r9.xy, r3.y, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r12.xy, r4.x, T0[0].xyxx + ld_raw r10.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r11.zw, r11.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r11.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r9.zw, r9.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r9.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r12.zw, r12.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r12.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r10.zw, r10.xxxy, l(0, 0, 16, 16) + ishr r13.xyzw, r10.zxwy, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r11.xyxx, l(16, 16, 0, 0) + f16tof32 r11.xz, r11.xxyx + f16tof32 r11.yw, r4.xxxy + ushr r4.xy, r9.xyxx, l(16, 16, 0, 0) + f16tof32 r9.xz, r9.xxyx + f16tof32 r9.yw, r4.xxxy + ushr r4.xy, r12.xyxx, l(16, 16, 0, 0) + f16tof32 r12.xz, r12.xxyx + f16tof32 r12.yw, r4.xxxy + ushr r4.xy, r10.xyxx, l(16, 16, 0, 0) + f16tof32 r10.xz, r10.xxyx + f16tof32 r10.yw, r4.xxxy + break + default + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + endswitch + else + ieq r3.y, r2.y, l(4) + if_nz r3.y + ld_raw r10.xyzw, r1.y, T0[0].wxyz + else + ld_raw r10.y, r1.y, T0[0].xxxx + iadd r3.y, r2.y, r1.y + ld_raw r10.z, r3.y, T0[0].xxxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r10.w, r4.x, T0[0].xxxx + ld_raw r10.x, r4.y, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r13.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r10.wwww, l(0, 8, 16, 24) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r13.x, r10.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r13.x, r10.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r10.wwww, l(0, 10, 20, 30) + mov r13.x, r10.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r14.x, r10.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r11.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r4.xy, r13.zwzz + ushr r13.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r14.x, r10.z + mov r14.yz, r13.xxwx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r13.x, r10.w + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r12.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + ushr r13.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r14.xy, r13.xwxx + mov r13.x, r10.x + and r15.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r18.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r17.xyzx, r16.xyzx, r13.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r16.xyzx, r13.xyzx + movc r10.xyz, r15.xyzx, r13.xyzx, l(0,0,0,0) + mul r13.xy, r14.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r4.x + mov r9.w, r4.y + mov r12.w, r13.x + mov r10.w, r13.y + break + case l(4) + ishl r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r10.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r13.zzwz + ishr r13.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r13.x + f16tof32 r9.x, r10.z + f16tof32 r9.y, r13.y + f16tof32 r12.x, r10.w + f16tof32 r12.y, r13.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r13.w + mov r11.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r9.x, r10.z + mov r9.yzw, l(0,0,0,0) + mov r12.x, r10.w + mov r12.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + endif + add r11.xyzw, r7.xyzw, r11.xyzw + add r9.xyzw, r5.xyzw, r9.xyzw + add r12.xyzw, r8.xyzw, r12.xyzw + add r10.xyzw, r6.xyzw, r10.xyzw + if_nz r4.z + ieq r1.y, r2.y, l(8) + if_nz r1.y + ld_raw r13.xyzw, r1.w, T0[0].zwxy + iadd r1.y, r1.w, l(16) + ld_raw r14.xyzw, r1.y, T0[0].zwxy + mov r15.xy, r13.zwzz + mov r16.xy, r14.zwzz + else + ld_raw r15.xy, r1.w, T0[0].xyxx + iadd r1.y, r2.y, r1.w + ld_raw r13.xy, r1.y, T0[0].xyxx + ishl r4.xy, l(8, 12, 0, 0), r2.xxxx + iadd r4.xy, r1.wwww, r4.xyxx + ld_raw r16.xy, r4.x, T0[0].xyxx + ld_raw r14.xy, r4.y, T0[0].xyxx + endif + switch r4.w + case l(5) + ishl r15.zw, r15.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r15.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r13.zw, r13.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r13.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r16.zw, r16.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r16.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ishl r14.zw, r14.xxxy, l(0, 0, 16, 16) + ishr r17.xyzw, r14.zxwy, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xyzw, r17.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r15.xyxx, l(16, 16, 0, 0) + f16tof32 r15.xz, r15.xxyx + f16tof32 r15.yw, r4.xxxy + ushr r4.xy, r13.xyxx, l(16, 16, 0, 0) + f16tof32 r13.xz, r13.xxyx + f16tof32 r13.yw, r4.xxxy + ushr r4.xy, r16.xyxx, l(16, 16, 0, 0) + f16tof32 r16.xz, r16.xxyx + f16tof32 r16.yw, r4.xxxy + ushr r4.xy, r14.xyxx, l(16, 16, 0, 0) + f16tof32 r14.xz, r14.xxyx + f16tof32 r14.yw, r4.xxxy + break + default + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + endswitch + else + ieq r1.y, r2.y, l(4) + if_nz r1.y + ld_raw r14.xyzw, r1.w, T0[0].wxyz + else + ld_raw r14.y, r1.w, T0[0].xxxx + iadd r1.y, r2.y, r1.w + ld_raw r14.z, r1.y, T0[0].xxxx + ishl r2.xy, l(8, 12, 0, 0), r2.xxxx + iadd r1.yw, r1.wwww, r2.xxxy + ld_raw r14.w, r1.y, T0[0].xxxx + ld_raw r14.x, r1.w, T0[0].xxxx + endif + switch r4.w + case l(0) + case l(1) + ushr r4.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r4.x, r14.y + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r4.x, r14.z + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r13.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r14.wwww, l(0, 8, 16, 24) + mov r4.x, r14.w + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r16.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r4.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r14.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r4.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r4.x, r14.y + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r4.x, r14.z + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r13.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r14.wwww, l(0, 10, 20, 30) + mov r4.x, r14.w + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r16.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r4.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r4.xyzw, r4.xyzw + mul r14.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r4.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r17.x, r14.y + mov r17.yz, r4.xxyx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r15.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + utof r1.yw, r4.zzzw + ushr r4.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r17.x, r14.z + mov r17.yz, r4.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r1.yw, r1.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r4.x, r14.w + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r16.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + ushr r4.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r2.xy, r4.xwxx + mov r4.x, r14.x + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + mul r2.xy, r2.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r15.w, r1.y + mov r13.w, r1.w + mov r16.w, r2.x + mov r14.w, r2.y + break + case l(4) + ishl r4.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r17.xz, r4.xxyx + mov r17.yw, r14.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r4.zzwz + ishr r4.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r4.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r4.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r14.y + f16tof32 r15.y, r4.x + f16tof32 r13.x, r14.z + f16tof32 r13.y, r4.y + f16tof32 r16.x, r14.w + f16tof32 r16.y, r4.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r4.w + mov r15.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r14.y + mov r15.yzw, l(0,0,0,0) + mov r13.x, r14.z + mov r13.yzw, l(0,0,0,0) + mov r16.x, r14.w + mov r16.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + endif + add r7.xyzw, r11.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r13.xyzw + add r8.xyzw, r12.xyzw, r16.xyzw + add r6.xyzw, r10.xyzw, r14.xyzw + else + mov r2.z, r2.w + endif +endif +mul r4.xyzw, r2.zzzz, r7.xyzw +mul r5.xyzw, r2.zzzz, r5.xzwy +mul r7.xyzw, r2.zzzz, r8.xyzw +mul r2.xyzw, r2.zzzz, r6.xzwy +if_nz r3.z + mov r4.xz, r4.zzxz + mov r6.xz, r5.yyxy + mov r7.xz, r7.zzxz + mov r8.xz, r2.yyxy +else + mov r6.xz, r5.xxyx + mov r8.xz, r2.xxyx +endif +ubfe r1.y, l(6), l(7), CB0[0][0].z +switch r1.y + case l(26) + mov_sat r4.xyzw, r4.xyzw + mad r9.xyzw, r4.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r5.xy, r9.ywyy, l(0x00010000, 0x00010000, 0, 0), r9.xzxx + mov r6.yw, r5.wwwz + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r5.zw, r9.yyyw, l(0, 0, 0x00010000, 0x00010000), r9.xxxz + mov_sat r7.xyzw, r7.xyzw + mad r9.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r2.xy, r9.ywyy, l(0x00010000, 0x00010000, 0, 0), r9.xzxx + mov r8.yw, r2.wwwz + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r2.zw, r9.yyyw, l(0, 0, 0x00010000, 0x00010000), r9.xxxz + break + case l(32) + f32tof16 r9.xy, r4.xzxx + f32tof16 r9.zw, r6.xxxz + f32tof16 r10.xy, r4.ywyy + f32tof16 r10.zw, r5.wwwz + imad r5.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.xyzw + f32tof16 r9.xy, r7.xzxx + f32tof16 r9.zw, r8.xxxz + f32tof16 r10.xy, r7.ywyy + f32tof16 r10.zw, r2.wwwz + imad r2.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.xyzw + break + default + mov r5.xy, r4.xyxx + mov r5.z, r6.x + mov r2.xy, r7.xyxx + mov r2.z, r8.x + break +endswitch +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r4.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r4.x + ushr r3.y, r1.x, l(5) + imad r1.z, r1.z, r3.y, r4.y + ishl r3.y, r0.z, l(11) + and r3.y, r3.y, l(0x00003000) + bfi r3.y, l(3), l(9), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r1.w, r1.w, r4.z + bfi r3.z, l(1), l(1), r1.w, l(0) + iadd r3.z, r3.z, r4.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.z + bfi r3.zw, l(0, 0, 19, 19), l(0, 0, 11, 14), r1.zzzz, l(0, 0, 0, 0) + imad r3.yz, r3.yyyy, l(0, 2, 16, 0), r3.zzwz + bfi r1.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r1.yyyy, r3.yyzy + bfi r3.y, l(1), l(4), r0.z, l(0) + ubfe r3.z, l(3), l(6), r1.y + and r3.w, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.z, l(32), r1.w + imad r1.w, r3.w, l(4), r1.w + bfi r1.yz, l(0, 6, 6, 0), l(0, 0, 3, 0), r3.yyyy, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r4.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r4.y, r0.x, r4.x + ishl r1.xz, r0.zzzz, l(6, 0, 7, 0) + and r1.xz, r1.xxzx, l(896, 0, 2048, 0) + bfi r0.y, l(3), l(4), r0.w, r1.x + bfi r0.y, l(22), l(10), r0.x, r0.y + bfi r0.z, l(1), l(4), r0.z, l(0) + iadd r0.y, r0.y, r0.z + ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) + bfi r1.xw, l(3, 0, 0, 3), l(7, 0, 0, 6), r0.wwww, r1.xxxw + bfi r0.xw, l(22, 0, 0, 22), l(13, 0, 0, 12), r0.xxxx, r1.xxxw + imad r0.xz, r0.zzzz, l(8, 0, 4, 0), r0.xxwx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.z, r0.z, l(1792) + iadd r0.x, r0.x, r0.z + and r0.z, r4.z, l(2) + iadd r0.z, r4.w, r0.z + bfi r0.z, l(2), l(6), r0.z, l(0) + iadd r0.x, r0.x, r0.z + bfi r1.y, l(6), l(0), r0.y, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(4) +ieq r0.y, r3.x, l(4) +if_nz r0.y + mov r5.xyzw, r5.yxwz + mov r0.z, l(2) +else + mov r0.z, r3.x +endif +ieq r1.xyz, r0.zzzz, l(1, 2, 3, 0) +or r0.zw, r1.yyyz, r1.xxxy +if_nz r0.z + ishl r1.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r1.xyzw, r4.xyzw +endif +if_nz r0.w + ushr r1.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +iadd r0.x, r0.x, l(2) +if_nz r0.y + mov r2.xyzw, r2.yxwz + mov r3.x, l(2) +endif +ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +ret +// Approximately 1223 instruction slots used +#endif + +const BYTE resolve_full_64bpp_cs[] = +{ + 68, 88, 66, 67, 124, 12, + 9, 159, 188, 99, 150, 182, + 241, 80, 98, 66, 121, 185, + 24, 93, 1, 0, 0, 0, + 0, 148, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 100, 147, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 87, 2, 0, 0, 16, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 101, 100, 114, + 97, 109, 95, 105, 110, 102, + 111, 0, 100, 119, 111, 114, + 100, 0, 0, 0, 19, 0, + 1, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 226, 1, + 0, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 97, 100, 100, 114, 101, + 115, 115, 95, 105, 110, 102, + 111, 0, 120, 101, 95, 114, + 101, 115, 111, 108, 118, 101, + 95, 100, 101, 115, 116, 95, + 105, 110, 102, 111, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 114, 101, 115, 111, + 108, 118, 101, 95, 100, 101, + 115, 116, 95, 98, 97, 115, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 108, 144, 0, 0, 81, 0, + 5, 0, 27, 36, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 161, 0, 0, 6, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 23, 0, 0, 0, 155, 0, + 0, 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0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..cd44bb564 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,12292 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 26 +dcl_thread_group 8, 8, 1 +and r0.xyzw, CB0[0][0].zxzx, l(7, 0x40000000, 8, 1023) +ieq r1.xy, vThreadID.xyxx, l(0, 0, 0, 0) +movc r1.xy, r0.yyyy, r1.xyxx, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, vThreadID.xyyx +bfi r0.y, l(10), l(5), CB0[0][0].w, l(0) +if_nz r0.z + ubfe r0.z, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.w, r0.z, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r4.x + ushr r2.w, r0.y, l(5) + imad r1.z, r1.z, r2.w, r4.y + ishl r2.w, r3.z, l(11) + and r2.w, r2.w, l(0x00003000) + bfi r2.w, l(3), l(9), r3.w, r2.w + ishr r2.w, r2.w, l(6) + iadd r1.w, r1.w, r4.z + bfi r4.xyz, l(1, 19, 19, 0), l(1, 11, 14, 0), r1.wzzw, l(0, 0, 0, 0) + iadd r4.x, r4.x, r4.w + bfi r4.x, l(2), l(1), r4.x, l(0) + bfi r1.w, l(1), l(0), r1.w, r4.x + and r4.x, r2.w, l(240) + imad r4.xy, r4.xxxx, l(2, 16, 0, 0), r4.yzyy + bfi r4.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r2.wwww, r4.xyxx + bfi r4.xy, l(2, 2, 0, 0), l(9, 12, 0, 0), r0.zzzz, r4.xyxx + ubfe r0.z, l(3), l(6), r4.x + and r1.z, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r0.z, r0.z, l(32), r1.w + imad r0.z, r1.z, l(4), r0.z + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r3.zzzz, r4.xxxy + bfi r0.z, l(9), l(3), r0.z, r1.w + bfi r0.z, l(6), l(0), r1.z, r0.z +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + ushr r0.y, r0.y, l(5) + imad r0.y, r4.y, r0.y, r4.x + ishl r1.zw, r3.zzzz, l(0, 0, 5, 7) + and r1.zw, r1.zzzw, l(0, 0, 448, 2048) + bfi r2.w, l(3), l(3), r3.w, r1.z + ishl r1.z, r1.z, l(1) + bfi r1.z, l(3), l(4), r3.w, r1.z + and r1.z, r1.z, l(992) + bfi r3.x, l(22), l(10), r0.y, r1.z + bfi r3.x, l(4), l(0), r2.w, r3.x + bfi r3.x, l(1), l(4), r3.z, r3.x + ishl r3.yw, r1.zzzz, l(0, 3, 0, 2) + bfi r3.yw, l(0, 22, 0, 22), l(0, 13, 0, 12), r0.yyyy, r3.yyyw + bfi r3.yw, l(0, 4, 0, 4), l(0, 3, 0, 2), r2.wwww, r3.yyyw + bfi r3.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), r3.zzzz, r3.yywy + bfi r0.y, l(12), l(0), r1.w, r3.y + and r1.z, r3.z, l(1792) + iadd r0.y, r0.y, r1.z + and r1.z, r4.z, l(2) + iadd r1.z, r4.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r0.y, r0.y, r1.z + bfi r0.z, l(6), l(0), r3.x, r0.y +endif +imul null, r0.y, r0.z, l(9) +ushr r0.y, r0.y, l(3) +bfi r1.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) +iadd r1.zw, r1.zzzw, vThreadID.xxxy +ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx +uge r0.z, l(3), r2.y +if_nz r0.z + mov r4.y, r2.y +else + ieq r0.z, r2.y, l(5) + if_nz r0.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.zzzz, l(2, 0, 1, 0) +and r2.xz, r2.xxzx, l(1, 0, 1, 0) +ishl r1.zw, r1.zzzw, r2.xxxz +ushr r4.x, r4.y, l(1) +and r2.xz, r4.xxyx, l(1, 0, 1, 0) +iadd r1.zw, r1.zzzw, r2.xxxz +udiv r2.xz, null, r1.zzwz, l(80, 0, 16, 0) +movc r0.z, r3.w, l(1), l(0) +ishl r2.w, r2.x, r0.z +imad r0.w, r2.z, r0.w, r2.w +iadd r0.w, r0.w, r3.y +imad r1.zw, -r2.xxxz, l(0, 0, 80, 16), r1.zzzw +imad r1.z, r1.w, l(80), r1.z +ishl r0.z, r1.z, r0.z +imad r0.z, r0.w, l(1280), r0.z +imul null, r0.w, r0.z, l(36) +ubfe r1.z, l(4), l(25), CB0[0][0].x +ld_raw r4.xyzw, r0.w, T0[0].wxyz +imad r2.xz, r0.zzzz, l(36, 0, 36, 0), l(16, 0, 20, 0) +ld_raw r5.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r7.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r4.w + and r3.yzw, r9.xxyz, l(0, 1023, 1023, 1023) + and r10.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r12.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r11.xyzx, r10.xyzx, r9.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r10.xyzx, r9.xyzx + movc r8.xyz, r3.yzwy, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r3.yz, r9.xxwx + mov r9.x, r4.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r5.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r0.w, r5.w + mul r5.w, r0.w, l(0.333333) + mov r6.w, r2.x + mov r7.w, r2.w + mov r8.w, r3.y + mov r4.w, r3.z + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r2.xw, r5.yyyx, l(16, 0, 0, 16) + itof r2.xw, r2.xxxw + mul r2.xw, r2.xxxw, l(0.000977, 0.000000, 0.000000, 0.000977) + max r5.xy, r2.xwxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.w, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r1.w, r2.y, l(4) +if_nz r1.w + mul r2.x, r0.w, l(0.500000) + imad r3.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 2880, 2896, 0) + ld_raw r9.xyzw, r3.y, T0[0].wxyz + ld_raw r10.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r2.w, r10.w + mul r10.w, r2.w, l(0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r2.w, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r2.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r2.x, r0.w, l(0.250000) + imad r9.xyzw, r0.zzzz, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r2.w, r11.w + mul r11.w, r2.w, l(0.333333) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r2.w, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r2.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r2.w, r9.w + mul r9.w, r2.w, l(0.333333) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r2.w, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r2.w + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r2.x, r0.w +endif +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xzwy +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r4.xyzw, r2.xxxx, r4.xzwy +mul r5.xyzw, r2.xxxx, r5.xyzw +and r2.x, CB0[0][0].z, l(0x01000000) +if_nz r2.x + mov r6.xz, r6.zzxz + mov r9.xz, r7.yyxy + mov r8.xz, r8.zzxz + mov r10.xz, r4.yyxy + mov r5.xz, r5.zzxz +else + mov r9.xz, r7.xxyx + mov r10.xz, r4.xxyx +endif +switch r3.x + case l(26) + mov_sat r6.xyzw, r6.xyzw + mad r11.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r7.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx + mov r9.yw, r7.wwwz + mov_sat r9.xyzw, r9.xyzw + mad r11.xyzw, r9.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r7.zw, r11.yyyw, l(0, 0, 0x00010000, 0x00010000), r11.xxxz + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r4.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx + mov r10.yw, r4.wwwz + mov_sat r10.xyzw, r10.xyzw + mad r11.xyzw, r10.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r4.zw, r11.yyyw, l(0, 0, 0x00010000, 0x00010000), r11.xxxz + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r5.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx + break + case l(32) + f32tof16 r11.xy, r6.xzxx + f32tof16 r11.zw, r9.xxxz + f32tof16 r12.xy, r6.ywyy + f32tof16 r12.zw, r7.wwwz + imad r7.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyzw + f32tof16 r11.xy, r8.xzxx + f32tof16 r11.zw, r10.xxxz + f32tof16 r12.xy, r8.ywyy + f32tof16 r12.zw, r4.wwwz + imad r4.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyzw + f32tof16 r3.yz, r5.xxzx + f32tof16 r5.zw, r5.yyyw + imad r5.xy, r5.zwzz, l(0x00010000, 0x00010000, 0, 0), r3.yzyy + break + default + mov r7.xy, r6.xyxx + mov r7.z, r9.x + mov r4.xy, r8.xyxx + mov r4.z, r10.x + break +endswitch +ieq r2.w, r0.x, l(4) +if_nz r2.w + mov r7.xyzw, r7.yxwz + mov r4.xyzw, r4.yxwz + mov r5.xy, r5.yxyy + mov r3.y, l(2) +else + mov r3.y, r0.x +endif +ieq r3.yzw, r3.yyyy, l(0, 1, 2, 3) +or r3.yz, r3.zzwz, r3.yyzy +if_nz r3.y + ishl r6.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r6.xyzw, r8.xyzw + ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r6.xyzw, r8.xyzw + ishl r3.yw, r5.xxxy, l(0, 8, 0, 8) + and r3.yw, r3.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r3.ywyy, r5.zwzz +endif +if_nz r3.z + ushr r6.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r6.xyzw + ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + ushr r3.yz, r5.xxyx, l(0, 16, 16, 0) + bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.yzyy +endif +if_nz r1.x + mov r7.xy, r7.zwzz + mov r4.zw, r5.xxxy +endif +if_nz r1.y + mov r7.xy, r4.zwzz + mov r7.zw, r5.xxxy +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r7.xyxx +iadd r6.xyzw, r0.yyyy, l(1, 3, 4, 2) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.zwzz +store_uav_typed U0[0].xyzw, r6.yyyy, r4.zwzz +store_uav_typed U0[0].xyzw, r6.zzzz, r5.xyxx +ld_raw r5.xyzw, r2.z, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r10.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.wwww, l(0, 8, 16, 24) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.wwww, l(0, 10, 20, 30) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r6.x, r5.y + mov r6.yz, r10.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r13.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r12.xyzx, r11.xyzx, r6.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r11.xyzx, r6.xyzx + movc r7.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r3.yz, r10.zzwz + ushr r10.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r6.x, r5.z + mov r6.yz, r10.xxwx + and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r13.xyzx, r12.xyzx, r6.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r12.xyzx, r6.xyzx + movc r8.xyz, r11.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r10.x, r5.w + and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r9.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r4.zw, r10.xxxw + mov r10.x, r5.x + and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r5.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r7.w, r3.y + mov r8.w, r3.z + mov r9.w, r4.z + mov r5.w, r4.w + break + case l(4) + ishl r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r11.xz, r10.xxyx + mov r11.yw, r5.yyyz + ishr r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r10.zzwz + ishr r10.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r5.y + f16tof32 r7.y, r10.x + f16tof32 r8.x, r5.z + f16tof32 r8.y, r10.y + f16tof32 r9.x, r5.w + f16tof32 r9.y, r10.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r10.w + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r7.x, r5.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r5.w + mov r9.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.w, r0.w, l(0.500000) + imad r2.z, r0.z, l(36), l(2900) + ld_raw r10.xyzw, r2.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r6.x, r10.y + mov r6.yz, r14.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r15.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r17.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r16.xyzx, r15.xyzx, r6.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r15.xyzx, r6.xyzx + movc r11.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r6.x, r10.z + mov r6.yz, r14.xxwx + and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r16.xyzx, r6.xyzx + movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r10.w + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r4.zw, r14.xxxw + mov r14.x, r10.x + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r4.z + mov r10.w, r4.w + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r11.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r9.xyzw, r9.xyzw, r13.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r2.y, r2.y, l(6) + if_nz r2.y + mul r0.w, r0.w, l(0.250000) + imad r2.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 56, 2936, 0) + ld_raw r10.xyzw, r2.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r6.x, r10.y + mov r6.yz, r14.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r15.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r17.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r16.xyzx, r15.xyzx, r6.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r15.xyzx, r6.xyzx + movc r11.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r6.x, r10.z + mov r6.yz, r14.xxwx + and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r16.xyzx, r6.xyzx + movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r10.w + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r4.zw, r14.xxxw + mov r14.x, r10.x + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r4.z + mov r10.w, r4.w + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r11.xyzw, r7.xyzw, r11.xyzw + add r12.xyzw, r8.xyzw, r12.xyzw + add r13.xyzw, r9.xyzw, r13.xyzw + add r10.xyzw, r5.xyzw, r10.xyzw + ld_raw r14.xyzw, r2.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r18.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r18.x, r14.y + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r18.x, r14.z + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r14.wwww, l(0, 8, 16, 24) + mov r18.x, r14.w + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r18.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r18.x, r14.y + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r18.x, r14.z + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r14.wwww, l(0, 10, 20, 30) + mov r18.x, r14.w + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r18.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r6.x, r14.y + mov r6.yz, r18.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r15.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r2.yz, r18.zzwz + ushr r18.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r6.x, r14.z + mov r6.yz, r18.xxwx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r16.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + mul r2.yz, r2.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r18.x, r14.w + and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) + and r6.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r20.xyz, r6.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r6.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r20.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r19.xyzx, r6.xyzx, r18.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r18.xyzx, r6.xyzx + movc r17.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + ushr r18.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r3.yz, r18.xxwx + mov r18.x, r14.x + and r6.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r14.xyz, r6.xyzx, r18.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.w, r2.y + mov r16.w, r2.z + mov r17.w, r3.y + mov r14.w, r3.z + break + case l(4) + ishl r18.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r19.xz, r18.xxyx + mov r19.yw, r14.yyyz + ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r18.zzwz + ishr r18.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r18.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r14.y + f16tof32 r15.y, r18.x + f16tof32 r16.x, r14.z + f16tof32 r16.y, r18.y + f16tof32 r17.x, r14.w + f16tof32 r17.y, r18.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r18.w + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r14.y + mov r15.yzw, l(0,0,0,0) + mov r16.x, r14.z + mov r16.yzw, l(0,0,0,0) + mov r17.x, r14.w + mov r17.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r11.xyzw, r15.xyzw + add r8.xyzw, r12.xyzw, r16.xyzw + add r9.xyzw, r13.xyzw, r17.xyzw + add r5.xyzw, r10.xyzw, r14.xyzw + else + mov r0.w, r1.w + endif +endif +mul r7.xyzw, r0.wwww, r7.xyzw +mul r8.xyzw, r0.wwww, r8.xzwy +mul r9.xyzw, r0.wwww, r9.xyzw +mul r5.xyzw, r0.wwww, r5.xzwy +if_nz r2.x + mov r7.xz, r7.zzxz + mov r10.xz, r8.yyxy + mov r9.xz, r9.zzxz + mov r11.xz, r5.yyxy +else + mov r10.xz, r8.xxyx + mov r11.xz, r5.xxyx +endif +switch r3.x + case l(26) + mov_sat r7.xyzw, r7.xyzw + mad r3.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r8.xy, r3.ywyy, l(0x00010000, 0x00010000, 0, 0), r3.xzxx + mov r10.yw, r8.wwwz + mov_sat r10.xyzw, r10.xyzw + mad r3.xyzw, r10.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r8.zw, r3.yyyw, l(0, 0, 0x00010000, 0x00010000), r3.xxxz + mov_sat r9.xyzw, r9.xyzw + mad r3.xyzw, r9.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r5.xy, r3.ywyy, l(0x00010000, 0x00010000, 0, 0), r3.xzxx + mov r11.yw, r5.wwwz + mov_sat r11.xyzw, r11.xyzw + mad r3.xyzw, r11.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r5.zw, r3.yyyw, l(0, 0, 0x00010000, 0x00010000), r3.xxxz + break + case l(32) + f32tof16 r3.xy, r7.xzxx + f32tof16 r3.zw, r10.xxxz + f32tof16 r12.xy, r7.ywyy + f32tof16 r12.zw, r8.wwwz + imad r8.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyzw + f32tof16 r3.xy, r9.xzxx + f32tof16 r3.zw, r11.xxxz + f32tof16 r12.xy, r9.ywyy + f32tof16 r12.zw, r5.wwwz + imad r5.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyzw + break + default + mov r8.xy, r7.xyxx + mov r8.z, r10.x + mov r5.xy, r9.xyxx + mov r5.z, r11.x + break +endswitch +if_nz r2.w + mov r8.xyzw, r8.yxwz + mov r5.xyzw, r5.yxwz + mov r0.x, l(2) +endif +ieq r0.xzw, r0.xxxx, l(1, 0, 2, 3) +or r0.xz, r0.zzwz, r0.xxzx +if_nz r0.x + ishl r2.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r8.xyzw, r2.xyzw, r3.xyzw + ishl r2.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r2.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r2.xyzw, r8.xyzw, l(16, 16, 16, 16) + bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.xyzw + ushr r2.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r2.xyzw +endif +if_nz r1.x + mov r8.zw, r5.xxxy +endif +if_nz r1.y + mov r4.xy, r8.xyxx +endif +store_uav_typed U0[0].xyzw, r6.wwww, r4.xyxx +iadd r1.xyzw, r0.yyyy, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r1.xxxx, r8.xyxx +store_uav_typed U0[0].xyzw, r1.yyyy, r8.zwzz +store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyxx +store_uav_typed U0[0].xyzw, r1.wwww, r5.zwzz +ret +// Approximately 1912 instruction slots used +#endif + +const BYTE resolve_full_64bpp_from_32bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 195, 47, + 213, 68, 0, 100, 184, 201, + 66, 22, 234, 161, 56, 17, + 226, 199, 1, 0, 0, 0, + 8, 242, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 108, 241, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, 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+ 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 6, 0, 0, 0, 70, 0, + 16, 0, 4, 0, 0, 0, + 30, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 86, 5, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 7, 0, 0, 0, + 8, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 1, 0, 0, 0, 70, 0, + 16, 0, 8, 0, 0, 0, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 86, 5, + 16, 0, 1, 0, 0, 0, + 230, 10, 16, 0, 8, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 1, 0, + 0, 0, 70, 0, 16, 0, + 5, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 5, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 120, 7, 0, 0, 26, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 197, 0, + 0, 0, 63, 1, 0, 0, + 83, 1, 0, 0, 63, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 82, 1, + 0, 0, 146, 0, 0, 0, + 121, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_64bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_64bpp_3xres_cs.h new file mode 100644 index 000000000..b8c2ba9e9 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_64bpp_from_64bpp_3xres_cs.h @@ -0,0 +1,6133 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 10 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].zxxz, l(7, 1023, 0x40000000, 8) +ubfe r3.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +ishl r0.w, r1.z, l(1) +imad r0.w, r1.w, r2.y, r0.w +iadd r0.w, r0.w, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r1.x, r1.x, l(1) +imad r0.w, r0.w, l(1280), r1.x +imul null, r0.w, r0.w, l(9) +movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) +movc r1.xy, r2.zzzz, r1.xyxx, l(0,0,0,0) +bfi r4.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r4.xyzw, r4.xyzw, vThreadID.xyyx +bfi r0.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r2.w + ubfe r0.z, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r5.xyzw, r4.zwzw, l(4, 5, 3, 3) + ishr r1.w, r0.z, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r5.x + ushr r2.y, r0.x, l(5) + imad r1.z, r1.z, r2.y, r5.y + ishl r2.y, r4.z, l(11) + and r2.y, r2.y, l(0x00003000) + bfi r2.y, l(3), l(9), r4.w, r2.y + ishr r2.y, r2.y, l(6) + iadd r1.w, r1.w, r5.z + bfi r2.z, l(1), l(1), r1.w, l(0) + iadd r2.z, r2.z, r5.w + bfi r2.z, l(2), l(1), r2.z, l(0) + bfi r1.w, l(1), l(0), r1.w, r2.z + and r2.z, r2.y, l(240) + bfi r3.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r1.zzzz, l(0, 0, 0, 0) + imad r2.zw, r2.zzzz, l(0, 0, 2, 16), r3.xxxy + bfi r2.yz, l(0, 4, 4, 0), l(0, 0, 3, 0), r2.yyyy, r2.zzwz + bfi r2.yz, l(0, 2, 2, 0), l(0, 9, 12, 0), r0.zzzz, r2.yyzy + ubfe r0.z, l(3), l(6), r2.y + and r1.z, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r0.z, r0.z, l(32), r1.w + imad r0.z, r1.z, l(4), r0.z + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r4.zzzz, r2.yyyz + bfi r0.z, l(9), l(3), r0.z, r1.w + bfi r0.z, l(6), l(0), r1.z, r0.z +else + ishr r5.xyzw, r4.xyzw, l(5, 5, 2, 3) + ushr r0.x, r0.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r1.zw, r4.zzzz, l(0, 0, 5, 7) + and r1.zw, r1.zzzw, l(0, 0, 448, 2048) + bfi r2.y, l(3), l(3), r4.w, r1.z + ishl r1.z, r1.z, l(1) + bfi r1.z, l(3), l(4), r4.w, r1.z + and r1.z, r1.z, l(992) + bfi r2.z, l(22), l(10), r0.x, r1.z + bfi r2.z, l(4), l(0), r2.y, r2.z + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r0.xxxx, r3.xyxx + bfi r2.yw, l(0, 4, 0, 4), l(0, 3, 0, 2), r2.yyyy, r3.xxxy + bfi r2.yzw, l(0, 1, 1, 1), l(0, 7, 4, 6), r4.zzzz, r2.yyzw + bfi r0.x, l(12), l(0), r1.w, r2.y + and r1.z, r2.w, l(1792) + iadd r0.x, r0.x, r1.z + and r1.z, r5.z, l(2) + iadd r1.z, r5.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r0.x, r0.x, r1.z + bfi r0.z, l(6), l(0), r2.z, r0.x +endif +imul null, r0.x, r0.z, l(9) +ushr r0.xw, r0.xxxw, l(3, 0, 0, 1) +imad r0.z, r1.y, l(3), r0.w +iadd r1.y, r1.x, r0.z +ld r4.yw, r1.yyyy, T0[0].zxwy +switch r3.w + case l(5) + ishl r4.xz, r4.yywy, l(16, 0, 16, 0) + ishr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.zw, r4.yyyw, l(0, 0, 16, 16) + f16tof32 r4.xy, r4.wyww + f16tof32 r4.zw, r1.wwwz + break + default + mov r4.xz, l(0,0,0,0) + break +endswitch +ibfe r1.z, l(6), l(16), CB0[0][0].z +ishl r1.z, r1.z, l(23) +iadd r1.z, r1.z, l(0x3f800000) +uge r1.w, r0.y, l(4) +if_nz r1.w + mul r2.y, r1.z, l(0.500000) + iadd r2.z, r1.y, l(720) + ld r5.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r4.xyzw, r4.xyzw, r5.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r2.y, r1.z, l(0.250000) + iadd r2.zw, r1.yyyy, l(0, 0, 9, 729) + ld r5.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r4.ywxz, r5.ywxz + ld r6.yw, r2.wwww, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r4.xyzw, r5.zxwy, r6.xyzw + endif +else + mov r2.y, r1.z +endif +mul r4.xyzw, r2.yyyy, r4.ywxz +and r1.y, CB0[0][0].z, l(0x01000000) +if_nz r1.y + mov r4.xz, r4.zzxz +endif +switch r3.z + case l(26) + mov_sat r4.xyzw, r4.xyzw + mad r5.xyzw, r4.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r5.xyzw, r5.xyzw + imad r4.xy, r5.ywyy, l(0x00010000, 0x00010000, 0, 0), r5.xzxx + break + case l(32) + f32tof16 r2.yz, r4.xxzx + f32tof16 r3.xy, r4.ywyy + imad r4.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.yzyy + break + default + break +endswitch +ieq r2.y, r2.x, l(4) +if_nz r2.y + mov r4.xy, r4.yxyy + mov r2.z, l(2) +else + mov r2.z, r2.x +endif +ieq r5.xyz, r2.zzzz, l(1, 2, 3, 0) +or r2.zw, r5.yyyz, r5.xxxy +if_nz r2.z + ishl r3.xy, r4.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.zw, r4.xxxy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r4.xy, r3.xyxx, r4.zwzz +endif +if_nz r2.w + ushr r2.zw, r4.xxxy, l(0, 0, 16, 16) + bfi r4.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r4.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx +iadd r4.xyzw, r0.xxxx, l(1, 2, 3, 4) +iadd r2.zw, r0.zzzz, l(0, 0, 1, 2) +ld r5.yw, r2.zzzz, T0[0].zxwy +switch r3.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.z, r1.z, l(0.500000) + iadd r3.x, r0.z, l(721) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r3.x, r0.y, l(6) + if_nz r3.x + mul r2.z, r1.z, l(0.250000) + iadd r3.xy, r0.zzzz, l(10, 730, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.z, r1.z +endif +mul r5.xyzw, r2.zzzz, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +switch r3.z + case l(26) + mov_sat r5.xyzw, r5.xyzw + mad r6.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r5.xy, r6.ywyy, l(0x00010000, 0x00010000, 0, 0), r6.xzxx + break + case l(32) + f32tof16 r3.xy, r5.xzxx + f32tof16 r5.zw, r5.yyyw + imad r5.xy, r5.zwzz, l(0x00010000, 0x00010000, 0, 0), r3.xyxx + break + default + break +endswitch +if_nz r2.y + mov r5.xy, r5.yxyy + mov r2.z, l(2) +else + mov r2.z, r2.x +endif +ieq r6.xyz, r2.zzzz, l(1, 2, 3, 0) +or r3.xy, r6.yzyy, r6.xyxx +if_nz r3.x + ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.xy, r5.zwzz, r6.xyxx +endif +if_nz r3.y + ushr r3.xy, r5.xyxx, l(16, 16, 0, 0) + bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyxx +ld r5.yw, r2.wwww, T0[0].zxwy +switch r3.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r2.z, r1.z, l(0.500000) + iadd r2.w, r0.z, l(722) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r0.y, l(6) + if_nz r2.w + mul r2.z, r1.z, l(0.250000) + iadd r3.xy, r0.zzzz, l(11, 731, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.z, r1.z +endif +mul r5.xyzw, r2.zzzz, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +switch r3.z + case l(26) + mov_sat r5.xyzw, r5.xyzw + mad r6.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r5.xy, r6.ywyy, l(0x00010000, 0x00010000, 0, 0), r6.xzxx + break + case l(32) + f32tof16 r2.zw, r5.xxxz + f32tof16 r3.xy, r5.ywyy + imad r5.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz + break + default + break +endswitch +if_nz r2.y + mov r5.xy, r5.yxyy + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r6.xyz, r0.zzzz, l(1, 2, 3, 0) +or r2.zw, r6.yyyz, r6.xxxy +if_nz r2.z + ishl r3.xy, r5.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r3.xyxx, r5.zwzz +endif +if_nz r2.w + ushr r2.zw, r5.xxxy, l(0, 0, 16, 16) + bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyxx +iadd r0.z, r1.x, r0.w +iadd r2.zw, r0.zzzz, l(0, 0, 3, 6) +ld r5.yw, r2.zzzz, T0[0].zxwy +switch r3.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.z, l(723) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r3.xy, r0.zzzz, l(12, 732, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.x, r1.z +endif +mul r5.xyzw, r1.xxxx, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +switch r3.z + case l(26) + mov_sat r5.xyzw, r5.xyzw + mad r6.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r6.xyzw, r6.xyzw + imad r5.xy, r6.ywyy, l(0x00010000, 0x00010000, 0, 0), r6.xzxx + break + case l(32) + f32tof16 r3.xy, r5.xzxx + f32tof16 r4.xy, r5.ywyy + imad r5.xy, r4.xyxx, l(0x00010000, 0x00010000, 0, 0), r3.xyxx + break + default + break +endswitch +if_nz r2.y + mov r5.xy, r5.yxyy + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r6.xyz, r1.xxxx, l(1, 2, 3, 0) +or r3.xy, r6.yzyy, r6.xyxx +if_nz r3.x + ishl r4.xy, r5.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r4.xyxx, r5.zwzz +endif +if_nz r3.y + ushr r3.xy, r5.xyxx, l(16, 16, 0, 0) + bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyxx +iadd r5.xyzw, r0.wwww, l(4, 5, 7, 8) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.w, l(724) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r3.xy, r0.wwww, l(13, 733, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r3.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.z +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +switch r3.z + case l(26) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx + break + case l(32) + f32tof16 r3.xy, r6.xzxx + f32tof16 r4.xy, r6.ywyy + imad r6.xy, r4.xyxx, l(0x00010000, 0x00010000, 0, 0), r3.xyxx + break + default + break +endswitch +if_nz r2.y + mov r6.xy, r6.yxyy + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r4.xyz, r1.xxxx, l(1, 2, 3, 0) +or r3.xy, r4.yzyy, r4.xyxx +if_nz r3.x + ishl r4.xy, r6.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r4.xyxx, r6.zwzz +endif +if_nz r3.y + ushr r3.xy, r6.xyxx, l(16, 16, 0, 0) + bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r4.wwww, r6.xyxx +iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.yw, r5.yyyy, T0[0].zxwy +switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.w, l(725) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r3.xy, r0.wwww, l(14, 734, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r3.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.z +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +switch r3.z + case l(26) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx + break + case l(32) + f32tof16 r3.xy, r6.xzxx + f32tof16 r5.xy, r6.ywyy + imad r6.xy, r5.xyxx, l(0x00010000, 0x00010000, 0, 0), r3.xyxx + break + default + break +endswitch +if_nz r2.y + mov r6.xy, r6.yxyy + mov r1.x, l(2) +else + mov r1.x, r2.x +endif +ieq r7.xyz, r1.xxxx, l(1, 2, 3, 0) +or r3.xy, r7.yzyy, r7.xyxx +if_nz r3.x + ishl r5.xy, r6.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r5.xyxx, r6.zwzz +endif +if_nz r3.y + ushr r3.xy, r6.xyxx, l(16, 16, 0, 0) + bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyxx +ld r6.yw, r2.wwww, T0[0].zxwy +switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r1.x, r1.z, l(0.500000) + iadd r2.z, r0.z, l(726) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r1.x, r1.z, l(0.250000) + iadd r2.zw, r0.zzzz, l(0, 0, 15, 735) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r3.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.z +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +switch r3.z + case l(26) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx + break + case l(32) + f32tof16 r2.zw, r6.xxxz + f32tof16 r3.xy, r6.ywyy + imad r6.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz + break + default + break +endswitch +if_nz r2.y + mov r6.xy, r6.yxyy + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r7.xyz, r0.zzzz, l(1, 2, 3, 0) +or r2.zw, r7.yyyz, r7.xxxy +if_nz r2.z + ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r6.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r3.xyxx, r5.xyxx +endif +if_nz r2.w + ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) + bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r6.xyxx +ld r6.yw, r5.zzzz, T0[0].zxwy +switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r1.z, l(0.500000) + iadd r1.x, r0.w, l(727) + ld r7.yw, r1.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r1.x, r0.y, l(6) + if_nz r1.x + mul r0.z, r1.z, l(0.250000) + iadd r2.zw, r0.wwww, l(0, 0, 16, 736) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r3.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r0.z, r1.z +endif +mul r6.xyzw, r0.zzzz, r6.ywxz +if_nz r1.y + mov r6.xz, r6.zzxz +endif +switch r3.z + case l(26) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r6.xy, r7.ywyy, l(0x00010000, 0x00010000, 0, 0), r7.xzxx + break + case l(32) + f32tof16 r2.zw, r6.xxxz + f32tof16 r3.xy, r6.ywyy + imad r6.xy, r3.xyxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz + break + default + break +endswitch +if_nz r2.y + mov r6.xy, r6.yxyy + mov r0.z, l(2) +else + mov r0.z, r2.x +endif +ieq r5.xyz, r0.zzzz, l(1, 2, 3, 0) +or r2.zw, r5.yyyz, r5.xxxy +if_nz r2.z + ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r6.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r3.xyxx, r4.xyxx +endif +if_nz r2.w + ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) + bfi r6.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r6.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyxx +ld r5.yw, r5.wwww, T0[0].zxwy +switch r3.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.w + mul r0.z, r1.z, l(0.500000) + iadd r1.x, r0.w, l(728) + ld r6.yw, r1.xxxx, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r1.z, r1.z, l(0.250000) + iadd r0.yw, r0.wwww, l(0, 17, 0, 737) + ld r6.yw, r0.yyyy, T0[0].zxwy + switch r3.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r0.wwww, T0[0].zxwy + switch r3.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r0.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r0.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + else + mov r1.z, r0.z + endif +endif +mul r5.xyzw, r1.zzzz, r5.ywxz +if_nz r1.y + mov r5.xz, r5.zzxz +endif +switch r3.z + case l(26) + mov_sat r5.xyzw, r5.xyzw + mad r1.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r5.xy, r1.ywyy, l(0x00010000, 0x00010000, 0, 0), r1.xzxx + break + case l(32) + f32tof16 r0.yz, r5.xxzx + f32tof16 r1.xy, r5.ywyy + imad r5.xy, r1.xyxx, l(0x00010000, 0x00010000, 0, 0), r0.yzyy + break + default + break +endswitch +if_nz r2.y + mov r5.xy, r5.yxyy + mov r2.x, l(2) +endif +ieq r0.yzw, r2.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r0.yw, r5.xxxy, l(0, 8, 0, 8) + and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r1.xy, r5.xyxx, l(8, 8, 0, 0) + and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.xy, r0.ywyy, r1.xyxx +endif +if_nz r0.z + ushr r0.yz, r5.xxyx, l(0, 16, 16, 0) + bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r0.yzyy +endif +store_uav_typed U0[0].xyzw, r4.wwww, r5.xyxx +ret +// Approximately 1235 instruction slots used +#endif + +const BYTE resolve_full_64bpp_from_64bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 34, 195, + 87, 93, 139, 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0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 4, 0, 0, 0, 70, 0, + 16, 0, 5, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 211, 4, 0, 0, 10, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 135, 0, + 0, 0, 180, 0, 0, 0, + 113, 0, 0, 0, 156, 0, + 0, 0, 102, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 36, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 93, 0, + 0, 0, 2, 0, 0, 0, + 45, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_2xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_2xres_cs.h new file mode 100644 index 000000000..ed602a42e --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_2xres_cs.h @@ -0,0 +1,4130 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint4 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 16 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].xzxz, l(1023, 0x01000000, 0x40000000, 8) +ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r2.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r2.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.x, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w +iadd r2.x, r2.z, r4.z +ishl r2.x, l(1), r2.x +iadd r2.x, r1.w, r2.x +ld r5.xyzw, r1.wwww, T0[0].xyzw +ld r6.xyzw, r2.xxxx, T0[0].xyzw +if_nz r4.z + iadd r2.y, r1.w, l(1) + ld r7.xyzw, r2.yyyy, T0[0].ywxz + iadd r2.y, r2.x, l(1) + ld r8.xyzw, r2.yyyy, T0[0].ywxz + switch r4.w + case l(5) + mov r9.xy, r5.ywyy + mov r9.zw, r7.xxxy + mov r7.xy, r5.xzxx + movc r9.xyzw, r3.yyyy, r9.xyzw, r7.xyzw + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r9.xy, r6.ywyy + mov r9.zw, r8.xxxy + mov r8.xy, r6.xzxx + movc r9.xyzw, r3.yyyy, r9.xyzw, r8.xyzw + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + mov r9.xy, r5.ywyy + mov r9.zw, r7.xxxy + mov r7.xy, r5.xzxx + movc r9.xyzw, r3.yyyy, r9.xyzw, r7.xyzw + f16tof32 r5.xyzw, r9.xyzw + mov r9.xy, r6.ywyy + mov r9.zw, r8.xxxy + mov r8.xy, r6.xzxx + movc r9.xyzw, r3.yyyy, r9.xyzw, r8.xyzw + f16tof32 r6.xyzw, r9.xyzw + break + default + mov r5.xy, r5.xzxx + mov r5.zw, r7.zzzw + mov r6.xy, r6.xzxx + mov r6.zw, r8.zzzw + break + endswitch +else + switch r4.w + case l(0) + case l(1) + movc r2.y, r3.y, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r2.yyyy + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r2.yyyy + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r2.y, r3.y, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.yyyy + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r2.yyyy + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r2.y, r3.y, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.yyyy + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r2.yyyy + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + break + default + break + endswitch +endif +ibfe r2.y, l(6), l(16), CB0[0][0].z +ishl r2.y, r2.y, l(23) +iadd r2.y, r2.y, l(0x3f800000) +uge r2.z, r1.y, l(4) +if_nz r2.z + mul r2.z, r2.y, l(0.500000) + ishl r2.w, l(80), r4.z + iadd r3.x, r1.w, r2.w + ld r7.xyzw, r3.xxxx, T0[0].xyzw + iadd r2.w, r2.w, r2.x + ld r8.xyzw, r2.wwww, T0[0].xyzw + if_nz r4.z + iadd r2.w, r1.w, l(161) + ld r9.xyzw, r2.wwww, T0[0].ywxz + iadd r2.w, r2.x, l(161) + ld r10.xyzw, r2.wwww, T0[0].ywxz + switch r4.w + case l(5) + mov r11.xy, r7.ywyy + mov r11.zw, r9.xxxy + mov r9.xy, r7.xzxx + movc r11.xyzw, r3.yyyy, r11.xyzw, r9.xyzw + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r11.xy, r8.ywyy + mov r11.zw, r10.xxxy + mov r10.xy, r8.xzxx + movc r11.xyzw, r3.yyyy, r11.xyzw, r10.xyzw + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + mov r11.xy, r7.ywyy + mov r11.zw, r9.xxxy + mov r9.xy, r7.xzxx + movc r11.xyzw, r3.yyyy, r11.xyzw, r9.xyzw + f16tof32 r7.xyzw, r11.xyzw + mov r11.xy, r8.ywyy + mov r11.zw, r10.xxxy + mov r10.xy, r8.xzxx + movc r11.xyzw, r3.yyyy, r11.xyzw, r10.xyzw + f16tof32 r8.xyzw, r11.xyzw + break + default + mov r7.xy, r7.xzxx + mov r7.zw, r9.zzzw + mov r8.xy, r8.xzxx + mov r8.zw, r10.zzzw + break + endswitch + else + switch r4.w + case l(0) + case l(1) + movc r2.w, r3.y, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r2.w, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r2.w, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r2.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r7.xyzw + add r6.xyzw, r6.xyzw, r8.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r2.y, r2.y, l(0.250000) + ishl r4.xy, l(1, 81, 0, 0), r4.zzzz + iadd r7.xy, r1.wwww, r4.xyxx + ld r8.xyzw, r7.xxxx, T0[0].xyzw + iadd r4.xy, r2.xxxx, r4.xyxx + ld r9.xyzw, r4.xxxx, T0[0].xyzw + if_nz r4.z + iadd r1.y, r1.w, l(3) + ld r10.xyzw, r1.yyyy, T0[0].ywxz + iadd r1.y, r2.x, l(3) + ld r11.xyzw, r1.yyyy, T0[0].ywxz + switch r4.w + case l(5) + mov r12.xy, r8.ywyy + mov r12.zw, r10.xxxy + mov r10.xy, r8.xzxx + movc r12.xyzw, r3.yyyy, r12.xyzw, r10.xyzw + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r12.xy, r9.ywyy + mov r12.zw, r11.xxxy + mov r11.xy, r9.xzxx + movc r12.xyzw, r3.yyyy, r12.xyzw, r11.xyzw + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + mov r12.xy, r8.ywyy + mov r12.zw, r10.xxxy + mov r10.xy, r8.xzxx + movc r12.xyzw, r3.yyyy, r12.xyzw, r10.xyzw + f16tof32 r8.xyzw, r12.xyzw + mov r12.xy, r9.ywyy + mov r12.zw, r11.xxxy + mov r11.xy, r9.xzxx + movc r12.xyzw, r3.yyyy, r12.xyzw, r11.xyzw + f16tof32 r9.xyzw, r12.xyzw + break + default + mov r8.xy, r8.xzxx + mov r8.zw, r10.zzzw + mov r9.xy, r9.xzxx + mov r9.zw, r11.zzzw + break + endswitch + else + switch r4.w + case l(0) + case l(1) + movc r1.y, r3.y, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r1.yyyy + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r1.yyyy + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r1.y, r3.y, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r1.yyyy + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r1.yyyy + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r1.y, r3.y, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r1.yyyy + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r1.yyyy + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + break + default + break + endswitch + endif + add r8.xyzw, r5.xyzw, r8.xyzw + add r9.xyzw, r6.xyzw, r9.xyzw + ld r7.xyzw, r7.yyyy, T0[0].xyzw + ld r10.xyzw, r4.yyyy, T0[0].xyzw + if_nz r4.z + iadd r1.y, r1.w, l(163) + ld r11.xyzw, r1.yyyy, T0[0].ywxz + iadd r1.y, r2.x, l(163) + ld r12.xyzw, r1.yyyy, T0[0].ywxz + switch r4.w + case l(5) + mov r13.xy, r7.ywyy + mov r13.zw, r11.xxxy + mov r11.xy, r7.xzxx + movc r13.xyzw, r3.yyyy, r13.xyzw, r11.xyzw + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r13.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + mov r13.xy, r10.ywyy + mov r13.zw, r12.xxxy + mov r12.xy, r10.xzxx + movc r13.xyzw, r3.yyyy, r13.xyzw, r12.xyzw + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r13.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + mov r13.xy, r7.ywyy + mov r13.zw, r11.xxxy + mov r11.xy, r7.xzxx + movc r13.xyzw, r3.yyyy, r13.xyzw, r11.xyzw + f16tof32 r7.xyzw, r13.xyzw + mov r13.xy, r10.ywyy + mov r13.zw, r12.xxxy + mov r12.xy, r10.xzxx + movc r13.xyzw, r3.yyyy, r13.xyzw, r12.xyzw + f16tof32 r10.xyzw, r13.xyzw + break + default + mov r7.xy, r7.xzxx + mov r7.zw, r11.zzzw + mov r10.xy, r10.xzxx + mov r10.zw, r12.zzzw + break + endswitch + else + switch r4.w + case l(0) + case l(1) + movc r1.y, r3.y, l(16), l(0) + ushr r4.xyzw, r7.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyzw, r10.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r10.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r1.y, r3.y, l(20), l(0) + ushr r4.xyzw, r7.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + utof r4.xyzw, r4.xyzw + mul r7.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r4.xyzw, r10.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + utof r4.xyzw, r4.xyzw + mul r10.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r1.y, r3.y, l(20), l(0) + ushr r4.xyzw, r7.xyzw, r1.yyyy + and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) + and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) + movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + iadd r4.xyzw, r12.xyzw, r4.xyzw + movc r7.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) + ushr r4.xyzw, r10.xyzw, r1.yyyy + and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) + and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) + movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + iadd r4.xyzw, r12.xyzw, r4.xyzw + movc r10.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r10.xyzw, r10.xyzw + break + default + break + endswitch + endif + add r5.xyzw, r7.xyzw, r8.xyzw + add r6.xyzw, r9.xyzw, r10.xyzw + else + mov r2.y, r2.z + endif +endif +mul_sat r4.xyzw, r2.yyyy, r5.xyzw +mul_sat r2.xyzw, r2.yyyy, r6.xyzw +mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r1.y, r4.y, l(256), r4.x +imad r1.y, r4.z, l(0x00010000), r1.y +imad r4.x, r4.w, l(0x01000000), r1.y +mad r2.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r2.xyzw, r2.xyzw +imad r1.y, r2.y, l(256), r2.x +imad r1.y, r2.z, l(0x00010000), r1.y +imad r4.y, r2.w, l(0x01000000), r1.y +if_nz r3.z + if_z r0.w + and r1.y, r4.x, l(0xff00ff00) + ushr r1.w, r4.x, l(8) + or r4.z, r1.w, r1.y + else + mov r4.z, r4.x + endif + if_z vThreadID.y + ushr r1.yw, r4.zzzy, l(0, 16, 0, 16) + bfi r4.xy, l(16, 16, 0, 0), l(0, 0, 0, 0), r1.ywyy, r4.zyzz + else + mov r4.xy, r4.zyzz + endif +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.w + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r2.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r2.x + ushr r2.x, r1.x, l(5) + imad r1.z, r1.z, r2.x, r2.y + ishl r2.x, r0.z, l(2) + and r2.x, r2.x, l(24) + bfi r2.x, l(3), l(0), r0.w, r2.x + ibfe r2.x, l(26), l(0), r2.x + iadd r1.w, r1.w, r2.z + bfi r2.y, l(1), l(1), r1.w, l(0) + iadd r2.y, r2.y, r2.w + bfi r2.y, l(2), l(1), r2.y, l(0) + bfi r1.w, l(1), l(0), r1.w, r2.y + and r2.y, r2.x, l(16) + bfi r2.zw, l(0, 0, 22, 22), l(0, 0, 8, 11), r1.zzzz, l(0, 0, 0, 0) + imad r2.yz, r2.yyyy, l(0, 2, 16, 0), r2.zzwz + bfi r2.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r2.xxxx, r2.yzyy + bfi r1.yz, l(0, 2, 2, 0), l(0, 6, 9, 0), r1.yyyy, r2.xxyx + ubfe r2.x, l(3), l(6), r1.y + and r2.y, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r2.x, l(32), r1.w + imad r1.w, r2.y, l(4), r1.w + bfi r1.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r2.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r2.y, r0.x, r2.x + ishl r1.xz, r0.zzzz, l(2, 0, 7, 0) + and r1.xz, r1.xxzx, l(56, 0, 2048, 0) + bfi r0.y, l(3), l(0), r0.w, r1.x + ishl r1.x, r1.x, l(1) + bfi r0.w, l(3), l(1), r0.w, r1.x + and r0.w, r0.w, l(96) + bfi r1.x, l(25), l(7), r0.x, r0.w + bfi r1.x, l(4), l(0), r0.y, r1.x + bfi r1.x, l(1), l(4), r0.z, r1.x + ishl r2.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(25, 0, 0, 25), l(10, 0, 0, 9), r0.xxxx, r2.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r1.z, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r2.z, l(2) + iadd r0.y, r2.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.y, l(6), l(0), r1.x, r0.x +endif +ushr r0.x, r1.y, l(1) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx +ret +// Approximately 668 instruction slots used +#endif + +const BYTE resolve_full_8bpp_2xres_cs[] = +{ + 68, 88, 66, 67, 126, 122, + 123, 91, 116, 126, 228, 242, + 226, 81, 118, 227, 45, 126, + 139, 45, 1, 0, 0, 0, + 228, 79, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 72, 79, 0, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 140, 76, 0, 0, 81, 0, + 5, 0, 35, 19, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 88, 8, 0, 7, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 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30, 0, 0, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 1, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 2, 0, 0, 0, + 1, 64, 0, 0, 2, 0, + 0, 0, 30, 0, 0, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 140, 0, 0, 11, 34, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 2, 0, + 0, 0, 1, 64, 0, 0, + 6, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 140, 0, 0, 11, 34, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 6, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 21, 0, 0, 1, + 85, 0, 0, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 4, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 156, 2, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 60, 0, + 0, 0, 105, 0, 0, 0, + 93, 0, 0, 0, 48, 0, + 0, 0, 21, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 72, 0, + 0, 0, 61, 0, 0, 0, + 34, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_3xres_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_3xres_cs.h new file mode 100644 index 000000000..a3bb71e34 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_3xres_cs.h @@ -0,0 +1,31704 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 19 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(11), l(7), CB0[0][0].y +uge r0.x, vThreadID.x, r0.x +if_nz r0.x + ret +endif +ishl r0.x, vThreadID.x, l(3) +and r1.xyzw, CB0[0][0].xzxz, l(0x40000000, 8, 1023, 0x01000000) +mov r0.y, vThreadID.y +ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) +movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r0.xyyx, r3.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r1.y + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r2.w, CB0[0][0].w, l(10) + ishl r2.w, r2.w, l(5) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r5.x, r1.y, l(2) + ushr r2.w, r2.w, l(4) + and r2.w, r2.w, l(0x00007ffe) + imad r2.w, r5.x, r2.w, r4.x + ushr r4.x, r1.x, l(5) + imad r2.w, r2.w, r4.x, r4.y + ishl r4.x, r3.z, l(8) + ishr r4.x, r4.x, l(6) + iadd r4.y, r4.z, r5.x + bfi r4.z, l(1), l(1), r4.y, l(0) + iadd r4.z, r4.z, r4.w + bfi r4.z, l(2), l(1), r4.z, l(0) + bfi r4.y, l(1), l(0), r4.y, r4.z + and r4.xz, r4.xxxx, l(16, 0, 8, 0) + bfi r5.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.xw, r4.xxxx, l(2, 0, 0, 16), r5.xxxy + bfi r4.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r4.zzzz, r4.xxwx + bfi r4.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), r1.yyyy, r4.xxzx + ubfe r1.y, l(3), l(6), r4.x + and r2.w, r4.y, l(6) + bfi r4.y, l(1), l(8), r4.y, l(0) + imad r1.y, r1.y, l(32), r4.y + imad r1.y, r2.w, l(4), r1.y + bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xzxx + bfi r1.y, l(9), l(3), r1.y, r4.y + bfi r1.y, l(6), l(0), r4.x, r1.y +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + ushr r1.x, r1.x, l(5) + imad r1.x, r4.y, r1.x, r4.x + ishl r3.xy, r3.zzzz, l(2, 7, 0, 0) + ishl r2.w, r3.x, l(1) + and r2.w, r2.w, l(96) + bfi r3.w, l(25), l(7), r1.x, r2.w + and r3.xy, r3.xyxx, l(8, 2048, 0, 0) + iadd r3.w, r3.w, r3.x + bfi r3.w, l(1), l(4), r3.z, r3.w + ishl r4.xy, r2.wwww, l(3, 2, 0, 0) + bfi r4.xy, l(25, 25, 0, 0), l(10, 9, 0, 0), r1.xxxx, r4.xyxx + imad r4.xy, r3.xxxx, l(8, 4, 0, 0), r4.xyxx + bfi r3.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), r3.zzzz, r4.xxyx + bfi r1.x, l(12), l(0), r3.y, r3.x + and r2.w, r3.z, l(1792) + iadd r1.x, r1.x, r2.w + and r2.w, r4.z, l(2) + iadd r2.w, r4.w, r2.w + bfi r2.w, l(2), l(6), r2.w, l(0) + iadd r1.x, r1.x, r2.w + bfi r1.y, l(6), l(0), r3.w, r1.x +endif +imul null, r1.x, r1.y, l(9) +ushr r1.x, r1.x, l(3) +bfi r2.xz, l(5, 0, 2, 0), l(3, 0, 3, 0), r2.zzxz, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r2.xzxx +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.y, l(3), r2.y +if_nz r1.y + mov r4.y, r2.y +else + ieq r1.y, r2.y, l(5) + if_nz r1.y + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.yyyy, l(2, 0, 1, 0) +and r2.xz, r2.xxzx, l(1, 0, 1, 0) +ishl r0.xy, r0.xyxx, r2.xzxx +ushr r4.x, r4.y, l(1) +and r2.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r0.xy, r0.xyxx, r2.zwzz +udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) +movc r1.y, r3.z, l(1), l(0) +ishl r3.y, r2.z, r1.y +imad r1.z, r2.w, r1.z, r3.y +iadd r1.z, r1.z, r3.x +imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, r1.y +imad r0.x, r1.z, l(1280), r0.x +imul null, r0.y, r0.x, l(36) +ine r1.z, r1.w, l(0) +ine r2.z, r3.z, l(0) +and r1.z, r1.z, r2.z +if_nz r1.z + imad r0.y, r0.x, l(36), l(4) +endif +if_z r2.z + ld_raw r4.xyzw, r0.y, T0[0].xyzw + iadd r3.xy, r0.yyyy, l(16, 32, 0, 0) + ld_raw r5.xyzw, r3.x, T0[0].xyzw + ld_raw r2.w, r3.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r3.x, r1.w, l(16), l(0) + ushr r6.xyzw, r4.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r5.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r3.x, r2.w, r3.x + and r3.x, r3.x, l(255) + utof r3.x, r3.x + mul r2.w, r3.x, l(0.003922) + break + case l(2) + case l(10) + movc r3.x, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r5.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r3.x, r2.w, r3.x + and r3.x, r3.x, l(1023) + utof r3.x, r3.x + mul r2.w, r3.x, l(0.000978) + break + case l(3) + case l(12) + movc r3.x, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r3.xxxx + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r8.xyzw, r6.xyzw + movc r4.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r5.xyzw, r3.xxxx + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r8.xyzw, r6.xyzw + movc r5.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) + ushr r3.x, r2.w, r3.x + and r6.xy, r3.xxxx, l(1023, 127, 0, 0) + ubfe r3.y, l(3), l(7), r3.x + firstbit_hi r6.z, r6.y + iadd r6.z, r6.z, l(-24) + movc r6.z, r6.y, r6.z, l(8) + iadd r6.w, -r6.z, l(1) + movc r6.w, r3.y, r3.y, r6.w + bfi r3.x, l(7), r6.z, r3.x, l(0) + and r3.x, r3.x, l(127) + movc r3.x, r3.y, r6.y, r3.x + ishl r3.y, r6.w, l(23) + iadd r3.y, r3.y, l(0x3e000000) + ishl r3.x, r3.x, l(16) + iadd r3.x, r3.y, r3.x + movc r2.w, r6.x, r3.x, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r3.x, l(16), l(0), r2.w + itof r3.x, r3.x + mul r3.x, r3.x, l(0.000977) + max r2.w, r3.x, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch +else + ld_raw r4.x, r0.y, T0[0].xxxx + iadd r6.xyzw, r0.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r6.x, T0[0].xxxx + ld_raw r4.z, r6.y, T0[0].xxxx + ld_raw r4.w, r6.z, T0[0].xxxx + ld_raw r5.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r0.yyyy, l(40, 48, 56, 64) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r2.w, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r3.x, l(16), l(0), r2.w + itof r3.x, r3.x + mul r3.x, r3.x, l(0.000977) + max r2.w, r3.x, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch +endif +ibfe r3.x, l(6), l(16), CB0[0][0].z +ishl r3.x, r3.x, l(23) +iadd r3.x, r3.x, l(0x3f800000) +uge r3.y, r2.y, l(4) +if_nz r3.y + mul r6.x, r3.x, l(0.500000) + ishl r6.y, l(2880), r3.z + iadd r6.y, r0.y, r6.y + if_z r2.z + ld_raw r7.xyzw, r6.y, T0[0].xyzw + iadd r6.zw, r6.yyyy, l(0, 0, 16, 32) + ld_raw r8.xyzw, r6.z, T0[0].xyzw + ld_raw r6.z, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.w, r1.w, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.w, r6.z, r6.w + and r6.w, r6.w, l(255) + utof r6.w, r6.w + mul r6.z, r6.w, l(0.003922) + break + case l(2) + case l(10) + movc r6.w, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.w, r6.z, r6.w + and r6.w, r6.w, l(1023) + utof r6.w, r6.w + mul r6.z, r6.w, l(0.000978) + break + case l(3) + case l(12) + movc r6.w, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r6.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r6.w, r6.z, r6.w + and r9.xy, r6.wwww, l(1023, 127, 0, 0) + ubfe r9.z, l(3), l(7), r6.w + firstbit_hi r9.w, r9.y + iadd r9.w, r9.w, l(-24) + movc r9.w, r9.y, r9.w, l(8) + iadd r10.x, -r9.w, l(1) + movc r10.x, r9.z, r9.z, r10.x + bfi r6.w, l(7), r9.w, r6.w, l(0) + and r6.w, r6.w, l(127) + movc r6.w, r9.z, r9.y, r6.w + ishl r9.y, r10.x, l(23) + iadd r9.y, r9.y, l(0x3e000000) + ishl r6.w, r6.w, l(16) + iadd r6.w, r9.y, r6.w + movc r6.z, r9.x, r6.w, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.w, l(16), l(0), r6.z + itof r6.w, r6.w + mul r6.w, r6.w, l(0.000977) + max r6.z, r6.w, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r6.z, r6.z + break + default + break + endswitch + else + ld_raw r7.x, r6.y, T0[0].xxxx + iadd r9.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r7.y, r9.x, T0[0].xxxx + ld_raw r7.z, r9.y, T0[0].xxxx + ld_raw r7.w, r9.z, T0[0].xxxx + ld_raw r8.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r6.z, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.z + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.z, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r6.z, r6.z + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r7.xyzw + add r5.xyzw, r5.xyzw, r8.xyzw + add r2.w, r2.w, r6.z + uge r6.y, r2.y, l(6) + if_nz r6.y + mul r6.x, r3.x, l(0.250000) + ishl r6.yz, l(0, 36, 2916, 0), r3.zzzz + iadd r6.yz, r0.yyyy, r6.yyzy + if_z r2.z + ld_raw r7.xyzw, r6.y, T0[0].xyzw + iadd r8.xy, r6.yyyy, l(16, 32, 0, 0) + ld_raw r9.xyzw, r8.x, T0[0].xyzw + ld_raw r0.y, r8.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.w, r1.w, l(16), l(0) + ushr r8.xyzw, r7.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r7.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyzw, r9.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.w, r0.y, r6.w + and r6.w, r6.w, l(255) + utof r6.w, r6.w + mul r0.y, r6.w, l(0.003922) + break + case l(2) + case l(10) + movc r6.w, r1.w, l(20), l(0) + ushr r8.xyzw, r7.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r7.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r8.xyzw, r9.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.w, r0.y, r6.w + and r6.w, r6.w, l(1023) + utof r6.w, r6.w + mul r0.y, r6.w, l(0.000978) + break + case l(3) + case l(12) + movc r6.w, r1.w, l(20), l(0) + ushr r8.xyzw, r7.xyzw, r6.wwww + and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r13.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r12.xyzw, r11.xyzw, r8.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r11.xyzw, r8.xyzw + movc r7.xyzw, r10.xyzw, r8.xyzw, l(0,0,0,0) + ushr r8.xyzw, r9.xyzw, r6.wwww + and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r13.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r12.xyzw, r11.xyzw, r8.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r11.xyzw, r8.xyzw + movc r9.xyzw, r10.xyzw, r8.xyzw, l(0,0,0,0) + ushr r6.w, r0.y, r6.w + and r8.xy, r6.wwww, l(1023, 127, 0, 0) + ubfe r8.z, l(3), l(7), r6.w + firstbit_hi r8.w, r8.y + iadd r8.w, r8.w, l(-24) + movc r8.w, r8.y, r8.w, l(8) + iadd r10.x, -r8.w, l(1) + movc r10.x, r8.z, r8.z, r10.x + bfi r6.w, l(7), r8.w, r6.w, l(0) + and r6.w, r6.w, l(127) + movc r6.w, r8.z, r8.y, r6.w + ishl r8.y, r10.x, l(23) + iadd r8.y, r8.y, l(0x3e000000) + ishl r6.w, r6.w, l(16) + iadd r6.w, r8.y, r6.w + movc r0.y, r8.x, r6.w, l(0) + break + case l(4) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.w, l(16), l(0), r0.y + itof r6.w, r6.w + mul r6.w, r6.w, l(0.000977) + max r0.y, r6.w, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + else + ld_raw r7.x, r6.y, T0[0].xxxx + iadd r8.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r7.y, r8.x, T0[0].xxxx + ld_raw r7.z, r8.y, T0[0].xxxx + ld_raw r7.w, r8.z, T0[0].xxxx + ld_raw r9.x, r8.w, T0[0].xxxx + iadd r8.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r9.y, r8.x, T0[0].xxxx + ld_raw r9.z, r8.y, T0[0].xxxx + ld_raw r9.w, r8.z, T0[0].xxxx + ld_raw r0.y, r8.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r0.y + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r0.y, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + endif + add r7.xyzw, r4.xyzw, r7.xyzw + add r8.xyzw, r5.xyzw, r9.xyzw + add r0.y, r0.y, r2.w + if_z r2.z + ld_raw r9.xyzw, r6.z, T0[0].xyzw + iadd r6.yw, r6.zzzz, l(0, 16, 0, 32) + ld_raw r10.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.w, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.w, r6.y, r6.w + and r6.w, r6.w, l(255) + utof r6.w, r6.w + mul r6.y, r6.w, l(0.003922) + break + case l(2) + case l(10) + movc r6.w, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.w, r6.y, r6.w + and r6.w, r6.w, l(1023) + utof r6.w, r6.w + mul r6.y, r6.w, l(0.000978) + break + case l(3) + case l(12) + movc r6.w, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.wwww + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r6.wwww + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r6.w, r6.y, r6.w + and r11.xy, r6.wwww, l(1023, 127, 0, 0) + ubfe r11.z, l(3), l(7), r6.w + firstbit_hi r11.w, r11.y + iadd r11.w, r11.w, l(-24) + movc r11.w, r11.y, r11.w, l(8) + iadd r12.x, -r11.w, l(1) + movc r12.x, r11.z, r11.z, r12.x + bfi r6.w, l(7), r11.w, r6.w, l(0) + and r6.w, r6.w, l(127) + movc r6.w, r11.z, r11.y, r6.w + ishl r11.y, r12.x, l(23) + iadd r11.y, r11.y, l(0x3e000000) + ishl r6.w, r6.w, l(16) + iadd r6.w, r11.y, r6.w + movc r6.y, r11.x, r6.w, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.w, l(16), l(0), r6.y + itof r6.w, r6.w + mul r6.w, r6.w, l(0.000977) + max r6.y, r6.w, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r9.x, r6.z, T0[0].xxxx + iadd r11.xyzw, r6.zzzz, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r6.zzzz, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r6.y, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r4.xyzw, r7.xyzw, r9.xyzw + add r5.xyzw, r8.xyzw, r10.xyzw + add r2.w, r0.y, r6.y + endif +else + mov r6.x, r3.x +endif +mul r4.xyzw, r4.xyzw, r6.xxxx +mul r5.xyzw, r5.xyzw, r6.xxxx +mul_sat r0.y, r2.w, r6.x +if_nz r0.z + mov r4.x, r4.y + mov r4.w, r5.x + mov r5.z, r5.w +endif +if_nz r0.w + mov r4.xy, r5.xyxx + mov r4.xyz, r4.wxyw +endif +mov_sat r4.xyzw, r4.xyzw +mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.z, r4.y, l(256), r4.x +imad r0.z, r4.z, l(0x00010000), r0.z +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.zzzz +mov_sat r5.xyzw, r5.xyzw +mad r5.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r5.xyzw, r5.xyzw +imad r0.z, r5.y, l(256), r5.x +imad r0.z, r5.z, l(0x00010000), r0.z +imad r4.y, r5.w, l(0x01000000), r0.z +store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw +mad r0.y, r0.y, l(255.000000), l(0.500000) +ftou r0.y, r0.y +iadd r0.z, r2.x, r1.y +ishl r0.z, l(36), r0.z +imad r0.x, r0.x, l(36), r0.z +if_nz r1.z + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r4.xyzw, r1.y, T0[0].xyzw + iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) + ld_raw r5.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r8.xyzw, r6.xyzw + movc r4.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r8.xyzw, r6.xyzw + movc r5.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r6.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r6.z, l(3), l(7), r2.w + firstbit_hi r6.w, r6.y + iadd r6.w, r6.w, l(-24) + movc r6.w, r6.y, r6.w, l(8) + iadd r7.x, -r6.w, l(1) + movc r7.x, r6.z, r6.z, r7.x + bfi r2.w, l(7), r6.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r6.z, r6.y, r2.w + ishl r6.y, r7.x, l(23) + iadd r6.y, r6.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r6.y, r2.w + movc r2.x, r6.x, r2.w, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +else + ld_raw r4.x, r1.y, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r6.x, T0[0].xxxx + ld_raw r4.z, r6.y, T0[0].xxxx + ld_raw r4.w, r6.z, T0[0].xxxx + ld_raw r5.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r2.x, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r6.x, l(2880), r3.z + iadd r6.x, r1.y, r6.x + if_z r2.z + ld_raw r7.xyzw, r6.x, T0[0].xyzw + iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) + ld_raw r8.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r6.z, r6.y, r6.z + and r9.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r9.z, r9.y + iadd r9.z, r9.z, l(-24) + movc r9.z, r9.y, r9.z, l(8) + iadd r9.w, -r9.z, l(1) + movc r9.w, r6.w, r6.w, r9.w + bfi r6.z, l(7), r9.z, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r9.y, r6.z + ishl r6.w, r9.w, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.y, r9.x, r6.z, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r7.x, r6.x, T0[0].xxxx + iadd r9.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r7.y, r9.x, T0[0].xxxx + ld_raw r7.z, r9.y, T0[0].xxxx + ld_raw r7.w, r9.z, T0[0].xxxx + ld_raw r8.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r6.y, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r6.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r6.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r7.xyzw + add r5.xyzw, r5.xyzw, r8.xyzw + add r2.x, r2.x, r6.y + uge r6.x, r2.y, l(6) + if_nz r6.x + mul r2.w, r3.x, l(0.250000) + ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r6.xy, r1.yyyy, r6.xyxx + if_z r2.z + ld_raw r7.xyzw, r6.x, T0[0].xyzw + iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) + ld_raw r8.xyzw, r6.z, T0[0].xyzw + ld_raw r1.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r6.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r6.z, r1.y, r6.z + and r9.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r9.z, r9.y + iadd r9.z, r9.z, l(-24) + movc r9.z, r9.y, r9.z, l(8) + iadd r9.w, -r9.z, l(1) + movc r9.w, r6.w, r6.w, r9.w + bfi r6.z, l(7), r9.z, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r9.y, r6.z + ishl r6.w, r9.w, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r1.y, r9.x, r6.z, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r1.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r1.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r7.x, r6.x, T0[0].xxxx + iadd r9.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r7.y, r9.x, T0[0].xxxx + ld_raw r7.z, r9.y, T0[0].xxxx + ld_raw r7.w, r9.z, T0[0].xxxx + ld_raw r8.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r1.y, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r1.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r1.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r7.xyzw, r4.xyzw, r7.xyzw + add r8.xyzw, r5.xyzw, r8.xyzw + add r1.y, r1.y, r2.x + if_z r2.z + ld_raw r9.xyzw, r6.y, T0[0].xyzw + iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) + ld_raw r10.xyzw, r6.x, T0[0].xyzw + ld_raw r6.x, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r6.z, r6.x, r6.z + and r11.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r11.z, r11.y + iadd r11.z, r11.z, l(-24) + movc r11.z, r11.y, r11.z, l(8) + iadd r11.w, -r11.z, l(1) + movc r11.w, r6.w, r6.w, r11.w + bfi r6.z, l(7), r11.z, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r11.y, r6.z + ishl r6.w, r11.w, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.x, r11.x, r6.z, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.x + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.x, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + else + ld_raw r9.x, r6.y, T0[0].xxxx + iadd r11.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r6.x, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.x + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.x, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + endif + add r4.xyzw, r7.xyzw, r9.xyzw + add r5.xyzw, r8.xyzw, r10.xyzw + add r2.x, r1.y, r6.x + endif +else + mov r2.w, r3.x +endif +mul r4.xyzw, r2.wwww, r4.xyzw +mul r5.xyzw, r2.wwww, r5.xyzw +mul_sat r6.y, r2.w, r2.x +if_nz r0.w + mov r4.x, r4.w + mov r4.yz, r5.xxyx +endif +iadd r7.xyzw, r1.xxxx, l(1, 2, 3, 4) +mov_sat r4.xyzw, r4.xyzw +mad r8.xyz, r4.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r8.xyz, r8.xyzx +imad r1.y, r8.y, l(256), r8.x +ishl r2.x, r8.z, l(24) +imad r1.y, r1.y, l(256), r2.x +iadd r8.xzw, r0.yyyy, r1.yyyy +mov_sat r4.xyz, r5.xyzx +mad r4.xyzw, r4.wxyz, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r8.y, r4.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r7.xxxx, r8.xyzw +mov_sat r6.x, r5.w +mad r2.xw, r6.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) +ftou r2.xw, r2.xxxw +imad r0.y, r2.w, l(256), r2.x +iadd r0.x, r0.z, r0.x +if_nz r1.z + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r4.xyzw, r1.y, T0[0].xyzw + iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) + ld_raw r5.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r9.xyzw, r6.xyzw + movc r4.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r9.xyzw, r6.xyzw + movc r5.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r6.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r6.z, l(3), l(7), r2.w + firstbit_hi r6.w, r6.y + iadd r6.w, r6.w, l(-24) + movc r6.w, r6.y, r6.w, l(8) + iadd r7.x, -r6.w, l(1) + movc r7.x, r6.z, r6.z, r7.x + bfi r2.w, l(7), r6.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r6.z, r6.y, r2.w + ishl r6.y, r7.x, l(23) + iadd r6.y, r6.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r6.y, r2.w + movc r2.x, r6.x, r2.w, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +else + ld_raw r4.x, r1.y, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r6.x, T0[0].xxxx + ld_raw r4.z, r6.y, T0[0].xxxx + ld_raw r4.w, r6.z, T0[0].xxxx + ld_raw r5.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r2.x, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r6.x, l(2880), r3.z + iadd r6.x, r1.y, r6.x + if_z r2.z + ld_raw r8.xyzw, r6.x, T0[0].xyzw + iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r6.z, r6.y, r6.z + and r10.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r7.x, r10.y + iadd r7.x, r7.x, l(-24) + movc r7.x, r10.y, r7.x, l(8) + iadd r10.z, -r7.x, l(1) + movc r10.z, r6.w, r6.w, r10.z + bfi r6.z, l(7), r7.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r10.y, r6.z + ishl r6.w, r10.z, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.y, r10.x, r6.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r8.x, r6.x, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r6.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r6.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r6.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r8.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + add r2.x, r2.x, r6.y + uge r6.x, r2.y, l(6) + if_nz r6.x + mul r2.w, r3.x, l(0.250000) + ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r6.xy, r1.yyyy, r6.xyxx + if_z r2.z + ld_raw r8.xyzw, r6.x, T0[0].xyzw + iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) + ld_raw r9.xyzw, r6.z, T0[0].xyzw + ld_raw r1.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r6.z, r1.y, r6.z + and r10.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r7.x, r10.y + iadd r7.x, r7.x, l(-24) + movc r7.x, r10.y, r7.x, l(8) + iadd r10.z, -r7.x, l(1) + movc r10.z, r6.w, r6.w, r10.z + bfi r6.z, l(7), r7.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r10.y, r6.z + ishl r6.w, r10.z, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r1.y, r10.x, r6.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r1.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r1.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r8.x, r6.x, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r1.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r1.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r1.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r8.xyzw, r4.xyzw, r8.xyzw + add r9.xyzw, r5.xyzw, r9.xyzw + add r1.y, r1.y, r2.x + if_z r2.z + ld_raw r10.xyzw, r6.y, T0[0].xyzw + iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r6.x, T0[0].xyzw + ld_raw r6.x, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r6.z, r6.x, r6.z + and r12.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r7.x, r12.y + iadd r7.x, r7.x, l(-24) + movc r7.x, r12.y, r7.x, l(8) + iadd r12.z, -r7.x, l(1) + movc r12.z, r6.w, r6.w, r12.z + bfi r6.z, l(7), r7.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r12.y, r6.z + ishl r6.w, r12.z, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.x, r12.x, r6.z, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.x + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.x, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + else + ld_raw r10.x, r6.y, T0[0].xxxx + iadd r12.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r6.x, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.x + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.x, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + endif + add r4.xyzw, r8.xyzw, r10.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + add r2.x, r1.y, r6.x + endif +else + mov r2.w, r3.x +endif +mul r4.xyzw, r2.wwww, r4.xwyz +mul r5.xyzw, r2.wwww, r5.xyzw +mul_sat r6.z, r2.w, r2.x +if_nz r0.w + mov r8.x, r4.y + mov r8.y, r5.x + mov r4.x, r5.y +else + mov r8.xy, r4.xzxx + mov r4.x, r4.w +endif +mov_sat r8.xy, r8.xyxx +mad r2.xw, r8.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) +ftou r2.xw, r2.xxxw +ishl r1.y, r2.w, l(24) +imad r1.y, r2.x, l(0x00010000), r1.y +iadd r8.xzw, r0.yyyy, r1.yyyy +mov r4.zw, r5.xxxy +mov_sat r4.xyzw, r4.xyzw +mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r8.y, r4.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r7.yyyy, r8.xyzw +mov_sat r6.xy, r5.zwzz +mad r4.xyz, r6.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r4.xyz, r4.xyzx +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +iadd r0.x, r0.z, r0.x +if_nz r1.z + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r4.xyzw, r1.y, T0[0].xyzw + iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) + ld_raw r5.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r2.wwww + and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r9.xyzw, r6.xyzw + movc r4.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r9.xyzw, r6.xyzw + movc r5.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r6.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r6.z, l(3), l(7), r2.w + firstbit_hi r6.w, r6.y + iadd r6.w, r6.w, l(-24) + movc r6.w, r6.y, r6.w, l(8) + iadd r7.x, -r6.w, l(1) + movc r7.x, r6.z, r6.z, r7.x + bfi r2.w, l(7), r6.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r6.z, r6.y, r2.w + ishl r6.y, r7.x, l(23) + iadd r6.y, r6.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r6.y, r2.w + movc r2.x, r6.x, r2.w, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +else + ld_raw r4.x, r1.y, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r6.x, T0[0].xxxx + ld_raw r4.z, r6.y, T0[0].xxxx + ld_raw r4.w, r6.z, T0[0].xxxx + ld_raw r5.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r2.x, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r6.x, l(2880), r3.z + iadd r6.x, r1.y, r6.x + if_z r2.z + ld_raw r8.xyzw, r6.x, T0[0].xyzw + iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r6.z, r6.y, r6.z + and r7.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r10.x, r7.y + iadd r10.x, r10.x, l(-24) + movc r10.x, r7.y, r10.x, l(8) + iadd r10.y, -r10.x, l(1) + movc r10.y, r6.w, r6.w, r10.y + bfi r6.z, l(7), r10.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r7.y, r6.z + ishl r6.w, r10.y, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.y, r7.x, r6.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r8.x, r6.x, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r6.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r6.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r6.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r8.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + add r2.x, r2.x, r6.y + uge r6.x, r2.y, l(6) + if_nz r6.x + mul r2.w, r3.x, l(0.250000) + ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r6.xy, r1.yyyy, r6.xyxx + if_z r2.z + ld_raw r8.xyzw, r6.x, T0[0].xyzw + iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) + ld_raw r9.xyzw, r6.z, T0[0].xyzw + ld_raw r1.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r6.z, r1.y, r6.z + and r7.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r10.x, r7.y + iadd r10.x, r10.x, l(-24) + movc r10.x, r7.y, r10.x, l(8) + iadd r10.y, -r10.x, l(1) + movc r10.y, r6.w, r6.w, r10.y + bfi r6.z, l(7), r10.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r7.y, r6.z + ishl r6.w, r10.y, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r1.y, r7.x, r6.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r1.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r1.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r8.x, r6.x, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r1.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r1.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r1.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r8.xyzw, r4.xyzw, r8.xyzw + add r9.xyzw, r5.xyzw, r9.xyzw + add r1.y, r1.y, r2.x + if_z r2.z + ld_raw r10.xyzw, r6.y, T0[0].xyzw + iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r6.x, T0[0].xyzw + ld_raw r6.x, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r6.z, r6.x, r6.z + and r7.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r12.x, r7.y + iadd r12.x, r12.x, l(-24) + movc r12.x, r7.y, r12.x, l(8) + iadd r12.y, -r12.x, l(1) + movc r12.y, r6.w, r6.w, r12.y + bfi r6.z, l(7), r12.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r7.y, r6.z + ishl r6.w, r12.y, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.x, r7.x, r6.z, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.x + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.x, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + else + ld_raw r10.x, r6.y, T0[0].xxxx + iadd r12.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r6.x, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.x + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.x, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + endif + add r4.xyzw, r8.xyzw, r10.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + add r2.x, r1.y, r6.x + endif +else + mov r2.w, r3.x +endif +mul r4.xyzw, r2.wwww, r4.yzxw +mul r5.xyzw, r2.wwww, r5.xyzw +mul_sat r6.w, r2.w, r2.x +if_nz r0.w + mov r4.xz, r5.yyxy + mov r1.y, r4.w +else + mov r1.y, r4.z + mov r4.xz, r4.yyxy +endif +mov_sat r1.y, r1.y +mad r1.y, r1.y, l(255.000000), l(0.500000) +ftou r1.y, r1.y +imad r8.xzw, r1.yyyy, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mov r4.y, r5.x +mov_sat r4.xyzw, r4.xyzw +mad r4.xyzw, r4.zxwy, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r8.y, r4.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r7.zzzz, r8.xyzw +mov_sat r6.xyz, r5.yzwy +mad r4.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +iadd r0.x, r0.z, r0.x +if_nz r1.z + iadd r0.y, r0.x, l(4) +else + mov r0.y, r0.x +endif +if_z r2.z + ld_raw r5.xyzw, r0.y, T0[0].xyzw + iadd r2.xw, r0.yyyy, l(16, 0, 0, 32) + ld_raw r6.xyzw, r2.x, T0[0].xyzw + ld_raw r1.y, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.x, r1.w, l(16), l(0) + ushr r8.xyzw, r5.xyzw, r2.xxxx + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r5.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyzw, r6.xyzw, r2.xxxx + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r6.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.x, r1.y, r2.x + and r2.x, r2.x, l(255) + utof r2.x, r2.x + mul r1.y, r2.x, l(0.003922) + break + case l(2) + case l(10) + movc r2.x, r1.w, l(20), l(0) + ushr r8.xyzw, r5.xyzw, r2.xxxx + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r5.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r8.xyzw, r6.xyzw, r2.xxxx + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r6.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.x, r1.y, r2.x + and r2.x, r2.x, l(1023) + utof r2.x, r2.x + mul r1.y, r2.x, l(0.000978) + break + case l(3) + case l(12) + movc r2.x, r1.w, l(20), l(0) + ushr r8.xyzw, r5.xyzw, r2.xxxx + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r12.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r11.xyzw, r10.xyzw, r8.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r10.xyzw, r8.xyzw + movc r5.xyzw, r9.xyzw, r8.xyzw, l(0,0,0,0) + ushr r8.xyzw, r6.xyzw, r2.xxxx + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r12.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r11.xyzw, r10.xyzw, r8.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r10.xyzw, r8.xyzw + movc r6.xyzw, r9.xyzw, r8.xyzw, l(0,0,0,0) + ushr r2.x, r1.y, r2.x + and r7.xy, r2.xxxx, l(1023, 127, 0, 0) + ubfe r2.w, l(3), l(7), r2.x + firstbit_hi r7.z, r7.y + iadd r7.z, r7.z, l(-24) + movc r7.z, r7.y, r7.z, l(8) + iadd r8.x, -r7.z, l(1) + movc r8.x, r2.w, r2.w, r8.x + bfi r2.x, l(7), r7.z, r2.x, l(0) + and r2.x, r2.x, l(127) + movc r2.x, r2.w, r7.y, r2.x + ishl r2.w, r8.x, l(23) + iadd r2.w, r2.w, l(0x3e000000) + ishl r2.x, r2.x, l(16) + iadd r2.x, r2.w, r2.x + movc r1.y, r7.x, r2.x, l(0) + break + case l(4) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.x, l(16), l(0), r1.y + itof r2.x, r2.x + mul r2.x, r2.x, l(0.000977) + max r1.y, r2.x, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch +else + ld_raw r5.x, r0.y, T0[0].xxxx + iadd r8.xyzw, r0.yyyy, l(8, 16, 24, 32) + ld_raw r5.y, r8.x, T0[0].xxxx + ld_raw r5.z, r8.y, T0[0].xxxx + ld_raw r5.w, r8.z, T0[0].xxxx + ld_raw r6.x, r8.w, T0[0].xxxx + iadd r8.xyzw, r0.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r8.x, T0[0].xxxx + ld_raw r6.z, r8.y, T0[0].xxxx + ld_raw r6.w, r8.z, T0[0].xxxx + ld_raw r1.y, r8.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.x, l(16), l(0), r1.y + itof r2.x, r2.x + mul r2.x, r2.x, l(0.000977) + max r1.y, r2.x, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch +endif +if_nz r3.y + mul r2.x, r3.x, l(0.500000) + ishl r2.w, l(2880), r3.z + iadd r2.w, r0.y, r2.w + if_z r2.z + ld_raw r8.xyzw, r2.w, T0[0].xyzw + iadd r7.xy, r2.wwww, l(16, 32, 0, 0) + ld_raw r9.xyzw, r7.x, T0[0].xyzw + ld_raw r7.x, r7.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.y, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.y, r7.x, r7.y + and r7.y, r7.y, l(255) + utof r7.y, r7.y + mul r7.x, r7.y, l(0.003922) + break + case l(2) + case l(10) + movc r7.y, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.y, r7.x, r7.y + and r7.y, r7.y, l(1023) + utof r7.y, r7.y + mul r7.x, r7.y, l(0.000978) + break + case l(3) + case l(12) + movc r7.y, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.yyyy + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r7.yyyy + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r7.y, r7.x, r7.y + and r10.xy, r7.yyyy, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r7.y + firstbit_hi r10.z, r10.y + iadd r10.z, r10.z, l(-24) + movc r10.z, r10.y, r10.z, l(8) + iadd r10.w, -r10.z, l(1) + movc r10.w, r7.z, r7.z, r10.w + bfi r7.y, l(7), r10.z, r7.y, l(0) + and r7.y, r7.y, l(127) + movc r7.y, r7.z, r10.y, r7.y + ishl r7.z, r10.w, l(23) + iadd r7.z, r7.z, l(0x3e000000) + ishl r7.y, r7.y, l(16) + iadd r7.y, r7.z, r7.y + movc r7.x, r10.x, r7.y, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.y, l(16), l(0), r7.x + itof r7.y, r7.y + mul r7.y, r7.y, l(0.000977) + max r7.x, r7.y, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + else + ld_raw r8.x, r2.w, T0[0].xxxx + iadd r10.xyzw, r2.wwww, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r2.wwww, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r7.x, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r7.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r7.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r8.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r1.y, r1.y, r7.x + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r2.x, r3.x, l(0.250000) + ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r7.xy, r0.yyyy, r7.xyxx + if_z r2.z + ld_raw r8.xyzw, r7.x, T0[0].xyzw + iadd r9.xy, r7.xxxx, l(16, 32, 0, 0) + ld_raw r10.xyzw, r9.x, T0[0].xyzw + ld_raw r0.y, r9.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r10.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r0.y, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r0.y, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r10.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r0.y, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r0.y, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r11.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r14.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r13.xyzw, r12.xyzw, r9.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r12.xyzw, r9.xyzw + movc r8.xyzw, r11.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r10.xyzw, r2.wwww + and r11.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r14.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r13.xyzw, r12.xyzw, r9.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r12.xyzw, r9.xyzw + movc r10.xyzw, r11.xyzw, r9.xyzw, l(0,0,0,0) + ushr r2.w, r0.y, r2.w + and r9.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r2.w + firstbit_hi r9.z, r9.y + iadd r9.z, r9.z, l(-24) + movc r9.z, r9.y, r9.z, l(8) + iadd r9.w, -r9.z, l(1) + movc r9.w, r7.z, r7.z, r9.w + bfi r2.w, l(7), r9.z, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r7.z, r9.y, r2.w + ishl r7.z, r9.w, l(23) + iadd r7.z, r7.z, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r7.z, r2.w + movc r0.y, r9.x, r2.w, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r0.y + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r0.y, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + else + ld_raw r8.x, r7.x, T0[0].xxxx + iadd r9.xyzw, r7.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r10.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r7.xxxx, l(40, 48, 56, 64) + ld_raw r10.y, r9.x, T0[0].xxxx + ld_raw r10.z, r9.y, T0[0].xxxx + ld_raw r10.w, r9.z, T0[0].xxxx + ld_raw r0.y, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r0.y + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r0.y, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + endif + add r8.xyzw, r5.xyzw, r8.xyzw + add r9.xyzw, r6.xyzw, r10.xyzw + add r0.y, r0.y, r1.y + if_z r2.z + ld_raw r10.xyzw, r7.y, T0[0].xyzw + iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r7.x, T0[0].xyzw + ld_raw r2.w, r7.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.x, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.x, r2.w, r7.x + and r7.x, r7.x, l(255) + utof r7.x, r7.x + mul r2.w, r7.x, l(0.003922) + break + case l(2) + case l(10) + movc r7.x, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.x, r2.w, r7.x + and r7.x, r7.x, l(1023) + utof r7.x, r7.x + mul r2.w, r7.x, l(0.000978) + break + case l(3) + case l(12) + movc r7.x, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r7.xxxx + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r7.xxxx + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r7.x, r2.w, r7.x + and r12.xy, r7.xxxx, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r7.x + firstbit_hi r12.z, r12.y + iadd r12.z, r12.z, l(-24) + movc r12.z, r12.y, r12.z, l(8) + iadd r12.w, -r12.z, l(1) + movc r12.w, r7.z, r7.z, r12.w + bfi r7.x, l(7), r12.z, r7.x, l(0) + and r7.x, r7.x, l(127) + movc r7.x, r7.z, r12.y, r7.x + ishl r7.z, r12.w, l(23) + iadd r7.z, r7.z, l(0x3e000000) + ishl r7.x, r7.x, l(16) + iadd r7.x, r7.z, r7.x + movc r2.w, r12.x, r7.x, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r2.w + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r2.w, r7.x, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch + else + ld_raw r10.x, r7.y, T0[0].xxxx + iadd r12.xyzw, r7.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r7.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r2.w, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r2.w + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r2.w, r7.x, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch + endif + add r5.xyzw, r8.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r1.y, r0.y, r2.w + endif +else + mov r2.x, r3.x +endif +mul r5.xyzw, r2.xxxx, r5.xyzw +mul r6.xyzw, r2.xxxx, r6.xyzw +mul_sat r0.y, r1.y, r2.x +if_nz r0.w + mov r5.x, r5.w + mov r5.yz, r6.xxyx +endif +mov_sat r5.xyzw, r5.xyzw +mad r5.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r5.xyzw, r5.xyzw +imad r1.y, r5.y, l(256), r5.x +imad r1.y, r5.z, l(0x00010000), r1.y +imad r4.y, r5.w, l(0x01000000), r1.y +store_uav_typed U0[0].xyzw, r7.wwww, r4.xyzw +mov_sat r6.xyzw, r6.xyzw +mad r4.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r1.y, r4.y, l(256), r4.x +imad r1.y, r4.z, l(0x00010000), r1.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r1.yyyy +mad r0.y, r0.y, l(255.000000), l(0.500000) +ftou r0.y, r0.y +iadd r0.x, r0.z, r0.x +if_nz r1.z + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r5.xyzw, r1.y, T0[0].xyzw + iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) + ld_raw r6.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r7.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r2.w + firstbit_hi r7.w, r7.y + iadd r7.w, r7.w, l(-24) + movc r7.w, r7.y, r7.w, l(8) + iadd r8.x, -r7.w, l(1) + movc r8.x, r7.z, r7.z, r8.x + bfi r2.w, l(7), r7.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r7.z, r7.y, r2.w + ishl r7.y, r8.x, l(23) + iadd r7.y, r7.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r7.y, r2.w + movc r2.x, r7.x, r2.w, l(0) + break + case l(4) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +else + ld_raw r5.x, r1.y, T0[0].xxxx + iadd r7.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r5.y, r7.x, T0[0].xxxx + ld_raw r5.z, r7.y, T0[0].xxxx + ld_raw r5.w, r7.z, T0[0].xxxx + ld_raw r6.x, r7.w, T0[0].xxxx + iadd r7.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r7.x, T0[0].xxxx + ld_raw r6.z, r7.y, T0[0].xxxx + ld_raw r6.w, r7.z, T0[0].xxxx + ld_raw r2.x, r7.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r7.x, l(2880), r3.z + iadd r7.x, r1.y, r7.x + if_z r2.z + ld_raw r8.xyzw, r7.x, T0[0].xyzw + iadd r7.yz, r7.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r7.y, T0[0].xyzw + ld_raw r7.y, r7.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.z, r7.y, r7.z + and r7.z, r7.z, l(255) + utof r7.z, r7.z + mul r7.y, r7.z, l(0.003922) + break + case l(2) + case l(10) + movc r7.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.z, r7.y, r7.z + and r7.z, r7.z, l(1023) + utof r7.z, r7.z + mul r7.y, r7.z, l(0.000978) + break + case l(3) + case l(12) + movc r7.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r7.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r7.z, r7.y, r7.z + and r10.xy, r7.zzzz, l(1023, 127, 0, 0) + ubfe r7.w, l(3), l(7), r7.z + firstbit_hi r10.z, r10.y + iadd r10.z, r10.z, l(-24) + movc r10.z, r10.y, r10.z, l(8) + iadd r10.w, -r10.z, l(1) + movc r10.w, r7.w, r7.w, r10.w + bfi r7.z, l(7), r10.z, r7.z, l(0) + and r7.z, r7.z, l(127) + movc r7.z, r7.w, r10.y, r7.z + ishl r7.w, r10.w, l(23) + iadd r7.w, r7.w, l(0x3e000000) + ishl r7.z, r7.z, l(16) + iadd r7.z, r7.w, r7.z + movc r7.y, r10.x, r7.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.z, l(16), l(0), r7.y + itof r7.z, r7.z + mul r7.z, r7.z, l(0.000977) + max r7.y, r7.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r7.y, r7.y + break + default + break + endswitch + else + ld_raw r8.x, r7.x, T0[0].xxxx + iadd r10.xyzw, r7.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r7.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r7.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r7.y + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r7.y, r7.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r7.y, r7.y + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r8.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r2.x, r2.x, r7.y + uge r7.x, r2.y, l(6) + if_nz r7.x + mul r2.w, r3.x, l(0.250000) + ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r7.xy, r1.yyyy, r7.xyxx + if_z r2.z + ld_raw r8.xyzw, r7.x, T0[0].xyzw + iadd r7.zw, r7.xxxx, l(0, 0, 16, 32) + ld_raw r9.xyzw, r7.z, T0[0].xyzw + ld_raw r1.y, r7.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.z, r1.y, r7.z + and r7.z, r7.z, l(255) + utof r7.z, r7.z + mul r1.y, r7.z, l(0.003922) + break + case l(2) + case l(10) + movc r7.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r7.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.z, r1.y, r7.z + and r7.z, r7.z, l(1023) + utof r7.z, r7.z + mul r1.y, r7.z, l(0.000978) + break + case l(3) + case l(12) + movc r7.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r7.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r7.z, r1.y, r7.z + and r10.xy, r7.zzzz, l(1023, 127, 0, 0) + ubfe r7.w, l(3), l(7), r7.z + firstbit_hi r10.z, r10.y + iadd r10.z, r10.z, l(-24) + movc r10.z, r10.y, r10.z, l(8) + iadd r10.w, -r10.z, l(1) + movc r10.w, r7.w, r7.w, r10.w + bfi r7.z, l(7), r10.z, r7.z, l(0) + and r7.z, r7.z, l(127) + movc r7.z, r7.w, r10.y, r7.z + ishl r7.w, r10.w, l(23) + iadd r7.w, r7.w, l(0x3e000000) + ishl r7.z, r7.z, l(16) + iadd r7.z, r7.w, r7.z + movc r1.y, r10.x, r7.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.z, l(16), l(0), r1.y + itof r7.z, r7.z + mul r7.z, r7.z, l(0.000977) + max r1.y, r7.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r8.x, r7.x, T0[0].xxxx + iadd r10.xyzw, r7.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r7.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r1.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r1.y + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r1.y, r7.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r8.xyzw, r5.xyzw, r8.xyzw + add r9.xyzw, r6.xyzw, r9.xyzw + add r1.y, r1.y, r2.x + if_z r2.z + ld_raw r10.xyzw, r7.y, T0[0].xyzw + iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r7.x, T0[0].xyzw + ld_raw r7.x, r7.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.z, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r7.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r7.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.z, r7.x, r7.z + and r7.z, r7.z, l(255) + utof r7.z, r7.z + mul r7.x, r7.z, l(0.003922) + break + case l(2) + case l(10) + movc r7.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r7.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r7.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.z, r7.x, r7.z + and r7.z, r7.z, l(1023) + utof r7.z, r7.z + mul r7.x, r7.z, l(0.000978) + break + case l(3) + case l(12) + movc r7.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r7.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r7.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r7.z, r7.x, r7.z + and r12.xy, r7.zzzz, l(1023, 127, 0, 0) + ubfe r7.w, l(3), l(7), r7.z + firstbit_hi r12.z, r12.y + iadd r12.z, r12.z, l(-24) + movc r12.z, r12.y, r12.z, l(8) + iadd r12.w, -r12.z, l(1) + movc r12.w, r7.w, r7.w, r12.w + bfi r7.z, l(7), r12.z, r7.z, l(0) + and r7.z, r7.z, l(127) + movc r7.z, r7.w, r12.y, r7.z + ishl r7.w, r12.w, l(23) + iadd r7.w, r7.w, l(0x3e000000) + ishl r7.z, r7.z, l(16) + iadd r7.z, r7.w, r7.z + movc r7.x, r12.x, r7.z, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.z, l(16), l(0), r7.x + itof r7.z, r7.z + mul r7.z, r7.z, l(0.000977) + max r7.x, r7.z, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + else + ld_raw r10.x, r7.y, T0[0].xxxx + iadd r12.xyzw, r7.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r7.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r7.x, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.y, l(16), l(0), r7.x + itof r7.y, r7.y + mul r7.y, r7.y, l(0.000977) + max r7.x, r7.y, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + endif + add r5.xyzw, r8.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r2.x, r1.y, r7.x + endif +else + mov r2.w, r3.x +endif +mul r5.xyzw, r2.wwww, r5.xyzw +mul r6.xyzw, r2.wwww, r6.xyzw +mul_sat r7.y, r2.w, r2.x +if_nz r0.w + mov r5.x, r5.w + mov r5.yz, r6.xxyx +endif +iadd r8.xyzw, r1.xxxx, l(5, 6, 7, 8) +mov_sat r5.xyzw, r5.xyzw +mad r9.xyz, r5.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r9.xyz, r9.xyzx +imad r1.y, r9.y, l(256), r9.x +ishl r2.x, r9.z, l(24) +imad r1.y, r1.y, l(256), r2.x +iadd r4.y, r0.y, r1.y +store_uav_typed U0[0].xyzw, r8.xxxx, r4.xyzw +mov_sat r5.xyz, r6.xyzx +mad r4.xyzw, r5.wxyz, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mov_sat r7.x, r6.w +mad r2.xw, r7.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) +ftou r2.xw, r2.xxxw +imad r0.y, r2.w, l(256), r2.x +iadd r0.x, r0.z, r0.x +if_nz r1.z + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r5.xyzw, r1.y, T0[0].xyzw + iadd r2.xw, r1.yyyy, l(16, 0, 0, 32) + ld_raw r6.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r10.xyzw, r7.xyzw + movc r5.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r10.xyzw, r7.xyzw + movc r6.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r7.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r2.w + firstbit_hi r7.w, r7.y + iadd r7.w, r7.w, l(-24) + movc r7.w, r7.y, r7.w, l(8) + iadd r8.x, -r7.w, l(1) + movc r8.x, r7.z, r7.z, r8.x + bfi r2.w, l(7), r7.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r7.z, r7.y, r2.w + ishl r7.y, r8.x, l(23) + iadd r7.y, r7.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r7.y, r2.w + movc r2.x, r7.x, r2.w, l(0) + break + case l(4) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +else + ld_raw r5.x, r1.y, T0[0].xxxx + iadd r7.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r5.y, r7.x, T0[0].xxxx + ld_raw r5.z, r7.y, T0[0].xxxx + ld_raw r5.w, r7.z, T0[0].xxxx + ld_raw r6.x, r7.w, T0[0].xxxx + iadd r7.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r7.x, T0[0].xxxx + ld_raw r6.z, r7.y, T0[0].xxxx + ld_raw r6.w, r7.z, T0[0].xxxx + ld_raw r2.x, r7.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r7.x, l(2880), r3.z + iadd r7.x, r1.y, r7.x + if_z r2.z + ld_raw r9.xyzw, r7.x, T0[0].xyzw + iadd r7.yz, r7.xxxx, l(0, 16, 32, 0) + ld_raw r10.xyzw, r7.y, T0[0].xyzw + ld_raw r7.y, r7.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.z, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.z, r7.y, r7.z + and r7.z, r7.z, l(255) + utof r7.z, r7.z + mul r7.y, r7.z, l(0.003922) + break + case l(2) + case l(10) + movc r7.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.z, r7.y, r7.z + and r7.z, r7.z, l(1023) + utof r7.z, r7.z + mul r7.y, r7.z, l(0.000978) + break + case l(3) + case l(12) + movc r7.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r7.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r7.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r7.z, r7.y, r7.z + and r11.xy, r7.zzzz, l(1023, 127, 0, 0) + ubfe r7.w, l(3), l(7), r7.z + firstbit_hi r8.x, r11.y + iadd r8.x, r8.x, l(-24) + movc r8.x, r11.y, r8.x, l(8) + iadd r11.z, -r8.x, l(1) + movc r11.z, r7.w, r7.w, r11.z + bfi r7.z, l(7), r8.x, r7.z, l(0) + and r7.z, r7.z, l(127) + movc r7.z, r7.w, r11.y, r7.z + ishl r7.w, r11.z, l(23) + iadd r7.w, r7.w, l(0x3e000000) + ishl r7.z, r7.z, l(16) + iadd r7.z, r7.w, r7.z + movc r7.y, r11.x, r7.z, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.z, l(16), l(0), r7.y + itof r7.z, r7.z + mul r7.z, r7.z, l(0.000977) + max r7.y, r7.z, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r7.y, r7.y + break + default + break + endswitch + else + ld_raw r9.x, r7.x, T0[0].xxxx + iadd r11.xyzw, r7.xxxx, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r7.xxxx, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r7.y, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r7.y + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r7.y, r7.x, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r7.y, r7.y + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r9.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + add r2.x, r2.x, r7.y + uge r7.x, r2.y, l(6) + if_nz r7.x + mul r2.w, r3.x, l(0.250000) + ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r7.xy, r1.yyyy, r7.xyxx + if_z r2.z + ld_raw r9.xyzw, r7.x, T0[0].xyzw + iadd r7.zw, r7.xxxx, l(0, 0, 16, 32) + ld_raw r10.xyzw, r7.z, T0[0].xyzw + ld_raw r1.y, r7.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.z, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.z, r1.y, r7.z + and r7.z, r7.z, l(255) + utof r7.z, r7.z + mul r1.y, r7.z, l(0.003922) + break + case l(2) + case l(10) + movc r7.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r7.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.z, r1.y, r7.z + and r7.z, r7.z, l(1023) + utof r7.z, r7.z + mul r1.y, r7.z, l(0.000978) + break + case l(3) + case l(12) + movc r7.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r7.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r7.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r7.z, r1.y, r7.z + and r11.xy, r7.zzzz, l(1023, 127, 0, 0) + ubfe r7.w, l(3), l(7), r7.z + firstbit_hi r8.x, r11.y + iadd r8.x, r8.x, l(-24) + movc r8.x, r11.y, r8.x, l(8) + iadd r11.z, -r8.x, l(1) + movc r11.z, r7.w, r7.w, r11.z + bfi r7.z, l(7), r8.x, r7.z, l(0) + and r7.z, r7.z, l(127) + movc r7.z, r7.w, r11.y, r7.z + ishl r7.w, r11.z, l(23) + iadd r7.w, r7.w, l(0x3e000000) + ishl r7.z, r7.z, l(16) + iadd r7.z, r7.w, r7.z + movc r1.y, r11.x, r7.z, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.z, l(16), l(0), r1.y + itof r7.z, r7.z + mul r7.z, r7.z, l(0.000977) + max r1.y, r7.z, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r9.x, r7.x, T0[0].xxxx + iadd r11.xyzw, r7.xxxx, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r7.xxxx, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r1.y, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r1.y + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r1.y, r7.x, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r9.xyzw, r5.xyzw, r9.xyzw + add r10.xyzw, r6.xyzw, r10.xyzw + add r1.y, r1.y, r2.x + if_z r2.z + ld_raw r11.xyzw, r7.y, T0[0].xyzw + iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) + ld_raw r12.xyzw, r7.x, T0[0].xyzw + ld_raw r7.x, r7.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.z, r1.w, l(16), l(0) + ushr r13.xyzw, r11.xyzw, r7.zzzz + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.xyzw, r12.xyzw, r7.zzzz + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.z, r7.x, r7.z + and r7.z, r7.z, l(255) + utof r7.z, r7.z + mul r7.x, r7.z, l(0.003922) + break + case l(2) + case l(10) + movc r7.z, r1.w, l(20), l(0) + ushr r13.xyzw, r11.xyzw, r7.zzzz + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r13.xyzw, r12.xyzw, r7.zzzz + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.z, r7.x, r7.z + and r7.z, r7.z, l(1023) + utof r7.z, r7.z + mul r7.x, r7.z, l(0.000978) + break + case l(3) + case l(12) + movc r7.z, r1.w, l(20), l(0) + ushr r13.xyzw, r11.xyzw, r7.zzzz + and r14.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + and r15.xyzw, r13.xyzw, l(127, 127, 127, 127) + ubfe r16.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r13.xyzw + firstbit_hi r17.xyzw, r15.xyzw + iadd r17.xyzw, r17.xyzw, l(-24, -24, -24, -24) + movc r17.xyzw, r15.xyzw, r17.xyzw, l(8,8,8,8) + iadd r18.xyzw, -r17.xyzw, l(1, 1, 1, 1) + movc r18.xyzw, r16.xyzw, r16.xyzw, r18.xyzw + bfi r13.xyzw, l(7, 7, 7, 7), r17.xyzw, r13.xyzw, l(0, 0, 0, 0) + and r13.xyzw, r13.xyzw, l(127, 127, 127, 127) + movc r13.xyzw, r16.xyzw, r15.xyzw, r13.xyzw + ishl r15.xyzw, r18.xyzw, l(23, 23, 23, 23) + iadd r15.xyzw, r15.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + iadd r13.xyzw, r15.xyzw, r13.xyzw + movc r11.xyzw, r14.xyzw, r13.xyzw, l(0,0,0,0) + ushr r13.xyzw, r12.xyzw, r7.zzzz + and r14.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + and r15.xyzw, r13.xyzw, l(127, 127, 127, 127) + ubfe r16.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r13.xyzw + firstbit_hi r17.xyzw, r15.xyzw + iadd r17.xyzw, r17.xyzw, l(-24, -24, -24, -24) + movc r17.xyzw, r15.xyzw, r17.xyzw, l(8,8,8,8) + iadd r18.xyzw, -r17.xyzw, l(1, 1, 1, 1) + movc r18.xyzw, r16.xyzw, r16.xyzw, r18.xyzw + bfi r13.xyzw, l(7, 7, 7, 7), r17.xyzw, r13.xyzw, l(0, 0, 0, 0) + and r13.xyzw, r13.xyzw, l(127, 127, 127, 127) + movc r13.xyzw, r16.xyzw, r15.xyzw, r13.xyzw + ishl r15.xyzw, r18.xyzw, l(23, 23, 23, 23) + iadd r15.xyzw, r15.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + iadd r13.xyzw, r15.xyzw, r13.xyzw + movc r12.xyzw, r14.xyzw, r13.xyzw, l(0,0,0,0) + ushr r7.z, r7.x, r7.z + and r13.xy, r7.zzzz, l(1023, 127, 0, 0) + ubfe r7.w, l(3), l(7), r7.z + firstbit_hi r8.x, r13.y + iadd r8.x, r8.x, l(-24) + movc r8.x, r13.y, r8.x, l(8) + iadd r13.z, -r8.x, l(1) + movc r13.z, r7.w, r7.w, r13.z + bfi r7.z, l(7), r8.x, r7.z, l(0) + and r7.z, r7.z, l(127) + movc r7.z, r7.w, r13.y, r7.z + ishl r7.w, r13.z, l(23) + iadd r7.w, r7.w, l(0x3e000000) + ishl r7.z, r7.z, l(16) + iadd r7.z, r7.w, r7.z + movc r7.x, r13.x, r7.z, l(0) + break + case l(4) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.z, l(16), l(0), r7.x + itof r7.z, r7.z + mul r7.z, r7.z, l(0.000977) + max r7.x, r7.z, l(-1.000000) + break + case l(6) + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r12.xyzw, r12.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + else + ld_raw r11.x, r7.y, T0[0].xxxx + iadd r13.xyzw, r7.yyyy, l(8, 16, 24, 32) + ld_raw r11.y, r13.x, T0[0].xxxx + ld_raw r11.z, r13.y, T0[0].xxxx + ld_raw r11.w, r13.z, T0[0].xxxx + ld_raw r12.x, r13.w, T0[0].xxxx + iadd r13.xyzw, r7.yyyy, l(40, 48, 56, 64) + ld_raw r12.y, r13.x, T0[0].xxxx + ld_raw r12.z, r13.y, T0[0].xxxx + ld_raw r12.w, r13.z, T0[0].xxxx + ld_raw r7.x, r13.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.y, l(16), l(0), r7.x + itof r7.y, r7.y + mul r7.y, r7.y, l(0.000977) + max r7.x, r7.y, l(-1.000000) + break + case l(7) + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r12.xyzw, r12.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + endif + add r5.xyzw, r9.xyzw, r11.xyzw + add r6.xyzw, r10.xyzw, r12.xyzw + add r2.x, r1.y, r7.x + endif +else + mov r2.w, r3.x +endif +mul r5.xyzw, r2.wwww, r5.xwyz +mul r6.xyzw, r2.wwww, r6.xyzw +mul_sat r7.z, r2.w, r2.x +if_nz r0.w + mov r9.x, r5.y + mov r9.y, r6.x + mov r5.x, r6.y +else + mov r9.xy, r5.xzxx + mov r5.x, r5.w +endif +mov_sat r9.xy, r9.xyxx +mad r2.xw, r9.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) +ftou r2.xw, r2.xxxw +ishl r1.y, r2.w, l(24) +imad r1.y, r2.x, l(0x00010000), r1.y +iadd r4.y, r0.y, r1.y +store_uav_typed U0[0].xyzw, r8.yyyy, r4.xyzw +mov r5.zw, r6.xxxy +mov_sat r5.xyzw, r5.xyzw +mad r4.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mov_sat r7.xy, r6.zwzz +mad r5.xyz, r7.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r5.xyz, r5.xyzx +imad r0.y, r5.y, l(256), r5.x +imad r0.y, r5.z, l(0x00010000), r0.y +iadd r0.x, r0.z, r0.x +if_nz r1.z + iadd r0.x, r0.x, l(4) +endif +if_z r2.z + ld_raw r5.xyzw, r0.x, T0[0].xyzw + iadd r1.yz, r0.xxxx, l(0, 16, 32, 0) + ld_raw r6.xyzw, r1.y, T0[0].xyzw + ld_raw r0.z, r1.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r1.y, r1.w, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.y, r0.z, r1.y + and r1.y, r1.y, l(255) + utof r1.y, r1.y + mul r0.z, r1.y, l(0.003922) + break + case l(2) + case l(10) + movc r1.y, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r1.y, r0.z, r1.y + and r1.y, r1.y, l(1023) + utof r1.y, r1.y + mul r0.z, r1.y, l(0.000978) + break + case l(3) + case l(12) + movc r1.y, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r1.yyyy + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r10.xyzw, r7.xyzw + movc r5.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r1.yyyy + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r10.xyzw, r7.xyzw + movc r6.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) + ushr r1.y, r0.z, r1.y + and r2.xw, r1.yyyy, l(1023, 0, 0, 127) + ubfe r1.z, l(3), l(7), r1.y + firstbit_hi r7.x, r2.w + iadd r7.x, r7.x, l(-24) + movc r7.x, r2.w, r7.x, l(8) + iadd r7.y, -r7.x, l(1) + movc r7.y, r1.z, r1.z, r7.y + bfi r1.y, l(7), r7.x, r1.y, l(0) + and r1.y, r1.y, l(127) + movc r1.y, r1.z, r2.w, r1.y + ishl r1.z, r7.y, l(23) + iadd r1.z, r1.z, l(0x3e000000) + ishl r1.y, r1.y, l(16) + iadd r1.y, r1.z, r1.y + movc r0.z, r2.x, r1.y, l(0) + break + case l(4) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.y, l(16), l(0), r0.z + itof r1.y, r1.y + mul r1.y, r1.y, l(0.000977) + max r0.z, r1.y, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r0.z, r0.z + break + default + break + endswitch +else + ld_raw r5.x, r0.x, T0[0].xxxx + iadd r7.xyzw, r0.xxxx, l(8, 16, 24, 32) + ld_raw r5.y, r7.x, T0[0].xxxx + ld_raw r5.z, r7.y, T0[0].xxxx + ld_raw r5.w, r7.z, T0[0].xxxx + ld_raw r6.x, r7.w, T0[0].xxxx + iadd r7.xyzw, r0.xxxx, l(40, 48, 56, 64) + ld_raw r6.y, r7.x, T0[0].xxxx + ld_raw r6.z, r7.y, T0[0].xxxx + ld_raw r6.w, r7.z, T0[0].xxxx + ld_raw r0.z, r7.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.y, l(16), l(0), r0.z + itof r1.y, r1.y + mul r1.y, r1.y, l(0.000977) + max r0.z, r1.y, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r0.z, r0.z + break + default + break + endswitch +endif +if_nz r3.y + mul r1.y, r3.x, l(0.500000) + ishl r1.z, l(2880), r3.z + iadd r1.z, r0.x, r1.z + if_z r2.z + ld_raw r7.xyzw, r1.z, T0[0].xyzw + iadd r2.xw, r1.zzzz, l(16, 0, 0, 32) + ld_raw r9.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r10.xyzw, r7.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r2.wwww + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r7.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r2.wwww + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r8.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r3.y, l(3), l(7), r2.w + firstbit_hi r10.x, r8.y + iadd r10.x, r10.x, l(-24) + movc r10.x, r8.y, r10.x, l(8) + iadd r10.y, -r10.x, l(1) + movc r10.y, r3.y, r3.y, r10.y + bfi r2.w, l(7), r10.x, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r3.y, r8.y, r2.w + ishl r3.y, r10.y, l(23) + iadd r3.y, r3.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r3.y, r2.w + movc r2.x, r8.x, r2.w, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch + else + ld_raw r7.x, r1.z, T0[0].xxxx + iadd r10.xyzw, r1.zzzz, l(8, 16, 24, 32) + ld_raw r7.y, r10.x, T0[0].xxxx + ld_raw r7.z, r10.y, T0[0].xxxx + ld_raw r7.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r1.zzzz, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r2.x, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r2.x + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r2.x, r1.z, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r7.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r0.z, r0.z, r2.x + uge r1.z, r2.y, l(6) + if_nz r1.z + mul r3.x, r3.x, l(0.250000) + ishl r2.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r2.xy, r0.xxxx, r2.xyxx + if_z r2.z + ld_raw r7.xyzw, r2.x, T0[0].xyzw + iadd r3.yz, r2.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r3.y, T0[0].xyzw + ld_raw r0.x, r3.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r1.z, r1.w, l(16), l(0) + ushr r10.xyzw, r7.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.z, r0.x, r1.z + and r1.z, r1.z, l(255) + utof r1.z, r1.z + mul r0.x, r1.z, l(0.003922) + break + case l(2) + case l(10) + movc r1.z, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r1.z, r0.x, r1.z + and r1.z, r1.z, l(1023) + utof r1.z, r1.z + mul r0.x, r1.z, l(0.000978) + break + case l(3) + case l(12) + movc r1.z, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r1.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r7.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r1.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r1.z, r0.x, r1.z + and r3.yz, r1.zzzz, l(0, 1023, 127, 0) + ubfe r2.w, l(3), l(7), r1.z + firstbit_hi r8.x, r3.z + iadd r8.x, r8.x, l(-24) + movc r8.x, r3.z, r8.x, l(8) + iadd r8.y, -r8.x, l(1) + movc r8.y, r2.w, r2.w, r8.y + bfi r1.z, l(7), r8.x, r1.z, l(0) + and r1.z, r1.z, l(127) + movc r1.z, r2.w, r3.z, r1.z + ishl r2.w, r8.y, l(23) + iadd r2.w, r2.w, l(0x3e000000) + ishl r1.z, r1.z, l(16) + iadd r1.z, r2.w, r1.z + movc r0.x, r3.y, r1.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r0.x + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r0.x, r1.z, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.x, r0.x + break + default + break + endswitch + else + ld_raw r7.x, r2.x, T0[0].xxxx + iadd r10.xyzw, r2.xxxx, l(8, 16, 24, 32) + ld_raw r7.y, r10.x, T0[0].xxxx + ld_raw r7.z, r10.y, T0[0].xxxx + ld_raw r7.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r2.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r0.x, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r0.x + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r0.x, r1.z, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.x, r0.x + break + default + break + endswitch + endif + add r7.xyzw, r5.xyzw, r7.xyzw + add r9.xyzw, r6.xyzw, r9.xyzw + add r0.x, r0.x, r0.z + if_z r2.z + ld_raw r10.xyzw, r2.y, T0[0].xyzw + iadd r2.xz, r2.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r2.x, T0[0].xyzw + ld_raw r1.z, r2.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.x, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.x, r1.z, r2.x + and r2.x, r2.x, l(255) + utof r2.x, r2.x + mul r1.z, r2.x, l(0.003922) + break + case l(2) + case l(10) + movc r2.x, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.x, r1.z, r2.x + and r2.x, r2.x, l(1023) + utof r2.x, r2.x + mul r1.z, r2.x, l(0.000978) + break + case l(3) + case l(12) + movc r1.w, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r1.wwww + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r1.wwww + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r1.w, r1.z, r1.w + and r2.xz, r1.wwww, l(1023, 0, 127, 0) + ubfe r2.w, l(3), l(7), r1.w + firstbit_hi r3.y, r2.z + iadd r3.y, r3.y, l(-24) + movc r3.y, r2.z, r3.y, l(8) + iadd r3.z, -r3.y, l(1) + movc r3.z, r2.w, r2.w, r3.z + bfi r1.w, l(7), r3.y, r1.w, l(0) + and r1.w, r1.w, l(127) + movc r1.w, r2.w, r2.z, r1.w + ishl r2.z, r3.z, l(23) + iadd r2.z, r2.z, l(0x3e000000) + ishl r1.w, r1.w, l(16) + iadd r1.w, r2.z, r1.w + movc r1.z, r2.x, r1.w, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.w, l(16), l(0), r1.z + itof r1.w, r1.w + mul r1.w, r1.w, l(0.000977) + max r1.z, r1.w, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch + else + ld_raw r10.x, r2.y, T0[0].xxxx + iadd r12.xyzw, r2.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r2.xyzw, r2.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r2.x, T0[0].xxxx + ld_raw r11.z, r2.y, T0[0].xxxx + ld_raw r11.w, r2.z, T0[0].xxxx + ld_raw r1.z, r2.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r2.xyzw, r2.xyzw + mul r2.xyzw, r2.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r2.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r2.xyzw, r2.xyzw + mul r2.xyzw, r2.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r2.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.w, l(16), l(0), r1.z + itof r1.w, r1.w + mul r1.w, r1.w, l(0.000977) + max r1.z, r1.w, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch + endif + add r5.xyzw, r7.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r0.z, r0.x, r1.z + else + mov r3.x, r1.y + endif +endif +mul r2.xyzw, r3.xxxx, r5.yzxw +mul r5.xyzw, r3.xxxx, r6.xyzw +mul_sat r3.w, r0.z, r3.x +if_nz r0.w + mov r2.xz, r5.yyxy + mov r0.x, r2.w +else + mov r0.x, r2.z + mov r2.xz, r2.yyxy +endif +mov_sat r0.x, r0.x +mad r0.x, r0.x, l(255.000000), l(0.500000) +ftou r0.x, r0.x +imad r4.y, r0.x, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r8.zzzz, r4.xyzw +mov r2.y, r5.x +mov_sat r2.xyzw, r2.xyzw +mad r0.xyzw, r2.zxwy, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r0.xyzw, r0.xyzw +imad r0.x, r0.y, l(256), r0.x +imad r0.x, r0.z, l(0x00010000), r0.x +imad r0.xzw, r0.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.xxxx +mov_sat r3.xyz, r5.yzwy +mad r2.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r2.xyzw, r2.xyzw +imad r1.y, r2.y, l(256), r2.x +imad r1.y, r2.z, l(0x00010000), r1.y +imad r0.y, r2.w, l(0x01000000), r1.y +store_uav_typed U0[0].xyzw, r8.wwww, r0.xyzw +ret +// Approximately 5349 instruction slots used +#endif + +const BYTE resolve_full_8bpp_3xres_cs[] = +{ + 68, 88, 66, 67, 72, 137, + 116, 111, 4, 249, 58, 6, + 110, 70, 98, 190, 122, 144, + 152, 204, 1, 0, 0, 0, + 116, 104, 2, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 148, 2, 0, 0, 164, 2, + 0, 0, 180, 2, 0, 0, + 216, 103, 2, 0, 82, 68, + 69, 70, 88, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 47, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 4, 0, 0, 0, 4, 1, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 228, 1, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 192, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 252, 1, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 192, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 17, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 192, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 101, + 100, 114, 97, 109, 95, 105, + 110, 102, 111, 0, 100, 119, + 111, 114, 100, 0, 0, 0, + 19, 0, 1, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 186, 1, 0, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 97, 100, 100, + 114, 101, 115, 115, 95, 105, + 110, 102, 111, 0, 120, 101, + 95, 114, 101, 115, 111, 108, + 118, 101, 95, 100, 101, 115, + 116, 95, 105, 110, 102, 111, + 0, 120, 101, 95, 114, 101, + 115, 111, 108, 118, 101, 95, + 100, 101, 115, 116, 95, 112, + 105, 116, 99, 104, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 8, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 79, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 83, 72, 69, 88, + 28, 101, 2, 0, 81, 0, + 5, 0, 71, 153, 0, 0, + 106, 8, 0, 1, 89, 0, + 0, 7, 70, 142, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 161, 0, 0, 6, + 70, 126, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 156, 8, 0, 7, + 70, 238, 49, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 68, 68, + 0, 0, 0, 0, 0, 0, + 95, 0, 0, 2, 50, 0, + 2, 0, 104, 0, 0, 2, + 19, 0, 0, 0, 155, 0, + 0, 4, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 0, 138, 0, 0, 11, + 18, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 11, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 26, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 80, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 10, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 6, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 2, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 12, 242, 0, + 16, 0, 1, 0, 0, 0, + 134, 136, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 64, + 8, 0, 0, 0, 255, 3, + 0, 0, 0, 0, 0, 1, + 54, 0, 0, 4, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 2, 0, 32, 0, + 0, 10, 194, 0, 16, 0, + 0, 0, 0, 0, 6, 4, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 55, 0, 0, 12, + 194, 0, 16, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 1, 0, 0, 0, 166, 14, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 85, 0, 0, 12, + 50, 0, 16, 0, 2, 0, + 0, 0, 86, 133, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 5, 0, + 0, 0, 29, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 7, + 66, 0, 16, 0, 2, 0, + 0, 0, 26, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 20, 242, 0, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 2, 0, 0, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 38, 8, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 3, 0, + 0, 0, 70, 1, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 140, 0, 0, 13, 18, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 10, 0, + 0, 0, 1, 64, 0, 0, + 5, 0, 0, 0, 58, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 26, 0, 16, 0, + 1, 0, 0, 0, 138, 0, + 0, 11, 34, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 1, 64, 0, 0, 4, 0, + 0, 0, 42, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 85, 0, 0, 9, 130, 0, + 16, 0, 2, 0, 0, 0, + 58, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 10, 0, 0, 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0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_cs.h new file mode 100644 index 000000000..a2fdfcade --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/resolve_full_8bpp_cs.h @@ -0,0 +1,3960 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch_aligned;// Offset: 12 Size: 4 +// uint xe_resolve_dest_base; // Offset: 16 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 16 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(11), l(7), CB0[0][0].y +uge r0.x, vThreadID.x, r0.x +if_nz r0.x + ret +endif +ishl r0.xw, vThreadID.xxxx, l(3, 0, 0, 3) +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyz, CB0[0][0].xzzx, l(1023, 0x01000000, 8, 0) +ubfe r4.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r2.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r2.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.x, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w +iadd r2.x, r2.z, r4.z +ishl r2.y, l(4), r2.x +ishl r1.w, r1.w, l(2) +ine r2.z, r3.y, l(0) +ine r2.w, r4.z, l(0) +and r2.z, r2.z, r2.w +if_nz r2.z + iadd r1.w, r1.w, l(4) +endif +ieq r2.z, r2.y, l(4) +if_nz r2.z + ld_raw r5.xyzw, r1.w, T0[0].xyzw + iadd r2.w, r1.w, l(16) + ld_raw r6.xyzw, r2.w, T0[0].xyzw +else + ld_raw r5.x, r1.w, T0[0].xxxx + iadd r2.w, r2.y, r1.w + ld_raw r5.y, r2.w, T0[0].xxxx + ishl r7.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r7.xyzw, r1.wwww, r7.xyzw + ld_raw r5.z, r7.x, T0[0].xxxx + ld_raw r5.w, r7.y, T0[0].xxxx + ld_raw r6.x, r7.z, T0[0].xxxx + ld_raw r6.y, r7.w, T0[0].xxxx + ishl r3.xw, l(24, 0, 0, 28), r2.xxxx + iadd r3.xw, r1.wwww, r3.xxxw + ld_raw r6.z, r3.x, T0[0].xxxx + ld_raw r6.w, r3.w, T0[0].xxxx +endif +if_nz r4.z + switch r4.w + case l(5) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + break + default + break + endswitch +else + switch r4.w + case l(0) + case l(1) + movc r2.w, r3.y, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r2.w, r3.y, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r2.w, r3.y, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + break + default + break + endswitch +endif +ibfe r2.w, l(6), l(16), CB0[0][0].z +ishl r2.w, r2.w, l(23) +iadd r2.w, r2.w, l(0x3f800000) +uge r3.x, r1.y, l(4) +if_nz r3.x + mul r3.x, r2.w, l(0.500000) + ishl r3.w, l(320), r4.z + iadd r3.w, r1.w, r3.w + if_nz r2.z + ld_raw r7.xyzw, r3.w, T0[0].xyzw + iadd r4.x, r3.w, l(16) + ld_raw r8.xyzw, r4.x, T0[0].xyzw + else + ld_raw r7.x, r3.w, T0[0].xxxx + iadd r4.x, r2.y, r3.w + ld_raw r7.y, r4.x, T0[0].xxxx + ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r9.xyzw, r3.wwww, r9.xyzw + ld_raw r7.z, r9.x, T0[0].xxxx + ld_raw r7.w, r9.y, T0[0].xxxx + ld_raw r8.x, r9.z, T0[0].xxxx + ld_raw r8.y, r9.w, T0[0].xxxx + ishl r4.xy, l(24, 28, 0, 0), r2.xxxx + iadd r4.xy, r3.wwww, r4.xyxx + ld_raw r8.z, r4.x, T0[0].xxxx + ld_raw r8.w, r4.y, T0[0].xxxx + endif + if_nz r4.z + switch r4.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + break + default + break + endswitch + else + switch r4.w + case l(0) + case l(1) + movc r3.w, r3.y, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r3.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r3.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r3.w, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r3.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r3.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r3.w, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r3.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r3.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r7.xyzw + add r6.xyzw, r6.xyzw, r8.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r2.w, r2.w, l(0.250000) + ishl r4.xy, l(4, 324, 0, 0), r4.zzzz + iadd r1.yw, r1.wwww, r4.xxxy + if_nz r2.z + ld_raw r7.xyzw, r1.y, T0[0].xyzw + iadd r3.w, r1.y, l(16) + ld_raw r8.xyzw, r3.w, T0[0].xyzw + else + ld_raw r7.x, r1.y, T0[0].xxxx + iadd r3.w, r2.y, r1.y + ld_raw r7.y, r3.w, T0[0].xxxx + ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r9.xyzw, r1.yyyy, r9.xyzw + ld_raw r7.z, r9.x, T0[0].xxxx + ld_raw r7.w, r9.y, T0[0].xxxx + ld_raw r8.x, r9.z, T0[0].xxxx + ld_raw r8.y, r9.w, T0[0].xxxx + ishl r4.xy, l(24, 28, 0, 0), r2.xxxx + iadd r4.xy, r1.yyyy, r4.xyxx + ld_raw r8.z, r4.x, T0[0].xxxx + ld_raw r8.w, r4.y, T0[0].xxxx + endif + if_nz r4.z + switch r4.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + break + default + break + endswitch + else + switch r4.w + case l(0) + case l(1) + movc r1.y, r3.y, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r1.y, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r1.y, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r1.yyyy + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r1.yyyy + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + break + default + break + endswitch + endif + add r7.xyzw, r5.xyzw, r7.xyzw + add r8.xyzw, r6.xyzw, r8.xyzw + if_nz r2.z + ld_raw r9.xyzw, r1.w, T0[0].xyzw + iadd r1.y, r1.w, l(16) + ld_raw r10.xyzw, r1.y, T0[0].xyzw + else + ld_raw r9.x, r1.w, T0[0].xxxx + iadd r1.y, r2.y, r1.w + ld_raw r9.y, r1.y, T0[0].xxxx + ishl r11.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r11.xyzw, r1.wwww, r11.xyzw + ld_raw r9.z, r11.x, T0[0].xxxx + ld_raw r9.w, r11.y, T0[0].xxxx + ld_raw r10.x, r11.z, T0[0].xxxx + ld_raw r10.y, r11.w, T0[0].xxxx + ishl r2.xy, l(24, 28, 0, 0), r2.xxxx + iadd r1.yw, r1.wwww, r2.xxxy + ld_raw r10.z, r1.y, T0[0].xxxx + ld_raw r10.w, r1.w, T0[0].xxxx + endif + if_nz r4.z + switch r4.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + break + default + break + endswitch + else + switch r4.w + case l(0) + case l(1) + movc r1.y, r3.y, l(16), l(0) + ushr r4.xyzw, r9.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r9.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.xyzw, r10.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r4.xyzw, r4.xyzw + mul r10.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + movc r1.y, r3.y, l(20), l(0) + ushr r4.xyzw, r9.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + utof r4.xyzw, r4.xyzw + mul r9.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r4.xyzw, r10.xyzw, r1.yyyy + and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + utof r4.xyzw, r4.xyzw + mul r10.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + break + case l(3) + case l(12) + movc r1.y, r3.y, l(20), l(0) + ushr r4.xyzw, r9.xyzw, r1.yyyy + and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) + and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) + movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + iadd r4.xyzw, r12.xyzw, r4.xyzw + movc r9.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) + ushr r4.xyzw, r10.xyzw, r1.yyyy + and r11.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r4.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r4.xyzw, l(7, 7, 7, 7), r14.xyzw, r4.xyzw, l(0, 0, 0, 0) + and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) + movc r4.xyzw, r13.xyzw, r12.xyzw, r4.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + iadd r4.xyzw, r12.xyzw, r4.xyzw + movc r10.xyzw, r11.xyzw, r4.xyzw, l(0,0,0,0) + break + case l(4) + ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r4.xyzw, r4.xyzw + mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + break + default + break + endswitch + endif + add r5.xyzw, r7.xyzw, r9.xyzw + add r6.xyzw, r8.xyzw, r10.xyzw + else + mov r2.w, r3.x + endif +endif +mul_sat r4.xyzw, r2.wwww, r5.xyzw +mul_sat r2.xyzw, r2.wwww, r6.xyzw +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +bfi r1.x, l(10), l(5), CB0[0][0].w, l(0) +if_nz r3.z + ubfe r1.y, l(3), l(4), CB0[0][0].z + ushr r1.z, CB0[0][0].w, l(10) + ishl r1.z, r1.z, l(5) + ishr r3.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.w, r1.y, l(2) + ushr r1.z, r1.z, l(4) + and r1.z, r1.z, l(0x00007ffe) + imad r1.z, r1.w, r1.z, r3.x + ushr r3.x, r1.x, l(5) + imad r1.z, r1.z, r3.x, r3.y + ishl r3.x, r0.z, l(8) + ishr r3.x, r3.x, l(6) + iadd r1.w, r1.w, r3.z + bfi r3.y, l(1), l(1), r1.w, l(0) + iadd r3.y, r3.y, r3.w + bfi r3.y, l(2), l(1), r3.y, l(0) + bfi r1.w, l(1), l(0), r1.w, r3.y + and r3.xy, r3.xxxx, l(16, 8, 0, 0) + bfi r3.zw, l(0, 0, 22, 22), l(0, 0, 8, 11), r1.zzzz, l(0, 0, 0, 0) + imad r3.xz, r3.xxxx, l(2, 0, 16, 0), r3.zzwz + bfi r3.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r3.yyyy, r3.xzxx + bfi r1.yz, l(0, 2, 2, 0), l(0, 6, 9, 0), r1.yyyy, r3.xxyx + ubfe r3.x, l(3), l(6), r1.y + and r3.y, r1.w, l(6) + bfi r1.w, l(1), l(8), r1.w, l(0) + imad r1.w, r3.x, l(32), r1.w + imad r1.w, r3.y, l(4), r1.w + bfi r1.yz, l(0, 1, 1, 0), l(0, 4, 7, 0), r0.zzzz, r1.yyzy + bfi r1.z, l(9), l(3), r1.w, r1.z + bfi r1.y, l(6), l(0), r1.y, r1.z +else + ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) + ushr r0.x, r1.x, l(5) + imad r0.x, r3.y, r0.x, r3.x + ishl r0.yw, r0.zzzz, l(0, 2, 0, 7) + ishl r1.x, r0.y, l(1) + and r1.x, r1.x, l(96) + bfi r1.z, l(25), l(7), r0.x, r1.x + and r0.yw, r0.yyyw, l(0, 8, 0, 2048) + iadd r1.z, r1.z, r0.y + bfi r1.z, l(1), l(4), r0.z, r1.z + ishl r1.xw, r1.xxxx, l(3, 0, 0, 2) + bfi r1.xw, l(25, 0, 0, 25), l(10, 0, 0, 9), r0.xxxx, r1.xxxw + imad r0.xy, r0.yyyy, l(8, 4, 0, 0), r1.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r0.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r3.z, l(2) + iadd r0.y, r3.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.y, l(6), l(0), r1.z, r0.x +endif +iadd r0.x, r1.y, CB0[0][1].x +ushr r0.x, r0.x, l(3) +mad r1.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r1.xyzw, r1.xyzw +imad r0.y, r1.y, l(256), r1.x +imad r0.y, r1.z, l(0x00010000), r0.y +imad r1.xzw, r1.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mad r2.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r2.xyzw, r2.xyzw +imad r0.y, r2.y, l(256), r2.x +imad r0.y, r2.z, l(0x00010000), r0.y +imad r1.y, r2.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ret +// Approximately 626 instruction slots used +#endif + +const BYTE resolve_full_8bpp_cs[] = +{ + 68, 88, 66, 67, 172, 4, + 84, 170, 124, 71, 222, 107, + 130, 27, 170, 217, 96, 143, + 95, 245, 1, 0, 0, 0, + 220, 76, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 208, 2, 0, 0, 224, 2, + 0, 0, 240, 2, 0, 0, + 64, 76, 0, 0, 82, 68, + 69, 70, 148, 2, 0, 0, + 1, 0, 0, 0, 236, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 108, 2, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 7, 0, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 198, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 214, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 115, + 111, 117, 114, 99, 101, 0, + 120, 101, 95, 114, 101, 115, + 111, 108, 118, 101, 95, 100, + 101, 115, 116, 0, 88, 101, + 82, 101, 115, 111, 108, 118, + 101, 67, 111, 110, 115, 116, + 97, 110, 116, 115, 0, 171, + 171, 171, 214, 0, 0, 0, + 5, 0, 0, 0, 4, 1, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 204, 1, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 12, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 232, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 36, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 232, 1, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 57, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 232, 1, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 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0, + 16, 0, 0, 0, 0, 0, + 140, 0, 0, 11, 34, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 2, 0, + 0, 0, 1, 64, 0, 0, + 6, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 140, 0, 0, 11, 34, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 6, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 21, 0, 0, 1, + 30, 0, 0, 9, 18, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 10, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 7, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 50, 0, + 0, 15, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 127, 67, 0, 0, 127, 67, + 0, 0, 127, 67, 0, 0, + 127, 67, 2, 64, 0, 0, + 0, 0, 0, 63, 0, 0, + 0, 63, 0, 0, 0, 63, + 0, 0, 0, 63, 28, 0, + 0, 5, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 35, 0, 0, 9, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 0, 1, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 35, 0, 0, 9, 34, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 1, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 35, 0, 0, 12, 210, 0, + 16, 0, 1, 0, 0, 0, + 246, 15, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 1, 0, 0, + 0, 0, 0, 0, 0, 1, + 0, 0, 0, 1, 86, 5, + 16, 0, 0, 0, 0, 0, + 50, 0, 0, 15, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 127, 67, 0, 0, + 127, 67, 0, 0, 127, 67, + 0, 0, 127, 67, 2, 64, + 0, 0, 0, 0, 0, 63, + 0, 0, 0, 63, 0, 0, + 0, 63, 0, 0, 0, 63, + 28, 0, 0, 5, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 35, 0, 0, 9, + 34, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 1, 0, 0, + 10, 0, 16, 0, 2, 0, + 0, 0, 35, 0, 0, 9, + 34, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 1, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 34, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 1, + 26, 0, 16, 0, 0, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 114, 2, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 60, 0, 0, 0, + 127, 0, 0, 0, 88, 0, + 0, 0, 50, 0, 0, 0, + 23, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 40, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 0, 0, + 45, 0, 0, 0, 34, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_gamma_ps.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_gamma_ps.h new file mode 100644 index 000000000..b0ff6436a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_gamma_ps.h @@ -0,0 +1,284 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeStretchGammaRootConstants +// { +// +// float xe_gamma_ramp_inv_size; // Offset: 0 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_sampler_linear_clamp sampler NA NA S0 s0 1 +// xe_texture texture float3 2d T0 t0 1 +// xe_gamma_ramp texture float3 1d T1 t1 1 +// XeStretchGammaRootConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xy 0 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_sampler S0[0:0], mode_default, space=0 +dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 +dcl_resource_texture1d (float,float,float,float) T1[1:1], space=0 +dcl_input_ps linear v0.xy +dcl_output o0.xyzw +dcl_temps 2 +sample_l r0.xyz, v0.xyxx, T0[0].xyzw, S0[0], l(0.000000) +add r0.w, -CB0[0][0].x, l(1.000000) +mul r1.x, CB0[0][0].x, l(0.500000) +mad r0.xyz, r0.xyzx, r0.wwww, r1.xxxx +sample_l r0.x, r0.x, T1[1].xyzw, S0[0], l(0.000000) +sample_l r0.y, r0.y, T1[1].xyzw, S0[0], l(0.000000) +sample_l r0.z, r0.z, T1[1].xyzw, S0[0], l(0.000000) +mov o0.xyz, r0.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 10 instruction slots used +#endif + +const BYTE stretch_gamma_ps[] = +{ + 68, 88, 66, 67, 4, 222, + 150, 161, 149, 185, 43, 51, + 177, 110, 80, 244, 108, 113, + 108, 20, 1, 0, 0, 0, + 36, 5, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 20, 2, 0, 0, 72, 2, + 0, 0, 124, 2, 0, 0, + 136, 4, 0, 0, 82, 68, + 69, 70, 216, 1, 0, 0, + 1, 0, 0, 0, 44, 1, + 0, 0, 4, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 255, 255, 0, 5, 4, 0, + 176, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 220, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 244, 0, + 0, 0, 2, 0, 0, 0, + 5, 0, 0, 0, 4, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 255, 0, 0, 0, + 2, 0, 0, 0, 5, 0, + 0, 0, 2, 0, 0, 0, + 255, 255, 255, 255, 1, 0, + 0, 0, 1, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 13, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 120, 101, + 95, 115, 97, 109, 112, 108, + 101, 114, 95, 108, 105, 110, + 101, 97, 114, 95, 99, 108, + 97, 109, 112, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 0, 120, 101, 95, + 103, 97, 109, 109, 97, 95, + 114, 97, 109, 112, 0, 88, + 101, 83, 116, 114, 101, 116, + 99, 104, 71, 97, 109, 109, + 97, 82, 111, 111, 116, 67, + 111, 110, 115, 116, 97, 110, + 116, 115, 0, 171, 171, 171, + 13, 1, 0, 0, 1, 0, + 0, 0, 68, 1, 0, 0, + 16, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 108, 1, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 140, 1, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 103, 97, 109, 109, 97, + 95, 114, 97, 109, 112, 95, + 105, 110, 118, 95, 115, 105, + 122, 101, 0, 102, 108, 111, + 97, 116, 0, 171, 171, 171, + 0, 0, 3, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 131, 1, 0, 0, + 77, 105, 99, 114, 111, 115, + 111, 102, 116, 32, 40, 82, + 41, 32, 72, 76, 83, 76, + 32, 83, 104, 97, 100, 101, + 114, 32, 67, 111, 109, 112, + 105, 108, 101, 114, 32, 49, + 48, 46, 49, 0, 73, 83, + 71, 78, 44, 0, 0, 0, + 1, 0, 0, 0, 8, 0, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 3, 3, + 0, 0, 84, 69, 88, 67, + 79, 79, 82, 68, 0, 171, + 171, 171, 79, 83, 71, 78, + 44, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 15, 0, 0, 0, + 83, 86, 95, 84, 97, 114, + 103, 101, 116, 0, 171, 171, + 83, 72, 69, 88, 4, 2, + 0, 0, 81, 0, 0, 0, + 129, 0, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 90, 0, 0, 6, 70, 110, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 88, 24, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 85, 85, 0, 0, + 0, 0, 0, 0, 88, 16, + 0, 7, 70, 126, 48, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 85, 85, 0, 0, 0, 0, + 0, 0, 98, 16, 0, 3, + 50, 16, 16, 0, 0, 0, + 0, 0, 101, 0, 0, 3, + 242, 32, 16, 0, 0, 0, + 0, 0, 104, 0, 0, 2, + 2, 0, 0, 0, 72, 0, + 0, 13, 114, 0, 16, 0, + 0, 0, 0, 0, 70, 16, + 16, 0, 0, 0, 0, 0, + 70, 126, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 96, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 10, + 130, 0, 16, 0, 0, 0, + 0, 0, 10, 128, 48, 128, + 65, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 128, 63, + 56, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 63, + 50, 0, 0, 9, 114, 0, + 16, 0, 0, 0, 0, 0, + 70, 2, 16, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 1, 0, 0, 0, + 72, 0, 0, 13, 18, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 70, 126, 32, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 96, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 72, 0, + 0, 13, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 70, 126, 32, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 96, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 72, 0, 0, 13, + 66, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 70, 126, + 32, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 96, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 54, 0, 0, 5, 114, 32, + 16, 0, 0, 0, 0, 0, + 70, 2, 16, 0, 0, 0, + 0, 0, 54, 0, 0, 5, + 130, 32, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 128, 63, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 10, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_ps.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_ps.h new file mode 100644 index 000000000..34b882a0d --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/stretch_ps.h @@ -0,0 +1,167 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_sampler_linear_clamp sampler NA NA S0 s0 1 +// xe_texture texture float3 2d T0 t0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xy 0 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_sampler S0[0:0], mode_default, space=0 +dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 +dcl_input_ps linear v0.xy +dcl_output o0.xyzw +dcl_temps 1 +sample_l r0.xyz, v0.xyxx, T0[0].xyzw, S0[0], l(0.000000) +mov o0.xyz, r0.xyzx +mov o0.w, l(1.000000) +ret +// Approximately 4 instruction slots used +#endif + +const BYTE stretch_ps[] = +{ + 68, 88, 66, 67, 42, 105, + 40, 75, 32, 223, 178, 162, + 221, 190, 237, 193, 82, 219, + 83, 57, 1, 0, 0, 0, + 224, 2, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 20, 1, 0, 0, 72, 1, + 0, 0, 124, 1, 0, 0, + 68, 2, 0, 0, 82, 68, + 69, 70, 216, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 255, 255, 0, 5, 4, 0, + 175, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 164, 0, + 0, 0, 2, 0, 0, 0, + 5, 0, 0, 0, 4, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 115, + 97, 109, 112, 108, 101, 114, + 95, 108, 105, 110, 101, 97, + 114, 95, 99, 108, 97, 109, + 112, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 0, 77, 105, 99, 114, 111, + 115, 111, 102, 116, 32, 40, + 82, 41, 32, 72, 76, 83, + 76, 32, 83, 104, 97, 100, + 101, 114, 32, 67, 111, 109, + 112, 105, 108, 101, 114, 32, + 49, 48, 46, 49, 0, 171, + 73, 83, 71, 78, 44, 0, + 0, 0, 1, 0, 0, 0, + 8, 0, 0, 0, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 3, 3, 0, 0, 84, 69, + 88, 67, 79, 79, 82, 68, + 0, 171, 171, 171, 79, 83, + 71, 78, 44, 0, 0, 0, + 1, 0, 0, 0, 8, 0, + 0, 0, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 15, 0, + 0, 0, 83, 86, 95, 84, + 97, 114, 103, 101, 116, 0, + 171, 171, 83, 72, 69, 88, + 192, 0, 0, 0, 81, 0, + 0, 0, 48, 0, 0, 0, + 106, 8, 0, 1, 90, 0, + 0, 6, 70, 110, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 88, 24, + 0, 7, 70, 126, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 85, 85, 0, 0, 0, 0, + 0, 0, 98, 16, 0, 3, + 50, 16, 16, 0, 0, 0, + 0, 0, 101, 0, 0, 3, + 242, 32, 16, 0, 0, 0, + 0, 0, 104, 0, 0, 2, + 1, 0, 0, 0, 72, 0, + 0, 13, 114, 0, 16, 0, + 0, 0, 0, 0, 70, 16, + 16, 0, 0, 0, 0, 0, + 70, 126, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 96, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 5, + 114, 32, 16, 0, 0, 0, + 0, 0, 70, 2, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 130, 32, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 128, 63, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/tessellation_adaptive_vs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/tessellation_adaptive_vs.h new file mode 100644 index 000000000..78181000d --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/tessellation_adaptive_vs.h @@ -0,0 +1,681 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer xe_system_cbuffer +// { +// +// uint xe_flags; // Offset: 0 Size: 4 [unused] +// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 +// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 [unused] +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 [unused] +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 [unused] +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 [unused] +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 [unused] +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 [unused] +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_VertexID 0 x 0 VERTID uint x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XETESSFACTOR 0 x 0 NONE float x +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 +dcl_input_sgv v0.x, vertex_id +dcl_output o0.x +dcl_temps 1 +ieq r0.xyz, CB0[0][1].xxxx, l(1, 2, 3, 0) +or r0.xy, r0.yzyy, r0.xyxx +if_nz r0.x + ishl r0.x, v0.x, l(8) + ushr r0.z, v0.x, l(8) + and r0.xz, r0.xxzx, l(0xff00ff00, 0, 0x00ff00ff, 0) + iadd r0.x, r0.z, r0.x +else + mov r0.x, v0.x +endif +if_nz r0.y + ushr r0.y, r0.x, l(16) + bfi r0.x, l(16), l(16), r0.x, r0.y +endif +add r0.x, r0.x, l(1.000000) +max r0.x, r0.x, CB0[0][0].y +min o0.x, r0.x, CB0[0][0].z +ret +// Approximately 18 instruction slots used +#endif + +const BYTE tessellation_adaptive_vs[] = +{ + 68, 88, 66, 67, 70, 199, + 99, 28, 252, 60, 232, 131, + 32, 27, 138, 155, 32, 225, + 78, 128, 1, 0, 0, 0, + 176, 13, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 164, 10, 0, 0, 216, 10, + 0, 0, 16, 11, 0, 0, + 20, 13, 0, 0, 82, 68, + 69, 70, 104, 10, 0, 0, + 1, 0, 0, 0, 120, 0, + 0, 0, 1, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 254, 255, 0, 5, 4, 0, + 62, 10, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 100, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 120, 101, + 95, 115, 121, 115, 116, 101, + 109, 95, 99, 98, 117, 102, + 102, 101, 114, 0, 171, 171, + 100, 0, 0, 0, 32, 0, + 0, 0, 144, 0, 0, 0, + 224, 1, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 144, 5, 0, 0, 0, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 160, 5, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 196, 5, + 0, 0, 4, 0, 0, 0, + 8, 0, 0, 0, 2, 0, + 0, 0, 232, 5, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 12, 6, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 160, 5, 0, 0, 0, 0, + 0, 0, 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file mode 100644 index 000000000..a85652c38 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/tessellation_indexed_vs.h @@ -0,0 +1,692 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer xe_system_cbuffer +// { +// +// uint xe_flags; // Offset: 0 Size: 4 [unused] +// float2 xe_tessellation_factor_range;// Offset: 4 Size: 8 [unused] +// uint xe_line_loop_closing_index; // Offset: 12 Size: 4 [unused] +// uint xe_vertex_index_endian; // Offset: 16 Size: 4 +// uint xe_vertex_index_offset; // Offset: 20 Size: 4 +// uint2 xe_vertex_index_min_max; // Offset: 24 Size: 8 +// float4 xe_user_clip_planes[6]; // Offset: 32 Size: 96 [unused] +// float3 xe_ndc_scale; // Offset: 128 Size: 12 [unused] +// float xe_point_size_x; // Offset: 140 Size: 4 [unused] +// float3 xe_ndc_offset; // Offset: 144 Size: 12 [unused] +// float xe_point_size_y; // Offset: 156 Size: 4 [unused] +// float2 xe_point_size_min_max; // Offset: 160 Size: 8 [unused] +// float2 xe_point_screen_to_ndc; // Offset: 168 Size: 8 [unused] +// uint xe_interpolator_sampling_pattern;// Offset: 176 Size: 4 [unused] +// uint xe_ps_param_gen; // Offset: 180 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 184 Size: 8 [unused] +// uint4 xe_texture_swizzled_signs[2];// Offset: 192 Size: 32 [unused] +// uint xe_textures_resolved; // Offset: 224 Size: 4 [unused] +// float xe_alpha_test_reference; // Offset: 228 Size: 4 [unused] +// uint xe_alpha_to_mask; // Offset: 232 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 236 Size: 4 [unused] +// float4 xe_color_exp_bias; // Offset: 240 Size: 16 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_system_cbuffer cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_VertexID 0 x 0 VERTID uint x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// XEVERTEXID 0 x 0 NONE float x +// +vs_5_1 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_2x_cs.h new file mode 100644 index 000000000..921d465fc --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_2x_cs.h @@ -0,0 +1,1519 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(4) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(4) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +iadd r3.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r1.z, r0.z, r0.y +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r1.w, r1.z, l(1) +ld r3.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(8) +else + iadd r0.w, r0.x, l(4) +endif +ld r3.xyzw, r0.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw +iadd r3.xyz, r0.wwww, l(1, 2, 3, 0) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r4.xyzw +iadd r0.x, r0.z, r2.y +ld r2.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.y, r0.x, l(1) +ld r2.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw +ret +// Approximately 196 instruction slots used +#endif + +const BYTE texture_load_128bpb_2x_cs[] = +{ + 68, 88, 66, 67, 155, 191, + 34, 65, 243, 172, 150, 85, + 9, 84, 222, 18, 28, 35, + 244, 91, 1, 0, 0, 0, + 172, 29, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 16, 29, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 208, 24, + 0, 0, 81, 0, 5, 0, + 52, 6, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 156, 8, + 0, 7, 70, 238, 49, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 68, 68, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 2, + 114, 0, 2, 0, 104, 0, + 0, 2, 7, 0, 0, 0, + 155, 0, 0, 4, 16, 0, + 0, 0, 32, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 54, 0, + 0, 4, 98, 0, 16, 0, + 0, 0, 0, 0, 86, 6, + 2, 0, 80, 0, 0, 9, + 114, 0, 16, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_3x_cs.h new file mode 100644 index 000000000..842521c2a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_128bpb_3x_cs.h @@ -0,0 +1,2363 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(4) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(4) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw +iadd r2.xyzw, r0.yyyy, l(1, 2, 3, 4) +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +iadd r1.z, r0.z, r0.y +ld r4.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r2.xy, r1.zzzz, l(1, 2, 0, 0) +ld r3.xyzw, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +iadd r1.z, r0.z, r1.z +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r2.xy, r1.zzzz, l(1, 2, 0, 0) +ld r4.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +ld r3.xyzw, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(18) +else + iadd r0.w, r0.x, l(9) +endif +ld r3.xyzw, r0.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw +iadd r0.x, r0.y, l(5) +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +iadd r0.x, r0.z, r2.z +ld r2.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r1.zw, r0.xxxx, l(0, 0, 1, 2) +ld r2.xyzw, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r0.x, r0.z, r0.x +ld r3.xyzw, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +ld r3.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +ld r2.xyzw, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw +ret +// Approximately 335 instruction slots used +#endif + +const BYTE texture_load_128bpb_3x_cs[] = +{ + 68, 88, 66, 67, 50, 53, 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+1,978 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(4) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r0.x, l(12), l(0), r2.z, r2.x + and r1.y, r2.w, l(1792) + iadd r0.x, r0.x, r1.y + and r1.y, r2.y, l(2) + iadd r1.y, r1.z, r1.y + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r0.x, r0.x, r1.y + bfi r1.x, l(6), l(0), r1.w, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.yyyy, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r0.y, r0.z, l(1) +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r1.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif 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xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r3.zw, r5.xxxz + mov r2.zw, r5.yyyw +else + mov r3.zw, r4.xxxz + mov r2.zw, r4.yyyw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.y, r0.z, r0.y +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r1.zzzz, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r5.xyzw, r1.wwww, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r1.yzw, r0.zzzz, r2.xxyz +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(16) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r5.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +else + mov r4.zw, r0.xxxz + mov r3.zw, r0.yyyw +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r4.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +ret +// Approximately 188 instruction slots used +#endif + +const BYTE texture_load_16bpb_2x_cs[] = +{ + 68, 88, 66, 67, 238, 61, + 62, 76, 211, 213, 166, 8, + 179, 28, 136, 32, 129, 203, + 164, 11, 1, 0, 0, 0, + 76, 26, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 176, 25, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 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+ 0, 0, 0, 0, 54, 0, + 0, 0, 39, 0, 0, 0, + 13, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 25, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_3x_cs.h new file mode 100644 index 000000000..f1ab8e4a2 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_3x_cs.h @@ -0,0 +1,3546 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r1.yz, r0.xxxx, T0[0].zyxw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.zyzz, l(8, 8, 0, 0) + ushr r2.zw, r1.zzzy, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.wwzw, r2.yyxy + mov r2.x, r1.z +else + mov r2.x, r1.z +endif +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r3.xxxx, T0[0].zwxy +if_nz r1.x + ishl r2.zw, r1.zzzw, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r1.zwzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.zw, r2.zzzw, r4.xxxy +endif +ld r2.zw, r3.yyyy, T0[0].zwyx +if_nz r1.x + ishl r3.xy, r2.wzww, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r2.wzww, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r3.yyyx, r4.yyyx + mov r3.x, r2.w +else + mov r3.x, r2.w +endif +ld r3.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r3.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r3.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.yz, r4.zzwz, r4.xxyx +endif +ld r4.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.zw, r4.xxxy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r4.zwzz, r5.xyxx + mov r2.w, r4.y +else + mov r2.w, r4.y +endif +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r4.zw, r5.xxxx, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r4.zwzz, l(8, 8, 0, 0) + ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r6.zzzw, r6.xxxy +endif +ld r5.xy, r5.yyyy, T0[0].yxzw +if_nz r1.x + ishl r6.xy, r5.yxyy, l(8, 8, 0, 0) + ushr r6.zw, r5.yyyx, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r6.wzww, r6.yxyy + mov r4.y, r5.y +else + mov r4.y, r5.y +endif +ld r5.yz, r5.zzzz, T0[0].zyxw +if_nz r1.x + ishl r6.xy, r5.zyzz, l(8, 8, 0, 0) + ushr r6.zw, r5.zzzy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.yz, r6.wwzw, r6.yyxy + mov r6.y, r5.z +else + mov r6.y, r5.z +endif +ld r5.zw, r5.wwww, T0[0].zwxy +if_nz r1.x + ishl r6.zw, r5.zzzw, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r5.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.zw, r6.zzzw, r7.xxxy +endif +bfi r2.y, l(16), l(0), r1.y, r3.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyxx +iadd r7.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r7.xxxx, r2.zwzz +bfi r6.x, l(16), l(0), r4.z, r5.x +store_uav_typed U0[0].xyzw, r7.yyyy, r6.xyxx +iadd r2.x, r0.z, r0.y +ushr r1.y, r1.y, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.y, r1.z, l(16) +bfi r6.y, l(16), l(16), r3.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r6.xyzw +iadd r2.yz, r2.xxxx, l(0, 1, 2, 0) +ushr r1.y, r3.y, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.yyyy +ushr r1.y, r4.z, l(16) +bfi r6.y, l(16), l(16), r4.w, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +ushr r1.y, r4.w, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.yyyy, r1.yyyy +ushr r1.y, r5.y, l(16) +bfi r6.y, l(16), l(16), r5.z, r1.y +store_uav_typed U0[0].xyzw, r2.zzzz, r6.xyzw +iadd r1.y, r0.z, r2.x +bfi r1.z, l(16), l(0), r3.x, r3.z +store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyxx +bfi r5.z, l(16), l(0), r5.x, r5.z +store_uav_typed U0[0].xyzw, r1.wwww, r5.zwzz +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zyxw +if_nz r1.x + ishl r3.xy, r1.zyzz, l(8, 8, 0, 0) + ushr r3.zw, r1.zzzy, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.wwzw, r3.yyxy + mov r3.x, r1.z +else + mov r3.x, r1.z +endif +ld r1.zw, r2.yyyy, T0[0].zwxy +if_nz r1.x + ishl r2.xy, r1.zwzz, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.zw, r1.zzzw, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r1.zw, r2.xxxy, r3.zzzw +endif +ld r2.xy, r2.zzzz, T0[0].yxzw +if_nz r1.x + ishl r3.zw, r2.yyyx, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r2.yxyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r3.wzww, r4.yxyy + mov r2.xz, r2.xxyx +else + mov r2.xz, r2.xxyx +endif +ld r3.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.xy, r3.zwzz, l(8, 8, 0, 0) + ushr r4.zw, r3.zzzw, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.zw, r4.zzzw, r4.xxxy +endif +iadd r4.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r5.xy, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.xy, r5.zwzz, r6.xyxx + mov r2.y, r5.y +else + mov r2.y, r5.y +endif +ld r4.xy, r4.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.zw, r4.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r4.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r5.zwzz, r6.xyxx +endif +ld r5.zw, r4.zzzz, T0[0].zwyx +if_nz r1.x + ishl r6.xy, r5.wzww, l(8, 8, 0, 0) + ushr r6.zw, r5.wwwz, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.zw, r6.wwwz, r6.yyyx + mov r5.yz, r5.wwzw +else + mov r5.yz, r5.wwzw +endif +iadd r2.w, r0.x, l(17) +ld r4.zw, r4.wwww, T0[0].zwyx +if_nz r1.x + ishl r6.xy, r4.wzww, l(8, 8, 0, 0) + ushr r6.zw, r4.wwwz, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r6.wwwz, r6.yyyx + mov r6.y, r4.w +else + mov r6.y, r4.w +endif +ld r6.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r6.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r8.xy, r6.zwzz, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.zw, r7.xxxy, r8.xxxy +endif +bfi r3.y, l(16), l(0), r1.y, r2.z +store_uav_typed U0[0].xyzw, r7.zzzz, r3.xyxx +store_uav_typed U0[0].xyzw, r7.wwww, r2.xyxx +iadd r8.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r6.x, l(16), l(0), r4.x, r5.z +store_uav_typed U0[0].xyzw, r8.xxxx, r6.xyxx +iadd r2.x, r0.z, r7.z +ushr r1.y, r1.y, l(16) +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.y, r1.z, l(16) +bfi r7.y, l(16), l(16), r3.z, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r7.xyzw +iadd r2.yw, r2.xxxx, l(0, 1, 0, 2) +ushr r1.y, r3.z, l(16) +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.wwww, r1.yyyy +ushr r1.y, r4.x, l(16) +bfi r7.y, l(16), l(16), r4.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r7.xyzw +ushr r1.y, r4.y, l(16) +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.zzzz, r1.yyyy +ushr r1.y, r4.z, l(16) +bfi r7.y, l(16), l(16), r6.z, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r7.xyzw +iadd r1.y, r0.z, r2.x +bfi r1.z, l(16), l(0), r2.z, r3.w +store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyxx +bfi r6.z, l(16), l(0), r5.z, r6.z +store_uav_typed U0[0].xyzw, r1.wwww, r6.zwzz +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zyxw +if_nz r1.x + ishl r2.xy, r1.zyzz, l(8, 8, 0, 0) + ushr r2.zw, r1.zzzy, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.wwzw, r2.yyxy + mov r2.x, r1.z +else + mov r2.x, r1.z +endif +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.zw, r3.xxxx, T0[0].zwxy +if_nz r1.x + ishl r2.zw, r1.zzzw, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r1.zwzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.zw, r2.zzzw, r4.xxxy +endif +ld r2.zw, r3.yyyy, T0[0].zwyx +if_nz r1.x + ishl r3.xy, r2.wzww, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r2.wzww, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r3.yyyx, r4.yyyx + mov r0.x, r2.w +else + mov r0.x, r2.w +endif +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r3.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r4.zwzz, r4.xyxx +endif +ld r3.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.xy, r3.zwzz, l(8, 8, 0, 0) + ushr r4.zw, r3.zzzw, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.zw, r4.zzzw, r4.xxxy + mov r2.w, r3.w +else + mov r2.w, r3.w +endif +iadd r4.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r5.xy, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.xy, r5.zwzz, r6.xyxx +endif +ld r4.xy, r4.yyyy, T0[0].yxzw +if_nz r1.x + ishl r5.zw, r4.yyyx, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r4.yxyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r5.wzww, r6.yxyy + mov r3.w, r4.y +else + mov r3.w, r4.y +endif +ld r4.yz, r4.zzzz, T0[0].zyxw +if_nz r1.x + ishl r5.zw, r4.zzzy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r4.zyzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.yz, r5.wwzw, r6.yyxy + mov r6.y, r4.z +else + mov r6.y, r4.z +endif +ld r4.zw, r4.wwww, T0[0].zwxy +if_nz r1.x + ishl r5.zw, r4.zzzw, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r5.zzzw, r6.zzzw +endif +bfi r2.y, l(16), l(0), r1.y, r0.x +store_uav_typed U0[0].xyzw, r8.yyyy, r2.xyxx +store_uav_typed U0[0].xyzw, r8.zzzz, r2.zwzz +bfi r6.x, l(16), l(0), r5.x, r4.x +store_uav_typed U0[0].xyzw, r8.wwww, r6.xyxx +iadd r2.x, r0.z, r8.y +ushr r1.y, r1.y, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.y, r1.z, l(16) +bfi r6.y, l(16), l(16), r3.x, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r6.xyzw +iadd r2.yz, r2.xxxx, l(0, 1, 2, 0) +ushr r1.y, r3.x, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r1.yyyy +ushr r1.y, r5.x, l(16) +bfi r6.y, l(16), l(16), r5.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +ushr r1.y, r5.y, l(16) +bfi r5.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.yyyy, r1.yyyy +ushr r1.y, r4.y, l(16) +bfi r5.y, l(16), l(16), r4.z, r1.y +store_uav_typed U0[0].xyzw, r2.zzzz, r5.xyzw +iadd r1.y, r0.z, r2.x +bfi r1.z, l(16), l(0), r0.x, r3.y +store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +store_uav_typed U0[0].xyzw, r1.zzzz, r3.zwzz +bfi r4.z, l(16), l(0), r4.x, r4.z +store_uav_typed U0[0].xyzw, r1.wwww, r4.zwzz +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].yxzw +if_nz r1.x + ishl r3.zw, r3.yyyx, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.yxyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.wzww, r4.yxyy + mov r4.x, r3.y +else + mov r4.x, r3.y +endif +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r3.yz, r2.xxyx, l(0, 8, 8, 0) + and r3.yz, r3.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r3.yzyy, r4.zwzz +endif +ld r3.yz, r2.zzzz, T0[0].zyxw +if_nz r1.x + ishl r4.zw, r3.zzzy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r3.zyzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.yz, r4.wwzw, r5.yyxy + mov r0.x, r3.z +else + mov r0.x, r3.z +endif +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.zw, r2.zzzw, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r2.zwzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r4.zzzw, r5.xxxy +endif +iadd r5.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r4.zw, r5.xxxx, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r4.zwzz, l(8, 8, 0, 0) + ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r6.zzzw, r6.xxxy + mov r3.z, r4.w +else + mov r3.z, r4.w +endif +ld r5.xy, r5.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r5.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r5.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r6.zwzz, r6.xyxx +endif +ld r6.xy, r5.zzzz, T0[0].yxzw +if_nz r1.x + ishl r6.zw, r6.yyyx, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.yxyy, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.wzww, r7.yxyy + mov r4.w, r6.y +else + mov r4.w, r6.y +endif +iadd r0.w, r0.w, l(17) +ld r5.zw, r5.wwww, T0[0].zwyx +if_nz r1.x + ishl r6.yz, r5.wwzw, l(0, 8, 8, 0) + and r6.yz, r6.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r7.xy, r5.wzww, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.zw, r6.zzzy, r7.yyyx + mov r7.y, r5.w +else + mov r7.y, r5.w +endif +ld r6.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r7.zw, r6.yyyz, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r6.yzyy, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.yz, r7.zzwz, r8.xxyx +endif +bfi r4.y, l(16), l(0), r3.x, r0.x +store_uav_typed U0[0].xyzw, r1.yyyy, r4.xyxx +store_uav_typed U0[0].xyzw, r1.zzzz, r3.yzyy +bfi r7.x, l(16), l(0), r5.x, r6.x +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.y, r0.z, r1.y +ushr r0.w, r3.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.xxxx, r0.wwww +ushr r0.w, r2.x, l(16) +bfi r1.y, l(16), l(16), r2.z, r0.w +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +ushr r0.w, r2.z, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.wwww, r0.wwww +ushr r0.w, r5.x, l(16) +bfi r3.y, l(16), l(16), r5.y, r0.w +store_uav_typed U0[0].xyzw, r1.xxxx, r3.xyzw +ushr r0.w, r5.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.zzzz, r0.wwww +ushr r0.w, r5.z, l(16) +bfi r3.y, l(16), l(16), r6.y, r0.w +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +iadd r0.y, r0.z, r0.y +bfi r2.x, l(16), l(0), r0.x, r2.w +store_uav_typed U0[0].xyzw, r0.yyyy, r2.yxyy +iadd r0.xz, r0.yyyy, l(1, 0, 2, 0) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.zwzz +bfi r6.y, l(16), l(0), r6.x, r6.y +store_uav_typed U0[0].xyzw, r0.zzzz, r6.yzyy +ret +// Approximately 544 instruction slots used +#endif + +const BYTE texture_load_16bpb_3x_cs[] = +{ + 68, 88, 66, 67, 94, 14, + 24, 249, 170, 225, 126, 61, + 48, 243, 218, 169, 113, 89, + 164, 160, 1, 0, 0, 0, + 4, 69, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 104, 68, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 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0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 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+ 0, 0, 0, 0, 0, 0, + 36, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 43, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 36, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_cs.h new file mode 100644 index 000000000..87c5d2f7a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_16bpb_cs.h @@ -0,0 +1,868 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(1) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r0.x, r0.x, l(3) + iadd r0.x, r0.x, r1.z + bfi r0.x, l(2), l(6), r0.x, l(0) + iadd r0.x, r1.y, r0.x + bfi r1.x, l(6), l(0), r2.x, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r0.y, r0.y, l(1) +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r1.x, r0.z, l(1) +movc r0.w, r0.w, l(4), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].xyzw +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw +ret +// Approximately 91 instruction slots used +#endif + +const BYTE texture_load_16bpb_cs[] = +{ + 68, 88, 66, 67, 247, 217, + 176, 37, 205, 80, 127, 111, + 60, 154, 74, 132, 62, 134, + 109, 114, 1, 0, 0, 0, + 220, 16, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 64, 16, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 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// Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(2) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].zwxy +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r4.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r5.xyzw, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw + mov r3.zw, r6.xxxy + mov r2.zw, r6.zzzw +else + mov r3.zw, r5.xxxy + mov r2.zw, r5.zzzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r4.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +ld r4.xyzw, r4.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + mov r5.zw, r6.xxxy + mov r3.zw, r6.zzzw +else + mov r5.zw, r4.xxxy + mov r3.zw, r4.zzzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw +iadd r4.xyz, r0.zzzz, r2.xyzx +store_uav_typed U0[0].xyzw, r4.xxxx, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(8) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r6.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r1.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw + mov r5.zw, r7.xxxy + mov r3.zw, r7.zzzw +else + mov r5.zw, r6.xxxy + mov r3.zw, r6.zzzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw +store_uav_typed U0[0].xyzw, r4.yyyy, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r0.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw + mov r5.zw, r1.xxxy + mov r3.zw, r1.zzzw +else + mov r5.zw, r0.xxxy + mov r3.zw, r0.zzzw +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r5.xyzw +store_uav_typed U0[0].xyzw, r4.zzzz, r3.xyzw +ret +// Approximately 223 instruction slots used +#endif + +const BYTE texture_load_32bpb_2x_cs[] = +{ + 68, 88, 66, 67, 9, 35, + 39, 137, 230, 42, 191, 32, + 53, 106, 111, 202, 62, 38, + 191, 79, 1, 0, 0, 0, + 228, 30, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 72, 30, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 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0, 0, 5, + 194, 0, 16, 0, 5, 0, + 0, 0, 6, 4, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 194, 0, 16, 0, + 3, 0, 0, 0, 166, 14, + 16, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 166, 10, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 5, 0, 0, 0, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 166, 10, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 223, 0, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 54, 0, + 0, 0, 48, 0, 0, 0, + 13, 0, 0, 0, 20, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 25, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_3x_cs.h new file mode 100644 index 000000000..4ff0b884b --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_3x_cs.h @@ -0,0 +1,1404 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(2) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx +ld r4.xy, r2.yyyy, T0[0].xyzw +ld r4.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw + mov r1.x, r4.x +else + mov r1.x, r4.x +endif +iadd r0.w, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.wxww +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz +ld r2.xy, r2.wwww, T0[0].xyzw +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r2.zw, r5.xxxx, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw + mov r1.x, r2.y +else + mov r1.x, r2.y +endif +iadd r1.yw, r0.yyyy, l(0, 1, 0, 2) +store_uav_typed U0[0].xyzw, r1.yyyy, r1.zxzz +store_uav_typed U0[0].xyzw, r1.wwww, r2.zwzz +ld r1.xy, r5.yyyy, T0[0].xyzw +ld r1.zw, r5.zzzz, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw + mov r4.x, r1.x + mov r2.y, r1.w +else + mov r4.x, r1.x + mov r2.y, r1.w +endif +iadd r0.xy, r0.wwww, l(1, 2, 0, 0) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yxyy +store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy +iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyxx +ld r0.xw, r5.wwww, T0[0].xzwy +if_nz r3.x + ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r1.zzzw, r1.xxxy +endif +if_nz r3.y + ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) + bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r0.xwxx +ret +// Approximately 177 instruction slots used +#endif + +const BYTE texture_load_32bpb_3x_cs[] = +{ + 68, 88, 66, 67, 153, 51, + 255, 237, 243, 30, 14, 21, + 157, 119, 205, 255, 243, 84, + 59, 44, 1, 0, 0, 0, + 108, 27, 0, 0, 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000000000..5e14d53b6 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_32bpb_cs.h @@ -0,0 +1,951 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.x, r0.x, l(2) +imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.y, CB0[0][2].x, r0.x +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r0.w, r0.y, l(1) +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r1.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_2x_cs.h new file mode 100644 index 000000000..12bc279b0 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_2x_cs.h @@ -0,0 +1,1510 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(3) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw +iadd r1.z, r0.z, r0.y +iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +iadd r3.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r4.xyzw, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyzw +iadd r2.xyw, r0.zzzz, r3.xyxz +ld r4.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(8) +else + iadd r0.y, r0.x, l(4) +endif +ld r4.xyzw, r0.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyzw +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r4.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +ld r4.xyzw, r0.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r0.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) + bfi r0.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r2.wwww, r0.xyzw +ret +// Approximately 194 instruction slots used +#endif + +const BYTE texture_load_64bpb_2x_cs[] = +{ + 68, 88, 66, 67, 135, 207, + 204, 216, 203, 68, 215, 183, + 51, 247, 49, 251, 90, 95, + 83, 247, 1, 0, 0, 0, + 128, 29, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 228, 28, 0, 0, 82, 68, + 69, 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0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 85, 0, 0, 10, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 21, 0, 0, 1, + 31, 0, 4, 3, 26, 0, + 16, 0, 1, 0, 0, 0, + 85, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 140, 0, + 0, 17, 242, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 21, 0, 0, 1, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 194, 0, 0, 0, 7, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 54, 0, 0, 0, + 48, 0, 0, 0, 5, 0, + 0, 0, 20, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_3x_cs.h new file mode 100644 index 000000000..b20500670 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_3x_cs.h @@ -0,0 +1,3775 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 6 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r1.yz, r0.xxxx, T0[0].zxyw +ieq r2.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xw, r2.yyyz, r2.xxxy +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy +iadd r2.xyzw, r0.yyyy, l(1, 2, 3, 4) +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +if_nz r1.w + ushr r4.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r4.xxyx +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r1.yzyy +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r4.xxyx +endif +if_nz r1.w + ushr r3.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r3.xxyx +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r1.yzyy +iadd r1.y, r0.z, r0.y +ld r2.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r2.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r3.xyxx, r4.xyxx +endif +if_nz r1.w + ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx +iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +if_nz r1.w + ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) + bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyxx +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r4.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.zw, r4.xxxy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r4.zwzz, r5.xyxx +endif +if_nz r1.w + ushr r4.zw, r4.xxxy, l(0, 0, 16, 16) + bfi r4.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r4.xyxx, r4.zwzz +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyxx +iadd r1.y, r0.z, r1.y +ld r2.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r2.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r3.xyxx, r4.xyxx +endif +if_nz r1.w + ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx +iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r3.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r4.zwzz, r4.xyxx +endif +if_nz r1.w + ushr r4.xy, r3.xyxx, l(16, 16, 0, 0) + bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r4.xyxx +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyxx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +if_nz r1.w + ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) + bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyxx +iadd r3.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r4.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r1.yzyy +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r3.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r2.wwww, r1.yzyy +iadd r4.xyzw, r0.yyyy, l(5, 6, 7, 8) +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r3.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r1.yzyy +iadd r1.y, r0.z, r2.z +ld r2.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r3.xyxx +endif +if_nz r1.w + ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx +iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) +iadd r3.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r2.zw, r3.xxxx, T0[0].zwxy +if_nz r1.x + ishl r5.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r5.zw, r2.zzzw, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r5.zzzw, r5.xxxy +endif +if_nz r1.w + ushr r5.xy, r2.zwzz, l(16, 16, 0, 0) + bfi r2.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r2.zzzw, r5.xxxy +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r2.zwzz +ld r2.xz, r3.yyyy, T0[0].xzyw +if_nz r1.x + ishl r3.xy, r2.xzxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r2.xzxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xz, r3.xxyx, r5.xxyx +endif +if_nz r1.w + ushr r3.xy, r2.xzxx, l(16, 16, 0, 0) + bfi r2.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r2.xxzx, r3.xxyx +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r2.xzxx +iadd r1.y, r0.z, r1.y +ld r2.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r3.xyxx +endif +if_nz r1.w + ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx +iadd r2.xy, r1.yyyy, l(1, 2, 0, 0) +iadd r1.z, r0.x, l(17) +ld r2.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r3.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r3.zw, r2.zzzw, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r3.zzzw, r3.xxxy +endif +if_nz r1.w + ushr r3.xy, r2.zwzz, l(16, 16, 0, 0) + bfi r2.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r2.zzzw, r3.xxxy +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r2.zwzz +ld r2.xz, r1.zzzz, T0[0].xzyw +if_nz r1.x + ishl r3.xy, r2.xzxx, l(8, 8, 0, 0) + ushr r3.zw, r2.xxxz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xz, r3.zzwz, r3.xxyx +endif +if_nz r1.w + ushr r3.xy, r2.xzxx, l(16, 16, 0, 0) + bfi r2.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r2.xxzx, r3.xxyx +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r2.xzxx +if_nz r0.w + iadd r0.w, r0.x, l(36) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r1.yzyy +iadd r2.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.yz, r2.xxxx, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.zzwz, r3.xxyx +endif +if_nz r1.w + ushr r3.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r3.xxyx +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r1.yzyy +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r3.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r4.wwww, r1.yzyy +iadd r0.x, r0.z, r4.y +ld r1.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r3.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r3.xyxx +endif +if_nz r1.w + ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx +iadd r2.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +if_nz r1.w + ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) + bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyxx +iadd r0.x, r0.z, r0.x +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r3.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +ld r2.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r3.zw, r2.xxxy, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r3.zwzz, r3.xyxx +endif +if_nz r1.w + ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyxx +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r3.xy, r2.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r3.xyxx +endif +if_nz r1.w + ushr r2.zw, r2.xxxy, l(0, 0, 16, 16) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r2.zwzz +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyxx +iadd r2.xyz, r0.yyyy, l(9, 10, 11, 0) +iadd r3.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +if_nz r1.w + ushr r4.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r4.xxyx +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r1.yzyy +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r4.xxyx +endif +if_nz r1.w + ushr r3.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r3.xxyx +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r1.yzyy +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.yw, r1.yyyz, l(0, 8, 0, 8) + and r2.yw, r2.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.yywy, r3.xxyx +endif +if_nz r1.w + ushr r2.yw, r1.yyyz, l(0, 16, 0, 16) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.yywy +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r1.yzyy +iadd r0.x, r0.z, r2.x +ld r1.yz, r3.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +iadd r2.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +if_nz r1.w + ushr r3.zw, r3.xxxy, l(0, 0, 16, 16) + bfi r3.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r3.xyxx, r3.zwzz +endif +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyxx +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r3.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r3.zw, r2.xxxy, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r3.zwzz, r3.xyxx +endif +if_nz r1.w + ushr r3.xy, r2.xyxx, l(16, 16, 0, 0) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyxx +iadd r0.x, r0.z, r0.x +ld r0.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r1.yz, r0.yyzy, l(0, 8, 8, 0) + and r1.yz, r1.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r2.xy, r0.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yz, r1.yyzy, r2.xxyx +endif +if_nz r1.w + ushr r1.yz, r0.yyzy, l(0, 16, 16, 0) + bfi r0.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r0.yyzy, r1.yyzy +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r0.yzyy +iadd r0.yzw, r0.xxxw, l(0, 1, 2, 17) +ld r1.yz, r2.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +if_nz r1.w + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy +ld r0.yw, r0.wwww, T0[0].zxwy +if_nz r1.x + ishl r1.xy, r0.ywyy, l(8, 8, 0, 0) + and r1.xy, r1.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r2.xy, r0.ywyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yw, r1.xxxy, r2.xxxy +endif +if_nz r1.w + ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r0.ywyy +ret +// Approximately 570 instruction slots used +#endif + +const BYTE texture_load_64bpb_3x_cs[] = +{ + 68, 88, 66, 67, 41, 237, + 3, 14, 236, 254, 154, 57, + 120, 21, 103, 174, 60, 99, + 29, 137, 1, 0, 0, 0, + 196, 73, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 40, 73, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 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0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 36, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_cs.h new file mode 100644 index 000000000..9efe365df --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_64bpb_cs.h @@ -0,0 +1,980 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(3) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r0.x, l(12), l(0), r2.z, r2.x + and r1.y, r2.w, l(1792) + iadd r0.x, r0.x, r1.y + and r1.y, r2.y, l(2) + iadd r1.y, r1.z, r1.y + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r0.x, r0.x, r1.y + bfi r1.x, l(6), l(0), r1.w, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.yyyy, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r0.y, r0.z, l(1) +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r1.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +ret +// Approximately 105 instruction slots used +#endif + +const BYTE texture_load_64bpb_cs[] = +{ + 68, 88, 66, 67, 140, 30, + 121, 64, 44, 14, 146, 109, + 162, 186, 228, 197, 135, 190, + 7, 146, 1, 0, 0, 0, + 40, 19, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 140, 18, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_2x_cs.h new file mode 100644 index 000000000..7bc90b4fc --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_2x_cs.h @@ -0,0 +1,985 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 4 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(8) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.z, r1.y, l(1) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.wwww, l(0, 0, 16, 8) + bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.zzzz, l(2, 0, 16, 0), r2.xxyx + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), vThreadID.zzzz, r1.xxzx + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(1, 0, 1, 0), l(4, 0, 7, 0), vThreadID.yyyy, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + ishl r2.xy, vThreadID.yyyy, l(2, 7, 0, 0) + ishl r1.z, r2.x, l(1) + and r1.z, r1.z, l(96) + bfi r2.z, l(25), l(7), r1.y, r1.z + and r2.xy, r2.xyxx, l(8, 2048, 0, 0) + iadd r2.z, r2.z, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r1.yz, l(0, 25, 25, 0), l(0, 10, 9, 0), r1.yyyy, r3.xxyx + imad r1.yz, r2.xxxx, l(0, 8, 4, 0), r1.yyzy + bfi r1.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), vThreadID.yyyy, r1.yyzy + bfi r1.y, l(12), l(0), r2.y, r1.y + and r1.z, r1.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.z, r1.y + endif +else + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +iadd r2.x, r0.x, l(1) +ld r2.xyzw, r2.xxxx, T0[0].ywxz +mov r3.xy, r1.ywyy +mov r3.zw, r2.xxxy +mov r2.xy, r1.xzxx +bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r1.x, r0.z, r0.y +ushr r2.xyzw, r2.xyzw, l(16, 16, 16, 16) +bfi r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw +movc r0.w, r0.w, l(16), l(2) +iadd r0.x, r0.w, r0.x +ld r1.xyzw, r0.xxxx, T0[0].xyzw +iadd r0.xy, r0.xyxx, l(1, 1, 0, 0) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +mov r3.xy, r1.ywyy +mov r3.zw, r2.xxxy +mov r2.xy, r1.xzxx +bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r0.x, r0.z, r0.y +ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) +bfi r1.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r1.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ret +// Approximately 104 instruction slots used +#endif + +const BYTE texture_load_8bpb_2x_cs[] = +{ + 68, 88, 66, 67, 238, 242, + 98, 170, 134, 172, 114, 145, + 94, 121, 60, 248, 181, 154, + 196, 139, 1, 0, 0, 0, + 76, 19, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 176, 18, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 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b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_3x_cs.h @@ -0,0 +1,1877 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(8) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.z, r1.y, l(1) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.wwww, l(0, 0, 16, 8) + bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.zzzz, l(2, 0, 16, 0), r2.xxyx + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), vThreadID.zzzz, r1.xxzx + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(1, 0, 1, 0), l(4, 0, 7, 0), vThreadID.yyyy, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + ishl r2.xy, vThreadID.yyyy, l(2, 7, 0, 0) + ishl r1.z, r2.x, l(1) + and r1.z, r1.z, l(96) + bfi r2.z, l(25), l(7), r1.y, r1.z + and r2.xy, r2.xyxx, l(8, 2048, 0, 0) + iadd r2.z, r2.z, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r1.yz, l(0, 25, 25, 0), l(0, 10, 9, 0), r1.yyyy, r3.xxyx + imad r1.yz, r2.xxxx, l(0, 8, 4, 0), r1.yyzy + bfi r1.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), vThreadID.yyyy, r1.yyzy + bfi r1.y, l(12), l(0), r2.y, r1.y + and r1.z, r1.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.z, r1.y + endif +else + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ld r2.xy, r2.yyyy, T0[0].xyzw +ld r3.xy, r2.zzzz, T0[0].xyzw +ld r2.zw, r2.wwww, T0[0].zwxy +iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r3.zw, r4.xxxx, T0[0].zwxy +ld r4.xy, r4.yyyy, T0[0].xyzw +ld r5.xy, r4.zzzz, T0[0].xyzw +ld r4.zw, r4.wwww, T0[0].zwxy +ushr r5.zw, r1.zzzz, l(0, 0, 8, 16) +bfi r6.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r5.zzzz, r1.xxxx +bfi r6.y, l(16), l(0), r5.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw +iadd r6.xyzw, r0.yyyy, l(1, 2, 3, 4) +ushr r5.zw, r3.xxxy, l(0, 0, 24, 16) +bfi r5.z, l(24), l(8), r5.z, r2.y +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r5.zzzz +ushr r8.xyz, r3.wwzw, l(8, 16, 16, 0) +bfi r7.y, l(8), l(24), r8.x, r2.w +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +bfi r7.xzw, l(16, 0, 16, 16), l(0, 0, 0, 0), r8.yyyy, r4.yyyy +ushr r8.xyw, r5.yxyx, l(24, 8, 0, 24) +bfi r3.y, l(24), l(8), r8.x, r5.x +bfi r7.y, l(16), l(16), r4.z, r3.y +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +iadd r3.y, r0.z, r0.y +ushr r5.xz, r1.xxyx, l(24, 0, 16, 0) +ishl r1.x, r1.y, l(16) +ushr r1.x, r1.x, l(8) +iadd r1.x, r1.x, r5.x +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r1.wwww, r1.xxxx +ubfe r1.x, l(16), l(8), r1.w +ushr r6.xy, r2.yyyy, l(8, 24, 0, 0) +bfi r7.y, l(16), l(16), r6.x, r1.x +store_uav_typed U0[0].xyzw, r3.yyyy, r7.xyzw +iadd r1.xy, r3.yyyy, l(1, 2, 0, 0) +imad r2.y, r5.w, l(256), r6.y +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r2.zzzz, r2.yyyy +ushr r2.y, r2.w, l(24) +ishl r3.zw, r3.zzzw, l(0, 0, 16, 24) +ushr r3.zw, r3.zzzw, l(0, 0, 8, 8) +iadd r2.y, r2.y, r3.z +bfi r7.y, l(8), l(24), r4.x, r2.y +store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw +ubfe r1.x, l(16), l(8), r4.x +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r8.yyyy, r1.xxxx +ushr r1.x, r4.z, l(16) +imad r1.x, r1.x, l(256), r8.w +bfi r7.y, l(8), l(24), r4.z, r1.x +store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyzw +iadd r1.x, r0.z, r3.y +ishl r1.y, r1.z, l(24) +ushr r1.y, r1.y, l(8) +iadd r1.y, r1.y, r5.z +bfi r7.xzw, l(24, 0, 24, 24), l(0, 0, 0, 0), r1.yyyy, r1.wwww +bfi r7.y, l(16), l(16), r3.x, r2.x +store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw +iadd r1.yz, r1.xxxx, l(0, 1, 2, 0) +ubfe r1.w, l(8), l(16), r3.x +bfi r2.xzw, l(8, 0, 8, 8), l(0, 0, 0, 0), r1.wwww, r2.zzzz +iadd r1.w, r3.w, r8.z +bfi r2.y, l(24), l(0), r1.w, r4.x +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.yyyy, r4.yyyy +ubfe r1.y, l(8), l(16), r5.y +bfi r2.y, l(8), l(0), r1.y, r4.w +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(9) +endif +ld r1.xy, r0.wwww, T0[0].xyzw +iadd r2.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ld r2.xy, r2.yyyy, T0[0].xyzw +ld r3.xy, r2.zzzz, T0[0].xyzw +ld r2.zw, r2.wwww, T0[0].zwxy +iadd r4.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r0.xw, r4.xxxx, T0[0].xzwy +ld r3.zw, r4.yyyy, T0[0].zwxy +ld r4.xy, r4.zzzz, T0[0].xyzw +ld r4.zw, r4.wwww, T0[0].zwxy +ushr r5.xy, r1.zzzz, l(8, 16, 0, 0) +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r5.xxxx, r1.xxxx +bfi r7.y, l(16), l(0), r5.y, r2.x +store_uav_typed U0[0].xyzw, r6.zzzz, r7.xyzw +ushr r5.xy, r3.xyxx, l(24, 16, 0, 0) +bfi r5.x, l(24), l(8), r5.x, r2.y +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r5.xxxx +ushr r5.xzw, r0.wwwx, l(8, 0, 16, 16) +bfi r7.y, l(8), l(24), r5.x, r2.w +store_uav_typed U0[0].xyzw, r6.wwww, r7.xyzw +iadd r3.y, r0.y, l(5) +bfi r7.xzw, l(16, 0, 16, 16), l(0, 0, 0, 0), r5.zzzz, r3.wwww +ushr r6.xyw, r4.yxyx, l(24, 8, 0, 24) +bfi r4.x, l(24), l(8), r6.x, r4.x +bfi r7.y, l(16), l(16), r4.z, r4.x +store_uav_typed U0[0].xyzw, r3.yyyy, r7.xyzw +iadd r0.y, r0.z, r6.z +ushr r5.xz, r1.xxyx, l(24, 0, 16, 0) +ishl r1.x, r1.y, l(16) +ushr r1.x, r1.x, l(8) +iadd r1.x, r1.x, r5.x +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r1.wwww, r1.xxxx +ubfe r1.x, l(16), l(8), r1.w +ushr r6.xz, r2.yyyy, l(8, 0, 24, 0) +bfi r7.y, l(16), l(16), r6.x, r1.x +store_uav_typed U0[0].xyzw, r0.yyyy, r7.xyzw +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +imad r2.y, r5.y, l(256), r6.z +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r2.zzzz, r2.yyyy +ushr r2.y, r2.w, l(24) +ishl r0.xw, r0.xxxw, l(16, 0, 0, 24) +ushr r0.xw, r0.xxxw, l(8, 0, 0, 8) +iadd r0.x, r0.x, r2.y +bfi r7.y, l(8), l(24), r3.z, r0.x +store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw +ubfe r0.x, l(16), l(8), r3.z +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r6.yyyy, r0.xxxx +ushr r0.x, r4.z, l(16) +imad r0.x, r0.x, l(256), r6.w +bfi r7.y, l(8), l(24), r4.z, r0.x +store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyzw +iadd r0.x, r0.z, r0.y +ishl r0.y, r1.z, l(24) +ushr r0.y, r0.y, l(8) +iadd r0.yw, r0.yyyw, r5.zzzw +bfi r1.xzw, l(24, 0, 24, 24), l(0, 0, 0, 0), r0.yyyy, r1.wwww +bfi r1.y, l(16), l(16), r3.x, r2.x +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +ubfe r1.x, l(8), l(16), r3.x +bfi r1.xzw, l(8, 0, 8, 8), l(0, 0, 0, 0), r1.xxxx, r2.zzzz +bfi r1.y, l(24), l(0), r0.w, r3.z +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.yyyy, r3.wwww +ubfe r0.y, l(8), l(16), r4.y +bfi r1.y, l(8), l(0), r0.y, r4.w +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +ret +// Approximately 222 instruction slots used +#endif + +const BYTE texture_load_8bpb_3x_cs[] = +{ + 68, 88, 66, 67, 13, 205, + 120, 131, 191, 217, 83, 130, + 48, 184, 87, 137, 76, 243, + 201, 91, 1, 0, 0, 0, + 116, 37, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 216, 36, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 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0, 0, 0, 0, 166, 10, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 222, 0, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 65, 0, + 0, 0, 38, 0, 0, 0, + 5, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 18, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 18, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_cs.h new file mode 100644 index 000000000..7864b356c --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_8bpb_cs.h @@ -0,0 +1,817 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 3 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.y, CB0[0][2].x, r0.x +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.x, l(27), l(1), vThreadID.x + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(8) + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + and r1.z, r1.y, l(1) + ishr r1.w, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + and r1.xz, r1.xxxx, l(16, 0, 8, 0) + bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.xw, r1.xxxx, l(2, 0, 0, 16), r2.xxxy + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.zzzz, r1.xxwx + bfi r1.xz, l(2, 0, 2, 0), l(6, 0, 9, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.x, l(27), l(1), vThreadID.x + ishr r1.yz, vThreadID.yyyy, l(0, 5, 2, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.x, r1.y, r1.w, r1.x + ishl r1.yw, vThreadID.yyyy, l(0, 2, 0, 7) + ishl r2.x, r1.y, l(1) + and r2.x, r2.x, l(96) + bfi r2.y, l(25), l(7), r1.x, r2.x + and r1.yw, r1.yyyw, l(0, 8, 0, 2048) + iadd r2.y, r2.y, r1.y + bfi r2.y, l(1), l(4), vThreadID.y, r2.y + ishl r2.xz, r2.xxxx, l(3, 0, 2, 0) + bfi r2.xz, l(25, 0, 25, 0), l(10, 0, 9, 0), r1.xxxx, r2.xxzx + imad r1.xy, r1.yyyy, l(8, 4, 0, 0), r2.xzxx + bfi r1.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), vThreadID.yyyy, r1.xyxx + bfi r1.x, l(12), l(0), r1.w, r1.x + and r1.y, r1.y, l(1792) + iadd r1.x, r1.x, r1.y + and r1.y, r1.z, l(2) + ishr r1.z, r0.x, l(3) + iadd r1.y, r1.z, r1.y + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.y, r1.x + endif +else + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(3, 4, 0, 0) +ld r1.xy, r0.xxxx, T0[0].xyzw +movc r0.z, r0.z, l(8), l(1) +iadd r0.x, r0.z, r0.x +ld r1.zw, r0.xxxx, T0[0].zwxy +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +ret +// Approximately 80 instruction slots used +#endif + +const BYTE texture_load_8bpb_cs[] = +{ + 68, 88, 66, 67, 199, 200, + 126, 19, 169, 178, 202, 108, + 20, 156, 1, 173, 41, 100, + 193, 36, 1, 0, 0, 0, + 236, 15, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 80, 15, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 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0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_ctx1_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_ctx1_cs.h new file mode 100644 index 000000000..eab852750 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_ctx1_cs.h @@ -0,0 +1,3292 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xzyw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xzyw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xzyw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xzyw, r4.xzyw +endif +if_nz r1.y + ushr r3.xyzw, r2.xzyw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xzyw +endif +ubfe r1.zw, l(0, 0, 8, 8), l(0, 0, 8, 8), r2.xxxy +bfi r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r2.xyxx, l(0, 0, 0, 0) +iadd r1.zw, r1.zzzw, r3.xxxy +ushr r3.xy, r2.xyxx, l(24, 24, 0, 0) +and r2.xy, r2.xyxx, l(0x00ff0000, 0x00ff0000, 0, 0) +iadd r2.xy, r2.xyxx, r3.xyxx +ishl r3.xy, r2.zwzz, l(1, 1, 0, 0) +and r3.xy, r3.xyxx, l(0xaaaaaaaa, 0xaaaaaaaa, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 1, 1) +and r2.zw, r2.zzzw, l(0, 0, 0x55555555, 0x55555555) +iadd r2.zw, r2.zzzw, r3.xxxy +ushr r3.xy, r2.zwzz, l(1, 1, 0, 0) +and r3.xy, r3.xyxx, l(0x55555555, 0x55555555, 0, 0) +xor r2.zw, r2.zzzw, r3.xxxy +not r3.xy, r2.wzww +ushr r4.yzw, r3.yyyy, l(0, 4, 2, 6) +mov r4.x, r3.y +and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) +ushr r5.yzw, r2.zzzz, l(0, 4, 2, 6) +mov r5.x, r2.z +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +imul null, r5.xyzw, r2.xxxx, r5.xyzw +imad r4.xyzw, r4.xyzw, r1.zzzz, r5.xyzw +and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) +udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) +ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) +or r4.xy, r4.xyxx, r5.xyxx +ishl r5.xy, r5.zwzz, l(16, 16, 0, 0) +or r4.xy, r4.xyxx, r5.xyxx +or r4.xy, r4.zwzz, r4.xyxx +ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) +and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) +ushr r5.yzw, r2.wwww, l(0, 4, 2, 6) +mov r5.x, r2.w +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +imul null, r5.xyzw, r2.yyyy, r5.xyzw +imad r3.xyzw, r3.xyzw, r1.wwww, r5.xyzw +and r5.xyzw, r3.xyzw, l(2047, 2047, 2047, 2047) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +ushr r3.xyzw, r3.xyzw, l(16, 16, 16, 16) +udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) +ishl r3.xyzw, r3.xyzw, l(8, 8, 24, 24) +or r3.xy, r3.xyxx, r5.xyxx +ishl r5.xy, r5.zwzz, l(16, 16, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +or r4.zw, r3.zzzw, r3.xxxy +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +imad r3.x, vThreadID.y, l(4), l(1) +ilt r3.x, r3.x, CB0[0][2].y +if_nz r3.x + iadd r3.y, r0.z, r0.y + ushr r4.xy, r2.wzww, l(8, 8, 0, 0) + not r5.xy, r4.xyxx + ushr r6.yzw, r5.yyyy, l(0, 4, 2, 6) + mov r6.x, r5.y + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r7.yzw, r4.yyyy, l(0, 4, 2, 6) + mov r7.x, r4.y + and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) + imul null, r7.xyzw, r2.xxxx, r7.xyzw + imad r6.xyzw, r6.xyzw, r1.zzzz, r7.xyzw + and r7.xyzw, r6.xyzw, l(2047, 2047, 2047, 2047) + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + ushr r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(8, 8, 24, 24) + or r3.zw, r6.xxxy, r7.xxxy + ishl r6.xy, r7.zwzz, l(16, 16, 0, 0) + or r3.zw, r3.zzzw, r6.xxxy + or r6.xy, r6.zwzz, r3.zwzz + ushr r5.yzw, r5.xxxx, l(0, 4, 2, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r2.yyyy, r4.xyzw + imad r4.xyzw, r5.xyzw, r1.wwww, r4.xyzw + and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) + or r3.zw, r4.xxxy, r5.xxxy + ishl r4.xy, r5.zwzz, l(16, 16, 0, 0) + or r3.zw, r3.zzzw, r4.xxxy + or r6.zw, r4.zzzw, r3.zzzw + store_uav_typed U0[0].xyzw, r3.yyyy, r6.xyzw + imad r3.y, vThreadID.y, l(4), l(2) + ilt r3.y, r3.y, CB0[0][2].y + if_nz r3.y + ishl r3.y, r0.z, l(1) + iadd r3.y, r0.y, r3.y + ushr r4.xy, r2.wzww, l(16, 16, 0, 0) + not r5.xy, r4.xyxx + ushr r6.yzw, r5.yyyy, l(0, 4, 2, 6) + mov r6.x, r5.y + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r7.yzw, r4.yyyy, l(0, 4, 2, 6) + mov r7.x, r4.y + and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) + imul null, r7.xyzw, r2.xxxx, r7.xyzw + imad r6.xyzw, r6.xyzw, r1.zzzz, r7.xyzw + and r7.xyzw, r6.xyzw, l(2047, 2047, 2047, 2047) + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + ushr r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(8, 8, 24, 24) + or r3.zw, r6.xxxy, r7.xxxy + ishl r6.xy, r7.zwzz, l(16, 16, 0, 0) + or r3.zw, r3.zzzw, r6.xxxy + or r6.xy, r6.zwzz, r3.zwzz + ushr r5.yzw, r5.xxxx, l(0, 4, 2, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r2.yyyy, r4.xyzw + imad r4.xyzw, r5.xyzw, r1.wwww, r4.xyzw + and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) + or r3.zw, r4.xxxy, r5.xxxy + ishl r4.xy, r5.zwzz, l(16, 16, 0, 0) + or r3.zw, r3.zzzw, r4.xxxy + or r6.zw, r4.zzzw, r3.zzzw + store_uav_typed U0[0].xyzw, r3.yyyy, r6.xyzw + imad r3.y, vThreadID.y, l(4), l(3) + ilt r3.y, r3.y, CB0[0][2].y + if_nz r3.y + imad r3.y, l(3), r0.z, r0.y + ushr r4.xy, r2.wzww, l(24, 24, 0, 0) + not r5.xy, r4.xyxx + ushr r6.yzw, r5.yyyy, l(0, 4, 2, 6) + mov r6.x, r5.y + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r7.yzw, r4.yyyy, l(0, 4, 2, 6) + mov r7.x, r4.y + and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) + imul null, r7.xyzw, r2.xxxx, r7.xyzw + imad r6.xyzw, r6.xyzw, r1.zzzz, r7.xyzw + and r7.xyzw, r6.xyzw, l(2047, 2047, 2047, 2047) + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + ushr r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(8, 8, 24, 24) + or r2.xz, r6.xxyx, r7.xxyx + ishl r3.zw, r7.zzzw, l(0, 0, 16, 16) + or r2.xz, r2.xxzx, r3.zzwz + or r6.xy, r6.zwzz, r2.xzxx + ushr r5.yzw, r5.xxxx, l(0, 4, 2, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r2.xyzw, r2.yyyy, r4.xyzw + imad r2.xyzw, r5.xyzw, r1.wwww, r2.xyzw + and r4.xyzw, r2.xyzw, l(2047, 2047, 2047, 2047) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ushr r2.xyzw, r2.xyzw, l(16, 16, 16, 16) + udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) + ishl r2.xyzw, r2.xyzw, l(8, 8, 24, 24) + or r1.zw, r2.xxxy, r4.xxxy + ishl r2.xy, r4.zwzz, l(16, 16, 0, 0) + or r1.zw, r1.zzzw, r2.xxxy + or r6.zw, r2.zzzw, r1.zzzw + store_uav_typed U0[0].xyzw, r3.yyyy, r6.xyzw + endif + endif +endif +iadd r0.y, r0.y, l(1) +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].xzyw +if_nz r1.x + ishl r4.xyzw, r2.xzyw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xzyw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.xzyw, r5.xzyw +endif +if_nz r1.y + ushr r1.xyzw, r2.xzyw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xzyw +endif +ubfe r0.xw, l(8, 0, 0, 8), l(8, 0, 0, 8), r2.xxxy +bfi r1.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r2.xyxx, l(0, 0, 0, 0) +iadd r0.xw, r0.xxxw, r1.xxxy +ushr r1.xy, r2.xyxx, l(24, 24, 0, 0) +and r1.zw, r2.xxxy, l(0, 0, 0x00ff0000, 0x00ff0000) +iadd r1.xy, r1.zwzz, r1.xyxx +ishl r1.zw, r2.zzzw, l(0, 0, 1, 1) +and r1.zw, r1.zzzw, l(0, 0, 0xaaaaaaaa, 0xaaaaaaaa) +ushr r2.xy, r2.zwzz, l(1, 1, 0, 0) +and r2.xy, r2.xyxx, l(0x55555555, 0x55555555, 0, 0) +iadd r1.zw, r1.zzzw, r2.xxxy +ushr r2.xy, r1.zwzz, l(1, 1, 0, 0) +and r2.xy, r2.xyxx, l(0x55555555, 0x55555555, 0, 0) +xor r1.zw, r1.zzzw, r2.xxxy +not r2.xy, r1.wzww +ushr r4.yzw, r2.yyyy, l(0, 4, 2, 6) +mov r4.x, r2.y +and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) +ushr r5.yzw, r1.zzzz, l(0, 4, 2, 6) +mov r5.x, r1.z +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +imul null, r5.xyzw, r1.xxxx, r5.xyzw +imad r4.xyzw, r4.xyzw, r0.xxxx, r5.xyzw +and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) +udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) +ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) +or r3.yz, r4.xxyx, r5.xxyx +ishl r4.xy, r5.zwzz, l(16, 16, 0, 0) +or r3.yz, r3.yyzy, r4.xxyx +or r4.xy, r4.zwzz, r3.yzyy +ushr r2.yzw, r2.xxxx, l(0, 4, 2, 6) +and r2.xyzw, r2.xyzw, l(3, 3, 3, 3) +ushr r5.yzw, r1.wwww, l(0, 4, 2, 6) +mov r5.x, r1.w +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +imul null, r5.xyzw, r1.yyyy, r5.xyzw +imad r2.xyzw, r2.xyzw, r0.wwww, r5.xyzw +and r5.xyzw, r2.xyzw, l(2047, 2047, 2047, 2047) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +ushr r2.xyzw, r2.xyzw, l(16, 16, 16, 16) +udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) +ishl r2.xyzw, r2.xyzw, l(8, 8, 24, 24) +or r2.xy, r2.xyxx, r5.xyxx +ishl r3.yz, r5.zzwz, l(0, 16, 16, 0) +or r2.xy, r2.xyxx, r3.yzyy +or r4.zw, r2.zzzw, r2.xxxy +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +if_nz r3.x + iadd r2.x, r0.z, r0.y + ushr r3.xy, r1.wzww, l(8, 8, 0, 0) + not r4.xy, r3.xyxx + ushr r5.yzw, r4.yyyy, l(0, 4, 2, 6) + mov r5.x, r4.y + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r6.yzw, r3.yyyy, l(0, 4, 2, 6) + mov r6.x, r3.y + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + imul null, r6.xyzw, r1.xxxx, r6.xyzw + imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw + and r6.xyzw, r5.xyzw, l(2047, 2047, 2047, 2047) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ushr r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(8, 8, 24, 24) + or r2.yz, r5.xxyx, r6.xxyx + ishl r5.xy, r6.zwzz, l(16, 16, 0, 0) + or r2.yz, r2.yyzy, r5.xxyx + or r5.xy, r5.zwzz, r2.yzyy + ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + imul null, r3.xyzw, r1.yyyy, r3.xyzw + imad r3.xyzw, r4.xyzw, r0.wwww, r3.xyzw + and r4.xyzw, r3.xyzw, l(2047, 2047, 2047, 2047) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ushr r3.xyzw, r3.xyzw, l(16, 16, 16, 16) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + ishl r3.xyzw, r3.xyzw, l(8, 8, 24, 24) + or r2.yz, r3.xxyx, r4.xxyx + ishl r3.xy, r4.zwzz, l(16, 16, 0, 0) + or r2.yz, r2.yyzy, r3.xxyx + or r5.zw, r3.zzzw, r2.yyyz + store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw + imad r2.x, vThreadID.y, l(4), l(2) + ilt r2.x, r2.x, CB0[0][2].y + if_nz r2.x + ishl r2.x, r0.z, l(1) + iadd r2.x, r0.y, r2.x + ushr r3.xy, r1.wzww, l(16, 16, 0, 0) + not r4.xy, r3.xyxx + ushr r5.yzw, r4.yyyy, l(0, 4, 2, 6) + mov r5.x, r4.y + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r6.yzw, r3.yyyy, l(0, 4, 2, 6) + mov r6.x, r3.y + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + imul null, r6.xyzw, r1.xxxx, r6.xyzw + imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw + and r6.xyzw, r5.xyzw, l(2047, 2047, 2047, 2047) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ushr r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(8, 8, 24, 24) + or r2.yz, r5.xxyx, r6.xxyx + ishl r5.xy, r6.zwzz, l(16, 16, 0, 0) + or r2.yz, r2.yyzy, r5.xxyx + or r5.xy, r5.zwzz, r2.yzyy + ushr r4.yzw, r4.xxxx, l(0, 4, 2, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + imul null, r3.xyzw, r1.yyyy, r3.xyzw + imad r3.xyzw, r4.xyzw, r0.wwww, r3.xyzw + and r4.xyzw, r3.xyzw, l(2047, 2047, 2047, 2047) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ushr r3.xyzw, r3.xyzw, l(16, 16, 16, 16) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + ishl r3.xyzw, r3.xyzw, l(8, 8, 24, 24) + or r2.yz, r3.xxyx, r4.xxyx + ishl r3.xy, r4.zwzz, l(16, 16, 0, 0) + or r2.yz, r2.yyzy, r3.xxyx + or r5.zw, r3.zzzw, r2.yyyz + store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw + imad r2.x, vThreadID.y, l(4), l(3) + ilt r2.x, r2.x, CB0[0][2].y + if_nz r2.x + imad r0.y, l(3), r0.z, r0.y + ushr r2.xy, r1.wzww, l(24, 24, 0, 0) + not r3.xy, r2.xyxx + ushr r4.yzw, r3.yyyy, l(0, 4, 2, 6) + mov r4.x, r3.y + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + ushr r5.yzw, r2.yyyy, l(0, 4, 2, 6) + mov r5.x, r2.y + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + imul null, r5.xyzw, r1.xxxx, r5.xyzw + imad r4.xyzw, r4.xyzw, r0.xxxx, r5.xyzw + and r5.xyzw, r4.xyzw, l(2047, 2047, 2047, 2047) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ushr r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ishl r4.xyzw, r4.xyzw, l(8, 8, 24, 24) + or r0.xz, r4.xxyx, r5.xxyx + ishl r1.xz, r5.zzwz, l(16, 0, 16, 0) + or r0.xz, r0.xxzx, r1.xxzx + or r4.xy, r4.zwzz, r0.xzxx + ushr r3.yzw, r3.xxxx, l(0, 4, 2, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + ushr r2.yzw, r2.xxxx, l(0, 4, 2, 6) + and r2.xyzw, r2.xyzw, l(3, 3, 3, 3) + imul null, r1.xyzw, r1.yyyy, r2.xyzw + imad r1.xyzw, r3.xyzw, r0.wwww, r1.xyzw + and r2.xyzw, r1.xyzw, l(2047, 2047, 2047, 2047) + udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) + ushr r1.xyzw, r1.xyzw, l(16, 16, 16, 16) + udiv r1.xyzw, null, r1.xyzw, l(3, 3, 3, 3) + ishl r1.xyzw, r1.xyzw, l(8, 8, 24, 24) + or r0.xz, r1.xxyx, r2.xxyx + ishl r1.xy, r2.zwzz, l(16, 16, 0, 0) + or r0.xz, r0.xxzx, r1.xxyx + or r4.zw, r1.zzzw, r0.xxxz + store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw + endif + endif +endif +ret +// Approximately 444 instruction slots used +#endif + +const BYTE texture_load_ctx1_cs[] = +{ + 68, 88, 66, 67, 79, 136, + 211, 153, 186, 206, 242, 85, + 244, 126, 116, 150, 52, 178, + 156, 203, 1, 0, 0, 0, + 104, 65, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 204, 64, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 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0, 0, + 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_2x_cs.h new file mode 100644 index 000000000..e99b81b56 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_2x_cs.h @@ -0,0 +1,2564 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 10 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(2) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].zwxy +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r4.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r5.xyzw, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw + mov r3.zw, r6.xxxy + mov r2.zw, r6.zzzw +else + mov r3.zw, r5.xxxy + mov r2.zw, r5.zzzw +endif +ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) +ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw +ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) +firstbit_hi r7.xyzw, r3.xyzw +iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) +movc r7.xyzw, r3.xyzw, r7.xyzw, l(21,21,21,21) +iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) +movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw +ishl r7.xyzw, r3.xyzw, r7.xyzw +and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r3.xyzw, r6.xyzw, r3.xyzw, r7.xyzw +ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) +iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) +iadd r3.xyzw, r6.xyzw, r3.xyzw +movc r3.xyzw, r5.xyzw, r3.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +ushr r3.xyzw, r2.xyzw, l(8, 8, 8, 8) +ubfe r2.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r2.xyzw +ushr r5.xyzw, r3.xyzw, l(20, 20, 20, 20) +firstbit_hi r6.xyzw, r2.xyzw +iadd r6.xyzw, r6.xyzw, l(-11, -11, -11, -11) +movc r6.xyzw, r2.xyzw, r6.xyzw, l(21,21,21,21) +iadd r7.xyzw, -r6.xyzw, l(1, 1, 1, 1) +movc r7.xyzw, r5.xyzw, r5.xyzw, r7.xyzw +ishl r6.xyzw, r2.xyzw, r6.xyzw +and r6.xyzw, r6.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r2.xyzw, r5.xyzw, r2.xyzw, r6.xyzw +ishl r5.xyzw, r7.xyzw, l(23, 23, 23, 23) +iadd r5.xyzw, r5.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r2.xyzw, r2.xyzw, l(3, 3, 3, 3) +iadd r2.xyzw, r5.xyzw, r2.xyzw +movc r2.xyzw, r3.xyzw, r2.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r4.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +ld r4.xyzw, r4.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + mov r5.zw, r6.xxxy + mov r3.zw, r6.zzzw +else + mov r5.zw, r4.xxxy + mov r3.zw, r4.zzzw +endif +ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) +ubfe r5.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r5.xyzw +ushr r6.xyzw, r4.xyzw, l(20, 20, 20, 20) +firstbit_hi r7.xyzw, r5.xyzw +iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) +movc r7.xyzw, r5.xyzw, r7.xyzw, l(21,21,21,21) +iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) +movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw +ishl r7.xyzw, r5.xyzw, r7.xyzw +and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r5.xyzw, r6.xyzw, r5.xyzw, r7.xyzw +ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) +iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +iadd r5.xyzw, r6.xyzw, r5.xyzw +movc r4.xyzw, r4.xyzw, r5.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r4.xyz, r0.zzzz, r2.xyzx +ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) +ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw +ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) +firstbit_hi r7.xyzw, r3.xyzw +iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) +movc r7.xyzw, r3.xyzw, r7.xyzw, l(21,21,21,21) +iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) +movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw +ishl r7.xyzw, r3.xyzw, r7.xyzw +and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r3.xyzw, r6.xyzw, r3.xyzw, r7.xyzw +ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) +iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) +iadd r3.xyzw, r6.xyzw, r3.xyzw +movc r3.xyzw, r5.xyzw, r3.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r4.xxxx, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(8) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r6.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r1.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw + mov r5.zw, r7.xxxy + mov r3.zw, r7.zzzw +else + mov r5.zw, r6.xxxy + mov r3.zw, r6.zzzw +endif +ushr r6.xyzw, r5.xyzw, l(8, 8, 8, 8) +ubfe r5.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r5.xyzw +ushr r7.xyzw, r6.xyzw, l(20, 20, 20, 20) +firstbit_hi r8.xyzw, r5.xyzw +iadd r8.xyzw, r8.xyzw, l(-11, -11, -11, -11) +movc r8.xyzw, r5.xyzw, r8.xyzw, l(21,21,21,21) +iadd r9.xyzw, -r8.xyzw, l(1, 1, 1, 1) +movc r9.xyzw, r7.xyzw, r7.xyzw, r9.xyzw +ishl r8.xyzw, r5.xyzw, r8.xyzw +and r8.xyzw, r8.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r5.xyzw, r7.xyzw, r5.xyzw, r8.xyzw +ishl r7.xyzw, r9.xyzw, l(23, 23, 23, 23) +iadd r7.xyzw, r7.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +iadd r5.xyzw, r7.xyzw, r5.xyzw +movc r5.xyzw, r6.xyzw, r5.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw +ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) +ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw +ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) +firstbit_hi r7.xyzw, r3.xyzw +iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) +movc r7.xyzw, r3.xyzw, r7.xyzw, l(21,21,21,21) +iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) +movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw +ishl r7.xyzw, r3.xyzw, r7.xyzw +and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r3.xyzw, r6.xyzw, r3.xyzw, r7.xyzw +ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) +iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) +iadd r3.xyzw, r6.xyzw, r3.xyzw +movc r3.xyzw, r5.xyzw, r3.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r4.yyyy, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r0.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw + mov r5.zw, r1.xxxy + mov r3.zw, r1.zzzw +else + mov r5.zw, r0.xxxy + mov r3.zw, r0.zzzw +endif +ushr r0.xyzw, r5.xyzw, l(8, 8, 8, 8) +ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r5.xyzw +ushr r5.xyzw, r0.xyzw, l(20, 20, 20, 20) +firstbit_hi r6.xyzw, r1.xyzw +iadd r6.xyzw, r6.xyzw, l(-11, -11, -11, -11) +movc r6.xyzw, r1.xyzw, r6.xyzw, l(21,21,21,21) +iadd r7.xyzw, -r6.xyzw, l(1, 1, 1, 1) +movc r7.xyzw, r5.xyzw, r5.xyzw, r7.xyzw +ishl r6.xyzw, r1.xyzw, r6.xyzw +and r6.xyzw, r6.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r1.xyzw, r5.xyzw, r1.xyzw, r6.xyzw +ishl r5.xyzw, r7.xyzw, l(23, 23, 23, 23) +iadd r5.xyzw, r5.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) +iadd r1.xyzw, r5.xyzw, r1.xyzw +movc r0.xyzw, r0.xyzw, r1.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw +ushr r0.xyzw, r3.xyzw, l(8, 8, 8, 8) +ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r3.xyzw +ushr r2.xyzw, r0.xyzw, l(20, 20, 20, 20) +firstbit_hi r3.xyzw, r1.xyzw +iadd r3.xyzw, r3.xyzw, l(-11, -11, -11, -11) +movc r3.xyzw, r1.xyzw, r3.xyzw, l(21,21,21,21) +iadd r5.xyzw, -r3.xyzw, l(1, 1, 1, 1) +movc r5.xyzw, r2.xyzw, r2.xyzw, r5.xyzw +ishl r3.xyzw, r1.xyzw, r3.xyzw +and r3.xyzw, r3.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r1.xyzw, r2.xyzw, r1.xyzw, r3.xyzw +ishl r2.xyzw, r5.xyzw, l(23, 23, 23, 23) +iadd r2.xyzw, r2.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) +iadd r1.xyzw, r2.xyzw, r1.xyzw +movc r0.xyzw, r0.xyzw, r1.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r4.zzzz, r0.xyzw +ret +// Approximately 351 instruction slots used +#endif + +const BYTE texture_load_depth_float_2x_cs[] = +{ + 68, 88, 66, 67, 75, 51, + 201, 192, 9, 103, 107, 86, + 13, 214, 95, 110, 178, 126, + 228, 166, 1, 0, 0, 0, + 132, 50, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 232, 49, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 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0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 55, 0, 0, 9, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 41, 0, 0, 7, + 242, 0, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 255, 255, 15, 0, 255, 255, + 15, 0, 255, 255, 15, 0, + 255, 255, 15, 0, 55, 0, + 0, 9, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 5, 0, 0, 0, + 2, 64, 0, 0, 23, 0, + 0, 0, 23, 0, 0, 0, + 23, 0, 0, 0, 23, 0, + 0, 0, 30, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 56, + 0, 0, 0, 56, 0, 0, + 0, 56, 0, 0, 0, 56, + 41, 0, 0, 10, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 55, 0, 0, 12, + 242, 0, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 95, 1, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 110, 0, 0, 0, 72, 0, + 0, 0, 13, 0, 0, 0, + 20, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 25, 0, 0, 0, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_3x_cs.h new file mode 100644 index 000000000..309e5310e --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_3x_cs.h @@ -0,0 +1,1998 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 10 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(2) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) +ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw +ushr r5.xyzw, r4.xyzw, l(20, 20, 20, 20) +firstbit_hi r6.xyzw, r1.xyzw +iadd r6.xyzw, r6.xyzw, l(-11, -11, -11, -11) +movc r6.xyzw, r1.xyzw, r6.xyzw, l(21,21,21,21) +iadd r7.xyzw, -r6.xyzw, l(1, 1, 1, 1) +movc r7.xyzw, r5.xyzw, r5.xyzw, r7.xyzw +ishl r6.xyzw, r1.xyzw, r6.xyzw +and r6.xyzw, r6.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r1.xyzw, r5.xyzw, r1.xyzw, r6.xyzw +ishl r5.xyzw, r7.xyzw, l(23, 23, 23, 23) +iadd r5.xyzw, r5.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) +iadd r1.xyzw, r5.xyzw, r1.xyzw +movc r1.xyzw, r4.xyzw, r1.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx +ld r4.xy, r2.yyyy, T0[0].xyzw +ld r4.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) +ubfe r4.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r4.xyzw +ushr r6.xyzw, r5.xyzw, l(20, 20, 20, 20) +firstbit_hi r7.xyzw, r4.xyzw +iadd r7.xyzw, r7.xyzw, l(-11, -11, -11, -11) +movc r7.xyzw, r4.xyzw, r7.xyzw, l(21,21,21,21) +iadd r8.xyzw, -r7.xyzw, l(1, 1, 1, 1) +movc r8.xyzw, r6.xyzw, r6.xyzw, r8.xyzw +ishl r7.xyzw, r4.xyzw, r7.xyzw +and r7.xyzw, r7.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r4.xyzw, r6.xyzw, r4.xyzw, r7.xyzw +ishl r6.xyzw, r8.xyzw, l(23, 23, 23, 23) +iadd r6.xyzw, r6.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r4.xyzw, r4.xyzw, l(3, 3, 3, 3) +iadd r4.xyzw, r6.xyzw, r4.xyzw +movc r4.xyzw, r5.xyzw, r4.xyzw, l(0,0,0,0) +iadd r0.w, r0.z, r0.y +mov r5.xzw, r1.wwww +mov r5.y, r4.x +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz +ld r2.xy, r2.wwww, T0[0].xyzw +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r2.zw, r5.xxxx, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw +endif +ushr r6.xyzw, r2.xyzw, l(8, 8, 8, 8) +ubfe r2.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r2.xyzw +ushr r7.xyzw, r6.xyzw, l(20, 20, 20, 20) +firstbit_hi r8.xyzw, r2.xyzw +iadd r8.xyzw, r8.xyzw, l(-11, -11, -11, -11) +movc r8.xyzw, r2.xyzw, r8.xyzw, l(21,21,21,21) +iadd r9.xyzw, -r8.xyzw, l(1, 1, 1, 1) +movc r9.xyzw, r7.xyzw, r7.xyzw, r9.xyzw +ishl r8.xyzw, r2.xyzw, r8.xyzw +and r8.xyzw, r8.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r2.xyzw, r7.xyzw, r2.xyzw, r8.xyzw +ishl r7.xyzw, r9.xyzw, l(23, 23, 23, 23) +iadd r7.xyzw, r7.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r2.xyzw, r2.xyzw, l(3, 3, 3, 3) +iadd r2.xyzw, r7.xyzw, r2.xyzw +movc r2.xyzw, r6.xyzw, r2.xyzw, l(0,0,0,0) +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +mov r6.xzw, r1.zzzz +mov r6.y, r2.y +store_uav_typed U0[0].xyzw, r1.xxxx, r6.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.zwzz +ld r1.xy, r5.yyyy, T0[0].xyzw +ld r1.zw, r5.zzzz, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw +endif +ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) +ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw +ushr r7.xyzw, r6.xyzw, l(20, 20, 20, 20) +firstbit_hi r8.xyzw, r1.xyzw +iadd r8.xyzw, r8.xyzw, l(-11, -11, -11, -11) +movc r8.xyzw, r1.xyzw, r8.xyzw, l(21,21,21,21) +iadd r9.xyzw, -r8.xyzw, l(1, 1, 1, 1) +movc r9.xyzw, r7.xyzw, r7.xyzw, r9.xyzw +ishl r8.xyzw, r1.xyzw, r8.xyzw +and r8.xyzw, r8.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r1.xyzw, r7.xyzw, r1.xyzw, r8.xyzw +ishl r7.xyzw, r9.xyzw, l(23, 23, 23, 23) +iadd r7.xyzw, r7.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) +iadd r1.xyzw, r7.xyzw, r1.xyzw +movc r1.xyzw, r6.xwyz, r1.xwyz, l(0,0,0,0) +iadd r0.xy, r0.wwww, l(1, 2, 0, 0) +mov r4.xzw, r4.yyyy +mov r4.y, r1.x +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r1.zwzz +iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) +mov r1.xzw, r2.xxxx +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ld r0.xw, r5.wwww, T0[0].xzwy +if_nz r3.x + ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r1.zzzw, r1.xxxy +endif +if_nz r3.y + ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) + bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy +endif +ushr r1.xyzw, r0.xwxx, l(8, 8, 8, 8) +ubfe r2.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r0.xwxx +ushr r3.xyzw, r1.wyww, l(20, 20, 20, 20) +firstbit_hi r4.xyzw, r2.wyww +iadd r4.xyzw, r4.xyzw, l(-11, -11, -11, -11) +movc r4.xyzw, r2.wyww, r4.xyzw, l(21,21,21,21) +iadd r5.xyzw, -r4.wyww, l(1, 1, 1, 1) +movc r5.xyzw, r3.wyww, r3.wyww, r5.xyzw +ishl r4.xyzw, r2.wyww, r4.xyzw +and r4.xyzw, r4.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r2.xyzw, r3.xyzw, r2.xyzw, r4.xyzw +ishl r3.xyzw, r5.xyzw, l(23, 23, 23, 23) +iadd r3.xyzw, r3.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r2.xyzw, r2.xyzw, l(3, 3, 3, 3) +iadd r2.xyzw, r3.xyzw, r2.xyzw +movc r1.xyzw, r1.xyzw, r2.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +ret +// Approximately 253 instruction slots used +#endif + +const BYTE texture_load_depth_float_3x_cs[] = +{ + 68, 88, 66, 67, 129, 237, + 88, 224, 133, 238, 221, 220, + 64, 148, 181, 87, 11, 122, + 158, 121, 1, 0, 0, 0, + 144, 39, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 244, 38, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_cs.h new file mode 100644 index 000000000..6e2117306 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_float_cs.h @@ -0,0 +1,1192 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.x, r0.x, l(2) +imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.y, CB0[0][2].x, r0.x +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) +ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw +ushr r4.xyzw, r3.xyzw, l(20, 20, 20, 20) +firstbit_hi r5.xyzw, r1.xyzw +iadd r5.xyzw, r5.xyzw, l(-11, -11, -11, -11) +movc r5.xyzw, r1.xyzw, r5.xyzw, l(21,21,21,21) +iadd r6.xyzw, -r5.xyzw, l(1, 1, 1, 1) +movc r6.xyzw, r4.xyzw, r4.xyzw, r6.xyzw +ishl r5.xyzw, r1.xyzw, r5.xyzw +and r5.xyzw, r5.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r1.xyzw, r4.xyzw, r1.xyzw, r5.xyzw +ishl r4.xyzw, r6.xyzw, l(23, 23, 23, 23) +iadd r4.xyzw, r4.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) +iadd r1.xyzw, r4.xyzw, r1.xyzw +movc r1.xyzw, r3.xyzw, r1.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r0.w, r0.y, l(1) +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r1.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw +endif +ushr r2.xyzw, r1.xyzw, l(8, 8, 8, 8) +ubfe r1.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw +ushr r3.xyzw, r2.xyzw, l(20, 20, 20, 20) +firstbit_hi r4.xyzw, r1.xyzw +iadd r4.xyzw, r4.xyzw, l(-11, -11, -11, -11) +movc r4.xyzw, r1.xyzw, r4.xyzw, l(21,21,21,21) +iadd r5.xyzw, -r4.xyzw, l(1, 1, 1, 1) +movc r5.xyzw, r3.xyzw, r3.xyzw, r5.xyzw +ishl r4.xyzw, r1.xyzw, r4.xyzw +and r4.xyzw, r4.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) +movc r1.xyzw, r3.xyzw, r1.xyzw, r4.xyzw +ishl r3.xyzw, r5.xyzw, l(23, 23, 23, 23) +iadd r3.xyzw, r3.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) +ishl r1.xyzw, r1.xyzw, l(3, 3, 3, 3) +iadd r1.xyzw, r3.xyzw, r1.xyzw +movc r1.xyzw, r2.xyzw, r1.xyzw, l(0,0,0,0) +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +ret +// Approximately 134 instruction slots used +#endif + +const BYTE texture_load_depth_float_cs[] = +{ + 68, 88, 66, 67, 57, 196, + 2, 149, 126, 223, 23, 183, + 129, 91, 160, 58, 226, 153, + 90, 218, 1, 0, 0, 0, + 116, 23, 0, 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0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 21, 0, 0, 1, + 85, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 138, 0, + 0, 15, 242, 0, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 20, 0, 0, 0, + 20, 0, 0, 0, 20, 0, + 0, 0, 20, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 20, 0, + 0, 0, 20, 0, 0, 0, + 20, 0, 0, 0, 20, 0, + 0, 0, 135, 0, 0, 5, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 30, 0, + 0, 10, 242, 0, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 245, 255, + 255, 255, 245, 255, 255, 255, + 245, 255, 255, 255, 245, 255, + 255, 255, 55, 0, 0, 12, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 21, 0, + 0, 0, 21, 0, 0, 0, + 21, 0, 0, 0, 21, 0, + 0, 0, 30, 0, 0, 11, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 128, + 65, 0, 0, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 55, 0, + 0, 9, 242, 0, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 5, 0, 0, 0, 41, 0, + 0, 7, 242, 0, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 255, 255, 15, 0, + 255, 255, 15, 0, 255, 255, + 15, 0, 255, 255, 15, 0, + 55, 0, 0, 9, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 41, 0, 0, 10, 242, 0, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 2, 64, 0, 0, + 23, 0, 0, 0, 23, 0, + 0, 0, 23, 0, 0, 0, + 23, 0, 0, 0, 30, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 56, 0, 0, 0, 56, + 0, 0, 0, 56, 0, 0, + 0, 56, 41, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 55, 0, + 0, 12, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 134, 0, 0, 0, 7, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 48, 0, 0, 0, + 29, 0, 0, 0, 4, 0, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 9, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_2x_cs.h new file mode 100644 index 000000000..ee42f8c0d --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_2x_cs.h @@ -0,0 +1,1862 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(2) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].zwxy +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r4.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r5.xyzw, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw + mov r3.zw, r6.xxxy + mov r2.zw, r6.zzzw +else + mov r3.zw, r5.xxxy + mov r2.zw, r5.zzzw +endif +ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) +ushr r5.xyzw, r3.xyzw, l(23, 23, 23, 23) +iadd r3.xyzw, r3.xyzw, r5.xyzw +utof r3.xyzw, r3.xyzw +mul r3.xyzw, r3.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) +ushr r3.xyzw, r2.xyzw, l(23, 23, 23, 23) +iadd r2.xyzw, r2.xyzw, r3.xyzw +utof r2.xyzw, r2.xyzw +mul r2.xyzw, r2.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r4.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +ld r4.xyzw, r4.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + mov r5.zw, r6.xxxy + mov r3.zw, r6.zzzw +else + mov r5.zw, r4.xxxy + mov r3.zw, r4.zzzw +endif +ushr r4.xyzw, r5.xyzw, l(8, 8, 8, 8) +ushr r5.xyzw, r4.xyzw, l(23, 23, 23, 23) +iadd r4.xyzw, r4.xyzw, r5.xyzw +utof r4.xyzw, r4.xyzw +mul r4.xyzw, r4.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r4.xyz, r0.zzzz, r2.xyzx +ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) +ushr r5.xyzw, r3.xyzw, l(23, 23, 23, 23) +iadd r3.xyzw, r3.xyzw, r5.xyzw +utof r3.xyzw, r3.xyzw +mul r3.xyzw, r3.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r4.xxxx, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(8) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r6.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r1.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw + mov r5.zw, r7.xxxy + mov r3.zw, r7.zzzw +else + mov r5.zw, r6.xxxy + mov r3.zw, r6.zzzw +endif +ushr r5.xyzw, r5.xyzw, l(8, 8, 8, 8) +ushr r6.xyzw, r5.xyzw, l(23, 23, 23, 23) +iadd r5.xyzw, r5.xyzw, r6.xyzw +utof r5.xyzw, r5.xyzw +mul r5.xyzw, r5.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) +ushr r5.xyzw, r3.xyzw, l(23, 23, 23, 23) +iadd r3.xyzw, r3.xyzw, r5.xyzw +utof r3.xyzw, r3.xyzw +mul r3.xyzw, r3.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r4.yyyy, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r5.zwxy + mov r5.xy, r3.zwzz +else + mov r5.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r0.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r0.xyzw, r1.xyzw + mov r5.zw, r1.xxxy + mov r3.zw, r1.zzzw +else + mov r5.zw, r0.xxxy + mov r3.zw, r0.zzzw +endif +ushr r0.xyzw, r5.xyzw, l(8, 8, 8, 8) +ushr r1.xyzw, r0.xyzw, l(23, 23, 23, 23) +iadd r0.xyzw, r0.xyzw, r1.xyzw +utof r0.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw +ushr r0.xyzw, r3.xyzw, l(8, 8, 8, 8) +ushr r1.xyzw, r0.xyzw, l(23, 23, 23, 23) +iadd r0.xyzw, r0.xyzw, r1.xyzw +utof r0.xyzw, r0.xyzw +mul r0.xyzw, r0.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r4.zzzz, r0.xyzw +ret +// Approximately 263 instruction slots used +#endif + +const BYTE texture_load_depth_unorm_2x_cs[] = +{ + 68, 88, 66, 67, 2, 83, + 99, 65, 54, 50, 167, 244, + 2, 133, 2, 105, 127, 121, + 10, 135, 1, 0, 0, 0, + 36, 36, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 136, 35, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 72, 31, + 0, 0, 81, 0, 5, 0, + 210, 7, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 156, 8, + 0, 7, 70, 238, 49, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 68, 68, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 2, + 114, 0, 2, 0, 104, 0, + 0, 2, 9, 0, 0, 0, + 155, 0, 0, 4, 4, 0, + 0, 0, 32, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 54, 0, + 0, 4, 98, 0, 16, 0, + 0, 0, 0, 0, 86, 6, + 2, 0, 80, 0, 0, 9, + 114, 0, 16, 0, 1, 0, + 0, 0, 70, 2, 16, 0, + 0, 0, 0, 0, 70, 130, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 60, 0, 0, 7, + 66, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 60, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 10, 98, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 41, 0, + 0, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 26, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 2, 0, + 0, 0, 35, 0, 0, 8, + 66, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 2, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 35, 0, + 0, 11, 34, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 10, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 30, 0, 0, 9, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 58, 128, 48, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 85, 0, 0, 9, 66, 0, + 16, 0, 0, 0, 0, 0, + 10, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 9, 130, 0, + 16, 0, 0, 0, 0, 0, + 10, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 31, 0, 4, 3, 58, 0, + 16, 0, 0, 0, 0, 0, + 1, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 2, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 42, 0, 0, 9, 114, 0, + 16, 0, 1, 0, 0, 0, + 150, 5, 2, 0, 2, 64, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 85, 0, 0, 12, 50, 0, + 16, 0, 2, 0, 0, 0, + 182, 143, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 4, 0, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 35, 0, 0, 9, 18, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 139, 0, 0, 14, 82, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 27, 0, + 0, 0, 0, 0, 0, 0, + 29, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 2, 0, 35, 0, 0, 9, + 18, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 2, 0, 0, 0, + 10, 0, 16, 0, 2, 0, + 0, 0, 41, 0, 0, 6, + 130, 0, 16, 0, 1, 0, + 0, 0, 26, 0, 2, 0, + 1, 64, 0, 0, 10, 0, + 0, 0, 42, 0, 0, 7, + 130, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 6, 0, 0, 0, + 1, 0, 0, 7, 130, 0, + 16, 0, 1, 0, 0, 0, + 58, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 96, 0, 0, 0, 30, 0, + 0, 7, 34, 0, 16, 0, + 1, 0, 0, 0, 26, 0, + 16, 0, 1, 0, 0, 0, + 42, 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194, 0, + 16, 0, 5, 0, 0, 0, + 6, 4, 16, 0, 1, 0, + 0, 0, 54, 0, 0, 5, + 194, 0, 16, 0, 3, 0, + 0, 0, 166, 14, 16, 0, + 1, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 194, 0, 16, 0, 5, 0, + 0, 0, 6, 4, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 194, 0, 16, 0, + 3, 0, 0, 0, 166, 14, + 16, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 85, 0, + 0, 10, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 5, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 23, 0, 0, 0, + 23, 0, 0, 0, 23, 0, + 0, 0, 23, 0, 0, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 86, 0, + 0, 5, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 56, 0, 0, 10, 242, 0, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 128, 51, 0, 0, + 128, 51, 0, 0, 128, 51, + 0, 0, 128, 51, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 166, 10, 16, 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0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 25, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_3x_cs.h new file mode 100644 index 000000000..f9be18409 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_3x_cs.h @@ -0,0 +1,1560 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(2) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r4.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r4.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx +ld r4.xy, r2.yyyy, T0[0].xyzw +ld r4.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) +ushr r5.xyzw, r4.xyzw, l(23, 23, 23, 23) +iadd r4.xyzw, r4.xyzw, r5.xyzw +utof r4.xyzw, r4.xyzw +mul r4.xyzw, r4.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +iadd r0.w, r0.z, r0.y +mov r5.xzw, r1.wwww +mov r5.y, r4.x +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz +ld r2.xy, r2.wwww, T0[0].xyzw +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r2.zw, r5.xxxx, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw +endif +ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) +ushr r6.xyzw, r2.xyzw, l(23, 23, 23, 23) +iadd r2.xyzw, r2.xyzw, r6.xyzw +utof r2.xyzw, r2.xyzw +mul r2.xyzw, r2.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +mov r6.xzw, r1.zzzz +mov r6.y, r2.y +store_uav_typed U0[0].xyzw, r1.xxxx, r6.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.zwzz +ld r1.xy, r5.yyyy, T0[0].xyzw +ld r1.zw, r5.zzzz, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw +endif +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r6.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r6.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xwyz, l(0.000000, 0.000000, 0.000000, 0.000000) +iadd r0.xy, r0.wwww, l(1, 2, 0, 0) +mov r4.xzw, r4.yyyy +mov r4.y, r1.x +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r1.zwzz +iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) +mov r1.xzw, r2.xxxx +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ld r0.xw, r5.wwww, T0[0].xzwy +if_nz r3.x + ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r1.zzzw, r1.xxxy +endif +if_nz r3.y + ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) + bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy +endif +ushr r1.xyzw, r0.xwxx, l(8, 8, 8, 8) +ushr r2.xyzw, r1.wyww, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r2.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +ret +// Approximately 198 instruction slots used +#endif + +const BYTE texture_load_depth_unorm_3x_cs[] = +{ + 68, 88, 66, 67, 28, 220, + 51, 42, 205, 240, 151, 95, + 112, 158, 175, 248, 252, 88, + 228, 177, 1, 0, 0, 0, + 148, 30, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 248, 29, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 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0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_cs.h new file mode 100644 index 000000000..7ed744694 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_depth_unorm_cs.h @@ -0,0 +1,1017 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.x, r0.x, l(2) +imad r0.y, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.y, CB0[0][2].x, r0.x +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r3.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r3.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r0.w, r0.y, l(1) +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r1.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw +endif +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r2.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r2.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +ret +// Approximately 112 instruction slots used +#endif + +const BYTE texture_load_depth_unorm_cs[] = +{ + 68, 88, 66, 67, 29, 191, + 138, 252, 57, 247, 141, 247, + 207, 39, 192, 180, 205, 103, + 39, 181, 1, 0, 0, 0, + 220, 19, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 64, 19, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 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14, + 16, 0, 1, 0, 0, 0, + 30, 0, 0, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 55, 0, + 0, 9, 66, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 2, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 18, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 45, 0, 0, 8, + 242, 0, 16, 0, 1, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 70, 126, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 10, 0, 16, 0, + 2, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 85, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 21, 0, 0, 1, 31, 0, + 4, 3, 26, 0, 16, 0, + 2, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 21, 0, + 0, 1, 85, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 85, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 23, 0, 0, 0, 23, 0, + 0, 0, 23, 0, 0, 0, + 23, 0, 0, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 86, 0, 0, 5, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 56, 0, + 0, 10, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 128, 51, 0, 0, 128, 51, + 0, 0, 128, 51, 0, 0, + 128, 51, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 246, 15, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 112, 0, + 0, 0, 5, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 2, 0, 0, 0, + 36, 0, 0, 0, 27, 0, + 0, 0, 4, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxn_rg8_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxn_rg8_cs.h new file mode 100644 index 000000000..84b3d8148 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxn_rg8_cs.h @@ -0,0 +1,5348 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 19 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(4) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz +endif +if_nz r1.y + ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r4.xyzw, r0.xxxx, T0[0].ywxz +if_nz r1.x + ishl r5.xyzw, r4.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.zxwy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.ywxz, r6.ywxz +endif +if_nz r1.y + ushr r1.xyzw, r4.zxwy, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.ywxz + mov r2.zw, r4.xxxy +else + mov r2.zw, r4.xxxy +endif +ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) +and r1.xyzw, r3.xzyw, l(255, 255, 255, 255) +ushr r4.xy, r4.zwzz, l(8, 8, 0, 0) +and r5.xyzw, r4.zxwy, l(255, 255, 255, 255) +mov r4.xy, r3.xyxx +ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) +bfi r4.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, r4.xyzw +uge r0.xw, r1.yyyw, r1.xxxz +ushr r4.xyzw, r3.xxyy, l(1, 2, 1, 2) +and r6.xy, r3.xyxx, r4.xzxx +and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) +ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) +ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r6.xy, r6.xyxx, r7.xyxx +and r7.xyzw, r3.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) +iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) +and r6.zw, r6.xxxy, r8.xxxy +or r8.xy, r3.xyxx, r4.xzxx +and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) +or r4.xy, r4.ywyy, r8.xyxx +and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) +xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) +not r9.xyzw, r9.xyzw +and r10.xyzw, r7.xxyy, r9.xxzz +and r9.xyzw, r9.yyww, r10.xyzw +or r3.xy, r3.xyxx, r4.xyxx +iadd r3.xy, r3.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) +or r3.xy, r9.xwxx, r3.xyxx +ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) +or r7.xy, r3.xyxx, r4.xzxx +not r6.xy, r6.xyxx +and r6.xy, r6.xyxx, r7.xyxx +or r6.xy, r6.zwzz, r6.xyxx +iadd r4.xy, r4.ywyy, r4.xzxx +or r3.xy, r3.xyxx, r4.xyxx +movc r4.xy, r0.xwxx, r6.xyxx, r3.xyxx +uge r3.xy, r5.ywyy, r5.xzxx +ushr r6.xyzw, r3.zzww, l(1, 2, 1, 2) +and r7.xy, r3.zwzz, r6.xzxx +and r7.xy, r7.xyxx, l(0x00492492, 0x00492492, 0, 0) +ishl r8.xy, r7.xyxx, l(1, 1, 0, 0) +ushr r9.xy, r7.xyxx, l(1, 1, 0, 0) +iadd r7.xy, r7.xyxx, r8.xyxx +iadd r7.xy, r7.xyxx, r9.xyxx +and r8.xy, r7.xyxx, r8.zwzz +or r8.zw, r3.zzzw, r6.xxxz +and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) +or r6.xy, r6.ywyy, r8.zwzz +and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) +xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) +not r9.xyzw, r9.xyzw +and r10.xyzw, r7.zzww, r9.xxzz +and r9.xyzw, r9.yyww, r10.xyzw +or r3.zw, r3.zzzw, r6.xxxy +iadd r3.zw, r3.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) +or r3.zw, r9.yyyw, r3.zzzw +ishl r6.xyzw, r9.xyzw, l(2, 1, 2, 1) +or r7.zw, r3.zzzw, r6.xxxz +not r7.xy, r7.xyxx +and r7.xy, r7.xyxx, r7.zwzz +or r7.xy, r8.xyxx, r7.xyxx +iadd r6.xy, r6.ywyy, r6.xzxx +or r3.zw, r3.zzzw, r6.xxxy +movc r4.zw, r3.xxxy, r7.xxxy, r3.zzzw +ushr r3.zw, r4.xxxy, l(0, 0, 1, 1) +and r3.zw, r4.xxxy, r3.zzzw +and r3.zw, r3.zzzw, l(0, 0, 1170, 1170) +ishl r6.xy, r3.zwzz, l(1, 1, 0, 0) +ushr r6.zw, r3.zzzw, l(0, 0, 1, 1) +iadd r3.zw, r3.zzzw, r6.xxxy +iadd r3.zw, r3.zzzw, r6.zzzw +not r6.xyzw, r3.zzzw +and r7.xyzw, r4.xxxy, r6.zzzw +iadd r8.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) +and r6.xyzw, r6.xyzw, r8.xyzw +and r8.xy, r6.zwzz, l(7, 7, 0, 0) +and r8.zw, r7.zzzw, l(0, 0, 7, 7) +imul null, r8.zw, r1.yyyw, r8.zzzw +imad r8.xy, r1.xzxx, r8.xyxx, r8.zwzz +udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) +ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw +ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw +imul null, r10.xyzw, r1.yyyw, r10.xyzw +imad r9.xyzw, r1.xxxz, r9.xyzw, r10.xyzw +udiv r9.xyzw, null, r9.xyzw, l(5, 5, 5, 5) +imad r8.xy, r9.xwxx, l(0x00010000, 0x00010000, 0, 0), r8.xyxx +imad r8.z, r9.z, l(0x00010000), r9.y +and r3.zw, r3.zzzw, r4.xxxy +ishl r9.xyzw, r3.zzww, l(13, 7, 13, 7) +and r9.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) +bfi r10.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r3.zwzz, r9.xzxx +ubfe r3.zw, l(0, 0, 1, 1), l(0, 0, 6, 6), r3.zzzw +iadd r10.zw, r9.yyyw, r3.zzzw +imad r3.zw, r10.xxxz, l(0, 0, 255, 255), r8.xxxz +not r9.xyzw, r4.xxxy +and r6.xy, r9.zwzz, l(7, 7, 0, 0) +and r11.xyzw, r4.xyzw, l(7, 7, 7, 7) +imul null, r7.xy, r1.ywyy, r11.xyxx +imad r6.xy, r1.xzxx, r6.xyxx, r7.xyxx +udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) +ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw +ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy +imul null, r13.xyzw, r1.yyyw, r13.xyzw +imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw +udiv r12.xyzw, null, r12.xyzw, l(7, 7, 7, 7) +imad r13.xy, r12.xwxx, l(0x00010000, 0x00010000, 0, 0), r6.xyxx +imad r13.z, r12.z, l(0x00010000), r12.y +movc r3.zw, r0.xxxx, r3.zzzw, r13.xxxz +ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r6.wwww +ubfe r6.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r7.wwww +imul null, r6.zw, r1.wwww, r6.zzzw +imad r6.xy, r1.zzzz, r6.xyxx, r6.zwzz +udiv r6.xy, null, r6.xyxx, l(5, 5, 0, 0) +imad r8.w, r6.y, l(0x00010000), r6.x +imad r6.xy, r10.ywyy, l(255, 255, 0, 0), r8.ywyy +ubfe r6.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r9.wwww +ubfe r7.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww +imul null, r7.xy, r1.wwww, r7.xyxx +imad r6.zw, r1.zzzz, r6.zzzw, r7.xxxy +udiv r6.zw, null, r6.zzzw, l(0, 0, 7, 7) +imad r13.w, r6.w, l(0x00010000), r6.z +movc r6.xy, r0.wwww, r6.xyxx, r13.ywyy +ishl r6.xy, r6.xyxx, l(8, 8, 0, 0) +or r6.xy, r3.zwzz, r6.xyxx +ushr r3.zw, r4.zzzw, l(0, 0, 1, 1) +and r3.zw, r4.zzzw, r3.zzzw +and r3.zw, r3.zzzw, l(0, 0, 1170, 1170) +ishl r7.xy, r3.zwzz, l(1, 1, 0, 0) +ushr r8.xy, r3.zwzz, l(1, 1, 0, 0) +iadd r3.zw, r3.zzzw, r7.xxxy +iadd r3.zw, r3.zzzw, r8.xxxy +not r8.xyzw, r3.zzzw +and r9.xyzw, r4.zzzw, r8.zzzw +iadd r10.xyzw, -r9.zzzw, l(2925, 2925, 2925, 2925) +and r8.xyzw, r8.xyzw, r10.xyzw +and r7.xy, r8.zwzz, l(7, 7, 0, 0) +and r10.xy, r9.zwzz, l(7, 7, 0, 0) +imul null, r10.xy, r5.ywyy, r10.xyxx +imad r7.xy, r5.xzxx, r7.xyxx, r10.xyxx +udiv r7.xy, null, r7.xyxx, l(5, 5, 0, 0) +ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw +ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw +imul null, r12.xyzw, r5.yyyw, r12.xyzw +imad r10.xyzw, r5.xxxz, r10.xyzw, r12.xyzw +udiv r10.xyzw, null, r10.xyzw, l(5, 5, 5, 5) +imad r12.xy, r10.xwxx, l(0x00010000, 0x00010000, 0, 0), r7.xyxx +imad r12.z, r10.z, l(0x00010000), r10.y +and r3.zw, r3.zzzw, r4.zzzw +ishl r10.xyzw, r3.zzww, l(13, 7, 13, 7) +and r10.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) +bfi r13.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r3.zwzz, r10.xzxx +ubfe r3.zw, l(0, 0, 1, 1), l(0, 0, 6, 6), r3.zzzw +iadd r13.zw, r10.yyyw, r3.zzzw +imad r3.zw, r13.xxxz, l(0, 0, 255, 255), r12.xxxz +not r10.xyzw, r4.zzzw +and r7.xy, r10.zwzz, l(7, 7, 0, 0) +imul null, r8.xy, r5.ywyy, r11.zwzz +imad r7.xy, r5.xzxx, r7.xyxx, r8.xyxx +udiv r7.xy, null, r7.xyxx, l(7, 7, 0, 0) +ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r10.xyzw +ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw +imul null, r14.xyzw, r5.yyyw, r14.xyzw +imad r11.xyzw, r5.xxxz, r11.xyzw, r14.xyzw +udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) +imad r14.xy, r11.xwxx, l(0x00010000, 0x00010000, 0, 0), r7.xyxx +imad r14.z, r11.z, l(0x00010000), r11.y +movc r3.zw, r3.xxxx, r3.zzzw, r14.xxxz +ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r8.wwww +ubfe r8.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww +imul null, r8.xy, r5.wwww, r8.xyxx +imad r7.xy, r5.zzzz, r7.xyxx, r8.xyxx +udiv r7.xy, null, r7.xyxx, l(5, 5, 0, 0) +imad r12.w, r7.y, l(0x00010000), r7.x +imad r7.xy, r13.ywyy, l(255, 255, 0, 0), r12.ywyy +ubfe r8.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r10.wwww +imul null, r7.zw, r5.wwww, r7.zzzw +imad r7.zw, r5.zzzz, r8.xxxy, r7.zzzw +udiv r7.zw, null, r7.zzzw, l(0, 0, 7, 7) +imad r14.w, r7.w, l(0x00010000), r7.z +movc r7.xy, r3.yyyy, r7.xyxx, r14.ywyy +ishl r7.xy, r7.xyxx, l(8, 8, 0, 0) +or r6.zw, r3.zzzw, r7.xxxy +store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw +imad r3.z, vThreadID.y, l(4), l(1) +ilt r3.w, r3.z, CB0[0][2].y +if_nz r3.w + iadd r0.y, r0.z, r0.y + ushr r6.xyzw, r4.xyzw, l(12, 12, 12, 12) + ushr r7.xyzw, r6.xyzw, l(1, 1, 1, 1) + and r7.xyzw, r6.xyzw, r7.xyzw + and r7.xyzw, r7.xyzw, l(1170, 1170, 1170, 1170) + ishl r8.xyzw, r7.xyzw, l(1, 1, 1, 1) + ushr r9.xyzw, r7.xyzw, l(1, 1, 1, 1) + iadd r7.xyzw, r7.xyzw, r8.xyzw + iadd r7.xyzw, r7.xyzw, r9.xyzw + not r8.xyzw, r7.xyzw + and r9.xyzw, r6.xyzw, r8.xyzw + iadd r10.xyzw, -r9.xyzw, l(2925, 2925, 2925, 2925) + and r8.xyzw, r8.xyzw, r10.xyzw + and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) + and r11.xyzw, r9.xyzw, l(7, 7, 7, 7) + imul null, r11.xy, r1.ywyy, r11.xyxx + imad r10.xy, r1.xzxx, r10.xyxx, r11.xyxx + udiv r10.xy, null, r10.xyxx, l(5, 5, 0, 0) + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy + ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xxxy + imul null, r13.xyzw, r1.yyyw, r13.xyzw + imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw + udiv r12.xyzw, null, r12.xyzw, l(5, 5, 5, 5) + imad r13.xy, r12.xwxx, l(0x00010000, 0x00010000, 0, 0), r10.xyxx + imad r13.z, r12.z, l(0x00010000), r12.y + and r7.xyzw, r6.xyzw, r7.xyzw + ishl r12.xyzw, r7.xxyy, l(13, 7, 13, 7) + and r12.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) + bfi r14.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r7.xyxx, r12.xzxx + ubfe r15.xyzw, l(1, 1, 1, 1), l(6, 6, 6, 6), r7.xyzw + iadd r14.zw, r12.yyyw, r15.xxxy + imad r7.xy, r14.xzxx, l(255, 255, 0, 0), r13.xzxx + not r6.xyzw, r6.xyzw + and r12.xyzw, r6.xyzw, l(7, 7, 7, 7) + ubfe r16.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx + imul null, r16.xyzw, r1.yyyy, r16.xyzw + imad r3.w, r1.x, r12.x, r16.x + udiv r3.w, null, r3.w, l(7) + ubfe r17.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xxxy + imad r16.xyz, r1.xxxx, r17.xyzx, r16.yzwy + udiv r16.xyz, null, r16.xyzx, l(7, 7, 7, 0) + imad r10.x, r16.x, l(0x00010000), r3.w + imad r10.y, r16.z, l(0x00010000), r16.y + movc r7.xy, r0.xxxx, r7.xyxx, r10.xyxx + ubfe r16.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz + ubfe r18.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r9.yyzz + imul null, r8.xy, r1.wwww, r18.xyxx + imad r8.xy, r1.zzzz, r16.xyxx, r8.xyxx + udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) + imad r13.w, r8.y, l(0x00010000), r8.x + imad r8.xy, r14.ywyy, l(255, 255, 0, 0), r13.ywyy + ubfe r13.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy + imul null, r13.xyzw, r1.wwww, r13.xyzw + imad r3.w, r1.z, r12.y, r13.x + udiv r3.w, null, r3.w, l(7) + imad r4.x, r1.z, r17.w, r13.y + udiv r4.x, null, r4.x, l(7) + imad r4.x, r4.x, l(0x00010000), r3.w + ubfe r14.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r6.yyzz + imad r6.xy, r1.zzzz, r14.xyxx, r13.zwzz + udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) + imad r4.y, r6.y, l(0x00010000), r6.x + movc r4.xy, r0.wwww, r8.xyxx, r4.xyxx + ishl r4.xy, r4.xyxx, l(8, 8, 0, 0) + or r13.xy, r4.xyxx, r7.xyxx + imul null, r4.xy, r5.ywyy, r11.zwzz + imad r4.xy, r5.xzxx, r10.zwzz, r4.xyxx + udiv r4.xy, null, r4.xyxx, l(5, 5, 0, 0) + imul null, r6.xy, r5.yyyy, r18.zwzz + imad r6.xy, r5.xxxx, r16.zwzz, r6.xyxx + udiv r6.xy, null, r6.xyxx, l(5, 5, 0, 0) + imad r10.z, r6.x, l(0x00010000), r4.x + ubfe r8.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww + ubfe r9.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r9.zwww + imul null, r9.xyzw, r5.ywww, r9.xyzw + imad r8.xyzw, r5.xzzz, r8.xyzw, r9.xyzw + udiv r8.xyzw, null, r8.xyzw, l(5, 5, 5, 5) + imad r10.w, r8.x, l(0x00010000), r6.y + ishl r9.xyzw, r7.zzww, l(13, 7, 13, 7) + and r9.xyzw, r9.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) + bfi r7.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r7.zwzz, r9.xzxx + iadd r7.zw, r9.yyyw, r15.zzzw + imad r6.xy, r7.xzxx, l(255, 255, 0, 0), r10.zwzz + ubfe r9.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz + imul null, r9.xyzw, r5.yyyy, r9.xyzw + imad r3.w, r5.x, r12.z, r9.x + udiv r3.w, null, r3.w, l(7) + imad r4.xz, r5.xxxx, r14.zzwz, r9.yyzy + udiv r4.xz, null, r4.xxzx, l(7, 0, 7, 0) + imad r10.z, r4.x, l(0x00010000), r3.w + ubfe r11.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r6.zwww + imad r3.w, r5.x, r11.x, r9.w + udiv r3.w, null, r3.w, l(7) + imad r10.w, r3.w, l(0x00010000), r4.z + movc r4.xz, r3.xxxx, r6.xxyx, r10.zzwz + imad r6.z, r8.y, l(0x00010000), r4.y + imad r6.w, r8.w, l(0x00010000), r8.z + imad r6.xy, r7.ywyy, l(255, 255, 0, 0), r6.zwzz + ubfe r7.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww + imul null, r7.xyzw, r5.wwww, r7.xyzw + imad r3.w, r5.z, r12.w, r7.x + udiv r3.w, null, r3.w, l(7) + imad r7.xyz, r5.zzzz, r11.yzwy, r7.yzwy + udiv r7.xyz, null, r7.xyzx, l(7, 7, 7, 0) + imad r6.z, r7.x, l(0x00010000), r3.w + imad r6.w, r7.z, l(0x00010000), r7.y + movc r4.yw, r3.yyyy, r6.xxxy, r6.zzzw + ishl r4.yw, r4.yyyw, l(0, 8, 0, 8) + or r13.zw, r4.yyyw, r4.xxxz + store_uav_typed U0[0].xyzw, r0.yyyy, r13.xyzw + iadd r3.z, r3.z, l(1) + ilt r3.w, r3.z, CB0[0][2].y + if_nz r3.w + iadd r0.y, r0.z, r0.y + ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) + ushr r4.xyzw, r2.xxyy, l(1, 2, 1, 2) + and r6.xy, r2.xyxx, r4.xzxx + and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) + ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) + ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) + iadd r6.xy, r6.xyxx, r6.zwzz + iadd r6.xy, r6.xyxx, r7.xyxx + and r7.xyzw, r2.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) + iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) + and r6.zw, r6.xxxy, r8.xxxy + or r8.xy, r2.xyxx, r4.xzxx + and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) + or r4.xy, r4.ywyy, r8.xyxx + and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) + xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) + not r9.xyzw, r9.xyzw + and r10.xyzw, r7.xxyy, r9.xxzz + and r9.xyzw, r9.yyww, r10.xyzw + or r2.xy, r2.xyxx, r4.xyxx + iadd r2.xy, r2.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) + or r2.xy, r9.xwxx, r2.xyxx + ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) + or r7.xy, r2.xyxx, r4.xzxx + not r6.xy, r6.xyxx + and r6.xy, r6.xyxx, r7.xyxx + or r6.xy, r6.zwzz, r6.xyxx + iadd r4.xy, r4.ywyy, r4.xzxx + or r2.xy, r2.xyxx, r4.xyxx + movc r4.xy, r0.xwxx, r6.xyxx, r2.xyxx + ushr r6.xyzw, r2.zzww, l(1, 2, 1, 2) + and r2.xy, r2.zwzz, r6.xzxx + and r2.xy, r2.xyxx, l(0x00492492, 0x00492492, 0, 0) + ishl r7.xy, r2.xyxx, l(1, 1, 0, 0) + ushr r8.xy, r2.xyxx, l(1, 1, 0, 0) + iadd r2.xy, r2.xyxx, r7.xyxx + iadd r2.xy, r2.xyxx, r8.xyxx + and r7.xy, r2.xyxx, r8.zwzz + or r8.xy, r2.zwzz, r6.xzxx + and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) + or r6.xy, r6.ywyy, r8.xyxx + and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) + xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) + not r8.xyzw, r9.xyzw + and r9.xyzw, r7.zzww, r8.xxzz + and r8.xyzw, r8.yyww, r9.xyzw + or r2.zw, r2.zzzw, r6.xxxy + iadd r2.zw, r2.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) + or r2.zw, r8.yyyw, r2.zzzw + ishl r6.xyzw, r8.xyzw, l(2, 1, 2, 1) + or r7.zw, r2.zzzw, r6.xxxz + not r2.xy, r2.xyxx + and r2.xy, r2.xyxx, r7.zwzz + or r2.xy, r7.xyxx, r2.xyxx + iadd r6.xy, r6.ywyy, r6.xzxx + or r2.zw, r2.zzzw, r6.xxxy + movc r4.zw, r3.xxxy, r2.xxxy, r2.zzzw + ushr r2.xy, r4.xyxx, l(1, 1, 0, 0) + and r2.xy, r4.xyxx, r2.xyxx + and r2.xy, r2.xyxx, l(1170, 1170, 0, 0) + ishl r2.zw, r2.xxxy, l(0, 0, 1, 1) + ushr r6.xy, r2.xyxx, l(1, 1, 0, 0) + iadd r2.xy, r2.xyxx, r2.zwzz + iadd r2.xy, r2.xyxx, r6.xyxx + not r6.xyzw, r2.xxxy + and r7.xyzw, r4.xxxy, r6.zzzw + iadd r8.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) + and r6.xyzw, r6.xyzw, r8.xyzw + and r2.zw, r6.zzzw, l(0, 0, 7, 7) + and r8.xy, r7.zwzz, l(7, 7, 0, 0) + imul null, r8.xy, r1.ywyy, r8.xyxx + imad r2.zw, r1.xxxz, r2.zzzw, r8.xxxy + udiv r2.zw, null, r2.zzzw, l(0, 0, 5, 5) + ubfe r8.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw + ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw + imul null, r9.xyzw, r1.yyyw, r9.xyzw + imad r8.xyzw, r1.xxxz, r8.xyzw, r9.xyzw + udiv r8.xyzw, null, r8.xyzw, l(5, 5, 5, 5) + imad r9.xy, r8.xwxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz + imad r9.z, r8.z, l(0x00010000), r8.y + and r2.xy, r2.xyxx, r4.xyxx + ishl r8.xyzw, r2.xxyy, l(13, 7, 13, 7) + and r8.xyzw, r8.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) + bfi r10.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r2.xyxx, r8.xzxx + ubfe r2.xy, l(1, 1, 0, 0), l(6, 6, 0, 0), r2.xyxx + iadd r10.zw, r8.yyyw, r2.xxxy + imad r2.xy, r10.xzxx, l(255, 255, 0, 0), r9.xzxx + not r8.xyzw, r4.xxxy + and r2.zw, r8.zzzw, l(0, 0, 7, 7) + and r11.xyzw, r4.xyzw, l(7, 7, 7, 7) + imul null, r6.xy, r1.ywyy, r11.xyxx + imad r2.zw, r1.xxxz, r2.zzzw, r6.xxxy + udiv r2.zw, null, r2.zzzw, l(0, 0, 7, 7) + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw + ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy + imul null, r13.xyzw, r1.yyyw, r13.xyzw + imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw + udiv r12.xyzw, null, r12.xyzw, l(7, 7, 7, 7) + imad r13.xy, r12.xwxx, l(0x00010000, 0x00010000, 0, 0), r2.zwzz + imad r13.z, r12.z, l(0x00010000), r12.y + ubfe r2.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r6.wwww + ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r7.wwww + imul null, r6.xy, r1.wwww, r6.xyxx + imad r2.zw, r1.zzzz, r2.zzzw, r6.xxxy + udiv r2.zw, null, r2.zzzw, l(0, 0, 5, 5) + imad r9.w, r2.w, l(0x00010000), r2.z + imad r2.zw, r10.yyyw, l(0, 0, 255, 255), r9.yyyw + ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r8.wwww + ubfe r7.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww + imul null, r6.zw, r1.wwww, r7.xxxy + imad r6.xy, r1.zzzz, r6.xyxx, r6.zwzz + udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) + imad r13.w, r6.y, l(0x00010000), r6.x + movc r2.xyzw, r0.xxww, r2.xyzw, r13.xzyw + ishl r2.zw, r2.zzzw, l(0, 0, 8, 8) + or r2.xy, r2.zwzz, r2.xyxx + ushr r6.xy, r4.zwzz, l(1, 1, 0, 0) + and r6.xy, r4.zwzz, r6.xyxx + and r6.xy, r6.xyxx, l(1170, 1170, 0, 0) + ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) + ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) + iadd r6.xy, r6.xyxx, r6.zwzz + iadd r6.xy, r6.xyxx, r7.xyxx + not r8.xyzw, r6.xxxy + and r9.xyzw, r4.zzzw, r8.zzzw + iadd r10.xyzw, -r9.zzzw, l(2925, 2925, 2925, 2925) + and r8.xyzw, r8.xyzw, r10.xyzw + and r6.zw, r8.zzzw, l(0, 0, 7, 7) + and r7.xy, r9.zwzz, l(7, 7, 0, 0) + imul null, r7.xyzw, r5.ywww, r7.xyzw + imad r6.zw, r5.xxxz, r6.zzzw, r7.xxxy + udiv r6.zw, null, r6.zzzw, l(0, 0, 5, 5) + ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw + imul null, r12.xyzw, r5.yyyw, r12.xyzw + imad r10.xyzw, r5.xxxz, r10.xyzw, r12.xyzw + udiv r10.xyzw, null, r10.xyzw, l(5, 5, 5, 5) + imad r12.xy, r10.xwxx, l(0x00010000, 0x00010000, 0, 0), r6.zwzz + imad r12.z, r10.z, l(0x00010000), r10.y + and r6.xy, r4.zwzz, r6.xyxx + ishl r10.xyzw, r6.xxyy, l(13, 7, 13, 7) + and r10.xyzw, r10.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) + bfi r13.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.xyxx, r10.xzxx + ubfe r6.xy, l(1, 1, 0, 0), l(6, 6, 0, 0), r6.xyxx + iadd r13.zw, r10.yyyw, r6.xxxy + imad r6.xy, r13.xzxx, l(255, 255, 0, 0), r12.xzxx + not r10.xyzw, r4.zzzw + and r6.zw, r10.zzzw, l(0, 0, 7, 7) + imul null, r7.xy, r5.ywyy, r11.zwzz + imad r6.zw, r5.xxxz, r6.zzzw, r7.xxxy + udiv r6.zw, null, r6.zzzw, l(0, 0, 7, 7) + ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r10.xyzw + ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw + imul null, r14.xyzw, r5.yyyw, r14.xyzw + imad r11.xyzw, r5.xxxz, r11.xyzw, r14.xyzw + udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) + imad r14.xy, r11.xwxx, l(0x00010000, 0x00010000, 0, 0), r6.zwzz + imad r14.z, r11.z, l(0x00010000), r11.y + ubfe r6.zw, l(0, 0, 3, 3), l(0, 0, 6, 9), r8.wwww + ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww + imul null, r7.xy, r5.wwww, r7.xyxx + imad r6.zw, r5.zzzz, r6.zzzw, r7.xxxy + udiv r6.zw, null, r6.zzzw, l(0, 0, 5, 5) + imad r12.w, r6.w, l(0x00010000), r6.z + imad r6.zw, r13.yyyw, l(0, 0, 255, 255), r12.yyyw + ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r10.wwww + imad r7.xy, r5.zzzz, r7.xyxx, r7.zwzz + udiv r7.xy, null, r7.xyxx, l(7, 7, 0, 0) + imad r14.w, r7.y, l(0x00010000), r7.x + movc r6.xyzw, r3.xxyy, r6.xyzw, r14.xzyw + ishl r6.zw, r6.zzzw, l(0, 0, 8, 8) + or r2.zw, r6.zzzw, r6.xxxy + store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw + or r2.x, r3.z, l(3) + ilt r2.x, r2.x, CB0[0][2].y + if_nz r2.x + iadd r0.y, r0.z, r0.y + ushr r2.xyzw, r4.xyzw, l(12, 12, 12, 12) + ushr r6.xyzw, r2.xyzw, l(1, 1, 1, 1) + and r6.xyzw, r2.xyzw, r6.xyzw + and r6.xyzw, r6.xyzw, l(1170, 1170, 1170, 1170) + ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) + ushr r8.xyzw, r6.xyzw, l(1, 1, 1, 1) + iadd r6.xyzw, r6.xyzw, r7.xyzw + iadd r6.xyzw, r6.xyzw, r8.xyzw + not r7.xyzw, r6.xyzw + and r8.xyzw, r2.xyzw, r7.xyzw + iadd r9.xyzw, -r8.xyzw, l(2925, 2925, 2925, 2925) + and r7.xyzw, r7.xyzw, r9.xyzw + and r9.xyzw, r7.xyzw, l(7, 7, 7, 7) + and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) + imul null, r3.zw, r1.yyyw, r10.xxxy + imad r3.zw, r1.xxxz, r9.xxxy, r3.zzzw + udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) + ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xxxy + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy + imul null, r12.xyzw, r1.yyyw, r12.xyzw + imad r11.xyzw, r1.xxxz, r11.xyzw, r12.xyzw + udiv r11.xyzw, null, r11.xyzw, l(5, 5, 5, 5) + imad r12.xy, r11.xwxx, l(0x00010000, 0x00010000, 0, 0), r3.zwzz + imad r12.z, r11.z, l(0x00010000), r11.y + and r6.xyzw, r2.xyzw, r6.xyzw + ishl r11.xyzw, r6.xxyy, l(13, 7, 13, 7) + and r11.xyzw, r11.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) + bfi r13.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.xyxx, r11.xzxx + ubfe r14.xyzw, l(1, 1, 1, 1), l(6, 6, 6, 6), r6.xyzw + iadd r13.zw, r11.yyyw, r14.xxxy + imad r3.zw, r13.xxxz, l(0, 0, 255, 255), r12.xxxz + not r2.xyzw, r2.xyzw + and r11.xyzw, r2.xyzw, l(7, 7, 7, 7) + ubfe r15.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx + imul null, r15.xyzw, r1.yyyy, r15.xyzw + imad r0.z, r1.x, r11.x, r15.x + udiv r0.z, null, r0.z, l(7) + ubfe r16.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r2.xxxy + imad r15.xyz, r1.xxxx, r16.xyzx, r15.yzwy + udiv r15.xyz, null, r15.xyzx, l(7, 7, 7, 0) + imad r1.x, r15.x, l(0x00010000), r0.z + imad r1.y, r15.z, l(0x00010000), r15.y + movc r0.xz, r0.xxxx, r3.zzwz, r1.xxyx + ubfe r15.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r7.yyzz + ubfe r17.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz + imul null, r1.xy, r1.wwww, r17.xyxx + imad r1.xy, r1.zzzz, r15.xyxx, r1.xyxx + udiv r1.xy, null, r1.xyxx, l(5, 5, 0, 0) + imad r12.w, r1.y, l(0x00010000), r1.x + imad r1.xy, r13.ywyy, l(255, 255, 0, 0), r12.ywyy + ubfe r12.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy + imul null, r12.xyzw, r1.wwww, r12.xyzw + imad r1.w, r1.z, r11.y, r12.x + udiv r1.w, null, r1.w, l(7) + imad r2.x, r1.z, r16.w, r12.y + udiv r2.x, null, r2.x, l(7) + imad r4.x, r2.x, l(0x00010000), r1.w + ubfe r13.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r2.yyzz + imad r1.zw, r1.zzzz, r13.xxxy, r12.zzzw + udiv r1.zw, null, r1.zzzw, l(0, 0, 7, 7) + imad r4.y, r1.w, l(0x00010000), r1.z + movc r1.xy, r0.wwww, r1.xyxx, r4.xyxx + ishl r1.xy, r1.xyxx, l(8, 8, 0, 0) + or r1.xy, r0.xzxx, r1.xyxx + imul null, r0.xz, r5.yywy, r10.zzwz + imad r0.xz, r5.xxzx, r9.zzwz, r0.xxzx + udiv r0.xz, null, r0.xxzx, l(5, 0, 5, 0) + imul null, r2.xy, r5.yyyy, r17.zwzz + imad r2.xy, r5.xxxx, r15.zwzz, r2.xyxx + udiv r2.xy, null, r2.xyxx, l(5, 5, 0, 0) + imad r3.z, r2.x, l(0x00010000), r0.x + ubfe r7.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r7.zwww + ubfe r8.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww + imul null, r8.xyzw, r5.ywww, r8.xyzw + imad r7.xyzw, r5.xzzz, r7.xyzw, r8.xyzw + udiv r7.xyzw, null, r7.xyzw, l(5, 5, 5, 5) + imad r3.w, r7.x, l(0x00010000), r2.y + ishl r8.xyzw, r6.zzww, l(13, 7, 13, 7) + and r8.xyzw, r8.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000) + bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.zwzz, r8.xzxx + iadd r6.zw, r8.yyyw, r14.zzzw + imad r0.xw, r6.xxxz, l(255, 0, 0, 255), r3.zzzw + ubfe r8.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz + imul null, r8.xyzw, r5.yyyy, r8.xyzw + imad r2.x, r5.x, r11.z, r8.x + udiv r2.x, null, r2.x, l(7) + imad r3.zw, r5.xxxx, r13.zzzw, r8.yyyz + udiv r3.zw, null, r3.zzzw, l(0, 0, 7, 7) + imad r9.z, r3.z, l(0x00010000), r2.x + ubfe r2.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r2.zwww + imad r2.x, r5.x, r2.x, r8.w + udiv r2.x, null, r2.x, l(7) + imad r9.w, r2.x, l(0x00010000), r3.w + movc r0.xw, r3.xxxx, r0.xxxw, r9.zzzw + imad r3.z, r7.y, l(0x00010000), r0.z + imad r3.w, r7.w, l(0x00010000), r7.z + imad r3.xz, r6.yywy, l(255, 0, 255, 0), r3.zzwz + ubfe r4.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww + imul null, r4.xyzw, r4.xyzw, r5.wwww + imad r0.z, r5.z, r11.w, r4.x + udiv r0.z, null, r0.z, l(7) + imad r2.xyz, r5.zzzz, r2.yzwy, r4.yzwy + udiv r2.xyz, null, r2.xyzx, l(7, 7, 7, 0) + imad r4.z, r2.x, l(0x00010000), r0.z + imad r4.w, r2.z, l(0x00010000), r2.y + movc r2.xy, r3.yyyy, r3.xzxx, r4.zwzz + ishl r2.xy, r2.xyxx, l(8, 8, 0, 0) + or r1.zw, r0.xxxw, r2.xxxy + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + endif + endif +endif +ret +// Approximately 702 instruction slots used +#endif + +const BYTE texture_load_dxn_rg8_cs[] = +{ + 68, 88, 66, 67, 102, 43, + 3, 44, 152, 166, 42, 168, + 183, 182, 41, 83, 83, 126, + 36, 112, 1, 0, 0, 0, + 140, 107, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 240, 106, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 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0, + 58, 0, 16, 0, 11, 0, + 0, 0, 10, 0, 16, 0, + 4, 0, 0, 0, 78, 0, + 0, 8, 66, 0, 16, 0, + 0, 0, 0, 0, 0, 208, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 7, 0, 0, 0, + 35, 0, 0, 9, 114, 0, + 16, 0, 2, 0, 0, 0, + 166, 10, 16, 0, 5, 0, + 0, 0, 150, 7, 16, 0, + 2, 0, 0, 0, 150, 7, + 16, 0, 4, 0, 0, 0, + 78, 0, 0, 11, 114, 0, + 16, 0, 2, 0, 0, 0, + 0, 208, 0, 0, 70, 2, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 7, 0, + 0, 0, 7, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 66, 0, 16, 0, 4, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 1, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 35, 0, 0, 9, + 130, 0, 16, 0, 4, 0, + 0, 0, 42, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 1, 0, + 26, 0, 16, 0, 2, 0, + 0, 0, 55, 0, 0, 9, + 50, 0, 16, 0, 2, 0, + 0, 0, 86, 5, 16, 0, + 3, 0, 0, 0, 134, 0, + 16, 0, 3, 0, 0, 0, + 230, 10, 16, 0, 4, 0, + 0, 0, 41, 0, 0, 10, + 50, 0, 16, 0, 2, 0, + 0, 0, 70, 0, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 60, 0, 0, 7, 194, 0, + 16, 0, 1, 0, 0, 0, + 6, 12, 16, 0, 0, 0, + 0, 0, 6, 4, 16, 0, + 2, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 86, 5, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 21, 0, 0, 1, 21, 0, + 0, 1, 21, 0, 0, 1, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 190, 2, 0, 0, 19, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 31, 1, 0, 0, + 7, 1, 0, 0, 6, 0, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 0, 0, 19, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt1_rgba8_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt1_rgba8_cs.h new file mode 100644 index 000000000..ecab99378 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt1_rgba8_cs.h @@ -0,0 +1,6908 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 16 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +ishl r0.y, r0.y, l(2) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw + mov r3.xy, r2.ywyy +else + mov r3.xy, r2.ywyy +endif +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r4.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw + mov r3.zw, r4.yyyw +else + mov r3.zw, r4.yyyw +endif +ishl r1.xyz, r2.xxxx, l(3, 7, 12, 0) +ushr r5.xyz, r2.xxxx, l(13, 4, 9, 0) +mov r1.w, r5.x +and r0.xw, r1.xxxw, l(248, 0, 0, 248) +mov r5.xw, r1.zzzy +and r1.xy, r5.wzww, l(0x0003f000, 0x0003f000, 0, 0) +iadd r0.xw, r0.xxxw, r1.xxxy +and r1.xy, r5.xyxx, l(0x0f800000, 0x0f800000, 0, 0) +iadd r0.xw, r0.xxxw, r1.xxxy +ushr r1.xy, r0.xwxx, l(5, 5, 0, 0) +and r1.xy, r1.xyxx, l(0x00700007, 0x00700007, 0, 0) +iadd r0.xw, r0.xxxw, r1.xxxy +ushr r1.xy, r0.xwxx, l(6, 6, 0, 0) +and r1.xy, r1.xyxx, l(3072, 3072, 0, 0) +iadd r0.xw, r0.xxxw, r1.xxxy +ishl r1.xyz, r2.zzzz, l(3, 7, 12, 0) +ushr r2.xyz, r2.zzzz, l(13, 4, 9, 0) +mov r1.w, r2.x +and r1.xw, r1.xxxw, l(248, 0, 0, 248) +mov r2.xw, r1.zzzy +and r2.zw, r2.wwwz, l(0, 0, 0x0003f000, 0x0003f000) +iadd r1.xy, r1.xwxx, r2.zwzz +and r1.zw, r2.xxxy, l(0, 0, 0x0f800000, 0x0f800000) +iadd r1.xy, r1.zwzz, r1.xyxx +ushr r1.zw, r1.xxxy, l(0, 0, 5, 5) +and r1.zw, r1.zzzw, l(0, 0, 0x00700007, 0x00700007) +iadd r1.xy, r1.zwzz, r1.xyxx +ushr r1.zw, r1.xxxy, l(0, 0, 6, 6) +and r1.zw, r1.zzzw, l(0, 0, 3072, 3072) +iadd r1.xy, r1.wzww, r1.yxyy +ishl r2.xyz, r4.xxxx, l(3, 7, 12, 0) +ushr r5.xyz, r4.xxxx, l(13, 4, 9, 0) +mov r2.w, r5.x +and r2.xw, r2.xxxw, l(248, 0, 0, 248) +mov r5.xw, r2.zzzy +and r4.xy, r5.wzww, l(0x0003f000, 0x0003f000, 0, 0) +iadd r2.xy, r2.xwxx, r4.xyxx +and r2.zw, r5.xxxy, l(0, 0, 0x0f800000, 0x0f800000) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r2.zw, r2.xxxy, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x00700007, 0x00700007) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r2.zw, r2.xxxy, l(0, 0, 6, 6) +and r2.zw, r2.zzzw, l(0, 0, 3072, 3072) +iadd r2.xy, r2.zwzz, r2.xyxx +ishl r5.xyz, r4.zzzz, l(3, 7, 12, 0) +ushr r4.xyz, r4.zzzz, l(13, 4, 9, 0) +mov r5.w, r4.x +and r2.zw, r5.xxxw, l(0, 0, 248, 248) +mov r4.xw, r5.zzzy +and r4.zw, r4.wwwz, l(0, 0, 0x0003f000, 0x0003f000) +iadd r2.zw, r2.zzzw, r4.zzzw +and r4.xy, r4.xyxx, l(0x0f800000, 0x0f800000, 0, 0) +iadd r2.zw, r2.zzzw, r4.xxxy +ushr r4.xy, r2.zwzz, l(5, 5, 0, 0) +and r4.xy, r4.xyxx, l(0x00700007, 0x00700007, 0, 0) +iadd r2.zw, r2.zzzw, r4.xxxy +ushr r4.xy, r2.zwzz, l(6, 6, 0, 0) +and r4.xy, r4.xyxx, l(3072, 3072, 0, 0) +iadd r2.zw, r2.zzzw, r4.xxxy +mov r4.x, r0.w +mov r4.y, r1.x +mov r4.zw, r2.yyyw +mov r1.x, r0.x +mov r1.zw, r2.xxxz +uge r5.xyzw, r4.xyzw, r1.xyzw +not r6.xyzw, r3.xyzw +ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) +and r7.xyzw, r7.xyzw, l(0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa) +xor r6.xyzw, r6.xyzw, r7.xyzw +ishl r7.xyzw, r3.xyzw, l(1, 1, 1, 1) +and r7.xyzw, r7.xyzw, l(0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa) +ushr r3.xyzw, r3.xyzw, l(1, 1, 1, 1) +and r3.xyzw, r3.xyzw, l(0x55555555, 0x55555555, 0x55555555, 0x55555555) +iadd r3.xyzw, r3.xyzw, r7.xyzw +ushr r7.xyzw, r3.xyzw, l(1, 1, 1, 1) +and r7.xyzw, r7.xyzw, l(0x55555555, 0x55555555, 0x55555555, 0x55555555) +xor r3.xyzw, r3.xyzw, r7.xyzw +movc r3.xyzw, r5.xyzw, r6.xyzw, r3.xyzw +ushr r6.xyzw, r3.xxxx, l(2, 4, 6, 1) +mov r7.x, r3.x +mov r7.yzw, r6.xxyz +and r8.xyzw, r7.xyzw, l(1, 1, 1, 1) +ubfe r9.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r7.xxxx +imul null, r9.xyzw, r0.wwww, r9.xyzw +imad r8.xyzw, r8.xyzw, r1.xxxx, r9.xyzw +and r9.x, r6.w, r7.x +and r10.x, r9.x, l(0x55555555) +ushr r9.yzw, r10.xxxx, l(0, 2, 4, 6) +and r11.xyzw, r9.xyzw, l(1, 1, 1, 1) +or r6.x, r6.w, r7.x +ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r8.xyzw +ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) +mov r10.yzw, r9.yyzw +bfi r9.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r10.xyzw, l(10, 10, 10, 10) +ubfe r9.xyzw, l(9, 9, 9, 9), r9.xyzw, r8.xyzw +ishl r9.xyzw, r9.xyzw, l(8, 8, 8, 8) +iadd r9.xyzw, r9.xyzw, r11.xyzw +bfi r10.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r10.xyzw, l(20, 20, 20, 20) +ushr r8.xyzw, r8.xyzw, r10.xyzw +iadd r8.xyzw, r8.xyzw, r9.xyzw +ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) +imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r8.xyzw +not r8.xyzw, r3.wxyz +ushr r9.yzw, r8.yyyy, l(0, 2, 4, 6) +mov r9.x, r8.y +and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) +and r10.xyzw, r7.xyzw, l(3, 3, 3, 3) +imul null, r10.xyzw, r0.wwww, r10.xyzw +imad r9.xyzw, r9.xyzw, r1.xxxx, r10.xyzw +and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) +udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) +ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) +ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw +udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) +bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw +ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20) +udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) +or r9.xyzw, r9.xyzw, r10.xyzw +or r9.xyzw, r9.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) +movc r6.xyzw, r5.xxxx, r6.xyzw, r9.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw +iadd r4.xzw, r0.yyyy, l(1, 0, 2, 3) +ushr r6.xyzw, r3.yyyy, l(2, 4, 6, 1) +mov r9.x, r3.y +mov r9.yzw, r6.xxyz +and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) +ubfe r11.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.yyyy +imul null, r11.xyzw, r4.yyyy, r11.xyzw +imad r10.xyzw, r10.xyzw, r1.yyyy, r11.xyzw +and r11.x, r3.y, r6.w +and r12.x, r11.x, l(0x55555555) +ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) +and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) +or r6.x, r3.y, r6.w +ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw +ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) +mov r12.yzw, r11.yyzw +bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) +ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw +ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) +iadd r11.xyzw, r11.xyzw, r13.xyzw +bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) +ushr r10.xyzw, r10.xyzw, r12.xyzw +iadd r10.xyzw, r10.xyzw, r11.xyzw +ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) +imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw +ushr r10.yzw, r8.zzzz, l(0, 2, 4, 6) +mov r10.x, r8.z +and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) +and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) +imul null, r9.xyzw, r4.yyyy, r9.xyzw +imad r9.xyzw, r10.xyzw, r1.yyyy, r9.xyzw +and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) +udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) +ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) +ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw +udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) +bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw +ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20) +udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) +or r9.xyzw, r9.xyzw, r10.xyzw +or r9.xyzw, r9.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) +movc r6.xyzw, r5.yyyy, r6.xyzw, r9.xyzw +store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw +ushr r6.xyzw, r3.zzzz, l(2, 4, 6, 1) +mov r9.x, r3.z +mov r9.yzw, r6.xxyz +and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) +ubfe r11.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.zzzz +imul null, r11.xyzw, r2.yyyy, r11.xyzw +imad r10.xyzw, r10.xyzw, r2.xxxx, r11.xyzw +and r11.x, r3.z, r6.w +and r12.x, r11.x, l(0x55555555) +ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) +and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) +or r6.x, r3.z, r6.w +ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw +ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) +mov r12.yzw, r11.yyzw +bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) +ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw +ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) +iadd r11.xyzw, r11.xyzw, r13.xyzw +bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) +ushr r10.xyzw, r10.xyzw, r12.xyzw +iadd r10.xyzw, r10.xyzw, r11.xyzw +ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) +imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw +ushr r10.yzw, r8.wwww, l(0, 2, 4, 6) +mov r10.x, r8.w +and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) +and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) +imul null, r9.xyzw, r2.yyyy, r9.xyzw +imad r9.xyzw, r10.xyzw, r2.xxxx, r9.xyzw +and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) +udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) +ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) +ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r9.xyzw +udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) +bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw +ushr r9.xyzw, r9.xyzw, l(20, 20, 20, 20) +udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) +or r9.xyzw, r9.xyzw, r10.xyzw +or r9.xyzw, r9.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) +movc r6.xyzw, r5.zzzz, r6.xyzw, r9.xyzw +store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw +ushr r6.xyzw, r3.wwww, l(2, 4, 6, 1) +mov r9.x, r3.w +mov r9.yzw, r6.xxyz +and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) +ubfe r11.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.wwww +imul null, r11.xyzw, r2.wwww, r11.xyzw +imad r10.xyzw, r10.xyzw, r2.zzzz, r11.xyzw +and r11.x, r3.w, r6.w +and r12.x, r11.x, l(0x55555555) +ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) +and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) +or r6.x, r3.w, r6.w +ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw +ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) +mov r12.yzw, r11.yyzw +bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) +ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw +ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) +iadd r11.xyzw, r11.xyzw, r13.xyzw +bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) +ushr r10.xyzw, r10.xyzw, r12.xyzw +iadd r10.xyzw, r10.xyzw, r11.xyzw +ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) +imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw +ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) +and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) +and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) +imul null, r9.xyzw, r2.wwww, r9.xyzw +imad r8.xyzw, r8.xyzw, r2.zzzz, r9.xyzw +and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) +udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) +ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) +ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw +udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) +bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw +ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) +udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) +or r8.xyzw, r8.xyzw, r9.xyzw +or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) +movc r6.xyzw, r5.wwww, r6.xyzw, r8.xyzw +store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw +imad r0.x, vThreadID.y, l(4), l(1) +ilt r0.x, r0.x, CB0[0][2].y +if_nz r0.x + iadd r0.y, r0.z, r0.y + ushr r6.xyzw, r3.xyzw, l(8, 8, 8, 8) + ushr r8.xyzw, r6.xxxx, l(2, 4, 6, 1) + mov r9.x, r6.x + mov r9.yzw, r8.xxyz + and r10.xyzw, r9.xyzw, l(1, 1, 1, 1) + ubfe r11.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r7.xxxx + imul null, r11.xyzw, r0.wwww, r11.xyzw + imad r10.xyzw, r10.xyzw, r1.xxxx, r11.xyzw + and r11.x, r8.w, r9.x + and r12.x, r11.x, l(0x00555555) + ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) + and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) + or r8.x, r8.w, r9.x + ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw + ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + mov r12.yzw, r11.yyzw + bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) + ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw + ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) + iadd r11.xyzw, r11.xyzw, r13.xyzw + bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) + ushr r10.xyzw, r10.xyzw, r12.xyzw + iadd r10.xyzw, r10.xyzw, r11.xyzw + ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) + and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) + imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw + not r10.xyzw, r6.wxyz + ushr r11.yzw, r10.yyyy, l(0, 2, 4, 6) + mov r11.x, r10.y + and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) + and r12.xyzw, r9.xyzw, l(3, 3, 3, 3) + imul null, r12.xyzw, r0.wwww, r12.xyzw + imad r11.xyzw, r11.xyzw, r1.xxxx, r12.xyzw + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw + udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3) + bfi r12.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r13.xyzw, r12.xyzw + ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20) + udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) + or r11.xyzw, r11.xyzw, r12.xyzw + or r11.xyzw, r11.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r8.xyzw, r5.xxxx, r8.xyzw, r11.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r8.xyzw + iadd r4.xzw, r0.yyyy, l(1, 0, 2, 3) + ushr r8.xyzw, r6.yyyy, l(2, 4, 6, 1) + mov r11.x, r6.y + mov r11.yzw, r8.xxyz + and r12.xyzw, r11.xyzw, l(1, 1, 1, 1) + ubfe r13.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.yyyy + imul null, r13.xyzw, r4.yyyy, r13.xyzw + imad r12.xyzw, r12.xyzw, r1.yyyy, r13.xyzw + and r13.x, r6.y, r8.w + and r14.x, r13.x, l(0x00555555) + ushr r13.yzw, r14.xxxx, l(0, 2, 4, 6) + and r15.xyzw, r13.xyzw, l(1, 1, 1, 1) + or r8.x, r6.y, r8.w + ubfe r15.xyzw, l(9, 9, 9, 9), r15.xyzw, r12.xyzw + ishl r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + mov r14.yzw, r13.yyzw + bfi r13.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r14.xyzw, l(10, 10, 10, 10) + ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r12.xyzw + ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8) + iadd r13.xyzw, r13.xyzw, r15.xyzw + bfi r14.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r14.xyzw, l(20, 20, 20, 20) + ushr r12.xyzw, r12.xyzw, r14.xyzw + iadd r12.xyzw, r12.xyzw, r13.xyzw + ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) + and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) + imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r12.xyzw + ushr r12.yzw, r10.zzzz, l(0, 2, 4, 6) + mov r12.x, r10.z + and r12.xyzw, r12.xyzw, l(3, 3, 3, 3) + and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) + imul null, r11.xyzw, r4.yyyy, r11.xyzw + imad r11.xyzw, r12.xyzw, r1.yyyy, r11.xyzw + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw + udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3) + bfi r12.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r13.xyzw, r12.xyzw + ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20) + udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) + or r11.xyzw, r11.xyzw, r12.xyzw + or r11.xyzw, r11.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r8.xyzw, r5.yyyy, r8.xyzw, r11.xyzw + store_uav_typed U0[0].xyzw, r4.xxxx, r8.xyzw + ushr r8.xyzw, r6.zzzz, l(2, 4, 6, 1) + mov r11.x, r6.z + mov r11.yzw, r8.xxyz + and r12.xyzw, r11.xyzw, l(1, 1, 1, 1) + ubfe r13.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.zzzz + imul null, r13.xyzw, r2.yyyy, r13.xyzw + imad r12.xyzw, r12.xyzw, r2.xxxx, r13.xyzw + and r13.x, r6.z, r8.w + and r14.x, r13.x, l(0x00555555) + ushr r13.yzw, r14.xxxx, l(0, 2, 4, 6) + and r15.xyzw, r13.xyzw, l(1, 1, 1, 1) + or r8.x, r6.z, r8.w + ubfe r15.xyzw, l(9, 9, 9, 9), r15.xyzw, r12.xyzw + ishl r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + mov r14.yzw, r13.yyzw + bfi r13.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r14.xyzw, l(10, 10, 10, 10) + ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r12.xyzw + ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8) + iadd r13.xyzw, r13.xyzw, r15.xyzw + bfi r14.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r14.xyzw, l(20, 20, 20, 20) + ushr r12.xyzw, r12.xyzw, r14.xyzw + iadd r12.xyzw, r12.xyzw, r13.xyzw + ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) + and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) + imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r12.xyzw + ushr r12.yzw, r10.wwww, l(0, 2, 4, 6) + mov r12.x, r10.w + and r12.xyzw, r12.xyzw, l(3, 3, 3, 3) + and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) + imul null, r11.xyzw, r2.yyyy, r11.xyzw + imad r11.xyzw, r12.xyzw, r2.xxxx, r11.xyzw + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + ubfe r13.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r11.xyzw + udiv r13.xyzw, null, r13.xyzw, l(3, 3, 3, 3) + bfi r12.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r13.xyzw, r12.xyzw + ushr r11.xyzw, r11.xyzw, l(20, 20, 20, 20) + udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) + or r11.xyzw, r11.xyzw, r12.xyzw + or r11.xyzw, r11.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r8.xyzw, r5.zzzz, r8.xyzw, r11.xyzw + store_uav_typed U0[0].xyzw, r4.zzzz, r8.xyzw + ushr r8.xyzw, r6.wwww, l(2, 4, 6, 1) + mov r11.x, r6.w + mov r11.yzw, r8.xxyz + and r12.xyzw, r11.xyzw, l(1, 1, 1, 1) + ubfe r13.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.wwww + imul null, r13.xyzw, r2.wwww, r13.xyzw + imad r12.xyzw, r12.xyzw, r2.zzzz, r13.xyzw + and r13.x, r6.w, r8.w + and r14.x, r13.x, l(0x00555555) + ushr r13.yzw, r14.xxxx, l(0, 2, 4, 6) + and r15.xyzw, r13.xyzw, l(1, 1, 1, 1) + or r8.x, r6.w, r8.w + ubfe r15.xyzw, l(9, 9, 9, 9), r15.xyzw, r12.xyzw + ishl r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + mov r14.yzw, r13.yyzw + bfi r13.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r14.xyzw, l(10, 10, 10, 10) + ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r12.xyzw + ishl r13.xyzw, r13.xyzw, l(8, 8, 8, 8) + iadd r13.xyzw, r13.xyzw, r15.xyzw + bfi r14.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r14.xyzw, l(20, 20, 20, 20) + ushr r12.xyzw, r12.xyzw, r14.xyzw + iadd r12.xyzw, r12.xyzw, r13.xyzw + ushr r8.yzw, r8.xxxx, l(0, 2, 4, 6) + and r8.xyzw, r8.xyzw, l(1, 1, 1, 1) + imad r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r12.xyzw + ushr r10.yzw, r10.xxxx, l(0, 2, 4, 6) + and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) + and r11.xyzw, r11.xyzw, l(3, 3, 3, 3) + imul null, r11.xyzw, r2.wwww, r11.xyzw + imad r10.xyzw, r10.xyzw, r2.zzzz, r11.xyzw + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + ubfe r12.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r10.xyzw + udiv r12.xyzw, null, r12.xyzw, l(3, 3, 3, 3) + bfi r11.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r12.xyzw, r11.xyzw + ushr r10.xyzw, r10.xyzw, l(20, 20, 20, 20) + udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) + or r10.xyzw, r10.xyzw, r11.xyzw + or r10.xyzw, r10.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r8.xyzw, r5.wwww, r8.xyzw, r10.xyzw + store_uav_typed U0[0].xyzw, r4.wwww, r8.xyzw + imad r0.x, vThreadID.y, l(4), l(2) + ilt r0.x, r0.x, CB0[0][2].y + not r1.z, r0.x + if_nz r0.x + iadd r0.y, r0.z, r0.y + ushr r3.xyzw, r6.xyzw, l(8, 8, 8, 8) + else + mov r3.x, r9.x + mov r3.yzw, r6.yyzw + endif + if_z r1.z + ushr r6.xyzw, r3.xxxx, l(2, 4, 6, 1) + mov r8.x, r3.x + mov r8.yzw, r6.xxyz + and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) + ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.xxxx + imul null, r10.xyzw, r0.wwww, r10.xyzw + imad r9.xyzw, r9.xyzw, r1.xxxx, r10.xyzw + and r10.x, r3.x, r6.w + and r11.x, r10.x, l(0x00555555) + ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) + and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) + or r6.x, r3.x, r6.w + ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + mov r11.yzw, r10.yyzw + bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) + ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw + ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) + iadd r10.xyzw, r10.xyzw, r12.xyzw + bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) + ushr r9.xyzw, r9.xyzw, r11.xyzw + iadd r9.xyzw, r9.xyzw, r10.xyzw + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) + imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw + not r9.x, r3.x + ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) + and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) + and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) + imul null, r8.xyzw, r0.wwww, r8.xyzw + imad r8.xyzw, r9.xyzw, r1.xxxx, r8.xyzw + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw + udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) + bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw + ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + or r8.xyzw, r8.xyzw, r9.xyzw + or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r6.xyzw, r5.xxxx, r6.xyzw, r8.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw + iadd r4.xzw, r0.yyyy, l(1, 0, 2, 3) + ushr r6.xyzw, r3.yyyy, l(2, 4, 6, 1) + mov r8.x, r3.y + mov r8.yzw, r6.xxyz + and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) + ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.yyyy + imul null, r10.xyzw, r4.yyyy, r10.xyzw + imad r9.xyzw, r9.xyzw, r1.yyyy, r10.xyzw + and r10.x, r3.y, r6.w + and r11.x, r10.x, l(0x00555555) + ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) + and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) + or r6.x, r3.y, r6.w + ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + mov r11.yzw, r10.yyzw + bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) + ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw + ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) + iadd r10.xyzw, r10.xyzw, r12.xyzw + bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) + ushr r9.xyzw, r9.xyzw, r11.xyzw + iadd r9.xyzw, r9.xyzw, r10.xyzw + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) + imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw + not r9.x, r3.y + ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) + and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) + and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) + imul null, r8.xyzw, r4.yyyy, r8.xyzw + imad r8.xyzw, r9.xyzw, r1.yyyy, r8.xyzw + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw + udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) + bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw + ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + or r8.xyzw, r8.xyzw, r9.xyzw + or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r6.xyzw, r5.yyyy, r6.xyzw, r8.xyzw + store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw + ushr r6.xyzw, r3.zzzz, l(2, 4, 6, 1) + mov r8.x, r3.z + mov r8.yzw, r6.xxyz + and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) + ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.zzzz + imul null, r10.xyzw, r2.yyyy, r10.xyzw + imad r9.xyzw, r9.xyzw, r2.xxxx, r10.xyzw + and r10.x, r3.z, r6.w + and r11.x, r10.x, l(0x00555555) + ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) + and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) + or r6.x, r3.z, r6.w + ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + mov r11.yzw, r10.yyzw + bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) + ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw + ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) + iadd r10.xyzw, r10.xyzw, r12.xyzw + bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) + ushr r9.xyzw, r9.xyzw, r11.xyzw + iadd r9.xyzw, r9.xyzw, r10.xyzw + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) + imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw + not r9.x, r3.z + ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) + and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) + and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) + imul null, r8.xyzw, r2.yyyy, r8.xyzw + imad r8.xyzw, r9.xyzw, r2.xxxx, r8.xyzw + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw + udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) + bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw + ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + or r8.xyzw, r8.xyzw, r9.xyzw + or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r6.xyzw, r5.zzzz, r6.xyzw, r8.xyzw + store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw + ushr r6.xyzw, r3.wwww, l(2, 4, 6, 1) + mov r8.x, r3.w + mov r8.yzw, r6.xxyz + and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) + ubfe r10.xyzw, l(1, 1, 1, 1), l(1, 3, 5, 7), r3.wwww + imul null, r10.xyzw, r2.wwww, r10.xyzw + imad r9.xyzw, r9.xyzw, r2.zzzz, r10.xyzw + and r10.x, r3.w, r6.w + and r11.x, r10.x, l(0x00555555) + ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) + and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) + or r6.x, r3.w, r6.w + ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + mov r11.yzw, r10.yyzw + bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) + ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw + ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) + iadd r10.xyzw, r10.xyzw, r12.xyzw + bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) + ushr r9.xyzw, r9.xyzw, r11.xyzw + iadd r9.xyzw, r9.xyzw, r10.xyzw + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(1, 1, 1, 1) + imad r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw + not r9.x, r3.w + ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) + and r9.xyzw, r9.xyzw, l(3, 3, 3, 3) + and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) + imul null, r8.xyzw, r2.wwww, r8.xyzw + imad r8.xyzw, r9.xyzw, r2.zzzz, r8.xyzw + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + udiv r9.xyzw, null, r9.xyzw, l(3, 3, 3, 3) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + ubfe r10.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw + udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) + bfi r9.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.xyzw, r9.xyzw + ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + or r8.xyzw, r8.xyzw, r9.xyzw + or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r6.xyzw, r5.wwww, r6.xyzw, r8.xyzw + store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw + endif +else + mov r3.x, r7.x + mov r1.z, l(-1) +endif +if_z r1.z + imad r0.x, vThreadID.y, l(4), l(3) + ilt r0.x, r0.x, CB0[0][2].y + if_nz r0.x + iadd r0.x, r0.z, r0.y + ushr r6.xyzw, r3.wxyz, l(8, 8, 8, 8) + ushr r7.xyzw, r6.yyyy, l(2, 4, 6, 1) + mov r8.x, r6.y + mov r8.yzw, r7.xxyz + and r9.xyzw, r8.xyzw, l(1, 1, 1, 1) + ubfe r10.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.xxxx + imul null, r10.xyzw, r0.wwww, r10.xyzw + imad r9.xyzw, r9.xyzw, r1.xxxx, r10.xyzw + and r10.x, r7.w, r8.x + and r11.x, r10.x, l(0x00555555) + ushr r10.yzw, r11.xxxx, l(0, 2, 4, 6) + and r12.xyzw, r10.xyzw, l(1, 1, 1, 1) + or r7.x, r7.w, r8.x + ubfe r12.xyzw, l(9, 9, 9, 9), r12.xyzw, r9.xyzw + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + mov r11.yzw, r10.yyzw + bfi r10.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r11.xyzw, l(10, 10, 10, 10) + ubfe r10.xyzw, l(9, 9, 9, 9), r10.xyzw, r9.xyzw + ishl r10.xyzw, r10.xyzw, l(8, 8, 8, 8) + iadd r10.xyzw, r10.xyzw, r12.xyzw + bfi r11.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r11.xyzw, l(20, 20, 20, 20) + ushr r9.xyzw, r9.xyzw, r11.xyzw + iadd r9.xyzw, r9.xyzw, r10.xyzw + ushr r7.yzw, r7.xxxx, l(0, 2, 4, 6) + and r7.xyzw, r7.xyzw, l(1, 1, 1, 1) + imad r7.xyzw, r7.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r9.xyzw + not r9.xyzw, r6.xyzw + ushr r10.yzw, r9.yyyy, l(0, 2, 4, 6) + mov r10.x, r9.y + and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) + and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) + imul null, r8.xyzw, r0.wwww, r8.xyzw + imad r8.xyzw, r10.xyzw, r1.xxxx, r8.xyzw + and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + udiv r10.xyzw, null, r10.xyzw, l(3, 3, 3, 3) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + ubfe r11.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r8.xyzw + udiv r11.xyzw, null, r11.xyzw, l(3, 3, 3, 3) + bfi r10.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.xyzw, r10.xyzw + ushr r8.xyzw, r8.xyzw, l(20, 20, 20, 20) + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + or r8.xyzw, r8.xyzw, r10.xyzw + or r8.xyzw, r8.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r7.xyzw, r5.xxxx, r7.xyzw, r8.xyzw + store_uav_typed U0[0].xyzw, r0.xxxx, r7.xyzw + iadd r0.yzw, r0.xxxx, l(0, 1, 2, 3) + ushr r7.xyzw, r6.zzzz, l(2, 4, 6, 1) + mov r8.x, r6.z + mov r8.yzw, r7.xxyz + and r10.xyzw, r8.xyzw, l(1, 1, 1, 1) + ubfe r11.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.yyyy + imul null, r11.xyzw, r4.yyyy, r11.xyzw + imad r10.xyzw, r10.xyzw, r1.yyyy, r11.xyzw + and r11.x, r6.z, r7.w + and r12.x, r11.x, l(0x00555555) + ushr r11.yzw, r12.xxxx, l(0, 2, 4, 6) + and r13.xyzw, r11.xyzw, l(1, 1, 1, 1) + or r7.x, r6.z, r7.w + ubfe r13.xyzw, l(9, 9, 9, 9), r13.xyzw, r10.xyzw + ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + mov r12.yzw, r11.yyzw + bfi r11.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r12.xyzw, l(10, 10, 10, 10) + ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r10.xyzw + ishl r11.xyzw, r11.xyzw, l(8, 8, 8, 8) + iadd r11.xyzw, r11.xyzw, r13.xyzw + bfi r12.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r12.xyzw, l(20, 20, 20, 20) + ushr r10.xyzw, r10.xyzw, r12.xyzw + iadd r10.xyzw, r10.xyzw, r11.xyzw + ushr r7.yzw, r7.xxxx, l(0, 2, 4, 6) + and r7.xyzw, r7.xyzw, l(1, 1, 1, 1) + imad r7.xyzw, r7.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r10.xyzw + ushr r10.yzw, r9.zzzz, l(0, 2, 4, 6) + mov r10.x, r9.z + and r10.xyzw, r10.xyzw, l(3, 3, 3, 3) + and r8.xyzw, r8.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r4.yyyy, r8.xyzw + imad r1.xyzw, r10.xyzw, r1.yyyy, r4.xyzw + and r4.xyzw, r1.xyzw, l(1023, 1023, 1023, 1023) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) + ubfe r8.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r1.xyzw + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + bfi r4.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r8.xyzw, r4.xyzw + ushr r1.xyzw, r1.xyzw, l(20, 20, 20, 20) + udiv r1.xyzw, null, r1.xyzw, l(3, 3, 3, 3) + or r1.xyzw, r1.xyzw, r4.xyzw + or r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r1.xyzw, r5.yyyy, r7.xyzw, r1.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + ushr r1.xyzw, r6.wwww, l(2, 4, 6, 1) + mov r4.x, r6.w + mov r4.yzw, r1.xxyz + and r7.xyzw, r4.xyzw, l(1, 1, 1, 1) + ubfe r8.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.zzzz + imul null, r8.xyzw, r2.yyyy, r8.xyzw + imad r7.xyzw, r7.xyzw, r2.xxxx, r8.xyzw + and r8.x, r6.w, r1.w + and r10.x, r8.x, l(0x00555555) + ushr r8.yzw, r10.xxxx, l(0, 2, 4, 6) + and r11.xyzw, r8.xyzw, l(1, 1, 1, 1) + or r1.x, r1.w, r6.w + ubfe r11.xyzw, l(9, 9, 9, 9), r11.xyzw, r7.xyzw + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + mov r10.yzw, r8.yyzw + bfi r8.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r10.xyzw, l(10, 10, 10, 10) + ubfe r8.xyzw, l(9, 9, 9, 9), r8.xyzw, r7.xyzw + ishl r8.xyzw, r8.xyzw, l(8, 8, 8, 8) + iadd r8.xyzw, r8.xyzw, r11.xyzw + bfi r10.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r10.xyzw, l(20, 20, 20, 20) + ushr r7.xyzw, r7.xyzw, r10.xyzw + iadd r7.xyzw, r7.xyzw, r8.xyzw + ushr r1.yzw, r1.xxxx, l(0, 2, 4, 6) + and r1.xyzw, r1.xyzw, l(1, 1, 1, 1) + imad r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r7.xyzw + ushr r7.yzw, r9.wwww, l(0, 2, 4, 6) + mov r7.x, r9.w + and r7.xyzw, r7.xyzw, l(3, 3, 3, 3) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r2.yyyy, r4.xyzw + imad r4.xyzw, r7.xyzw, r2.xxxx, r4.xyzw + and r7.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + ubfe r8.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw + udiv r8.xyzw, null, r8.xyzw, l(3, 3, 3, 3) + bfi r7.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r8.xyzw, r7.xyzw + ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + or r4.xyzw, r4.xyzw, r7.xyzw + or r4.xyzw, r4.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r1.xyzw, r5.zzzz, r1.xyzw, r4.xyzw + store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw + ushr r1.xyzw, r6.xxxx, l(2, 4, 6, 1) + mov r6.yzw, r1.xxyz + and r4.xyzw, r6.xyzw, l(1, 1, 1, 1) + ubfe r3.xyzw, l(1, 1, 1, 1), l(9, 11, 13, 15), r3.wwww + imul null, r3.xyzw, r2.wwww, r3.xyzw + imad r3.xyzw, r4.xyzw, r2.zzzz, r3.xyzw + and r4.x, r6.x, r1.w + and r7.x, r4.x, l(0x00555555) + ushr r4.yzw, r7.xxxx, l(0, 2, 4, 6) + and r8.xyzw, r4.xyzw, l(1, 1, 1, 1) + or r1.x, r1.w, r6.x + ubfe r8.xyzw, l(9, 9, 9, 9), r8.xyzw, r3.xyzw + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + mov r7.yzw, r4.yyzw + bfi r4.xyzw, l(1, 1, 1, 1), l(0, 0, 0, 0), r7.xyzw, l(10, 10, 10, 10) + ubfe r4.xyzw, l(9, 9, 9, 9), r4.xyzw, r3.xyzw + ishl r4.xyzw, r4.xyzw, l(8, 8, 8, 8) + iadd r4.xyzw, r4.xyzw, r8.xyzw + bfi r7.xyzw, l(2, 2, 2, 2), l(0, 0, 0, 0), r7.xyzw, l(20, 20, 20, 20) + ushr r3.xyzw, r3.xyzw, r7.xyzw + iadd r3.xyzw, r3.xyzw, r4.xyzw + ushr r1.yzw, r1.xxxx, l(0, 2, 4, 6) + and r1.xyzw, r1.xyzw, l(1, 1, 1, 1) + imad r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000), r3.xyzw + ushr r9.yzw, r9.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r9.xyzw, l(3, 3, 3, 3) + and r4.xyzw, r6.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r2.wwww, r4.xyzw + imad r2.xyzw, r3.xyzw, r2.zzzz, r4.xyzw + and r3.xyzw, r2.xyzw, l(1023, 1023, 1023, 1023) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + ishl r3.xyzw, r3.xyzw, l(16, 16, 16, 16) + ubfe r4.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r2.xyzw + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r4.xyzw, r3.xyzw + ushr r2.xyzw, r2.xyzw, l(20, 20, 20, 20) + udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) + or r2.xyzw, r2.xyzw, r3.xyzw + or r2.xyzw, r2.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + movc r1.xyzw, r5.wwww, r1.xyzw, r2.xyzw + store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw + endif +endif +ret +// Approximately 910 instruction slots used +#endif + +const BYTE texture_load_dxt1_rgba8_cs[] = +{ + 68, 88, 66, 67, 106, 4, + 101, 88, 27, 39, 231, 104, + 17, 54, 25, 35, 95, 53, + 60, 90, 1, 0, 0, 0, + 60, 139, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 160, 138, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 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0, 0, 35, 0, + 0, 9, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 166, 10, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 255, 3, + 0, 0, 255, 3, 0, 0, + 255, 3, 0, 0, 255, 3, + 0, 0, 78, 0, 0, 11, + 242, 0, 16, 0, 3, 0, + 0, 0, 0, 208, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 138, 0, 0, 15, + 242, 0, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 10, 0, 0, 0, + 10, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 10, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 78, 0, 0, 11, + 242, 0, 16, 0, 4, 0, + 0, 0, 0, 208, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 140, 0, + 0, 17, 242, 0, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 85, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 20, 0, 0, 0, 20, 0, + 0, 0, 20, 0, 0, 0, + 20, 0, 0, 0, 78, 0, + 0, 11, 242, 0, 16, 0, + 2, 0, 0, 0, 0, 208, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 3, 0, 0, 0, + 3, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 7, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 60, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 255, 0, 0, 0, 255, + 0, 0, 0, 255, 0, 0, + 0, 255, 55, 0, 0, 9, + 242, 0, 16, 0, 1, 0, + 0, 0, 246, 15, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 246, 15, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 21, 0, + 0, 1, 21, 0, 0, 1, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 142, 3, 0, 0, 16, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 231, 0, 0, 0, + 141, 1, 0, 0, 8, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 78, 0, + 0, 0, 18, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3_rgba8_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3_rgba8_cs.h new file mode 100644 index 000000000..91abd54db --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3_rgba8_cs.h @@ -0,0 +1,2698 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +ishl r0.y, r0.y, l(2) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(4) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].yxzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.yxzw, r4.yxzw +endif +if_nz r1.y + ushr r3.xyzw, r2.yxzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.yxzw + mov r3.x, r2.y +else + mov r3.x, r2.y +endif +ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) +ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) +mov r4.w, r5.x +and r1.zw, r4.xxxw, l(0, 0, 248, 248) +mov r5.xw, r4.zzzy +and r4.xy, r5.wzww, l(0x0003f000, 0x0003f000, 0, 0) +iadd r1.zw, r1.zzzw, r4.xxxy +and r4.xy, r5.xyxx, l(0x0f800000, 0x0f800000, 0, 0) +iadd r1.zw, r1.zzzw, r4.xxxy +ushr r4.xy, r1.zwzz, l(5, 5, 0, 0) +and r4.xy, r4.xyxx, l(0x00700007, 0x00700007, 0, 0) +iadd r1.zw, r1.zzzw, r4.xxxy +ushr r4.xy, r1.zwzz, l(6, 6, 0, 0) +and r4.xy, r4.xyxx, l(3072, 3072, 0, 0) +iadd r1.zw, r1.zzzw, r4.xxxy +ishl r4.x, r2.w, l(1) +ushr r4.y, r2.w, l(1) +and r4.xy, r4.xyxx, l(0xaaaaaaaa, 0x55555555, 0, 0) +iadd r4.x, r4.y, r4.x +ushr r4.y, r4.x, l(1) +and r4.y, r4.y, l(0x55555555) +xor r4.x, r4.y, r4.x +not r5.x, r4.x +ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r4.xyzw, l(3, 3, 3, 3) +imul null, r6.xyzw, r1.wwww, r6.xyzw +imad r5.xyzw, r5.xyzw, r1.zzzz, r6.xyzw +and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) +udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) +ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) +ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw +udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) +bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw +ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +or r5.xyzw, r5.xyzw, r6.xyzw +ushr r3.yzw, r3.xxxx, l(0, 4, 8, 12) +and r6.xyzw, r3.xyzw, l(15, 15, 15, 15) +imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw +imad r3.y, vThreadID.y, l(4), l(1) +ilt r3.y, r3.y, CB0[0][2].y +if_nz r3.y + iadd r3.z, r0.z, r0.y + ushr r5.x, r4.x, l(8) + not r6.x, r5.x + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + imul null, r5.xyzw, r1.wwww, r5.xyzw + imad r5.xyzw, r6.xyzw, r1.zzzz, r5.xyzw + and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw + ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + or r5.xyzw, r5.xyzw, r6.xyzw + ubfe r6.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r3.xxxx + imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw + store_uav_typed U0[0].xyzw, r3.zzzz, r5.xyzw + imad r3.x, vThreadID.y, l(4), l(2) + ilt r3.x, r3.x, CB0[0][2].y + if_nz r3.x + ishl r3.x, r0.z, l(1) + iadd r3.x, r0.y, r3.x + ushr r5.x, r4.x, l(16) + not r6.x, r5.x + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + imul null, r5.xyzw, r1.wwww, r5.xyzw + imad r5.xyzw, r6.xyzw, r1.zzzz, r5.xyzw + and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw + ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + or r5.xyzw, r5.xyzw, r6.xyzw + ushr r2.yzw, r2.xxxx, l(0, 4, 8, 12) + and r6.xyzw, r2.xyzw, l(15, 15, 15, 15) + imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw + store_uav_typed U0[0].xyzw, r3.xxxx, r5.xyzw + imad r2.y, vThreadID.y, l(4), l(3) + ilt r2.y, r2.y, CB0[0][2].y + if_nz r2.y + imad r2.y, l(3), r0.z, r0.y + ushr r4.x, r4.x, l(24) + not r5.x, r4.x + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r1.wwww, r4.xyzw + imad r4.xyzw, r5.xyzw, r1.zzzz, r4.xyzw + and r5.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw + ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + or r4.xyzw, r4.xyzw, r5.xyzw + ubfe r5.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r2.xxxx + imad r4.xyzw, r5.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r4.xyzw + store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw + endif + endif +endif +iadd r0.y, r0.y, l(1) +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].yxzw +if_nz r1.x + ishl r4.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.yxzw, r5.yxzw +endif +if_nz r1.y + ushr r1.xyzw, r2.yxzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.yxzw + mov r1.x, r2.y +else + mov r1.x, r2.y +endif +ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) +ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) +mov r4.w, r5.x +and r0.xw, r4.xxxw, l(248, 0, 0, 248) +mov r5.xw, r4.zzzy +and r3.xz, r5.wwzw, l(0x0003f000, 0, 0x0003f000, 0) +iadd r0.xw, r0.xxxw, r3.xxxz +and r3.xz, r5.xxyx, l(0x0f800000, 0, 0x0f800000, 0) +iadd r0.xw, r0.xxxw, r3.xxxz +ushr r3.xz, r0.xxwx, l(5, 0, 5, 0) +and r3.xz, r3.xxzx, l(0x00700007, 0, 0x00700007, 0) +iadd r0.xw, r0.xxxw, r3.xxxz +ushr r3.xz, r0.xxwx, l(6, 0, 6, 0) +and r3.xz, r3.xxzx, l(3072, 0, 3072, 0) +iadd r0.xw, r0.xxxw, r3.xxxz +ishl r3.x, r2.w, l(1) +ushr r3.z, r2.w, l(1) +and r3.xz, r3.xxzx, l(0xaaaaaaaa, 0, 0x55555555, 0) +iadd r3.x, r3.z, r3.x +ushr r3.z, r3.x, l(1) +and r3.z, r3.z, l(0x55555555) +xor r4.x, r3.z, r3.x +not r5.x, r4.x +ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r4.xyzw, l(3, 3, 3, 3) +imul null, r6.xyzw, r0.wwww, r6.xyzw +imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw +and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) +udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) +ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) +ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw +udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) +bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw +ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +or r5.xyzw, r5.xyzw, r6.xyzw +ushr r1.yzw, r1.xxxx, l(0, 4, 8, 12) +and r6.xyzw, r1.xyzw, l(15, 15, 15, 15) +imad r5.xyzw, r6.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r5.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw +if_nz r3.y + iadd r1.y, r0.z, r0.y + ushr r3.x, r4.x, l(8) + not r5.x, r3.x + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + imul null, r3.xyzw, r0.wwww, r3.xyzw + imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw + and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw + ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + or r3.xyzw, r3.xyzw, r5.xyzw + ubfe r5.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r1.xxxx + imad r3.xyzw, r5.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r3.xyzw + store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw + imad r1.x, vThreadID.y, l(4), l(2) + ilt r1.x, r1.x, CB0[0][2].y + if_nz r1.x + ishl r1.x, r0.z, l(1) + iadd r1.x, r0.y, r1.x + ushr r3.x, r4.x, l(16) + not r5.x, r3.x + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + imul null, r3.xyzw, r0.wwww, r3.xyzw + imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw + and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw + ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + or r3.xyzw, r3.xyzw, r5.xyzw + ushr r2.yzw, r2.xxxx, l(0, 4, 8, 12) + and r5.xyzw, r2.xyzw, l(15, 15, 15, 15) + imad r3.xyzw, r5.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r3.xyzw + store_uav_typed U0[0].xyzw, r1.xxxx, r3.xyzw + imad r1.x, vThreadID.y, l(4), l(3) + ilt r1.x, r1.x, CB0[0][2].y + if_nz r1.x + imad r0.y, l(3), r0.z, r0.y + ushr r1.x, r4.x, l(24) + not r3.x, r1.x + ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + ushr r1.yzw, r1.xxxx, l(0, 2, 4, 6) + and r1.xyzw, r1.xyzw, l(3, 3, 3, 3) + imul null, r1.xyzw, r0.wwww, r1.xyzw + imad r1.xyzw, r3.xyzw, r0.xxxx, r1.xyzw + and r3.xyzw, r1.xyzw, l(1023, 1023, 1023, 1023) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + ishl r3.xyzw, r3.xyzw, l(16, 16, 16, 16) + ubfe r4.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r1.xyzw + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r4.xyzw, r3.xyzw + ushr r1.xyzw, r1.xyzw, l(20, 20, 20, 20) + udiv r1.xyzw, null, r1.xyzw, l(3, 3, 3, 3) + or r1.xyzw, r1.xyzw, r3.xyzw + ubfe r2.xyzw, l(4, 4, 4, 4), l(16, 20, 24, 28), r2.xxxx + imad r1.xyzw, r2.xyzw, l(0x11000000, 0x11000000, 0x11000000, 0x11000000), r1.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + endif + endif +endif +ret +// Approximately 348 instruction slots used +#endif + +const BYTE texture_load_dxt3_rgba8_cs[] = +{ + 68, 88, 66, 67, 99, 108, + 60, 119, 177, 174, 14, 155, + 8, 57, 164, 37, 221, 46, + 247, 66, 1, 0, 0, 0, + 188, 53, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 32, 53, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 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Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz +endif +if_nz r1.y + ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r4.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.xyzw + mov r3.zw, r1.xxxz + mov r2.zw, r1.yyyw +else + mov r3.zw, r4.xxxz + mov r2.zw, r4.yyyw +endif +bfi r1.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) +bfi r1.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r3.xyzw, r1.xyzw +ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r4.xyzw, r4.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) +iadd r1.xyzw, r1.xyzw, r4.xyzw +ishl r4.xyzw, r3.xyzw, l(12, 12, 12, 12) +and r4.xyzw, r4.xyzw, l(0x0ff00000, 0x0ff00000, 0x0ff00000, 0x0ff00000) +iadd r1.xyzw, r1.xyzw, r4.xyzw +ishl r4.xyzw, r3.xyzw, l(16, 16, 16, 16) +bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +imad r0.x, vThreadID.y, l(4), l(1) +ilt r0.w, r0.x, CB0[0][2].y +if_nz r0.w + iadd r0.y, r0.z, r0.y + ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r1.xyzw, l(0, 0, 0, 0) + bfi r4.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r1.xyzw, r4.xyzw + ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) + iadd r4.xyzw, r4.xyzw, r5.xyzw + ishl r1.xyzw, r1.xyzw, l(12, 12, 12, 12) + bfi r1.xyzw, l(20, 20, 20, 20), l(0, 0, 0, 0), r4.xyzw, r1.xyzw + bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r3.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + iadd r0.x, r0.x, l(1) + ilt r0.w, r0.x, CB0[0][2].y + if_nz r0.w + iadd r0.y, r0.z, r0.y + bfi r1.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r2.xyzw, l(0, 0, 0, 0) + bfi r1.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r2.xyzw, r1.xyzw + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) + iadd r1.xyzw, r1.xyzw, r3.xyzw + ishl r3.xyzw, r2.xyzw, l(12, 12, 12, 12) + and r3.xyzw, r3.xyzw, l(0x0ff00000, 0x0ff00000, 0x0ff00000, 0x0ff00000) + iadd r1.xyzw, r1.xyzw, r3.xyzw + ishl r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r3.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + or r0.x, r0.x, l(3) + ilt r0.x, r0.x, CB0[0][2].y + if_nz r0.x + iadd r0.x, r0.z, r0.y + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(8, 8, 8, 8), l(4, 4, 4, 4), r1.xyzw, l(0, 0, 0, 0) + bfi r3.xyzw, l(4, 4, 4, 4), l(0, 0, 0, 0), r1.xyzw, r3.xyzw + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x000ff000, 0x000ff000, 0x000ff000, 0x000ff000) + iadd r3.xyzw, r3.xyzw, r4.xyzw + ishl r1.xyzw, r1.xyzw, l(12, 12, 12, 12) + bfi r1.xyzw, l(20, 20, 20, 20), l(0, 0, 0, 0), r3.xyzw, r1.xyzw + bfi r1.xyzw, l(28, 28, 28, 28), l(0, 0, 0, 0), r1.xyzw, r2.xyzw + store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw + endif + endif +endif +ret +// Approximately 169 instruction slots used +#endif + +const BYTE texture_load_dxt3a_cs[] = +{ + 68, 88, 66, 67, 68, 82, + 77, 42, 6, 6, 144, 135, + 220, 47, 239, 171, 18, 142, + 170, 216, 1, 0, 0, 0, + 196, 28, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 40, 28, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3aas1111_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3aas1111_cs.h new file mode 100644 index 000000000..94f48149d --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt3aas1111_cs.h @@ -0,0 +1,2969 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz +endif +if_nz r1.y + ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r4.xyzw, r0.xxxx, T0[0].ywxz +if_nz r1.x + ishl r5.xyzw, r4.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.zxwy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.ywxz, r6.ywxz +endif +if_nz r1.y + ushr r1.xyzw, r4.zxwy, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.ywxz + mov r1.xy, r4.zwzz +else + mov r1.xy, r4.zwzz +endif +ushr r5.xyzw, r3.xxyy, l(3, 11, 3, 11) +bfi r5.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r5.xyzw, l(0, 0, 0, 0) +ushr r6.xyzw, r3.xxyy, l(7, 15, 7, 15) +bfi r6.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r6.xyzw, l(0, 0, 0, 0) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r6.xyzw, r3.xxyy, l(2, 10, 2, 10) +bfi r6.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r6.xyzw, l(0, 0, 0, 0) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r6.xyzw, r3.xxyy, l(6, 14, 6, 14) +bfi r5.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r6.xyzw, r5.xyzw +ubfe r6.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r3.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r6.xyzw, r3.xxyy, l(5, 13, 5, 13) +bfi r5.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r6.xyzw, r5.xyzw +ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) +bfi r5.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r3.xzyw, r5.xyzw +ushr r6.xyzw, r3.xxyy, l(4, 12, 4, 12) +bfi r7.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r6.xyzw, l(0, 0, 0, 0) +iadd r7.xyzw, r5.xyzw, r7.xyzw +bfi r6.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r6.xyzw, l(0, 0, 0, 0) +imad r5.xyzw, r5.xyzw, l(2, 2, 2, 2), r6.xyzw +iadd r5.xyzw, r5.xyzw, r7.xyzw +ishl r6.xyzw, r5.xyzw, l(2, 2, 2, 2) +iadd r5.xyzw, r5.xyzw, r6.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw +iadd r0.x, r0.y, l(1) +ushr r5.xyzw, r1.xxyy, l(3, 11, 3, 11) +bfi r5.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r5.xyzw, l(0, 0, 0, 0) +ushr r6.xyzw, r1.xxyy, l(7, 15, 7, 15) +bfi r6.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r6.xyzw, l(0, 0, 0, 0) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r6.xyzw, r1.xxyy, l(2, 10, 2, 10) +bfi r6.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r6.xyzw, l(0, 0, 0, 0) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r6.xyzw, r1.xxyy, l(6, 14, 6, 14) +bfi r5.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r6.xyzw, r5.xyzw +ubfe r6.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r1.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r6.xyzw, r1.xxyy, l(5, 13, 5, 13) +bfi r5.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r6.xyzw, r5.xyzw +ushr r1.zw, r1.xxxy, l(0, 0, 8, 8) +bfi r5.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r1.xzyw, r5.xyzw +ushr r6.xyzw, r1.xxyy, l(4, 12, 4, 12) +bfi r7.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r6.xyzw, l(0, 0, 0, 0) +iadd r7.xyzw, r5.xyzw, r7.xyzw +bfi r6.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r6.xyzw, l(0, 0, 0, 0) +imad r5.xyzw, r5.xyzw, l(2, 2, 2, 2), r6.xyzw +iadd r5.xyzw, r5.xyzw, r7.xyzw +ishl r6.xyzw, r5.xyzw, l(2, 2, 2, 2) +iadd r5.xyzw, r5.xyzw, r6.xyzw +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +imad r0.x, vThreadID.y, l(4), l(1) +ilt r0.w, r0.x, CB0[0][2].y +if_nz r0.w + iadd r0.y, r0.z, r0.y + ushr r5.xz, r3.xxyx, l(16, 0, 16, 0) + ushr r6.xyzw, r5.xxzz, l(3, 11, 3, 11) + bfi r6.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r6.xyzw, l(0, 0, 0, 0) + ushr r7.xyzw, r5.xxzz, l(7, 15, 7, 15) + bfi r7.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r7.xyzw, l(0, 0, 0, 0) + iadd r6.xyzw, r6.xyzw, r7.xyzw + ushr r7.xyzw, r5.xxzz, l(2, 10, 2, 10) + bfi r7.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r7.xyzw, l(0, 0, 0, 0) + iadd r6.xyzw, r6.xyzw, r7.xyzw + ushr r7.xyzw, r5.xxzz, l(6, 14, 6, 14) + bfi r6.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r7.xyzw, r6.xyzw + ubfe r3.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r3.xxyy + iadd r3.xyzw, r6.xyzw, r3.xyzw + ushr r6.xyzw, r5.xxzz, l(5, 13, 5, 13) + bfi r3.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r6.xyzw, r3.xyzw + ushr r5.yw, r5.xxxz, l(0, 8, 0, 8) + bfi r3.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r5.xyzw, r3.xyzw + ushr r5.xyzw, r5.xxzz, l(4, 12, 4, 12) + bfi r6.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r5.xyzw, l(0, 0, 0, 0) + iadd r6.xyzw, r3.xyzw, r6.xyzw + bfi r5.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r5.xyzw, l(0, 0, 0, 0) + imad r3.xyzw, r3.xyzw, l(2, 2, 2, 2), r5.xyzw + iadd r3.xyzw, r3.xyzw, r6.xyzw + ishl r5.xyzw, r3.xyzw, l(2, 2, 2, 2) + iadd r3.xyzw, r3.xyzw, r5.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw + iadd r0.w, r0.y, l(1) + ushr r3.xz, r1.xxyx, l(16, 0, 16, 0) + ushr r5.xyzw, r3.xxzz, l(3, 11, 3, 11) + bfi r5.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r5.xyzw, l(0, 0, 0, 0) + ushr r6.xyzw, r3.xxzz, l(7, 15, 7, 15) + bfi r6.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r6.xyzw, l(0, 0, 0, 0) + iadd r5.xyzw, r5.xyzw, r6.xyzw + ushr r6.xyzw, r3.xxzz, l(2, 10, 2, 10) + bfi r6.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r6.xyzw, l(0, 0, 0, 0) + iadd r5.xyzw, r5.xyzw, r6.xyzw + ushr r6.xyzw, r3.xxzz, l(6, 14, 6, 14) + bfi r5.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r6.xyzw, r5.xyzw + ubfe r1.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r1.xxyy + iadd r1.xyzw, r5.xyzw, r1.xyzw + ushr r5.xyzw, r3.xxzz, l(5, 13, 5, 13) + bfi r1.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r5.xyzw, r1.xyzw + ushr r3.yw, r3.xxxz, l(0, 8, 0, 8) + bfi r1.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r3.xyzw, r1.xyzw + ushr r3.xyzw, r3.xxzz, l(4, 12, 4, 12) + bfi r5.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r3.xyzw, l(0, 0, 0, 0) + iadd r5.xyzw, r1.xyzw, r5.xyzw + bfi r3.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r3.xyzw, l(0, 0, 0, 0) + imad r1.xyzw, r1.xyzw, l(2, 2, 2, 2), r3.xyzw + iadd r1.xyzw, r1.xyzw, r5.xyzw + ishl r3.xyzw, r1.xyzw, l(2, 2, 2, 2) + iadd r1.xyzw, r1.xyzw, r3.xyzw + store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw + iadd r0.x, r0.x, l(1) + ilt r0.w, r0.x, CB0[0][2].y + if_nz r0.w + iadd r0.y, r0.z, r0.y + ushr r1.xyzw, r2.xxyy, l(3, 11, 3, 11) + bfi r1.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r1.xyzw, l(0, 0, 0, 0) + ushr r3.xyzw, r2.xxyy, l(7, 15, 7, 15) + bfi r3.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r3.xyzw, l(0, 0, 0, 0) + iadd r1.xyzw, r1.xyzw, r3.xyzw + ushr r3.xyzw, r2.xxyy, l(2, 10, 2, 10) + bfi r3.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) + iadd r1.xyzw, r1.xyzw, r3.xyzw + ushr r3.xyzw, r2.xxyy, l(6, 14, 6, 14) + bfi r1.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r3.xyzw, r1.xyzw + ubfe r3.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r2.xxyy + iadd r1.xyzw, r1.xyzw, r3.xyzw + ushr r3.xyzw, r2.xxyy, l(5, 13, 5, 13) + bfi r1.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r1.xyzw + ushr r2.zw, r2.xxxy, l(0, 0, 8, 8) + bfi r1.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r2.xzyw, r1.xyzw + ushr r3.xyzw, r2.xxyy, l(4, 12, 4, 12) + bfi r5.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r3.xyzw, l(0, 0, 0, 0) + iadd r5.xyzw, r1.xyzw, r5.xyzw + bfi r3.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r3.xyzw, l(0, 0, 0, 0) + imad r1.xyzw, r1.xyzw, l(2, 2, 2, 2), r3.xyzw + iadd r1.xyzw, r1.xyzw, r5.xyzw + ishl r3.xyzw, r1.xyzw, l(2, 2, 2, 2) + iadd r1.xyzw, r1.xyzw, r3.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + iadd r0.w, r0.y, l(1) + ushr r1.xyzw, r4.xxyy, l(3, 11, 3, 11) + bfi r1.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r1.xyzw, l(0, 0, 0, 0) + ushr r3.xyzw, r4.xxyy, l(7, 15, 7, 15) + bfi r3.xyzw, l(1, 1, 1, 1), l(24, 24, 24, 24), r3.xyzw, l(0, 0, 0, 0) + iadd r1.xyzw, r1.xyzw, r3.xyzw + ushr r3.xyzw, r4.xxyy, l(2, 10, 2, 10) + bfi r3.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) + iadd r1.xyzw, r1.xyzw, r3.xyzw + ushr r3.xyzw, r4.xxyy, l(6, 14, 6, 14) + bfi r1.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r3.xyzw, r1.xyzw + ubfe r3.xyzw, l(1, 1, 1, 1), l(1, 9, 1, 9), r4.xxyy + iadd r1.xyzw, r1.xyzw, r3.xyzw + ushr r3.xyzw, r4.xxyy, l(5, 13, 5, 13) + bfi r1.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r1.xyzw + ushr r4.zw, r4.xxxy, l(0, 0, 8, 8) + bfi r1.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r4.xzyw, r1.xyzw + ushr r3.xyzw, r4.xxyy, l(4, 12, 4, 12) + bfi r5.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r3.xyzw, l(0, 0, 0, 0) + iadd r5.xyzw, r1.xyzw, r5.xyzw + bfi r3.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r3.xyzw, l(0, 0, 0, 0) + imad r1.xyzw, r1.xyzw, l(2, 2, 2, 2), r3.xyzw + iadd r1.xyzw, r1.xyzw, r5.xyzw + ishl r3.xyzw, r1.xyzw, l(2, 2, 2, 2) + iadd r1.xyzw, r1.xyzw, r3.xyzw + store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw + or r0.x, r0.x, l(3) + ilt r0.x, r0.x, CB0[0][2].y + if_nz r0.x + iadd r0.x, r0.z, r0.y + ushr r1.xz, r2.xxyx, l(16, 0, 16, 0) + ushr r3.xyzw, r1.xxzz, l(3, 11, 3, 11) + bfi r3.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r3.xyzw, l(0, 0, 0, 0) + ushr r5.xyzw, r1.xxzz, l(7, 15, 7, 15) + bfi r5.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r5.xyzw, l(0, 0, 0, 0) + iadd r3.xyzw, r3.xyzw, r5.xyzw + ushr r5.xyzw, r1.xxzz, l(2, 10, 2, 10) + bfi r5.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r5.xyzw, l(0, 0, 0, 0) + iadd r3.xyzw, r3.xyzw, r5.xyzw + ushr r5.xyzw, r1.xxzz, l(6, 14, 6, 14) + bfi r3.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r5.xyzw, r3.xyzw + ubfe r2.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r2.xxyy + iadd r2.xyzw, r3.xyzw, r2.xyzw + ushr r3.xyzw, r1.xxzz, l(5, 13, 5, 13) + bfi r2.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r2.xyzw + ushr r1.yw, r1.xxxz, l(0, 8, 0, 8) + bfi r2.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r1.xyzw, r2.xyzw + ushr r1.xyzw, r1.xxzz, l(4, 12, 4, 12) + bfi r3.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r1.xyzw, l(0, 0, 0, 0) + iadd r3.xyzw, r2.xyzw, r3.xyzw + bfi r1.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r1.xyzw, l(0, 0, 0, 0) + imad r1.xyzw, r2.xyzw, l(2, 2, 2, 2), r1.xyzw + iadd r1.xyzw, r1.xyzw, r3.xyzw + ishl r2.xyzw, r1.xyzw, l(2, 2, 2, 2) + iadd r1.xyzw, r1.xyzw, r2.xyzw + store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw + iadd r0.y, r0.x, l(1) + ushr r1.xz, r4.xxyx, l(16, 0, 16, 0) + ushr r2.xyzw, r1.xxzz, l(3, 11, 3, 11) + bfi r2.xyzw, l(1, 1, 1, 1), l(8, 8, 8, 8), r2.xyzw, l(0, 0, 0, 0) + ushr r3.xyzw, r1.xxzz, l(7, 15, 7, 15) + bfi r3.xyzw, l(1, 8, 1, 8), l(24, 24, 24, 24), r3.xyzw, l(0, 0, 0, 0) + iadd r2.xyzw, r2.xyzw, r3.xyzw + ushr r3.xyzw, r1.xxzz, l(2, 10, 2, 10) + bfi r3.xyzw, l(1, 1, 1, 1), l(4, 4, 4, 4), r3.xyzw, l(0, 0, 0, 0) + iadd r2.xyzw, r2.xyzw, r3.xyzw + ushr r3.xyzw, r1.xxzz, l(6, 14, 6, 14) + bfi r2.xyzw, l(1, 1, 1, 1), l(20, 20, 20, 20), r3.xyzw, r2.xyzw + ubfe r3.xyzw, l(1, 1, 1, 1), l(17, 25, 17, 25), r4.xxyy + iadd r2.xyzw, r2.xyzw, r3.xyzw + ushr r3.xyzw, r1.xxzz, l(5, 13, 5, 13) + bfi r2.xyzw, l(1, 1, 1, 1), l(16, 16, 16, 16), r3.xyzw, r2.xyzw + ushr r1.yw, r1.xxxz, l(0, 8, 0, 8) + bfi r2.xyzw, l(1, 1, 1, 1), l(12, 12, 12, 12), r1.xyzw, r2.xyzw + ushr r1.xyzw, r1.xxzz, l(4, 12, 4, 12) + bfi r3.xyzw, l(1, 1, 1, 1), l(28, 28, 28, 28), r1.xyzw, l(0, 0, 0, 0) + iadd r3.xyzw, r2.xyzw, r3.xyzw + bfi r1.xyzw, l(1, 1, 1, 1), l(29, 29, 29, 29), r1.xyzw, l(0, 0, 0, 0) + imad r1.xyzw, r2.xyzw, l(2, 2, 2, 2), r1.xyzw + iadd r1.xyzw, r1.xyzw, r3.xyzw + ishl r2.xyzw, r1.xyzw, l(2, 2, 2, 2) + iadd r1.xyzw, r1.xyzw, r2.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + endif + endif +endif +ret +// Approximately 334 instruction slots used +#endif + +const BYTE texture_load_dxt3aas1111_cs[] = +{ + 68, 88, 66, 67, 48, 242, + 50, 233, 9, 43, 43, 139, + 191, 64, 14, 38, 150, 241, + 147, 185, 1, 0, 0, 0, + 104, 60, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 204, 59, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 140, 55, + 0, 0, 81, 0, 5, 0, + 227, 13, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 156, 8, + 0, 7, 70, 238, 49, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 68, 68, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 2, + 114, 0, 2, 0, 104, 0, + 0, 2, 8, 0, 0, 0, + 155, 0, 0, 4, 8, 0, + 0, 0, 32, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 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3, 0, 0, 0, 2, 64, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 3, 0, 0, 0, 6, 10, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 6, 0, + 0, 0, 14, 0, 0, 0, + 6, 0, 0, 0, 14, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 20, 0, 0, 0, + 20, 0, 0, 0, 20, 0, + 0, 0, 20, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 138, 0, + 0, 15, 242, 0, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 17, 0, + 0, 0, 25, 0, 0, 0, + 17, 0, 0, 0, 25, 0, + 0, 0, 6, 5, 16, 0, + 4, 0, 0, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 3, 0, + 0, 0, 6, 10, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 5, 0, 0, 0, + 13, 0, 0, 0, 5, 0, + 0, 0, 13, 0, 0, 0, + 140, 0, 0, 17, 242, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 85, 0, 0, 10, + 162, 0, 16, 0, 1, 0, + 0, 0, 6, 8, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 140, 0, 0, 17, 242, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 12, 0, 0, 0, 12, 0, + 0, 0, 12, 0, 0, 0, + 12, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 1, 0, + 0, 0, 6, 10, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 4, 0, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 12, 0, 0, 0, + 140, 0, 0, 20, 242, 0, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 28, 0, 0, 0, 28, 0, + 0, 0, 28, 0, 0, 0, + 28, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 140, 0, 0, 20, 242, 0, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 29, 0, 0, 0, 29, 0, + 0, 0, 29, 0, 0, 0, + 29, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 35, 0, 0, 12, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 2, 0, 0, 0, + 2, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 41, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 2, 0, 0, 0, 2, 0, + 0, 0, 2, 0, 0, 0, + 2, 0, 0, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 86, 5, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 21, 0, + 0, 1, 21, 0, 0, 1, + 21, 0, 0, 1, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 78, 1, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 111, 0, 0, 0, 85, 0, + 0, 0, 6, 0, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 5, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5_rgba8_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5_rgba8_cs.h new file mode 100644 index 000000000..8120e383a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5_rgba8_cs.h @@ -0,0 +1,5920 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +ishl r0.y, r0.y, l(2) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(18, 0, 18, 0), l(12, 0, 15, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(10, 0, 13, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(4) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].yxzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.yxzw, r4.yxzw +endif +if_nz r1.y + ushr r3.xyzw, r2.yxzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.yxzw + mov r3.xy, r2.ywyy +else + mov r3.xy, r2.ywyy +endif +ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) +ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) +mov r4.w, r5.x +and r1.zw, r4.xxxw, l(0, 0, 248, 248) +mov r5.xw, r4.zzzy +and r2.yz, r5.wwzw, l(0, 0x0003f000, 0x0003f000, 0) +iadd r1.zw, r1.zzzw, r2.yyyz +and r2.yz, r5.xxyx, l(0, 0x0f800000, 0x0f800000, 0) +iadd r1.zw, r1.zzzw, r2.yyyz +ushr r2.yz, r1.zzwz, l(0, 5, 5, 0) +and r2.yz, r2.yyzy, l(0, 0x00700007, 0x00700007, 0) +iadd r1.zw, r1.zzzw, r2.yyyz +ushr r2.yz, r1.zzwz, l(0, 6, 6, 0) +and r2.yz, r2.yyzy, l(0, 3072, 3072, 0) +iadd r1.zw, r1.zzzw, r2.yyyz +ishl r2.y, r3.y, l(1) +and r2.y, r2.y, l(0xaaaaaaaa) +ushr r4.xyz, r3.yxxy, l(1, 8, 16, 0) +and r2.z, r4.x, l(0x55555555) +iadd r2.y, r2.z, r2.y +ushr r2.z, r2.y, l(1) +and r2.z, r2.z, l(0x55555555) +xor r5.x, r2.z, r2.y +mov r3.z, r4.y +and r2.yz, r3.xxzx, l(0, 255, 255, 0) +bfi r2.w, l(8), l(16), r2.x, l(0) +iadd r2.w, r2.w, r4.z +uge r3.x, r2.z, r2.y +ushr r3.yz, r2.wwww, l(0, 1, 2, 0) +and r3.w, r2.w, r3.y +and r3.w, r3.w, l(0x00492492) +ishl r4.x, r3.w, l(1) +ushr r4.y, r3.w, l(1) +iadd r3.w, r3.w, r4.x +iadd r3.w, r3.w, r4.y +and r4.x, r2.w, l(0x00249249) +iadd r4.y, r4.x, l(0x00db6db6) +and r4.y, r3.w, r4.y +or r4.z, r2.w, r3.y +and r6.xy, r3.yzyy, l(0x00249249, 0x00249249, 0, 0) +or r3.y, r3.z, r4.z +and r3.y, r3.y, l(0x00249249) +xor r3.y, r3.y, l(0x00249249) +not r4.zw, r6.xxxy +and r3.z, r4.z, r4.x +and r3.z, r4.w, r3.z +or r2.w, r2.w, r3.y +iadd r2.w, r2.w, l(0xffdb6db7) +or r2.w, r3.z, r2.w +ishl r3.yz, r3.zzzz, l(0, 2, 1, 0) +or r4.x, r2.w, r3.y +not r3.w, r3.w +and r3.w, r3.w, r4.x +or r3.w, r4.y, r3.w +iadd r3.y, r3.z, r3.y +or r2.w, r2.w, r3.y +movc r2.w, r3.x, r3.w, r2.w +not r4.x, r5.x +ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) +and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) +ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r5.xyzw, l(3, 3, 3, 3) +imul null, r6.xyzw, r1.wwww, r6.xyzw +imad r4.xyzw, r4.xyzw, r1.zzzz, r6.xyzw +and r6.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) +udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) +ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) +ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw +udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) +bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) +udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) +or r4.xyzw, r4.xyzw, r6.xyzw +ushr r3.y, r2.w, l(1) +and r3.y, r2.w, r3.y +and r3.y, r3.y, l(1170) +ishl r3.z, r3.y, l(1) +ushr r3.w, r3.y, l(1) +iadd r3.y, r3.y, r3.z +iadd r3.y, r3.y, r3.w +not r3.z, r3.y +and r3.yw, r2.wwww, r3.yyyz +iadd r5.y, -r3.w, l(2925) +and r3.z, r3.z, r5.y +and r5.yz, r3.zzwz, l(0, 7, 7, 0) +imul null, r5.z, r2.z, r5.z +imad r5.y, r2.y, r5.y, r5.z +udiv r5.y, null, r5.y, l(5) +ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.zzzz +ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww +imul null, r7.xyz, r2.zzzz, r7.xyzx +imad r6.xyz, r2.yyyy, r6.xyzx, r7.xyzx +udiv r6.xyz, null, r6.xyzx, l(5, 5, 5, 0) +ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) +or r3.z, r5.y, r6.x +or r3.z, r6.y, r3.z +or r3.z, r6.z, r3.z +ishl r5.yzw, r3.yyyy, l(0, 5, 10, 15) +and r5.yzw, r5.yyzw, l(0, 256, 0x00010000, 0x01000000) +bfi r3.y, l(1), l(0), r3.y, r5.y +iadd r3.y, r5.z, r3.y +iadd r3.y, r5.w, r3.y +imad r3.y, r3.y, l(255), r3.z +not r3.z, r2.w +and r3.w, r3.z, l(7) +and r5.y, r2.w, l(7) +imul null, r5.y, r2.z, r5.y +imad r3.w, r2.y, r3.w, r5.y +udiv r3.w, null, r3.w, l(7) +ubfe r5.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r3.zzzz +ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.wwww +imul null, r6.xyz, r2.zzzz, r6.xyzx +imad r5.yzw, r2.yyyy, r5.yyzw, r6.xxyz +udiv r5.yzw, null, r5.yyzw, l(0, 7, 7, 7) +ishl r5.yzw, r5.yyzw, l(0, 8, 16, 24) +or r3.z, r3.w, r5.y +or r3.z, r5.z, r3.z +or r3.z, r5.w, r3.z +movc r6.w, r3.x, r3.y, r3.z +ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) +and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) +or r4.xyzw, r4.xyzw, r6.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +imad r3.y, vThreadID.y, l(4), l(1) +ilt r3.y, r3.y, CB0[0][2].y +if_nz r3.y + iadd r3.z, r0.z, r0.y + ushr r4.x, r5.x, l(8) + not r6.x, r4.x + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r1.wwww, r4.xyzw + imad r4.xyzw, r6.xyzw, r1.zzzz, r4.xyzw + and r6.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw + ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + or r4.xyzw, r4.xyzw, r6.xyzw + ushr r3.w, r2.w, l(12) + ushr r5.y, r3.w, l(1) + and r5.y, r3.w, r5.y + and r5.y, r5.y, l(1170) + ishl r5.z, r5.y, l(1) + ushr r5.w, r5.y, l(1) + iadd r5.y, r5.y, r5.z + iadd r5.y, r5.y, r5.w + not r5.z, r5.y + and r5.yw, r3.wwww, r5.yyyz + iadd r6.x, -r5.w, l(2925) + and r5.z, r5.z, r6.x + and r6.xy, r5.zwzz, l(7, 7, 0, 0) + imul null, r6.y, r2.z, r6.y + imad r6.x, r2.y, r6.x, r6.y + ubfe r6.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r5.zzzz + ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r5.wwww + imul null, r7.xyz, r2.zzzz, r7.xyzx + imad r6.yzw, r2.yyyy, r6.yyzw, r7.xxyz + udiv r6.xyzw, null, r6.xyzw, l(5, 5, 5, 5) + ishl r6.yzw, r6.yyzw, l(0, 8, 16, 24) + or r5.z, r6.y, r6.x + or r5.z, r6.z, r5.z + or r5.z, r6.w, r5.z + ishl r6.xyz, r5.yyyy, l(5, 10, 15, 0) + and r6.xyz, r6.xyzx, l(256, 0x00010000, 0x01000000, 0) + bfi r5.y, l(1), l(0), r5.y, r6.x + iadd r5.y, r6.y, r5.y + iadd r5.y, r6.z, r5.y + imad r5.y, r5.y, l(255), r5.z + not r3.w, r3.w + and r5.z, r3.w, l(7) + ubfe r6.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r2.wwww + imul null, r6.xyzw, r2.zzzz, r6.xyzw + imad r2.w, r2.y, r5.z, r6.x + udiv r2.w, null, r2.w, l(7) + ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww + imad r6.xyz, r2.yyyy, r7.xyzx, r6.yzwy + udiv r6.xyz, null, r6.xyzx, l(7, 7, 7, 0) + ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) + or r2.w, r2.w, r6.x + or r2.w, r6.y, r2.w + or r2.w, r6.z, r2.w + movc r6.w, r3.x, r5.y, r2.w + ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) + and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + or r4.xyzw, r4.xyzw, r6.xyzw + store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw + imad r2.w, vThreadID.y, l(4), l(2) + ilt r2.w, r2.w, CB0[0][2].y + if_nz r2.w + ushr r2.x, r2.x, l(8) + ushr r3.zw, r2.xxxx, l(0, 0, 1, 2) + and r2.w, r2.x, r3.z + and r2.w, r2.w, l(0x00492492) + ishl r4.x, r2.w, l(1) + ushr r4.y, r2.w, l(1) + iadd r2.w, r2.w, r4.x + iadd r2.w, r2.w, r4.y + and r4.x, r2.x, l(0x00249249) + iadd r4.y, r4.x, l(0x00db6db6) + and r4.y, r2.w, r4.y + or r4.z, r2.x, r3.z + and r5.yz, r3.zzwz, l(0, 0x00249249, 0x00249249, 0) + or r3.z, r3.w, r4.z + and r3.z, r3.z, l(0x00249249) + xor r3.z, r3.z, l(0x00249249) + not r4.zw, r5.yyyz + and r3.w, r4.z, r4.x + and r3.w, r4.w, r3.w + or r2.x, r2.x, r3.z + iadd r2.x, r2.x, l(0xffdb6db7) + or r2.x, r3.w, r2.x + ishl r3.zw, r3.wwww, l(0, 0, 2, 1) + or r4.x, r2.x, r3.z + not r2.w, r2.w + and r2.w, r2.w, r4.x + or r2.w, r4.y, r2.w + iadd r3.z, r3.w, r3.z + or r2.x, r2.x, r3.z + movc r2.x, r3.x, r2.w, r2.x + ishl r2.w, r0.z, l(1) + iadd r2.w, r0.y, r2.w + ushr r4.x, r5.x, l(16) + not r6.x, r4.x + ushr r6.yzw, r6.xxxx, l(0, 2, 4, 6) + and r6.xyzw, r6.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r1.wwww, r4.xyzw + imad r4.xyzw, r6.xyzw, r1.zzzz, r4.xyzw + and r6.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw + udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw + ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + or r4.xyzw, r4.xyzw, r6.xyzw + ushr r3.z, r2.x, l(1) + and r3.z, r2.x, r3.z + and r3.z, r3.z, l(1170) + ishl r3.w, r3.z, l(1) + ushr r5.y, r3.z, l(1) + iadd r3.z, r3.z, r3.w + iadd r3.z, r3.z, r5.y + not r3.w, r3.z + and r5.y, r2.x, r3.w + iadd r5.z, -r5.y, l(2925) + and r3.w, r3.w, r5.z + and r5.z, r3.w, l(7) + and r5.w, r5.y, l(7) + imul null, r5.w, r2.z, r5.w + imad r5.z, r2.y, r5.z, r5.w + udiv r5.z, null, r5.z, l(5) + ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww + ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r5.yyyy + imul null, r7.xyz, r2.zzzz, r7.xyzx + imad r6.xyz, r2.yyyy, r6.xyzx, r7.xyzx + udiv r6.xyz, null, r6.xyzx, l(5, 5, 5, 0) + ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) + or r3.w, r5.z, r6.x + or r3.w, r6.y, r3.w + or r3.w, r6.z, r3.w + and r3.z, r2.x, r3.z + ishl r5.yzw, r3.zzzz, l(0, 5, 10, 15) + and r5.yzw, r5.yyzw, l(0, 256, 0x00010000, 0x01000000) + bfi r3.z, l(1), l(0), r3.z, r5.y + iadd r3.z, r5.z, r3.z + iadd r3.z, r5.w, r3.z + imad r3.z, r3.z, l(255), r3.w + not r3.w, r2.x + and r5.y, r3.w, l(7) + and r5.z, r2.x, l(7) + imul null, r5.z, r2.z, r5.z + imad r5.y, r2.y, r5.y, r5.z + udiv r5.y, null, r5.y, l(7) + ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww + ubfe r7.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.xxxx + imul null, r7.xyz, r2.zzzz, r7.xyzx + imad r6.xyz, r2.yyyy, r6.xyzx, r7.xyzx + udiv r6.xyz, null, r6.xyzx, l(7, 7, 7, 0) + ishl r6.xyz, r6.xyzx, l(8, 16, 24, 0) + or r3.w, r5.y, r6.x + or r3.w, r6.y, r3.w + or r3.w, r6.z, r3.w + movc r6.w, r3.x, r3.z, r3.w + ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) + and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + or r4.xyzw, r4.xyzw, r6.xyzw + store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw + imad r2.w, vThreadID.y, l(4), l(3) + ilt r2.w, r2.w, CB0[0][2].y + if_nz r2.w + imad r2.w, l(3), r0.z, r0.y + ushr r4.x, r5.x, l(24) + not r5.x, r4.x + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) + and r4.xyzw, r4.xyzw, l(3, 3, 3, 3) + imul null, r4.xyzw, r1.wwww, r4.xyzw + imad r4.xyzw, r5.xyzw, r1.zzzz, r4.xyzw + and r5.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r4.xyzw + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw + ushr r4.xyzw, r4.xyzw, l(20, 20, 20, 20) + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + or r4.xyzw, r4.xyzw, r5.xyzw + ushr r1.z, r2.x, l(12) + ushr r1.w, r1.z, l(1) + and r1.w, r1.z, r1.w + and r1.w, r1.w, l(1170) + ishl r3.z, r1.w, l(1) + ushr r3.w, r1.w, l(1) + iadd r1.w, r1.w, r3.z + iadd r1.w, r1.w, r3.w + not r3.z, r1.w + and r3.w, r1.z, r3.z + iadd r5.x, -r3.w, l(2925) + and r3.z, r3.z, r5.x + and r5.xy, r3.zwzz, l(7, 7, 0, 0) + imul null, r5.y, r2.z, r5.y + imad r5.x, r2.y, r5.x, r5.y + ubfe r5.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r3.zzzz + ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r3.wwww + imul null, r6.xyz, r2.zzzz, r6.xyzx + imad r5.yzw, r2.yyyy, r5.yyzw, r6.xxyz + udiv r5.xyzw, null, r5.xyzw, l(5, 5, 5, 5) + ishl r5.yzw, r5.yyzw, l(0, 8, 16, 24) + or r3.z, r5.y, r5.x + or r3.z, r5.z, r3.z + or r3.z, r5.w, r3.z + and r1.w, r1.w, r1.z + ishl r5.xyz, r1.wwww, l(5, 10, 15, 0) + and r5.xyz, r5.xyzx, l(256, 0x00010000, 0x01000000, 0) + bfi r1.w, l(1), l(0), r1.w, r5.x + iadd r1.w, r5.y, r1.w + iadd r1.w, r5.z, r1.w + imad r1.w, r1.w, l(255), r3.z + not r1.z, r1.z + and r3.z, r1.z, l(7) + ubfe r5.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r2.xxxx + imul null, r5.xyzw, r2.zzzz, r5.xyzw + imad r2.x, r2.y, r3.z, r5.x + udiv r2.x, null, r2.x, l(7) + ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r1.zzzz + imad r5.xyz, r2.yyyy, r6.xyzx, r5.yzwy + udiv r5.xyz, null, r5.xyzx, l(7, 7, 7, 0) + ishl r5.xyz, r5.xyzx, l(8, 16, 24, 0) + or r1.z, r2.x, r5.x + or r1.z, r5.y, r1.z + or r1.z, r5.z, r1.z + movc r5.w, r3.x, r1.w, r1.z + ishl r5.xyz, r5.wwww, l(24, 16, 8, 0) + and r5.xyzw, r5.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + or r4.xyzw, r4.xyzw, r5.xyzw + store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw + endif + endif +endif +iadd r0.y, r0.y, l(1) +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].yxzw +if_nz r1.x + ishl r4.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.yxzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.yxzw, r5.yxzw +endif +if_nz r1.y + ushr r1.xyzw, r2.yxzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.yxzw + mov r1.xy, r2.ywyy +else + mov r1.xy, r2.ywyy +endif +ishl r4.xyz, r2.zzzz, l(3, 7, 12, 0) +ushr r5.xyz, r2.zzzz, l(13, 4, 9, 0) +mov r4.w, r5.x +and r0.xw, r4.xxxw, l(248, 0, 0, 248) +mov r5.xw, r4.zzzy +and r2.yz, r5.wwzw, l(0, 0x0003f000, 0x0003f000, 0) +iadd r0.xw, r0.xxxw, r2.yyyz +and r2.yz, r5.xxyx, l(0, 0x0f800000, 0x0f800000, 0) +iadd r0.xw, r0.xxxw, r2.yyyz +ushr r2.yz, r0.xxwx, l(0, 5, 5, 0) +and r2.yz, r2.yyzy, l(0, 0x00700007, 0x00700007, 0) +iadd r0.xw, r0.xxxw, r2.yyyz +ushr r2.yz, r0.xxwx, l(0, 6, 6, 0) +and r2.yz, r2.yyzy, l(0, 3072, 3072, 0) +iadd r0.xw, r0.xxxw, r2.yyyz +ishl r1.w, r1.y, l(1) +and r1.w, r1.w, l(0xaaaaaaaa) +ushr r2.yzw, r1.yyxx, l(0, 1, 8, 16) +and r1.y, r2.y, l(0x55555555) +iadd r1.y, r1.y, r1.w +ushr r1.w, r1.y, l(1) +and r1.w, r1.w, l(0x55555555) +xor r4.x, r1.w, r1.y +mov r1.z, r2.z +and r1.xy, r1.xzxx, l(255, 255, 0, 0) +bfi r1.z, l(8), l(16), r2.x, l(0) +iadd r1.z, r1.z, r2.w +uge r1.w, r1.y, r1.x +ushr r2.yz, r1.zzzz, l(0, 1, 2, 0) +and r2.w, r1.z, r2.y +and r2.w, r2.w, l(0x00492492) +ishl r3.x, r2.w, l(1) +ushr r3.z, r2.w, l(1) +iadd r2.w, r2.w, r3.x +iadd r2.w, r2.w, r3.z +and r3.x, r1.z, l(0x00249249) +iadd r3.z, r3.x, l(0x00db6db6) +and r3.z, r2.w, r3.z +or r3.w, r1.z, r2.y +and r5.xy, r2.yzyy, l(0x00249249, 0x00249249, 0, 0) +or r2.y, r2.z, r3.w +and r2.y, r2.y, l(0x00249249) +xor r2.y, r2.y, l(0x00249249) +not r5.xy, r5.xyxx +and r2.z, r3.x, r5.x +and r2.z, r5.y, r2.z +or r1.z, r1.z, r2.y +iadd r1.z, r1.z, l(0xffdb6db7) +or r1.z, r2.z, r1.z +ishl r2.yz, r2.zzzz, l(0, 2, 1, 0) +or r3.x, r1.z, r2.y +not r2.w, r2.w +and r2.w, r2.w, r3.x +or r2.w, r3.z, r2.w +iadd r2.y, r2.z, r2.y +or r1.z, r1.z, r2.y +movc r1.z, r1.w, r2.w, r1.z +not r5.x, r4.x +ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) +and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) +ushr r4.yzw, r4.xxxx, l(0, 2, 4, 6) +and r6.xyzw, r4.xyzw, l(3, 3, 3, 3) +imul null, r6.xyzw, r0.wwww, r6.xyzw +imad r5.xyzw, r5.xyzw, r0.xxxx, r6.xyzw +and r6.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) +udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) +ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) +ubfe r7.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r5.xyzw +udiv r7.xyzw, null, r7.xyzw, l(3, 3, 3, 3) +bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r7.xyzw, r6.xyzw +ushr r5.xyzw, r5.xyzw, l(20, 20, 20, 20) +udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) +or r5.xyzw, r5.xyzw, r6.xyzw +ushr r2.y, r1.z, l(1) +and r2.y, r1.z, r2.y +and r2.y, r2.y, l(1170) +ishl r2.z, r2.y, l(1) +ushr r2.w, r2.y, l(1) +iadd r2.y, r2.y, r2.z +iadd r2.y, r2.y, r2.w +not r2.z, r2.y +and r2.yw, r1.zzzz, r2.yyyz +iadd r3.x, -r2.w, l(2925) +and r2.z, r2.z, r3.x +and r3.xz, r2.zzwz, l(7, 0, 7, 0) +imul null, r3.z, r1.y, r3.z +imad r3.x, r1.x, r3.x, r3.z +udiv r3.x, null, r3.x, l(5) +ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r2.zzzz +ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.wwww +imul null, r6.xyz, r1.yyyy, r6.xyzx +imad r4.yzw, r1.xxxx, r4.yyzw, r6.xxyz +udiv r4.yzw, null, r4.yyzw, l(0, 5, 5, 5) +ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) +or r2.z, r3.x, r4.y +or r2.z, r4.z, r2.z +or r2.z, r4.w, r2.z +ishl r3.xzw, r2.yyyy, l(5, 0, 10, 15) +and r3.xzw, r3.xxzw, l(256, 0, 0x00010000, 0x01000000) +bfi r2.y, l(1), l(0), r2.y, r3.x +iadd r2.y, r3.z, r2.y +iadd r2.y, r3.w, r2.y +imad r2.y, r2.y, l(255), r2.z +not r2.z, r1.z +and r2.w, r2.z, l(7) +and r3.x, r1.z, l(7) +imul null, r3.x, r1.y, r3.x +imad r2.w, r1.x, r2.w, r3.x +udiv r2.w, null, r2.w, l(7) +ubfe r3.xzw, l(3, 0, 3, 3), l(3, 0, 6, 9), r2.zzzz +ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r1.zzzz +imul null, r4.yzw, r1.yyyy, r4.yyzw +imad r3.xzw, r1.xxxx, r3.xxzw, r4.yyzw +udiv r3.xzw, null, r3.xxzw, l(7, 0, 7, 7) +ishl r3.xzw, r3.xxzw, l(8, 0, 16, 24) +or r2.z, r2.w, r3.x +or r2.z, r3.z, r2.z +or r2.z, r3.w, r2.z +movc r6.w, r1.w, r2.y, r2.z +ishl r6.xyz, r6.wwww, l(24, 16, 8, 0) +and r6.xyzw, r6.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) +or r5.xyzw, r5.xyzw, r6.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r5.xyzw +if_nz r3.y + iadd r2.y, r0.z, r0.y + ushr r3.x, r4.x, l(8) + not r5.x, r3.x + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + imul null, r3.xyzw, r0.wwww, r3.xyzw + imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw + and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw + ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + or r3.xyzw, r3.xyzw, r5.xyzw + ushr r2.z, r1.z, l(12) + ushr r2.w, r2.z, l(1) + and r2.w, r2.z, r2.w + and r2.w, r2.w, l(1170) + ishl r4.y, r2.w, l(1) + ushr r4.z, r2.w, l(1) + iadd r2.w, r2.w, r4.y + iadd r2.w, r2.w, r4.z + not r4.y, r2.w + and r4.z, r2.z, r4.y + iadd r4.w, -r4.z, l(2925) + and r4.y, r4.y, r4.w + and r4.w, r4.y, l(7) + and r5.x, r4.z, l(7) + imul null, r5.x, r1.y, r5.x + imad r4.w, r1.x, r4.w, r5.x + udiv r4.w, null, r4.w, l(5) + ubfe r5.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r4.yyyy + ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r4.zzzz + imul null, r6.xyz, r1.yyyy, r6.xyzx + imad r5.xyz, r1.xxxx, r5.xyzx, r6.xyzx + udiv r5.xyz, null, r5.xyzx, l(5, 5, 5, 0) + ishl r5.xyz, r5.xyzx, l(8, 16, 24, 0) + or r4.y, r4.w, r5.x + or r4.y, r5.y, r4.y + or r4.y, r5.z, r4.y + and r2.w, r2.w, r2.z + ishl r5.xyz, r2.wwww, l(5, 10, 15, 0) + and r5.xyz, r5.xyzx, l(256, 0x00010000, 0x01000000, 0) + bfi r2.w, l(1), l(0), r2.w, r5.x + iadd r2.w, r5.y, r2.w + iadd r2.w, r5.z, r2.w + imad r2.w, r2.w, l(255), r4.y + not r2.z, r2.z + and r4.y, r2.z, l(7) + ubfe r5.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r1.zzzz + imul null, r5.xyzw, r1.yyyy, r5.xyzw + imad r1.z, r1.x, r4.y, r5.x + udiv r1.z, null, r1.z, l(7) + ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r2.zzzz + imad r4.yzw, r1.xxxx, r4.yyzw, r5.yyzw + udiv r4.yzw, null, r4.yyzw, l(0, 7, 7, 7) + ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) + or r1.z, r1.z, r4.y + or r1.z, r4.z, r1.z + or r1.z, r4.w, r1.z + movc r5.w, r1.w, r2.w, r1.z + ishl r5.xyz, r5.wwww, l(24, 16, 8, 0) + and r5.xyzw, r5.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + or r3.xyzw, r3.xyzw, r5.xyzw + store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw + imad r1.z, vThreadID.y, l(4), l(2) + ilt r1.z, r1.z, CB0[0][2].y + if_nz r1.z + ushr r1.z, r2.x, l(8) + ushr r2.xy, r1.zzzz, l(1, 2, 0, 0) + and r2.z, r1.z, r2.x + and r2.z, r2.z, l(0x00492492) + ishl r2.w, r2.z, l(1) + ushr r3.x, r2.z, l(1) + iadd r2.z, r2.z, r2.w + iadd r2.z, r2.z, r3.x + and r2.w, r1.z, l(0x00249249) + iadd r3.x, r2.w, l(0x00db6db6) + and r3.x, r2.z, r3.x + or r3.y, r1.z, r2.x + and r3.zw, r2.xxxy, l(0, 0, 0x00249249, 0x00249249) + or r2.x, r2.y, r3.y + and r2.x, r2.x, l(0x00249249) + xor r2.x, r2.x, l(0x00249249) + not r3.yz, r3.zzwz + and r2.y, r2.w, r3.y + and r2.y, r3.z, r2.y + or r1.z, r1.z, r2.x + iadd r1.z, r1.z, l(0xffdb6db7) + or r1.z, r2.y, r1.z + ishl r2.xy, r2.yyyy, l(2, 1, 0, 0) + or r2.w, r1.z, r2.x + not r2.z, r2.z + and r2.z, r2.z, r2.w + or r2.z, r3.x, r2.z + iadd r2.x, r2.y, r2.x + or r1.z, r1.z, r2.x + movc r1.z, r1.w, r2.z, r1.z + ishl r2.x, r0.z, l(1) + iadd r2.x, r0.y, r2.x + ushr r3.x, r4.x, l(16) + not r5.x, r3.x + ushr r5.yzw, r5.xxxx, l(0, 2, 4, 6) + and r5.xyzw, r5.xyzw, l(3, 3, 3, 3) + ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + imul null, r3.xyzw, r0.wwww, r3.xyzw + imad r3.xyzw, r5.xyzw, r0.xxxx, r3.xyzw + and r5.xyzw, r3.xyzw, l(1023, 1023, 1023, 1023) + udiv r5.xyzw, null, r5.xyzw, l(3, 3, 3, 3) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + ubfe r6.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r3.xyzw + udiv r6.xyzw, null, r6.xyzw, l(3, 3, 3, 3) + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r6.xyzw, r5.xyzw + ushr r3.xyzw, r3.xyzw, l(20, 20, 20, 20) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + or r3.xyzw, r3.xyzw, r5.xyzw + ushr r2.y, r1.z, l(1) + and r2.y, r1.z, r2.y + and r2.y, r2.y, l(1170) + ishl r2.z, r2.y, l(1) + ushr r2.w, r2.y, l(1) + iadd r2.y, r2.y, r2.z + iadd r2.y, r2.y, r2.w + not r2.z, r2.y + and r2.yw, r1.zzzz, r2.yyyz + iadd r4.y, -r2.w, l(2925) + and r2.z, r2.z, r4.y + and r4.yz, r2.zzwz, l(0, 7, 7, 0) + imul null, r4.z, r1.y, r4.z + imad r4.y, r1.x, r4.y, r4.z + udiv r4.y, null, r4.y, l(5) + ubfe r5.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.zzzz + ubfe r6.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r2.wwww + imul null, r6.xyz, r1.yyyy, r6.xyzx + imad r5.xyz, r1.xxxx, r5.xyzx, r6.xyzx + udiv r5.xyz, null, r5.xyzx, l(5, 5, 5, 0) + ishl r5.xyz, r5.xyzx, l(8, 16, 24, 0) + or r2.z, r4.y, r5.x + or r2.z, r5.y, r2.z + or r2.z, r5.z, r2.z + ishl r4.yzw, r2.yyyy, l(0, 5, 10, 15) + and r4.yzw, r4.yyzw, l(0, 256, 0x00010000, 0x01000000) + bfi r2.y, l(1), l(0), r2.y, r4.y + iadd r2.y, r4.z, r2.y + iadd r2.y, r4.w, r2.y + imad r2.y, r2.y, l(255), r2.z + not r2.z, r1.z + and r2.w, r2.z, l(7) + and r4.y, r1.z, l(7) + imul null, r4.y, r1.y, r4.y + imad r2.w, r1.x, r2.w, r4.y + udiv r2.w, null, r2.w, l(7) + ubfe r4.yzw, l(0, 3, 3, 3), l(0, 3, 6, 9), r2.zzzz + ubfe r5.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r1.zzzz + imul null, r5.xyz, r1.yyyy, r5.xyzx + imad r4.yzw, r1.xxxx, r4.yyzw, r5.xxyz + udiv r4.yzw, null, r4.yyzw, l(0, 7, 7, 7) + ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) + or r2.z, r2.w, r4.y + or r2.z, r4.z, r2.z + or r2.z, r4.w, r2.z + movc r5.w, r1.w, r2.y, r2.z + ishl r5.xyz, r5.wwww, l(24, 16, 8, 0) + and r5.xyzw, r5.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + or r3.xyzw, r3.xyzw, r5.xyzw + store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw + imad r2.x, vThreadID.y, l(4), l(3) + ilt r2.x, r2.x, CB0[0][2].y + if_nz r2.x + imad r0.y, l(3), r0.z, r0.y + ushr r2.x, r4.x, l(24) + not r3.x, r2.x + ushr r3.yzw, r3.xxxx, l(0, 2, 4, 6) + and r3.xyzw, r3.xyzw, l(3, 3, 3, 3) + ushr r2.yzw, r2.xxxx, l(0, 2, 4, 6) + and r2.xyzw, r2.xyzw, l(3, 3, 3, 3) + imul null, r2.xyzw, r0.wwww, r2.xyzw + imad r2.xyzw, r3.xyzw, r0.xxxx, r2.xyzw + and r3.xyzw, r2.xyzw, l(1023, 1023, 1023, 1023) + udiv r3.xyzw, null, r3.xyzw, l(3, 3, 3, 3) + ishl r3.xyzw, r3.xyzw, l(16, 16, 16, 16) + ubfe r4.xyzw, l(10, 10, 10, 10), l(10, 10, 10, 10), r2.xyzw + udiv r4.xyzw, null, r4.xyzw, l(3, 3, 3, 3) + bfi r3.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r4.xyzw, r3.xyzw + ushr r2.xyzw, r2.xyzw, l(20, 20, 20, 20) + udiv r2.xyzw, null, r2.xyzw, l(3, 3, 3, 3) + or r2.xyzw, r2.xyzw, r3.xyzw + ushr r0.x, r1.z, l(12) + ushr r0.z, r0.x, l(1) + and r0.z, r0.x, r0.z + and r0.z, r0.z, l(1170) + ishl r0.w, r0.z, l(1) + ushr r3.x, r0.z, l(1) + iadd r0.z, r0.z, r0.w + iadd r0.z, r0.z, r3.x + not r0.w, r0.z + and r3.x, r0.w, r0.x + iadd r3.y, -r3.x, l(2925) + and r0.w, r0.w, r3.y + and r3.y, r0.w, l(7) + and r3.z, r3.x, l(7) + imul null, r3.z, r1.y, r3.z + imad r3.y, r1.x, r3.y, r3.z + ubfe r4.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r0.wwww + ubfe r3.xzw, l(3, 0, 3, 3), l(3, 0, 6, 9), r3.xxxx + imul null, r3.xzw, r1.yyyy, r3.xxzw + imad r3.xzw, r1.xxxx, r4.xxyz, r3.xxzw + udiv r3.xyzw, null, r3.xyzw, l(5, 5, 5, 5) + ishl r3.xzw, r3.xxzw, l(8, 0, 16, 24) + or r0.w, r3.x, r3.y + or r0.w, r3.z, r0.w + or r0.w, r3.w, r0.w + and r0.z, r0.z, r0.x + ishl r3.xyz, r0.zzzz, l(5, 10, 15, 0) + and r3.xyz, r3.xyzx, l(256, 0x00010000, 0x01000000, 0) + bfi r0.z, l(1), l(0), r0.z, r3.x + iadd r0.z, r3.y, r0.z + iadd r0.z, r3.z, r0.z + imad r0.z, r0.z, l(255), r0.w + not r0.x, r0.x + and r0.w, r0.x, l(7) + ubfe r3.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r1.zzzz + imul null, r3.xyzw, r1.yyyy, r3.xyzw + imad r0.w, r1.x, r0.w, r3.x + udiv r0.w, null, r0.w, l(7) + ubfe r4.xyz, l(3, 3, 3, 0), l(3, 6, 9, 0), r0.xxxx + imad r1.xyz, r1.xxxx, r4.xyzx, r3.yzwy + udiv r1.xyz, null, r1.xyzx, l(7, 7, 7, 0) + ishl r1.xyz, r1.xyzx, l(8, 16, 24, 0) + or r0.x, r0.w, r1.x + or r0.x, r1.y, r0.x + or r0.x, r1.z, r0.x + movc r1.w, r1.w, r0.z, r0.x + ishl r1.xyz, r1.wwww, l(24, 16, 8, 0) + and r1.xyzw, r1.xyzw, l(0xff000000, 0xff000000, 0xff000000, 0xff000000) + or r1.xyzw, r1.xyzw, r2.xyzw + store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw + endif + endif +endif +ret +// Approximately 850 instruction slots used +#endif + +const BYTE texture_load_dxt5_rgba8_cs[] = +{ + 68, 88, 66, 67, 130, 225, + 204, 120, 63, 100, 47, 154, + 231, 72, 104, 141, 115, 23, + 200, 61, 1, 0, 0, 0, + 124, 117, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 224, 116, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 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0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 82, 3, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 14, 1, 0, 0, + 176, 1, 0, 0, 6, 0, + 0, 0, 13, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 11, 0, + 0, 0, 13, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5a_r8_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5a_r8_cs.h new file mode 100644 index 000000000..57e87ce15 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_dxt5a_r8_cs.h @@ -0,0 +1,5606 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 19 +dcl_thread_group 8, 32, 1 +ishl r0.x, vThreadID.x, l(2) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 2, 2, 0) +imad r0.z, vThreadID.z, CB0[0][2].y, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(3, 0, 1, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(11) + and r1.w, r1.w, l(0x00003000) + bfi r1.w, l(3), l(9), r0.x, r1.w + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(19, 0, 19, 0), l(11, 0, 14, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(9, 0, 12, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 3, 1, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(6, 0, 7, 0) + and r2.xz, r2.xxzx, l(896, 0, 2048, 0) + bfi r1.w, l(3), l(4), r0.x, r2.x + bfi r1.w, l(22), l(10), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(7, 6, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(3) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz +endif +if_nz r1.y + ushr r3.xyzw, r2.zxwy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +movc r0.w, r0.w, l(2), l(1) +iadd r0.x, r0.w, r0.x +ld r4.xyzw, r0.xxxx, T0[0].ywxz +if_nz r1.x + ishl r5.xyzw, r4.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.zxwy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.ywxz, r6.ywxz +endif +if_nz r1.y + ushr r1.xyzw, r4.zxwy, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r1.ywxz + mov r2.zw, r4.xxxy +else + mov r2.zw, r4.xxxy +endif +ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) +and r1.xyzw, r3.xzyw, l(255, 255, 255, 255) +ushr r4.xy, r4.zwzz, l(8, 8, 0, 0) +and r5.xyzw, r4.zxwy, l(255, 255, 255, 255) +mov r4.xy, r3.xyxx +ushr r3.xyzw, r4.xyzw, l(16, 16, 16, 16) +bfi r4.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, r4.xyzw +uge r0.xw, r1.yyyw, r1.xxxz +ushr r4.xyzw, r3.xxyy, l(1, 2, 1, 2) +and r6.xy, r3.xyxx, r4.xzxx +and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) +ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) +ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r6.xy, r6.xyxx, r7.xyxx +and r7.xyzw, r3.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) +iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) +and r6.zw, r6.xxxy, r8.xxxy +or r8.xy, r3.xyxx, r4.xzxx +and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) +or r4.xy, r4.ywyy, r8.xyxx +and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) +xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) +not r9.xyzw, r9.xyzw +and r10.xyzw, r7.xxyy, r9.xxzz +and r9.xyzw, r9.yyww, r10.xyzw +or r3.xy, r3.xyxx, r4.xyxx +iadd r3.xy, r3.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) +or r3.xy, r9.xwxx, r3.xyxx +ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) +or r7.xy, r3.xyxx, r4.xzxx +not r6.xy, r6.xyxx +and r6.xy, r6.xyxx, r7.xyxx +or r6.xy, r6.zwzz, r6.xyxx +iadd r4.xy, r4.ywyy, r4.xzxx +or r3.xy, r3.xyxx, r4.xyxx +movc r4.xy, r0.xwxx, r6.xyxx, r3.xyxx +uge r3.xy, r5.ywyy, r5.xzxx +ushr r6.xyzw, r3.zzww, l(1, 2, 1, 2) +and r7.xy, r3.zwzz, r6.xzxx +and r7.xy, r7.xyxx, l(0x00492492, 0x00492492, 0, 0) +ishl r8.xy, r7.xyxx, l(1, 1, 0, 0) +ushr r9.xy, r7.xyxx, l(1, 1, 0, 0) +iadd r7.xy, r7.xyxx, r8.xyxx +iadd r7.xy, r7.xyxx, r9.xyxx +and r8.xy, r7.xyxx, r8.zwzz +or r8.zw, r3.zzzw, r6.xxxz +and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) +or r6.xy, r6.ywyy, r8.zwzz +and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) +xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) +not r9.xyzw, r9.xyzw +and r10.xyzw, r7.zzww, r9.xxzz +and r9.xyzw, r9.yyww, r10.xyzw +or r3.zw, r3.zzzw, r6.xxxy +iadd r3.zw, r3.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) +or r3.zw, r9.yyyw, r3.zzzw +ishl r6.xyzw, r9.xyzw, l(2, 1, 2, 1) +or r7.zw, r3.zzzw, r6.xxxz +not r7.xy, r7.xyxx +and r7.xy, r7.xyxx, r7.zwzz +or r7.xy, r8.xyxx, r7.xyxx +iadd r6.xy, r6.ywyy, r6.xzxx +or r3.zw, r3.zzzw, r6.xxxy +movc r4.zw, r3.xxxy, r7.xxxy, r3.zzzw +ushr r6.xyzw, r4.xyzw, l(1, 1, 1, 1) +and r6.xyzw, r4.xyzw, r6.xyzw +and r6.xyzw, r6.xyzw, l(1170, 1170, 1170, 1170) +ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) +ushr r8.xyzw, r6.xyzw, l(1, 1, 1, 1) +iadd r6.xyzw, r6.xyzw, r7.xyzw +iadd r6.xyzw, r6.xyzw, r8.xyzw +not r7.xyzw, r6.xxxy +and r8.xyzw, r4.xxxy, r7.zzzw +iadd r9.xyzw, -r8.zzzw, l(2925, 2925, 2925, 2925) +and r7.xyzw, r7.xyzw, r9.xyzw +and r3.zw, r7.zzzw, l(0, 0, 7, 7) +and r9.xy, r8.zwzz, l(7, 7, 0, 0) +imul null, r9.xy, r1.ywyy, r9.xyxx +imad r3.zw, r1.xxxz, r3.zzzw, r9.xxxy +udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) +ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw +ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw +imul null, r10.xyzw, r1.yyyw, r10.xyzw +imad r9.xyzw, r1.xxxz, r9.xyzw, r10.xyzw +udiv r9.xyzw, null, r9.xyzw, l(5, 5, 5, 5) +ishl r9.xyzw, r9.xyzw, l(8, 16, 24, 8) +or r3.zw, r3.zzzw, r9.xxxw +or r3.z, r9.y, r3.z +or r3.z, r9.z, r3.z +and r9.xyzw, r4.xyzw, r6.xyzw +ishl r10.xyzw, r9.xxxy, l(5, 10, 15, 5) +and r10.xyzw, r10.xyzw, l(256, 0x00010000, 0x01000000, 256) +bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r9.xyxx, r10.xwxx +iadd r6.x, r10.y, r6.x +iadd r6.x, r10.z, r6.x +imad r3.z, r6.x, l(255), r3.z +not r10.xyzw, r4.xxxy +and r7.xy, r10.zwzz, l(7, 7, 0, 0) +and r11.xyzw, r4.xyzw, l(7, 7, 7, 7) +imul null, r8.xy, r1.ywyy, r11.xyxx +imad r7.xy, r1.xzxx, r7.xyxx, r8.xyxx +udiv r7.xy, null, r7.xyxx, l(7, 7, 0, 0) +ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r10.xyzw +ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy +imul null, r13.xyzw, r1.yyyw, r13.xyzw +imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw +udiv r12.xyzw, null, r12.xyzw, l(7, 7, 7, 7) +ishl r12.xyzw, r12.xyzw, l(8, 16, 24, 8) +or r7.xy, r7.xyxx, r12.xwxx +or r6.x, r12.y, r7.x +or r6.x, r12.z, r6.x +movc r12.x, r0.x, r3.z, r6.x +ubfe r7.xz, l(3, 0, 3, 0), l(6, 0, 9, 0), r7.wwww +ubfe r8.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r8.wwww +imul null, r8.xy, r1.wwww, r8.xyxx +imad r7.xz, r1.zzzz, r7.xxzx, r8.xxyx +udiv r7.xz, null, r7.xxzx, l(5, 0, 5, 0) +ishl r7.xz, r7.xxzx, l(16, 0, 24, 0) +or r3.z, r3.w, r7.x +or r3.z, r7.z, r3.z +ishl r8.xyzw, r9.yyww, l(10, 15, 10, 15) +and r8.xyzw, r8.xyzw, l(0x00010000, 0x01000000, 0x00010000, 0x01000000) +iadd r3.w, r6.y, r8.x +iadd r3.w, r8.y, r3.w +imad r3.z, r3.w, l(255), r3.z +ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r10.wwww +ubfe r10.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww +imul null, r7.xz, r1.wwww, r10.xxyx +imad r6.xy, r1.zzzz, r6.xyxx, r7.xzxx +udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) +ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) +or r3.w, r6.x, r7.y +or r3.w, r6.y, r3.w +movc r12.y, r0.w, r3.z, r3.w +not r6.xyzw, r6.zzzw +and r7.xyzw, r4.zzzw, r6.zzzw +iadd r13.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) +and r6.xyzw, r6.xyzw, r13.xyzw +and r3.zw, r6.zzzw, l(0, 0, 7, 7) +and r8.xy, r7.zwzz, l(7, 7, 0, 0) +imul null, r8.xy, r5.ywyy, r8.xyxx +imad r3.zw, r5.xxxz, r3.zzzw, r8.xxxy +udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) +ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw +ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw +imul null, r14.xyzw, r5.yyyw, r14.xyzw +imad r13.xyzw, r5.xxxz, r13.xyzw, r14.xyzw +udiv r13.xyzw, null, r13.xyzw, l(5, 5, 5, 5) +ishl r13.xyzw, r13.xyzw, l(8, 16, 24, 8) +or r3.zw, r3.zzzw, r13.xxxw +or r3.z, r13.y, r3.z +or r3.z, r13.z, r3.z +ishl r13.xyzw, r9.zzzw, l(5, 10, 15, 5) +and r13.xyzw, r13.xyzw, l(256, 0x00010000, 0x01000000, 256) +bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r9.zwzz, r13.xwxx +iadd r6.x, r13.y, r6.x +iadd r6.x, r13.z, r6.x +imad r3.z, r6.x, l(255), r3.z +not r9.xyzw, r4.zzzw +and r6.xz, r9.zzwz, l(7, 0, 7, 0) +imul null, r7.xy, r5.ywyy, r11.zwzz +imad r6.xz, r5.xxzx, r6.xxzx, r7.xxyx +udiv r6.xz, null, r6.xxzx, l(7, 0, 7, 0) +ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw +ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw +imul null, r13.xyzw, r5.yyyw, r13.xyzw +imad r11.xyzw, r5.xxxz, r11.xyzw, r13.xyzw +udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) +ishl r11.xyzw, r11.xyzw, l(8, 16, 24, 8) +or r6.xz, r6.xxzx, r11.xxwx +or r6.x, r11.y, r6.x +or r6.x, r11.z, r6.x +movc r12.z, r3.x, r3.z, r6.x +ubfe r6.xw, l(3, 0, 0, 3), l(6, 0, 0, 9), r6.wwww +ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r7.wwww +imul null, r7.xy, r5.wwww, r7.xyxx +imad r6.xw, r5.zzzz, r6.xxxw, r7.xxxy +udiv r6.xw, null, r6.xxxw, l(5, 0, 0, 5) +ishl r6.xw, r6.xxxw, l(16, 0, 0, 24) +or r3.z, r3.w, r6.x +or r3.z, r6.w, r3.z +iadd r3.w, r8.z, r6.y +iadd r3.w, r8.w, r3.w +imad r3.z, r3.w, l(255), r3.z +ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww +imul null, r7.xy, r5.wwww, r10.zwzz +imad r6.xy, r5.zzzz, r6.xyxx, r7.xyxx +udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) +ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) +or r3.w, r6.x, r6.z +or r3.w, r6.y, r3.w +movc r12.w, r3.y, r3.z, r3.w +store_uav_typed U0[0].xyzw, r0.yyyy, r12.xyzw +imad r3.z, vThreadID.y, l(4), l(1) +ilt r3.w, r3.z, CB0[0][2].y +if_nz r3.w + iadd r0.y, r0.z, r0.y + ushr r6.xyzw, r4.xyzw, l(12, 12, 12, 12) + ushr r7.xyzw, r6.xyzw, l(1, 1, 1, 1) + and r7.xyzw, r6.xyzw, r7.xyzw + and r7.xyzw, r7.xyzw, l(1170, 1170, 1170, 1170) + ishl r8.xyzw, r7.xyzw, l(1, 1, 1, 1) + ushr r9.xyzw, r7.xyzw, l(1, 1, 1, 1) + iadd r7.xyzw, r7.xyzw, r8.xyzw + iadd r7.xyzw, r7.xyzw, r9.xyzw + not r8.xyzw, r7.xyzw + and r9.xyzw, r6.xyzw, r8.xyzw + iadd r10.xyzw, -r9.xyzw, l(2925, 2925, 2925, 2925) + and r8.xyzw, r8.xyzw, r10.xyzw + and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) + and r11.xyzw, r9.xyzw, l(7, 7, 7, 7) + imul null, r11.xy, r1.ywyy, r11.xyxx + imad r10.xy, r1.xzxx, r10.xyxx, r11.xyxx + udiv r10.xy, null, r10.xyxx, l(5, 5, 0, 0) + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy + ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xxxy + imul null, r13.xyzw, r1.yyyw, r13.xyzw + imad r12.xyzw, r1.xxxz, r12.xyzw, r13.xyzw + udiv r12.xyzw, null, r12.xyzw, l(5, 5, 5, 5) + ishl r12.xyzw, r12.xyzw, l(8, 16, 24, 8) + or r10.xy, r10.xyxx, r12.xwxx + or r3.w, r12.y, r10.x + or r3.w, r12.z, r3.w + and r7.xyzw, r6.xyzw, r7.xyzw + ishl r12.xyzw, r7.xxxy, l(5, 10, 15, 5) + and r12.xyzw, r12.xyzw, l(256, 0x00010000, 0x01000000, 256) + bfi r11.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r7.xyxx, r12.xwxx + iadd r7.x, r12.y, r11.x + iadd r7.x, r12.z, r7.x + imad r3.w, r7.x, l(255), r3.w + not r6.xyzw, r6.xyzw + and r12.xyzw, r6.xyzw, l(7, 7, 7, 7) + ubfe r13.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx + imul null, r13.xyzw, r1.yyyy, r13.xyzw + imad r4.x, r1.x, r12.x, r13.x + udiv r4.x, null, r4.x, l(7) + ubfe r14.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xxxy + imad r13.xyz, r1.xxxx, r14.xyzx, r13.yzwy + udiv r13.xyz, null, r13.xyzx, l(7, 7, 7, 0) + ishl r13.xyz, r13.xyzx, l(8, 16, 24, 0) + or r4.x, r4.x, r13.x + or r4.x, r13.y, r4.x + or r4.x, r13.z, r4.x + movc r13.x, r0.x, r3.w, r4.x + ubfe r15.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz + ubfe r16.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r9.yyzz + imul null, r8.xy, r1.wwww, r16.xyxx + imad r8.xy, r1.zzzz, r15.xyxx, r8.xyxx + udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) + ishl r8.xy, r8.xyxx, l(16, 24, 0, 0) + or r3.w, r8.x, r10.y + or r3.w, r8.y, r3.w + ishl r17.xyzw, r7.yyzz, l(10, 15, 5, 10) + and r17.xyzw, r17.xyzw, l(0x00010000, 0x01000000, 256, 0x00010000) + iadd r4.x, r11.y, r17.x + iadd r4.x, r17.y, r4.x + imad r3.w, r4.x, l(255), r3.w + ubfe r18.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy + imul null, r18.xyzw, r1.wwww, r18.xyzw + imad r4.x, r1.z, r12.y, r18.x + imad r4.y, r1.z, r14.w, r18.y + udiv r4.xy, null, r4.xyxx, l(7, 7, 0, 0) + ishl r4.y, r4.y, l(8) + or r4.x, r4.y, r4.x + ubfe r14.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r6.yyzz + imad r6.xy, r1.zzzz, r14.xyxx, r18.zwzz + udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) + ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) + or r4.x, r4.x, r6.x + or r4.x, r6.y, r4.x + movc r13.y, r0.w, r3.w, r4.x + imul null, r4.xy, r5.ywyy, r11.zwzz + imad r4.xy, r5.xzxx, r10.zwzz, r4.xyxx + udiv r4.xy, null, r4.xyxx, l(5, 5, 0, 0) + imul null, r6.xy, r5.yyyy, r16.zwzz + imad r6.xy, r5.xxxx, r15.zwzz, r6.xyxx + udiv r6.xy, null, r6.xyxx, l(5, 5, 0, 0) + ishl r6.xy, r6.xyxx, l(8, 16, 0, 0) + or r3.w, r4.x, r6.x + or r3.w, r6.y, r3.w + ubfe r8.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww + ubfe r9.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r9.zwww + imul null, r9.xyzw, r5.ywww, r9.xyzw + imad r8.xyzw, r5.xzzz, r8.xyzw, r9.xyzw + udiv r8.xyzw, null, r8.xyzw, l(5, 5, 5, 5) + ishl r8.xyzw, r8.xyzw, l(24, 8, 16, 24) + or r3.w, r3.w, r8.x + bfi r4.x, l(1), l(0), r7.z, r17.z + iadd r4.x, r17.w, r4.x + ishl r9.xyzw, r7.zwww, l(15, 5, 10, 15) + and r9.xyzw, r9.xyzw, l(0x01000000, 256, 0x00010000, 0x01000000) + iadd r4.x, r4.x, r9.x + imad r3.w, r4.x, l(255), r3.w + ubfe r10.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz + imul null, r10.xyzw, r5.yyyy, r10.xyzw + imad r4.x, r5.x, r12.z, r10.x + udiv r4.x, null, r4.x, l(7) + imad r6.xy, r5.xxxx, r14.zwzz, r10.yzyy + udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) + ishl r6.xy, r6.xyxx, l(8, 16, 0, 0) + or r4.x, r4.x, r6.x + or r4.x, r6.y, r4.x + ubfe r6.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r6.zwww + imad r4.z, r5.x, r6.x, r10.w + udiv r4.z, null, r4.z, l(7) + ishl r4.z, r4.z, l(24) + or r4.x, r4.z, r4.x + movc r13.z, r3.x, r3.w, r4.x + or r3.w, r4.y, r8.y + or r3.w, r8.z, r3.w + or r3.w, r8.w, r3.w + bfi r4.x, l(1), l(0), r7.w, r9.y + iadd r4.x, r9.z, r4.x + iadd r4.x, r9.w, r4.x + imad r3.w, r4.x, l(255), r3.w + ubfe r4.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww + imul null, r4.xyzw, r4.xyzw, r5.wwww + imad r4.x, r5.z, r12.w, r4.x + imad r4.yzw, r5.zzzz, r6.yyzw, r4.yyzw + udiv r4.xyzw, null, r4.xyzw, l(7, 7, 7, 7) + ishl r4.yzw, r4.yyzw, l(0, 8, 16, 24) + or r4.x, r4.y, r4.x + or r4.x, r4.z, r4.x + or r4.x, r4.w, r4.x + movc r13.w, r3.y, r3.w, r4.x + store_uav_typed U0[0].xyzw, r0.yyyy, r13.xyzw + iadd r3.z, r3.z, l(1) + ilt r3.w, r3.z, CB0[0][2].y + if_nz r3.w + iadd r0.y, r0.z, r0.y + ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) + ushr r4.xyzw, r2.xxyy, l(1, 2, 1, 2) + and r6.xy, r2.xyxx, r4.xzxx + and r6.xy, r6.xyxx, l(0x00492492, 0x00492492, 0, 0) + ishl r6.zw, r6.xxxy, l(0, 0, 1, 1) + ushr r7.xy, r6.xyxx, l(1, 1, 0, 0) + iadd r6.xy, r6.xyxx, r6.zwzz + iadd r6.xy, r6.xyxx, r7.xyxx + and r7.xyzw, r2.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) + iadd r8.xyzw, r7.xyzw, l(0x00db6db6, 0x00db6db6, 0x00db6db6, 0x00db6db6) + and r6.zw, r6.xxxy, r8.xxxy + or r8.xy, r2.xyxx, r4.xzxx + and r9.xyzw, r4.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) + or r4.xy, r4.ywyy, r8.xyxx + and r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) + xor r4.xy, r4.xyxx, l(0x00249249, 0x00249249, 0, 0) + not r9.xyzw, r9.xyzw + and r10.xyzw, r7.xxyy, r9.xxzz + and r9.xyzw, r9.yyww, r10.xyzw + or r2.xy, r2.xyxx, r4.xyxx + iadd r2.xy, r2.xyxx, l(0xffdb6db7, 0xffdb6db7, 0, 0) + or r2.xy, r9.xwxx, r2.xyxx + ishl r4.xyzw, r9.xyzw, l(2, 1, 2, 1) + or r7.xy, r2.xyxx, r4.xzxx + not r6.xy, r6.xyxx + and r6.xy, r6.xyxx, r7.xyxx + or r6.xy, r6.zwzz, r6.xyxx + iadd r4.xy, r4.ywyy, r4.xzxx + or r2.xy, r2.xyxx, r4.xyxx + movc r4.xy, r0.xwxx, r6.xyxx, r2.xyxx + ushr r6.xyzw, r2.zzww, l(1, 2, 1, 2) + and r2.xy, r2.zwzz, r6.xzxx + and r2.xy, r2.xyxx, l(0x00492492, 0x00492492, 0, 0) + ishl r7.xy, r2.xyxx, l(1, 1, 0, 0) + ushr r8.xy, r2.xyxx, l(1, 1, 0, 0) + iadd r2.xy, r2.xyxx, r7.xyxx + iadd r2.xy, r2.xyxx, r8.xyxx + and r7.xy, r2.xyxx, r8.zwzz + or r8.xy, r2.zwzz, r6.xzxx + and r9.xyzw, r6.xyzw, l(0x00249249, 0x00249249, 0x00249249, 0x00249249) + or r6.xy, r6.ywyy, r8.xyxx + and r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) + xor r6.xy, r6.xyxx, l(0x00249249, 0x00249249, 0, 0) + not r8.xyzw, r9.xyzw + and r9.xyzw, r7.zzww, r8.xxzz + and r8.xyzw, r8.yyww, r9.xyzw + or r2.zw, r2.zzzw, r6.xxxy + iadd r2.zw, r2.zzzw, l(0, 0, 0xffdb6db7, 0xffdb6db7) + or r2.zw, r8.yyyw, r2.zzzw + ishl r6.xyzw, r8.xyzw, l(2, 1, 2, 1) + or r7.zw, r2.zzzw, r6.xxxz + not r2.xy, r2.xyxx + and r2.xy, r2.xyxx, r7.zwzz + or r2.xy, r7.xyxx, r2.xyxx + iadd r6.xy, r6.ywyy, r6.xzxx + or r2.zw, r2.zzzw, r6.xxxy + movc r4.zw, r3.xxxy, r2.xxxy, r2.zzzw + ushr r2.xyzw, r4.xyzw, l(1, 1, 1, 1) + and r2.xyzw, r4.xyzw, r2.xyzw + and r2.xyzw, r2.xyzw, l(1170, 1170, 1170, 1170) + ishl r6.xyzw, r2.xyzw, l(1, 1, 1, 1) + ushr r7.xyzw, r2.xyzw, l(1, 1, 1, 1) + iadd r2.xyzw, r2.xyzw, r6.xyzw + iadd r2.xyzw, r2.xyzw, r7.xyzw + not r6.xyzw, r2.xxxy + and r7.xyzw, r4.xxxy, r6.zzzw + iadd r8.xyzw, -r7.zzzw, l(2925, 2925, 2925, 2925) + and r6.xyzw, r6.xyzw, r8.xyzw + and r8.xy, r6.zwzz, l(7, 7, 0, 0) + and r8.zw, r7.zzzw, l(0, 0, 7, 7) + imul null, r8.zw, r1.yyyw, r8.zzzw + imad r8.xy, r1.xzxx, r8.xyxx, r8.zwzz + udiv r8.xy, null, r8.xyxx, l(5, 5, 0, 0) + ubfe r9.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw + ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xyzw + imul null, r10.xyzw, r1.yyyw, r10.xyzw + imad r9.xyzw, r1.xxxz, r9.xyzw, r10.xyzw + udiv r9.xyzw, null, r9.xyzw, l(5, 5, 5, 5) + ishl r9.xyzw, r9.xyzw, l(8, 16, 24, 8) + or r6.xy, r8.xyxx, r9.xwxx + or r3.w, r9.y, r6.x + or r3.w, r9.z, r3.w + and r8.xyzw, r2.xyzw, r4.xyzw + ishl r9.xyzw, r8.xxxy, l(5, 10, 15, 5) + and r9.xyzw, r9.xyzw, l(256, 0x00010000, 0x01000000, 256) + bfi r2.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r8.xyxx, r9.xwxx + iadd r2.x, r9.y, r2.x + iadd r2.x, r9.z, r2.x + imad r2.x, r2.x, l(255), r3.w + not r9.xyzw, r4.xxxy + and r6.xz, r9.zzwz, l(7, 0, 7, 0) + and r10.xyzw, r4.xyzw, l(7, 7, 7, 7) + imul null, r7.xy, r1.ywyy, r10.xyxx + imad r6.xz, r1.xxzx, r6.xxzx, r7.xxyx + udiv r6.xz, null, r6.xxzx, l(7, 0, 7, 0) + ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r9.xyzw + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.xxxy + imul null, r12.xyzw, r1.yyyw, r12.xyzw + imad r11.xyzw, r1.xxxz, r11.xyzw, r12.xyzw + udiv r11.xyzw, null, r11.xyzw, l(7, 7, 7, 7) + ishl r11.xyzw, r11.xyzw, l(8, 16, 24, 8) + or r6.xz, r6.xxzx, r11.xxwx + or r3.w, r11.y, r6.x + or r3.w, r11.z, r3.w + movc r11.x, r0.x, r2.x, r3.w + ubfe r6.xw, l(3, 0, 0, 3), l(6, 0, 0, 9), r6.wwww + ubfe r7.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r7.wwww + imul null, r7.xy, r1.wwww, r7.xyxx + imad r6.xw, r1.zzzz, r6.xxxw, r7.xxxy + udiv r6.xw, null, r6.xxxw, l(5, 0, 0, 5) + ishl r6.xw, r6.xxxw, l(16, 0, 0, 24) + or r2.x, r6.x, r6.y + or r2.x, r6.w, r2.x + ishl r7.xyzw, r8.yyww, l(10, 15, 10, 15) + and r7.xyzw, r7.xyzw, l(0x00010000, 0x01000000, 0x00010000, 0x01000000) + iadd r2.y, r2.y, r7.x + iadd r2.y, r7.y, r2.y + imad r2.x, r2.y, l(255), r2.x + ubfe r6.xy, l(3, 3, 0, 0), l(6, 9, 0, 0), r9.wwww + ubfe r9.xyzw, l(3, 3, 3, 3), l(6, 9, 6, 9), r4.yyww + imul null, r7.xy, r1.wwww, r9.xyxx + imad r6.xy, r1.zzzz, r6.xyxx, r7.xyxx + udiv r6.xy, null, r6.xyxx, l(7, 7, 0, 0) + ishl r6.xy, r6.xyxx, l(16, 24, 0, 0) + or r2.y, r6.x, r6.z + or r2.y, r6.y, r2.y + movc r11.y, r0.w, r2.x, r2.y + not r2.xyzw, r2.zzzw + and r6.xyzw, r2.zzzw, r4.zzzw + iadd r12.xyzw, -r6.zzzw, l(2925, 2925, 2925, 2925) + and r2.xyzw, r2.xyzw, r12.xyzw + and r7.xy, r2.zwzz, l(7, 7, 0, 0) + and r8.xy, r6.zwzz, l(7, 7, 0, 0) + imul null, r8.xy, r5.ywyy, r8.xyxx + imad r7.xy, r5.xzxx, r7.xyxx, r8.xyxx + udiv r7.xy, null, r7.xyxx, l(5, 5, 0, 0) + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r2.xyzw + ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r6.xyzw + imul null, r13.xyzw, r5.yyyw, r13.xyzw + imad r12.xyzw, r5.xxxz, r12.xyzw, r13.xyzw + udiv r12.xyzw, null, r12.xyzw, l(5, 5, 5, 5) + ishl r12.xyzw, r12.xyzw, l(8, 16, 24, 8) + or r2.xy, r7.xyxx, r12.xwxx + or r2.x, r12.y, r2.x + or r2.x, r12.z, r2.x + ishl r12.xyzw, r8.zzzw, l(5, 10, 15, 5) + and r12.xyzw, r12.xyzw, l(256, 0x00010000, 0x01000000, 256) + bfi r6.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r8.zwzz, r12.xwxx + iadd r2.z, r12.y, r6.x + iadd r2.z, r12.z, r2.z + imad r2.x, r2.z, l(255), r2.x + not r8.xyzw, r4.zzzw + and r6.xz, r8.zzwz, l(7, 0, 7, 0) + imul null, r7.xy, r5.ywyy, r10.zwzz + imad r6.xz, r5.xxzx, r6.xxzx, r7.xxyx + udiv r6.xz, null, r6.xxzx, l(7, 0, 7, 0) + ubfe r10.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xyzw + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r4.zzzw + imul null, r12.xyzw, r5.yyyw, r12.xyzw + imad r10.xyzw, r5.xxxz, r10.xyzw, r12.xyzw + udiv r10.xyzw, null, r10.xyzw, l(7, 7, 7, 7) + ishl r10.xyzw, r10.xyzw, l(8, 16, 24, 8) + or r6.xz, r6.xxzx, r10.xxwx + or r2.z, r10.y, r6.x + or r2.z, r10.z, r2.z + movc r11.z, r3.x, r2.x, r2.z + ubfe r2.xz, l(3, 0, 3, 0), l(6, 0, 9, 0), r2.wwww + ubfe r6.xw, l(3, 0, 0, 3), l(6, 0, 0, 9), r6.wwww + imul null, r6.xw, r5.wwww, r6.xxxw + imad r2.xz, r5.zzzz, r2.xxzx, r6.xxwx + udiv r2.xz, null, r2.xxzx, l(5, 0, 5, 0) + ishl r2.xz, r2.xxzx, l(16, 0, 24, 0) + or r2.x, r2.x, r2.y + or r2.x, r2.z, r2.x + iadd r2.y, r7.z, r6.y + iadd r2.y, r7.w, r2.y + imad r2.x, r2.y, l(255), r2.x + ubfe r2.yz, l(0, 3, 3, 0), l(0, 6, 9, 0), r8.wwww + imul null, r6.xy, r5.wwww, r9.zwzz + imad r2.yz, r5.zzzz, r2.yyzy, r6.xxyx + udiv r2.yz, null, r2.yyzy, l(0, 7, 7, 0) + ishl r2.yz, r2.yyzy, l(0, 16, 24, 0) + or r2.y, r2.y, r6.z + or r2.y, r2.z, r2.y + movc r11.w, r3.y, r2.x, r2.y + store_uav_typed U0[0].xyzw, r0.yyyy, r11.xyzw + or r2.x, r3.z, l(3) + ilt r2.x, r2.x, CB0[0][2].y + if_nz r2.x + iadd r0.y, r0.z, r0.y + ushr r2.xyzw, r4.xyzw, l(12, 12, 12, 12) + ushr r6.xyzw, r2.xyzw, l(1, 1, 1, 1) + and r6.xyzw, r2.xyzw, r6.xyzw + and r6.xyzw, r6.xyzw, l(1170, 1170, 1170, 1170) + ishl r7.xyzw, r6.xyzw, l(1, 1, 1, 1) + ushr r8.xyzw, r6.xyzw, l(1, 1, 1, 1) + iadd r6.xyzw, r6.xyzw, r7.xyzw + iadd r6.xyzw, r6.xyzw, r8.xyzw + not r7.xyzw, r6.xyzw + and r8.xyzw, r2.xyzw, r7.xyzw + iadd r9.xyzw, -r8.xyzw, l(2925, 2925, 2925, 2925) + and r7.xyzw, r7.xyzw, r9.xyzw + and r9.xyzw, r7.xyzw, l(7, 7, 7, 7) + and r10.xyzw, r8.xyzw, l(7, 7, 7, 7) + imul null, r3.zw, r1.yyyw, r10.xxxy + imad r3.zw, r1.xxxz, r9.xxxy, r3.zzzw + udiv r3.zw, null, r3.zzzw, l(0, 0, 5, 5) + ubfe r11.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r7.xxxy + ubfe r12.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r8.xxxy + imul null, r12.xyzw, r1.yyyw, r12.xyzw + imad r11.xyzw, r1.xxxz, r11.xyzw, r12.xyzw + udiv r11.xyzw, null, r11.xyzw, l(5, 5, 5, 5) + ishl r11.xyzw, r11.xyzw, l(8, 16, 24, 8) + or r3.zw, r3.zzzw, r11.xxxw + or r0.z, r11.y, r3.z + or r0.z, r11.z, r0.z + and r6.xyzw, r2.xyzw, r6.xyzw + ishl r11.xyzw, r6.xxxy, l(5, 10, 15, 5) + and r11.xyzw, r11.xyzw, l(256, 0x00010000, 0x01000000, 256) + bfi r9.xy, l(1, 1, 0, 0), l(0, 0, 0, 0), r6.xyxx, r11.xwxx + iadd r3.z, r11.y, r9.x + iadd r3.z, r11.z, r3.z + imad r0.z, r3.z, l(255), r0.z + not r2.xyzw, r2.xyzw + and r11.xyzw, r2.xyzw, l(7, 7, 7, 7) + ubfe r12.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.xxxx + imul null, r12.xyzw, r1.yyyy, r12.xyzw + imad r1.y, r1.x, r11.x, r12.x + udiv r1.y, null, r1.y, l(7) + ubfe r13.xyzw, l(3, 3, 3, 3), l(3, 6, 9, 3), r2.xxxy + imad r12.xyz, r1.xxxx, r13.xyzx, r12.yzwy + udiv r12.xyz, null, r12.xyzx, l(7, 7, 7, 0) + ishl r12.xyz, r12.xyzx, l(8, 16, 24, 0) + or r1.x, r1.y, r12.x + or r1.x, r12.y, r1.x + or r1.x, r12.z, r1.x + movc r12.x, r0.x, r0.z, r1.x + ubfe r14.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r7.yyzz + ubfe r15.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r8.yyzz + imul null, r0.xz, r1.wwww, r15.xxyx + imad r0.xz, r1.zzzz, r14.xxyx, r0.xxzx + udiv r0.xz, null, r0.xxzx, l(5, 0, 5, 0) + ishl r0.xz, r0.xxzx, l(16, 0, 24, 0) + or r0.x, r0.x, r3.w + or r0.x, r0.z, r0.x + ishl r16.xyzw, r6.yyzz, l(10, 15, 5, 10) + and r16.xyzw, r16.xyzw, l(0x00010000, 0x01000000, 256, 0x00010000) + iadd r0.z, r9.y, r16.x + iadd r0.z, r16.y, r0.z + imad r0.x, r0.z, l(255), r0.x + ubfe r17.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.yyyy + imul null, r17.xyzw, r1.wwww, r17.xyzw + imad r0.z, r1.z, r11.y, r17.x + udiv r0.z, null, r0.z, l(7) + imad r1.x, r1.z, r13.w, r17.y + udiv r1.x, null, r1.x, l(7) + ishl r1.x, r1.x, l(8) + or r0.z, r0.z, r1.x + ubfe r13.xyzw, l(3, 3, 3, 3), l(6, 9, 3, 6), r2.yyzz + imad r1.xy, r1.zzzz, r13.xyxx, r17.zwzz + udiv r1.xy, null, r1.xyxx, l(7, 7, 0, 0) + ishl r1.xy, r1.xyxx, l(16, 24, 0, 0) + or r0.z, r0.z, r1.x + or r0.z, r1.y, r0.z + movc r12.y, r0.w, r0.x, r0.z + imul null, r0.xz, r5.yywy, r10.zzwz + imad r0.xz, r5.xxzx, r9.zzwz, r0.xxzx + udiv r0.xz, null, r0.xxzx, l(5, 0, 5, 0) + imul null, r1.xy, r5.yyyy, r15.zwzz + imad r1.xy, r5.xxxx, r14.zwzz, r1.xyxx + udiv r1.xy, null, r1.xyxx, l(5, 5, 0, 0) + ishl r1.xy, r1.xyxx, l(8, 16, 0, 0) + or r0.x, r0.x, r1.x + or r0.x, r1.y, r0.x + ubfe r1.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r7.zwww + ubfe r7.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r8.zwww + imul null, r7.xyzw, r5.ywww, r7.xyzw + imad r1.xyzw, r5.xzzz, r1.xyzw, r7.xyzw + udiv r1.xyzw, null, r1.xyzw, l(5, 5, 5, 5) + ishl r1.xyzw, r1.xyzw, l(24, 8, 16, 24) + or r0.x, r0.x, r1.x + bfi r0.w, l(1), l(0), r6.z, r16.z + iadd r0.w, r16.w, r0.w + ishl r7.xyzw, r6.zwww, l(15, 5, 10, 15) + and r7.xyzw, r7.xyzw, l(0x01000000, 256, 0x00010000, 0x01000000) + iadd r0.w, r0.w, r7.x + imad r0.x, r0.w, l(255), r0.x + ubfe r8.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.zzzz + imul null, r8.xyzw, r5.yyyy, r8.xyzw + imad r0.w, r5.x, r11.z, r8.x + udiv r0.w, null, r0.w, l(7) + imad r2.xy, r5.xxxx, r13.zwzz, r8.yzyy + udiv r2.xy, null, r2.xyxx, l(7, 7, 0, 0) + ishl r2.xy, r2.xyxx, l(8, 16, 0, 0) + or r0.w, r0.w, r2.x + or r0.w, r2.y, r0.w + ubfe r2.xyzw, l(3, 3, 3, 3), l(9, 3, 6, 9), r2.zwww + imad r1.x, r5.x, r2.x, r8.w + udiv r1.x, null, r1.x, l(7) + ishl r1.x, r1.x, l(24) + or r0.w, r0.w, r1.x + movc r12.z, r3.x, r0.x, r0.w + or r0.x, r0.z, r1.y + or r0.x, r1.z, r0.x + or r0.x, r1.w, r0.x + bfi r0.z, l(1), l(0), r6.w, r7.y + iadd r0.z, r7.z, r0.z + iadd r0.z, r7.w, r0.z + imad r0.x, r0.z, l(255), r0.x + ubfe r1.xyzw, l(3, 3, 3, 3), l(12, 15, 18, 21), r4.wwww + imul null, r1.xyzw, r1.xyzw, r5.wwww + imad r0.z, r5.z, r11.w, r1.x + udiv r0.z, null, r0.z, l(7) + imad r1.xyz, r5.zzzz, r2.yzwy, r1.yzwy + udiv r1.xyz, null, r1.xyzx, l(7, 7, 7, 0) + ishl r1.xyz, r1.xyzx, l(8, 16, 24, 0) + or r0.z, r0.z, r1.x + or r0.z, r1.y, r0.z + or r0.z, r1.z, r0.z + movc r12.w, r3.y, r0.x, r0.z + store_uav_typed U0[0].xyzw, r0.yyyy, r12.xyzw + endif + endif +endif +ret +// Approximately 766 instruction slots used +#endif + +const BYTE texture_load_dxt5a_r8_cs[] = +{ + 68, 88, 66, 67, 227, 105, + 102, 60, 170, 55, 61, 196, + 233, 50, 185, 23, 61, 214, + 247, 64, 1, 0, 0, 0, + 24, 112, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 124, 111, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 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0, 0, 1, 64, 0, 0, + 7, 0, 0, 0, 35, 0, + 0, 9, 114, 0, 16, 0, + 1, 0, 0, 0, 166, 10, + 16, 0, 5, 0, 0, 0, + 150, 7, 16, 0, 2, 0, + 0, 0, 150, 7, 16, 0, + 1, 0, 0, 0, 78, 0, + 0, 11, 114, 0, 16, 0, + 1, 0, 0, 0, 0, 208, + 0, 0, 70, 2, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 7, 0, 0, 0, + 7, 0, 0, 0, 7, 0, + 0, 0, 0, 0, 0, 0, + 41, 0, 0, 10, 114, 0, + 16, 0, 1, 0, 0, 0, + 70, 2, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 16, 0, + 0, 0, 24, 0, 0, 0, + 0, 0, 0, 0, 60, 0, + 0, 7, 66, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 1, 0, + 0, 0, 60, 0, 0, 7, + 66, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 60, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 55, 0, + 0, 9, 130, 0, 16, 0, + 12, 0, 0, 0, 26, 0, + 16, 0, 3, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 86, 5, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 12, 0, 0, 0, + 21, 0, 0, 1, 21, 0, + 0, 1, 21, 0, 0, 1, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 254, 2, 0, 0, 19, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 27, 1, 0, 0, + 77, 1, 0, 0, 6, 0, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 0, 0, 21, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_2x_cs.h new file mode 100644 index 000000000..a36f3bd95 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_2x_cs.h @@ -0,0 +1,2921 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(3) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].zwxy +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r1.zw, r3.xxxy, l(0, 0, 11, 11) +and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r1.zzzw +iadd r3.xz, r1.zzwz, r4.xxzx +iadd r3.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r1.zw, r2.xxxy, l(0, 0, 11, 11) +and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r2.xz, r1.zzwz, r4.xxzx +iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r3.xyzw, r2.xxxx, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.zwxy, r5.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) +bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r2.xw, r4.xxxy, l(11, 0, 0, 11) +and r4.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r4.xxxy, r2.xxxw +iadd r4.xz, r2.xxwx, r5.xxzx +iadd r4.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) +bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r2.xw, r3.xxxy, l(11, 0, 0, 11) +and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r3.xxxy, r2.xxxw +iadd r3.xz, r2.xxwx, r5.xxzx +iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +iadd r5.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw +iadd r1.z, r1.z, l(1) +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r2.yyyy, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) +bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r1.zw, r4.xxxy, l(0, 0, 11, 11) +and r2.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r4.xz, r1.zzwz, r6.xxzx +iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) +bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r1.zw, r3.xxxy, l(0, 0, 11, 11) +and r2.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r3.xz, r1.zzwz, r6.xxzx +iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw +iadd r1.zw, r0.zzzz, r5.yyyw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r2.xyzw, r2.zzzz, T0[0].zwxy +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy +iadd r4.xyzw, r4.xyzw, r6.xyzw +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r3.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r3.xyxx, r3.zwzz +iadd r3.xz, r3.xxyx, r4.xxzx +iadd r3.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy +iadd r4.xyzw, r4.xyzw, r6.xyzw +ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) +and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.xyxx, r2.zwzz +iadd r2.xz, r2.xxyx, r4.xxzx +iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r3.xyzw +iadd r3.xy, r1.zwzz, l(1, 1, 0, 0) +store_uav_typed U0[0].xyzw, r3.xxxx, r2.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(8) +else + iadd r0.w, r0.x, l(4) +endif +ld r2.xyzw, r0.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.zwxy + mov r4.xy, r2.zwzz +else + mov r4.xy, r2.zwzz +endif +ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) +bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r3.xz, r4.xxyx, l(11, 0, 11, 0) +and r4.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r3.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r4.xxyx, r3.xxzx +iadd r4.xz, r3.xxzx, r6.xxzx +iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) +bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) +and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.xyxx, r2.zwzz +iadd r2.xz, r2.xxyx, r6.xxzx +iadd r2.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xyz, r0.wwww, l(1, 2, 3, 0) +ld r4.xyzw, r2.xxxx, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r4.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r4.zwxy, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.zwxy + mov r5.xy, r4.zwzz +else + mov r5.xy, r4.zwzz +endif +ushr r5.zw, r5.xxxy, l(0, 0, 21, 21) +bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r5.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r5.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r0.xw, r5.xxxy, l(11, 0, 0, 11) +and r1.zw, r5.xxxy, l(0, 0, 0x001f0000, 0x001f0000) +bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw +iadd r5.xz, r0.xxwx, r6.xxzx +iadd r5.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) +bfi r6.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r0.xw, r4.xxxy, l(11, 0, 0, 11) +and r1.zw, r4.xxxy, l(0, 0, 0x001f0000, 0x001f0000) +bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw +iadd r4.xz, r0.xxwx, r6.xxzx +iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyzw +ld r3.xyzw, r2.yyyy, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.zwxy, r5.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ushr r4.zw, r4.xxxy, l(0, 0, 21, 21) +bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r4.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r4.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r1.zw, r4.xxxy, l(0, 0, 11, 11) +and r2.xy, r4.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r4.xz, r1.zzwz, r5.xxzx +iadd r4.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) +bfi r5.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r1.zw, r3.xxxy, l(0, 0, 11, 11) +and r2.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r3.xz, r1.zzwz, r5.xxzx +iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r0.x, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +ld r2.xyzw, r2.zzzz, T0[0].zwxy +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r1.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.zwxy + mov r1.xy, r2.zwzz +else + mov r1.xy, r2.zwzz +endif +ushr r1.zw, r1.xxxy, l(0, 0, 21, 21) +bfi r3.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r1.xzyw, l(0, 0, 0, 0) +ubfe r4.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r1.xxyy +iadd r3.xyzw, r3.xyzw, r4.xyzw +ishl r0.yz, r1.xxyx, l(0, 11, 11, 0) +and r1.xy, r1.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.yyzy +iadd r1.xz, r0.yyzy, r3.xxzx +iadd r1.yw, r3.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) +bfi r3.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) +ubfe r4.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy +iadd r3.xyzw, r3.xyzw, r4.xyzw +ishl r0.yz, r2.xxyx, l(0, 11, 11, 0) +and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.yyzy +iadd r2.xz, r0.yyzy, r3.xxzx +iadd r2.yw, r3.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.x, l(1) +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +ret +// Approximately 372 instruction slots used +#endif + +const BYTE texture_load_r10g11b11_rgba16_2x_cs[] = +{ + 68, 88, 66, 67, 7, 65, + 212, 156, 51, 208, 159, 89, + 127, 192, 30, 220, 122, 221, + 18, 141, 1, 0, 0, 0, + 104, 58, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 204, 57, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 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7, + 242, 0, 16, 0, 2, 0, + 0, 0, 230, 4, 16, 0, + 3, 0, 0, 0, 230, 4, + 16, 0, 4, 0, 0, 0, + 21, 0, 0, 1, 31, 0, + 4, 3, 26, 0, 16, 0, + 1, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 1, 0, 0, 0, 230, 4, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 140, 0, 0, 17, + 242, 0, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 2, 64, + 0, 0, 16, 0, 0, 0, + 16, 0, 0, 0, 16, 0, + 0, 0, 16, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 230, 4, 16, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 50, 0, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 2, 0, 0, 0, + 18, 0, 0, 1, 54, 0, + 0, 5, 50, 0, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 2, 0, 0, 0, + 21, 0, 0, 1, 85, 0, + 0, 10, 194, 0, 16, 0, + 1, 0, 0, 0, 6, 4, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 0, 21, 0, + 0, 0, 140, 0, 0, 20, + 242, 0, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 10, 0, 0, 0, 27, 0, + 0, 0, 10, 0, 0, 0, + 27, 0, 0, 0, 2, 64, + 0, 0, 6, 0, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 5, 0, 0, 0, + 134, 13, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 138, 0, + 0, 15, 242, 0, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 6, 0, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 5, 0, 0, 0, + 2, 64, 0, 0, 4, 0, + 0, 0, 27, 0, 0, 0, + 4, 0, 0, 0, 27, 0, + 0, 0, 6, 5, 16, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 41, 0, 0, 10, + 98, 0, 16, 0, 0, 0, + 0, 0, 6, 1, 16, 0, + 1, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 11, 0, 0, 0, 11, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 10, 50, 0, + 16, 0, 1, 0, 0, 0, + 70, 0, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 31, 0, 0, 0, + 31, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 17, 98, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 0, 21, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 1, 16, 0, + 1, 0, 0, 0, 86, 6, + 16, 0, 0, 0, 0, 0, + 30, 0, 0, 7, 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16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 11, 0, + 0, 0, 11, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 10, 50, 0, 16, 0, + 2, 0, 0, 0, 70, 0, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 31, 0, 0, 0, 31, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 140, 0, 0, 17, + 98, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 21, 0, + 0, 0, 21, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 2, 0, + 0, 0, 86, 6, 16, 0, + 0, 0, 0, 0, 30, 0, + 0, 7, 82, 0, 16, 0, + 2, 0, 0, 0, 86, 6, + 16, 0, 0, 0, 0, 0, + 6, 2, 16, 0, 3, 0, + 0, 0, 30, 0, 0, 10, + 162, 0, 16, 0, 2, 0, + 0, 0, 86, 13, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 255, 255, 0, 0, + 0, 0, 0, 0, 255, 255, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 246, 15, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 30, 0, 0, 7, + 18, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 1, 0, 0, 0, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 116, 1, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 123, 0, + 0, 0, 80, 0, 0, 0, + 13, 0, 0, 0, 20, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 17, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 16, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_3x_cs.h new file mode 100644 index 000000000..aaa0f3046 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_3x_cs.h @@ -0,0 +1,2707 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) +imul null, r0.w, r0.w, CB0[0][1].y +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw + mov r4.x, r1.x +else + mov r4.x, r1.x +endif +ushr r4.y, r4.x, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r4.xxxy, l(0, 0, 0, 0) +ubfe r4.yz, l(0, 6, 5, 0), l(0, 4, 27, 0), r4.xxxx +iadd r3.zw, r3.zzzw, r4.yyyz +ishl r0.w, r4.x, l(11) +and r2.x, r4.x, l(0x001f0000) +bfi r0.w, l(21), l(0), r2.x, r0.w +iadd r4.xzw, r0.wwww, r3.zzzz +iadd r4.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) +ushr r1.x, r1.y, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.yyyx, l(0, 0, 0, 0) +ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy +iadd r3.zw, r3.zzzw, r5.xxxy +ishl r0.w, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.y, r0.w +iadd r5.xzw, r0.wwww, r3.zzzz +iadd r5.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +ushr r1.x, r1.z, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.zzzx, l(0, 0, 0, 0) +ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.zzzz +iadd r3.zw, r3.zzzw, r5.xxxy +ishl r0.w, r1.z, l(11) +and r1.y, r1.z, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.y, r0.w +iadd r5.xzw, r0.wwww, r3.zzzz +iadd r5.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r0.w, r0.z, r0.y +ushr r1.x, r1.w, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.wwww +iadd r1.xy, r1.xyxx, r3.zwzz +ishl r1.z, r1.w, l(11) +and r1.w, r1.w, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.w, r1.z +iadd r5.xzw, r1.zzzz, r1.xxxx +iadd r5.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw + mov r2.x, r1.x +else + mov r2.x, r1.x +endif +iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) +ushr r2.y, r2.x, l(21) +bfi r2.yz, l(0, 10, 27, 0), l(0, 6, 5, 0), r2.xxyx, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r2.xxxx +iadd r2.yz, r2.yyzy, r3.zzwz +ishl r3.z, r2.x, l(11) +and r2.x, r2.x, l(0x001f0000) +bfi r2.x, l(21), l(0), r2.x, r3.z +iadd r6.xzw, r2.xxxx, r2.yyyy +iadd r6.y, r2.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw +ushr r1.x, r1.y, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.yxyy, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.yyyy +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r2.z, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r2.z +iadd r6.xzw, r1.yyyy, r2.xxxx +iadd r6.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +ushr r1.x, r1.z, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.zxzz, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.zzzz +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r1.y, r1.z, l(11) +and r1.z, r1.z, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.z, r1.y +iadd r6.xzw, r1.yyyy, r2.xxxx +iadd r6.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw +iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) +ushr r1.x, r1.w, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.wwww +iadd r1.xy, r1.xyxx, r2.xyxx +ishl r1.z, r1.w, l(11) +and r1.w, r1.w, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.w, r1.z +iadd r7.xzw, r1.zzzz, r1.xxxx +iadd r7.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r1.zw, r2.xxxx, T0[0].zwxy +if_nz r3.x + ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw + mov r4.x, r1.x +else + mov r4.x, r1.x +endif +ushr r4.y, r4.x, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r4.xxxy, l(0, 0, 0, 0) +ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r4.xxxx +iadd r3.zw, r3.zzzw, r5.xxxy +ishl r0.x, r4.x, l(11) +and r2.x, r4.x, l(0x001f0000) +bfi r0.x, l(21), l(0), r2.x, r0.x +iadd r7.xzw, r0.xxxx, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +ushr r1.x, r1.y, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.yyyx, l(0, 0, 0, 0) +ubfe r4.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy +iadd r3.zw, r3.zzzw, r4.xxxy +ishl r0.x, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r0.x, l(21), l(0), r1.y, r0.x +iadd r7.xzw, r0.xxxx, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw +ushr r1.x, r1.z, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.zzzx, l(0, 0, 0, 0) +ubfe r4.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.zzzz +iadd r3.zw, r3.zzzw, r4.xxxy +ishl r0.x, r1.z, l(11) +and r1.y, r1.z, l(0x001f0000) +bfi r0.x, l(21), l(0), r1.y, r0.x +iadd r7.xzw, r0.xxxx, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw +iadd r0.x, r0.y, l(5) +ushr r1.x, r1.w, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.wwww +iadd r1.xy, r1.xyxx, r3.zwzz +ishl r1.z, r1.w, l(11) +and r1.w, r1.w, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.w, r1.z +iadd r4.xzw, r1.zzzz, r1.xxxx +iadd r4.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw + mov r0.x, r1.x +else + mov r0.x, r1.x +endif +ushr r0.y, r0.x, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r0.xyxx, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r0.xxxx +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r0.y, r0.x, l(11) +and r0.x, r0.x, l(0x001f0000) +bfi r0.x, l(21), l(0), r0.x, r0.y +iadd r4.xzw, r0.xxxx, r2.xxxx +iadd r4.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw +ushr r1.x, r1.y, l(21) +bfi r0.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.yxyy, l(0, 0, 0, 0) +ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy +iadd r0.xy, r0.xyxx, r2.xyxx +ishl r2.x, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r2.x +iadd r4.xzw, r0.xxxx, r1.yyyy +iadd r4.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +iadd r0.x, r0.w, l(5) +ushr r1.x, r1.z, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.zxzz, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.zzzz +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r0.y, r1.z, l(11) +and r1.y, r1.z, l(0x001f0000) +bfi r0.y, l(21), l(0), r1.y, r0.y +iadd r4.xzw, r0.yyyy, r2.xxxx +iadd r4.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ushr r1.x, r1.w, l(21) +bfi r0.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r1.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.wwww +iadd r0.xy, r0.xyxx, r1.xyxx +ishl r0.w, r1.w, l(11) +and r1.x, r1.w, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.x, r0.w +iadd r1.xzw, r0.wwww, r0.xxxx +iadd r1.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.zzzz, r1.xyzw +ld r0.xy, r2.wwww, T0[0].yxzw +if_nz r3.x + ishl r1.xy, r0.yxyy, l(8, 8, 0, 0) + ushr r1.zw, r0.yyyx, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xy, r1.wzww, r1.yxyy +endif +if_nz r3.y + ushr r1.xy, r0.yxyy, l(16, 16, 0, 0) + bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.yxyy + mov r1.x, r0.y +else + mov r1.x, r0.y +endif +ushr r1.y, r1.x, l(21) +bfi r1.yz, l(0, 10, 27, 0), l(0, 6, 5, 0), r1.xxyx, l(0, 0, 0, 0) +ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.xxxx +iadd r1.yz, r1.yyzy, r2.xxyx +ishl r0.w, r1.x, l(11) +and r1.x, r1.x, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.x, r0.w +iadd r2.xzw, r0.wwww, r1.yyyy +iadd r2.y, r1.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.wwww, r2.xyzw +iadd r0.w, r0.z, l(5) +ushr r0.y, r0.x, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r0.xyxx, l(0, 0, 0, 0) +ubfe r1.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r0.xxxx +iadd r1.xy, r1.xyxx, r1.zwzz +ishl r0.y, r0.x, l(11) +and r0.x, r0.x, l(0x001f0000) +bfi r0.x, l(21), l(0), r0.x, r0.y +iadd r2.xzw, r0.xxxx, r1.xxxx +iadd r2.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r2.xyzw +ret +// Approximately 354 instruction slots used +#endif + +const BYTE texture_load_r10g11b11_rgba16_3x_cs[] = +{ + 68, 88, 66, 67, 108, 85, + 139, 60, 104, 96, 37, 91, + 30, 150, 204, 192, 254, 62, + 67, 67, 1, 0, 0, 0, + 208, 53, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 52, 53, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 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0, + 246, 15, 16, 0, 6, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 30, 0, + 0, 7, 130, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 5, 0, + 0, 0, 85, 0, 0, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 21, 0, 0, 0, + 140, 0, 0, 20, 50, 0, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 10, 0, + 0, 0, 27, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 6, 0, 0, 0, 5, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 138, 0, 0, 15, + 194, 0, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 0, 0, + 5, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 27, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 50, 0, 16, 0, 1, 0, + 0, 0, 70, 0, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 1, 0, 0, 0, + 41, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 11, 0, 0, 0, 1, 0, + 0, 7, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 0, + 31, 0, 140, 0, 0, 11, + 18, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 21, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 0, 0, + 10, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 30, 0, + 0, 7, 210, 0, 16, 0, + 2, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 1, 0, + 0, 0, 30, 0, 0, 7, + 34, 0, 16, 0, 2, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 255, 255, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 246, 15, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 98, 1, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 124, 0, + 0, 0, 73, 0, 0, 0, + 9, 0, 0, 0, 13, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 9, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 11, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 18, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_cs.h new file mode 100644 index 000000000..fb9921df6 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_cs.h @@ -0,0 +1,1310 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 6 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(3) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].zwxy +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r2.y + ushr r3.xyzw, r1.zwxy, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.zwxy + mov r3.xy, r1.zwzz +else + mov r3.xy, r1.zwzz +endif +ushr r3.zw, r3.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r3.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r3.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r2.zw, r3.xxxy, l(0, 0, 11, 11) +and r3.xy, r3.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r2.zzzw +iadd r3.xz, r2.zzwz, r4.xxzx +iadd r3.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r1.zw, r1.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r1.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r1.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r1.zw, r1.xxxy, l(0, 0, 11, 11) +and r1.xy, r1.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r1.xyxx, r1.zwzz +iadd r1.xz, r1.xxyx, r4.xxzx +iadd r1.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r3.xyz, r0.yyyy, l(1, 2, 3, 0) +store_uav_typed U0[0].xyzw, r3.xxxx, r1.xyzw +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r1.xyzw, r0.xxxx, T0[0].zwxy +if_nz r2.x + ishl r4.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.zwxy, r5.zwxy +endif +if_nz r2.y + ushr r2.xyzw, r1.zwxy, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.zwxy + mov r2.xy, r1.zwzz +else + mov r2.xy, r1.zwzz +endif +ushr r2.zw, r2.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r2.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r2.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r0.xz, r2.xxyx, l(11, 0, 11, 0) +and r2.xy, r2.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.xxzx +iadd r2.xz, r0.xxzx, r4.xxzx +iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r1.zw, r1.xxxy, l(0, 0, 21, 21) +bfi r4.xyzw, l(10, 27, 10, 27), l(6, 5, 6, 5), r1.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(6, 5, 6, 5), l(4, 27, 4, 27), r1.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r0.xz, r1.xxyx, l(11, 0, 11, 0) +and r1.xy, r1.xyxx, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.xxzx +iadd r1.xz, r0.xxzx, r4.xxzx +iadd r1.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r3.yyyy, r2.xyzw +store_uav_typed U0[0].xyzw, r3.zzzz, r1.xyzw +ret +// Approximately 147 instruction slots used +#endif + +const BYTE texture_load_r10g11b11_rgba16_cs[] = +{ + 68, 88, 66, 67, 136, 123, + 137, 15, 160, 31, 20, 60, + 80, 61, 181, 9, 255, 143, + 118, 234, 1, 0, 0, 0, + 236, 25, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 80, 25, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_2x_cs.h new file mode 100644 index 000000000..437502ce9 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_2x_cs.h @@ -0,0 +1,6044 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(3) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +and r1.zw, r2.xxxy, l(0, 0, 1023, 1023) +ubfe r3.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.xyxy +ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw +movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r4.xxxy +iadd r1.zw, r3.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r4.zzzw, r1.zzzw +iadd r1.zw, r3.xxxy, r1.zzzw +ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.xyxx +ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) +movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.zw, r3.zzzw, r4.xxxy +iadd r3.zw, r3.xxxy, r3.zzzw +ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) +ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) +or r3.zw, r3.zzzw, r4.xxxy +xor r3.zw, r4.zzzw, r3.zzzw +iadd r3.xy, r3.xyxx, r3.zwzz +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r3.xz, r1.zzwz, r3.xxyx +ushr r1.zw, r2.xxxy, l(0, 0, 21, 21) +ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) +ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw +movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r4.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r4.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r3.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.zw, r2.zzzw, l(0, 0, 1023, 1023) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.zwzw +ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r4.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r4.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.zwzz +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r2.xyxx, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r2.xy, r2.xyxx, r4.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r4.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r2.zzzw, l(0, 0, 21, 21) +ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) +ieq r2.zw, r1.zzzw, l(0, 0, 1024, 1024) +movc r1.zw, r2.zzzw, l(0,0,1025,1025), r1.zzzw +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r2.zw, r1.zzzw, l(0, 0, 5, 5) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r2.zzzw +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +and r2.xw, r3.xxxy, l(1023, 0, 0, 1023) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy +ieq r5.xy, r2.xwxx, l(512, 512, 0, 0) +movc r2.xw, r5.xxxy, l(513,0,0,513), r2.xxxw +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r5.xxxy +iadd r2.xw, r4.xxxy, r2.xxxw +ishl r5.xy, r2.xwxx, l(6, 6, 0, 0) +ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) +or r2.xw, r2.xxxw, r5.xxxy +xor r2.xw, r5.zzzw, r2.xxxw +iadd r2.xw, r4.xxxy, r2.xxxw +ubfe r4.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.xyxx +ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.zw, r4.zzzw, r5.xxxy +iadd r4.zw, r4.xxxy, r4.zzzw +ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) +ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) +or r4.zw, r4.zzzw, r5.xxxy +xor r4.zw, r5.zzzw, r4.zzzw +iadd r4.xy, r4.xyxx, r4.zwzz +ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) +or r4.xz, r2.xxwx, r4.xxyx +ushr r2.xw, r3.xxxy, l(21, 0, 0, 21) +ushr r3.xy, r2.xwxx, l(10, 10, 0, 0) +ieq r5.xy, r2.xwxx, l(1024, 1024, 0, 0) +movc r2.xw, r5.xxxy, l(1025,0,0,1025), r2.xxxw +movc r5.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r5.xxxy +iadd r2.xw, r3.xxxy, r2.xxxw +ishl r5.xy, r2.xwxx, l(5, 5, 0, 0) +ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) +or r2.xw, r2.xxxw, r5.xxxy +xor r2.xw, r5.zzzw, r2.xxxw +iadd r2.xw, r3.xxxy, r2.xxxw +or r4.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r2.xw, r3.zzzw, l(1023, 0, 0, 1023) +ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw +ieq r3.xy, r2.xwxx, l(512, 512, 0, 0) +movc r2.xw, r3.xxxy, l(513,0,0,513), r2.xxxw +movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r6.xxxy +iadd r2.xw, r5.xxxy, r2.xxxw +ishl r3.xy, r2.xwxx, l(6, 6, 0, 0) +ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) +or r2.xw, r2.xxxw, r3.xxxy +xor r2.xw, r6.zzzw, r2.xxxw +iadd r2.xw, r5.xxxy, r2.xxxw +ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.zwzz +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r3.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r3.xy, r3.xyxx, r5.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r5.xz, r2.xxwx, r3.xxyx +ushr r2.xw, r3.zzzw, l(21, 0, 0, 21) +ushr r3.xy, r2.xwxx, l(10, 10, 0, 0) +ieq r3.zw, r2.xxxw, l(0, 0, 1024, 1024) +movc r2.xw, r3.zzzw, l(1025,0,0,1025), r2.xxxw +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r6.xxxy +iadd r2.xw, r3.xxxy, r2.xxxw +ishl r3.zw, r2.xxxw, l(0, 0, 5, 5) +ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) +or r2.xw, r2.xxxw, r3.zzzw +xor r2.xw, r6.zzzw, r2.xxxw +iadd r2.xw, r3.xxxy, r2.xxxw +or r5.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +iadd r3.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyzw +iadd r1.z, r1.z, l(1) +store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyzw +ld r4.xyzw, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +and r1.zw, r4.xxxy, l(0, 0, 1023, 1023) +ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.xyxy +ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw +movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r6.xxxy +iadd r1.zw, r5.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r6.zzzw, r1.zzzw +iadd r1.zw, r5.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.xyxx +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r2.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r2.xy, r2.xyxx, r5.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r5.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r4.xxxy, l(0, 0, 21, 21) +ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) +ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw +movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r6.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r6.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.zw, r4.zzzw, l(0, 0, 1023, 1023) +ubfe r6.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.zwzw +ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw +movc r7.xyzw, r6.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r7.xxxy +iadd r1.zw, r6.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r7.zzzw, r1.zzzw +iadd r1.zw, r6.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.zwzz +ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz +movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r6.xyxx +iadd r4.xy, r2.xyxx, r4.xyxx +ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r6.xyxx +xor r4.xy, r6.zwzz, r4.xyxx +iadd r2.xy, r2.xyxx, r4.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r6.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r4.zzzw, l(0, 0, 21, 21) +ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) +ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw +movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r4.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r4.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r6.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyzw +iadd r1.zw, r0.zzzz, r3.yyyw +store_uav_typed U0[0].xyzw, r1.zzzz, r6.xyzw +ld r2.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw +endif +and r3.xy, r2.xyxx, l(1023, 1023, 0, 0) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.xyxy +ieq r5.xy, r3.xyxx, l(512, 512, 0, 0) +movc r3.xy, r5.xyxx, l(513,513,0,0), r3.xyxx +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r5.xyxx +iadd r3.xy, r4.xyxx, r3.xyxx +ishl r5.xy, r3.xyxx, l(6, 6, 0, 0) +ushr r3.xy, r3.xyxx, l(3, 3, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +xor r3.xy, r5.zwzz, r3.xyxx +iadd r3.xy, r4.xyxx, r3.xyxx +ubfe r4.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.xyxx +ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.zw, r4.zzzw, r5.xxxy +iadd r4.zw, r4.xxxy, r4.zzzw +ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) +ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) +or r4.zw, r4.zzzw, r5.xxxy +xor r4.zw, r5.zzzw, r4.zzzw +iadd r4.xy, r4.xyxx, r4.zwzz +ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) +or r4.xz, r3.xxyx, r4.xxyx +ushr r2.xy, r2.xyxx, l(21, 21, 0, 0) +ushr r3.xy, r2.xyxx, l(10, 10, 0, 0) +ieq r5.xy, r2.xyxx, l(1024, 1024, 0, 0) +movc r2.xy, r5.xyxx, l(1025,1025,0,0), r2.xyxx +movc r5.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r5.xyxx +iadd r2.xy, r3.xyxx, r2.xyxx +ishl r5.xy, r2.xyxx, l(5, 5, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +or r2.xy, r2.xyxx, r5.xyxx +xor r2.xy, r5.zwzz, r2.xyxx +iadd r2.xy, r3.xyxx, r2.xyxx +or r4.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +and r2.xy, r2.zwzz, l(1023, 1023, 0, 0) +ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.zwzw +ieq r3.xy, r2.xyxx, l(512, 512, 0, 0) +movc r2.xy, r3.xyxx, l(513,513,0,0), r2.xyxx +movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r6.xyxx +iadd r2.xy, r5.xyxx, r2.xyxx +ishl r3.xy, r2.xyxx, l(6, 6, 0, 0) +ushr r2.xy, r2.xyxx, l(3, 3, 0, 0) +or r2.xy, r2.xyxx, r3.xyxx +xor r2.xy, r6.zwzz, r2.xyxx +iadd r2.xy, r5.xyxx, r2.xyxx +ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.zwzz +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r3.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r3.xy, r3.xyxx, r5.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r5.xz, r2.xxyx, r3.xxyx +ushr r2.xy, r2.zwzz, l(21, 21, 0, 0) +ushr r2.zw, r2.xxxy, l(0, 0, 10, 10) +ieq r3.xy, r2.xyxx, l(1024, 1024, 0, 0) +movc r2.xy, r3.xyxx, l(1025,1025,0,0), r2.xyxx +movc r6.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r6.xyxx +iadd r2.xy, r2.zwzz, r2.xyxx +ishl r3.xy, r2.xyxx, l(5, 5, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +or r2.xy, r2.xyxx, r3.xyxx +xor r2.xy, r6.zwzz, r2.xyxx +iadd r2.xy, r2.zwzz, r2.xyxx +or r5.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw +iadd r2.xy, r1.zwzz, l(1, 1, 0, 0) +store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(8) +else + iadd r0.w, r0.x, l(4) +endif +ld r4.xyzw, r0.wwww, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +and r2.xz, r4.xxyx, l(1023, 0, 1023, 0) +ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.xyxy +ieq r3.xy, r2.xzxx, l(512, 512, 0, 0) +movc r2.xz, r3.xxyx, l(513,0,513,0), r2.xxzx +movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r6.xxyx +iadd r2.xz, r5.xxyx, r2.xxzx +ishl r3.xy, r2.xzxx, l(6, 6, 0, 0) +ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) +or r2.xz, r2.xxzx, r3.xxyx +xor r2.xz, r6.zzwz, r2.xxzx +iadd r2.xz, r5.xxyx, r2.xxzx +ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.xyxx +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r3.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r3.xy, r3.xyxx, r5.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r5.xz, r2.xxzx, r3.xxyx +ushr r2.xz, r4.xxyx, l(21, 0, 21, 0) +ushr r3.xy, r2.xzxx, l(10, 10, 0, 0) +ieq r4.xy, r2.xzxx, l(1024, 1024, 0, 0) +movc r2.xz, r4.xxyx, l(1025,0,1025,0), r2.xxzx +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r6.xxyx +iadd r2.xz, r3.xxyx, r2.xxzx +ishl r4.xy, r2.xzxx, l(5, 5, 0, 0) +ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) +or r2.xz, r2.xxzx, r4.xxyx +xor r2.xz, r6.zzwz, r2.xxzx +iadd r2.xz, r3.xxyx, r2.xxzx +or r5.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +and r2.xz, r4.zzwz, l(1023, 0, 1023, 0) +ubfe r6.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r4.zwzw +ieq r3.xy, r2.xzxx, l(512, 512, 0, 0) +movc r2.xz, r3.xxyx, l(513,0,513,0), r2.xxzx +movc r7.xyzw, r6.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r7.xxyx +iadd r2.xz, r6.xxyx, r2.xxzx +ishl r3.xy, r2.xzxx, l(6, 6, 0, 0) +ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) +or r2.xz, r2.xxzx, r3.xxyx +xor r2.xz, r7.zzwz, r2.xxzx +iadd r2.xz, r6.xxyx, r2.xxzx +ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r4.zwzz +ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r6.xyxx +iadd r4.xy, r3.xyxx, r4.xyxx +ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r6.xyxx +xor r4.xy, r6.zwzz, r4.xyxx +iadd r3.xy, r3.xyxx, r4.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r6.xz, r2.xxzx, r3.xxyx +ushr r2.xz, r4.zzwz, l(21, 0, 21, 0) +ushr r3.xy, r2.xzxx, l(10, 10, 0, 0) +ieq r4.xy, r2.xzxx, l(1024, 1024, 0, 0) +movc r2.xz, r4.xxyx, l(1025,0,1025,0), r2.xxzx +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r4.xxyx +iadd r2.xz, r3.xxyx, r2.xxzx +ishl r4.xy, r2.xzxx, l(5, 5, 0, 0) +ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) +or r2.xz, r2.xxzx, r4.xxyx +xor r2.xz, r4.zzwz, r2.xxzx +iadd r2.xz, r3.xxyx, r2.xxzx +or r6.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r3.wwww, r5.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r6.xyzw +iadd r2.xzw, r0.wwww, l(1, 0, 2, 3) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +and r0.xw, r3.xxxy, l(1023, 0, 0, 1023) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy +ieq r1.zw, r0.xxxw, l(0, 0, 512, 512) +movc r0.xw, r1.zzzw, l(513,0,0,513), r0.xxxw +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r5.xxxy +iadd r0.xw, r4.xxxy, r0.xxxw +ishl r1.zw, r0.xxxw, l(0, 0, 6, 6) +ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) +or r0.xw, r0.xxxw, r1.zzzw +xor r0.xw, r5.zzzw, r0.xxxw +iadd r0.xw, r4.xxxy, r0.xxxw +ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 20, 20), r3.xxxy +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r1.zwzz, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r1.zw, r1.zzzw, r4.xxxy +ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) +or r4.xz, r0.xxwx, r1.zzwz +ushr r0.xw, r3.xxxy, l(21, 0, 0, 21) +ushr r1.zw, r0.xxxw, l(0, 0, 10, 10) +ieq r3.xy, r0.xwxx, l(1024, 1024, 0, 0) +movc r0.xw, r3.xxxy, l(1025,0,0,1025), r0.xxxw +movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r5.xxxy +iadd r0.xw, r1.zzzw, r0.xxxw +ishl r3.xy, r0.xwxx, l(5, 5, 0, 0) +ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) +or r0.xw, r0.xxxw, r3.xxxy +xor r0.xw, r5.zzzw, r0.xxxw +iadd r0.xw, r1.zzzw, r0.xxxw +or r4.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r0.xw, r3.zzzw, l(1023, 0, 0, 1023) +ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw +ieq r1.zw, r0.xxxw, l(0, 0, 512, 512) +movc r0.xw, r1.zzzw, l(513,0,0,513), r0.xxxw +movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r6.xxxy +iadd r0.xw, r5.xxxy, r0.xxxw +ishl r1.zw, r0.xxxw, l(0, 0, 6, 6) +ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) +or r0.xw, r0.xxxw, r1.zzzw +xor r0.xw, r6.zzzw, r0.xxxw +iadd r0.xw, r5.xxxy, r0.xxxw +ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 20, 20), r3.zzzw +ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz +movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r5.xyxx +iadd r3.xy, r1.zwzz, r3.xyxx +ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +xor r3.xy, r5.zwzz, r3.xyxx +iadd r1.zw, r1.zzzw, r3.xxxy +ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) +or r5.xz, r0.xxwx, r1.zzwz +ushr r0.xw, r3.zzzw, l(21, 0, 0, 21) +ushr r1.zw, r0.xxxw, l(0, 0, 10, 10) +ieq r3.xy, r0.xwxx, l(1024, 1024, 0, 0) +movc r0.xw, r3.xxxy, l(1025,0,0,1025), r0.xxxw +movc r3.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r3.xxxy +iadd r0.xw, r1.zzzw, r0.xxxw +ishl r3.xy, r0.xwxx, l(5, 5, 0, 0) +ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) +or r0.xw, r0.xxxw, r3.xxxy +xor r0.xw, r3.zzzw, r0.xxxw +iadd r0.xw, r1.zzzw, r0.xxxw +or r5.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw +ld r3.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +and r1.zw, r3.xxxy, l(0, 0, 1023, 1023) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy +ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r4.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r4.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.xyxx +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r2.xyxx, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r2.xy, r2.xyxx, r4.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r4.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r3.xxxy, l(0, 0, 21, 21) +ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) +ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r3.xxxy +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.zw, r3.zzzw, l(0, 0, 1023, 1023) +ubfe r5.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw +ieq r2.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,513,513), r1.zzzw +movc r6.xyzw, r5.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r6.xxxy +iadd r1.zw, r5.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r6.zzzw, r1.zzzw +iadd r1.zw, r5.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r3.zwzz +ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r5.xyxx +iadd r3.xy, r2.xyxx, r3.xyxx +ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +xor r3.xy, r5.zwzz, r3.xyxx +iadd r2.xy, r2.xyxx, r3.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r5.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r3.zzzw, l(0, 0, 21, 21) +ushr r2.xy, r1.zwzz, l(10, 10, 0, 0) +ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw +movc r3.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r3.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r3.xxxy +xor r1.zw, r3.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r0.x, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +ld r2.xyzw, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +and r0.yz, r2.xxyx, l(0, 1023, 1023, 0) +ubfe r1.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.xyxy +ieq r3.xy, r0.yzyy, l(512, 512, 0, 0) +movc r0.yz, r3.xxyx, l(0,513,513,0), r0.yyzy +movc r3.xyzw, r1.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r3.xxyx +iadd r0.yz, r1.xxyx, r0.yyzy +ishl r3.xy, r0.yzyy, l(6, 6, 0, 0) +ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) +or r0.yz, r0.yyzy, r3.xxyx +xor r0.yz, r3.zzwz, r0.yyzy +iadd r0.yz, r1.xxyx, r0.yyzy +ubfe r1.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.xyxx +ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw +movc r3.xyzw, r1.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r3.xxxy +iadd r1.zw, r1.xxxy, r1.zzzw +ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r3.xxxy +xor r1.zw, r3.zzzw, r1.zzzw +iadd r1.xy, r1.xyxx, r1.zwzz +ishl r1.xy, r1.xyxx, l(16, 16, 0, 0) +or r1.xz, r0.yyzy, r1.xxyx +ushr r0.yz, r2.xxyx, l(0, 21, 21, 0) +ushr r2.xy, r0.yzyy, l(10, 10, 0, 0) +ieq r3.xy, r0.yzyy, l(1024, 1024, 0, 0) +movc r0.yz, r3.xxyx, l(0,1025,1025,0), r0.yyzy +movc r3.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r3.xxyx +iadd r0.yz, r2.xxyx, r0.yyzy +ishl r3.xy, r0.yzyy, l(5, 5, 0, 0) +ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) +or r0.yz, r0.yyzy, r3.xxyx +xor r0.yz, r3.zzwz, r0.yyzy +iadd r0.yz, r2.xxyx, r0.yyzy +or r1.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) +and r0.yz, r2.zzwz, l(0, 1023, 1023, 0) +ubfe r3.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r2.zwzw +ieq r2.xy, r0.yzyy, l(512, 512, 0, 0) +movc r0.yz, r2.xxyx, l(0,513,513,0), r0.yyzy +movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r4.xxyx +iadd r0.yz, r3.xxyx, r0.yyzy +ishl r2.xy, r0.yzyy, l(6, 6, 0, 0) +ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) +or r0.yz, r0.yyzy, r2.xxyx +xor r0.yz, r4.zzwz, r0.yyzy +iadd r0.yz, r3.xxyx, r0.yyzy +ubfe r2.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r2.zwzz +ieq r3.xy, r3.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r3.zwzz +movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r4.xyxx +iadd r3.xy, r2.xyxx, r3.xyxx +ishl r3.zw, r3.xxxy, l(0, 0, 5, 5) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r3.zwzz +xor r3.xy, r4.zwzz, r3.xyxx +iadd r2.xy, r2.xyxx, r3.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r3.xz, r0.yyzy, r2.xxyx +ushr r0.yz, r2.zzwz, l(0, 21, 21, 0) +ushr r2.xy, r0.yzyy, l(10, 10, 0, 0) +ieq r2.zw, r0.yyyz, l(0, 0, 1024, 1024) +movc r0.yz, r2.zzwz, l(0,1025,1025,0), r0.yyzy +movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r4.xxyx +iadd r0.yz, r2.xxyx, r0.yyzy +ishl r2.zw, r0.yyyz, l(0, 0, 5, 5) +ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) +or r0.yz, r0.yyzy, r2.zzwz +xor r0.yz, r4.zzwz, r0.yyzy +iadd r0.yz, r2.xxyx, r0.yyzy +or r3.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.x, l(1) +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +ret +// Approximately 812 instruction slots used +#endif + +const BYTE texture_load_r10g11b11_rgba16_snorm_2x_cs[] = +{ + 68, 88, 66, 67, 99, 133, + 95, 233, 34, 75, 167, 191, + 119, 107, 223, 212, 247, 107, + 87, 39, 1, 0, 0, 0, + 72, 121, 0, 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20, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 96, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_3x_cs.h new file mode 100644 index 000000000..c74675bd2 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_3x_cs.h @@ -0,0 +1,5417 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) +imul null, r0.w, r0.w, CB0[0][1].y +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +and r0.w, r1.x, l(1023) +ubfe r4.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx +ieq r2.x, r0.w, l(512) +movc r0.w, r2.x, l(513), r0.w +movc r5.xyzw, r4.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r5.x +iadd r0.w, r4.x, r0.w +ishl r2.x, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r2.x +xor r0.w, r5.y, r0.w +iadd r0.w, r4.x, r0.w +ieq r2.x, r4.y, l(1024) +movc r2.x, r2.x, l(1025), r4.y +xor r2.x, r5.z, r2.x +iadd r2.x, r4.z, r2.x +ishl r3.z, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r3.z +xor r2.x, r5.w, r2.x +iadd r2.x, r4.z, r2.x +ishl r2.x, r2.x, l(16) +or r4.xzw, r0.wwww, r2.xxxx +ushr r0.w, r1.x, l(21) +ushr r1.x, r0.w, l(10) +ieq r2.x, r0.w, l(1024) +movc r0.w, r2.x, l(1025), r0.w +movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r3.z +iadd r0.w, r1.x, r0.w +ishl r2.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r2.x +xor r0.w, r3.w, r0.w +iadd r0.w, r1.x, r0.w +or r4.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) +and r0.w, r1.y, l(1023) +ubfe r5.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy +ieq r1.x, r0.w, l(512) +movc r0.w, r1.x, l(513), r0.w +movc r6.xyzw, r5.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r6.x +iadd r0.w, r5.x, r0.w +ishl r1.x, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r1.x +xor r0.w, r6.y, r0.w +iadd r0.w, r5.x, r0.w +ieq r1.x, r5.y, l(1024) +movc r1.x, r1.x, l(1025), r5.y +xor r1.x, r6.z, r1.x +iadd r1.x, r5.z, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r6.w, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.x, r1.x, l(16) +or r5.xzw, r0.wwww, r1.xxxx +ushr r0.w, r1.y, l(21) +ushr r1.x, r0.w, l(10) +ieq r1.y, r0.w, l(1024) +movc r0.w, r1.y, l(1025), r0.w +movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r3.z +iadd r0.w, r1.x, r0.w +ishl r1.y, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r1.y +xor r0.w, r3.w, r0.w +iadd r0.w, r1.x, r0.w +or r5.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +and r0.w, r1.z, l(1023) +ubfe r5.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz +ieq r1.x, r0.w, l(512) +movc r0.w, r1.x, l(513), r0.w +movc r6.xyzw, r5.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r6.x +iadd r0.w, r5.x, r0.w +ishl r1.x, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r1.x +xor r0.w, r6.y, r0.w +iadd r0.w, r5.x, r0.w +ieq r1.x, r5.y, l(1024) +movc r1.x, r1.x, l(1025), r5.y +xor r1.x, r6.z, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.w, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.x, r1.x, l(16) +or r5.xzw, r0.wwww, r1.xxxx +ushr r0.w, r1.z, l(21) +ushr r1.x, r0.w, l(10) +ieq r1.y, r0.w, l(1024) +movc r0.w, r1.y, l(1025), r0.w +movc r1.yz, r1.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) +xor r0.w, r0.w, r1.y +iadd r0.w, r1.x, r0.w +ishl r1.y, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r1.y +xor r0.w, r1.z, r0.w +iadd r0.w, r1.x, r0.w +or r5.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r0.w, r0.z, r0.y +and r1.x, r1.w, l(1023) +ubfe r5.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww +ieq r1.y, r1.x, l(512) +movc r1.x, r1.y, l(513), r1.x +movc r6.xyzw, r5.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r5.x, r1.x +ishl r1.y, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.y +xor r1.x, r6.y, r1.x +ieq r1.y, r5.y, l(1024) +movc r1.y, r1.y, l(1025), r5.y +xor r1.y, r6.z, r1.y +iadd r1.xy, r5.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r6.w, r1.y +iadd r1.y, r5.z, r1.y +ishl r1.y, r1.y, l(16) +or r5.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(21) +ushr r1.y, r1.x, l(10) +ieq r1.z, r1.x, l(1024) +movc r1.x, r1.z, l(1025), r1.x +movc r1.zw, r1.yyyy, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r5.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw +endif +iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) +and r2.x, r1.x, l(1023) +ubfe r6.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx +ieq r2.y, r2.x, l(512) +movc r2.x, r2.y, l(513), r2.x +movc r7.xyzw, r6.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r2.x, r2.x, r7.x +iadd r2.x, r6.x, r2.x +ishl r2.y, r2.x, l(6) +ushr r2.x, r2.x, l(3) +or r2.x, r2.x, r2.y +xor r2.x, r7.y, r2.x +ieq r2.y, r6.y, l(1024) +movc r2.y, r2.y, l(1025), r6.y +xor r2.y, r7.z, r2.y +iadd r2.xy, r6.xzxx, r2.xyxx +ishl r2.z, r2.y, l(5) +ushr r2.y, r2.y, l(5) +or r2.y, r2.y, r2.z +xor r2.y, r7.w, r2.y +iadd r2.y, r6.z, r2.y +ishl r2.y, r2.y, l(16) +or r6.xzw, r2.yyyy, r2.xxxx +ushr r1.x, r1.x, l(21) +ushr r2.x, r1.x, l(10) +ieq r2.y, r1.x, l(1024) +movc r1.x, r2.y, l(1025), r1.x +movc r2.yz, r2.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) +xor r1.x, r1.x, r2.y +iadd r1.x, r2.x, r1.x +ishl r2.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.y +xor r1.x, r2.z, r1.x +iadd r1.x, r2.x, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw +and r1.x, r1.y, l(1023) +ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy +ieq r3.z, r1.x, l(512) +movc r1.x, r3.z, l(513), r1.x +movc r6.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r2.x, r1.x +ishl r3.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r3.z +xor r1.x, r6.y, r1.x +iadd r1.x, r2.x, r1.x +ieq r2.x, r2.y, l(1024) +movc r2.x, r2.x, l(1025), r2.y +xor r2.x, r6.z, r2.x +iadd r2.x, r2.z, r2.x +ishl r2.y, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r2.y +xor r2.x, r6.w, r2.x +iadd r2.x, r2.z, r2.x +ishl r2.x, r2.x, l(16) +or r6.xzw, r1.xxxx, r2.xxxx +ushr r1.x, r1.y, l(21) +ushr r1.y, r1.x, l(10) +ieq r2.x, r1.x, l(1024) +movc r1.x, r2.x, l(1025), r1.x +movc r2.xy, r1.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r1.x, r1.x, r2.x +iadd r1.x, r1.y, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r2.y, r1.x +iadd r1.x, r1.y, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +and r1.x, r1.z, l(1023) +ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz +ieq r1.y, r1.x, l(512) +movc r1.x, r1.y, l(513), r1.x +movc r6.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r2.x, r1.x +ishl r1.y, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.y +xor r1.x, r6.y, r1.x +ieq r1.y, r2.y, l(1024) +movc r1.y, r1.y, l(1025), r2.y +xor r1.y, r6.z, r1.y +iadd r1.xy, r2.xzxx, r1.xyxx +ishl r2.x, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r2.x +xor r1.y, r6.w, r1.y +iadd r1.y, r2.z, r1.y +ishl r1.y, r1.y, l(16) +or r6.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.z, l(21) +ushr r1.y, r1.x, l(10) +ieq r1.z, r1.x, l(1024) +movc r1.x, r1.z, l(1025), r1.x +movc r2.xy, r1.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r1.x, r1.x, r2.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.z +xor r1.x, r2.y, r1.x +iadd r1.x, r1.y, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw +iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) +and r1.x, r1.w, l(1023) +ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww +ieq r1.y, r1.x, l(512) +movc r1.x, r1.y, l(513), r1.x +movc r7.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r7.x +iadd r1.x, r2.x, r1.x +ishl r1.y, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.y +xor r1.x, r7.y, r1.x +ieq r1.y, r2.y, l(1024) +movc r1.y, r1.y, l(1025), r2.y +xor r1.y, r7.z, r1.y +iadd r1.xy, r2.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r7.w, r1.y +iadd r1.y, r2.z, r1.y +ishl r1.y, r1.y, l(16) +or r7.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(21) +ushr r1.y, r1.x, l(10) +ieq r1.z, r1.x, l(1024) +movc r1.x, r1.z, l(1025), r1.x +movc r1.zw, r1.yyyy, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r7.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r1.zw, r2.xxxx, T0[0].zwxy +if_nz r3.x + ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw +endif +and r0.x, r1.x, l(1023) +ubfe r7.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx +ieq r2.x, r0.x, l(512) +movc r0.x, r2.x, l(513), r0.x +movc r8.xyzw, r7.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r8.x +iadd r0.x, r7.x, r0.x +ishl r2.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r2.x +xor r0.x, r8.y, r0.x +iadd r0.x, r7.x, r0.x +ieq r2.x, r7.y, l(1024) +movc r2.x, r2.x, l(1025), r7.y +xor r2.x, r8.z, r2.x +iadd r2.x, r7.z, r2.x +ishl r3.z, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r3.z +xor r2.x, r8.w, r2.x +iadd r2.x, r7.z, r2.x +ishl r2.x, r2.x, l(16) +or r7.xzw, r0.xxxx, r2.xxxx +ushr r0.x, r1.x, l(21) +ushr r1.x, r0.x, l(10) +ieq r2.x, r0.x, l(1024) +movc r0.x, r2.x, l(1025), r0.x +movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r3.z +iadd r0.x, r1.x, r0.x +ishl r2.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r2.x +xor r0.x, r3.w, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +and r0.x, r1.y, l(1023) +ubfe r7.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy +ieq r1.x, r0.x, l(512) +movc r0.x, r1.x, l(513), r0.x +movc r8.xyzw, r7.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r8.x +iadd r0.x, r7.x, r0.x +ishl r1.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.x +xor r0.x, r8.y, r0.x +iadd r0.x, r7.x, r0.x +ieq r1.x, r7.y, l(1024) +movc r1.x, r1.x, l(1025), r7.y +xor r1.x, r8.z, r1.x +iadd r1.x, r7.z, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r8.w, r1.x +iadd r1.x, r7.z, r1.x +ishl r1.x, r1.x, l(16) +or r7.xzw, r0.xxxx, r1.xxxx +ushr r0.x, r1.y, l(21) +ushr r1.x, r0.x, l(10) +ieq r1.y, r0.x, l(1024) +movc r0.x, r1.y, l(1025), r0.x +movc r3.zw, r1.xxxx, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r3.z +iadd r0.x, r1.x, r0.x +ishl r1.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.y +xor r0.x, r3.w, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw +and r0.x, r1.z, l(1023) +ubfe r4.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz +ieq r1.x, r0.x, l(512) +movc r0.x, r1.x, l(513), r0.x +movc r7.xyzw, r4.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r7.x +iadd r0.x, r4.x, r0.x +ishl r1.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.x +xor r0.x, r7.y, r0.x +iadd r0.x, r4.x, r0.x +ieq r1.x, r4.y, l(1024) +movc r1.x, r1.x, l(1025), r4.y +xor r1.x, r7.z, r1.x +iadd r1.x, r4.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.w, r1.x +iadd r1.x, r4.z, r1.x +ishl r1.x, r1.x, l(16) +or r7.xzw, r0.xxxx, r1.xxxx +ushr r0.x, r1.z, l(21) +ushr r1.x, r0.x, l(10) +ieq r1.y, r0.x, l(1024) +movc r0.x, r1.y, l(1025), r0.x +movc r1.yz, r1.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) +xor r0.x, r0.x, r1.y +iadd r0.x, r1.x, r0.x +ishl r1.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.y +xor r0.x, r1.z, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw +iadd r0.x, r0.y, l(5) +and r1.x, r1.w, l(1023) +ubfe r4.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww +ieq r1.y, r1.x, l(512) +movc r1.x, r1.y, l(513), r1.x +movc r7.xyzw, r4.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r7.x +iadd r1.x, r4.x, r1.x +ishl r1.y, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.y +xor r1.x, r7.y, r1.x +ieq r1.y, r4.y, l(1024) +movc r1.y, r1.y, l(1025), r4.y +xor r1.y, r7.z, r1.y +iadd r1.xy, r4.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r7.w, r1.y +iadd r1.y, r4.z, r1.y +ishl r1.y, r1.y, l(16) +or r4.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(21) +ushr r1.y, r1.x, l(10) +ieq r1.z, r1.x, l(1024) +movc r1.x, r1.z, l(1025), r1.x +movc r1.zw, r1.yyyy, l(0,0,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r4.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +and r0.x, r1.x, l(1023) +ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.xxxx +ieq r0.y, r0.x, l(512) +movc r0.x, r0.y, l(513), r0.x +movc r4.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r2.x, r0.x +ishl r0.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r2.y, l(1024) +movc r0.y, r0.y, l(1025), r2.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r2.xzxx, r0.xyxx +ishl r2.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r2.x +xor r0.y, r4.w, r0.y +iadd r0.y, r2.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.x, l(21) +ushr r0.y, r0.x, l(10) +ieq r1.x, r0.x, l(1024) +movc r0.x, r1.x, l(1025), r0.x +movc r2.xy, r0.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r2.x +iadd r0.x, r0.y, r0.x +ishl r1.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.x +xor r0.x, r2.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw +and r0.x, r1.y, l(1023) +ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.yyyy +ieq r0.y, r0.x, l(512) +movc r0.x, r0.y, l(513), r0.x +movc r4.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r2.x, r0.x +ishl r0.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r2.y, l(1024) +movc r0.y, r0.y, l(1025), r2.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r2.xzxx, r0.xyxx +ishl r1.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r1.x +xor r0.y, r4.w, r0.y +iadd r0.y, r2.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.y, l(21) +ushr r0.y, r0.x, l(10) +ieq r1.x, r0.x, l(1024) +movc r0.x, r1.x, l(1025), r0.x +movc r1.xy, r0.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r1.x +iadd r0.x, r0.y, r0.x +ishl r1.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.x +xor r0.x, r1.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +iadd r0.x, r0.w, l(5) +and r0.y, r1.z, l(1023) +ubfe r2.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.zzzz +ieq r1.x, r0.y, l(512) +movc r0.y, r1.x, l(513), r0.y +movc r4.xyzw, r2.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.y, r0.y, r4.x +iadd r0.y, r2.x, r0.y +ishl r1.x, r0.y, l(6) +ushr r0.y, r0.y, l(3) +or r0.y, r0.y, r1.x +xor r0.y, r4.y, r0.y +iadd r0.y, r2.x, r0.y +ieq r1.x, r2.y, l(1024) +movc r1.x, r1.x, l(1025), r2.y +xor r1.x, r4.z, r1.x +iadd r1.x, r2.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r4.w, r1.x +iadd r1.x, r2.z, r1.x +ishl r1.x, r1.x, l(16) +or r4.xzw, r0.yyyy, r1.xxxx +ushr r0.y, r1.z, l(21) +ushr r1.x, r0.y, l(10) +ieq r1.y, r0.y, l(1024) +movc r0.y, r1.y, l(1025), r0.y +movc r1.yz, r1.xxxx, l(0,2047,0x0000ffff,0), l(0,0,0,0) +xor r0.y, r0.y, r1.y +iadd r0.y, r1.x, r0.y +ishl r1.y, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r1.y +xor r0.y, r1.z, r0.y +iadd r0.y, r1.x, r0.y +or r4.y, r0.y, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +and r0.x, r1.w, l(1023) +ubfe r1.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r1.wwww +ieq r0.y, r0.x, l(512) +movc r0.x, r0.y, l(513), r0.x +movc r4.xyzw, r1.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r1.x, r0.x +ishl r0.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r1.y, l(1024) +movc r0.y, r0.y, l(1025), r1.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r1.xzxx, r0.xyxx +ishl r0.w, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r0.w +xor r0.y, r4.w, r0.y +iadd r0.y, r1.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.w, l(21) +ushr r0.y, r0.x, l(10) +ieq r0.w, r0.x, l(1024) +movc r0.x, r0.w, l(1025), r0.x +movc r1.xy, r0.yyyy, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r1.x +iadd r0.x, r0.y, r0.x +ishl r0.w, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.w +xor r0.x, r1.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.zzzz, r4.xyzw +ld r0.xy, r2.wwww, T0[0].xyzw +if_nz r3.x + ishl r1.xy, r0.xyxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxy, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xy, r1.zwzz, r1.xyxx +endif +if_nz r3.y + ushr r1.xy, r0.xyxx, l(16, 16, 0, 0) + bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.xyxx +endif +and r0.w, r0.x, l(1023) +ubfe r1.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r0.xxxx +ieq r1.w, r0.w, l(512) +movc r0.w, r1.w, l(513), r0.w +movc r2.xyzw, r1.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r2.x +iadd r0.w, r1.x, r0.w +ishl r1.w, r0.w, l(6) +ushr r0.xw, r0.xxxw, l(21, 0, 0, 3) +or r0.w, r0.w, r1.w +xor r0.w, r2.y, r0.w +iadd r0.w, r1.x, r0.w +ieq r1.x, r1.y, l(1024) +movc r1.x, r1.x, l(1025), r1.y +xor r1.x, r2.z, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r2.w, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.x, r1.x, l(16) +or r1.xzw, r0.wwww, r1.xxxx +ushr r0.w, r0.x, l(10) +ieq r2.x, r0.x, l(1024) +movc r0.x, r2.x, l(1025), r0.x +movc r2.xy, r0.wwww, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r2.x +iadd r0.x, r0.w, r0.x +ishl r2.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r2.x +xor r0.x, r2.y, r0.x +iadd r0.x, r0.w, r0.x +or r1.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.wwww, r1.xyzw +iadd r0.x, r0.z, l(5) +and r0.w, r0.y, l(1023) +ubfe r1.xyz, l(1, 11, 1, 0), l(9, 10, 20, 0), r0.yyyy +ieq r1.w, r0.w, l(512) +movc r0.w, r1.w, l(513), r0.w +movc r2.xyzw, r1.xxzz, l(1023,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r2.x +iadd r0.w, r1.x, r0.w +ishl r1.w, r0.w, l(6) +ushr r0.yw, r0.yyyw, l(0, 21, 0, 3) +or r0.w, r0.w, r1.w +xor r0.w, r2.y, r0.w +iadd r0.w, r1.x, r0.w +ieq r1.x, r1.y, l(1024) +movc r1.x, r1.x, l(1025), r1.y +xor r1.x, r2.z, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r2.w, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.x, r1.x, l(16) +or r1.xzw, r0.wwww, r1.xxxx +ushr r0.w, r0.y, l(10) +ieq r2.x, r0.y, l(1024) +movc r0.y, r2.x, l(1025), r0.y +movc r2.xy, r0.wwww, l(2047,0x0000ffff,0,0), l(0,0,0,0) +xor r0.y, r0.y, r2.x +iadd r0.y, r0.w, r0.y +ishl r2.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r2.x +xor r0.y, r2.y, r0.y +iadd r0.y, r0.w, r0.y +or r1.y, r0.y, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ret +// Approximately 815 instruction slots used +#endif + +const BYTE texture_load_r10g11b11_rgba16_snorm_3x_cs[] = +{ + 68, 88, 66, 67, 190, 29, + 215, 56, 204, 252, 236, 192, + 208, 136, 43, 154, 11, 208, + 216, 80, 1, 0, 0, 0, + 132, 106, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 232, 105, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 168, 101, + 0, 0, 81, 0, 5, 0, + 106, 25, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 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0, 1, 0, 0, 0, + 10, 0, 16, 0, 1, 0, + 0, 0, 41, 0, 0, 7, + 34, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 1, 64, + 0, 0, 5, 0, 0, 0, + 85, 0, 0, 7, 18, 0, + 16, 0, 1, 0, 0, 0, + 10, 0, 16, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 5, 0, 0, 0, 60, 0, + 0, 7, 18, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 16, 0, 1, 0, + 0, 0, 87, 0, 0, 7, + 18, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 2, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 30, 0, 0, 7, 18, 0, + 16, 0, 1, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 10, 0, 16, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 18, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 1, 64, 0, 0, 16, 0, + 0, 0, 60, 0, 0, 7, + 210, 0, 16, 0, 1, 0, + 0, 0, 246, 15, 16, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 1, 0, 0, 0, + 85, 0, 0, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 10, 0, 0, 0, 32, 0, + 0, 7, 18, 0, 16, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 0, 4, + 0, 0, 55, 0, 0, 9, + 34, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 1, 64, + 0, 0, 1, 4, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 55, 0, 0, 15, + 50, 0, 16, 0, 2, 0, + 0, 0, 246, 15, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 255, 7, 0, 0, + 255, 255, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 87, 0, 0, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 2, 0, 0, 0, + 30, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 58, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 41, 0, + 0, 7, 18, 0, 16, 0, + 2, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 5, 0, + 0, 0, 85, 0, 0, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 5, 0, 0, 0, + 60, 0, 0, 7, 34, 0, + 16, 0, 0, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 10, 0, 16, 0, + 2, 0, 0, 0, 87, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 2, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 30, 0, 0, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 0, 0, 0, 0, + 60, 0, 0, 7, 34, 0, + 16, 0, 1, 0, 0, 0, + 26, 0, 16, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 255, 127, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 1, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 47, 3, 0, 0, 9, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 22, 1, 0, 0, + 85, 1, 0, 0, 4, 0, + 0, 0, 13, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 9, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 90, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 18, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_cs.h new file mode 100644 index 000000000..6d95c3954 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r10g11b11_rgba16_snorm_cs.h @@ -0,0 +1,2091 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 6 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(3) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +and r2.zw, r1.xxxy, l(0, 0, 1023, 1023) +ubfe r3.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r1.xyxy +ieq r4.xy, r2.zwzz, l(512, 512, 0, 0) +movc r2.zw, r4.xxxy, l(0,0,513,513), r2.zzzw +movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.zw, r2.zzzw, r4.xxxy +iadd r2.zw, r3.xxxy, r2.zzzw +ishl r4.xy, r2.zwzz, l(6, 6, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 3, 3) +or r2.zw, r2.zzzw, r4.xxxy +xor r2.zw, r4.zzzw, r2.zzzw +iadd r2.zw, r3.xxxy, r2.zzzw +ubfe r3.xy, l(1, 1, 0, 0), l(20, 20, 0, 0), r1.xyxx +ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) +movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.zw, r3.zzzw, r4.xxxy +iadd r3.zw, r3.xxxy, r3.zzzw +ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) +ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) +or r3.zw, r3.zzzw, r4.xxxy +xor r3.zw, r4.zzzw, r3.zzzw +iadd r3.xy, r3.xyxx, r3.zwzz +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r3.xz, r2.zzwz, r3.xxyx +ushr r1.xy, r1.xyxx, l(21, 21, 0, 0) +ushr r2.zw, r1.xxxy, l(0, 0, 10, 10) +ieq r4.xy, r1.xyxx, l(1024, 1024, 0, 0) +movc r1.xy, r4.xyxx, l(1025,1025,0,0), r1.xyxx +movc r4.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.xy, r1.xyxx, r4.xyxx +iadd r1.xy, r2.zwzz, r1.xyxx +ishl r4.xy, r1.xyxx, l(5, 5, 0, 0) +ushr r1.xy, r1.xyxx, l(5, 5, 0, 0) +or r1.xy, r1.xyxx, r4.xyxx +xor r1.xy, r4.zwzz, r1.xyxx +iadd r1.xy, r2.zwzz, r1.xyxx +or r3.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.xy, r1.zwzz, l(1023, 1023, 0, 0) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r1.zwzw +ieq r2.zw, r1.xxxy, l(0, 0, 512, 512) +movc r1.xy, r2.zwzz, l(513,513,0,0), r1.xyxx +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.xy, r1.xyxx, r5.xyxx +iadd r1.xy, r4.xyxx, r1.xyxx +ishl r2.zw, r1.xxxy, l(0, 0, 6, 6) +ushr r1.xy, r1.xyxx, l(3, 3, 0, 0) +or r1.xy, r1.xyxx, r2.zwzz +xor r1.xy, r5.zwzz, r1.xyxx +iadd r1.xy, r4.xyxx, r1.xyxx +ubfe r2.zw, l(0, 0, 1, 1), l(0, 0, 20, 20), r1.zzzw +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r2.zwzz, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r2.zw, r2.zzzw, r4.xxxy +ishl r2.zw, r2.zzzw, l(0, 0, 16, 16) +or r4.xz, r1.xxyx, r2.zzwz +ushr r1.xy, r1.zwzz, l(21, 21, 0, 0) +ushr r1.zw, r1.xxxy, l(0, 0, 10, 10) +ieq r2.zw, r1.xxxy, l(0, 0, 1024, 1024) +movc r1.xy, r2.zwzz, l(1025,1025,0,0), r1.xyxx +movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.xy, r1.xyxx, r5.xyxx +iadd r1.xy, r1.zwzz, r1.xyxx +ishl r2.zw, r1.xxxy, l(0, 0, 5, 5) +ushr r1.xy, r1.xyxx, l(5, 5, 0, 0) +or r1.xy, r1.xyxx, r2.zwzz +xor r1.xy, r5.zwzz, r1.xyxx +iadd r1.xy, r1.zwzz, r1.xyxx +or r4.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.xyz, r0.yyyy, l(1, 2, 3, 0) +store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r3.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r2.y + ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw +endif +and r0.xz, r3.xxyx, l(1023, 0, 1023, 0) +ubfe r2.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.xyxy +ieq r1.xw, r0.xxxz, l(512, 0, 0, 512) +movc r0.xz, r1.xxwx, l(513,0,513,0), r0.xxzx +movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r4.xxyx +iadd r0.xz, r2.xxyx, r0.xxzx +ishl r1.xw, r0.xxxz, l(6, 0, 0, 6) +ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) +or r0.xz, r0.xxzx, r1.xxwx +xor r0.xz, r4.zzwz, r0.xxzx +iadd r0.xz, r2.xxyx, r0.xxzx +ubfe r1.xw, l(1, 0, 0, 1), l(20, 0, 0, 20), r3.xxxy +ieq r2.xy, r2.zwzz, l(1024, 1024, 0, 0) +movc r2.xy, r2.xyxx, l(1025,1025,0,0), r2.zwzz +movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r4.xyxx +iadd r2.xy, r1.xwxx, r2.xyxx +ishl r2.zw, r2.xxxy, l(0, 0, 5, 5) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +or r2.xy, r2.xyxx, r2.zwzz +xor r2.xy, r4.zwzz, r2.xyxx +iadd r1.xw, r1.xxxw, r2.xxxy +ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) +or r2.xz, r0.xxzx, r1.xxwx +ushr r0.xz, r3.xxyx, l(21, 0, 21, 0) +ushr r1.xw, r0.xxxz, l(10, 0, 0, 10) +ieq r3.xy, r0.xzxx, l(1024, 1024, 0, 0) +movc r0.xz, r3.xxyx, l(1025,0,1025,0), r0.xxzx +movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r4.xxyx +iadd r0.xz, r1.xxwx, r0.xxzx +ishl r3.xy, r0.xzxx, l(5, 5, 0, 0) +ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) +or r0.xz, r0.xxzx, r3.xxyx +xor r0.xz, r4.zzwz, r0.xxzx +iadd r0.xz, r1.xxwx, r0.xxzx +or r2.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +and r0.xz, r3.zzwz, l(1023, 0, 1023, 0) +ubfe r4.xyzw, l(1, 1, 11, 11), l(9, 9, 10, 10), r3.zwzw +ieq r1.xw, r0.xxxz, l(512, 0, 0, 512) +movc r0.xz, r1.xxwx, l(513,0,513,0), r0.xxzx +movc r5.xyzw, r4.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r5.xxyx +iadd r0.xz, r4.xxyx, r0.xxzx +ishl r1.xw, r0.xxxz, l(6, 0, 0, 6) +ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) +or r0.xz, r0.xxzx, r1.xxwx +xor r0.xz, r5.zzwz, r0.xxzx +iadd r0.xz, r4.xxyx, r0.xxzx +ubfe r1.xw, l(1, 0, 0, 1), l(20, 0, 0, 20), r3.zzzw +ieq r3.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r4.zwzz +movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r4.xyxx +iadd r3.xy, r1.xwxx, r3.xyxx +ishl r4.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r4.xyxx +xor r3.xy, r4.zwzz, r3.xyxx +iadd r1.xw, r1.xxxw, r3.xxxy +ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) +or r4.xz, r0.xxzx, r1.xxwx +ushr r0.xz, r3.zzwz, l(21, 0, 21, 0) +ushr r1.xw, r0.xxxz, l(10, 0, 0, 10) +ieq r3.xy, r0.xzxx, l(1024, 1024, 0, 0) +movc r0.xz, r3.xxyx, l(1025,0,1025,0), r0.xxzx +movc r3.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r3.xxyx +iadd r0.xz, r1.xxwx, r0.xxzx +ishl r3.xy, r0.xzxx, l(5, 5, 0, 0) +ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) +or r0.xz, r0.xxzx, r3.xxyx +xor r0.xz, r3.zzwz, r0.xxzx +iadd r0.xz, r1.xxwx, r0.xxzx +or r4.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +ret +// Approximately 257 instruction slots used +#endif + +const BYTE texture_load_r10g11b11_rgba16_snorm_cs[] = +{ + 68, 88, 66, 67, 62, 40, + 197, 58, 114, 228, 255, 215, + 41, 174, 231, 166, 153, 46, + 54, 63, 1, 0, 0, 0, + 164, 41, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 8, 41, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 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0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_2x_cs.h new file mode 100644 index 000000000..08a5e640a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_2x_cs.h @@ -0,0 +1,2991 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(3) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].zwxy +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +ushr r4.xyzw, r3.xyxy, l(22, 22, 1, 1) +mov r3.zw, r4.xxxy +bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r1.zw, r3.xxxy, l(0, 0, 10, 10) +and r3.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r1.zzzw +iadd r3.xz, r1.zzwz, r5.xxzx +iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r4.xyzw, r2.xyxy, l(22, 22, 1, 1) +mov r2.zw, r4.xxxy +bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r1.zw, r2.xxxy, l(0, 0, 10, 10) +and r2.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r2.xz, r1.zzwz, r5.xxzx +iadd r2.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r3.xyzw, r2.xxxx, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.zwxy, r5.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ushr r5.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.zw, r5.xxxy +bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r2.xw, r4.xxxy, l(10, 0, 0, 10) +and r4.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r4.xxxy, r2.xxxw +iadd r4.xz, r2.xxwx, r6.xxzx +iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r5.xyzw, r3.xyxy, l(22, 22, 1, 1) +mov r3.zw, r5.xxxy +bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r2.xw, r3.xxxy, l(10, 0, 0, 10) +and r3.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r3.xxxy, r2.xxxw +iadd r3.xz, r2.xxwx, r6.xxzx +iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +iadd r5.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw +iadd r1.z, r1.z, l(1) +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r2.yyyy, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.zw, r6.xxxy +bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r7.xyzw, r7.xyzw, r8.xyzw +ishl r1.zw, r4.xxxy, l(0, 0, 10, 10) +and r2.xy, r6.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r4.xz, r1.zzwz, r7.xxzx +iadd r4.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r6.xyzw, r3.xyxy, l(22, 22, 1, 1) +mov r3.zw, r6.xxxy +bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy +iadd r7.xyzw, r7.xyzw, r8.xyzw +ishl r1.zw, r3.xxxy, l(0, 0, 10, 10) +and r2.xy, r6.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r3.xz, r1.zzwz, r7.xxzx +iadd r3.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw +iadd r1.zw, r0.zzzz, r5.yyyw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r2.xyzw, r2.zzzz, T0[0].zwxy +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r3.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.zwxy + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +ushr r4.xyzw, r3.xyxy, l(22, 22, 1, 1) +mov r3.zw, r4.xxxy +bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.zw, r4.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r3.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r3.zwzz, r3.xyxx +iadd r3.xz, r3.xxyx, r6.xxzx +iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r4.xyzw, r2.xyxy, l(22, 22, 1, 1) +mov r2.zw, r4.xxxy +bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r2.xy, r2.xyxx, l(10, 10, 0, 0) +and r2.zw, r4.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.zwzz, r2.xyxx +iadd r2.xz, r2.xxyx, r6.xxzx +iadd r2.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r3.xyzw +iadd r3.xy, r1.zwzz, l(1, 1, 0, 0) +store_uav_typed U0[0].xyzw, r3.xxxx, r2.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(8) +else + iadd r0.w, r0.x, l(4) +endif +ld r2.xyzw, r0.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.zwxy + mov r4.xy, r2.zwzz +else + mov r4.xy, r2.zwzz +endif +ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.zw, r6.xxxy +bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r7.xyzw, r7.xyzw, r8.xyzw +ishl r3.xz, r4.xxyx, l(10, 0, 10, 0) +and r4.xy, r6.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r3.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r4.xxyx, r3.xxzx +iadd r4.xz, r3.xxzx, r7.xxzx +iadd r4.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r6.xyzw, r2.xyxy, l(22, 22, 1, 1) +mov r2.zw, r6.xxxy +bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy +iadd r7.xyzw, r7.xyzw, r8.xyzw +ishl r2.xy, r2.xyxx, l(10, 10, 0, 0) +and r2.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r2.zwzz, r2.xyxx +iadd r2.xz, r2.xxyx, r7.xxzx +iadd r2.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xyz, r0.wwww, l(1, 2, 3, 0) +ld r4.xyzw, r2.xxxx, T0[0].zwxy +if_nz r1.x + ishl r5.xyzw, r4.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.zwxy, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.zwxy, r6.zwxy +endif +if_nz r1.y + ushr r5.xyzw, r4.zwxy, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.zwxy + mov r5.xy, r4.zwzz +else + mov r5.xy, r4.zwzz +endif +ushr r6.xyzw, r5.xyxy, l(22, 22, 1, 1) +mov r5.zw, r6.xxxy +bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r5.xzyw, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r5.xxyy +iadd r7.xyzw, r7.xyzw, r8.xyzw +ishl r0.xw, r5.xxxy, l(10, 0, 0, 10) +and r1.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw +iadd r5.xz, r0.xxwx, r7.xxzx +iadd r5.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.zw, r6.xxxy +bfi r7.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r7.xyzw, r7.xyzw, r8.xyzw +ishl r0.xw, r4.xxxy, l(10, 0, 0, 10) +and r1.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r0.xw, l(21, 0, 0, 21), l(0, 0, 0, 0), r1.zzzw, r0.xxxw +iadd r4.xz, r0.xxwx, r7.xxzx +iadd r4.yw, r7.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyzw +ld r3.xyzw, r2.yyyy, T0[0].zwxy +if_nz r1.x + ishl r4.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.zwxy, r5.zwxy +endif +if_nz r1.y + ushr r4.xyzw, r3.zwxy, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.zwxy + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ushr r5.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.zw, r5.xxxy +bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r4.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r1.zw, r4.xxxy, l(0, 0, 10, 10) +and r2.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r4.xz, r1.zzwz, r6.xxzx +iadd r4.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r5.xyzw, r3.xyxy, l(22, 22, 1, 1) +mov r3.zw, r5.xxxy +bfi r6.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy +iadd r6.xyzw, r6.xyzw, r7.xyzw +ishl r1.zw, r3.xxxy, l(0, 0, 10, 10) +and r2.xy, r5.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r1.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r2.xxxy, r1.zzzw +iadd r3.xz, r1.zzwz, r6.xxzx +iadd r3.yw, r6.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r0.x, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +ld r2.xyzw, r2.zzzz, T0[0].zwxy +if_nz r1.x + ishl r3.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r1.y + ushr r1.xyzw, r2.zwxy, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.zwxy + mov r1.xy, r2.zwzz +else + mov r1.xy, r2.zwzz +endif +ushr r3.xyzw, r1.xyxy, l(22, 22, 1, 1) +mov r1.zw, r3.xxxy +bfi r4.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r0.yz, r1.xxyx, l(0, 10, 10, 0) +and r1.xy, r3.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.yyzy +iadd r1.xz, r0.yyzy, r4.xxzx +iadd r1.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r3.xyzw, r2.xyxy, l(22, 22, 1, 1) +mov r2.zw, r3.xxxy +bfi r4.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy +iadd r4.xyzw, r4.xyzw, r5.xyzw +ishl r0.yz, r2.xxyx, l(0, 10, 10, 0) +and r2.xy, r3.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.yz, l(0, 21, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.yyzy +iadd r2.xz, r0.yyzy, r4.xxzx +iadd r2.yw, r4.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.x, l(1) +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +ret +// Approximately 388 instruction slots used +#endif + +const BYTE texture_load_r11g11b10_rgba16_2x_cs[] = +{ + 68, 88, 66, 67, 147, 82, + 22, 143, 61, 101, 17, 47, + 211, 2, 164, 175, 143, 215, + 70, 113, 1, 0, 0, 0, + 168, 59, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 12, 59, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 204, 54, + 0, 0, 81, 0, 5, 0, + 179, 13, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 156, 8, + 0, 7, 70, 238, 49, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 68, 68, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 2, + 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2, 0, 0, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 41, 0, 0, 10, + 98, 0, 16, 0, 0, 0, + 0, 0, 6, 1, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 10, 50, 0, + 16, 0, 2, 0, 0, 0, + 230, 10, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 31, 0, 0, 0, + 31, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 140, 0, + 0, 17, 98, 0, 16, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 21, 0, 0, 0, 21, 0, + 0, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 1, 16, 0, + 2, 0, 0, 0, 86, 6, + 16, 0, 0, 0, 0, 0, + 30, 0, 0, 7, 82, 0, + 16, 0, 2, 0, 0, 0, + 86, 6, 16, 0, 0, 0, + 0, 0, 6, 2, 16, 0, + 4, 0, 0, 0, 30, 0, + 0, 10, 162, 0, 16, 0, + 2, 0, 0, 0, 86, 13, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 255, 255, + 0, 0, 0, 0, 0, 0, + 255, 255, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 246, 15, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 30, 0, + 0, 7, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 1, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 0, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 132, 1, + 0, 0, 9, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 123, 0, 0, 0, 80, 0, + 0, 0, 13, 0, 0, 0, + 20, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 16, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_3x_cs.h new file mode 100644 index 000000000..d009d9b4a --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_3x_cs.h @@ -0,0 +1,2585 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 12 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) +imul null, r0.w, r0.w, CB0[0][1].y +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw + mov r4.xyz, r1.xyzx +else + mov r4.xyz, r1.xyzx +endif +ushr r5.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.w, r5.x +bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r4.xxxw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r3.zw, r3.zzzw, r6.xxxy +ishl r7.xyz, r4.xyzx, l(10, 10, 10, 0) +and r5.zw, r5.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r5.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r5.zzzw, r7.xxxy +iadd r8.xzw, r3.zzzz, r5.zzzz +iadd r8.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r8.xyzw +iadd r8.xyzw, r0.yyyy, l(1, 2, 3, 4) +mov r5.x, r4.y +bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r5.xxxy, l(0, 0, 0, 0) +iadd r3.zw, r3.zzzw, r6.zzzw +iadd r5.xzw, r5.wwww, r3.zzzz +iadd r5.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r8.xxxx, r5.xyzw +ushr r4.xy, r4.zzzz, l(22, 1, 0, 0) +bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r4.zzzx, l(0, 0, 0, 0) +ubfe r4.xz, l(5, 0, 6, 0), l(6, 0, 26, 0), r4.zzzz +iadd r3.zw, r3.zzzw, r4.xxxz +and r0.w, r4.y, l(0x001f0000) +bfi r0.w, l(21), l(0), r0.w, r7.z +iadd r4.xzw, r0.wwww, r3.zzzz +iadd r4.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r8.yyyy, r4.xyzw +iadd r0.w, r0.z, r0.y +ushr r1.xy, r1.wwww, l(22, 1, 0, 0) +bfi r1.xz, l(11, 0, 26, 0), l(5, 0, 6, 0), r1.wwxw, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r1.wwww +iadd r1.xz, r1.xxzx, r3.zzwz +ishl r1.w, r1.w, l(10) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r1.w +iadd r4.xzw, r1.yyyy, r1.xxxx +iadd r4.y, r1.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r4.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw + mov r4.xyz, r1.xyzx +else + mov r4.xyz, r1.xyzx +endif +iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) +ushr r6.xyzw, r4.xyxy, l(22, 22, 1, 1) +mov r4.w, r6.x +bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r4.xwxx, l(0, 0, 0, 0) +ubfe r7.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r4.xxyy +iadd r2.xy, r2.xyxx, r7.xyxx +ishl r9.xyz, r4.xyzx, l(10, 10, 10, 0) +and r3.zw, r6.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r3.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.zzzw, r9.xxxy +iadd r10.xzw, r2.xxxx, r3.zzzz +iadd r10.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.xxxx, r10.xyzw +mov r6.x, r4.y +bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r6.xyxx, l(0, 0, 0, 0) +iadd r2.xy, r2.xyxx, r7.zwzz +iadd r6.xzw, r3.wwww, r2.xxxx +iadd r6.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +ushr r4.xy, r4.zzzz, l(22, 1, 0, 0) +bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r4.zxzz, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r4.zzzz +iadd r2.xy, r2.xyxx, r3.zwzz +and r1.z, r4.y, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.z, r9.z +iadd r4.xzw, r1.zzzz, r2.xxxx +iadd r4.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.zzzz, r4.xyzw +iadd r4.xyzw, r0.zzzz, l(1, 2, 3, 4) +ushr r1.xy, r1.wwww, l(22, 1, 0, 0) +bfi r1.xz, l(11, 0, 26, 0), l(5, 0, 6, 0), r1.wwxw, l(0, 0, 0, 0) +ubfe r2.xy, l(5, 6, 0, 0), l(6, 26, 0, 0), r1.wwww +iadd r1.xz, r1.xxzx, r2.xxyx +ishl r1.w, r1.w, l(10) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r1.w +iadd r6.xzw, r1.yyyy, r1.xxxx +iadd r6.y, r1.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r1.zw, r2.xxxx, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw + mov r6.xyz, r1.xyzx +else + mov r6.xyz, r1.xyzx +endif +ushr r7.xyzw, r6.xyxy, l(22, 22, 1, 1) +mov r6.w, r7.x +bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r6.xxxw, l(0, 0, 0, 0) +ubfe r9.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r6.xxyy +iadd r3.zw, r3.zzzw, r9.xxxy +ishl r10.xyz, r6.xyzx, l(10, 10, 10, 0) +and r5.xy, r7.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r5.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r5.xyxx, r10.xyxx +iadd r11.xzw, r3.zzzz, r5.xxxx +iadd r11.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.yyyy, r11.xyzw +mov r7.x, r6.y +bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r7.xxxy, l(0, 0, 0, 0) +iadd r3.zw, r3.zzzw, r9.zzzw +iadd r7.xzw, r5.yyyy, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r8.zzzz, r7.xyzw +ushr r6.xy, r6.zzzz, l(22, 1, 0, 0) +bfi r3.zw, l(0, 0, 11, 26), l(0, 0, 5, 6), r6.zzzx, l(0, 0, 0, 0) +ubfe r4.xy, l(5, 6, 0, 0), l(6, 26, 0, 0), r6.zzzz +iadd r3.zw, r3.zzzw, r4.xxxy +and r0.x, r6.y, l(0x001f0000) +bfi r0.x, l(21), l(0), r0.x, r10.z +iadd r6.xzw, r0.xxxx, r3.zzzz +iadd r6.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r8.wwww, r6.xyzw +iadd r0.x, r0.y, l(5) +ushr r1.xy, r1.wwww, l(22, 1, 0, 0) +bfi r1.xz, l(11, 0, 26, 0), l(5, 0, 6, 0), r1.wwxw, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r1.wwww +iadd r1.xz, r1.xxzx, r3.zzwz +ishl r1.w, r1.w, l(10) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r1.w +iadd r6.xzw, r1.yyyy, r1.xxxx +iadd r6.y, r1.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r6.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw + mov r6.xyz, r1.xyzx +else + mov r6.xyz, r1.xyzx +endif +ushr r7.xyzw, r6.xyxy, l(22, 22, 1, 1) +mov r6.w, r7.x +bfi r0.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r6.xwxx, l(0, 0, 0, 0) +ubfe r8.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r6.xxyy +iadd r0.xy, r0.xyxx, r8.xyxx +ishl r2.xyz, r6.xyzx, l(10, 10, 10, 0) +and r3.zw, r7.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r2.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r3.zwzz, r2.xyxx +iadd r9.xzw, r0.xxxx, r2.xxxx +iadd r9.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r9.xyzw +mov r7.x, r6.y +bfi r0.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r7.xyxx, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r8.zwzz +iadd r7.xzw, r2.yyyy, r0.xxxx +iadd r7.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r7.xyzw +iadd r0.x, r0.w, l(5) +ushr r6.xy, r6.zzzz, l(22, 1, 0, 0) +bfi r2.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r6.zxzz, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 5, 6), l(0, 0, 6, 26), r6.zzzz +iadd r2.xy, r2.xyxx, r3.zwzz +and r0.y, r6.y, l(0x001f0000) +bfi r0.y, l(21), l(0), r0.y, r2.z +iadd r5.xzw, r0.yyyy, r2.xxxx +iadd r5.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +ushr r1.xy, r1.wwww, l(22, 1, 0, 0) +bfi r0.xy, l(11, 26, 0, 0), l(5, 6, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r1.xz, l(5, 0, 6, 0), l(6, 0, 26, 0), r1.wwww +iadd r0.xy, r0.xyxx, r1.xzxx +ishl r0.w, r1.w, l(10) +and r1.x, r1.y, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.x, r0.w +iadd r1.xzw, r0.wwww, r0.xxxx +iadd r1.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.zzzz, r1.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +if_nz r3.x + ishl r0.xy, r1.xyxx, l(8, 8, 0, 0) + and r0.xy, r0.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r2.xy, r1.xyxx, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.xy, r0.xyxx, r2.xyxx +endif +if_nz r3.y + ushr r0.xy, r1.xyxx, l(16, 16, 0, 0) + bfi r1.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r1.xyxx, r0.xyxx +endif +ushr r2.xyzw, r1.xxyy, l(22, 1, 22, 1) +mov r1.zw, r2.xxxz +bfi r3.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) +ubfe r5.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy +iadd r3.xyzw, r3.xyzw, r5.xyzw +ishl r0.xy, r1.xyxx, l(10, 10, 0, 0) +and r1.xy, r2.ywyy, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r1.xyxx, r0.xyxx +iadd r1.xzw, r0.xxxx, r3.xxxx +iadd r1.y, r3.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.wwww, r1.xyzw +iadd r0.x, r0.z, l(5) +iadd r1.xzw, r0.yyyy, r3.zzzz +iadd r1.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ret +// Approximately 330 instruction slots used +#endif + +const BYTE texture_load_r11g11b10_rgba16_3x_cs[] = +{ + 68, 88, 66, 67, 252, 111, + 87, 116, 208, 146, 248, 192, + 81, 251, 163, 84, 214, 72, + 9, 39, 1, 0, 0, 0, + 132, 51, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 232, 50, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 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0, 80, 0, 0, 9, + 114, 0, 16, 0, 1, 0, + 0, 0, 70, 2, 16, 0, + 0, 0, 0, 0, 70, 130, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 60, 0, 0, 7, + 130, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 60, 0, 0, 7, 130, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 58, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 10, 226, 0, + 16, 0, 0, 0, 0, 0, + 6, 9, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 38, 0, + 0, 10, 0, 208, 0, 0, + 130, 0, 16, 0, 0, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 26, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 41, 0, 0, 7, + 34, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 0, 0, 0, 0, 1, 64, + 0, 0, 3, 0, 0, 0, + 35, 0, 0, 9, 66, 0, + 16, 0, 0, 0, 0, 0, + 1, 64, 0, 0, 3, 0, + 0, 0, 58, 0, 16, 0, + 0, 0, 0, 0, 42, 0, + 16, 0, 0, 0, 0, 0, + 35, 0, 0, 11, 34, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 0, 0, + 0, 0, 10, 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1, 64, 0, 0, + 5, 0, 0, 0, 30, 0, + 0, 7, 210, 0, 16, 0, + 1, 0, 0, 0, 86, 5, + 16, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 3, 0, + 0, 0, 30, 0, 0, 7, + 34, 0, 16, 0, 1, 0, + 0, 0, 58, 0, 16, 0, + 3, 0, 0, 0, 1, 64, + 0, 0, 0, 0, 255, 255, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 1, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 74, 1, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 114, 0, + 0, 0, 64, 0, 0, 0, + 8, 0, 0, 0, 13, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 9, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 18, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 18, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_cs.h new file mode 100644 index 000000000..81835ad11 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_cs.h @@ -0,0 +1,1328 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(3) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].zwxy +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.zwxy, r4.zwxy +endif +if_nz r2.y + ushr r3.xyzw, r1.zwxy, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.zwxy + mov r3.xy, r1.zwzz +else + mov r3.xy, r1.zwzz +endif +ushr r4.xyzw, r3.xyxy, l(22, 22, 1, 1) +mov r3.zw, r4.xxxy +bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r3.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r3.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r2.zw, r3.xxxy, l(0, 0, 10, 10) +and r3.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r2.zw, l(0, 0, 21, 21), l(0, 0, 0, 0), r3.xxxy, r2.zzzw +iadd r3.xz, r2.zzwz, r5.xxzx +iadd r3.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r4.xyzw, r1.xyxy, l(22, 22, 1, 1) +mov r1.zw, r4.xxxy +bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r1.xy, r1.xyxx, l(10, 10, 0, 0) +and r1.zw, r4.zzzw, l(0, 0, 0x001f0000, 0x001f0000) +bfi r1.xy, l(21, 21, 0, 0), l(0, 0, 0, 0), r1.zwzz, r1.xyxx +iadd r1.xz, r1.xxyx, r5.xxzx +iadd r1.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r3.xyz, r0.yyyy, l(1, 2, 3, 0) +store_uav_typed U0[0].xyzw, r3.xxxx, r1.xyzw +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r1.xyzw, r0.xxxx, T0[0].zwxy +if_nz r2.x + ishl r4.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.zwxy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.zwxy, r5.zwxy +endif +if_nz r2.y + ushr r2.xyzw, r1.zwxy, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.zwxy + mov r2.xy, r1.zwzz +else + mov r2.xy, r1.zwzz +endif +ushr r4.xyzw, r2.xyxy, l(22, 22, 1, 1) +mov r2.zw, r4.xxxy +bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r2.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r2.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r0.xz, r2.xxyx, l(10, 0, 10, 0) +and r2.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r2.xxyx, r0.xxzx +iadd r2.xz, r0.xxzx, r5.xxzx +iadd r2.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +ushr r4.xyzw, r1.xyxy, l(22, 22, 1, 1) +mov r1.zw, r4.xxxy +bfi r5.xyzw, l(11, 26, 11, 26), l(5, 6, 5, 6), r1.xzyw, l(0, 0, 0, 0) +ubfe r6.xyzw, l(5, 6, 5, 6), l(6, 26, 6, 26), r1.xxyy +iadd r5.xyzw, r5.xyzw, r6.xyzw +ishl r0.xz, r1.xxyx, l(10, 0, 10, 0) +and r1.xy, r4.zwzz, l(0x001f0000, 0x001f0000, 0, 0) +bfi r0.xz, l(21, 0, 21, 0), l(0, 0, 0, 0), r1.xxyx, r0.xxzx +iadd r1.xz, r0.xxzx, r5.xxzx +iadd r1.yw, r5.yyyw, l(0, 0xffff0000, 0, 0xffff0000) +store_uav_typed U0[0].xyzw, r3.yyyy, r2.xyzw +store_uav_typed U0[0].xyzw, r3.zzzz, r1.xyzw +ret +// Approximately 151 instruction slots used +#endif + +const BYTE texture_load_r11g11b10_rgba16_cs[] = +{ + 68, 88, 66, 67, 62, 204, + 184, 233, 182, 40, 232, 53, + 155, 240, 50, 63, 50, 21, + 250, 96, 1, 0, 0, 0, + 60, 26, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 160, 25, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 96, 21, + 0, 0, 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1, 0, 0, 0, 230, 4, + 16, 0, 2, 0, 0, 0, + 54, 0, 0, 5, 50, 0, + 16, 0, 2, 0, 0, 0, + 230, 10, 16, 0, 1, 0, + 0, 0, 18, 0, 0, 1, + 54, 0, 0, 5, 50, 0, + 16, 0, 2, 0, 0, 0, + 230, 10, 16, 0, 1, 0, + 0, 0, 21, 0, 0, 1, + 85, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 4, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 22, 0, 0, 0, 22, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 194, 0, 16, 0, + 2, 0, 0, 0, 6, 4, + 16, 0, 4, 0, 0, 0, + 140, 0, 0, 20, 242, 0, + 16, 0, 5, 0, 0, 0, + 2, 64, 0, 0, 11, 0, + 0, 0, 26, 0, 0, 0, + 11, 0, 0, 0, 26, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 5, 0, 0, 0, + 6, 0, 0, 0, 134, 13, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 138, 0, 0, 15, + 242, 0, 16, 0, 6, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 5, 0, 0, 0, + 6, 0, 0, 0, 2, 64, + 0, 0, 6, 0, 0, 0, + 26, 0, 0, 0, 6, 0, + 0, 0, 26, 0, 0, 0, + 6, 5, 16, 0, 2, 0, + 0, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 6, 0, 0, 0, + 41, 0, 0, 10, 82, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 10, 50, 0, 16, 0, + 2, 0, 0, 0, 230, 10, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 31, 0, 0, 0, 31, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 140, 0, 0, 17, + 82, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 21, 0, 0, 0, 0, 0, + 0, 0, 21, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 2, 0, + 0, 0, 6, 2, 16, 0, + 0, 0, 0, 0, 30, 0, + 0, 7, 82, 0, 16, 0, + 2, 0, 0, 0, 6, 2, + 16, 0, 0, 0, 0, 0, + 6, 2, 16, 0, 5, 0, + 0, 0, 30, 0, 0, 10, + 162, 0, 16, 0, 2, 0, + 0, 0, 86, 13, 16, 0, + 5, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 255, 255, 0, 0, + 0, 0, 0, 0, 255, 255, + 85, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 4, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 22, 0, 0, 0, 22, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 54, 0, + 0, 5, 194, 0, 16, 0, + 1, 0, 0, 0, 6, 4, + 16, 0, 4, 0, 0, 0, + 140, 0, 0, 20, 242, 0, + 16, 0, 5, 0, 0, 0, + 2, 64, 0, 0, 11, 0, + 0, 0, 26, 0, 0, 0, + 11, 0, 0, 0, 26, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 5, 0, 0, 0, + 6, 0, 0, 0, 134, 13, + 16, 0, 1, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 138, 0, 0, 15, + 242, 0, 16, 0, 6, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 6, 0, + 0, 0, 5, 0, 0, 0, + 6, 0, 0, 0, 2, 64, + 0, 0, 6, 0, 0, 0, + 26, 0, 0, 0, 6, 0, + 0, 0, 26, 0, 0, 0, + 6, 5, 16, 0, 1, 0, + 0, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 6, 0, 0, 0, + 41, 0, 0, 10, 82, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 1, 0, + 0, 0, 2, 64, 0, 0, + 10, 0, 0, 0, 0, 0, + 0, 0, 10, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 10, 50, 0, 16, 0, + 1, 0, 0, 0, 230, 10, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 31, 0, 0, 0, 31, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 140, 0, 0, 17, + 82, 0, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 21, 0, 0, 0, 0, 0, + 0, 0, 21, 0, 0, 0, + 0, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 1, 0, + 0, 0, 6, 2, 16, 0, + 0, 0, 0, 0, 30, 0, + 0, 7, 82, 0, 16, 0, + 1, 0, 0, 0, 6, 2, + 16, 0, 0, 0, 0, 0, + 6, 2, 16, 0, 5, 0, + 0, 0, 30, 0, 0, 10, + 162, 0, 16, 0, 1, 0, + 0, 0, 86, 13, 16, 0, + 5, 0, 0, 0, 2, 64, + 0, 0, 0, 0, 0, 0, + 0, 0, 255, 255, 0, 0, + 0, 0, 0, 0, 255, 255, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 86, 5, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 1, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 151, 0, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 51, 0, 0, 0, 31, 0, + 0, 0, 6, 0, 0, 0, + 7, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 9, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_2x_cs.h new file mode 100644 index 000000000..8726ce034 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_2x_cs.h @@ -0,0 +1,6044 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(3) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r2.xz, l(27, 0, 29, 0), l(2, 0, 0, 0), vThreadID.xxxx + imad r1.x, r1.x, r2.y, r2.x + ishl r1.w, vThreadID.y, l(10) + ishr r1.w, r1.w, l(6) + and r1.w, r1.w, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r2.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.xz, l(20, 0, 20, 0), l(10, 0, 13, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 2, 0, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + ushr r1.w, CB0[0][0].z, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r2.xz, vThreadID.yyyy, l(5, 0, 7, 0) + and r2.xz, r2.xxzx, l(448, 0, 2048, 0) + bfi r1.w, l(23), l(9), r1.y, r2.x + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(2) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +and r1.zw, r2.xxxy, l(0, 0, 2047, 2047) +ubfe r3.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.xyxy +ieq r4.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,1025,1025), r1.zzzw +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r4.xxxy +iadd r1.zw, r3.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r4.zzzw, r1.zzzw +iadd r1.zw, r3.xxxy, r1.zzzw +ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.xyxx +ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) +movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.zw, r3.zzzw, r4.xxxy +iadd r3.zw, r3.xxxy, r3.zzzw +ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) +ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) +or r3.zw, r3.zzzw, r4.xxxy +xor r3.zw, r4.zzzw, r3.zzzw +iadd r3.xy, r3.xyxx, r3.zwzz +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r3.xz, r1.zzwz, r3.xxyx +ushr r1.zw, r2.xxxy, l(0, 0, 22, 22) +ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) +ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw +movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r4.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r4.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r3.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.zw, r2.zzzw, l(0, 0, 2047, 2047) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.zwzw +ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r4.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r4.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.zwzz +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r2.xyxx, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r2.xy, r2.xyxx, r4.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r4.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r2.zzzw, l(0, 0, 22, 22) +ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) +ieq r2.zw, r1.zzzw, l(0, 0, 512, 512) +movc r1.zw, r2.zzzw, l(0,0,513,513), r1.zzzw +movc r5.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r2.zw, r1.zzzw, l(0, 0, 6, 6) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r2.zzzw +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r2.xyz, r0.xxxx, l(1, 2, 3, 0) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +and r2.xw, r3.xxxy, l(2047, 0, 0, 2047) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy +ieq r5.xy, r2.xwxx, l(1024, 1024, 0, 0) +movc r2.xw, r5.xxxy, l(1025,0,0,1025), r2.xxxw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r5.xxxy +iadd r2.xw, r4.xxxy, r2.xxxw +ishl r5.xy, r2.xwxx, l(5, 5, 0, 0) +ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) +or r2.xw, r2.xxxw, r5.xxxy +xor r2.xw, r5.zzzw, r2.xxxw +iadd r2.xw, r4.xxxy, r2.xxxw +ubfe r4.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.xyxx +ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.zw, r4.zzzw, r5.xxxy +iadd r4.zw, r4.xxxy, r4.zzzw +ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) +ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) +or r4.zw, r4.zzzw, r5.xxxy +xor r4.zw, r5.zzzw, r4.zzzw +iadd r4.xy, r4.xyxx, r4.zwzz +ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) +or r4.xz, r2.xxwx, r4.xxyx +ushr r2.xw, r3.xxxy, l(22, 0, 0, 22) +ushr r3.xy, r2.xwxx, l(9, 9, 0, 0) +ieq r5.xy, r2.xwxx, l(512, 512, 0, 0) +movc r2.xw, r5.xxxy, l(513,0,0,513), r2.xxxw +movc r5.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r5.xxxy +iadd r2.xw, r3.xxxy, r2.xxxw +ishl r5.xy, r2.xwxx, l(6, 6, 0, 0) +ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) +or r2.xw, r2.xxxw, r5.xxxy +xor r2.xw, r5.zzzw, r2.xxxw +iadd r2.xw, r3.xxxy, r2.xxxw +or r4.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r2.xw, r3.zzzw, l(2047, 0, 0, 2047) +ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw +ieq r3.xy, r2.xwxx, l(1024, 1024, 0, 0) +movc r2.xw, r3.xxxy, l(1025,0,0,1025), r2.xxxw +movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r6.xxxy +iadd r2.xw, r5.xxxy, r2.xxxw +ishl r3.xy, r2.xwxx, l(5, 5, 0, 0) +ushr r2.xw, r2.xxxw, l(5, 0, 0, 5) +or r2.xw, r2.xxxw, r3.xxxy +xor r2.xw, r6.zzzw, r2.xxxw +iadd r2.xw, r5.xxxy, r2.xxxw +ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.zwzz +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r3.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r3.xy, r3.xyxx, r5.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r5.xz, r2.xxwx, r3.xxyx +ushr r2.xw, r3.zzzw, l(22, 0, 0, 22) +ushr r3.xy, r2.xwxx, l(9, 9, 0, 0) +ieq r3.zw, r2.xxxw, l(0, 0, 512, 512) +movc r2.xw, r3.zzzw, l(513,0,0,513), r2.xxxw +movc r6.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xw, r2.xxxw, r6.xxxy +iadd r2.xw, r3.xxxy, r2.xxxw +ishl r3.zw, r2.xxxw, l(0, 0, 6, 6) +ushr r2.xw, r2.xxxw, l(3, 0, 0, 3) +or r2.xw, r2.xxxw, r3.zzzw +xor r2.xw, r6.zzzw, r2.xxxw +iadd r2.xw, r3.xxxy, r2.xxxw +or r5.yw, r2.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +iadd r3.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyzw +iadd r1.z, r1.z, l(1) +store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyzw +ld r4.xyzw, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +and r1.zw, r4.xxxy, l(0, 0, 2047, 2047) +ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.xyxy +ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw +movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r6.xxxy +iadd r1.zw, r5.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r6.zzzw, r1.zzzw +iadd r1.zw, r5.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.xyxx +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r2.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r2.xy, r2.xyxx, r5.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r5.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r4.xxxy, l(0, 0, 22, 22) +ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) +ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw +movc r6.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r6.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r6.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.zw, r4.zzzw, l(0, 0, 2047, 2047) +ubfe r6.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.zwzw +ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw +movc r7.xyzw, r6.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r7.xxxy +iadd r1.zw, r6.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r7.zzzw, r1.zzzw +iadd r1.zw, r6.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.zwzz +ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz +movc r6.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r6.xyxx +iadd r4.xy, r2.xyxx, r4.xyxx +ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r6.xyxx +xor r4.xy, r6.zwzz, r4.xyxx +iadd r2.xy, r2.xyxx, r4.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r6.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r4.zzzw, l(0, 0, 22, 22) +ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) +ieq r4.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r4.xxxy, l(0,0,513,513), r1.zzzw +movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r4.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r4.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r4.xxxy +xor r1.zw, r4.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r6.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyzw +iadd r1.zw, r0.zzzz, r3.yyyw +store_uav_typed U0[0].xyzw, r1.zzzz, r6.xyzw +ld r2.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw +endif +and r3.xy, r2.xyxx, l(2047, 2047, 0, 0) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.xyxy +ieq r5.xy, r3.xyxx, l(1024, 1024, 0, 0) +movc r3.xy, r5.xyxx, l(1025,1025,0,0), r3.xyxx +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r5.xyxx +iadd r3.xy, r4.xyxx, r3.xyxx +ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +xor r3.xy, r5.zwzz, r3.xyxx +iadd r3.xy, r4.xyxx, r3.xyxx +ubfe r4.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.xyxx +ieq r5.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.zw, r5.xxxy, l(0,0,1025,1025), r4.zzzw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.zw, r4.zzzw, r5.xxxy +iadd r4.zw, r4.xxxy, r4.zzzw +ishl r5.xy, r4.zwzz, l(5, 5, 0, 0) +ushr r4.zw, r4.zzzw, l(0, 0, 5, 5) +or r4.zw, r4.zzzw, r5.xxxy +xor r4.zw, r5.zzzw, r4.zzzw +iadd r4.xy, r4.xyxx, r4.zwzz +ishl r4.xy, r4.xyxx, l(16, 16, 0, 0) +or r4.xz, r3.xxyx, r4.xxyx +ushr r2.xy, r2.xyxx, l(22, 22, 0, 0) +ushr r3.xy, r2.xyxx, l(9, 9, 0, 0) +ieq r5.xy, r2.xyxx, l(512, 512, 0, 0) +movc r2.xy, r5.xyxx, l(513,513,0,0), r2.xyxx +movc r5.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r5.xyxx +iadd r2.xy, r3.xyxx, r2.xyxx +ishl r5.xy, r2.xyxx, l(6, 6, 0, 0) +ushr r2.xy, r2.xyxx, l(3, 3, 0, 0) +or r2.xy, r2.xyxx, r5.xyxx +xor r2.xy, r5.zwzz, r2.xyxx +iadd r2.xy, r3.xyxx, r2.xyxx +or r4.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +and r2.xy, r2.zwzz, l(2047, 2047, 0, 0) +ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.zwzw +ieq r3.xy, r2.xyxx, l(1024, 1024, 0, 0) +movc r2.xy, r3.xyxx, l(1025,1025,0,0), r2.xyxx +movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r6.xyxx +iadd r2.xy, r5.xyxx, r2.xyxx +ishl r3.xy, r2.xyxx, l(5, 5, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +or r2.xy, r2.xyxx, r3.xyxx +xor r2.xy, r6.zwzz, r2.xyxx +iadd r2.xy, r5.xyxx, r2.xyxx +ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.zwzz +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r3.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r3.xy, r3.xyxx, r5.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r5.xz, r2.xxyx, r3.xxyx +ushr r2.xy, r2.zwzz, l(22, 22, 0, 0) +ushr r2.zw, r2.xxxy, l(0, 0, 9, 9) +ieq r3.xy, r2.xyxx, l(512, 512, 0, 0) +movc r2.xy, r3.xyxx, l(513,513,0,0), r2.xyxx +movc r6.xyzw, r2.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r6.xyxx +iadd r2.xy, r2.zwzz, r2.xyxx +ishl r3.xy, r2.xyxx, l(6, 6, 0, 0) +ushr r2.xy, r2.xyxx, l(3, 3, 0, 0) +or r2.xy, r2.xyxx, r3.xyxx +xor r2.xy, r6.zwzz, r2.xyxx +iadd r2.xy, r2.zwzz, r2.xyxx +or r5.yw, r2.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyzw +iadd r2.xy, r1.zwzz, l(1, 1, 0, 0) +store_uav_typed U0[0].xyzw, r2.xxxx, r5.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(8) +else + iadd r0.w, r0.x, l(4) +endif +ld r4.xyzw, r0.wwww, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +and r2.xz, r4.xxyx, l(2047, 0, 2047, 0) +ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.xyxy +ieq r3.xy, r2.xzxx, l(1024, 1024, 0, 0) +movc r2.xz, r3.xxyx, l(1025,0,1025,0), r2.xxzx +movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r6.xxyx +iadd r2.xz, r5.xxyx, r2.xxzx +ishl r3.xy, r2.xzxx, l(5, 5, 0, 0) +ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) +or r2.xz, r2.xxzx, r3.xxyx +xor r2.xz, r6.zzwz, r2.xxzx +iadd r2.xz, r5.xxyx, r2.xxzx +ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.xyxx +ieq r5.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r5.xy, r5.xyxx, l(1025,1025,0,0), r5.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r5.xy, r5.xyxx, r6.xyxx +iadd r5.xy, r3.xyxx, r5.xyxx +ishl r5.zw, r5.xxxy, l(0, 0, 5, 5) +ushr r5.xy, r5.xyxx, l(5, 5, 0, 0) +or r5.xy, r5.xyxx, r5.zwzz +xor r5.xy, r6.zwzz, r5.xyxx +iadd r3.xy, r3.xyxx, r5.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r5.xz, r2.xxzx, r3.xxyx +ushr r2.xz, r4.xxyx, l(22, 0, 22, 0) +ushr r3.xy, r2.xzxx, l(9, 9, 0, 0) +ieq r4.xy, r2.xzxx, l(512, 512, 0, 0) +movc r2.xz, r4.xxyx, l(513,0,513,0), r2.xxzx +movc r6.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r6.xxyx +iadd r2.xz, r3.xxyx, r2.xxzx +ishl r4.xy, r2.xzxx, l(6, 6, 0, 0) +ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) +or r2.xz, r2.xxzx, r4.xxyx +xor r2.xz, r6.zzwz, r2.xxzx +iadd r2.xz, r3.xxyx, r2.xxzx +or r5.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +and r2.xz, r4.zzwz, l(2047, 0, 2047, 0) +ubfe r6.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r4.zwzw +ieq r3.xy, r2.xzxx, l(1024, 1024, 0, 0) +movc r2.xz, r3.xxyx, l(1025,0,1025,0), r2.xxzx +movc r7.xyzw, r6.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r7.xxyx +iadd r2.xz, r6.xxyx, r2.xxzx +ishl r3.xy, r2.xzxx, l(5, 5, 0, 0) +ushr r2.xz, r2.xxzx, l(5, 0, 5, 0) +or r2.xz, r2.xxzx, r3.xxyx +xor r2.xz, r7.zzwz, r2.xxzx +iadd r2.xz, r6.xxyx, r2.xxzx +ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r4.zwzz +ieq r4.xy, r6.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r6.zwzz +movc r6.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r6.xyxx +iadd r4.xy, r3.xyxx, r4.xyxx +ishl r6.xy, r4.xyxx, l(5, 5, 0, 0) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r6.xyxx +xor r4.xy, r6.zwzz, r4.xyxx +iadd r3.xy, r3.xyxx, r4.xyxx +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r6.xz, r2.xxzx, r3.xxyx +ushr r2.xz, r4.zzwz, l(22, 0, 22, 0) +ushr r3.xy, r2.xzxx, l(9, 9, 0, 0) +ieq r4.xy, r2.xzxx, l(512, 512, 0, 0) +movc r2.xz, r4.xxyx, l(513,0,513,0), r2.xxzx +movc r4.xyzw, r3.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xz, r2.xxzx, r4.xxyx +iadd r2.xz, r3.xxyx, r2.xxzx +ishl r4.xy, r2.xzxx, l(6, 6, 0, 0) +ushr r2.xz, r2.xxzx, l(3, 0, 3, 0) +or r2.xz, r2.xxzx, r4.xxyx +xor r2.xz, r4.zzwz, r2.xxzx +iadd r2.xz, r3.xxyx, r2.xxzx +or r6.yw, r2.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r3.wwww, r5.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r6.xyzw +iadd r2.xzw, r0.wwww, l(1, 0, 2, 3) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +and r0.xw, r3.xxxy, l(2047, 0, 0, 2047) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy +ieq r1.zw, r0.xxxw, l(0, 0, 1024, 1024) +movc r0.xw, r1.zzzw, l(1025,0,0,1025), r0.xxxw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r5.xxxy +iadd r0.xw, r4.xxxy, r0.xxxw +ishl r1.zw, r0.xxxw, l(0, 0, 5, 5) +ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) +or r0.xw, r0.xxxw, r1.zzzw +xor r0.xw, r5.zzzw, r0.xxxw +iadd r0.xw, r4.xxxy, r0.xxxw +ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 21, 21), r3.xxxy +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r1.zwzz, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r1.zw, r1.zzzw, r4.xxxy +ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) +or r4.xz, r0.xxwx, r1.zzwz +ushr r0.xw, r3.xxxy, l(22, 0, 0, 22) +ushr r1.zw, r0.xxxw, l(0, 0, 9, 9) +ieq r3.xy, r0.xwxx, l(512, 512, 0, 0) +movc r0.xw, r3.xxxy, l(513,0,0,513), r0.xxxw +movc r5.xyzw, r1.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r5.xxxy +iadd r0.xw, r1.zzzw, r0.xxxw +ishl r3.xy, r0.xwxx, l(6, 6, 0, 0) +ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) +or r0.xw, r0.xxxw, r3.xxxy +xor r0.xw, r5.zzzw, r0.xxxw +iadd r0.xw, r1.zzzw, r0.xxxw +or r4.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r0.xw, r3.zzzw, l(2047, 0, 0, 2047) +ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw +ieq r1.zw, r0.xxxw, l(0, 0, 1024, 1024) +movc r0.xw, r1.zzzw, l(1025,0,0,1025), r0.xxxw +movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r6.xxxy +iadd r0.xw, r5.xxxy, r0.xxxw +ishl r1.zw, r0.xxxw, l(0, 0, 5, 5) +ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) +or r0.xw, r0.xxxw, r1.zzzw +xor r0.xw, r6.zzzw, r0.xxxw +iadd r0.xw, r5.xxxy, r0.xxxw +ubfe r1.zw, l(0, 0, 1, 1), l(0, 0, 21, 21), r3.zzzw +ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz +movc r5.xyzw, r1.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r5.xyxx +iadd r3.xy, r1.zwzz, r3.xyxx +ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +xor r3.xy, r5.zwzz, r3.xyxx +iadd r1.zw, r1.zzzw, r3.xxxy +ishl r1.zw, r1.zzzw, l(0, 0, 16, 16) +or r5.xz, r0.xxwx, r1.zzwz +ushr r0.xw, r3.zzzw, l(22, 0, 0, 22) +ushr r1.zw, r0.xxxw, l(0, 0, 9, 9) +ieq r3.xy, r0.xwxx, l(512, 512, 0, 0) +movc r0.xw, r3.xxxy, l(513,0,0,513), r0.xxxw +movc r3.xyzw, r1.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xw, r0.xxxw, r3.xxxy +iadd r0.xw, r1.zzzw, r0.xxxw +ishl r3.xy, r0.xwxx, l(6, 6, 0, 0) +ushr r0.xw, r0.xxxw, l(3, 0, 0, 3) +or r0.xw, r0.xxxw, r3.xxxy +xor r0.xw, r3.zzzw, r0.xxxw +iadd r0.xw, r1.zzzw, r0.xxxw +or r5.yw, r0.xxxw, l(0, 0x7fff0000, 0, 0x7fff0000) +iadd r0.xyw, r0.yyyy, l(5, 6, 0, 7) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r5.xyzw +ld r3.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +and r1.zw, r3.xxxy, l(0, 0, 2047, 2047) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy +ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r4.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r4.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.xyxx +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r2.xyxx, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r2.xy, r2.xyxx, r4.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r4.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r3.xxxy, l(0, 0, 22, 22) +ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) +ieq r3.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r3.xxxy, l(0,0,513,513), r1.zzzw +movc r5.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r5.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r3.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r3.xxxy +xor r1.zw, r5.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r4.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.zw, r3.zzzw, l(0, 0, 2047, 2047) +ubfe r5.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw +ieq r2.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r2.xxxy, l(0,0,1025,1025), r1.zzzw +movc r6.xyzw, r5.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r6.xxxy +iadd r1.zw, r5.xxxy, r1.zzzw +ishl r2.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r2.xxxy +xor r1.zw, r6.zzzw, r1.zzzw +iadd r1.zw, r5.xxxy, r1.zzzw +ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r3.zwzz +ieq r3.xy, r5.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r5.zwzz +movc r5.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r5.xyxx +iadd r3.xy, r2.xyxx, r3.xyxx +ishl r5.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r5.xyxx +xor r3.xy, r5.zwzz, r3.xyxx +iadd r2.xy, r2.xyxx, r3.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r5.xz, r1.zzwz, r2.xxyx +ushr r1.zw, r3.zzzw, l(0, 0, 22, 22) +ushr r2.xy, r1.zwzz, l(9, 9, 0, 0) +ieq r3.xy, r1.zwzz, l(512, 512, 0, 0) +movc r1.zw, r3.xxxy, l(0,0,513,513), r1.zzzw +movc r3.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r3.xxxy +iadd r1.zw, r2.xxxy, r1.zzzw +ishl r3.xy, r1.zwzz, l(6, 6, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 3, 3) +or r1.zw, r1.zzzw, r3.xxxy +xor r1.zw, r3.zzzw, r1.zzzw +iadd r1.zw, r2.xxxy, r1.zzzw +or r5.yw, r1.zzzw, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r0.x, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r5.xyzw +ld r2.xyzw, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +and r0.yz, r2.xxyx, l(0, 2047, 2047, 0) +ubfe r1.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.xyxy +ieq r3.xy, r0.yzyy, l(1024, 1024, 0, 0) +movc r0.yz, r3.xxyx, l(0,1025,1025,0), r0.yyzy +movc r3.xyzw, r1.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r3.xxyx +iadd r0.yz, r1.xxyx, r0.yyzy +ishl r3.xy, r0.yzyy, l(5, 5, 0, 0) +ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) +or r0.yz, r0.yyzy, r3.xxyx +xor r0.yz, r3.zzwz, r0.yyzy +iadd r0.yz, r1.xxyx, r0.yyzy +ubfe r1.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.xyxx +ieq r3.xy, r1.zwzz, l(1024, 1024, 0, 0) +movc r1.zw, r3.xxxy, l(0,0,1025,1025), r1.zzzw +movc r3.xyzw, r1.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.zw, r1.zzzw, r3.xxxy +iadd r1.zw, r1.xxxy, r1.zzzw +ishl r3.xy, r1.zwzz, l(5, 5, 0, 0) +ushr r1.zw, r1.zzzw, l(0, 0, 5, 5) +or r1.zw, r1.zzzw, r3.xxxy +xor r1.zw, r3.zzzw, r1.zzzw +iadd r1.xy, r1.xyxx, r1.zwzz +ishl r1.xy, r1.xyxx, l(16, 16, 0, 0) +or r1.xz, r0.yyzy, r1.xxyx +ushr r0.yz, r2.xxyx, l(0, 22, 22, 0) +ushr r2.xy, r0.yzyy, l(9, 9, 0, 0) +ieq r3.xy, r0.yzyy, l(512, 512, 0, 0) +movc r0.yz, r3.xxyx, l(0,513,513,0), r0.yyzy +movc r3.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r3.xxyx +iadd r0.yz, r2.xxyx, r0.yyzy +ishl r3.xy, r0.yzyy, l(6, 6, 0, 0) +ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) +or r0.yz, r0.yyzy, r3.xxyx +xor r0.yz, r3.zzwz, r0.yyzy +iadd r0.yz, r2.xxyx, r0.yyzy +or r1.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) +and r0.yz, r2.zzwz, l(0, 2047, 2047, 0) +ubfe r3.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r2.zwzw +ieq r2.xy, r0.yzyy, l(1024, 1024, 0, 0) +movc r0.yz, r2.xxyx, l(0,1025,1025,0), r0.yyzy +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r4.xxyx +iadd r0.yz, r3.xxyx, r0.yyzy +ishl r2.xy, r0.yzyy, l(5, 5, 0, 0) +ushr r0.yz, r0.yyzy, l(0, 5, 5, 0) +or r0.yz, r0.yyzy, r2.xxyx +xor r0.yz, r4.zzwz, r0.yyzy +iadd r0.yz, r3.xxyx, r0.yyzy +ubfe r2.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r2.zwzz +ieq r3.xy, r3.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r3.zwzz +movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r4.xyxx +iadd r3.xy, r2.xyxx, r3.xyxx +ishl r3.zw, r3.xxxy, l(0, 0, 5, 5) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r3.zwzz +xor r3.xy, r4.zwzz, r3.xyxx +iadd r2.xy, r2.xyxx, r3.xyxx +ishl r2.xy, r2.xyxx, l(16, 16, 0, 0) +or r3.xz, r0.yyzy, r2.xxyx +ushr r0.yz, r2.zzwz, l(0, 22, 22, 0) +ushr r2.xy, r0.yzyy, l(9, 9, 0, 0) +ieq r2.zw, r0.yyyz, l(0, 0, 512, 512) +movc r0.yz, r2.zzwz, l(0,513,513,0), r0.yyzy +movc r4.xyzw, r2.xyxy, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.yz, r0.yyzy, r4.xxyx +iadd r0.yz, r2.xxyx, r0.yyzy +ishl r2.zw, r0.yyyz, l(0, 0, 6, 6) +ushr r0.yz, r0.yyzy, l(0, 3, 3, 0) +or r0.yz, r0.yyzy, r2.zzwz +xor r0.yz, r4.zzwz, r0.yyzy +iadd r0.yz, r2.xxyx, r0.yyzy +or r3.yw, r0.yyyz, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.x, l(1) +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +ret +// Approximately 812 instruction slots used +#endif + +const BYTE texture_load_r11g11b10_rgba16_snorm_2x_cs[] = +{ + 68, 88, 66, 67, 211, 143, + 151, 194, 198, 114, 148, 137, + 224, 171, 65, 185, 178, 121, + 241, 235, 1, 0, 0, 0, + 72, 121, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 172, 120, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 108, 116, + 0, 0, 81, 0, 5, 0, + 27, 29, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 156, 8, + 0, 7, 70, 238, 49, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 68, 68, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 2, + 114, 0, 2, 0, 104, 0, + 0, 2, 8, 0, 0, 0, + 155, 0, 0, 4, 4, 0, + 0, 0, 32, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 1, 64, 0, 0, + 3, 0, 0, 0, 54, 0, + 0, 4, 98, 0, 16, 0, + 0, 0, 0, 0, 86, 6, + 2, 0, 80, 0, 0, 9, + 114, 0, 16, 0, 1, 0, + 0, 0, 70, 2, 16, 0, + 0, 0, 0, 0, 70, 130, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 60, 0, 0, 7, + 66, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 60, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 10, 98, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 41, 0, + 0, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 26, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, + 16, 0, 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0, 0, 0, + 0, 0, 6, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 44, 3, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 11, 1, 0, 0, + 64, 1, 0, 0, 5, 0, + 0, 0, 20, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 96, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 16, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_3x_cs.h new file mode 100644 index 000000000..0d7fba811 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_3x_cs.h @@ -0,0 +1,5417 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) +imul null, r0.w, r0.w, CB0[0][1].y +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(4, 0, 0, 2), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +and r0.w, r1.x, l(2047) +ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r2.x, r0.w, l(1024) +movc r0.w, r2.x, l(1025), r0.w +movc r5.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r5.x +iadd r0.w, r4.x, r0.w +ishl r2.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r2.x +xor r0.w, r5.y, r0.w +iadd r0.w, r4.x, r0.w +ieq r2.x, r4.y, l(1024) +movc r2.x, r2.x, l(1025), r4.y +xor r2.x, r5.z, r2.x +iadd r2.x, r4.z, r2.x +ishl r3.z, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r3.z +xor r2.x, r5.w, r2.x +iadd r2.x, r4.z, r2.x +ishl r2.x, r2.x, l(16) +or r4.xzw, r0.wwww, r2.xxxx +ushr r0.w, r1.x, l(22) +ushr r1.x, r0.w, l(9) +ieq r2.x, r0.w, l(512) +movc r0.w, r2.x, l(513), r0.w +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r3.z +iadd r0.w, r1.x, r0.w +ishl r2.x, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r2.x +xor r0.w, r3.w, r0.w +iadd r0.w, r1.x, r0.w +or r4.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) +and r0.w, r1.y, l(2047) +ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r1.x, r0.w, l(1024) +movc r0.w, r1.x, l(1025), r0.w +movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r6.x +iadd r0.w, r5.x, r0.w +ishl r1.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r1.x +xor r0.w, r6.y, r0.w +iadd r0.w, r5.x, r0.w +ieq r1.x, r5.y, l(1024) +movc r1.x, r1.x, l(1025), r5.y +xor r1.x, r6.z, r1.x +iadd r1.x, r5.z, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r6.w, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.x, r1.x, l(16) +or r5.xzw, r0.wwww, r1.xxxx +ushr r0.w, r1.y, l(22) +ushr r1.x, r0.w, l(9) +ieq r1.y, r0.w, l(512) +movc r0.w, r1.y, l(513), r0.w +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r3.z +iadd r0.w, r1.x, r0.w +ishl r1.y, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r1.y +xor r0.w, r3.w, r0.w +iadd r0.w, r1.x, r0.w +or r5.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +and r0.w, r1.z, l(2047) +ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.x, r0.w, l(1024) +movc r0.w, r1.x, l(1025), r0.w +movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r6.x +iadd r0.w, r5.x, r0.w +ishl r1.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r1.x +xor r0.w, r6.y, r0.w +iadd r0.w, r5.x, r0.w +ieq r1.x, r5.y, l(1024) +movc r1.x, r1.x, l(1025), r5.y +xor r1.x, r6.z, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.w, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.x, r1.x, l(16) +or r5.xzw, r0.wwww, r1.xxxx +ushr r0.w, r1.z, l(22) +ushr r1.x, r0.w, l(9) +ieq r1.y, r0.w, l(512) +movc r0.w, r1.y, l(513), r0.w +movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r0.w, r0.w, r1.y +iadd r0.w, r1.x, r0.w +ishl r1.y, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r1.y +xor r0.w, r1.z, r0.w +iadd r0.w, r1.x, r0.w +or r5.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r0.w, r0.z, r0.y +and r1.x, r1.w, l(2047) +ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r5.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.y, r1.x +ieq r1.y, r5.y, l(1024) +movc r1.y, r1.y, l(1025), r5.y +xor r1.y, r6.z, r1.y +iadd r1.xy, r5.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r6.w, r1.y +iadd r1.y, r5.z, r1.y +ishl r1.y, r1.y, l(16) +or r5.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r5.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw +endif +iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) +and r2.x, r1.x, l(2047) +ubfe r6.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r2.y, r2.x, l(1024) +movc r2.x, r2.y, l(1025), r2.x +movc r7.xyzw, r6.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r2.x, r2.x, r7.x +iadd r2.x, r6.x, r2.x +ishl r2.y, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r2.y +xor r2.x, r7.y, r2.x +ieq r2.y, r6.y, l(1024) +movc r2.y, r2.y, l(1025), r6.y +xor r2.y, r7.z, r2.y +iadd r2.xy, r6.xzxx, r2.xyxx +ishl r2.z, r2.y, l(5) +ushr r2.y, r2.y, l(5) +or r2.y, r2.y, r2.z +xor r2.y, r7.w, r2.y +iadd r2.y, r6.z, r2.y +ishl r2.y, r2.y, l(16) +or r6.xzw, r2.yyyy, r2.xxxx +ushr r1.x, r1.x, l(22) +ushr r2.x, r1.x, l(9) +ieq r2.y, r1.x, l(512) +movc r1.x, r2.y, l(513), r1.x +movc r2.yz, r2.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r1.x, r1.x, r2.y +iadd r1.x, r2.x, r1.x +ishl r2.y, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r2.y +xor r1.x, r2.z, r1.x +iadd r1.x, r2.x, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw +and r1.x, r1.y, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r3.z, r1.x, l(1024) +movc r1.x, r3.z, l(1025), r1.x +movc r6.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r2.x, r1.x +ishl r3.z, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r3.z +xor r1.x, r6.y, r1.x +iadd r1.x, r2.x, r1.x +ieq r2.x, r2.y, l(1024) +movc r2.x, r2.x, l(1025), r2.y +xor r2.x, r6.z, r2.x +iadd r2.x, r2.z, r2.x +ishl r2.y, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r2.y +xor r2.x, r6.w, r2.x +iadd r2.x, r2.z, r2.x +ishl r2.x, r2.x, l(16) +or r6.xzw, r1.xxxx, r2.xxxx +ushr r1.x, r1.y, l(22) +ushr r1.y, r1.x, l(9) +ieq r2.x, r1.x, l(512) +movc r1.x, r2.x, l(513), r1.x +movc r2.xy, r1.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r1.x, r1.x, r2.x +iadd r1.x, r1.y, r1.x +ishl r2.x, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r2.x +xor r1.x, r2.y, r1.x +iadd r1.x, r1.y, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +and r1.x, r1.z, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r6.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r2.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.y, r1.x +ieq r1.y, r2.y, l(1024) +movc r1.y, r1.y, l(1025), r2.y +xor r1.y, r6.z, r1.y +iadd r1.xy, r2.xzxx, r1.xyxx +ishl r2.x, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r2.x +xor r1.y, r6.w, r1.y +iadd r1.y, r2.z, r1.y +ishl r1.y, r1.y, l(16) +or r6.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.z, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r2.xy, r1.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r1.x, r1.x, r2.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r2.y, r1.x +iadd r1.x, r1.y, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw +iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) +and r1.x, r1.w, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r7.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r7.x +iadd r1.x, r2.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.y, r1.x +ieq r1.y, r2.y, l(1024) +movc r1.y, r1.y, l(1025), r2.y +xor r1.y, r7.z, r1.y +iadd r1.xy, r2.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r7.w, r1.y +iadd r1.y, r2.z, r1.y +ishl r1.y, r1.y, l(16) +or r7.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r7.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r1.zw, r2.xxxx, T0[0].zwxy +if_nz r3.x + ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw +endif +and r0.x, r1.x, l(2047) +ubfe r7.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r2.x, r0.x, l(1024) +movc r0.x, r2.x, l(1025), r0.x +movc r8.xyzw, r7.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r8.x +iadd r0.x, r7.x, r0.x +ishl r2.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r2.x +xor r0.x, r8.y, r0.x +iadd r0.x, r7.x, r0.x +ieq r2.x, r7.y, l(1024) +movc r2.x, r2.x, l(1025), r7.y +xor r2.x, r8.z, r2.x +iadd r2.x, r7.z, r2.x +ishl r3.z, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r3.z +xor r2.x, r8.w, r2.x +iadd r2.x, r7.z, r2.x +ishl r2.x, r2.x, l(16) +or r7.xzw, r0.xxxx, r2.xxxx +ushr r0.x, r1.x, l(22) +ushr r1.x, r0.x, l(9) +ieq r2.x, r0.x, l(512) +movc r0.x, r2.x, l(513), r0.x +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r3.z +iadd r0.x, r1.x, r0.x +ishl r2.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r2.x +xor r0.x, r3.w, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +and r0.x, r1.y, l(2047) +ubfe r7.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r1.x, r0.x, l(1024) +movc r0.x, r1.x, l(1025), r0.x +movc r8.xyzw, r7.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r8.x +iadd r0.x, r7.x, r0.x +ishl r1.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.x +xor r0.x, r8.y, r0.x +iadd r0.x, r7.x, r0.x +ieq r1.x, r7.y, l(1024) +movc r1.x, r1.x, l(1025), r7.y +xor r1.x, r8.z, r1.x +iadd r1.x, r7.z, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r8.w, r1.x +iadd r1.x, r7.z, r1.x +ishl r1.x, r1.x, l(16) +or r7.xzw, r0.xxxx, r1.xxxx +ushr r0.x, r1.y, l(22) +ushr r1.x, r0.x, l(9) +ieq r1.y, r0.x, l(512) +movc r0.x, r1.y, l(513), r0.x +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r3.z +iadd r0.x, r1.x, r0.x +ishl r1.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.y +xor r0.x, r3.w, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw +and r0.x, r1.z, l(2047) +ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.x, r0.x, l(1024) +movc r0.x, r1.x, l(1025), r0.x +movc r7.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r7.x +iadd r0.x, r4.x, r0.x +ishl r1.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.x +xor r0.x, r7.y, r0.x +iadd r0.x, r4.x, r0.x +ieq r1.x, r4.y, l(1024) +movc r1.x, r1.x, l(1025), r4.y +xor r1.x, r7.z, r1.x +iadd r1.x, r4.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.w, r1.x +iadd r1.x, r4.z, r1.x +ishl r1.x, r1.x, l(16) +or r7.xzw, r0.xxxx, r1.xxxx +ushr r0.x, r1.z, l(22) +ushr r1.x, r0.x, l(9) +ieq r1.y, r0.x, l(512) +movc r0.x, r1.y, l(513), r0.x +movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r0.x, r0.x, r1.y +iadd r0.x, r1.x, r0.x +ishl r1.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.y +xor r0.x, r1.z, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw +iadd r0.x, r0.y, l(5) +and r1.x, r1.w, l(2047) +ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r7.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r7.x +iadd r1.x, r4.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.y, r1.x +ieq r1.y, r4.y, l(1024) +movc r1.y, r1.y, l(1025), r4.y +xor r1.y, r7.z, r1.y +iadd r1.xy, r4.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r7.w, r1.y +iadd r1.y, r4.z, r1.y +ishl r1.y, r1.y, l(16) +or r4.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r4.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +and r0.x, r1.x, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r0.y, r0.x, l(1024) +movc r0.x, r0.y, l(1025), r0.x +movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r2.x, r0.x +ishl r0.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r2.y, l(1024) +movc r0.y, r0.y, l(1025), r2.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r2.xzxx, r0.xyxx +ishl r2.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r2.x +xor r0.y, r4.w, r0.y +iadd r0.y, r2.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.x, l(22) +ushr r0.y, r0.x, l(9) +ieq r1.x, r0.x, l(512) +movc r0.x, r1.x, l(513), r0.x +movc r2.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r2.x +iadd r0.x, r0.y, r0.x +ishl r1.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.x +xor r0.x, r2.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw +and r0.x, r1.y, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r0.y, r0.x, l(1024) +movc r0.x, r0.y, l(1025), r0.x +movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r2.x, r0.x +ishl r0.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r2.y, l(1024) +movc r0.y, r0.y, l(1025), r2.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r2.xzxx, r0.xyxx +ishl r1.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r1.x +xor r0.y, r4.w, r0.y +iadd r0.y, r2.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.y, l(22) +ushr r0.y, r0.x, l(9) +ieq r1.x, r0.x, l(512) +movc r0.x, r1.x, l(513), r0.x +movc r1.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r1.x +iadd r0.x, r0.y, r0.x +ishl r1.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.x +xor r0.x, r1.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +iadd r0.x, r0.w, l(5) +and r0.y, r1.z, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.x, r0.y, l(1024) +movc r0.y, r1.x, l(1025), r0.y +movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.y, r0.y, r4.x +iadd r0.y, r2.x, r0.y +ishl r1.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r1.x +xor r0.y, r4.y, r0.y +iadd r0.y, r2.x, r0.y +ieq r1.x, r2.y, l(1024) +movc r1.x, r1.x, l(1025), r2.y +xor r1.x, r4.z, r1.x +iadd r1.x, r2.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r4.w, r1.x +iadd r1.x, r2.z, r1.x +ishl r1.x, r1.x, l(16) +or r4.xzw, r0.yyyy, r1.xxxx +ushr r0.y, r1.z, l(22) +ushr r1.x, r0.y, l(9) +ieq r1.y, r0.y, l(512) +movc r0.y, r1.y, l(513), r0.y +movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r0.y, r0.y, r1.y +iadd r0.y, r1.x, r0.y +ishl r1.y, r0.y, l(6) +ushr r0.y, r0.y, l(3) +or r0.y, r0.y, r1.y +xor r0.y, r1.z, r0.y +iadd r0.y, r1.x, r0.y +or r4.y, r0.y, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +and r0.x, r1.w, l(2047) +ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r0.y, r0.x, l(1024) +movc r0.x, r0.y, l(1025), r0.x +movc r4.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r1.x, r0.x +ishl r0.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r1.y, l(1024) +movc r0.y, r0.y, l(1025), r1.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r1.xzxx, r0.xyxx +ishl r0.w, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r0.w +xor r0.y, r4.w, r0.y +iadd r0.y, r1.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.w, l(22) +ushr r0.y, r0.x, l(9) +ieq r0.w, r0.x, l(512) +movc r0.x, r0.w, l(513), r0.x +movc r1.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r1.x +iadd r0.x, r0.y, r0.x +ishl r0.w, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r0.w +xor r0.x, r1.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.zzzz, r4.xyzw +ld r0.xy, r2.wwww, T0[0].xyzw +if_nz r3.x + ishl r1.xy, r0.xyxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxy, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xy, r1.zwzz, r1.xyxx +endif +if_nz r3.y + ushr r1.xy, r0.xyxx, l(16, 16, 0, 0) + bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.xyxx +endif +and r0.w, r0.x, l(2047) +ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r0.xxxx +ieq r1.w, r0.w, l(1024) +movc r0.w, r1.w, l(1025), r0.w +movc r2.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r2.x +iadd r0.w, r1.x, r0.w +ishl r1.w, r0.w, l(5) +ushr r0.xw, r0.xxxw, l(22, 0, 0, 5) +or r0.w, r0.w, r1.w +xor r0.w, r2.y, r0.w +iadd r0.w, r1.x, r0.w +ieq r1.x, r1.y, l(1024) +movc r1.x, r1.x, l(1025), r1.y +xor r1.x, r2.z, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r2.w, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.x, r1.x, l(16) +or r1.xzw, r0.wwww, r1.xxxx +ushr r0.w, r0.x, l(9) +ieq r2.x, r0.x, l(512) +movc r0.x, r2.x, l(513), r0.x +movc r2.xy, r0.wwww, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r2.x +iadd r0.x, r0.w, r0.x +ishl r2.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r2.x +xor r0.x, r2.y, r0.x +iadd r0.x, r0.w, r0.x +or r1.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.wwww, r1.xyzw +iadd r0.x, r0.z, l(5) +and r0.w, r0.y, l(2047) +ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r0.yyyy +ieq r1.w, r0.w, l(1024) +movc r0.w, r1.w, l(1025), r0.w +movc r2.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r2.x +iadd r0.w, r1.x, r0.w +ishl r1.w, r0.w, l(5) +ushr r0.yw, r0.yyyw, l(0, 22, 0, 5) +or r0.w, r0.w, r1.w +xor r0.w, r2.y, r0.w +iadd r0.w, r1.x, r0.w +ieq r1.x, r1.y, l(1024) +movc r1.x, r1.x, l(1025), r1.y +xor r1.x, r2.z, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r2.w, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.x, r1.x, l(16) +or r1.xzw, r0.wwww, r1.xxxx +ushr r0.w, r0.y, l(9) +ieq r2.x, r0.y, l(512) +movc r0.y, r2.x, l(513), r0.y +movc r2.xy, r0.wwww, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.y, r0.y, r2.x +iadd r0.y, r0.w, r0.y +ishl r2.x, r0.y, l(6) +ushr r0.y, r0.y, l(3) +or r0.y, r0.y, r2.x +xor r0.y, r2.y, r0.y +iadd r0.y, r0.w, r0.y +or r1.y, r0.y, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ret +// Approximately 815 instruction slots used +#endif + +const BYTE texture_load_r11g11b10_rgba16_snorm_3x_cs[] = +{ + 68, 88, 66, 67, 48, 30, + 235, 206, 15, 178, 238, 214, + 119, 4, 239, 2, 45, 201, + 33, 234, 1, 0, 0, 0, + 132, 106, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 232, 105, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 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105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 168, 101, + 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a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_cs.h new file mode 100644 index 000000000..0440a1a96 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r11g11b10_rgba16_snorm_cs.h @@ -0,0 +1,2091 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 6 +dcl_thread_group 4, 32, 1 +ishl r0.x, vThreadID.x, l(3) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(3) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +and r0.z, CB0[0][0].x, l(1) +if_nz r0.z + and r0.w, CB0[0][0].x, l(2) + if_nz r0.w + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r0.w, r1.y, r2.x, r1.x + ibfe r1.xw, l(27, 0, 0, 29), l(2, 0, 0, 0), vThreadID.xxxx + imad r0.w, r0.w, r2.y, r1.x + ishl r1.x, vThreadID.y, l(10) + ishr r1.x, r1.x, l(6) + and r1.x, r1.x, l(96) + iadd r1.y, r1.y, r1.z + bfi r1.z, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + bfi r1.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r0.wwww, l(0, 0, 0, 0) + imad r1.xz, r1.xxxx, l(2, 0, 16, 0), r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + bfi r0.w, l(1), l(4), vThreadID.y, l(0) + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.y, r1.w, l(32), r1.y + imad r1.y, r2.x, l(4), r1.y + bfi r1.xz, l(6, 0, 6, 0), l(0, 0, 3, 0), r0.wwww, r1.xxzx + bfi r0.w, l(9), l(3), r1.y, r1.z + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(2, 0, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(5, 7, 0, 0) + and r2.xy, r2.xyxx, l(448, 2048, 0, 0) + bfi r1.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, l(0) + iadd r1.z, r1.z, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r2.xxwx + bfi r1.x, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.x, r1.x, r2.x + and r1.w, r1.w, l(2) + iadd r1.y, r1.y, r1.w + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r1.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + imad r1.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r0.w, r1.x, CB0[0][0].z, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r0.w, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r2.y + ushr r3.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw +endif +and r2.zw, r1.xxxy, l(0, 0, 2047, 2047) +ubfe r3.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r1.xyxy +ieq r4.xy, r2.zwzz, l(1024, 1024, 0, 0) +movc r2.zw, r4.xxxy, l(0,0,1025,1025), r2.zzzw +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.zw, r2.zzzw, r4.xxxy +iadd r2.zw, r3.xxxy, r2.zzzw +ishl r4.xy, r2.zwzz, l(5, 5, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +or r2.zw, r2.zzzw, r4.xxxy +xor r2.zw, r4.zzzw, r2.zzzw +iadd r2.zw, r3.xxxy, r2.zzzw +ubfe r3.xy, l(1, 1, 0, 0), l(21, 21, 0, 0), r1.xyxx +ieq r4.xy, r3.zwzz, l(1024, 1024, 0, 0) +movc r3.zw, r4.xxxy, l(0,0,1025,1025), r3.zzzw +movc r4.xyzw, r3.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.zw, r3.zzzw, r4.xxxy +iadd r3.zw, r3.xxxy, r3.zzzw +ishl r4.xy, r3.zwzz, l(5, 5, 0, 0) +ushr r3.zw, r3.zzzw, l(0, 0, 5, 5) +or r3.zw, r3.zzzw, r4.xxxy +xor r3.zw, r4.zzzw, r3.zzzw +iadd r3.xy, r3.xyxx, r3.zwzz +ishl r3.xy, r3.xyxx, l(16, 16, 0, 0) +or r3.xz, r2.zzwz, r3.xxyx +ushr r1.xy, r1.xyxx, l(22, 22, 0, 0) +ushr r2.zw, r1.xxxy, l(0, 0, 9, 9) +ieq r4.xy, r1.xyxx, l(512, 512, 0, 0) +movc r1.xy, r4.xyxx, l(513,513,0,0), r1.xyxx +movc r4.xyzw, r2.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.xy, r1.xyxx, r4.xyxx +iadd r1.xy, r2.zwzz, r1.xyxx +ishl r4.xy, r1.xyxx, l(6, 6, 0, 0) +ushr r1.xy, r1.xyxx, l(3, 3, 0, 0) +or r1.xy, r1.xyxx, r4.xyxx +xor r1.xy, r4.zwzz, r1.xyxx +iadd r1.xy, r2.zwzz, r1.xyxx +or r3.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +and r1.xy, r1.zwzz, l(2047, 2047, 0, 0) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r1.zwzw +ieq r2.zw, r1.xxxy, l(0, 0, 1024, 1024) +movc r1.xy, r2.zwzz, l(1025,1025,0,0), r1.xyxx +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.xy, r1.xyxx, r5.xyxx +iadd r1.xy, r4.xyxx, r1.xyxx +ishl r2.zw, r1.xxxy, l(0, 0, 5, 5) +ushr r1.xy, r1.xyxx, l(5, 5, 0, 0) +or r1.xy, r1.xyxx, r2.zwzz +xor r1.xy, r5.zwzz, r1.xyxx +iadd r1.xy, r4.xyxx, r1.xyxx +ubfe r2.zw, l(0, 0, 1, 1), l(0, 0, 21, 21), r1.zzzw +ieq r4.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r4.xy, r4.xyxx, l(1025,1025,0,0), r4.zwzz +movc r5.xyzw, r2.zwzw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r4.xy, r4.xyxx, r5.xyxx +iadd r4.xy, r2.zwzz, r4.xyxx +ishl r4.zw, r4.xxxy, l(0, 0, 5, 5) +ushr r4.xy, r4.xyxx, l(5, 5, 0, 0) +or r4.xy, r4.xyxx, r4.zwzz +xor r4.xy, r5.zwzz, r4.xyxx +iadd r2.zw, r2.zzzw, r4.xxxy +ishl r2.zw, r2.zzzw, l(0, 0, 16, 16) +or r4.xz, r1.xxyx, r2.zzwz +ushr r1.xy, r1.zwzz, l(22, 22, 0, 0) +ushr r1.zw, r1.xxxy, l(0, 0, 9, 9) +ieq r2.zw, r1.xxxy, l(0, 0, 512, 512) +movc r1.xy, r2.zwzz, l(513,513,0,0), r1.xyxx +movc r5.xyzw, r1.zwzw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r1.xy, r1.xyxx, r5.xyxx +iadd r1.xy, r1.zwzz, r1.xyxx +ishl r2.zw, r1.xxxy, l(0, 0, 6, 6) +ushr r1.xy, r1.xyxx, l(3, 3, 0, 0) +or r1.xy, r1.xyxx, r2.zwzz +xor r1.xy, r5.zwzz, r1.xyxx +iadd r1.xy, r1.zwzz, r1.xyxx +or r4.yw, r1.xxxy, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.xyz, r0.yyyy, l(1, 2, 3, 0) +store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw +movc r0.z, r0.z, l(2), l(1) +iadd r0.x, r0.z, r0.x +ld r3.xyzw, r0.xxxx, T0[0].xyzw +if_nz r2.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r2.y + ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw +endif +and r0.xz, r3.xxyx, l(2047, 0, 2047, 0) +ubfe r2.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.xyxy +ieq r1.xw, r0.xxxz, l(1024, 0, 0, 1024) +movc r0.xz, r1.xxwx, l(1025,0,1025,0), r0.xxzx +movc r4.xyzw, r2.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r4.xxyx +iadd r0.xz, r2.xxyx, r0.xxzx +ishl r1.xw, r0.xxxz, l(5, 0, 0, 5) +ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) +or r0.xz, r0.xxzx, r1.xxwx +xor r0.xz, r4.zzwz, r0.xxzx +iadd r0.xz, r2.xxyx, r0.xxzx +ubfe r1.xw, l(1, 0, 0, 1), l(21, 0, 0, 21), r3.xxxy +ieq r2.xy, r2.zwzz, l(1024, 1024, 0, 0) +movc r2.xy, r2.xyxx, l(1025,1025,0,0), r2.zwzz +movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r2.xy, r2.xyxx, r4.xyxx +iadd r2.xy, r1.xwxx, r2.xyxx +ishl r2.zw, r2.xxxy, l(0, 0, 5, 5) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +or r2.xy, r2.xyxx, r2.zwzz +xor r2.xy, r4.zwzz, r2.xyxx +iadd r1.xw, r1.xxxw, r2.xxxy +ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) +or r2.xz, r0.xxzx, r1.xxwx +ushr r0.xz, r3.xxyx, l(22, 0, 22, 0) +ushr r1.xw, r0.xxxz, l(9, 0, 0, 9) +ieq r3.xy, r0.xzxx, l(512, 512, 0, 0) +movc r0.xz, r3.xxyx, l(513,0,513,0), r0.xxzx +movc r4.xyzw, r1.xwxw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r4.xxyx +iadd r0.xz, r1.xxwx, r0.xxzx +ishl r3.xy, r0.xzxx, l(6, 6, 0, 0) +ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) +or r0.xz, r0.xxzx, r3.xxyx +xor r0.xz, r4.zzwz, r0.xxzx +iadd r0.xz, r1.xxwx, r0.xxzx +or r2.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +and r0.xz, r3.zzwz, l(2047, 0, 2047, 0) +ubfe r4.xyzw, l(1, 1, 11, 11), l(10, 10, 11, 11), r3.zwzw +ieq r1.xw, r0.xxxz, l(1024, 0, 0, 1024) +movc r0.xz, r1.xxwx, l(1025,0,1025,0), r0.xxzx +movc r5.xyzw, r4.xyxy, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r5.xxyx +iadd r0.xz, r4.xxyx, r0.xxzx +ishl r1.xw, r0.xxxz, l(5, 0, 0, 5) +ushr r0.xz, r0.xxzx, l(5, 0, 5, 0) +or r0.xz, r0.xxzx, r1.xxwx +xor r0.xz, r5.zzwz, r0.xxzx +iadd r0.xz, r4.xxyx, r0.xxzx +ubfe r1.xw, l(1, 0, 0, 1), l(21, 0, 0, 21), r3.zzzw +ieq r3.xy, r4.zwzz, l(1024, 1024, 0, 0) +movc r3.xy, r3.xyxx, l(1025,1025,0,0), r4.zwzz +movc r4.xyzw, r1.xwxw, l(2047,2047,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r3.xy, r3.xyxx, r4.xyxx +iadd r3.xy, r1.xwxx, r3.xyxx +ishl r4.xy, r3.xyxx, l(5, 5, 0, 0) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +or r3.xy, r3.xyxx, r4.xyxx +xor r3.xy, r4.zwzz, r3.xyxx +iadd r1.xw, r1.xxxw, r3.xxxy +ishl r1.xw, r1.xxxw, l(16, 0, 0, 16) +or r4.xz, r0.xxzx, r1.xxwx +ushr r0.xz, r3.zzwz, l(22, 0, 22, 0) +ushr r1.xw, r0.xxxz, l(9, 0, 0, 9) +ieq r3.xy, r0.xzxx, l(512, 512, 0, 0) +movc r0.xz, r3.xxyx, l(513,0,513,0), r0.xxzx +movc r3.xyzw, r1.xwxw, l(1023,1023,0x0000ffff,0x0000ffff), l(0,0,0,0) +xor r0.xz, r0.xxzx, r3.xxyx +iadd r0.xz, r1.xxwx, r0.xxzx +ishl r3.xy, r0.xzxx, l(6, 6, 0, 0) +ushr r0.xz, r0.xxzx, l(3, 0, 3, 0) +or r0.xz, r0.xxzx, r3.xxyx +xor r0.xz, r3.zzwz, r0.xxzx +iadd r0.xz, r1.xxwx, r0.xxzx +or r4.yw, r0.xxxz, l(0, 0x7fff0000, 0, 0x7fff0000) +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +ret +// Approximately 257 instruction slots used +#endif + +const BYTE texture_load_r11g11b10_rgba16_snorm_cs[] = +{ + 68, 88, 66, 67, 94, 183, + 176, 33, 227, 183, 149, 139, + 87, 15, 71, 231, 31, 30, + 223, 87, 1, 0, 0, 0, + 164, 41, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 8, 41, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 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0, + 6, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 85, 0, 0, 10, 82, 0, + 16, 0, 0, 0, 0, 0, + 6, 2, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 60, 0, + 0, 7, 82, 0, 16, 0, + 0, 0, 0, 0, 6, 2, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 3, 0, + 0, 0, 87, 0, 0, 7, + 82, 0, 16, 0, 0, 0, + 0, 0, 166, 11, 16, 0, + 3, 0, 0, 0, 6, 2, + 16, 0, 0, 0, 0, 0, + 30, 0, 0, 7, 82, 0, + 16, 0, 0, 0, 0, 0, + 6, 3, 16, 0, 1, 0, + 0, 0, 6, 2, 16, 0, + 0, 0, 0, 0, 60, 0, + 0, 10, 162, 0, 16, 0, + 4, 0, 0, 0, 6, 8, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 255, 127, + 0, 0, 0, 0, 0, 0, + 255, 127, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 86, 5, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 166, 10, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 1, 1, 0, 0, 6, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 87, 0, 0, 0, + 91, 0, 0, 0, 4, 0, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 25, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 4, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h new file mode 100644 index 000000000..602484ea7 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h @@ -0,0 +1,1765 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r3.zw, r5.xxxz + mov r2.zw, r5.yyyw +else + mov r3.zw, r4.xxxz + mov r2.zw, r4.yyyw +endif +and r4.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r5.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r3.xyzw, r3.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.y, r0.z, r0.y +and r3.xyzw, r2.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) +and r4.xyzw, r4.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r3.xyzw, r3.xyzw, r4.xyzw +ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) +and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r1.zzzz, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r5.xyzw, r1.wwww, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +and r5.xyzw, r4.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) +and r6.xyzw, r6.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) +and r4.xyzw, r4.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r1.yzw, r0.zzzz, r2.xxyz +and r4.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r5.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r3.xyzw, r3.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(16) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r5.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +and r5.xyzw, r4.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) +and r6.xyzw, r6.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) +and r4.xyzw, r4.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +and r4.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r5.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r3.xyzw, r3.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +else + mov r4.zw, r0.xxxz + mov r3.zw, r0.yyyw +endif +and r0.xyzw, r4.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) +and r5.xyzw, r5.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r0.xyzw, r0.xyzw, r5.xyzw +ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) +and r4.xyzw, r4.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r0.xyzw, r0.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw +and r0.xyzw, r3.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r2.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r2.xyzw, r2.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r0.xyzw, r0.xyzw, r2.xyzw +ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) +and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r0.xyzw, r0.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw +ret +// Approximately 244 instruction slots used +#endif + +const BYTE texture_load_r4g4b4a4_b4g4r4a4_2x_cs[] = +{ + 68, 88, 66, 67, 127, 168, + 168, 62, 13, 188, 14, 213, + 96, 159, 162, 12, 139, 134, + 38, 86, 1, 0, 0, 0, + 76, 34, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 176, 33, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 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0, 0, 0, + 54, 0, 0, 5, 194, 0, + 16, 0, 4, 0, 0, 0, + 6, 8, 16, 0, 5, 0, + 0, 0, 54, 0, 0, 5, + 194, 0, 16, 0, 3, 0, + 0, 0, 86, 13, 16, 0, + 5, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 194, 0, 16, 0, 4, 0, + 0, 0, 6, 8, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 194, 0, 16, 0, + 3, 0, 0, 0, 86, 13, + 16, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 1, 0, + 0, 10, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 240, 240, + 240, 240, 240, 240, 240, 240, + 240, 240, 240, 240, 240, 240, + 240, 240, 41, 0, 0, 10, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 5, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 2, 64, 0, 0, + 0, 15, 0, 15, 0, 15, + 0, 15, 0, 15, 0, 15, + 0, 15, 0, 15, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 15, 0, 15, 0, 15, 0, + 15, 0, 15, 0, 15, 0, + 15, 0, 15, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 240, 240, + 240, 240, 240, 240, 240, 240, + 240, 240, 240, 240, 240, 240, + 240, 240, 41, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 15, 0, 15, 0, 15, + 0, 15, 0, 15, 0, 15, + 0, 15, 0, 15, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 15, 0, 15, 0, 15, 0, + 15, 0, 15, 0, 15, 0, + 15, 0, 15, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 246, 15, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 244, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 78, 0, 0, 0, 71, 0, + 0, 0, 13, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 25, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h new file mode 100644 index 000000000..645d23b6d --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h @@ -0,0 +1,5115 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 11 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r1.yz, r0.xxxx, T0[0].zxyw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +and r4.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r4.zw, r1.yyyz, l(0, 0, 8, 8) +and r4.zw, r4.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r5.xy, r1.yzyy, l(8, 8, 0, 0) +and r5.xy, r5.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.xy, r3.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r6.xy, r1.yzyy, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.xy, r3.xyxx, r6.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r6.xy, r3.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.zw, r3.zzzw, r6.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r7.xy, r3.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r8.xy, r3.xyxx, l(8, 8, 0, 0) +and r8.xy, r8.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r8.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r6.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r8.zw, r6.zzzw, l(0, 0, 8, 8) +and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r6.zw, r6.zzzw, l(0, 0, 8, 8) +and r6.zw, r6.zzzw, l(0, 0, 0x000f000f, 0x000f000f) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx +iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx +iadd r1.w, r0.z, r0.y +ushr r2.x, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx +ushr r3.x, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r3.x +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xy, r1.wwww, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) +bfi r10.y, l(16), l(16), r6.y, r2.z +store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.zzwz, r3.xxyx +endif +and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r3.zw, r1.yyyz, l(0, 0, 8, 8) +and r3.zw, r3.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r3.xy, r3.zwzz, r3.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r3.xy, r1.yzyy, r3.xyxx +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r4.xxyx +endif +and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) +and r4.xy, r4.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r2.xy, r2.xyxx, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r4.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r5.xxyx +endif +and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r5.xy, r1.yzyy, l(8, 8, 0, 0) +and r5.xy, r5.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r5.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r1.yz, r1.yyzy, r2.xxyx +iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r6.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r5.zw, r6.xxxy, r6.zzzw +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r6.zwzz, r6.xyxx +endif +and r6.xy, r2.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r6.zw, r2.xxxy, l(0, 0, 8, 8) +and r6.zw, r6.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r6.xy, r6.zwzz, r6.xyxx +ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) +and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r2.xy, r2.xyxx, r6.xyxx +ld r6.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r1.w, r0.x, l(17) +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +and r7.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r7.zw, r2.zzzw, l(0, 0, 8, 8) +and r7.zw, r7.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) +iadd r7.yz, r2.zzwz, r7.xxyx +ld r2.zw, r1.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r8.zw, r2.zzzw, l(0, 0, 8, 8) +and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) +iadd r8.yz, r2.zzwz, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx +store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy +iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r7.x, l(16), l(0), r2.x, r6.y +store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx +iadd r1.w, r0.z, r9.z +ushr r2.z, r3.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz +ushr r2.z, r4.x, l(16) +bfi r3.y, l(16), l(16), r1.y, r2.z +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r2.zw, r1.wwww, l(0, 0, 1, 2) +ushr r1.y, r1.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) +bfi r3.y, l(16), l(16), r2.y, r4.x +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww +ushr r1.y, r7.z, l(16) +bfi r3.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +and r4.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r4.zw, r1.yyyz, l(0, 0, 8, 8) +and r4.zw, r4.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r5.xy, r1.yzyy, l(8, 8, 0, 0) +and r5.xy, r5.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.xy, r3.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +and r3.xy, r1.yzyy, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r6.xy, r1.yzyy, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.xy, r3.xyxx, r6.xyxx +ushr r1.yz, r1.yyzy, l(0, 8, 8, 0) +and r1.yz, r1.yyzy, l(0, 0x000f000f, 0x000f000f, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r6.xy, r3.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.zw, r3.zzzw, r6.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r7.xy, r3.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r8.xy, r3.xyxx, l(8, 8, 0, 0) +and r8.xy, r8.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.zw, r6.zzzw, r8.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r6.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r8.zw, r6.zzzw, l(0, 0, 8, 8) +and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r6.zw, r6.zzzw, l(0, 0, 8, 8) +and r6.zw, r6.zzzw, l(0, 0, 0x000f000f, 0x000f000f) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx +store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx +iadd r0.x, r0.z, r10.y +ushr r1.w, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww +ushr r1.w, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r1.w +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) +bfi r9.y, l(16), l(16), r6.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) +and r4.xy, r4.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r3.zw, r3.zzzw, r4.xxxy +ushr r3.xy, r3.xyxx, l(8, 8, 0, 0) +and r3.xy, r3.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r3.xy, r3.xyxx, r3.zwzz +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r4.zwzz, r4.xyxx +endif +and r4.xy, r2.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r4.zw, r2.xxxy, l(0, 0, 8, 8) +and r4.zw, r4.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) +and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r4.xy, r2.xyxx, r4.xyxx +ld r2.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r5.zwzz, r5.xyxx +endif +and r5.xy, r2.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r5.zw, r2.xxxy, l(0, 0, 8, 8) +and r5.zw, r5.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r5.xy, r5.zwzz, r5.xyxx +ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) +and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r5.xy, r2.xyxx, r5.xyxx +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r6.xyxx +endif +and r2.zw, r2.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r2.zw, r2.zzzw, r6.xxxy +ushr r2.xy, r2.xyxx, l(8, 8, 0, 0) +and r2.xy, r2.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r2.xy, r2.xyxx, r2.zwzz +iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r2.zw, r6.xxxx, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +and r7.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r7.zw, r2.zzzw, l(0, 0, 8, 8) +and r7.zw, r7.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) +iadd r5.zw, r2.zzzw, r7.xxxy +ld r2.zw, r6.yyyy, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r6.xxxy, r7.xxxy +endif +and r6.xy, r2.zwzz, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 8, 8) +and r2.zw, r2.zzzw, l(0, 0, 0x000f000f, 0x000f000f) +iadd r2.zw, r2.zzzw, r6.xxxy +ld r6.xy, r6.zzzz, T0[0].xyzw +if_nz r1.x + ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) + ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r7.zwzz, r7.xyxx +endif +and r7.xy, r6.xyxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r7.zw, r6.xxxy, l(0, 0, 8, 8) +and r7.zw, r7.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r6.xy, r6.xyxx, l(8, 8, 0, 0) +and r6.xy, r6.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +iadd r0.x, r0.w, l(17) +ld r7.xy, r6.wwww, T0[0].xyzw +if_nz r1.x + ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r7.xy, r7.zwzz, r8.xyxx +endif +and r7.zw, r7.xxxy, l(0, 0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r8.xy, r7.xyxx, l(8, 8, 0, 0) +and r8.xy, r8.xyxx, l(0x0f000f00, 0x0f000f00, 0, 0) +iadd r7.zw, r7.zzzw, r8.xxxy +ushr r7.xy, r7.xyxx, l(8, 8, 0, 0) +and r7.xy, r7.xyxx, l(0x000f000f, 0x000f000f, 0, 0) +iadd r7.yz, r7.xxyx, r7.zzwz +ld r0.xw, r0.xxxx, T0[0].xzwy +if_nz r1.x + ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r8.zzzw, r8.xxxy +endif +and r8.xy, r0.xwxx, l(0xf0f0f0f0, 0xf0f0f0f0, 0, 0) +ishl r8.zw, r0.xxxw, l(0, 0, 8, 8) +and r8.zw, r8.zzzw, l(0, 0, 0x0f000f00, 0x0f000f00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r0.xw, r0.xxxw, l(8, 0, 0, 8) +and r0.xw, r0.xxxw, l(0x000f000f, 0, 0, 0x000f000f) +iadd r8.yz, r0.xxwx, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy +bfi r7.x, l(16), l(0), r2.z, r6.y +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.x, r0.z, r1.y +ushr r0.y, r3.y, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy +ushr r0.y, r4.x, l(16) +bfi r1.y, l(16), l(16), r2.x, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) +ushr r1.x, r2.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx +ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) +bfi r1.y, l(16), l(16), r2.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz +ushr r0.y, r7.z, l(16) +bfi r1.y, l(16), l(16), r8.y, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r2.y +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx +ret +// Approximately 734 instruction slots used +#endif + +const BYTE texture_load_r4g4b4a4_b4g4r4a4_3x_cs[] = +{ + 68, 88, 66, 67, 48, 98, + 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0, 0, 134, 0, 16, 0, + 8, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 222, 2, + 0, 0, 11, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 242, 0, 0, 0, 15, 1, + 0, 0, 5, 0, 0, 0, + 40, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 36, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 7, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 36, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_cs.h new file mode 100644 index 000000000..92f43c5fe --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r4g4b4a4_b4g4r4a4_cs.h @@ -0,0 +1,967 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(1) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r0.x, r0.x, l(3) + iadd r0.x, r0.x, r1.z + bfi r0.x, l(2), l(6), r0.x, l(0) + iadd r0.x, r1.y, r0.x + bfi r1.x, l(6), l(0), r2.x, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r0.y, r0.y, l(1) +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +and r2.xyzw, r1.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r3.xyzw, r1.xyzw, l(8, 8, 8, 8) +and r3.xyzw, r3.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r2.xyzw, r2.xyzw, r3.xyzw +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +and r1.xyzw, r1.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r1.xyzw, r1.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r1.x, r0.z, l(1) +movc r0.w, r0.w, l(4), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].xyzw +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +and r3.xyzw, r2.xyzw, l(0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0, 0xf0f0f0f0) +ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) +and r4.xyzw, r4.xyzw, l(0x0f000f00, 0x0f000f00, 0x0f000f00, 0x0f000f00) +iadd r3.xyzw, r3.xyzw, r4.xyzw +ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) +and r2.xyzw, r2.xyzw, l(0x000f000f, 0x000f000f, 0x000f000f, 0x000f000f) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw +ret +// Approximately 105 instruction slots used +#endif + +const BYTE texture_load_r4g4b4a4_b4g4r4a4_cs[] = +{ + 68, 88, 66, 67, 195, 82, + 175, 96, 23, 76, 4, 188, + 107, 226, 159, 142, 74, 91, + 167, 175, 1, 0, 0, 0, + 220, 18, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 64, 18, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 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+// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r3.zw, r5.xxxz + mov r2.zw, r5.yyyw +else + mov r3.zw, r4.xxxz + mov r2.zw, r4.yyyw +endif +and r4.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r5.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.y, r0.z, r0.y +and r3.xyzw, r2.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r4.xyzw, r2.xyzw, l(10, 10, 10, 10) +and r4.xyzw, r4.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r3.xyzw, r3.xyzw, r4.xyzw +ushr r2.xyzw, r2.xyzw, l(10, 10, 10, 10) +and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r1.zzzz, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r5.xyzw, r1.wwww, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +and r5.xyzw, r4.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r6.xyzw, r4.xyzw, l(10, 10, 10, 10) +and r6.xyzw, r6.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(10, 10, 10, 10) +and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r1.yzw, r0.zzzz, r2.xxyz +and r4.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r5.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(16) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r5.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +and r5.xyzw, r4.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r6.xyzw, r4.xyzw, l(10, 10, 10, 10) +and r6.xyzw, r6.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(10, 10, 10, 10) +and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +and r4.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r5.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +else + mov r4.zw, r0.xxxz + mov r3.zw, r0.yyyw +endif +and r0.xyzw, r4.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r5.xyzw, r4.xyzw, l(10, 10, 10, 10) +and r5.xyzw, r5.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r0.xyzw, r0.xyzw, r5.xyzw +ushr r4.xyzw, r4.xyzw, l(10, 10, 10, 10) +and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r0.xyzw, r0.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw +and r0.xyzw, r3.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r2.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r2.xyzw, r2.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r0.xyzw, r0.xyzw, r2.xyzw +ushr r2.xyzw, r3.xyzw, l(10, 10, 10, 10) +and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r0.xyzw, r0.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw +ret +// Approximately 244 instruction slots used +#endif + +const BYTE texture_load_r5g5b5a1_b5g5r5a1_2x_cs[] = +{ + 68, 88, 66, 67, 227, 97, + 50, 38, 144, 220, 61, 160, + 154, 139, 80, 196, 129, 216, + 136, 2, 1, 0, 0, 0, + 76, 34, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 176, 33, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 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31, 0, + 31, 0, 31, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 3, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 45, 0, + 0, 8, 242, 0, 16, 0, + 3, 0, 0, 0, 86, 5, + 16, 0, 0, 0, 0, 0, + 214, 120, 32, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 31, 0, 4, 3, 10, 0, + 16, 0, 1, 0, 0, 0, + 41, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 38, 7, 16, 0, 3, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 4, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 85, 0, 0, 10, + 242, 0, 16, 0, 5, 0, + 0, 0, 38, 7, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 5, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 2, 64, 0, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 3, 0, 0, 0, 214, 8, + 16, 0, 4, 0, 0, 0, + 214, 8, 16, 0, 5, 0, + 0, 0, 54, 0, 0, 5, + 50, 0, 16, 0, 4, 0, + 0, 0, 230, 10, 16, 0, + 3, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 50, 0, 16, 0, 4, 0, + 0, 0, 230, 10, 16, 0, + 3, 0, 0, 0, 21, 0, + 0, 1, 45, 0, 0, 8, + 242, 0, 16, 0, 0, 0, + 0, 0, 166, 10, 16, 0, + 0, 0, 0, 0, 70, 126, + 32, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 10, 0, 16, 0, + 1, 0, 0, 0, 41, 0, + 0, 10, 242, 0, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 5, 0, 0, 0, 2, 64, + 0, 0, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 0, 255, 0, 255, 0, 255, + 85, 0, 0, 10, 242, 0, + 16, 0, 6, 0, 0, 0, + 70, 14, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 8, 0, 0, 0, 8, 0, + 0, 0, 8, 0, 0, 0, + 8, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 6, 0, 0, 0, 70, 14, + 16, 0, 6, 0, 0, 0, + 2, 64, 0, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 255, 0, 255, 0, + 255, 0, 30, 0, 0, 7, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 5, 0, 0, 0, 70, 14, + 16, 0, 6, 0, 0, 0, + 54, 0, 0, 5, 194, 0, + 16, 0, 4, 0, 0, 0, + 6, 8, 16, 0, 5, 0, + 0, 0, 54, 0, 0, 5, + 194, 0, 16, 0, 3, 0, + 0, 0, 86, 13, 16, 0, + 5, 0, 0, 0, 18, 0, + 0, 1, 54, 0, 0, 5, + 194, 0, 16, 0, 4, 0, + 0, 0, 6, 8, 16, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 194, 0, 16, 0, + 3, 0, 0, 0, 86, 13, + 16, 0, 0, 0, 0, 0, + 21, 0, 0, 1, 1, 0, + 0, 10, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 4, 0, 0, 0, + 2, 64, 0, 0, 224, 131, + 224, 131, 224, 131, 224, 131, + 224, 131, 224, 131, 224, 131, + 224, 131, 41, 0, 0, 10, + 242, 0, 16, 0, 5, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 10, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 5, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 2, 64, 0, 0, + 0, 124, 0, 124, 0, 124, + 0, 124, 0, 124, 0, 124, + 0, 124, 0, 124, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 5, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 10, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 4, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 2, 64, 0, 0, + 31, 0, 31, 0, 31, 0, + 31, 0, 31, 0, 31, 0, + 31, 0, 31, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 4, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 166, 10, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 2, 64, 0, 0, 224, 131, + 224, 131, 224, 131, 224, 131, + 224, 131, 224, 131, 224, 131, + 224, 131, 41, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 10, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 0, 124, 0, 124, 0, 124, + 0, 124, 0, 124, 0, 124, + 0, 124, 0, 124, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 85, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 2, 64, + 0, 0, 10, 0, 0, 0, + 10, 0, 0, 0, 10, 0, + 0, 0, 10, 0, 0, 0, + 1, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 31, 0, 31, 0, 31, 0, + 31, 0, 31, 0, 31, 0, + 31, 0, 31, 0, 30, 0, + 0, 7, 242, 0, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 164, 0, 0, 8, + 242, 224, 33, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 246, 15, 16, 0, 1, 0, + 0, 0, 70, 14, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 244, 0, + 0, 0, 8, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 78, 0, 0, 0, 71, 0, + 0, 0, 13, 0, 0, 0, + 12, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 25, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h new file mode 100644 index 000000000..e8856192b --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h @@ -0,0 +1,5115 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 11 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r1.yz, r0.xxxx, T0[0].zxyw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +and r4.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r4.zw, r1.yyyz, l(0, 0, 10, 10) +and r4.zw, r4.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r5.xy, r1.yzyy, l(10, 10, 0, 0) +and r5.xy, r5.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.xy, r3.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r6.xy, r1.yzyy, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.xy, r3.xyxx, r6.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r6.xy, r3.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.zw, r3.zzzw, r6.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r7.xy, r3.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r8.xy, r3.xyxx, l(10, 10, 0, 0) +and r8.xy, r8.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r8.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r6.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r8.zw, r6.zzzw, l(0, 0, 10, 10) +and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r6.zw, r6.zzzw, l(0, 0, 10, 10) +and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx +iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx +iadd r1.w, r0.z, r0.y +ushr r2.x, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx +ushr r3.x, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r3.x +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xy, r1.wwww, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) +bfi r10.y, l(16), l(16), r6.y, r2.z +store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.zzwz, r3.xxyx +endif +and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r3.zw, r1.yyyz, l(0, 0, 10, 10) +and r3.zw, r3.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r3.xy, r3.zwzz, r3.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r3.xy, r1.yzyy, r3.xyxx +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r4.xxyx +endif +and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r4.xy, r1.yzyy, l(10, 10, 0, 0) +and r4.xy, r4.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r2.xy, r2.xyxx, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r4.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r5.xxyx +endif +and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r5.xy, r1.yzyy, l(10, 10, 0, 0) +and r5.xy, r5.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r5.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r1.yz, r1.yyzy, r2.xxyx +iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r6.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.zw, r6.xxxy, r6.zzzw +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r6.zwzz, r6.xyxx +endif +and r6.xy, r2.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r6.zw, r2.xxxy, l(0, 0, 10, 10) +and r6.zw, r6.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r6.xy, r6.zwzz, r6.xyxx +ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r2.xy, r2.xyxx, r6.xyxx +ld r6.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r1.w, r0.x, l(17) +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +and r7.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r7.zw, r2.zzzw, l(0, 0, 10, 10) +and r7.zw, r7.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r7.yz, r2.zzwz, r7.xxyx +ld r2.zw, r1.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r8.zw, r2.zzzw, l(0, 0, 10, 10) +and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r8.yz, r2.zzwz, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx +store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy +iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r7.x, l(16), l(0), r2.x, r6.y +store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx +iadd r1.w, r0.z, r9.z +ushr r2.z, r3.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz +ushr r2.z, r4.x, l(16) +bfi r3.y, l(16), l(16), r1.y, r2.z +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r2.zw, r1.wwww, l(0, 0, 1, 2) +ushr r1.y, r1.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) +bfi r3.y, l(16), l(16), r2.y, r4.x +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww +ushr r1.y, r7.z, l(16) +bfi r3.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +and r4.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r4.zw, r1.yyyz, l(0, 0, 10, 10) +and r4.zw, r4.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r5.xy, r1.yzyy, l(10, 10, 0, 0) +and r5.xy, r5.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.xy, r3.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +and r3.xy, r1.yzyy, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r6.xy, r1.yzyy, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.xy, r3.xyxx, r6.xyxx +ushr r1.yz, r1.yyzy, l(0, 10, 10, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r6.xy, r3.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.zw, r3.zzzw, r6.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r7.xy, r6.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r7.xy, r3.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r8.xy, r3.xyxx, l(10, 10, 0, 0) +and r8.xy, r8.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.zw, r6.zzzw, r8.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r6.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r8.zw, r6.zzzw, l(0, 0, 10, 10) +and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r6.zw, r6.zzzw, l(0, 0, 10, 10) +and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx +store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx +iadd r0.x, r0.z, r10.y +ushr r1.w, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww +ushr r1.w, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r1.w +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) +bfi r9.y, l(16), l(16), r6.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r4.xy, r3.xyxx, l(10, 10, 0, 0) +and r4.xy, r4.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r3.zw, r3.zzzw, r4.xxxy +ushr r3.xy, r3.xyxx, l(10, 10, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r3.xy, r3.xyxx, r3.zwzz +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r4.zwzz, r4.xyxx +endif +and r4.xy, r2.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r4.zw, r2.xxxy, l(0, 0, 10, 10) +and r4.zw, r4.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r4.xy, r2.xyxx, r4.xyxx +ld r2.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r5.zwzz, r5.xyxx +endif +and r5.xy, r2.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r5.zw, r2.xxxy, l(0, 0, 10, 10) +and r5.zw, r5.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r5.xy, r5.zwzz, r5.xyxx +ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.xy, r2.xyxx, r5.xyxx +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r6.xyxx +endif +and r2.zw, r2.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r6.xy, r2.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r2.zw, r2.zzzw, r6.xxxy +ushr r2.xy, r2.xyxx, l(10, 10, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r2.xy, r2.xyxx, r2.zwzz +iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r2.zw, r6.xxxx, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +and r7.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r7.zw, r2.zzzw, l(0, 0, 10, 10) +and r7.zw, r7.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r5.zw, r2.zzzw, r7.xxxy +ld r2.zw, r6.yyyy, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r6.xxxy, r7.xxxy +endif +and r6.xy, r2.zwzz, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r7.xy, r2.zwzz, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 10, 10) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r2.zw, r2.zzzw, r6.xxxy +ld r6.xy, r6.zzzz, T0[0].xyzw +if_nz r1.x + ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) + ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r7.zwzz, r7.xyxx +endif +and r7.xy, r6.xyxx, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r7.zw, r6.xxxy, l(0, 0, 10, 10) +and r7.zw, r7.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r6.xy, r6.xyxx, l(10, 10, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +iadd r0.x, r0.w, l(17) +ld r7.xy, r6.wwww, T0[0].xyzw +if_nz r1.x + ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r7.xy, r7.zwzz, r8.xyxx +endif +and r7.zw, r7.xxxy, l(0, 0, 0x83e083e0, 0x83e083e0) +ishl r8.xy, r7.xyxx, l(10, 10, 0, 0) +and r8.xy, r8.xyxx, l(0x7c007c00, 0x7c007c00, 0, 0) +iadd r7.zw, r7.zzzw, r8.xxxy +ushr r7.xy, r7.xyxx, l(10, 10, 0, 0) +and r7.xy, r7.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r7.yz, r7.xxyx, r7.zzwz +ld r0.xw, r0.xxxx, T0[0].xzwy +if_nz r1.x + ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r8.zzzw, r8.xxxy +endif +and r8.xy, r0.xwxx, l(0x83e083e0, 0x83e083e0, 0, 0) +ishl r8.zw, r0.xxxw, l(0, 0, 10, 10) +and r8.zw, r8.zzzw, l(0, 0, 0x7c007c00, 0x7c007c00) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r0.xw, r0.xxxw, l(10, 0, 0, 10) +and r0.xw, r0.xxxw, l(0x001f001f, 0, 0, 0x001f001f) +iadd r8.yz, r0.xxwx, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy +bfi r7.x, l(16), l(0), r2.z, r6.y +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.x, r0.z, r1.y +ushr r0.y, r3.y, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy +ushr r0.y, r4.x, l(16) +bfi r1.y, l(16), l(16), r2.x, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) +ushr r1.x, r2.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx +ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) +bfi r1.y, l(16), l(16), r2.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz +ushr r0.y, r7.z, l(16) +bfi r1.y, l(16), l(16), r8.y, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r2.y +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx +ret +// Approximately 734 instruction slots used +#endif + +const BYTE texture_load_r5g5b5a1_b5g5r5a1_3x_cs[] = +{ + 68, 88, 66, 67, 110, 75, + 131, 98, 81, 189, 110, 246, + 69, 249, 224, 43, 236, 148, + 109, 236, 1, 0, 0, 0, + 84, 101, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 184, 100, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 4, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 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0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 36, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_cs.h new file mode 100644 index 000000000..3ba537bcf --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b5a1_b5g5r5a1_cs.h @@ -0,0 +1,967 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(1) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r0.x, r0.x, l(3) + iadd r0.x, r0.x, r1.z + bfi r0.x, l(2), l(6), r0.x, l(0) + iadd r0.x, r1.y, r0.x + bfi r1.x, l(6), l(0), r2.x, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r0.y, r0.y, l(1) +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +and r2.xyzw, r1.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r3.xyzw, r1.xyzw, l(10, 10, 10, 10) +and r3.xyzw, r3.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r2.xyzw, r2.xyzw, r3.xyzw +ushr r1.xyzw, r1.xyzw, l(10, 10, 10, 10) +and r1.xyzw, r1.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r1.xyzw, r1.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r1.x, r0.z, l(1) +movc r0.w, r0.w, l(4), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].xyzw +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +and r3.xyzw, r2.xyzw, l(0x83e083e0, 0x83e083e0, 0x83e083e0, 0x83e083e0) +ishl r4.xyzw, r2.xyzw, l(10, 10, 10, 10) +and r4.xyzw, r4.xyzw, l(0x7c007c00, 0x7c007c00, 0x7c007c00, 0x7c007c00) +iadd r3.xyzw, r3.xyzw, r4.xyzw +ushr r2.xyzw, r2.xyzw, l(10, 10, 10, 10) +and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw +ret +// Approximately 105 instruction slots used +#endif + +const BYTE texture_load_r5g5b5a1_b5g5r5a1_cs[] = +{ + 68, 88, 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+ 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h new file mode 100644 index 000000000..e1bdf56d1 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h @@ -0,0 +1,1658 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r3.zw, r5.xxxz + mov r2.zw, r5.yyyw +else + mov r3.zw, r4.xxxz + mov r2.zw, r4.yyyw +endif +ishl r4.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r3.xyzw, r3.xyzw, l(5, 5, 5, 5) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.y, r0.z, r0.y +ishl r3.xyzw, r2.xyzw, l(11, 11, 11, 11) +and r3.xyzw, r3.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r2.xyzw, r2.xyzw, l(5, 5, 5, 5) +and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r1.zzzz, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r5.xyzw, r1.wwww, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +ishl r5.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r4.xyzw, r4.xyzw, l(5, 5, 5, 5) +and r4.xyzw, r4.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r1.yzw, r0.zzzz, r2.xxyz +ishl r4.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r3.xyzw, r3.xyzw, l(5, 5, 5, 5) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(16) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r5.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +ishl r5.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r4.xyzw, r4.xyzw, l(5, 5, 5, 5) +and r4.xyzw, r4.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +ishl r4.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r3.xyzw, r3.xyzw, l(5, 5, 5, 5) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +else + mov r4.zw, r0.xxxz + mov r3.zw, r0.yyyw +endif +ishl r0.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r0.xyzw, r0.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r4.xyzw, r4.xyzw, l(5, 5, 5, 5) +and r4.xyzw, r4.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r0.xyzw, r0.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw +ishl r0.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r0.xyzw, r0.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r2.xyzw, r3.xyzw, l(5, 5, 5, 5) +and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r0.xyzw, r0.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw +ret +// Approximately 228 instruction slots used +#endif + +const BYTE texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs[] = +{ + 68, 88, 66, 67, 61, 104, + 61, 171, 159, 146, 205, 116, + 207, 226, 30, 183, 30, 110, + 163, 17, 1, 0, 0, 0, + 44, 32, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 144, 31, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 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0, 0, 0, 2, 64, + 0, 0, 255, 7, 255, 7, + 255, 7, 255, 7, 255, 7, + 255, 7, 255, 7, 255, 7, + 30, 0, 0, 7, 242, 0, + 16, 0, 0, 0, 0, 0, + 70, 14, 16, 0, 0, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 246, 15, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 228, 0, 0, 0, 8, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 70, 0, 0, 0, + 63, 0, 0, 0, 13, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 25, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 8, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h new file mode 100644 index 000000000..bc030e0d2 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h @@ -0,0 +1,4566 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 11 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r1.yz, r0.xxxx, T0[0].zxyw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r6.zwzz, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r6.zw, r6.zzzw, l(0, 0, 5, 5) +and r6.zw, r6.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx +iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx +iadd r1.w, r0.z, r0.y +ushr r2.x, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx +ushr r3.x, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r3.x +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xy, r1.wwww, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) +bfi r10.y, l(16), l(16), r6.y, r2.z +store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.zzwz, r3.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r3.xy, r1.yzyy, r3.xyxx +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r4.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r4.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r5.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r5.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r1.yz, r1.yyzy, r2.xxyx +iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r6.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r5.zw, r6.xxxy, r6.zzzw +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r6.zwzz, r6.xyxx +endif +ishl r6.xy, r2.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r2.xy, r2.xyxx, r6.xyxx +ld r6.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r1.w, r0.x, l(17) +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r7.yz, r2.zzwz, r7.xxyx +ld r2.zw, r1.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r2.zwzz, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r8.yz, r2.zzwz, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx +store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy +iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r7.x, l(16), l(0), r2.x, r6.y +store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx +iadd r1.w, r0.z, r9.z +ushr r2.z, r3.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz +ushr r2.z, r4.x, l(16) +bfi r3.y, l(16), l(16), r1.y, r2.z +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r2.zw, r1.wwww, l(0, 0, 1, 2) +ushr r1.y, r1.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) +bfi r3.y, l(16), l(16), r2.y, r4.x +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww +ushr r1.y, r7.z, l(16) +bfi r3.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r6.zwzz, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r6.zw, r6.zzzw, l(0, 0, 5, 5) +and r6.zw, r6.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx +store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx +iadd r0.x, r0.z, r10.y +ushr r1.w, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww +ushr r1.w, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r1.w +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) +bfi r9.y, l(16), l(16), r6.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r3.xy, r3.xyxx, r3.zwzz +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r4.zwzz, r4.xyxx +endif +ishl r4.xy, r2.xyxx, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r4.xy, r2.xyxx, r4.xyxx +ld r2.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r5.zwzz, r5.xyxx +endif +ishl r5.xy, r2.xyxx, l(11, 11, 0, 0) +and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r5.xy, r2.xyxx, r5.xyxx +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r6.xyxx +endif +ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r2.xy, r2.xyxx, r2.zwzz +iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r2.zw, r6.xxxx, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r5.zw, r2.zzzw, r7.xxxy +ld r2.zw, r6.yyyy, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r6.xxxy, r7.xxxy +endif +ishl r6.xy, r2.zwzz, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r2.zw, r2.zzzw, r6.xxxy +ld r6.xy, r6.zzzz, T0[0].xyzw +if_nz r1.x + ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) + ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r7.zwzz, r7.xyxx +endif +ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xy, r6.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +iadd r0.x, r0.w, l(17) +ld r7.xy, r6.wwww, T0[0].xyzw +if_nz r1.x + ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r7.xy, r7.zwzz, r8.xyxx +endif +ishl r7.zw, r7.xxxy, l(0, 0, 11, 11) +ushr r7.xy, r7.xyxx, l(5, 5, 0, 0) +and r7.xyzw, r7.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r7.yz, r7.xxyx, r7.zzwz +ld r0.xw, r0.xxxx, T0[0].xzwy +if_nz r1.x + ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r0.xwxx, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) +and r0.xw, r0.xxxw, l(0x07ff07ff, 0, 0, 0x07ff07ff) +iadd r8.yz, r0.xxwx, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy +bfi r7.x, l(16), l(0), r2.z, r6.y +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.x, r0.z, r1.y +ushr r0.y, r3.y, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy +ushr r0.y, r4.x, l(16) +bfi r1.y, l(16), l(16), r2.x, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) +ushr r1.x, r2.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx +ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) +bfi r1.y, l(16), l(16), r2.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz +ushr r0.y, r7.z, l(16) +bfi r1.y, l(16), l(16), r8.y, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r2.y +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx +ret +// Approximately 653 instruction slots used +#endif + +const BYTE texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs[] = +{ + 68, 88, 66, 67, 232, 96, + 18, 102, 2, 97, 255, 110, + 142, 162, 95, 243, 26, 21, + 176, 27, 1, 0, 0, 0, + 92, 90, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 192, 89, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, 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36, 0, + 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h new file mode 100644 index 000000000..79f2d2333 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h @@ -0,0 +1,940 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(1) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r0.x, r0.x, l(3) + iadd r0.x, r0.x, r1.z + bfi r0.x, l(2), l(6), r0.x, l(0) + iadd r0.x, r1.y, r0.x + bfi r1.x, l(6), l(0), r2.x, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r0.y, r0.y, l(1) +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +ishl r2.xyzw, r1.xyzw, l(11, 11, 11, 11) +and r2.xyzw, r2.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r1.xyzw, r1.xyzw, l(5, 5, 5, 5) +and r1.xyzw, r1.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r1.xyzw, r1.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r1.x, r0.z, l(1) +movc r0.w, r0.w, l(4), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].xyzw +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +ishl r3.xyzw, r2.xyzw, l(11, 11, 11, 11) +and r3.xyzw, r3.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +ushr r2.xyzw, r2.xyzw, l(5, 5, 5, 5) +and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0x07ff07ff, 0x07ff07ff) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw +ret +// Approximately 101 instruction slots used +#endif + +const BYTE texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs[] = +{ + 68, 88, 66, 67, 148, 17, + 160, 93, 1, 63, 92, 177, + 120, 108, 149, 109, 84, 31, + 47, 149, 1, 0, 0, 0, + 84, 18, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 184, 17, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 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248, 0, 248, + 0, 248, 0, 248, 0, 248, + 0, 248, 0, 248, 0, 248, + 85, 0, 0, 10, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 2, 64, 0, 0, + 5, 0, 0, 0, 5, 0, + 0, 0, 5, 0, 0, 0, + 5, 0, 0, 0, 1, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 255, 7, + 255, 7, 255, 7, 255, 7, + 255, 7, 255, 7, 255, 7, + 255, 7, 30, 0, 0, 7, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 3, 0, 0, 0, + 164, 0, 0, 8, 242, 224, + 33, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 16, 0, 1, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 101, 0, 0, 0, + 5, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 38, 0, + 0, 0, 26, 0, 0, 0, + 4, 0, 0, 0, 5, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_2x_cs.h b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_2x_cs.h new file mode 100644 index 000000000..e8f2303ac --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_2x_cs.h @@ -0,0 +1,1765 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.z, r1.y, r1.x +or r0.z, r1.z, r0.z +if_nz r0.z + ret +endif +ishl r0.yz, r0.xxyx, l(0, 1, 1, 0) +ishl r0.w, CB0[0][1].y, l(1) +ishl r0.y, r0.y, l(1) +imad r0.z, vThreadID.z, r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(4) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xy, r0.xyxx, l(2, 4, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r2.xyzw, r0.xxxx, T0[0].ywxz +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r3.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.ywxz, r4.ywxz + mov r3.xy, r2.zwzz +else + mov r3.xy, r2.zwzz +endif +iadd r1.yzw, r0.xxxx, l(0, 1, 2, 3) +ld r4.xyzw, r1.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r3.zw, r5.xxxz + mov r2.zw, r5.yyyw +else + mov r3.zw, r4.xxxz + mov r2.zw, r4.yyyw +endif +and r4.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r5.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +iadd r1.y, r0.z, r0.y +and r3.xyzw, r2.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r4.xyzw, r2.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r3.xyzw, r3.xyzw, r4.xyzw +ushr r2.xyzw, r2.xyzw, l(11, 11, 11, 11) +and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +iadd r2.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r3.xyzw, r1.zzzz, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r5.xyzw, r1.wwww, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +and r5.xyzw, r4.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r6.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r6.xyzw, r6.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +iadd r1.yzw, r0.zzzz, r2.xxyz +and r4.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r5.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +if_nz r0.w + iadd r0.y, r0.x, l(16) +else + iadd r0.y, r0.x, l(4) +endif +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +iadd r0.xyz, r0.yyyy, l(1, 2, 3, 0) +ld r5.xyzw, r0.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r6.xyzw, r7.xyzw + mov r4.zw, r6.xxxz + mov r3.zw, r6.yyyw +else + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +endif +and r5.xyzw, r4.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r6.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r6.xyzw, r6.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r5.xyzw, r5.xyzw, r6.xyzw +ushr r4.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r4.xyzw, r4.xyzw, r5.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +and r4.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r5.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r4.xyzw, r4.xyzw, r5.xyzw +ushr r3.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r3.xyzw, r3.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r3.xyzw, r3.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r1.zzzz, r3.xyzw +ld r3.xyzw, r0.yyyy, T0[0].ywxz +if_nz r1.x + ishl r4.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.zxwy, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.ywxz, r5.ywxz + mov r4.xy, r3.zwzz +else + mov r4.xy, r3.zwzz +endif +ld r0.xyzw, r0.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r0.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r5.xyzw, r6.xyzw + mov r4.zw, r5.xxxz + mov r3.zw, r5.yyyw +else + mov r4.zw, r0.xxxz + mov r3.zw, r0.yyyw +endif +and r0.xyzw, r4.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r5.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r5.xyzw, r5.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r0.xyzw, r0.xyzw, r5.xyzw +ushr r4.xyzw, r4.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r0.xyzw, r0.xyzw, r4.xyzw +store_uav_typed U0[0].xyzw, r2.zzzz, r0.xyzw +and r0.xyzw, r3.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r2.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r2.xyzw, r2.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r0.xyzw, r0.xyzw, r2.xyzw +ushr r2.xyzw, r3.xyzw, l(11, 11, 11, 11) +and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r0.xyzw, r0.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r1.wwww, r0.xyzw +ret +// Approximately 244 instruction slots used +#endif + +const BYTE texture_load_r5g6b5_b5g6r5_2x_cs[] = +{ + 68, 88, 66, 67, 190, 17, + 49, 250, 35, 226, 182, 174, + 50, 31, 7, 155, 128, 165, + 42, 142, 1, 0, 0, 0, + 76, 34, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 176, 33, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 0, 0, 1, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 115, 111, + 117, 114, 99, 101, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 100, 101, 115, + 116, 0, 88, 101, 84, 101, + 120, 116, 117, 114, 101, 76, + 111, 97, 100, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 224, 0, 0, 0, + 8, 0, 0, 0, 16, 1, + 0, 0, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 80, 2, 0, 0, + 0, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 160, 2, 0, 0, 4, 0, + 0, 0, 4, 0, 0, 0, + 2, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 189, 2, + 0, 0, 8, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 225, 2, 0, 0, + 12, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 19, 3, 0, 0, 16, 0, + 0, 0, 12, 0, 0, 0, + 2, 0, 0, 0, 56, 3, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 92, 3, + 0, 0, 28, 0, 0, 0, + 4, 0, 0, 0, 2, 0, + 0, 0, 124, 2, 0, 0, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 120, 3, 0, 0, + 32, 0, 0, 0, 4, 0, + 0, 0, 2, 0, 0, 0, + 124, 2, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 147, 3, 0, 0, 36, 0, + 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 124, 2, + 0, 0, 0, 0, 0, 0, + 255, 255, 255, 255, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 120, 101, + 95, 116, 101, 120, 116, 117, + 114, 101, 95, 108, 111, 97, + 100, 95, 105, 115, 95, 116, + 105, 108, 101, 100, 95, 51, + 100, 95, 101, 110, 100, 105, + 97, 110, 0, 100, 119, 111, + 114, 100, 0, 171, 171, 171, + 0, 0, 19, 0, 1, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 115, 2, 0, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 103, 117, + 101, 115, 116, 95, 111, 102, + 102, 115, 101, 116, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 112, 105, 116, + 99, 104, 95, 97, 108, 105, + 103, 110, 101, 100, 0, 120, + 101, 95, 116, 101, 120, 116, + 117, 114, 101, 95, 108, 111, + 97, 100, 95, 103, 117, 101, + 115, 116, 95, 122, 95, 115, + 116, 114, 105, 100, 101, 95, + 98, 108, 111, 99, 107, 95, + 114, 111, 119, 115, 95, 97, + 108, 105, 103, 110, 101, 100, + 0, 120, 101, 95, 116, 101, + 120, 116, 117, 114, 101, 95, + 108, 111, 97, 100, 95, 115, + 105, 122, 101, 95, 98, 108, + 111, 99, 107, 115, 0, 117, + 105, 110, 116, 51, 0, 171, + 171, 171, 1, 0, 19, 0, + 1, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 47, 3, + 0, 0, 120, 101, 95, 116, + 101, 120, 116, 117, 114, 101, + 95, 108, 111, 97, 100, 95, + 104, 111, 115, 116, 95, 111, + 102, 102, 115, 101, 116, 0, + 120, 101, 95, 116, 101, 120, + 116, 117, 114, 101, 95, 108, + 111, 97, 100, 95, 104, 111, + 115, 116, 95, 112, 105, 116, + 99, 104, 0, 120, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 95, 108, 111, 97, 100, + 95, 104, 101, 105, 103, 104, + 116, 95, 116, 101, 120, 101, + 108, 115, 0, 77, 105, 99, + 114, 111, 115, 111, 102, 116, + 32, 40, 82, 41, 32, 72, + 76, 83, 76, 32, 83, 104, + 97, 100, 101, 114, 32, 67, + 111, 109, 112, 105, 108, 101, + 114, 32, 49, 48, 46, 49, + 0, 171, 171, 171, 73, 83, + 71, 78, 8, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 79, 83, 71, 78, + 8, 0, 0, 0, 0, 0, + 0, 0, 8, 0, 0, 0, + 83, 72, 69, 88, 112, 29, + 0, 0, 81, 0, 5, 0, + 92, 7, 0, 0, 106, 8, + 0, 1, 89, 0, 0, 7, + 70, 142, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 88, 8, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 68, 68, 0, 0, + 0, 0, 0, 0, 156, 8, + 0, 7, 70, 238, 49, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 68, 68, 0, 0, 0, 0, + 0, 0, 95, 0, 0, 2, + 114, 0, 2, 0, 104, 0, + 0, 2, 8, 0, 0, 0, + 155, 0, 0, 4, 2, 0, + 0, 0, 32, 0, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 6, 18, 0, 16, 0, + 0, 0, 0, 0, 10, 0, + 2, 0, 1, 64, 0, 0, + 4, 0, 0, 0, 54, 0, + 0, 4, 98, 0, 16, 0, + 0, 0, 0, 0, 86, 6, + 2, 0, 80, 0, 0, 9, + 114, 0, 16, 0, 1, 0, + 0, 0, 70, 2, 16, 0, + 0, 0, 0, 0, 70, 130, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 60, 0, 0, 7, + 66, 0, 16, 0, 0, 0, + 0, 0, 26, 0, 16, 0, + 1, 0, 0, 0, 10, 0, + 16, 0, 1, 0, 0, 0, + 60, 0, 0, 7, 66, 0, + 16, 0, 0, 0, 0, 0, + 42, 0, 16, 0, 1, 0, + 0, 0, 42, 0, 16, 0, + 0, 0, 0, 0, 31, 0, + 4, 3, 42, 0, 16, 0, + 0, 0, 0, 0, 62, 0, + 0, 1, 21, 0, 0, 1, + 41, 0, 0, 10, 98, 0, + 16, 0, 0, 0, 0, 0, + 6, 1, 16, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 41, 0, + 0, 9, 130, 0, 16, 0, + 0, 0, 0, 0, 26, 128, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 64, 0, 0, + 1, 0, 0, 0, 41, 0, + 0, 7, 34, 0, 16, 0, + 0, 0, 0, 0, 26, 0, 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b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_3x_cs.h new file mode 100644 index 000000000..6395f5b30 --- /dev/null +++ b/src/xenia/gpu/shaders/bytecode/d3d12_5_1/texture_load_r5g6b5_b5g6r5_3x_cs.h @@ -0,0 +1,5115 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 11 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].x, r0.y +iadd r0.y, r0.y, CB0[0][1].w +ushr r0.z, CB0[0][2].x, l(3) +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + imad r1.y, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r1.y, CB0[0][0].z, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].y +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][0].x, l(2) +ld r1.yz, r0.xxxx, T0[0].zxyw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +and r4.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r4.zw, r1.yyyz, l(0, 0, 11, 11) +and r4.zw, r4.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r5.xy, r1.yzyy, l(11, 11, 0, 0) +and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.xy, r3.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r6.xy, r1.yzyy, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.xy, r3.xyxx, r6.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r6.xy, r3.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.zw, r3.zzzw, r6.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r7.xy, r3.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r8.xy, r3.xyxx, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r8.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r6.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r8.zw, r6.zzzw, l(0, 0, 11, 11) +and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r6.zw, r6.zzzw, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx +iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx +iadd r1.w, r0.z, r0.y +ushr r2.x, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx +ushr r3.x, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r3.x +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xy, r1.wwww, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) +bfi r10.y, l(16), l(16), r6.y, r2.z +store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.zzwz, r3.xxyx +endif +and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r3.zw, r1.yyyz, l(0, 0, 11, 11) +and r3.zw, r3.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r3.xy, r3.zwzz, r3.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r3.xy, r1.yzyy, r3.xyxx +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r4.xxyx +endif +and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r2.xy, r2.xyxx, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r4.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r5.xxyx +endif +and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r5.xy, r1.yzyy, l(11, 11, 0, 0) +and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r5.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r1.yz, r1.yyzy, r2.xxyx +iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r6.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.zw, r6.xxxy, r6.zzzw +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r6.zwzz, r6.xyxx +endif +and r6.xy, r2.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r6.zw, r2.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.zwzz, r6.xyxx +ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r2.xy, r2.xyxx, r6.xyxx +ld r6.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r1.w, r0.x, l(17) +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +and r7.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r7.zw, r2.zzzw, l(0, 0, 11, 11) +and r7.zw, r7.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r7.yz, r2.zzwz, r7.xxyx +ld r2.zw, r1.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r8.zw, r2.zzzw, l(0, 0, 11, 11) +and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r8.yz, r2.zzwz, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx +store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy +iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r7.x, l(16), l(0), r2.x, r6.y +store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx +iadd r1.w, r0.z, r9.z +ushr r2.z, r3.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz +ushr r2.z, r4.x, l(16) +bfi r3.y, l(16), l(16), r1.y, r2.z +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r2.zw, r1.wwww, l(0, 0, 1, 2) +ushr r1.y, r1.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) +bfi r3.y, l(16), l(16), r2.y, r4.x +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww +ushr r1.y, r7.z, l(16) +bfi r3.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +and r2.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r2.zw, r1.yyyz, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r2.xy, r2.zwzz, r2.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +and r4.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r4.zw, r1.yyyz, l(0, 0, 11, 11) +and r4.zw, r4.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r5.xy, r1.yzyy, l(11, 11, 0, 0) +and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.xy, r3.xyxx, r5.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +and r3.xy, r1.yzyy, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r6.xy, r1.yzyy, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.xy, r3.xyxx, r6.xyxx +ushr r1.yz, r1.yyzy, l(0, 11, 11, 0) +and r1.yz, r1.yyzy, l(0, 0x001f001f, 0x001f001f, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r6.xy, r3.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.zw, r3.zzzw, r6.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r6.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r7.xy, r3.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r7.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +and r6.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r8.xy, r3.xyxx, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.zw, r6.zzzw, r8.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +and r8.xy, r6.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r8.zw, r6.zzzw, l(0, 0, 11, 11) +and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r6.zw, r6.zzzw, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx +store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx +iadd r0.x, r0.z, r10.y +ushr r1.w, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww +ushr r1.w, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r1.w +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) +bfi r9.y, l(16), l(16), r6.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +and r3.zw, r3.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r4.xy, r3.xyxx, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r3.zw, r3.zzzw, r4.xxxy +ushr r3.xy, r3.xyxx, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r3.xy, r3.xyxx, r3.zwzz +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r4.zwzz, r4.xyxx +endif +and r4.xy, r2.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r4.zw, r2.xxxy, l(0, 0, 11, 11) +and r4.zw, r4.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r4.xy, r4.zwzz, r4.xyxx +ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r4.xy, r2.xyxx, r4.xyxx +ld r2.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r5.zwzz, r5.xyxx +endif +and r5.xy, r2.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r5.zw, r2.xxxy, l(0, 0, 11, 11) +and r5.zw, r5.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r5.xy, r5.zwzz, r5.xyxx +ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r5.xy, r2.xyxx, r5.xyxx +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r6.xyxx +endif +and r2.zw, r2.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r6.xy, r2.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r2.zw, r2.zzzw, r6.xxxy +ushr r2.xy, r2.xyxx, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r2.xy, r2.xyxx, r2.zwzz +iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r2.zw, r6.xxxx, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +and r7.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r7.zw, r2.zzzw, l(0, 0, 11, 11) +and r7.zw, r7.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r5.zw, r2.zzzw, r7.xxxy +ld r2.zw, r6.yyyy, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r6.xxxy, r7.xxxy +endif +and r6.xy, r2.zwzz, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +ushr r2.zw, r2.zzzw, l(0, 0, 11, 11) +and r2.zw, r2.zzzw, l(0, 0, 0x001f001f, 0x001f001f) +iadd r2.zw, r2.zzzw, r6.xxxy +ld r6.xy, r6.zzzz, T0[0].xyzw +if_nz r1.x + ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) + ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r7.zwzz, r7.xyxx +endif +and r7.xy, r6.xyxx, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r7.zw, r6.xxxy, l(0, 0, 11, 11) +and r7.zw, r7.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r7.xy, r7.zwzz, r7.xyxx +ushr r6.xy, r6.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +iadd r0.x, r0.w, l(17) +ld r7.xy, r6.wwww, T0[0].xyzw +if_nz r1.x + ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r7.xy, r7.zwzz, r8.xyxx +endif +and r7.zw, r7.xxxy, l(0, 0, 0x07e007e0, 0x07e007e0) +ishl r8.xy, r7.xyxx, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +iadd r7.zw, r7.zzzw, r8.xxxy +ushr r7.xy, r7.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0x001f001f, 0x001f001f, 0, 0) +iadd r7.yz, r7.xxyx, r7.zzwz +ld r0.xw, r0.xxxx, T0[0].xzwy +if_nz r1.x + ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r8.zzzw, r8.xxxy +endif +and r8.xy, r0.xwxx, l(0x07e007e0, 0x07e007e0, 0, 0) +ishl r8.zw, r0.xxxw, l(0, 0, 11, 11) +and r8.zw, r8.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +iadd r8.xy, r8.zwzz, r8.xyxx +ushr r0.xw, r0.xxxw, l(11, 0, 0, 11) +and r0.xw, r0.xxxw, l(0x001f001f, 0, 0, 0x001f001f) +iadd r8.yz, r0.xxwx, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy +bfi r7.x, l(16), l(0), r2.z, r6.y +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.x, r0.z, r1.y +ushr r0.y, r3.y, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy +ushr r0.y, r4.x, l(16) +bfi r1.y, l(16), l(16), r2.x, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) +ushr r1.x, r2.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx +ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) +bfi r1.y, l(16), l(16), r2.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz +ushr r0.y, r7.z, l(16) +bfi r1.y, l(16), l(16), r8.y, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r2.y +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx +ret +// Approximately 734 instruction slots used +#endif + +const BYTE texture_load_r5g6b5_b5g6r5_3x_cs[] = +{ + 68, 88, 66, 67, 106, 104, + 41, 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Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_is_tiled_3d_endian;// Offset: 0 Size: 4 +// uint xe_texture_load_guest_offset; // Offset: 4 Size: 4 +// uint xe_texture_load_guest_pitch_aligned;// Offset: 8 Size: 4 +// uint xe_texture_load_guest_z_stride_block_rows_aligned;// Offset: 12 Size: 4 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_host_offset; // Offset: 28 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 32 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 36 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 5 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r0.yzw, r0.xxyz, CB0[0][1].xxyz +or r0.y, r0.z, r0.y +or r0.y, r0.w, r0.y +if_nz r0.y + ret +endif +ishl r0.y, r0.x, l(1) +imad r0.z, vThreadID.z, CB0[0][1].y, vThreadID.y +imad r0.z, r0.z, CB0[0][2].x, r0.y +iadd r0.z, r0.z, CB0[0][1].w +and r0.w, CB0[0][0].x, l(1) +if_nz r0.w + and r1.x, CB0[0][0].x, l(2) + if_nz r1.x + ishr r1.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r2.xy, CB0[0][0].wzww, l(4, 5, 0, 0) + imad r1.x, r1.y, r2.x, r1.x + ibfe r1.w, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r2.y, r1.w + ishl r1.w, vThreadID.y, l(9) + ishr r1.w, r1.w, l(6) + iadd r1.y, r1.y, r1.z + and r1.zw, r1.yyyw, l(0, 0, 1, 48) + ishr r2.x, r0.x, l(3) + bfi r1.y, l(1), l(1), r1.y, l(0) + iadd r1.y, r1.y, r2.x + bfi r1.y, l(2), l(1), r1.y, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.xz, l(21, 0, 21, 0), l(9, 0, 12, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xz, r1.wwww, l(2, 0, 16, 0), r1.xxzx + bfi r1.xz, l(2, 0, 2, 0), l(7, 0, 10, 0), vThreadID.zzzz, r1.xxzx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.y, l(4) + bfi r1.y, l(2), l(8), r1.y, l(0) + imad r1.y, r2.x, l(32), r1.y + imad r1.y, r2.y, l(4), r1.y + bfi r1.xz, l(5, 0, 5, 0), l(0, 0, 3, 0), r1.wwww, r1.xxzx + bfi r1.y, l(9), l(3), r1.y, r1.z + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + ushr r2.x, CB0[0][0].z, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r0.x, r0.x, l(3) + iadd r0.x, r0.x, r1.z + bfi r0.x, l(2), l(6), r0.x, l(0) + iadd r0.x, r1.y, r0.x + bfi r1.x, l(6), l(0), r2.x, r0.x + endif +else + imad r0.x, vThreadID.z, CB0[0][0].w, vThreadID.y + imad r1.x, r0.x, CB0[0][0].z, r0.y +endif +iadd r0.x, r1.x, CB0[0][0].y +ushr r0.xz, r0.xxzx, l(4, 0, 4, 0) +ushr r0.y, CB0[0][0].x, l(2) +ld r1.xyzw, r0.xxxx, T0[0].xyzw +ieq r0.y, r0.y, l(1) +if_nz r0.y + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r3.xyzw +endif +and r2.xyzw, r1.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r3.xyzw, r1.xyzw, l(11, 11, 11, 11) +and r3.xyzw, r3.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r2.xyzw, r2.xyzw, r3.xyzw +ushr r1.xyzw, r1.xyzw, l(11, 11, 11, 11) +and r1.xyzw, r1.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r1.xyzw, r1.xyzw, r2.xyzw +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +iadd r1.x, r0.z, l(1) +movc r0.w, r0.w, l(4), l(1) +iadd r0.x, r0.w, r0.x +ld r2.xyzw, r0.xxxx, T0[0].xyzw +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +and r3.xyzw, r2.xyzw, l(0x07e007e0, 0x07e007e0, 0x07e007e0, 0x07e007e0) +ishl r4.xyzw, r2.xyzw, l(11, 11, 11, 11) +and r4.xyzw, r4.xyzw, l(0xf800f800, 0xf800f800, 0xf800f800, 0xf800f800) +iadd r3.xyzw, r3.xyzw, r4.xyzw +ushr r2.xyzw, r2.xyzw, l(11, 11, 11, 11) +and r2.xyzw, r2.xyzw, l(0x001f001f, 0x001f001f, 0x001f001f, 0x001f001f) +iadd r2.xyzw, r2.xyzw, r3.xyzw +store_uav_typed U0[0].xyzw, r1.xxxx, r2.xyzw +ret +// Approximately 105 instruction slots used +#endif + +const BYTE texture_load_r5g6b5_b5g6r5_cs[] = +{ + 68, 88, 66, 67, 12, 44, + 177, 221, 163, 81, 24, 147, + 71, 109, 207, 212, 96, 115, + 214, 210, 1, 0, 0, 0, + 220, 18, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 24, 4, 0, 0, 40, 4, + 0, 0, 56, 4, 0, 0, + 64, 18, 0, 0, 82, 68, + 69, 70, 220, 3, 0, 0, + 1, 0, 0, 0, 248, 0, + 0, 0, 3, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 83, 67, 0, 5, 4, 0, + 177, 3, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 180, 0, 0, 0, 2, 0, + 0, 0, 4, 0, 0, 0, + 1, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 1, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 203, 0, + 0, 0, 4, 0, 0, 0, + 4, 0, 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64, 0, 0, 11, 0, + 0, 0, 11, 0, 0, 0, + 11, 0, 0, 0, 11, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 4, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 2, 64, + 0, 0, 0, 248, 0, 248, + 0, 248, 0, 248, 0, 248, + 0, 248, 0, 248, 0, 248, + 30, 0, 0, 7, 242, 0, + 16, 0, 3, 0, 0, 0, + 70, 14, 16, 0, 3, 0, + 0, 0, 70, 14, 16, 0, + 4, 0, 0, 0, 85, 0, + 0, 10, 242, 0, 16, 0, + 2, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 11, 0, + 0, 0, 11, 0, 0, 0, + 11, 0, 0, 0, 11, 0, + 0, 0, 1, 0, 0, 10, + 242, 0, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 2, 0, 0, 0, 2, 64, + 0, 0, 31, 0, 31, 0, + 31, 0, 31, 0, 31, 0, + 31, 0, 31, 0, 31, 0, + 30, 0, 0, 7, 242, 0, + 16, 0, 2, 0, 0, 0, + 70, 14, 16, 0, 2, 0, + 0, 0, 70, 14, 16, 0, + 3, 0, 0, 0, 164, 0, + 0, 8, 242, 224, 33, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 6, 0, 16, 0, + 1, 0, 0, 0, 70, 14, + 16, 0, 2, 0, 0, 0, + 62, 0, 0, 1, 83, 84, + 65, 84, 148, 0, 0, 0, + 105, 0, 0, 0, 5, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 40, 0, 0, 0, + 28, 0, 0, 0, 4, 0, + 0, 0, 5, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 1, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0 +}; diff --git a/src/xenia/gpu/d3d12/shaders/clear_uint2.ps.hlsl b/src/xenia/gpu/shaders/clear_uint2.ps.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/clear_uint2.ps.hlsl rename to src/xenia/gpu/shaders/clear_uint2.ps.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/continuous_quad.hs.hlsl b/src/xenia/gpu/shaders/continuous_quad.hs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/continuous_quad.hs.hlsl rename to src/xenia/gpu/shaders/continuous_quad.hs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/continuous_triangle.hs.hlsl b/src/xenia/gpu/shaders/continuous_triangle.hs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/continuous_triangle.hs.hlsl rename to src/xenia/gpu/shaders/continuous_triangle.hs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/discrete_quad.hs.hlsl b/src/xenia/gpu/shaders/discrete_quad.hs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/discrete_quad.hs.hlsl rename to src/xenia/gpu/shaders/discrete_quad.hs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/discrete_triangle.hs.hlsl b/src/xenia/gpu/shaders/discrete_triangle.hs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/discrete_triangle.hs.hlsl rename to src/xenia/gpu/shaders/discrete_triangle.hs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/edram.hlsli b/src/xenia/gpu/shaders/edram.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/edram.hlsli rename to src/xenia/gpu/shaders/edram.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/endian.hlsli b/src/xenia/gpu/shaders/endian.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/endian.hlsli rename to src/xenia/gpu/shaders/endian.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/float24_round.ps.hlsl b/src/xenia/gpu/shaders/float24_round.ps.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/float24_round.ps.hlsl rename to src/xenia/gpu/shaders/float24_round.ps.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/float24_truncate.ps.hlsl b/src/xenia/gpu/shaders/float24_truncate.ps.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/float24_truncate.ps.hlsl rename to src/xenia/gpu/shaders/float24_truncate.ps.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/fullscreen.vs.hlsl b/src/xenia/gpu/shaders/fullscreen.vs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/fullscreen.vs.hlsl rename to src/xenia/gpu/shaders/fullscreen.vs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/fullscreen_tc.vs.hlsl b/src/xenia/gpu/shaders/fullscreen_tc.vs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/fullscreen_tc.vs.hlsl rename to src/xenia/gpu/shaders/fullscreen_tc.vs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store.hlsli b/src/xenia/gpu/shaders/host_depth_store.hlsli similarity index 87% rename from src/xenia/gpu/d3d12/shaders/host_depth_store.hlsli rename to src/xenia/gpu/shaders/host_depth_store.hlsli index 190d8b03e..b55c4bf4c 100644 --- a/src/xenia/gpu/d3d12/shaders/host_depth_store.hlsli +++ b/src/xenia/gpu/shaders/host_depth_store.hlsli @@ -30,8 +30,8 @@ uint XeHostDepthStoreResolutionScale() { return (xe_host_depth_store_render_target >> 10u) & 0x3u; } -uint XeHostDepthStoreSecondSampleIndex() { - return (xe_host_depth_store_render_target >> 12u) & 0x3u; +bool XeHostDepthStoreMsaa2xSupported() { + return bool((xe_host_depth_store_render_target >> 12u) & 0x1u); } // 40-sample columns are not swapped for addressing simplicity (because this is diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store_1xmsaa.cs.hlsl b/src/xenia/gpu/shaders/host_depth_store_1xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/host_depth_store_1xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/host_depth_store_1xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store_2xmsaa.cs.hlsl b/src/xenia/gpu/shaders/host_depth_store_2xmsaa.cs.hlsl similarity index 89% rename from src/xenia/gpu/d3d12/shaders/host_depth_store_2xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/host_depth_store_2xmsaa.cs.hlsl index f8c31b22e..b118351e5 100644 --- a/src/xenia/gpu/d3d12/shaders/host_depth_store_2xmsaa.cs.hlsl +++ b/src/xenia/gpu/shaders/host_depth_store_2xmsaa.cs.hlsl @@ -21,8 +21,11 @@ void main(uint3 xe_thread_id : SV_DispatchThreadID) { kXenosMsaaSamples_2X, false, 0u, dest_sample_index, resolution_scale) >> 2u; + // Top and bottom to Direct3D 10.1+ top 1 and bottom 0 (for 2x) or top-left 0 + // and bottom-right 3 (for 4x). int source_sample_index = - int(dest_sample_index != 0u ? XeHostDepthStoreSecondSampleIndex() : 0u); + XeHostDepthStoreMsaa2xSupported() ? (dest_sample_index ? 0u : 1u) + : (dest_sample_index ? 3u : 0u); xe_host_depth_store_dest[edram_address_int4s] = asuint(float4( xe_host_depth_store_source.Load(int2(pixel_index), source_sample_index), xe_host_depth_store_source.Load(int2(pixel_index) + int2(1, 0), diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store_4xmsaa.cs.hlsl b/src/xenia/gpu/shaders/host_depth_store_4xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/host_depth_store_4xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/host_depth_store_4xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/passthrough_position_xy.vs.hlsl b/src/xenia/gpu/shaders/passthrough_position_xy.vs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/passthrough_position_xy.vs.hlsl rename to src/xenia/gpu/shaders/passthrough_position_xy.vs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/pixel_formats.hlsli b/src/xenia/gpu/shaders/pixel_formats.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/pixel_formats.hlsli rename to src/xenia/gpu/shaders/pixel_formats.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/primitive_point_list.gs.hlsl b/src/xenia/gpu/shaders/primitive_point_list.gs.hlsl similarity index 95% rename from src/xenia/gpu/d3d12/shaders/primitive_point_list.gs.hlsl rename to src/xenia/gpu/shaders/primitive_point_list.gs.hlsl index ab165504a..18afd2a7f 100644 --- a/src/xenia/gpu/d3d12/shaders/primitive_point_list.gs.hlsl +++ b/src/xenia/gpu/shaders/primitive_point_list.gs.hlsl @@ -12,7 +12,6 @@ void main(point XeVertexPreGS xe_in[1], XeVertexPostGS xe_out; xe_out.pre_ps.interpolators = xe_in[0].post_gs.pre_ps.interpolators; xe_out.pre_ps.point_params.z = xe_in[0].post_gs.pre_ps.point_params.z; - xe_out.pre_ps.clip_space_zw = xe_in[0].post_gs.pre_ps.clip_space_zw; xe_out.position.zw = xe_in[0].post_gs.position.zw; xe_out.clip_distance_0123 = xe_in[0].post_gs.clip_distance_0123; xe_out.clip_distance_45 = xe_in[0].post_gs.clip_distance_45; @@ -22,7 +21,7 @@ void main(point XeVertexPreGS xe_in[1], float2 point_size = xe_in[0].post_gs.pre_ps.point_params.z > 0.0f ? xe_in[0].post_gs.pre_ps.point_params.zz - : xe_point_size; + : float2(xe_point_size_x, xe_point_size_y); point_size = clamp(point_size, xe_point_size_min_max.xx, xe_point_size_min_max.yy) * xe_point_screen_to_ndc * xe_in[0].post_gs.position.w; diff --git a/src/xenia/gpu/shaders/primitive_quad_list.gs.hlsl b/src/xenia/gpu/shaders/primitive_quad_list.gs.hlsl new file mode 100644 index 000000000..874ee4247 --- /dev/null +++ b/src/xenia/gpu/shaders/primitive_quad_list.gs.hlsl @@ -0,0 +1,23 @@ +#include "xenos_draw.hlsli" + +[maxvertexcount(4)] +void main(lineadj XeVertexPreGS xe_in[4], + inout TriangleStream xe_stream) { + // Culling should probably be done per-triangle - while there's no + // RETAIN_QUADS on Adreno 2xx, on R6xx it's always disabled for + // non-tessellated quads, so they are always decomposed into triangles. + // Therefore, not doing any cull distance or NaN position checks here. + // TODO(Triang3l): Find whether vertex killing should actually work for each + // triangle or for the entire quad. + // TODO(Triang3l): Find the correct order. + XeVertexPostGS xe_out; + xe_out = xe_in[0].post_gs; + xe_stream.Append(xe_out); + xe_out = xe_in[1].post_gs; + xe_stream.Append(xe_out); + xe_out = xe_in[3].post_gs; + xe_stream.Append(xe_out); + xe_out = xe_in[2].post_gs; + xe_stream.Append(xe_out); + xe_stream.RestartStrip(); +} diff --git a/src/xenia/gpu/d3d12/shaders/primitive_rectangle_list.gs.hlsl b/src/xenia/gpu/shaders/primitive_rectangle_list.gs.hlsl similarity index 94% rename from src/xenia/gpu/d3d12/shaders/primitive_rectangle_list.gs.hlsl rename to src/xenia/gpu/shaders/primitive_rectangle_list.gs.hlsl index 45b7b05e5..13d16d60d 100644 --- a/src/xenia/gpu/d3d12/shaders/primitive_rectangle_list.gs.hlsl +++ b/src/xenia/gpu/shaders/primitive_rectangle_list.gs.hlsl @@ -89,10 +89,6 @@ void main(triangle XeVertexPreGS xe_in[3], v3_signs.x * xe_in[0].post_gs.pre_ps.point_params + v3_signs.y * xe_in[1].post_gs.pre_ps.point_params + v3_signs.z * xe_in[2].post_gs.pre_ps.point_params; - xe_out.pre_ps.clip_space_zw = - v3_signs.x * xe_in[0].post_gs.pre_ps.clip_space_zw + - v3_signs.y * xe_in[1].post_gs.pre_ps.clip_space_zw + - v3_signs.z * xe_in[2].post_gs.pre_ps.clip_space_zw; xe_out.position = v3_signs.x * xe_in[0].post_gs.position + v3_signs.y * xe_in[1].post_gs.position + v3_signs.z * xe_in[2].post_gs.position; diff --git a/src/xenia/gpu/d3d12/shaders/resolve.hlsli b/src/xenia/gpu/shaders/resolve.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve.hlsli rename to src/xenia/gpu/shaders/resolve.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_clear_32bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_clear_32bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_clear_32bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_clear_32bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_clear_32bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_clear_32bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_clear_64bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_clear_64bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_clear_64bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_clear_64bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_clear_64bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_clear_64bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_1x2xmsaa.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_32bpp_1x2xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_1x2xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_32bpp_1x2xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_32bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_32bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_4xmsaa.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_32bpp_4xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_4xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_32bpp_4xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_1x2xmsaa.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_64bpp_1x2xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_1x2xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_64bpp_1x2xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_64bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_64bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_64bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_64bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_4xmsaa.cs.hlsl b/src/xenia/gpu/shaders/resolve_fast_64bpp_4xmsaa.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_4xmsaa.cs.hlsl rename to src/xenia/gpu/shaders/resolve_fast_64bpp_4xmsaa.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_128bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_128bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_128bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_128bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_128bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_16bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_16bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_16bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_16bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_16bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_32bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_32bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_32bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_32bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_32bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_64bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_64bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_64bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_64bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_64bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_8bpp.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_8bpp.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_8bpp.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_8bpp.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_2xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_8bpp_2xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_2xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_8bpp_2xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_3xres.cs.hlsl b/src/xenia/gpu/shaders/resolve_full_8bpp_3xres.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_3xres.cs.hlsl rename to src/xenia/gpu/shaders/resolve_full_8bpp_3xres.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/stretch.ps.hlsl b/src/xenia/gpu/shaders/stretch.ps.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/stretch.ps.hlsl rename to src/xenia/gpu/shaders/stretch.ps.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/stretch_gamma.ps.hlsl b/src/xenia/gpu/shaders/stretch_gamma.ps.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/stretch_gamma.ps.hlsl rename to src/xenia/gpu/shaders/stretch_gamma.ps.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/tessellation_adaptive.vs.hlsl b/src/xenia/gpu/shaders/tessellation_adaptive.vs.hlsl similarity index 84% rename from src/xenia/gpu/d3d12/shaders/tessellation_adaptive.vs.hlsl rename to src/xenia/gpu/shaders/tessellation_adaptive.vs.hlsl index dc004a403..fff6c501c 100644 --- a/src/xenia/gpu/d3d12/shaders/tessellation_adaptive.vs.hlsl +++ b/src/xenia/gpu/shaders/tessellation_adaptive.vs.hlsl @@ -3,8 +3,8 @@ XeHSControlPointInputAdaptive main(uint xe_edge_factor : SV_VertexID) { XeHSControlPointInputAdaptive output; - // The Xbox 360's GPU accepts the tessellation factors for edges through a - // special kind of an index buffer. + // The Xbox 360's GPU accepts the float32 tessellation factors for edges + // through a special kind of an index buffer. // While Viva Pinata sets the factors to 0 for frustum-culled (quad) patches, // in Halo 3 only allowing patches with factors above 0 makes distant // (triangle) patches disappear - it appears that there are no special values diff --git a/src/xenia/gpu/shaders/tessellation_indexed.vs.hlsl b/src/xenia/gpu/shaders/tessellation_indexed.vs.hlsl new file mode 100644 index 000000000..9ecf576ee --- /dev/null +++ b/src/xenia/gpu/shaders/tessellation_indexed.vs.hlsl @@ -0,0 +1,15 @@ +#include "endian.hlsli" +#include "xenos_draw.hlsli" + +XeHSControlPointInputIndexed main(uint xe_vertex_id : SV_VertexID) { + XeHSControlPointInputIndexed output; + // Only the lower 24 bits of the vertex index are used (tested on an Adreno + // 200 phone). `((index & 0xFFFFFF) + offset) & 0xFFFFFF` is the same as + // `(index + offset) & 0xFFFFFF`. + output.index = + float(clamp((XeEndianSwap32(xe_vertex_id, xe_vertex_index_endian) + + xe_vertex_index_offset) & + 0xFFFFFFu, + xe_vertex_index_min_max.x, xe_vertex_index_min_max.y)); + return output; +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_address.hlsli b/src/xenia/gpu/shaders/texture_address.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_address.hlsli rename to src/xenia/gpu/shaders/texture_address.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load.hlsli b/src/xenia/gpu/shaders/texture_load.hlsli similarity index 96% rename from src/xenia/gpu/d3d12/shaders/texture_load.hlsli rename to src/xenia/gpu/shaders/texture_load.hlsli index 94de4b420..e731b5584 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load.hlsli +++ b/src/xenia/gpu/shaders/texture_load.hlsli @@ -11,7 +11,7 @@ cbuffer XeTextureLoadConstants : register(b0) { // For tiled textures - row pitch in blocks, aligned to 32. // For linear textures - row pitch in bytes. uint xe_texture_load_guest_pitch_aligned; - // Must be aligned to 32. + // For 3D textures only (ignored otherwise) - aligned to 32. uint xe_texture_load_guest_z_stride_block_rows_aligned; // If this is a packed mip tail, this is aligned to tile dimensions. diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_128bpb.cs.hlsl b/src/xenia/gpu/shaders/texture_load_128bpb.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_128bpb.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_128bpb.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_128bpb_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_128bpb_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_128bpb_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_128bpb_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_128bpb_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_128bpb_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_128bpb_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_128bpb_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb.cs.hlsl b/src/xenia/gpu/shaders/texture_load_16bpb.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_16bpb.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_16bpb.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb.hlsli b/src/xenia/gpu/shaders/texture_load_16bpb.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_16bpb.hlsli rename to src/xenia/gpu/shaders/texture_load_16bpb.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_16bpb_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_16bpb_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.hlsli b/src/xenia/gpu/shaders/texture_load_16bpb_2x.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.hlsli rename to src/xenia/gpu/shaders/texture_load_16bpb_2x.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_16bpb_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_16bpb_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.hlsli b/src/xenia/gpu/shaders/texture_load_16bpb_3x.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.hlsli rename to src/xenia/gpu/shaders/texture_load_16bpb_3x.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.cs.hlsl b/src/xenia/gpu/shaders/texture_load_32bpb.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_32bpb.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.hlsli b/src/xenia/gpu/shaders/texture_load_32bpb.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb.hlsli rename to src/xenia/gpu/shaders/texture_load_32bpb.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_32bpb_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_32bpb_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.hlsli b/src/xenia/gpu/shaders/texture_load_32bpb_2x.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.hlsli rename to src/xenia/gpu/shaders/texture_load_32bpb_2x.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_32bpb_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_32bpb_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.hlsli b/src/xenia/gpu/shaders/texture_load_32bpb_3x.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.hlsli rename to src/xenia/gpu/shaders/texture_load_32bpb_3x.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb.hlsli b/src/xenia/gpu/shaders/texture_load_32bpb_64bpb.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb.hlsli rename to src/xenia/gpu/shaders/texture_load_32bpb_64bpb.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_2x.hlsli b/src/xenia/gpu/shaders/texture_load_32bpb_64bpb_2x.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_2x.hlsli rename to src/xenia/gpu/shaders/texture_load_32bpb_64bpb_2x.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_3x.hlsli b/src/xenia/gpu/shaders/texture_load_32bpb_64bpb_3x.hlsli similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_3x.hlsli rename to src/xenia/gpu/shaders/texture_load_32bpb_64bpb_3x.hlsli diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_64bpb.cs.hlsl b/src/xenia/gpu/shaders/texture_load_64bpb.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_64bpb.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_64bpb.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_64bpb_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_64bpb_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_64bpb_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_64bpb_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_64bpb_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_64bpb_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_64bpb_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_64bpb_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_8bpb.cs.hlsl b/src/xenia/gpu/shaders/texture_load_8bpb.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_8bpb.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_8bpb.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_8bpb_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_8bpb_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_8bpb_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_8bpb_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_8bpb_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_8bpb_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_8bpb_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_8bpb_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_ctx1.cs.hlsl b/src/xenia/gpu/shaders/texture_load_ctx1.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_ctx1.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_ctx1.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float.cs.hlsl b/src/xenia/gpu/shaders/texture_load_depth_float.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_depth_float.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_depth_float.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_depth_float_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_depth_float_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_depth_float_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_depth_float_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_depth_float_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_depth_float_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm.cs.hlsl b/src/xenia/gpu/shaders/texture_load_depth_unorm.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_depth_unorm.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_depth_unorm_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_depth_unorm_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_depth_unorm_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_depth_unorm_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxn_rg8.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxn_rg8.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxn_rg8.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxn_rg8.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxt1_rgba8.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxt1_rgba8.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxt1_rgba8.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxt1_rgba8.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxt3_rgba8.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxt3_rgba8.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxt3_rgba8.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxt3_rgba8.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxt3a.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxt3a.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxt3a.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxt3a.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxt3aas1111.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxt3aas1111.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxt3aas1111.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxt3aas1111.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxt5_rgba8.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxt5_rgba8.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxt5_rgba8.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxt5_rgba8.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_dxt5a_r8.cs.hlsl b/src/xenia/gpu/shaders/texture_load_dxt5a_r8.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_dxt5a_r8.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_dxt5a_r8.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_snorm.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_snorm.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_snorm_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_snorm_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_snorm.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_snorm.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_snorm_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_snorm_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r4g4b4a4_b4g4r4a4.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r4g4b4a4_b4g4r4a4.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r4g4b4a4_b4g4r4a4_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r4g4b4a4_b4g4r4a4_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g5b5a1_b5g5r5a1.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g5b5a1_b5g5r5a1.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g5b5a1_b5g5r5a1_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g5b5a1_b5g5r5a1_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g6b5_b5g6r5.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g6b5_b5g6r5.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_2x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g6b5_b5g6r5_2x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_2x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g6b5_b5g6r5_2x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl b/src/xenia/gpu/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl similarity index 100% rename from src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl rename to src/xenia/gpu/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl diff --git a/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli b/src/xenia/gpu/shaders/xenos_draw.hlsli similarity index 94% rename from src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli rename to src/xenia/gpu/shaders/xenos_draw.hlsli index b1756cf44..a222eac9a 100644 --- a/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli +++ b/src/xenia/gpu/shaders/xenos_draw.hlsli @@ -7,31 +7,32 @@ cbuffer xe_system_cbuffer : register(b0) { uint xe_line_loop_closing_index; uint xe_vertex_index_endian; - int xe_vertex_base_index; - float2 xe_point_size; - - float2 xe_point_size_min_max; - float2 xe_point_screen_to_ndc; + uint xe_vertex_index_offset; + uint2 xe_vertex_index_min_max; float4 xe_user_clip_planes[6]; float3 xe_ndc_scale; - uint xe_interpolator_sampling_pattern; + float xe_point_size_x; float3 xe_ndc_offset; + float xe_point_size_y; + + float2 xe_point_size_min_max; + float2 xe_point_screen_to_ndc; + + uint xe_interpolator_sampling_pattern; uint xe_ps_param_gen; + uint2 xe_sample_count_log2; uint4 xe_texture_swizzled_signs[2]; uint xe_textures_resolved; - uint2 xe_sample_count_log2; float xe_alpha_test_reference; - - float4 xe_color_exp_bias; - uint xe_alpha_to_mask; uint xe_edram_pitch_tiles; - float2 xe_edram_depth_range; + + float4 xe_color_exp_bias; float2 xe_edram_poly_offset_front; float2 xe_edram_poly_offset_back; @@ -70,7 +71,6 @@ struct XeHSControlPointOutput { struct XeVertexPrePS { float4 interpolators[16] : TEXCOORD0; float3 point_params : TEXCOORD16; - float2 clip_space_zw : TEXCOORD17; }; struct XeVertexPostGS { diff --git a/src/xenia/gpu/shared_memory.h b/src/xenia/gpu/shared_memory.h index 7e6bcb9a0..386997bab 100644 --- a/src/xenia/gpu/shared_memory.h +++ b/src/xenia/gpu/shared_memory.h @@ -129,11 +129,11 @@ class SharedMemory { bool written_by_gpu_resolve); // Uploads a range of host pages - only called if host GPU sparse memory - // allocation succeeded if needed. While uploading, MarkRangeValid must be + // allocation succeeded if needed. While uploading, MakeRangeValid must be // called for each successfully uploaded range as early as possible, before // the memcpy, to make sure invalidation that happened during the CPU -> GPU // memcpy isn't missed (upload_page_ranges is in pages because of this - - // MarkRangeValid has page granularity). upload_page_ranges are sorted in + // MakeRangeValid has page granularity). upload_page_ranges are sorted in // ascending address order, so front and back can be used to determine the // overall bounds of pages to be uploaded. virtual bool UploadRanges( diff --git a/src/xenia/gpu/texture_dump.cc b/src/xenia/gpu/texture_dump.cc index a8e0692b5..d105d3cbf 100644 --- a/src/xenia/gpu/texture_dump.cc +++ b/src/xenia/gpu/texture_dump.cc @@ -30,7 +30,7 @@ void TextureDump(const TextureInfo& src, void* buffer, size_t length) { struct { uint32_t size; uint32_t flags; - uint32_t fourcc; + be fourcc; uint32_t rgb_bit_count; uint32_t r_bit_mask; uint32_t g_bit_mask; @@ -59,17 +59,17 @@ void TextureDump(const TextureInfo& src, void* buffer, size_t length) { switch (src.format) { case xenos::TextureFormat::k_DXT1: { dds_header.pixel_format.flags = 0x4u; - dds_header.pixel_format.fourcc = '1TXD'; + dds_header.pixel_format.fourcc = make_fourcc("DXT1"); break; } case xenos::TextureFormat::k_DXT2_3: { dds_header.pixel_format.flags = 0x4u; - dds_header.pixel_format.fourcc = '3TXD'; + dds_header.pixel_format.fourcc = make_fourcc("DXT3"); break; } case xenos::TextureFormat::k_DXT4_5: { dds_header.pixel_format.flags = 0x4u; - dds_header.pixel_format.fourcc = '5TXD'; + dds_header.pixel_format.fourcc = make_fourcc("DXT5"); break; } case xenos::TextureFormat::k_8_8_8_8: { @@ -100,7 +100,7 @@ void TextureDump(const TextureInfo& src, void* buffer, size_t length) { FILE* handle = filesystem::OpenFile(path, "wb"); if (handle) { - const uint32_t signature = ' SDD'; + const char signature[4] = {'D', 'D', 'S', ' '}; fwrite(&signature, sizeof(signature), 1, handle); fwrite(&dds_header, sizeof(dds_header), 1, handle); fwrite(buffer, 1, length, handle); diff --git a/src/xenia/gpu/texture_info.cc b/src/xenia/gpu/texture_info.cc index d190fb31e..79ac7bbd9 100644 --- a/src/xenia/gpu/texture_info.cc +++ b/src/xenia/gpu/texture_info.cc @@ -78,14 +78,6 @@ bool TextureInfo::Prepare(const xe_gpu_texture_fetch_t& fetch, info.is_tiled = fetch.tiled; info.has_packed_mips = fetch.packed_mips; - if (info.format_info()->format == xenos::TextureFormat::kUnknown) { - XELOGE("Attempting to fetch from unsupported texture format {}", - info.format); - info.memory.base_address = fetch.base_address << 12; - info.memory.mip_address = fetch.mip_address << 12; - return false; - } - info.extent = TextureExtent::Calculate(out_info, true); info.SetupMemoryInfo(fetch.base_address << 12, fetch.mip_address << 12); @@ -125,12 +117,6 @@ bool TextureInfo::PrepareResolve(uint32_t physical_address, info.is_tiled = true; info.has_packed_mips = false; - if (info.format_info()->format == xenos::TextureFormat::kUnknown) { - assert_true("Unsupported texture format"); - info.memory.base_address = physical_address; - return false; - } - info.extent = TextureExtent::Calculate(out_info, true); info.SetupMemoryInfo(physical_address, 0); return true; diff --git a/src/xenia/gpu/texture_info.h b/src/xenia/gpu/texture_info.h index 5b4ac93c2..f5b8a3728 100644 --- a/src/xenia/gpu/texture_info.h +++ b/src/xenia/gpu/texture_info.h @@ -99,37 +99,6 @@ inline xenos::TextureFormat ColorFormatToTextureFormat( return static_cast(color_format); } -inline xenos::TextureFormat ColorRenderTargetToTextureFormat( - xenos::ColorRenderTargetFormat color_format) { - switch (color_format) { - case xenos::ColorRenderTargetFormat::k_8_8_8_8: - return xenos::TextureFormat::k_8_8_8_8; - case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: - return xenos::TextureFormat::k_8_8_8_8_GAMMA_EDRAM; - case xenos::ColorRenderTargetFormat::k_2_10_10_10: - case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: - return xenos::TextureFormat::k_2_10_10_10; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: - return xenos::TextureFormat::k_2_10_10_10_FLOAT_EDRAM; - case xenos::ColorRenderTargetFormat::k_16_16: - return xenos::TextureFormat::k_16_16_EDRAM; - case xenos::ColorRenderTargetFormat::k_16_16_16_16: - return xenos::TextureFormat::k_16_16_16_16_EDRAM; - case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: - return xenos::TextureFormat::k_16_16_FLOAT; - case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: - return xenos::TextureFormat::k_16_16_16_16_FLOAT; - case xenos::ColorRenderTargetFormat::k_32_FLOAT: - return xenos::TextureFormat::k_32_FLOAT; - case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: - return xenos::TextureFormat::k_32_32_FLOAT; - default: - assert_unhandled_case(color_format); - return xenos::TextureFormat::kUnknown; - } -} - inline xenos::TextureFormat DepthRenderTargetToTextureFormat( xenos::DepthRenderTargetFormat depth_format) { switch (depth_format) { @@ -139,7 +108,7 @@ inline xenos::TextureFormat DepthRenderTargetToTextureFormat( return xenos::TextureFormat::k_24_8_FLOAT; default: assert_unhandled_case(depth_format); - return xenos::TextureFormat::kUnknown; + return xenos::TextureFormat(~0); } } diff --git a/src/xenia/gpu/trace_viewer.cc b/src/xenia/gpu/trace_viewer.cc index 5297d6856..cfc82bf2a 100644 --- a/src/xenia/gpu/trace_viewer.cc +++ b/src/xenia/gpu/trace_viewer.cc @@ -28,6 +28,7 @@ #include "xenia/memory.h" #include "xenia/ui/file_picker.h" #include "xenia/ui/imgui_drawer.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/window.h" #include "xenia/xbox.h" @@ -135,7 +136,7 @@ bool TraceViewer::Setup() { window_->set_imgui_input_enabled(true); window_->on_key_char.AddListener([&](xe::ui::KeyEvent* e) { - if (e->key_code() == 0x74 /* VK_F5 */) { + if (e->virtual_key() == xe::ui::VirtualKey::kF5) { graphics_system_->ClearCaches(); e->set_handled(true); } @@ -1031,7 +1032,7 @@ void ProgressBar(float frac, float width, float height = 0, if (height == 0) { height = ImGui::GetTextLineHeightWithSpacing(); } - frac = xe::saturate(frac); + frac = xe::saturate_unsigned(frac); const auto fontAtlas = ImGui::GetIO().Fonts; diff --git a/src/xenia/gpu/vulkan/buffer_cache.cc b/src/xenia/gpu/vulkan/buffer_cache.cc index 31aed6982..a02d9b54e 100644 --- a/src/xenia/gpu/vulkan/buffer_cache.cc +++ b/src/xenia/gpu/vulkan/buffer_cache.cc @@ -120,7 +120,7 @@ VkResult BufferCache::Initialize() { // Create a memory allocator for textures. VmaVulkanFunctions vulkan_funcs = {}; - ui::vulkan::FillVMAVulkanFunctions(&vulkan_funcs); + ui::vulkan::FillVMAVulkanFunctions(&vulkan_funcs, *device_); VmaAllocatorCreateInfo alloc_info = { 0, *device_, *device_, 0, 0, nullptr, nullptr, 0, nullptr, &vulkan_funcs, @@ -144,7 +144,8 @@ VkResult BufferCache::Initialize() { return VK_SUCCESS; } -VkResult xe::gpu::vulkan::BufferCache::CreateVertexDescriptorPool() { +VkResult BufferCache::CreateVertexDescriptorPool() { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; std::vector pool_sizes; @@ -170,8 +171,8 @@ VkResult xe::gpu::vulkan::BufferCache::CreateVertexDescriptorPool() { 1, &binding, }; - status = vkCreateDescriptorSetLayout(*device_, &layout_info, nullptr, - &vertex_descriptor_set_layout_); + status = dfn.vkCreateDescriptorSetLayout(*device_, &layout_info, nullptr, + &vertex_descriptor_set_layout_); if (status != VK_SUCCESS) { return status; } @@ -179,14 +180,16 @@ VkResult xe::gpu::vulkan::BufferCache::CreateVertexDescriptorPool() { return VK_SUCCESS; } -void xe::gpu::vulkan::BufferCache::FreeVertexDescriptorPool() { +void BufferCache::FreeVertexDescriptorPool() { vertex_descriptor_pool_.reset(); - VK_SAFE_DESTROY(vkDestroyDescriptorSetLayout, *device_, - vertex_descriptor_set_layout_, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyDescriptorSetLayout, *device_, + vertex_descriptor_set_layout_); } VkResult BufferCache::CreateConstantDescriptorSet() { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Descriptor pool used for all of our cached descriptors. @@ -204,8 +207,8 @@ VkResult BufferCache::CreateConstantDescriptorSet() { pool_sizes[0].descriptorCount = 2; transient_descriptor_pool_info.poolSizeCount = 1; transient_descriptor_pool_info.pPoolSizes = pool_sizes; - status = vkCreateDescriptorPool(*device_, &transient_descriptor_pool_info, - nullptr, &constant_descriptor_pool_); + status = dfn.vkCreateDescriptorPool(*device_, &transient_descriptor_pool_info, + nullptr, &constant_descriptor_pool_); if (status != VK_SUCCESS) { return status; } @@ -237,9 +240,9 @@ VkResult BufferCache::CreateConstantDescriptorSet() { descriptor_set_layout_info.bindingCount = static_cast(xe::countof(bindings)); descriptor_set_layout_info.pBindings = bindings; - status = - vkCreateDescriptorSetLayout(*device_, &descriptor_set_layout_info, - nullptr, &constant_descriptor_set_layout_); + status = dfn.vkCreateDescriptorSetLayout(*device_, + &descriptor_set_layout_info, nullptr, + &constant_descriptor_set_layout_); if (status != VK_SUCCESS) { return status; } @@ -253,8 +256,8 @@ VkResult BufferCache::CreateConstantDescriptorSet() { set_alloc_info.descriptorPool = constant_descriptor_pool_; set_alloc_info.descriptorSetCount = 1; set_alloc_info.pSetLayouts = &constant_descriptor_set_layout_; - status = vkAllocateDescriptorSets(*device_, &set_alloc_info, - &constant_descriptor_set_); + status = dfn.vkAllocateDescriptorSets(*device_, &set_alloc_info, + &constant_descriptor_set_); if (status != VK_SUCCESS) { return status; } @@ -286,22 +289,24 @@ VkResult BufferCache::CreateConstantDescriptorSet() { fragment_uniform_binding_write.descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC; fragment_uniform_binding_write.pBufferInfo = &buffer_info; - vkUpdateDescriptorSets(*device_, 2, descriptor_writes, 0, nullptr); + dfn.vkUpdateDescriptorSets(*device_, 2, descriptor_writes, 0, nullptr); return VK_SUCCESS; } void BufferCache::FreeConstantDescriptorSet() { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + if (constant_descriptor_set_) { - vkFreeDescriptorSets(*device_, constant_descriptor_pool_, 1, - &constant_descriptor_set_); + dfn.vkFreeDescriptorSets(*device_, constant_descriptor_pool_, 1, + &constant_descriptor_set_); constant_descriptor_set_ = nullptr; } - VK_SAFE_DESTROY(vkDestroyDescriptorSetLayout, *device_, - constant_descriptor_set_layout_, nullptr); - VK_SAFE_DESTROY(vkDestroyDescriptorPool, *device_, constant_descriptor_pool_, - nullptr); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyDescriptorSetLayout, *device_, + constant_descriptor_set_layout_); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyDescriptorPool, *device_, + constant_descriptor_pool_); } void BufferCache::Shutdown() { @@ -314,7 +319,9 @@ void BufferCache::Shutdown() { FreeVertexDescriptorPool(); transient_buffer_->Shutdown(); - VK_SAFE_DESTROY(vkFreeMemory, *device_, gpu_memory_pool_, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + ui::vulkan::DestroyAndNullHandle(dfn.vkFreeMemory, *device_, + gpu_memory_pool_); } std::pair BufferCache::UploadConstantRegisters( @@ -361,9 +368,10 @@ std::pair BufferCache::UploadConstantRegisters( offset, kConstantRegisterUniformRange, }; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_HOST_BIT, - VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, 0, 0, nullptr, 1, - &barrier, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_HOST_BIT, + VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, 0, 0, nullptr, 1, + &barrier, 0, nullptr); return {offset, offset}; @@ -476,9 +484,10 @@ std::pair BufferCache::UploadIndexBuffer( offset, source_length, }; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_HOST_BIT, - VK_PIPELINE_STAGE_VERTEX_INPUT_BIT, 0, 0, nullptr, 1, - &barrier, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_HOST_BIT, + VK_PIPELINE_STAGE_VERTEX_INPUT_BIT, 0, 0, nullptr, 1, + &barrier, 0, nullptr); return {transient_buffer_->gpu_buffer(), offset}; } @@ -543,9 +552,10 @@ std::pair BufferCache::UploadVertexBuffer( offset, upload_size, }; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_HOST_BIT, - VK_PIPELINE_STAGE_VERTEX_SHADER_BIT, 0, 0, nullptr, 1, - &barrier, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_HOST_BIT, + VK_PIPELINE_STAGE_VERTEX_SHADER_BIT, 0, 0, nullptr, + 1, &barrier, 0, nullptr); CacheTransientData(upload_base, upload_size, offset); return {transient_buffer_->gpu_buffer(), offset + source_offset}; @@ -687,7 +697,8 @@ VkDescriptorSet BufferCache::PrepareVertexSet( }; } - vkUpdateDescriptorSets(*device_, 1, &descriptor_write, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkUpdateDescriptorSets(*device_, 1, &descriptor_write, 0, nullptr); vertex_sets_[hash] = set; return set; } @@ -760,13 +771,15 @@ void BufferCache::CacheTransientData(uint32_t guest_address, } void BufferCache::Flush(VkCommandBuffer command_buffer) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // If we are flushing a big enough chunk queue up an event. // We don't want to do this for everything but often enough so that we won't // run out of space. if (true) { // VkEvent finish_event; - // vkCmdSetEvent(cmd_buffer, finish_event, - // VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT); + // dfn.vkCmdSetEvent(cmd_buffer, finish_event, + // VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT); } // Flush memory. @@ -777,7 +790,7 @@ void BufferCache::Flush(VkCommandBuffer command_buffer) { dirty_range.memory = transient_buffer_->gpu_memory(); dirty_range.offset = 0; dirty_range.size = transient_buffer_->capacity(); - vkFlushMappedMemoryRanges(*device_, 1, &dirty_range); + dfn.vkFlushMappedMemoryRanges(*device_, 1, &dirty_range); } void BufferCache::InvalidateCache() { diff --git a/src/xenia/gpu/vulkan/pipeline_cache.cc b/src/xenia/gpu/vulkan/pipeline_cache.cc index 9bf106a3b..4defbcf04 100644 --- a/src/xenia/gpu/vulkan/pipeline_cache.cc +++ b/src/xenia/gpu/vulkan/pipeline_cache.cc @@ -45,6 +45,7 @@ VkResult PipelineCache::Initialize( VkDescriptorSetLayout uniform_descriptor_set_layout, VkDescriptorSetLayout texture_descriptor_set_layout, VkDescriptorSetLayout vertex_descriptor_set_layout) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; // Initialize the shared driver pipeline cache. @@ -57,8 +58,8 @@ VkResult PipelineCache::Initialize( pipeline_cache_info.flags = 0; pipeline_cache_info.initialDataSize = 0; pipeline_cache_info.pInitialData = nullptr; - status = vkCreatePipelineCache(*device_, &pipeline_cache_info, nullptr, - &pipeline_cache_); + status = dfn.vkCreatePipelineCache(*device_, &pipeline_cache_info, nullptr, + &pipeline_cache_); if (status != VK_SUCCESS) { return status; } @@ -95,8 +96,8 @@ VkResult PipelineCache::Initialize( pipeline_layout_info.pushConstantRangeCount = static_cast(xe::countof(push_constant_ranges)); pipeline_layout_info.pPushConstantRanges = push_constant_ranges; - status = vkCreatePipelineLayout(*device_, &pipeline_layout_info, nullptr, - &pipeline_layout_); + status = dfn.vkCreatePipelineLayout(*device_, &pipeline_layout_info, nullptr, + &pipeline_layout_); if (status != VK_SUCCESS) { return status; } @@ -112,8 +113,8 @@ VkResult PipelineCache::Initialize( static_cast(sizeof(line_quad_list_geom)); shader_module_info.pCode = reinterpret_cast(line_quad_list_geom); - status = vkCreateShaderModule(*device_, &shader_module_info, nullptr, - &geometry_shaders_.line_quad_list); + status = dfn.vkCreateShaderModule(*device_, &shader_module_info, nullptr, + &geometry_shaders_.line_quad_list); if (status != VK_SUCCESS) { return status; } @@ -123,8 +124,8 @@ VkResult PipelineCache::Initialize( shader_module_info.codeSize = static_cast(sizeof(point_list_geom)); shader_module_info.pCode = reinterpret_cast(point_list_geom); - status = vkCreateShaderModule(*device_, &shader_module_info, nullptr, - &geometry_shaders_.point_list); + status = dfn.vkCreateShaderModule(*device_, &shader_module_info, nullptr, + &geometry_shaders_.point_list); if (status != VK_SUCCESS) { return status; } @@ -134,8 +135,8 @@ VkResult PipelineCache::Initialize( shader_module_info.codeSize = static_cast(sizeof(quad_list_geom)); shader_module_info.pCode = reinterpret_cast(quad_list_geom); - status = vkCreateShaderModule(*device_, &shader_module_info, nullptr, - &geometry_shaders_.quad_list); + status = dfn.vkCreateShaderModule(*device_, &shader_module_info, nullptr, + &geometry_shaders_.quad_list); if (status != VK_SUCCESS) { return status; } @@ -145,8 +146,8 @@ VkResult PipelineCache::Initialize( shader_module_info.codeSize = static_cast(sizeof(rect_list_geom)); shader_module_info.pCode = reinterpret_cast(rect_list_geom); - status = vkCreateShaderModule(*device_, &shader_module_info, nullptr, - &geometry_shaders_.rect_list); + status = dfn.vkCreateShaderModule(*device_, &shader_module_info, nullptr, + &geometry_shaders_.rect_list); if (status != VK_SUCCESS) { return status; } @@ -156,8 +157,8 @@ VkResult PipelineCache::Initialize( shader_module_info.codeSize = static_cast(sizeof(dummy_frag)); shader_module_info.pCode = reinterpret_cast(dummy_frag); - status = vkCreateShaderModule(*device_, &shader_module_info, nullptr, - &dummy_pixel_shader_); + status = dfn.vkCreateShaderModule(*device_, &shader_module_info, nullptr, + &dummy_pixel_shader_); if (status != VK_SUCCESS) { return status; } @@ -171,34 +172,37 @@ VkResult PipelineCache::Initialize( void PipelineCache::Shutdown() { ClearCache(); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Destroy geometry shaders. if (geometry_shaders_.line_quad_list) { - vkDestroyShaderModule(*device_, geometry_shaders_.line_quad_list, nullptr); + dfn.vkDestroyShaderModule(*device_, geometry_shaders_.line_quad_list, + nullptr); geometry_shaders_.line_quad_list = nullptr; } if (geometry_shaders_.point_list) { - vkDestroyShaderModule(*device_, geometry_shaders_.point_list, nullptr); + dfn.vkDestroyShaderModule(*device_, geometry_shaders_.point_list, nullptr); geometry_shaders_.point_list = nullptr; } if (geometry_shaders_.quad_list) { - vkDestroyShaderModule(*device_, geometry_shaders_.quad_list, nullptr); + dfn.vkDestroyShaderModule(*device_, geometry_shaders_.quad_list, nullptr); geometry_shaders_.quad_list = nullptr; } if (geometry_shaders_.rect_list) { - vkDestroyShaderModule(*device_, geometry_shaders_.rect_list, nullptr); + dfn.vkDestroyShaderModule(*device_, geometry_shaders_.rect_list, nullptr); geometry_shaders_.rect_list = nullptr; } if (dummy_pixel_shader_) { - vkDestroyShaderModule(*device_, dummy_pixel_shader_, nullptr); + dfn.vkDestroyShaderModule(*device_, dummy_pixel_shader_, nullptr); dummy_pixel_shader_ = nullptr; } if (pipeline_layout_) { - vkDestroyPipelineLayout(*device_, pipeline_layout_, nullptr); + dfn.vkDestroyPipelineLayout(*device_, pipeline_layout_, nullptr); pipeline_layout_ = nullptr; } if (pipeline_cache_) { - vkDestroyPipelineCache(*device_, pipeline_cache_, nullptr); + dfn.vkDestroyPipelineCache(*device_, pipeline_cache_, nullptr); pipeline_cache_ = nullptr; } } @@ -274,9 +278,10 @@ PipelineCache::UpdateStatus PipelineCache::ConfigurePipeline( } void PipelineCache::ClearCache() { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); // Destroy all pipelines. for (auto it : cached_pipelines_) { - vkDestroyPipeline(*device_, it.second, nullptr); + dfn.vkDestroyPipeline(*device_, it.second, nullptr); } cached_pipelines_.clear(); COUNT_profile_set("gpu/pipeline_cache/pipelines", 0); @@ -338,8 +343,9 @@ VkPipeline PipelineCache::GetPipeline(const RenderState* render_state, pipeline_info.basePipelineHandle = nullptr; pipeline_info.basePipelineIndex = -1; VkPipeline pipeline = nullptr; - auto result = vkCreateGraphicsPipelines(*device_, pipeline_cache_, 1, - &pipeline_info, nullptr, &pipeline); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + auto result = dfn.vkCreateGraphicsPipelines( + *device_, pipeline_cache_, 1, &pipeline_info, nullptr, &pipeline); if (result != VK_SUCCESS) { XELOGE("vkCreateGraphicsPipelines failed with code {}", result); assert_always(); @@ -415,9 +421,7 @@ static void DumpShaderStatisticsAMD(const VkShaderStatisticsInfoAMD& stats) { } void PipelineCache::DumpShaderDisasmAMD(VkPipeline pipeline) { - auto fn_GetShaderInfoAMD = (PFN_vkGetShaderInfoAMD)vkGetDeviceProcAddr( - *device_, "vkGetShaderInfoAMD"); - + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; size_t data_size = 0; @@ -425,18 +429,18 @@ void PipelineCache::DumpShaderDisasmAMD(VkPipeline pipeline) { data_size = sizeof(stats); // Vertex shader - status = fn_GetShaderInfoAMD(*device_, pipeline, VK_SHADER_STAGE_VERTEX_BIT, - VK_SHADER_INFO_TYPE_STATISTICS_AMD, &data_size, - &stats); + status = dfn.vkGetShaderInfoAMD( + *device_, pipeline, VK_SHADER_STAGE_VERTEX_BIT, + VK_SHADER_INFO_TYPE_STATISTICS_AMD, &data_size, &stats); if (status == VK_SUCCESS) { XELOGI("AMD Vertex Shader Statistics:"); DumpShaderStatisticsAMD(stats); } // Fragment shader - status = fn_GetShaderInfoAMD(*device_, pipeline, VK_SHADER_STAGE_FRAGMENT_BIT, - VK_SHADER_INFO_TYPE_STATISTICS_AMD, &data_size, - &stats); + status = dfn.vkGetShaderInfoAMD( + *device_, pipeline, VK_SHADER_STAGE_FRAGMENT_BIT, + VK_SHADER_INFO_TYPE_STATISTICS_AMD, &data_size, &stats); if (status == VK_SUCCESS) { XELOGI("AMD Fragment Shader Statistics:"); DumpShaderStatisticsAMD(stats); @@ -451,6 +455,8 @@ void PipelineCache::DumpShaderDisasmNV( // This code is super ugly. Update this when NVidia includes an official // way to dump shader disassembly. + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + VkPipelineCacheCreateInfo pipeline_cache_info; VkPipelineCache dummy_pipeline_cache; pipeline_cache_info.sType = VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO; @@ -458,23 +464,24 @@ void PipelineCache::DumpShaderDisasmNV( pipeline_cache_info.flags = 0; pipeline_cache_info.initialDataSize = 0; pipeline_cache_info.pInitialData = nullptr; - auto status = vkCreatePipelineCache(*device_, &pipeline_cache_info, nullptr, - &dummy_pipeline_cache); + auto status = dfn.vkCreatePipelineCache(*device_, &pipeline_cache_info, + nullptr, &dummy_pipeline_cache); CheckResult(status, "vkCreatePipelineCache"); // Create a pipeline on the dummy cache and dump it. VkPipeline dummy_pipeline; - status = vkCreateGraphicsPipelines(*device_, dummy_pipeline_cache, 1, - &pipeline_info, nullptr, &dummy_pipeline); + status = + dfn.vkCreateGraphicsPipelines(*device_, dummy_pipeline_cache, 1, + &pipeline_info, nullptr, &dummy_pipeline); std::vector pipeline_data; size_t data_size = 0; - status = vkGetPipelineCacheData(*device_, dummy_pipeline_cache, &data_size, - nullptr); + status = dfn.vkGetPipelineCacheData(*device_, dummy_pipeline_cache, + &data_size, nullptr); if (status == VK_SUCCESS) { pipeline_data.resize(data_size); - vkGetPipelineCacheData(*device_, dummy_pipeline_cache, &data_size, - pipeline_data.data()); + dfn.vkGetPipelineCacheData(*device_, dummy_pipeline_cache, &data_size, + pipeline_data.data()); // Scan the data for the disassembly. std::string disasm_vp, disasm_fp; @@ -530,8 +537,8 @@ void PipelineCache::DumpShaderDisasmNV( disasm_fp); } - vkDestroyPipeline(*device_, dummy_pipeline, nullptr); - vkDestroyPipelineCache(*device_, dummy_pipeline_cache, nullptr); + dfn.vkDestroyPipeline(*device_, dummy_pipeline, nullptr); + dfn.vkDestroyPipelineCache(*device_, dummy_pipeline_cache, nullptr); } VkShaderModule PipelineCache::GetGeometryShader( @@ -575,6 +582,7 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, SCOPE_profile_cpu_f("gpu"); #endif // FINE_GRAINED_DRAW_SCOPES + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); auto& regs = set_dynamic_state_registers_; bool window_offset_dirty = SetShadowRegister(®s.pa_sc_window_offset, @@ -620,7 +628,7 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, scissor_rect.offset.y = ws_y - adj_y; scissor_rect.extent.width = std::max(ws_w + adj_x, 0); scissor_rect.extent.height = std::max(ws_h + adj_y, 0); - vkCmdSetScissor(command_buffer, 0, 1, &scissor_rect); + dfn.vkCmdSetScissor(command_buffer, 0, 1, &scissor_rect); } // VK_DYNAMIC_STATE_VIEWPORT @@ -713,7 +721,7 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, assert_true(viewport_rect.minDepth >= 0 && viewport_rect.minDepth <= 1); assert_true(viewport_rect.maxDepth >= -1 && viewport_rect.maxDepth <= 1); - vkCmdSetViewport(command_buffer, 0, 1, &viewport_rect); + dfn.vkCmdSetViewport(command_buffer, 0, 1, &viewport_rect); } // VK_DYNAMIC_STATE_DEPTH_BIAS @@ -767,13 +775,13 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, regs.pa_su_poly_offset_offset != depth_bias_offset_vulkan) { regs.pa_su_poly_offset_scale = depth_bias_scale_vulkan; regs.pa_su_poly_offset_offset = depth_bias_offset_vulkan; - vkCmdSetDepthBias(command_buffer, depth_bias_offset_vulkan, 0.0f, - depth_bias_scale_vulkan); + dfn.vkCmdSetDepthBias(command_buffer, depth_bias_offset_vulkan, 0.0f, + depth_bias_scale_vulkan); } } else if (full_update) { regs.pa_su_poly_offset_scale = 0.0f; regs.pa_su_poly_offset_offset = 0.0f; - vkCmdSetDepthBias(command_buffer, 0.0f, 0.0f, 0.0f); + dfn.vkCmdSetDepthBias(command_buffer, 0.0f, 0.0f, 0.0f); } // VK_DYNAMIC_STATE_BLEND_CONSTANTS @@ -787,7 +795,7 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, blend_constant_state_dirty |= SetShadowRegister(®s.rb_blend_rgba[3], XE_GPU_REG_RB_BLEND_ALPHA); if (blend_constant_state_dirty) { - vkCmdSetBlendConstants(command_buffer, regs.rb_blend_rgba); + dfn.vkCmdSetBlendConstants(command_buffer, regs.rb_blend_rgba); } bool stencil_state_dirty = full_update; @@ -799,16 +807,16 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, uint32_t stencil_write_mask = (regs.rb_stencilrefmask >> 16) & 0xFF; // VK_DYNAMIC_STATE_STENCIL_REFERENCE - vkCmdSetStencilReference(command_buffer, VK_STENCIL_FRONT_AND_BACK, - stencil_ref); + dfn.vkCmdSetStencilReference(command_buffer, VK_STENCIL_FRONT_AND_BACK, + stencil_ref); // VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK - vkCmdSetStencilCompareMask(command_buffer, VK_STENCIL_FRONT_AND_BACK, - stencil_read_mask); + dfn.vkCmdSetStencilCompareMask(command_buffer, VK_STENCIL_FRONT_AND_BACK, + stencil_read_mask); // VK_DYNAMIC_STATE_STENCIL_WRITE_MASK - vkCmdSetStencilWriteMask(command_buffer, VK_STENCIL_FRONT_AND_BACK, - stencil_write_mask); + dfn.vkCmdSetStencilWriteMask(command_buffer, VK_STENCIL_FRONT_AND_BACK, + stencil_write_mask); } bool push_constants_dirty = full_update || viewport_state_dirty; @@ -905,19 +913,19 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer, push_constants.ps_param_gen = regs.sq_program_cntl.param_gen ? ps_param_gen : -1; - vkCmdPushConstants(command_buffer, pipeline_layout_, - VK_SHADER_STAGE_VERTEX_BIT | - VK_SHADER_STAGE_GEOMETRY_BIT | - VK_SHADER_STAGE_FRAGMENT_BIT, - 0, kSpirvPushConstantsSize, &push_constants); + dfn.vkCmdPushConstants(command_buffer, pipeline_layout_, + VK_SHADER_STAGE_VERTEX_BIT | + VK_SHADER_STAGE_GEOMETRY_BIT | + VK_SHADER_STAGE_FRAGMENT_BIT, + 0, kSpirvPushConstantsSize, &push_constants); } if (full_update) { // VK_DYNAMIC_STATE_LINE_WIDTH - vkCmdSetLineWidth(command_buffer, 1.0f); + dfn.vkCmdSetLineWidth(command_buffer, 1.0f); // VK_DYNAMIC_STATE_DEPTH_BOUNDS - vkCmdSetDepthBounds(command_buffer, 0.0f, 1.0f); + dfn.vkCmdSetDepthBounds(command_buffer, 0.0f, 1.0f); } return true; diff --git a/src/xenia/gpu/vulkan/premake5.lua b/src/xenia/gpu/vulkan/premake5.lua index a1eb189d5..7db3b21f8 100644 --- a/src/xenia/gpu/vulkan/premake5.lua +++ b/src/xenia/gpu/vulkan/premake5.lua @@ -8,7 +8,6 @@ project("xenia-gpu-vulkan") language("C++") links({ "fmt", - "volk", "xenia-base", "xenia-gpu", "xenia-ui", @@ -57,7 +56,6 @@ project("xenia-gpu-vulkan-trace-viewer") "mspack", "snappy", "spirv-tools", - "volk", "xxhash", }) defines({ @@ -124,7 +122,6 @@ project("xenia-gpu-vulkan-trace-dump") "mspack", "snappy", "spirv-tools", - "volk", "xxhash", }) defines({ diff --git a/src/xenia/gpu/vulkan/render_cache.cc b/src/xenia/gpu/vulkan/render_cache.cc index 1882c0082..b3dc4d389 100644 --- a/src/xenia/gpu/vulkan/render_cache.cc +++ b/src/xenia/gpu/vulkan/render_cache.cc @@ -105,8 +105,9 @@ class CachedFramebuffer { // Associated render pass VkRenderPass render_pass = nullptr; - CachedFramebuffer(VkDevice device, VkRenderPass render_pass, - uint32_t surface_width, uint32_t surface_height, + CachedFramebuffer(const ui::vulkan::VulkanDevice& device, + VkRenderPass render_pass, uint32_t surface_width, + uint32_t surface_height, CachedTileView* target_color_attachments[4], CachedTileView* target_depth_stencil_attachment); ~CachedFramebuffer(); @@ -116,7 +117,7 @@ class CachedFramebuffer { bool IsCompatible(const RenderConfiguration& desired_config) const; private: - VkDevice device_ = nullptr; + const ui::vulkan::VulkanDevice& device_; }; // Cached render passes based on register states. @@ -133,7 +134,8 @@ class CachedRenderPass { // Cache of framebuffers for the various tile attachments. std::vector cached_framebuffers; - CachedRenderPass(VkDevice device, const RenderConfiguration& desired_config); + CachedRenderPass(const ui::vulkan::VulkanDevice& device, + const RenderConfiguration& desired_config); ~CachedRenderPass(); VkResult Initialize(); @@ -141,7 +143,7 @@ class CachedRenderPass { bool IsCompatible(const RenderConfiguration& desired_config) const; private: - VkDevice device_ = nullptr; + const ui::vulkan::VulkanDevice& device_; }; CachedTileView::CachedTileView(ui::vulkan::VulkanDevice* device, @@ -150,14 +152,19 @@ CachedTileView::CachedTileView(ui::vulkan::VulkanDevice* device, : device_(device), key(std::move(view_key)) {} CachedTileView::~CachedTileView() { - VK_SAFE_DESTROY(vkDestroyImageView, *device_, image_view, nullptr); - VK_SAFE_DESTROY(vkDestroyImageView, *device_, image_view_depth, nullptr); - VK_SAFE_DESTROY(vkDestroyImageView, *device_, image_view_stencil, nullptr); - VK_SAFE_DESTROY(vkDestroyImage, *device_, image, nullptr); - VK_SAFE_DESTROY(vkFreeMemory, *device_, memory, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyImageView, *device_, + image_view); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyImageView, *device_, + image_view_depth); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyImageView, *device_, + image_view_stencil); + ui::vulkan::DestroyAndNullHandle(dfn.vkDestroyImage, *device_, image); + ui::vulkan::DestroyAndNullHandle(dfn.vkFreeMemory, *device_, memory); } VkResult CachedTileView::Initialize(VkCommandBuffer command_buffer) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Map format to Vulkan. @@ -230,7 +237,7 @@ VkResult CachedTileView::Initialize(VkCommandBuffer command_buffer) { image_info.queueFamilyIndexCount = 0; image_info.pQueueFamilyIndices = nullptr; image_info.initialLayout = VK_IMAGE_LAYOUT_UNDEFINED; - status = vkCreateImage(*device_, &image_info, nullptr, &image); + status = dfn.vkCreateImage(*device_, &image_info, nullptr, &image); if (status != VK_SUCCESS) { return status; } @@ -244,12 +251,12 @@ VkResult CachedTileView::Initialize(VkCommandBuffer command_buffer) { uint32_t(key.msaa_samples), uint32_t(key.edram_format))); VkMemoryRequirements memory_requirements; - vkGetImageMemoryRequirements(*device_, image, &memory_requirements); + dfn.vkGetImageMemoryRequirements(*device_, image, &memory_requirements); // Bind to a newly allocated chunk. // TODO: Alias from a really big buffer? memory = device_->AllocateMemory(memory_requirements, 0); - status = vkBindImageMemory(*device_, image, memory, 0); + status = dfn.vkBindImageMemory(*device_, image, memory, 0); if (status != VK_SUCCESS) { return status; } @@ -276,7 +283,8 @@ VkResult CachedTileView::Initialize(VkCommandBuffer command_buffer) { image_view_info.subresourceRange.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; } - status = vkCreateImageView(*device_, &image_view_info, nullptr, &image_view); + status = + dfn.vkCreateImageView(*device_, &image_view_info, nullptr, &image_view); if (status != VK_SUCCESS) { return status; } @@ -284,15 +292,15 @@ VkResult CachedTileView::Initialize(VkCommandBuffer command_buffer) { // Create separate depth/stencil views. if (key.color_or_depth == 0) { image_view_info.subresourceRange.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT; - status = vkCreateImageView(*device_, &image_view_info, nullptr, - &image_view_depth); + status = dfn.vkCreateImageView(*device_, &image_view_info, nullptr, + &image_view_depth); if (status != VK_SUCCESS) { return status; } image_view_info.subresourceRange.aspectMask = VK_IMAGE_ASPECT_STENCIL_BIT; - status = vkCreateImageView(*device_, &image_view_info, nullptr, - &image_view_stencil); + status = dfn.vkCreateImageView(*device_, &image_view_info, nullptr, + &image_view_stencil); if (status != VK_SUCCESS) { return status; } @@ -319,19 +327,20 @@ VkResult CachedTileView::Initialize(VkCommandBuffer command_buffer) { image_barrier.subresourceRange.levelCount = 1; image_barrier.subresourceRange.baseArrayLayer = 0; image_barrier.subresourceRange.layerCount = 1; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - key.color_or_depth - ? VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT - : VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT, - 0, 0, nullptr, 0, nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + key.color_or_depth + ? VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT + : VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT, + 0, 0, nullptr, 0, nullptr, 1, &image_barrier); image_layout = image_barrier.newLayout; return VK_SUCCESS; } CachedFramebuffer::CachedFramebuffer( - VkDevice device, VkRenderPass render_pass, uint32_t surface_width, - uint32_t surface_height, CachedTileView* target_color_attachments[4], + const ui::vulkan::VulkanDevice& device, VkRenderPass render_pass, + uint32_t surface_width, uint32_t surface_height, + CachedTileView* target_color_attachments[4], CachedTileView* target_depth_stencil_attachment) : device_(device), width(surface_width), @@ -344,7 +353,10 @@ CachedFramebuffer::CachedFramebuffer( } CachedFramebuffer::~CachedFramebuffer() { - VK_SAFE_DESTROY(vkDestroyFramebuffer, device_, handle, nullptr); + if (handle != VK_NULL_HANDLE) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + dfn.vkDestroyFramebuffer(device_, handle, nullptr); + } } VkResult CachedFramebuffer::Initialize() { @@ -369,7 +381,8 @@ VkResult CachedFramebuffer::Initialize() { framebuffer_info.width = width; framebuffer_info.height = height; framebuffer_info.layers = 1; - return vkCreateFramebuffer(device_, &framebuffer_info, nullptr, &handle); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + return dfn.vkCreateFramebuffer(device_, &framebuffer_info, nullptr, &handle); } bool CachedFramebuffer::IsCompatible( @@ -414,7 +427,7 @@ bool CachedFramebuffer::IsCompatible( return true; } -CachedRenderPass::CachedRenderPass(VkDevice device, +CachedRenderPass::CachedRenderPass(const ui::vulkan::VulkanDevice& device, const RenderConfiguration& desired_config) : device_(device) { std::memcpy(&config, &desired_config, sizeof(config)); @@ -426,7 +439,10 @@ CachedRenderPass::~CachedRenderPass() { } cached_framebuffers.clear(); - VK_SAFE_DESTROY(vkDestroyRenderPass, device_, handle, nullptr); + if (handle != VK_NULL_HANDLE) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + dfn.vkDestroyRenderPass(device_, handle, nullptr); + } } VkResult CachedRenderPass::Initialize() { @@ -537,7 +553,8 @@ VkResult CachedRenderPass::Initialize() { render_pass_info.dependencyCount = 1; render_pass_info.pDependencies = dependencies; - return vkCreateRenderPass(device_, &render_pass_info, nullptr, &handle); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + return dfn.vkCreateRenderPass(device_, &render_pass_info, nullptr, &handle); } bool CachedRenderPass::IsCompatible( @@ -566,6 +583,7 @@ RenderCache::RenderCache(RegisterFile* register_file, RenderCache::~RenderCache() { Shutdown(); } VkResult RenderCache::Initialize() { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Create the buffer we'll bind to our memory. @@ -579,7 +597,7 @@ VkResult RenderCache::Initialize() { buffer_info.sharingMode = VK_SHARING_MODE_EXCLUSIVE; buffer_info.queueFamilyIndexCount = 0; buffer_info.pQueueFamilyIndices = nullptr; - status = vkCreateBuffer(*device_, &buffer_info, nullptr, &edram_buffer_); + status = dfn.vkCreateBuffer(*device_, &buffer_info, nullptr, &edram_buffer_); CheckResult(status, "vkCreateBuffer"); if (status != VK_SUCCESS) { return status; @@ -588,7 +606,8 @@ VkResult RenderCache::Initialize() { // Query requirements for the buffer. // It should be 1:1. VkMemoryRequirements buffer_requirements; - vkGetBufferMemoryRequirements(*device_, edram_buffer_, &buffer_requirements); + dfn.vkGetBufferMemoryRequirements(*device_, edram_buffer_, + &buffer_requirements); assert_true(buffer_requirements.size == kEdramBufferCapacity); // Allocate EDRAM memory. @@ -600,7 +619,7 @@ VkResult RenderCache::Initialize() { } // Bind buffer to map our entire memory. - status = vkBindBufferMemory(*device_, edram_buffer_, edram_memory_, 0); + status = dfn.vkBindBufferMemory(*device_, edram_buffer_, edram_memory_, 0); CheckResult(status, "vkBindBufferMemory"); if (status != VK_SUCCESS) { return status; @@ -609,15 +628,16 @@ VkResult RenderCache::Initialize() { if (status == VK_SUCCESS) { // For debugging, upload a grid into the EDRAM buffer. uint32_t* gpu_data = nullptr; - status = vkMapMemory(*device_, edram_memory_, 0, buffer_requirements.size, - 0, reinterpret_cast(&gpu_data)); + status = + dfn.vkMapMemory(*device_, edram_memory_, 0, buffer_requirements.size, 0, + reinterpret_cast(&gpu_data)); if (status == VK_SUCCESS) { for (int i = 0; i < kEdramBufferCapacity / 4; i++) { gpu_data[i] = (i % 8) >= 4 ? 0xFF0000FF : 0xFFFFFFFF; } - vkUnmapMemory(*device_, edram_memory_); + dfn.vkUnmapMemory(*device_, edram_memory_); } } @@ -627,6 +647,8 @@ VkResult RenderCache::Initialize() { void RenderCache::Shutdown() { // TODO(benvanik): wait for idle. + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Dispose all render passes (and their framebuffers). for (auto render_pass : cached_render_passes_) { delete render_pass; @@ -641,11 +663,11 @@ void RenderCache::Shutdown() { // Release underlying EDRAM memory. if (edram_buffer_) { - vkDestroyBuffer(*device_, edram_buffer_, nullptr); + dfn.vkDestroyBuffer(*device_, edram_buffer_, nullptr); edram_buffer_ = nullptr; } if (edram_memory_) { - vkFreeMemory(*device_, edram_memory_, nullptr); + dfn.vkFreeMemory(*device_, edram_memory_, nullptr); edram_memory_ = nullptr; } } @@ -781,8 +803,9 @@ const RenderState* RenderCache::BeginRenderPass(VkCommandBuffer command_buffer, render_pass_begin_info.pClearValues = nullptr; // Begin the render pass. - vkCmdBeginRenderPass(command_buffer, &render_pass_begin_info, - VK_SUBPASS_CONTENTS_INLINE); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdBeginRenderPass(command_buffer, &render_pass_begin_info, + VK_SUBPASS_CONTENTS_INLINE); return ¤t_state_; } @@ -1019,6 +1042,8 @@ CachedTileView* RenderCache::FindOrCreateTileView( void RenderCache::UpdateTileView(VkCommandBuffer command_buffer, CachedTileView* view, bool load, bool insert_barrier) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + uint32_t tile_width = view->key.msaa_samples == uint16_t(xenos::MsaaSamples::k4X) ? 40 : 80; uint32_t tile_height = @@ -1043,9 +1068,9 @@ void RenderCache::UpdateTileView(VkCommandBuffer command_buffer, tile_height * view->key.color_or_depth ? 4 : 1; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 1, - &barrier, 0, nullptr); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, + 1, &barrier, 0, nullptr); } // TODO(DrChat): Stencil copies. @@ -1061,11 +1086,12 @@ void RenderCache::UpdateTileView(VkCommandBuffer command_buffer, region.imageExtent = {view->key.tile_width * tile_width, view->key.tile_height * tile_height, 1}; if (load) { - vkCmdCopyBufferToImage(command_buffer, edram_buffer_, view->image, - VK_IMAGE_LAYOUT_GENERAL, 1, ®ion); + dfn.vkCmdCopyBufferToImage(command_buffer, edram_buffer_, view->image, + VK_IMAGE_LAYOUT_GENERAL, 1, ®ion); } else { - vkCmdCopyImageToBuffer(command_buffer, view->image, VK_IMAGE_LAYOUT_GENERAL, - edram_buffer_, 1, ®ion); + dfn.vkCmdCopyImageToBuffer(command_buffer, view->image, + VK_IMAGE_LAYOUT_GENERAL, edram_buffer_, 1, + ®ion); } } @@ -1085,7 +1111,8 @@ void RenderCache::EndRenderPass() { assert_not_null(current_command_buffer_); // End the render pass. - vkCmdEndRenderPass(current_command_buffer_); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdEndRenderPass(current_command_buffer_); // Copy all render targets back into our EDRAM buffer. // Don't bother waiting on this command to complete, as next render pass may @@ -1138,6 +1165,8 @@ void RenderCache::RawCopyToImage(VkCommandBuffer command_buffer, VkImageLayout image_layout, bool color_or_depth, VkOffset3D offset, VkExtent3D extents) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Transition the texture into a transfer destination layout. VkImageMemoryBarrier image_barrier; image_barrier.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER; @@ -1157,9 +1186,9 @@ void RenderCache::RawCopyToImage(VkCommandBuffer command_buffer, ? VK_IMAGE_ASPECT_COLOR_BIT : VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, + 0, nullptr, 1, &image_barrier); } VkBufferMemoryBarrier buffer_barrier; @@ -1173,9 +1202,9 @@ void RenderCache::RawCopyToImage(VkCommandBuffer command_buffer, // TODO: Calculate this accurately (need texel size) buffer_barrier.size = extents.width * extents.height * 4; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 1, - &buffer_barrier, 0, nullptr); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 1, + &buffer_barrier, 0, nullptr); // Issue the copy command. // TODO(DrChat): Stencil copies. @@ -1188,8 +1217,8 @@ void RenderCache::RawCopyToImage(VkCommandBuffer command_buffer, region.imageSubresource = {0, 0, 0, 1}; region.imageSubresource.aspectMask = color_or_depth ? VK_IMAGE_ASPECT_COLOR_BIT : VK_IMAGE_ASPECT_DEPTH_BIT; - vkCmdCopyBufferToImage(command_buffer, edram_buffer_, image, image_layout, 1, - ®ion); + dfn.vkCmdCopyBufferToImage(command_buffer, edram_buffer_, image, image_layout, + 1, ®ion); // Transition the image back into its previous layout. if (image_layout != VK_IMAGE_LAYOUT_GENERAL && @@ -1197,9 +1226,9 @@ void RenderCache::RawCopyToImage(VkCommandBuffer command_buffer, image_barrier.srcAccessMask = image_barrier.dstAccessMask; image_barrier.dstAccessMask = 0; std::swap(image_barrier.oldLayout, image_barrier.newLayout); - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, + 0, nullptr, 1, &image_barrier); } } @@ -1210,6 +1239,8 @@ void RenderCache::BlitToImage(VkCommandBuffer command_buffer, bool color_or_depth, uint32_t format, VkFilter filter, VkOffset3D offset, VkExtent3D extents) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + if (color_or_depth) { // Adjust similar formats for easier matching. format = static_cast( @@ -1252,9 +1283,9 @@ void RenderCache::BlitToImage(VkCommandBuffer command_buffer, color_or_depth ? VK_IMAGE_ASPECT_COLOR_BIT : VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, - VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, + VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, + nullptr, 1, &image_barrier); // If we overflow we'll lose the device here. // assert_true(extents.width <= key.tile_width * tile_width); @@ -1277,8 +1308,9 @@ void RenderCache::BlitToImage(VkCommandBuffer command_buffer, image_blit.dstOffsets[1] = {offset.x + int32_t(extents.width), offset.y + int32_t(extents.height), offset.z + int32_t(extents.depth)}; - vkCmdBlitImage(command_buffer, tile_view->image, VK_IMAGE_LAYOUT_GENERAL, - image, image_layout, 1, &image_blit, filter); + dfn.vkCmdBlitImage(command_buffer, tile_view->image, + VK_IMAGE_LAYOUT_GENERAL, image, image_layout, 1, + &image_blit, filter); } else { VkImageResolve image_resolve; image_resolve.srcSubresource = {0, 0, 0, 1}; @@ -1292,8 +1324,9 @@ void RenderCache::BlitToImage(VkCommandBuffer command_buffer, image_resolve.dstOffset = offset; image_resolve.extent = extents; - vkCmdResolveImage(command_buffer, tile_view->image, VK_IMAGE_LAYOUT_GENERAL, - image, image_layout, 1, &image_resolve); + dfn.vkCmdResolveImage(command_buffer, tile_view->image, + VK_IMAGE_LAYOUT_GENERAL, image, image_layout, 1, + &image_resolve); } // Add another barrier on the tile view. @@ -1302,9 +1335,9 @@ void RenderCache::BlitToImage(VkCommandBuffer command_buffer, color_or_depth ? VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT : VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT; std::swap(image_barrier.oldLayout, image_barrier.newLayout); - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, + nullptr, 1, &image_barrier); } void RenderCache::ClearEDRAMColor(VkCommandBuffer command_buffer, @@ -1339,8 +1372,9 @@ void RenderCache::ClearEDRAMColor(VkCommandBuffer command_buffer, std::memcpy(clear_value.float32, color, sizeof(float) * 4); // Issue a clear command - vkCmdClearColorImage(command_buffer, tile_view->image, - VK_IMAGE_LAYOUT_GENERAL, &clear_value, 1, &range); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdClearColorImage(command_buffer, tile_view->image, + VK_IMAGE_LAYOUT_GENERAL, &clear_value, 1, &range); // Copy image back into EDRAM buffer // UpdateTileView(command_buffer, tile_view, false, false); @@ -1378,16 +1412,19 @@ void RenderCache::ClearEDRAMDepthStencil(VkCommandBuffer command_buffer, clear_value.stencil = stencil; // Issue a clear command - vkCmdClearDepthStencilImage(command_buffer, tile_view->image, - VK_IMAGE_LAYOUT_GENERAL, &clear_value, 1, &range); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdClearDepthStencilImage(command_buffer, tile_view->image, + VK_IMAGE_LAYOUT_GENERAL, &clear_value, 1, + &range); // Copy image back into EDRAM buffer // UpdateTileView(command_buffer, tile_view, false, false); } void RenderCache::FillEDRAM(VkCommandBuffer command_buffer, uint32_t value) { - vkCmdFillBuffer(command_buffer, edram_buffer_, 0, kEdramBufferCapacity, - value); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdFillBuffer(command_buffer, edram_buffer_, 0, kEdramBufferCapacity, + value); } bool RenderCache::SetShadowRegister(uint32_t* dest, uint32_t register_name) { diff --git a/src/xenia/gpu/vulkan/texture_cache.cc b/src/xenia/gpu/vulkan/texture_cache.cc index 1aac2c80e..4e26d0aa2 100644 --- a/src/xenia/gpu/vulkan/texture_cache.cc +++ b/src/xenia/gpu/vulkan/texture_cache.cc @@ -22,6 +22,7 @@ #include "xenia/gpu/texture_info.h" #include "xenia/gpu/vulkan/texture_config.h" #include "xenia/gpu/vulkan/vulkan_gpu_flags.h" +#include "xenia/ui/vulkan/vulkan_instance.h" #include "xenia/ui/vulkan/vulkan_mem_alloc.h" DECLARE_bool(texture_dump); @@ -67,6 +68,7 @@ TextureCache::TextureCache(Memory* memory, RegisterFile* register_file, TextureCache::~TextureCache() { Shutdown(); } VkResult TextureCache::Initialize() { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Descriptor pool used for all of our cached descriptors. @@ -115,8 +117,8 @@ VkResult TextureCache::Initialize() { static_cast(xe::countof(bindings)); descriptor_set_layout_info.pBindings = bindings; status = - vkCreateDescriptorSetLayout(*device_, &descriptor_set_layout_info, - nullptr, &texture_descriptor_set_layout_); + dfn.vkCreateDescriptorSetLayout(*device_, &descriptor_set_layout_info, + nullptr, &texture_descriptor_set_layout_); if (status != VK_SUCCESS) { return status; } @@ -133,15 +135,15 @@ VkResult TextureCache::Initialize() { // Create a memory allocator for textures. VmaVulkanFunctions vulkan_funcs = {}; - ui::vulkan::FillVMAVulkanFunctions(&vulkan_funcs); + ui::vulkan::FillVMAVulkanFunctions(&vulkan_funcs, *device_); VmaAllocatorCreateInfo alloc_info = { 0, *device_, *device_, 0, 0, nullptr, nullptr, 0, nullptr, &vulkan_funcs, }; status = vmaCreateAllocator(&alloc_info, &mem_allocator_); if (status != VK_SUCCESS) { - vkDestroyDescriptorSetLayout(*device_, texture_descriptor_set_layout_, - nullptr); + dfn.vkDestroyDescriptorSetLayout(*device_, texture_descriptor_set_layout_, + nullptr); return status; } @@ -177,8 +179,9 @@ void TextureCache::Shutdown() { vmaDestroyAllocator(mem_allocator_); mem_allocator_ = nullptr; } - vkDestroyDescriptorSetLayout(*device_, texture_descriptor_set_layout_, - nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkDestroyDescriptorSetLayout(*device_, texture_descriptor_set_layout_, + nullptr); } TextureCache::Texture* TextureCache::AllocateTexture( @@ -229,9 +232,12 @@ TextureCache::Texture* TextureCache::AllocateTexture( image_info.usage = VK_IMAGE_USAGE_SAMPLED_BIT | VK_IMAGE_USAGE_TRANSFER_DST_BIT; + const ui::vulkan::VulkanInstance* instance = device_->instance(); + const ui::vulkan::VulkanInstance::InstanceFunctions& ifn = instance->ifn(); + // Check the device limits for the format before we create it. VkFormatProperties props; - vkGetPhysicalDeviceFormatProperties(*device_, format, &props); + ifn.vkGetPhysicalDeviceFormatProperties(*device_, format, &props); if ((props.optimalTilingFeatures & required_flags) != required_flags) { // Texture needs conversion on upload to a native format. XELOGE( @@ -257,7 +263,7 @@ TextureCache::Texture* TextureCache::AllocateTexture( } VkImageFormatProperties image_props; - vkGetPhysicalDeviceImageFormatProperties( + ifn.vkGetPhysicalDeviceImageFormatProperties( *device_, format, image_info.imageType, image_info.tiling, image_info.usage, image_info.flags, &image_props); @@ -308,8 +314,10 @@ TextureCache::Texture* TextureCache::AllocateTexture( } bool TextureCache::FreeTexture(Texture* texture) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + if (texture->in_flight_fence) { - VkResult status = vkGetFenceStatus(*device_, texture->in_flight_fence); + VkResult status = dfn.vkGetFenceStatus(*device_, texture->in_flight_fence); if (status != VK_SUCCESS && status != VK_ERROR_DEVICE_LOST) { // Texture still in flight. return false; @@ -317,11 +325,11 @@ bool TextureCache::FreeTexture(Texture* texture) { } if (texture->framebuffer) { - vkDestroyFramebuffer(*device_, texture->framebuffer, nullptr); + dfn.vkDestroyFramebuffer(*device_, texture->framebuffer, nullptr); } for (auto it = texture->views.begin(); it != texture->views.end();) { - vkDestroyImageView(*device_, (*it)->view, nullptr); + dfn.vkDestroyImageView(*device_, (*it)->view, nullptr); it = texture->views.erase(it); } @@ -692,7 +700,8 @@ TextureCache::TextureView* TextureCache::DemandView(Texture* texture, !is_cube ? 1 : 1 + texture->texture_info.depth; VkImageView view; - auto status = vkCreateImageView(*device_, &view_info, nullptr, &view); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + auto status = dfn.vkCreateImageView(*device_, &view_info, nullptr, &view); CheckResult(status, "vkCreateImageView"); if (status == VK_SUCCESS) { auto texture_view = new TextureView(); @@ -832,8 +841,9 @@ TextureCache::Sampler* TextureCache::Demand(const SamplerInfo& sampler_info) { sampler_create_info.borderColor = VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK; sampler_create_info.unnormalizedCoordinates = VK_FALSE; VkSampler vk_sampler; + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); status = - vkCreateSampler(*device_, &sampler_create_info, nullptr, &vk_sampler); + dfn.vkCreateSampler(*device_, &sampler_create_info, nullptr, &vk_sampler); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return nullptr; @@ -947,7 +957,8 @@ TextureCache::Texture* TextureCache::LookupAddress(uint32_t guest_address, void TextureCache::FlushPendingCommands(VkCommandBuffer command_buffer, VkFence completion_fence) { - auto status = vkEndCommandBuffer(command_buffer); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + auto status = dfn.vkEndCommandBuffer(command_buffer); CheckResult(status, "vkEndCommandBuffer"); VkSubmitInfo submit_info; @@ -958,27 +969,27 @@ void TextureCache::FlushPendingCommands(VkCommandBuffer command_buffer, if (device_queue_) { auto status = - vkQueueSubmit(device_queue_, 1, &submit_info, completion_fence); + dfn.vkQueueSubmit(device_queue_, 1, &submit_info, completion_fence); CheckResult(status, "vkQueueSubmit"); } else { std::lock_guard lock(device_->primary_queue_mutex()); - auto status = vkQueueSubmit(device_->primary_queue(), 1, &submit_info, - completion_fence); + auto status = dfn.vkQueueSubmit(device_->primary_queue(), 1, &submit_info, + completion_fence); CheckResult(status, "vkQueueSubmit"); } - vkWaitForFences(*device_, 1, &completion_fence, VK_TRUE, -1); + dfn.vkWaitForFences(*device_, 1, &completion_fence, VK_TRUE, -1); staging_buffer_.Scavenge(); - vkResetFences(*device_, 1, &completion_fence); + dfn.vkResetFences(*device_, 1, &completion_fence); // Reset the command buffer and put it back into the recording state. - vkResetCommandBuffer(command_buffer, 0); + dfn.vkResetCommandBuffer(command_buffer, 0); VkCommandBufferBeginInfo begin_info; std::memset(&begin_info, 0, sizeof(begin_info)); begin_info.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO; begin_info.flags = VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT; - vkBeginCommandBuffer(command_buffer, &begin_info); + dfn.vkBeginCommandBuffer(command_buffer, &begin_info); } bool TextureCache::ConvertTexture(uint8_t* dest, VkBufferImageCopy* copy_region, @@ -1155,6 +1166,8 @@ bool TextureCache::UploadTexture(VkCommandBuffer command_buffer, TextureDump(src, unpack_buffer, unpack_length); } + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Transition the texture into a transfer destination layout. VkImageMemoryBarrier barrier; barrier.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER; @@ -1181,9 +1194,9 @@ bool TextureCache::UploadTexture(VkCommandBuffer command_buffer, barrier.subresourceRange.layerCount = copy_regions[0].imageSubresource.layerCount; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, - nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, + nullptr, 1, &barrier); // Now move the converted texture into the destination. if (dest->format == VK_FORMAT_D16_UNORM_S8_UINT || @@ -1195,19 +1208,19 @@ bool TextureCache::UploadTexture(VkCommandBuffer command_buffer, copy_regions[0].imageSubresource.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT; } - vkCmdCopyBufferToImage(command_buffer, staging_buffer_.gpu_buffer(), - dest->image, VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, - copy_region_count, copy_regions.data()); + dfn.vkCmdCopyBufferToImage(command_buffer, staging_buffer_.gpu_buffer(), + dest->image, VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, + copy_region_count, copy_regions.data()); // Now transition the texture into a shader readonly source. barrier.srcAccessMask = barrier.dstAccessMask; barrier.dstAccessMask = VK_ACCESS_SHADER_READ_BIT; barrier.oldLayout = barrier.newLayout; barrier.newLayout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | - VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, - 0, 0, nullptr, 0, nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, + 0, 0, nullptr, 0, nullptr, 1, &barrier); dest->image_layout = barrier.newLayout; return true; @@ -1297,6 +1310,7 @@ uint32_t TextureCache::ComputeTextureStorage(const TextureInfo& src) { } void TextureCache::WritebackTexture(Texture* texture) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; VkFence fence = wb_command_pool_->BeginBatch(); auto alloc = wb_staging_buffer_.Acquire(texture->alloc_info.size, fence); @@ -1313,7 +1327,7 @@ void TextureCache::WritebackTexture(Texture* texture) { VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT, nullptr, }; - vkBeginCommandBuffer(command_buffer, &begin_info); + dfn.vkBeginCommandBuffer(command_buffer, &begin_info); // TODO: Transition the texture to a transfer source. // TODO: copy depth/layers? @@ -1333,13 +1347,13 @@ void TextureCache::WritebackTexture(Texture* texture) { region.imageExtent.height = texture->texture_info.height + 1; region.imageExtent.depth = 1; - vkCmdCopyImageToBuffer(command_buffer, texture->image, - VK_IMAGE_LAYOUT_GENERAL, - wb_staging_buffer_.gpu_buffer(), 1, ®ion); + dfn.vkCmdCopyImageToBuffer(command_buffer, texture->image, + VK_IMAGE_LAYOUT_GENERAL, + wb_staging_buffer_.gpu_buffer(), 1, ®ion); // TODO: Transition the texture back to a shader resource. - vkEndCommandBuffer(command_buffer); + dfn.vkEndCommandBuffer(command_buffer); // Submit the command buffer. // Submit commands and wait. @@ -1356,11 +1370,12 @@ void TextureCache::WritebackTexture(Texture* texture) { 0, nullptr, }; - status = vkQueueSubmit(device_->primary_queue(), 1, &submit_info, fence); + status = + dfn.vkQueueSubmit(device_->primary_queue(), 1, &submit_info, fence); CheckResult(status, "vkQueueSubmit"); if (status == VK_SUCCESS) { - status = vkQueueWaitIdle(device_->primary_queue()); + status = dfn.vkQueueWaitIdle(device_->primary_queue()); CheckResult(status, "vkQueueWaitIdle"); } } @@ -1453,8 +1468,9 @@ VkDescriptorSet TextureCache::PrepareTextureSet( // Update the descriptor set. if (update_set_info->image_write_count > 0) { - vkUpdateDescriptorSets(*device_, update_set_info->image_write_count, - update_set_info->image_writes, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkUpdateDescriptorSets(*device_, update_set_info->image_write_count, + update_set_info->image_writes, 0, nullptr); } texture_sets_[hash] = descriptor_set; @@ -1613,8 +1629,9 @@ void TextureCache::ClearCache() { textures_.clear(); COUNT_profile_set("gpu/texture_cache/textures", 0); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); for (auto it = samplers_.begin(); it != samplers_.end(); ++it) { - vkDestroySampler(*device_, it->second->sampler, nullptr); + dfn.vkDestroySampler(*device_, it->second->sampler, nullptr); delete it->second; } samplers_.clear(); diff --git a/src/xenia/gpu/vulkan/texture_config.h b/src/xenia/gpu/vulkan/texture_config.h index 5e23d19bd..6587b68cc 100644 --- a/src/xenia/gpu/vulkan/texture_config.h +++ b/src/xenia/gpu/vulkan/texture_config.h @@ -10,9 +10,9 @@ #ifndef XENIA_GPU_VULKAN_TEXTURE_CONFIG_H_ #define XENIA_GPU_VULKAN_TEXTURE_CONFIG_H_ -#include "third_party/volk/volk.h" #include "xenia/gpu/texture_info.h" #include "xenia/gpu/xenos.h" +#include "xenia/ui/vulkan/vulkan.h" namespace xe { namespace gpu { diff --git a/src/xenia/gpu/vulkan/vulkan_command_processor.cc b/src/xenia/gpu/vulkan/vulkan_command_processor.cc index 2809bec7e..41e91886c 100644 --- a/src/xenia/gpu/vulkan/vulkan_command_processor.cc +++ b/src/xenia/gpu/vulkan/vulkan_command_processor.cc @@ -237,6 +237,8 @@ void VulkanCommandProcessor::WriteRegister(uint32_t index, uint32_t value) { void VulkanCommandProcessor::CreateSwapImage(VkCommandBuffer setup_buffer, VkExtent2D extents) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + VkImageCreateInfo image_info; std::memset(&image_info, 0, sizeof(VkImageCreateInfo)); image_info.sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO; @@ -255,16 +257,16 @@ void VulkanCommandProcessor::CreateSwapImage(VkCommandBuffer setup_buffer, image_info.initialLayout = VK_IMAGE_LAYOUT_UNDEFINED; VkImage image_fb; - auto status = vkCreateImage(*device_, &image_info, nullptr, &image_fb); + auto status = dfn.vkCreateImage(*device_, &image_info, nullptr, &image_fb); CheckResult(status, "vkCreateImage"); // Bind memory to image. VkMemoryRequirements mem_requirements; - vkGetImageMemoryRequirements(*device_, image_fb, &mem_requirements); + dfn.vkGetImageMemoryRequirements(*device_, image_fb, &mem_requirements); fb_memory_ = device_->AllocateMemory(mem_requirements, 0); assert_not_null(fb_memory_); - status = vkBindImageMemory(*device_, image_fb, fb_memory_, 0); + status = dfn.vkBindImageMemory(*device_, image_fb, fb_memory_, 0); CheckResult(status, "vkBindImageMemory"); std::lock_guard lock(swap_state_.mutex); @@ -281,8 +283,8 @@ void VulkanCommandProcessor::CreateSwapImage(VkCommandBuffer setup_buffer, VK_COMPONENT_SWIZZLE_A}, {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}, }; - status = - vkCreateImageView(*device_, &view_create_info, nullptr, &fb_image_view_); + status = dfn.vkCreateImageView(*device_, &view_create_info, nullptr, + &fb_image_view_); CheckResult(status, "vkCreateImageView"); VkFramebufferCreateInfo framebuffer_create_info = { @@ -296,8 +298,8 @@ void VulkanCommandProcessor::CreateSwapImage(VkCommandBuffer setup_buffer, extents.height, 1, }; - status = vkCreateFramebuffer(*device_, &framebuffer_create_info, nullptr, - &fb_framebuffer_); + status = dfn.vkCreateFramebuffer(*device_, &framebuffer_create_info, nullptr, + &fb_framebuffer_); CheckResult(status, "vkCreateFramebuffer"); // Transition image to general layout. @@ -313,20 +315,22 @@ void VulkanCommandProcessor::CreateSwapImage(VkCommandBuffer setup_buffer, barrier.image = image_fb; barrier.subresourceRange = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}; - vkCmdPipelineBarrier(setup_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, 0, 0, - nullptr, 0, nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(setup_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, 0, 0, + nullptr, 0, nullptr, 1, &barrier); } void VulkanCommandProcessor::DestroySwapImage() { - vkDestroyFramebuffer(*device_, fb_framebuffer_, nullptr); - vkDestroyImageView(*device_, fb_image_view_, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + + dfn.vkDestroyFramebuffer(*device_, fb_framebuffer_, nullptr); + dfn.vkDestroyImageView(*device_, fb_image_view_, nullptr); std::lock_guard lock(swap_state_.mutex); - vkDestroyImage(*device_, - reinterpret_cast(swap_state_.front_buffer_texture), - nullptr); - vkFreeMemory(*device_, fb_memory_, nullptr); + dfn.vkDestroyImage( + *device_, reinterpret_cast(swap_state_.front_buffer_texture), + nullptr); + dfn.vkFreeMemory(*device_, fb_memory_, nullptr); swap_state_.front_buffer_texture = 0; fb_memory_ = nullptr; @@ -345,17 +349,19 @@ void VulkanCommandProcessor::BeginFrame() { current_command_buffer_ = command_buffer_pool_->AcquireEntry(); current_setup_buffer_ = command_buffer_pool_->AcquireEntry(); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + VkCommandBufferBeginInfo command_buffer_begin_info; command_buffer_begin_info.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO; command_buffer_begin_info.pNext = nullptr; command_buffer_begin_info.flags = VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT; command_buffer_begin_info.pInheritanceInfo = nullptr; - auto status = - vkBeginCommandBuffer(current_command_buffer_, &command_buffer_begin_info); + auto status = dfn.vkBeginCommandBuffer(current_command_buffer_, + &command_buffer_begin_info); CheckResult(status, "vkBeginCommandBuffer"); - status = - vkBeginCommandBuffer(current_setup_buffer_, &command_buffer_begin_info); + status = dfn.vkBeginCommandBuffer(current_setup_buffer_, + &command_buffer_begin_info); CheckResult(status, "vkBeginCommandBuffer"); // Flag renderdoc down to start a capture if requested. @@ -385,10 +391,11 @@ void VulkanCommandProcessor::EndFrame() { current_render_state_ = nullptr; } + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; - status = vkEndCommandBuffer(current_setup_buffer_); + status = dfn.vkEndCommandBuffer(current_setup_buffer_); CheckResult(status, "vkEndCommandBuffer"); - status = vkEndCommandBuffer(current_command_buffer_); + status = dfn.vkEndCommandBuffer(current_command_buffer_); CheckResult(status, "vkEndCommandBuffer"); current_command_buffer_ = nullptr; @@ -403,6 +410,8 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, uint32_t frontbuffer_height) { SCOPE_profile_cpu_f("gpu"); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Build a final command buffer that copies the game's frontbuffer texture // into our backbuffer texture. VkCommandBuffer copy_commands = nullptr; @@ -420,7 +429,7 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, std::memset(&begin_info, 0, sizeof(begin_info)); begin_info.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO; begin_info.flags = VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT; - auto status = vkBeginCommandBuffer(copy_commands, &begin_info); + auto status = dfn.vkBeginCommandBuffer(copy_commands, &begin_info); CheckResult(status, "vkBeginCommandBuffer"); if (!frontbuffer_ptr) { @@ -463,20 +472,20 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, barrier.image = texture->image; barrier.subresourceRange = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}; - vkCmdPipelineBarrier(copy_commands, - VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | - VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, 0, 0, nullptr, - 0, nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(copy_commands, + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | + VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, 0, 0, + nullptr, 0, nullptr, 1, &barrier); barrier.oldLayout = VK_IMAGE_LAYOUT_GENERAL; barrier.newLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; barrier.srcAccessMask = VK_ACCESS_TRANSFER_READ_BIT; barrier.dstAccessMask = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; barrier.image = swap_fb; - vkCmdPipelineBarrier(copy_commands, VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, 0, 0, - nullptr, 0, nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(copy_commands, VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, 0, + 0, nullptr, 0, nullptr, 1, &barrier); // Part of the source image that we want to blit from. VkRect2D src_rect = { @@ -502,7 +511,7 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, std::swap(barrier.oldLayout, barrier.newLayout); barrier.srcAccessMask = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; barrier.dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT; - vkCmdPipelineBarrier( + dfn.vkCmdPipelineBarrier( copy_commands, VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, nullptr, 1, &barrier); @@ -511,7 +520,7 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, swap_state_.height = frontbuffer_height; } - status = vkEndCommandBuffer(copy_commands); + status = dfn.vkEndCommandBuffer(copy_commands); CheckResult(status, "vkEndCommandBuffer"); // Queue up current command buffers. @@ -549,7 +558,7 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, submit_info.signalSemaphoreCount = 0; submit_info.pSignalSemaphores = nullptr; - status = vkQueueSubmit(queue_, 1, &submit_info, current_batch_fence_); + status = dfn.vkQueueSubmit(queue_, 1, &submit_info, current_batch_fence_); if (device_->is_renderdoc_attached() && capturing_) { device_->EndRenderDocFrameCapture(); capturing_ = false; @@ -559,7 +568,7 @@ void VulkanCommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, } } - vkWaitForFences(*device_, 1, ¤t_batch_fence_, VK_TRUE, -1); + dfn.vkWaitForFences(*device_, 1, ¤t_batch_fence_, VK_TRUE, -1); if (cache_clear_requested_) { cache_clear_requested_ = false; @@ -664,6 +673,8 @@ bool VulkanCommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, } } + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Configure the pipeline for drawing. // This encodes all render state (blend, depth, etc), our shader stages, // and our vertex input layout. @@ -675,8 +686,8 @@ bool VulkanCommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, return false; } else if (pipeline_status == PipelineCache::UpdateStatus::kMismatch || full_update) { - vkCmdBindPipeline(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline); + dfn.vkCmdBindPipeline(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline); } pipeline_cache_->SetDynamicState(command_buffer, full_update); @@ -710,8 +721,8 @@ bool VulkanCommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, uint32_t first_vertex = register_file_->values[XE_GPU_REG_VGT_INDX_OFFSET].u32; uint32_t first_instance = 0; - vkCmdDraw(command_buffer, index_count, instance_count, first_vertex, - first_instance); + dfn.vkCmdDraw(command_buffer, index_count, instance_count, first_vertex, + first_instance); } else { // Index buffer draw. uint32_t instance_count = 1; @@ -719,8 +730,8 @@ bool VulkanCommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, uint32_t vertex_offset = register_file_->values[XE_GPU_REG_VGT_INDX_OFFSET].u32; uint32_t first_instance = 0; - vkCmdDrawIndexed(command_buffer, index_count, instance_count, first_index, - vertex_offset, first_instance); + dfn.vkCmdDrawIndexed(command_buffer, index_count, instance_count, + first_index, vertex_offset, first_instance); } return true; @@ -754,7 +765,8 @@ bool VulkanCommandProcessor::PopulateConstants(VkCommandBuffer command_buffer, uint32_t set_constant_offsets[2] = { static_cast(constant_offsets.first), static_cast(constant_offsets.second)}; - vkCmdBindDescriptorSets( + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdBindDescriptorSets( command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline_layout, 0, 1, &constant_descriptor_set, static_cast(xe::countof(set_constant_offsets)), @@ -806,8 +818,9 @@ bool VulkanCommandProcessor::PopulateIndexBuffer( VkIndexType index_type = info.format == xenos::IndexFormat::kInt32 ? VK_INDEX_TYPE_UINT32 : VK_INDEX_TYPE_UINT16; - vkCmdBindIndexBuffer(command_buffer, buffer_ref.first, buffer_ref.second, - index_type); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdBindIndexBuffer(command_buffer, buffer_ref.first, buffer_ref.second, + index_type); return true; } @@ -835,9 +848,10 @@ bool VulkanCommandProcessor::PopulateVertexBuffers( return false; } - vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline_cache_->pipeline_layout(), 2, 1, - &descriptor_set, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_cache_->pipeline_layout(), 2, 1, + &descriptor_set, 0, nullptr); return true; } @@ -859,9 +873,10 @@ bool VulkanCommandProcessor::PopulateSamplers(VkCommandBuffer command_buffer, return false; } - vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline_cache_->pipeline_layout(), 1, 1, - &descriptor_set, 0, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_cache_->pipeline_layout(), 1, 1, + &descriptor_set, 0, nullptr); return true; } @@ -1066,6 +1081,7 @@ bool VulkanCommandProcessor::IssueCopy() { render_cache_->EndRenderPass(); current_render_state_ = nullptr; } + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); auto command_buffer = current_command_buffer_; if (texture->image_layout == VK_IMAGE_LAYOUT_UNDEFINED) { @@ -1087,9 +1103,9 @@ bool VulkanCommandProcessor::IssueCopy() { : VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; texture->image_layout = VK_IMAGE_LAYOUT_GENERAL; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, 0, 0, + nullptr, 0, nullptr, 1, &image_barrier); } // Transition the image into a transfer destination layout, if needed. @@ -1113,9 +1129,9 @@ bool VulkanCommandProcessor::IssueCopy() { is_color_source ? VK_IMAGE_ASPECT_COLOR_BIT : VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, - VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, + VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, 0, 0, nullptr, 0, + nullptr, 1, &image_barrier); // Ask the render cache to copy to the resolve texture. auto edram_base = is_color_source ? color_edram_base : depth_edram_base; @@ -1176,10 +1192,11 @@ bool VulkanCommandProcessor::IssueCopy() { is_color_source ? VK_IMAGE_ASPECT_COLOR_BIT : VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, - VK_PIPELINE_STAGE_TRANSFER_BIT | - VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, - 0, 0, nullptr, 0, nullptr, 1, &tile_image_barrier); + dfn.vkCmdPipelineBarrier( + command_buffer, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, + VK_PIPELINE_STAGE_TRANSFER_BIT | + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT, + 0, 0, nullptr, 0, nullptr, 1, &tile_image_barrier); auto render_pass = blitter_->GetRenderPass(texture->format, is_color_source); @@ -1200,8 +1217,8 @@ bool VulkanCommandProcessor::IssueCopy() { 1, }; - VkResult res = vkCreateFramebuffer(*device_, &fb_create_info, nullptr, - &texture->framebuffer); + VkResult res = dfn.vkCreateFramebuffer(*device_, &fb_create_info, + nullptr, &texture->framebuffer); CheckResult(res, "vkCreateFramebuffer"); } @@ -1268,11 +1285,11 @@ bool VulkanCommandProcessor::IssueCopy() { std::swap(tile_image_barrier.srcAccessMask, tile_image_barrier.dstAccessMask); std::swap(tile_image_barrier.oldLayout, tile_image_barrier.newLayout); - vkCmdPipelineBarrier(command_buffer, - VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | - VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, 0, 0, nullptr, 0, - nullptr, 1, &tile_image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | + VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, 0, 0, + nullptr, 0, nullptr, 1, &tile_image_barrier); } break; case CopyCommand::kConstantOne: @@ -1286,14 +1303,14 @@ bool VulkanCommandProcessor::IssueCopy() { image_barrier.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_TRANSFER_READ_BIT; std::swap(image_barrier.newLayout, image_barrier.oldLayout); - vkCmdPipelineBarrier(command_buffer, - is_color_source - ? VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT - : VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT, - VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | - VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | - VK_PIPELINE_STAGE_TRANSFER_BIT, - 0, 0, nullptr, 0, nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, + is_color_source + ? VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT + : VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT, + VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | + VK_PIPELINE_STAGE_TRANSFER_BIT, + 0, 0, nullptr, 0, nullptr, 1, &image_barrier); // Perform any requested clears. uint32_t copy_depth_clear = regs[XE_GPU_REG_RB_DEPTH_CLEAR].u32; diff --git a/src/xenia/gpu/vulkan/vulkan_graphics_system.cc b/src/xenia/gpu/vulkan/vulkan_graphics_system.cc index 2a9e16a7a..f789e531d 100644 --- a/src/xenia/gpu/vulkan/vulkan_graphics_system.cc +++ b/src/xenia/gpu/vulkan/vulkan_graphics_system.cc @@ -59,8 +59,9 @@ X_STATUS VulkanGraphicsSystem::Setup(cpu::Processor* processor, VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT, device_->queue_family_index(), }; + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); auto status = - vkCreateCommandPool(*device_, &create_info, nullptr, &command_pool_); + dfn.vkCreateCommandPool(*device_, &create_info, nullptr, &command_pool_); CheckResult(status, "vkCreateCommandPool"); return X_STATUS_SUCCESS; @@ -69,7 +70,11 @@ X_STATUS VulkanGraphicsSystem::Setup(cpu::Processor* processor, void VulkanGraphicsSystem::Shutdown() { GraphicsSystem::Shutdown(); - vkDestroyCommandPool(*device_, command_pool_, nullptr); + if (command_pool_ != VK_NULL_HANDLE) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkDestroyCommandPool(*device_, command_pool_, nullptr); + command_pool_ = VK_NULL_HANDLE; + } } std::unique_ptr VulkanGraphicsSystem::Capture() { @@ -79,6 +84,7 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { return nullptr; } + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; VkCommandBufferAllocateInfo alloc_info = { @@ -90,7 +96,7 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { }; VkCommandBuffer cmd = nullptr; - status = vkAllocateCommandBuffers(*device_, &alloc_info, &cmd); + status = dfn.vkAllocateCommandBuffers(*device_, &alloc_info, &cmd); CheckResult(status, "vkAllocateCommandBuffers"); if (status != VK_SUCCESS) { return nullptr; @@ -102,14 +108,14 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT, nullptr, }; - vkBeginCommandBuffer(cmd, &begin_info); + dfn.vkBeginCommandBuffer(cmd, &begin_info); auto front_buffer = reinterpret_cast(swap_state.front_buffer_texture); status = CreateCaptureBuffer(cmd, {swap_state.width, swap_state.height}); if (status != VK_SUCCESS) { - vkFreeCommandBuffers(*device_, command_pool_, 1, &cmd); + dfn.vkFreeCommandBuffers(*device_, command_pool_, 1, &cmd); return nullptr; } @@ -124,9 +130,9 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { barrier.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED; barrier.image = front_buffer; barrier.subresourceRange = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}; - vkCmdPipelineBarrier(cmd, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(cmd, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, + nullptr, 1, &barrier); // Copy front buffer into capture image. VkBufferImageCopy region = { @@ -135,8 +141,8 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { {0, 0, 0}, {swap_state.width, swap_state.height, 1}, }; - vkCmdCopyImageToBuffer(cmd, front_buffer, VK_IMAGE_LAYOUT_GENERAL, - capture_buffer_, 1, ®ion); + dfn.vkCmdCopyImageToBuffer(cmd, front_buffer, VK_IMAGE_LAYOUT_GENERAL, + capture_buffer_, 1, ®ion); VkBufferMemoryBarrier memory_barrier = { VK_STRUCTURE_TYPE_MEMORY_BARRIER, @@ -149,11 +155,11 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { 0, VK_WHOLE_SIZE, }; - vkCmdPipelineBarrier(cmd, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, - VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, 0, 0, nullptr, 1, - &memory_barrier, 0, nullptr); + dfn.vkCmdPipelineBarrier(cmd, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, + VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, 0, 0, nullptr, + 1, &memory_barrier, 0, nullptr); - status = vkEndCommandBuffer(cmd); + status = dfn.vkEndCommandBuffer(cmd); // Submit commands and wait. if (status == VK_SUCCESS) { @@ -169,21 +175,22 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { 0, nullptr, }; - status = vkQueueSubmit(device_->primary_queue(), 1, &submit_info, nullptr); + status = + dfn.vkQueueSubmit(device_->primary_queue(), 1, &submit_info, nullptr); CheckResult(status, "vkQueueSubmit"); if (status == VK_SUCCESS) { - status = vkQueueWaitIdle(device_->primary_queue()); + status = dfn.vkQueueWaitIdle(device_->primary_queue()); CheckResult(status, "vkQueueWaitIdle"); } } - vkFreeCommandBuffers(*device_, command_pool_, 1, &cmd); + dfn.vkFreeCommandBuffers(*device_, command_pool_, 1, &cmd); void* data; if (status == VK_SUCCESS) { - status = vkMapMemory(*device_, capture_buffer_memory_, 0, VK_WHOLE_SIZE, 0, - &data); + status = dfn.vkMapMemory(*device_, capture_buffer_memory_, 0, VK_WHOLE_SIZE, + 0, &data); CheckResult(status, "vkMapMemory"); } @@ -197,7 +204,7 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { std::memcpy(raw_image->data.data(), data, raw_image->stride * raw_image->height); - vkUnmapMemory(*device_, capture_buffer_memory_); + dfn.vkUnmapMemory(*device_, capture_buffer_memory_); DestroyCaptureBuffer(); return raw_image; } @@ -208,6 +215,7 @@ std::unique_ptr VulkanGraphicsSystem::Capture() { VkResult VulkanGraphicsSystem::CreateCaptureBuffer(VkCommandBuffer cmd, VkExtent2D extents) { + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; VkBufferCreateInfo buffer_info = { @@ -220,7 +228,8 @@ VkResult VulkanGraphicsSystem::CreateCaptureBuffer(VkCommandBuffer cmd, 0, nullptr, }; - status = vkCreateBuffer(*device_, &buffer_info, nullptr, &capture_buffer_); + status = + dfn.vkCreateBuffer(*device_, &buffer_info, nullptr, &capture_buffer_); if (status != VK_SUCCESS) { return status; } @@ -229,17 +238,18 @@ VkResult VulkanGraphicsSystem::CreateCaptureBuffer(VkCommandBuffer cmd, // Bind memory to buffer. VkMemoryRequirements mem_requirements; - vkGetBufferMemoryRequirements(*device_, capture_buffer_, &mem_requirements); + dfn.vkGetBufferMemoryRequirements(*device_, capture_buffer_, + &mem_requirements); capture_buffer_memory_ = device_->AllocateMemory( mem_requirements, VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | VK_MEMORY_PROPERTY_HOST_COHERENT_BIT); assert_not_null(capture_buffer_memory_); - status = - vkBindBufferMemory(*device_, capture_buffer_, capture_buffer_memory_, 0); + status = dfn.vkBindBufferMemory(*device_, capture_buffer_, + capture_buffer_memory_, 0); CheckResult(status, "vkBindImageMemory"); if (status != VK_SUCCESS) { - vkDestroyBuffer(*device_, capture_buffer_, nullptr); + dfn.vkDestroyBuffer(*device_, capture_buffer_, nullptr); return status; } @@ -247,8 +257,9 @@ VkResult VulkanGraphicsSystem::CreateCaptureBuffer(VkCommandBuffer cmd, } void VulkanGraphicsSystem::DestroyCaptureBuffer() { - vkDestroyBuffer(*device_, capture_buffer_, nullptr); - vkFreeMemory(*device_, capture_buffer_memory_, nullptr); + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkDestroyBuffer(*device_, capture_buffer_, nullptr); + dfn.vkFreeMemory(*device_, capture_buffer_memory_, nullptr); capture_buffer_ = nullptr; capture_buffer_memory_ = nullptr; capture_buffer_size_ = 0; @@ -286,6 +297,7 @@ void VulkanGraphicsSystem::Swap(xe::ui::UIEvent* e) { return; } + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device_->dfn(); auto swap_chain = display_context_->swap_chain(); auto copy_cmd_buffer = swap_chain->copy_cmd_buffer(); auto front_buffer = @@ -302,9 +314,9 @@ void VulkanGraphicsSystem::Swap(xe::ui::UIEvent* e) { barrier.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED; barrier.image = front_buffer; barrier.subresourceRange = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}; - vkCmdPipelineBarrier(copy_cmd_buffer, VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, - nullptr, 1, &barrier); + dfn.vkCmdPipelineBarrier(copy_cmd_buffer, VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, + nullptr, 1, &barrier); VkImageBlit region; region.srcSubresource = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 0, 1}; @@ -317,10 +329,10 @@ void VulkanGraphicsSystem::Swap(xe::ui::UIEvent* e) { region.dstOffsets[1] = {static_cast(swap_chain->surface_width()), static_cast(swap_chain->surface_height()), 1}; - vkCmdBlitImage(copy_cmd_buffer, front_buffer, VK_IMAGE_LAYOUT_GENERAL, - swap_chain->surface_image(), - VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, 1, ®ion, - VK_FILTER_LINEAR); + dfn.vkCmdBlitImage(copy_cmd_buffer, front_buffer, VK_IMAGE_LAYOUT_GENERAL, + swap_chain->surface_image(), + VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, 1, ®ion, + VK_FILTER_LINEAR); } } // namespace vulkan diff --git a/src/xenia/gpu/vulkan/vulkan_shader.cc b/src/xenia/gpu/vulkan/vulkan_shader.cc index 99333f062..f70be58eb 100644 --- a/src/xenia/gpu/vulkan/vulkan_shader.cc +++ b/src/xenia/gpu/vulkan/vulkan_shader.cc @@ -30,7 +30,9 @@ VulkanShader::VulkanShader(ui::vulkan::VulkanDevice* device, VulkanShader::VulkanTranslation::~VulkanTranslation() { if (shader_module_) { const VulkanShader& vulkan_shader = static_cast(shader()); - vkDestroyShaderModule(*vulkan_shader.device_, shader_module_, nullptr); + const ui::vulkan::VulkanDevice* device = vulkan_shader.device_; + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device->dfn(); + dfn.vkDestroyShaderModule(*device, shader_module_, nullptr); shader_module_ = nullptr; } } @@ -40,7 +42,8 @@ bool VulkanShader::VulkanTranslation::Prepare() { assert_true(is_valid()); const VulkanShader& vulkan_shader = static_cast(shader()); - ui::vulkan::VulkanDevice* device = vulkan_shader.device_; + const ui::vulkan::VulkanDevice* device = vulkan_shader.device_; + const ui::vulkan::VulkanDevice::DeviceFunctions& dfn = device->dfn(); // Create the shader module. VkShaderModuleCreateInfo shader_info; @@ -51,7 +54,7 @@ bool VulkanShader::VulkanTranslation::Prepare() { shader_info.pCode = reinterpret_cast(translated_binary().data()); auto status = - vkCreateShaderModule(*device, &shader_info, nullptr, &shader_module_); + dfn.vkCreateShaderModule(*device, &shader_info, nullptr, &shader_module_); CheckResult(status, "vkCreateShaderModule"); char type_char; diff --git a/src/xenia/gpu/xenos.h b/src/xenia/gpu/xenos.h index 24d7a9a98..d3a202dd6 100644 --- a/src/xenia/gpu/xenos.h +++ b/src/xenia/gpu/xenos.h @@ -15,6 +15,7 @@ #include "xenia/base/assert.h" #include "xenia/base/byte_order.h" #include "xenia/base/math.h" +#include "xenia/base/memory.h" #include "xenia/base/platform.h" namespace xe { @@ -27,11 +28,19 @@ namespace xenos { // in bit fields (registers are 32-bit, and the microcode consists of triples of // 32-bit words). +constexpr fourcc_t kSwapSignature = make_fourcc("SWAP"); + enum class ShaderType : uint32_t { kVertex = 0, kPixel = 1, }; +// Only the lower 24 bits of the vertex index are used (tested on an Adreno 200 +// phone using a GL_UNSIGNED_INT element array buffer with junk in the upper 8 +// bits that had no effect on drawing). +constexpr uint32_t kVertexIndexBits = 24; +constexpr uint32_t kVertexIndexMask = (uint32_t(1) << kVertexIndexBits) - 1; + enum class PrimitiveType : uint32_t { kNone = 0x00, kPointList = 0x01, @@ -70,38 +79,6 @@ enum class PrimitiveType : uint32_t { kQuadPatch = 0x12, }; -// Polygonal primitive types (not including points and lines) are rasterized as -// triangles, have front and back faces, and also support face culling and fill -// modes (polymode_front_ptype, polymode_back_ptype). Other primitive types are -// always "front" (but don't support front face and back face culling, according -// to OpenGL and Vulkan specifications - even if glCullFace is -// GL_FRONT_AND_BACK, points and lines are still drawn), and may in some cases -// use the "para" registers instead of "front" or "back" (for "parallelogram" - -// like poly_offset_para_enable). -constexpr bool IsPrimitivePolygonal(bool tessellated, PrimitiveType type) { - if (tessellated && (type == PrimitiveType::kTrianglePatch || - type == PrimitiveType::kQuadPatch)) { - return true; - } - switch (type) { - case PrimitiveType::kTriangleList: - case PrimitiveType::kTriangleFan: - case PrimitiveType::kTriangleStrip: - case PrimitiveType::kTriangleWithWFlags: - case PrimitiveType::kQuadList: - case PrimitiveType::kQuadStrip: - case PrimitiveType::kPolygon: - return true; - default: - break; - } - // TODO(Triang3l): Investigate how kRectangleList should be treated - possibly - // actually drawn as two polygons on the console, however, the current - // geometry shader doesn't care about the winding order - allowing backface - // culling for rectangles currently breaks Gears of War 2. - return false; -} - // For the texture fetch constant (not the tfetch instruction), stacked stored // as 2D. enum class DataDimension : uint32_t { @@ -217,10 +194,10 @@ enum class SurfaceNumFormat : uint32_t { kFloat = 7, }; -// The EDRAM is an opaque block of memory accessible by the RB pipeline stage of -// the GPU, which performs output-merger functionality (color render target -// writing and blending, depth and stencil testing) and resolve (copy) -// operations. +// The EDRAM is an opaque block of memory accessible by the RB (render backend) +// pipeline stage of the GPU, which performs output-merger functionality (color +// render target writing and blending, depth and stencil testing) and resolve +// (copy) operations. // // Data in the 10 MiB of EDRAM is laid out as 2048 tiles on 80x16 32bpp MSAA // samples. With 2x MSAA, one pixel consists of 1x2 samples, and with 4x, it @@ -370,6 +347,16 @@ constexpr float UNorm24To32(uint32_t n24) { return float(n24 + (n24 >> 23)) * (1.0f / float(1 << 24)); } +// Scale for conversion of slope scales from PA_SU_POLY_OFFSET_FRONT/BACK_SCALE +// units to those used when the slope is computed from the difference between +// adjacent pixels, for conversion from the guest to common host APIs or to +// calculation using max(|ddx(z)|, |ddy(z)|). +// "slope computed in subpixels (1/12 or 1/16)" - R5xx Acceleration. +// But the correct scale for conversion of the slope scale from subpixels to +// pixels is likely 1/16 according to: +// https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L946 +constexpr float kPolygonOffsetScaleSubpixelUnit = 1.0f / 16.0f; + constexpr uint32_t kColorRenderTargetFormatBits = 4; constexpr uint32_t kDepthRenderTargetFormatBits = 1; constexpr uint32_t kRenderTargetFormatBits = @@ -476,8 +463,6 @@ enum class TextureFormat : uint32_t { k_DXT3A_AS_1_1_1_1 = 61, k_8_8_8_8_GAMMA_EDRAM = 62, k_2_10_10_10_FLOAT_EDRAM = 63, - - kUnknown = 0xFFFFFFFFu, }; // Subset of a2xx_sq_surfaceformat - formats that RTs can be resolved to. @@ -778,6 +763,10 @@ enum class TessellationMode : uint32_t { enum class PolygonModeEnable : uint32_t { kDisabled = 0, // Render triangles. kDualMode = 1, // Send 2 sets of 3 polygons with the specified polygon type. + // The game Fuse uses 2 for triangles, which is "reserved" on R6xx and not + // defined on Adreno 2xx, but polymode_front/back_ptype are 0 (points) in this + // case in Fuse, which should not be respected for non-kDualMode as the game + // wants to draw filled triangles. }; enum class PolygonType : uint32_t { @@ -1228,14 +1217,14 @@ struct alignas(uint32_t) xe_gpu_depth_sample_counts { // This is little endian as it is swapped in D3D code. // Corresponding A and B values are summed up by D3D. // Occlusion there is calculated by substracting begin from end struct. - uint32_t Total_A; - uint32_t Total_B; - uint32_t ZFail_A; - uint32_t ZFail_B; - uint32_t ZPass_A; - uint32_t ZPass_B; - uint32_t StencilFail_A; - uint32_t StencilFail_B; + le Total_A; + le Total_B; + le ZFail_A; + le ZFail_B; + le ZPass_A; + le ZPass_B; + le StencilFail_A; + le StencilFail_B; }; static_assert_size(xe_gpu_depth_sample_counts, sizeof(uint32_t) * 8); diff --git a/src/xenia/hid/hid_demo.cc b/src/xenia/hid/hid_demo.cc index 44d8c780c..c1a81f533 100644 --- a/src/xenia/hid/hid_demo.cc +++ b/src/xenia/hid/hid_demo.cc @@ -10,8 +10,8 @@ #include #include #include -#include #include +#include #include "third_party/fmt/include/fmt/format.h" #include "third_party/imgui/imgui.h" @@ -23,6 +23,7 @@ #include "xenia/hid/hid_flags.h" #include "xenia/hid/input_system.h" #include "xenia/ui/imgui_drawer.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/vulkan/vulkan_provider.h" #include "xenia/ui/window.h" @@ -281,44 +282,42 @@ void DrawInputGetState() { ImGui::EndChild(); } -static const std::map::type, - const std::string> - vk_pretty = { - {X_INPUT_GAMEPAD_VK_A, "A"}, - {X_INPUT_GAMEPAD_VK_B, "B"}, - {X_INPUT_GAMEPAD_VK_X, "X"}, - {X_INPUT_GAMEPAD_VK_Y, "Y"}, - {X_INPUT_GAMEPAD_VK_RSHOULDER, "R Shoulder"}, - {X_INPUT_GAMEPAD_VK_LSHOULDER, "L Shoulder"}, - {X_INPUT_GAMEPAD_VK_LTRIGGER, "L Trigger"}, - {X_INPUT_GAMEPAD_VK_RTRIGGER, "R Trigger"}, +static const std::unordered_map kVkPretty = { + {ui::VirtualKey::kXInputPadA, "A"}, + {ui::VirtualKey::kXInputPadB, "B"}, + {ui::VirtualKey::kXInputPadX, "X"}, + {ui::VirtualKey::kXInputPadY, "Y"}, + {ui::VirtualKey::kXInputPadRShoulder, "R Shoulder"}, + {ui::VirtualKey::kXInputPadLShoulder, "L Shoulder"}, + {ui::VirtualKey::kXInputPadLTrigger, "L Trigger"}, + {ui::VirtualKey::kXInputPadRTrigger, "R Trigger"}, - {X_INPUT_GAMEPAD_VK_DPAD_UP, "DPad up"}, - {X_INPUT_GAMEPAD_VK_DPAD_DOWN, "DPad down"}, - {X_INPUT_GAMEPAD_VK_DPAD_LEFT, "DPad left"}, - {X_INPUT_GAMEPAD_VK_DPAD_RIGHT, "DPad right"}, - {X_INPUT_GAMEPAD_VK_START, "Start"}, - {X_INPUT_GAMEPAD_VK_BACK, "Back"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_PRESS, "L Thumb press"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_PRESS, "R Thumb press"}, + {ui::VirtualKey::kXInputPadDpadUp, "DPad up"}, + {ui::VirtualKey::kXInputPadDpadDown, "DPad down"}, + {ui::VirtualKey::kXInputPadDpadLeft, "DPad left"}, + {ui::VirtualKey::kXInputPadDpadRight, "DPad right"}, + {ui::VirtualKey::kXInputPadStart, "Start"}, + {ui::VirtualKey::kXInputPadBack, "Back"}, + {ui::VirtualKey::kXInputPadLThumbPress, "L Thumb press"}, + {ui::VirtualKey::kXInputPadRThumbPress, "R Thumb press"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_UP, "L Thumb up"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_DOWN, "L Thumb down"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_RIGHT, "L Thumb right"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_LEFT, "L Thumb left"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_UPLEFT, "L Thumb up & left"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_UPRIGHT, "L Thumb up & right"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_DOWNRIGHT, "L Thumb down & right"}, - {X_INPUT_GAMEPAD_VK_LTHUMB_DOWNLEFT, "L Thumb down & left"}, + {ui::VirtualKey::kXInputPadLThumbUp, "L Thumb up"}, + {ui::VirtualKey::kXInputPadLThumbDown, "L Thumb down"}, + {ui::VirtualKey::kXInputPadLThumbRight, "L Thumb right"}, + {ui::VirtualKey::kXInputPadLThumbLeft, "L Thumb left"}, + {ui::VirtualKey::kXInputPadLThumbUpLeft, "L Thumb up & left"}, + {ui::VirtualKey::kXInputPadLThumbUpRight, "L Thumb up & right"}, + {ui::VirtualKey::kXInputPadLThumbDownRight, "L Thumb down & right"}, + {ui::VirtualKey::kXInputPadLThumbDownLeft, "L Thumb down & left"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_UP, "R Thumb up"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_DOWN, "R Thumb down"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_RIGHT, "R Thumb right"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_LEFT, "R Thumb left"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_UPLEFT, "R Thumb up & left"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_UPRIGHT, "R Thumb up & right"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_DOWNRIGHT, "R Thumb down & right"}, - {X_INPUT_GAMEPAD_VK_RTHUMB_DOWNLEFT, "R Thumb down & left"}, + {ui::VirtualKey::kXInputPadRThumbUp, "R Thumb up"}, + {ui::VirtualKey::kXInputPadRThumbDown, "R Thumb down"}, + {ui::VirtualKey::kXInputPadRThumbRight, "R Thumb right"}, + {ui::VirtualKey::kXInputPadRThumbLeft, "R Thumb left"}, + {ui::VirtualKey::kXInputPadRThumbUpLeft, "R Thumb up & left"}, + {ui::VirtualKey::kXInputPadRThumbUpRight, "R Thumb up & right"}, + {ui::VirtualKey::kXInputPadRThumbDownRight, "R Thumb down & right"}, + {ui::VirtualKey::kXInputPadRThumbDownLeft, "R Thumb down & left"}, }; void DrawUserInputGetKeystroke(uint32_t user_index, bool poll, @@ -354,10 +353,12 @@ void DrawUserInputGetKeystroke(uint32_t user_index, bool poll, break; } - const auto key_search = vk_pretty.find(stroke.virtual_key); - const auto key = key_search != vk_pretty.end() - ? key_search->second - : fmt::format("0x{:04x}", stroke.virtual_key); + ui::VirtualKey virtual_key = ui::VirtualKey(stroke.virtual_key.get()); + const auto key_search = kVkPretty.find(virtual_key); + std::string key = + key_search != kVkPretty.cend() + ? key_search->second + : fmt::format("0x{:04x}", uint16_t(virtual_key)); event_log.emplace_front(fmt::format( "{:>6} {:>9}ms {:<20} {} {} {}", ImGui::GetFrameCount(), dur, key, diff --git a/src/xenia/hid/input.h b/src/xenia/hid/input.h index 9ebec0108..82202a391 100644 --- a/src/xenia/hid/input.h +++ b/src/xenia/hid/input.h @@ -46,43 +46,7 @@ enum X_INPUT_GAMEPAD_BUTTON { X_INPUT_GAMEPAD_Y = 0x8000, }; -enum X_INPUT_GAMEPAD_VK { - X_INPUT_GAMEPAD_VK_A = 0x5800, - X_INPUT_GAMEPAD_VK_B = 0x5801, - X_INPUT_GAMEPAD_VK_X = 0x5802, - X_INPUT_GAMEPAD_VK_Y = 0x5803, - X_INPUT_GAMEPAD_VK_RSHOULDER = 0x5804, - X_INPUT_GAMEPAD_VK_LSHOULDER = 0x5805, - X_INPUT_GAMEPAD_VK_LTRIGGER = 0x5806, - X_INPUT_GAMEPAD_VK_RTRIGGER = 0x5807, - - X_INPUT_GAMEPAD_VK_DPAD_UP = 0x5810, - X_INPUT_GAMEPAD_VK_DPAD_DOWN = 0x5811, - X_INPUT_GAMEPAD_VK_DPAD_LEFT = 0x5812, - X_INPUT_GAMEPAD_VK_DPAD_RIGHT = 0x5813, - X_INPUT_GAMEPAD_VK_START = 0x5814, - X_INPUT_GAMEPAD_VK_BACK = 0x5815, - X_INPUT_GAMEPAD_VK_LTHUMB_PRESS = 0x5816, - X_INPUT_GAMEPAD_VK_RTHUMB_PRESS = 0x5817, - - X_INPUT_GAMEPAD_VK_LTHUMB_UP = 0x5820, - X_INPUT_GAMEPAD_VK_LTHUMB_DOWN = 0x5821, - X_INPUT_GAMEPAD_VK_LTHUMB_RIGHT = 0x5822, - X_INPUT_GAMEPAD_VK_LTHUMB_LEFT = 0x5823, - X_INPUT_GAMEPAD_VK_LTHUMB_UPLEFT = 0x5824, - X_INPUT_GAMEPAD_VK_LTHUMB_UPRIGHT = 0x5825, - X_INPUT_GAMEPAD_VK_LTHUMB_DOWNRIGHT = 0x5826, - X_INPUT_GAMEPAD_VK_LTHUMB_DOWNLEFT = 0x5827, - - X_INPUT_GAMEPAD_VK_RTHUMB_UP = 0x5830, - X_INPUT_GAMEPAD_VK_RTHUMB_DOWN = 0x5831, - X_INPUT_GAMEPAD_VK_RTHUMB_RIGHT = 0x5832, - X_INPUT_GAMEPAD_VK_RTHUMB_LEFT = 0x5833, - X_INPUT_GAMEPAD_VK_RTHUMB_UPLEFT = 0x5834, - X_INPUT_GAMEPAD_VK_RTHUMB_UPRIGHT = 0x5835, - X_INPUT_GAMEPAD_VK_RTHUMB_DOWNRIGHT = 0x5836, - X_INPUT_GAMEPAD_VK_RTHUMB_DOWNLEFT = 0x5837, -}; +// For VK_PAD, use ui::VirtualKey. enum X_INPUT_KEYSTROKE_FLAGS { X_INPUT_KEYSTROKE_KEYDOWN = 0x0001, diff --git a/src/xenia/hid/premake5.lua b/src/xenia/hid/premake5.lua index 348e12371..ce89331c9 100644 --- a/src/xenia/hid/premake5.lua +++ b/src/xenia/hid/premake5.lua @@ -22,7 +22,6 @@ project("xenia-hid-demo") links({ "fmt", "imgui", - "volk", "xenia-base", "xenia-helper-sdl", "xenia-hid", diff --git a/src/xenia/hid/sdl/sdl_input_driver.cc b/src/xenia/hid/sdl/sdl_input_driver.cc index 27a00c80d..0e4e7fd11 100644 --- a/src/xenia/hid/sdl/sdl_input_driver.cc +++ b/src/xenia/hid/sdl/sdl_input_driver.cc @@ -20,6 +20,7 @@ #include "xenia/base/logging.h" #include "xenia/helper/sdl/sdl_helper.h" #include "xenia/hid/hid_flags.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/window.h" // TODO(joellinn) make this path relative to the config folder. @@ -238,48 +239,46 @@ X_RESULT SDLInputDriver::GetKeystroke(uint32_t users, uint32_t flags, // The order of this list is also the order in which events are send if // multiple buttons change at once. static_assert(sizeof(X_INPUT_GAMEPAD::buttons) == 2); - static constexpr std::array::type, - 34> - vk_lookup = { - // 00 - True buttons from xinput button field - X_INPUT_GAMEPAD_VK_DPAD_UP, - X_INPUT_GAMEPAD_VK_DPAD_DOWN, - X_INPUT_GAMEPAD_VK_DPAD_LEFT, - X_INPUT_GAMEPAD_VK_DPAD_RIGHT, - X_INPUT_GAMEPAD_VK_START, - X_INPUT_GAMEPAD_VK_BACK, - X_INPUT_GAMEPAD_VK_LTHUMB_PRESS, - X_INPUT_GAMEPAD_VK_RTHUMB_PRESS, - X_INPUT_GAMEPAD_VK_LSHOULDER, - X_INPUT_GAMEPAD_VK_RSHOULDER, - 0, /* Guide has no VK */ - 0, /* Unknown */ - X_INPUT_GAMEPAD_VK_A, - X_INPUT_GAMEPAD_VK_B, - X_INPUT_GAMEPAD_VK_X, - X_INPUT_GAMEPAD_VK_Y, - // 16 - Fake buttons generated from analog inputs - X_INPUT_GAMEPAD_VK_LTRIGGER, - X_INPUT_GAMEPAD_VK_RTRIGGER, - // 18 - X_INPUT_GAMEPAD_VK_LTHUMB_UP, - X_INPUT_GAMEPAD_VK_LTHUMB_DOWN, - X_INPUT_GAMEPAD_VK_LTHUMB_RIGHT, - X_INPUT_GAMEPAD_VK_LTHUMB_LEFT, - X_INPUT_GAMEPAD_VK_LTHUMB_UPLEFT, - X_INPUT_GAMEPAD_VK_LTHUMB_UPRIGHT, - X_INPUT_GAMEPAD_VK_LTHUMB_DOWNRIGHT, - X_INPUT_GAMEPAD_VK_LTHUMB_DOWNLEFT, - // 26 - X_INPUT_GAMEPAD_VK_RTHUMB_UP, - X_INPUT_GAMEPAD_VK_RTHUMB_DOWN, - X_INPUT_GAMEPAD_VK_RTHUMB_RIGHT, - X_INPUT_GAMEPAD_VK_RTHUMB_LEFT, - X_INPUT_GAMEPAD_VK_RTHUMB_UPLEFT, - X_INPUT_GAMEPAD_VK_RTHUMB_UPRIGHT, - X_INPUT_GAMEPAD_VK_RTHUMB_DOWNRIGHT, - X_INPUT_GAMEPAD_VK_RTHUMB_DOWNLEFT, - }; + static constexpr std::array kVkLookup = { + // 00 - True buttons from xinput button field + ui::VirtualKey::kXInputPadDpadUp, + ui::VirtualKey::kXInputPadDpadDown, + ui::VirtualKey::kXInputPadDpadLeft, + ui::VirtualKey::kXInputPadDpadRight, + ui::VirtualKey::kXInputPadStart, + ui::VirtualKey::kXInputPadBack, + ui::VirtualKey::kXInputPadLThumbPress, + ui::VirtualKey::kXInputPadRThumbPress, + ui::VirtualKey::kXInputPadLShoulder, + ui::VirtualKey::kXInputPadRShoulder, + ui::VirtualKey::kNone, /* Guide has no VK */ + ui::VirtualKey::kNone, /* Unknown */ + ui::VirtualKey::kXInputPadA, + ui::VirtualKey::kXInputPadB, + ui::VirtualKey::kXInputPadX, + ui::VirtualKey::kXInputPadY, + // 16 - Fake buttons generated from analog inputs + ui::VirtualKey::kXInputPadLTrigger, + ui::VirtualKey::kXInputPadRTrigger, + // 18 + ui::VirtualKey::kXInputPadLThumbUp, + ui::VirtualKey::kXInputPadLThumbDown, + ui::VirtualKey::kXInputPadLThumbRight, + ui::VirtualKey::kXInputPadLThumbLeft, + ui::VirtualKey::kXInputPadLThumbUpLeft, + ui::VirtualKey::kXInputPadLThumbUpRight, + ui::VirtualKey::kXInputPadLThumbDownRight, + ui::VirtualKey::kXInputPadLThumbDownLeft, + // 26 + ui::VirtualKey::kXInputPadRThumbUp, + ui::VirtualKey::kXInputPadRThumbDown, + ui::VirtualKey::kXInputPadRThumbRight, + ui::VirtualKey::kXInputPadRThumbLeft, + ui::VirtualKey::kXInputPadRThumbUpLeft, + ui::VirtualKey::kXInputPadRThumbUpRight, + ui::VirtualKey::kXInputPadRThumbDownRight, + ui::VirtualKey::kXInputPadRThumbDownLeft, + }; auto is_active = this->is_active(); @@ -319,9 +318,9 @@ X_RESULT SDLInputDriver::GetKeystroke(uint32_t users, uint32_t flags, if (last.repeat_state == RepeatState::Repeating && (last.repeat_time + HID_SDL_REPEAT_RATE < guest_now)) { last.repeat_time = guest_now; - auto vk = vk_lookup.at(last.repeat_butt_idx); - assert_not_zero(vk); - out_keystroke->virtual_key = vk; + ui::VirtualKey vk = kVkLookup.at(last.repeat_butt_idx); + assert_true(vk != ui::VirtualKey::kNone); + out_keystroke->virtual_key = uint16_t(vk); out_keystroke->unicode = 0; out_keystroke->user_index = user_index; out_keystroke->hid_code = 0; @@ -340,17 +339,17 @@ X_RESULT SDLInputDriver::GetKeystroke(uint32_t users, uint32_t flags, // up before THUMB_LEFT is down. for (auto [clear_pass, i] = std::tuple{true, 0}; i < 2; clear_pass = false, i++) { - for (uint8_t i = 0; i < std::size(vk_lookup); i++) { + for (uint8_t i = 0; i < uint8_t(std::size(kVkLookup)); i++) { auto fbutton = uint64_t(1) << i; if (!(butts_changed & fbutton)) { continue; } - auto vk = vk_lookup.at(i); - if (!vk) { + ui::VirtualKey vk = kVkLookup.at(i); + if (vk == ui::VirtualKey::kNone) { continue; } - out_keystroke->virtual_key = vk; + out_keystroke->virtual_key = uint16_t(vk); out_keystroke->unicode = 0; out_keystroke->user_index = user_index; out_keystroke->hid_code = 0; diff --git a/src/xenia/hid/winkey/winkey_input_driver.cc b/src/xenia/hid/winkey/winkey_input_driver.cc index 18e192578..ba0b12cdf 100644 --- a/src/xenia/hid/winkey/winkey_input_driver.cc +++ b/src/xenia/hid/winkey/winkey_input_driver.cc @@ -12,6 +12,7 @@ #include "xenia/base/platform_win.h" #include "xenia/hid/hid_flags.h" #include "xenia/hid/input_system.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/window.h" namespace xe { @@ -29,7 +30,7 @@ WinKeyInputDriver::WinKeyInputDriver(xe::ui::Window* window) auto global_lock = global_critical_region_.Acquire(); KeyEvent key; - key.vkey = evt->key_code(); + key.virtual_key = evt->virtual_key(); key.transition = true; key.prev_state = evt->prev_state(); key.repeat_count = evt->repeat_count(); @@ -43,7 +44,7 @@ WinKeyInputDriver::WinKeyInputDriver(xe::ui::Window* window) auto global_lock = global_critical_region_.Acquire(); KeyEvent key; - key.vkey = evt->key_code(); + key.virtual_key = evt->virtual_key(); key.transition = false; key.prev_state = evt->prev_state(); key.repeat_count = evt->repeat_count(); @@ -241,7 +242,7 @@ X_RESULT WinKeyInputDriver::GetKeystroke(uint32_t user_index, uint32_t flags, X_RESULT result = X_ERROR_EMPTY; - uint16_t virtual_key = 0; + ui::VirtualKey xinput_virtual_key = ui::VirtualKey::kNone; uint16_t unicode = 0; uint16_t keystroke_flags = 0; uint8_t hid_code = 0; @@ -258,100 +259,93 @@ X_RESULT WinKeyInputDriver::GetKeystroke(uint32_t user_index, uint32_t flags, key_events_.pop(); } - // TODO(DrChat): Some other way to toggle this... - if (IS_KEY_TOGGLED(VK_CAPITAL)) { - // dpad toggled - if (evt.vkey == (0x41)) { - // A - virtual_key = 0x5812; // VK_PAD_DPAD_LEFT - } else if (evt.vkey == (0x44)) { - // D - virtual_key = 0x5813; // VK_PAD_DPAD_RIGHT - } else if (evt.vkey == (0x53)) { - // S - virtual_key = 0x5811; // VK_PAD_DPAD_DOWN - } else if (evt.vkey == (0x57)) { - // W - virtual_key = 0x5810; // VK_PAD_DPAD_UP - } - } else { - // left stick - if (evt.vkey == (0x57)) { - // W - virtual_key = 0x5820; // VK_PAD_LTHUMB_UP - } - if (evt.vkey == (0x53)) { - // S - virtual_key = 0x5821; // VK_PAD_LTHUMB_DOWN - } - if (evt.vkey == (0x44)) { - // D - virtual_key = 0x5822; // VK_PAD_LTHUMB_RIGHT - } - if (evt.vkey == (0x41)) { - // A - virtual_key = 0x5823; // VK_PAD_LTHUMB_LEFT - } + switch (evt.virtual_key) { + case ui::VirtualKey::kOem1: // ; + xinput_virtual_key = ui::VirtualKey::kXInputPadA; + break; + case ui::VirtualKey::kOem7: // ' + xinput_virtual_key = ui::VirtualKey::kXInputPadB; + break; + case ui::VirtualKey::kL: + xinput_virtual_key = ui::VirtualKey::kXInputPadX; + break; + case ui::VirtualKey::kP: + xinput_virtual_key = ui::VirtualKey::kXInputPadY; + break; + case ui::VirtualKey::k3: + xinput_virtual_key = ui::VirtualKey::kXInputPadRShoulder; + break; + case ui::VirtualKey::k1: + xinput_virtual_key = ui::VirtualKey::kXInputPadLShoulder; + break; + case ui::VirtualKey::kQ: + case ui::VirtualKey::kI: + xinput_virtual_key = ui::VirtualKey::kXInputPadLTrigger; + break; + case ui::VirtualKey::kE: + case ui::VirtualKey::kO: + xinput_virtual_key = ui::VirtualKey::kXInputPadRTrigger; + break; + case ui::VirtualKey::kX: + xinput_virtual_key = ui::VirtualKey::kXInputPadStart; + break; + case ui::VirtualKey::kZ: + xinput_virtual_key = ui::VirtualKey::kXInputPadBack; + break; + case ui::VirtualKey::kUp: + xinput_virtual_key = ui::VirtualKey::kXInputPadRThumbUp; + break; + case ui::VirtualKey::kDown: + xinput_virtual_key = ui::VirtualKey::kXInputPadRThumbDown; + break; + case ui::VirtualKey::kRight: + xinput_virtual_key = ui::VirtualKey::kXInputPadRThumbRight; + break; + case ui::VirtualKey::kLeft: + xinput_virtual_key = ui::VirtualKey::kXInputPadRThumbLeft; + break; + default: + // TODO(DrChat): Some other way to toggle this... + if (IS_KEY_TOGGLED(VK_CAPITAL) || IS_KEY_DOWN(VK_SHIFT)) { + // D-pad toggled. + switch (evt.virtual_key) { + case ui::VirtualKey::kW: + xinput_virtual_key = ui::VirtualKey::kXInputPadDpadUp; + break; + case ui::VirtualKey::kS: + xinput_virtual_key = ui::VirtualKey::kXInputPadDpadDown; + break; + case ui::VirtualKey::kA: + xinput_virtual_key = ui::VirtualKey::kXInputPadDpadLeft; + break; + case ui::VirtualKey::kD: + xinput_virtual_key = ui::VirtualKey::kXInputPadDpadRight; + break; + default: + break; + } + } else { + // Left thumbstick. + switch (evt.virtual_key) { + case ui::VirtualKey::kW: + xinput_virtual_key = ui::VirtualKey::kXInputPadLThumbUp; + break; + case ui::VirtualKey::kS: + xinput_virtual_key = ui::VirtualKey::kXInputPadLThumbDown; + break; + case ui::VirtualKey::kA: + xinput_virtual_key = ui::VirtualKey::kXInputPadLThumbLeft; + break; + case ui::VirtualKey::kD: + xinput_virtual_key = ui::VirtualKey::kXInputPadLThumbRight; + break; + default: + break; + } + } } - // Right stick - if (evt.vkey == (0x26)) { - // Up - virtual_key = 0x5830; - } - if (evt.vkey == (0x28)) { - // Down - virtual_key = 0x5831; - } - if (evt.vkey == (0x27)) { - // Right - virtual_key = 0x5832; - } - if (evt.vkey == (0x25)) { - // Left - virtual_key = 0x5833; - } - - if (evt.vkey == (0x4C)) { - // L - virtual_key = 0x5802; // VK_PAD_X - } else if (evt.vkey == (VK_OEM_7)) { - // ' - virtual_key = 0x5801; // VK_PAD_B - } else if (evt.vkey == (VK_OEM_1)) { - // ; - virtual_key = 0x5800; // VK_PAD_A - } else if (evt.vkey == (0x50)) { - // P - virtual_key = 0x5803; // VK_PAD_Y - } - - if (evt.vkey == (0x58)) { - // X - virtual_key = 0x5814; // VK_PAD_START - } - if (evt.vkey == (0x5A)) { - // Z - virtual_key = 0x5815; // VK_PAD_BACK - } - if (evt.vkey == (0x51) || evt.vkey == (0x49)) { - // Q / I - virtual_key = 0x5806; // VK_PAD_LTRIGGER - } - if (evt.vkey == (0x45) || evt.vkey == (0x4F)) { - // E / O - virtual_key = 0x5807; // VK_PAD_RTRIGGER - } - if (evt.vkey == (0x31)) { - // 1 - virtual_key = 0x5805; // VK_PAD_LSHOULDER - } - if (evt.vkey == (0x33)) { - // 3 - virtual_key = 0x5804; // VK_PAD_RSHOULDER - } - - if (virtual_key != 0) { + if (xinput_virtual_key != ui::VirtualKey::kNone) { if (evt.transition == true) { keystroke_flags |= 0x0001; // XINPUT_KEYSTROKE_KEYDOWN } else if (evt.transition == false) { @@ -365,7 +359,7 @@ X_RESULT WinKeyInputDriver::GetKeystroke(uint32_t user_index, uint32_t flags, result = X_ERROR_SUCCESS; } - out_keystroke->virtual_key = virtual_key; + out_keystroke->virtual_key = uint16_t(xinput_virtual_key); out_keystroke->unicode = unicode; out_keystroke->flags = keystroke_flags; out_keystroke->user_index = 0; diff --git a/src/xenia/hid/winkey/winkey_input_driver.h b/src/xenia/hid/winkey/winkey_input_driver.h index 2bc923f39..f015b7416 100644 --- a/src/xenia/hid/winkey/winkey_input_driver.h +++ b/src/xenia/hid/winkey/winkey_input_driver.h @@ -14,6 +14,7 @@ #include "xenia/base/mutex.h" #include "xenia/hid/input_driver.h" +#include "xenia/ui/virtual_key.h" namespace xe { namespace hid { @@ -35,7 +36,7 @@ class WinKeyInputDriver : public InputDriver { protected: struct KeyEvent { - int vkey = 0; + ui::VirtualKey virtual_key = ui::VirtualKey::kNone; int repeat_count = 0; bool transition = false; // going up(false) or going down(true) bool prev_state = false; // down(true) or up(false) diff --git a/src/xenia/kernel/kernel_state.cc b/src/xenia/kernel/kernel_state.cc index a482b2ca4..9c5dcebc2 100644 --- a/src/xenia/kernel/kernel_state.cc +++ b/src/xenia/kernel/kernel_state.cc @@ -316,6 +316,17 @@ void KernelState::SetExecutableModule(object_ref module) { *variable_ptr = executable_module_->hmodule_ptr(); } + // Setup the kernel's ExLoadedImageName field + export_entry = processor()->export_resolver()->GetExportByOrdinal( + "xboxkrnl.exe", ordinals::ExLoadedImageName); + + if (export_entry) { + char* variable_ptr = + memory()->TranslateVirtual(export_entry->variable_ptr); + xe::string_util::copy_truncating( + variable_ptr, executable_module_->path(), + xboxkrnl::XboxkrnlModule::kExLoadedImageNameSize); + } // Spin up deferred dispatch worker. // TODO(benvanik): move someplace more appropriate (out of ctor, but around // here). @@ -758,7 +769,7 @@ void KernelState::CompleteOverlappedDeferredEx( bool KernelState::Save(ByteStream* stream) { XELOGD("Serializing the kernel..."); - stream->Write('KRNL'); + stream->Write(kKernelSaveSignature); // Save the object table object_table_.Save(stream); @@ -828,7 +839,7 @@ bool KernelState::Save(ByteStream* stream) { bool KernelState::Restore(ByteStream* stream) { // Check the magic value. - if (stream->Read() != 'KRNL') { + if (stream->Read() != kKernelSaveSignature) { return false; } diff --git a/src/xenia/kernel/kernel_state.h b/src/xenia/kernel/kernel_state.h index 2b4187a07..796d2dada 100644 --- a/src/xenia/kernel/kernel_state.h +++ b/src/xenia/kernel/kernel_state.h @@ -41,6 +41,8 @@ class Processor; namespace xe { namespace kernel { +constexpr fourcc_t kKernelSaveSignature = make_fourcc("KRNL"); + class Dispatcher; class XHostThread; class KernelModule; diff --git a/src/xenia/kernel/user_module.cc b/src/xenia/kernel/user_module.cc index dc007991b..a85a919c6 100644 --- a/src/xenia/kernel/user_module.cc +++ b/src/xenia/kernel/user_module.cc @@ -134,13 +134,15 @@ X_STATUS UserModule::LoadFromFile(const std::string_view path) { X_STATUS UserModule::LoadFromMemory(const void* addr, const size_t length) { auto processor = kernel_state()->processor(); - auto magic = xe::load_and_swap(addr); - if (magic == 'XEX2' || magic == 'XEX1') { + be magic; + magic.value = xe::load(addr); + if (magic == xe::cpu::kXEX2Signature || magic == xe::cpu::kXEX1Signature) { module_format_ = kModuleFormatXex; - } else if (magic == 0x7F454C46 /* 0x7F 'ELF' */) { + } else if (magic == xe::cpu::kElfSignature) { module_format_ = kModuleFormatElf; } else { - auto magic16 = xe::load_and_swap(addr); + be magic16; + magic16.value = xe::load(addr); if (magic16 == 0x4D5A) { XELOGE("XNA executables are not yet implemented"); return X_STATUS_NOT_IMPLEMENTED; diff --git a/src/xenia/kernel/util/export_table_post.inc b/src/xenia/kernel/util/export_table_post.inc index 7c3909fb9..8a69c1db3 100644 --- a/src/xenia/kernel/util/export_table_post.inc +++ b/src/xenia/kernel/util/export_table_post.inc @@ -2,13 +2,12 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ // Post-include file for an export table. - #undef FLAG #undef XE_EXPORT diff --git a/src/xenia/kernel/util/export_table_pre.inc b/src/xenia/kernel/util/export_table_pre.inc index e17068901..7647dcead 100644 --- a/src/xenia/kernel/util/export_table_pre.inc +++ b/src/xenia/kernel/util/export_table_pre.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -22,8 +22,7 @@ * my_module_export_table, xe::countof(my_module_export_table)); */ - #define XE_EXPORT(module, ordinal, name, type) \ xe::cpu::Export(ordinal, xe::cpu::Export::Type::type, #name) -#define FLAG(t) kXEKernelExportFlag##t +#define FLAG(t) kXEKernelExportFlag##t diff --git a/src/xenia/kernel/util/gameinfo_utils.cc b/src/xenia/kernel/util/gameinfo_utils.cc index aabd4f0d0..b69c2e63f 100644 --- a/src/xenia/kernel/util/gameinfo_utils.cc +++ b/src/xenia/kernel/util/gameinfo_utils.cc @@ -13,9 +13,9 @@ namespace xe { namespace kernel { namespace util { -constexpr uint32_t kGameInfoExecMagic = 'EXEC'; -constexpr uint32_t kGameInfoCommMagic = 'COMM'; -constexpr uint32_t kGameInfoTitlMagic = 'TITL'; +constexpr fourcc_t kGameInfoExecSignature = make_fourcc("EXEC"); +constexpr fourcc_t kGameInfoCommSignature = make_fourcc("COMM"); +constexpr fourcc_t kGameInfoTitlSignature = make_fourcc("TITL"); GameInfoWrapper::GameInfoWrapper(const uint8_t* data, size_t data_size) : data_(data), data_size_(data_size) { @@ -31,7 +31,7 @@ GameInfoWrapper::GameInfoWrapper(const uint8_t* data, size_t data_size) data_offset += sizeof(GameInfoBlockHeader); switch (block_header->magic) { - case kGameInfoExecMagic: + case kGameInfoExecSignature: exec_.virtual_titleid = reinterpret_cast(data_ + data_offset); data_offset += exec_.VirtualTitleIdLength + 1; @@ -41,12 +41,12 @@ GameInfoWrapper::GameInfoWrapper(const uint8_t* data, size_t data_size) reinterpret_cast(data_ + data_offset); data_offset += exec_.BuildDescriptionLength + 1; break; - case kGameInfoCommMagic: + case kGameInfoCommSignature: assert_true(block_header->block_size == sizeof(GameInfoBlockComm)); comm_ = reinterpret_cast(data_ + data_offset); data_offset += block_header->block_size; break; - case kGameInfoTitlMagic: + case kGameInfoTitlSignature: assert_true(block_header->block_size == sizeof(GameInfoBlockTitl)); titl_ = reinterpret_cast(data_ + data_offset); data_offset += block_header->block_size; diff --git a/src/xenia/kernel/util/object_table.cc b/src/xenia/kernel/util/object_table.cc index df881e3a1..d1250791c 100644 --- a/src/xenia/kernel/util/object_table.cc +++ b/src/xenia/kernel/util/object_table.cc @@ -205,6 +205,10 @@ X_STATUS ObjectTable::RemoveHandle(X_HANDLE handle) { XELOGI("Removed handle:{:08X} for {}", handle, typeid(*object).name()); + // Remove object name from mapping to prevent naming collision. + if (!object->name().empty()) { + RemoveNameMapping(object->name()); + } // Release now that the object has been removed from the table. object->Release(); } diff --git a/src/xenia/kernel/util/ordinal_table_post.inc b/src/xenia/kernel/util/ordinal_table_post.inc index 722b2da06..62c881976 100644 --- a/src/xenia/kernel/util/ordinal_table_post.inc +++ b/src/xenia/kernel/util/ordinal_table_post.inc @@ -2,12 +2,11 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ // Post-include file for an ordinal table. - #undef XE_EXPORT diff --git a/src/xenia/kernel/util/ordinal_table_pre.inc b/src/xenia/kernel/util/ordinal_table_pre.inc index 612156693..015b65f57 100644 --- a/src/xenia/kernel/util/ordinal_table_pre.inc +++ b/src/xenia/kernel/util/ordinal_table_pre.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -21,7 +21,4 @@ * #include "xenia/kernel/util/ordinal_table_post.inc" */ - -#define XE_EXPORT(module, ordinal, name, type) \ - name = ordinal - +#define XE_EXPORT(module, ordinal, name, type) name = ordinal diff --git a/src/xenia/kernel/util/shim_utils.h b/src/xenia/kernel/util/shim_utils.h index 2aa32064f..964845be9 100644 --- a/src/xenia/kernel/util/shim_utils.h +++ b/src/xenia/kernel/util/shim_utils.h @@ -12,6 +12,7 @@ #include #include +#include #include "third_party/fmt/include/fmt/format.h" #include "xenia/base/byte_order.h" @@ -28,7 +29,7 @@ namespace kernel { using PPCContext = xe::cpu::ppc::PPCContext; -#define SHIM_CALL void __cdecl +#define SHIM_CALL void #define SHIM_SET_MAPPING(library_name, export_name, shim_data) \ export_resolver->SetFunctionMapping( \ library_name, ordinals::export_name, \ @@ -531,13 +532,18 @@ xe::cpu::Export* RegisterExport(R (*fn)(Ps&...), const char* name, cvars::log_high_frequency_kernel_calls)) { PrintKernelCall(export_entry, params); } - auto result = - KernelTrampoline(FN, std::forward>(params), - std::make_index_sequence()); - result.Store(ppc_context); - if (export_entry->tags & - (xe::cpu::ExportTag::kLog | xe::cpu::ExportTag::kLogResult)) { - // TODO(benvanik): log result. + if constexpr (std::is_void::value) { + KernelTrampoline(FN, std::forward>(params), + std::make_index_sequence()); + } else { + auto result = + KernelTrampoline(FN, std::forward>(params), + std::make_index_sequence()); + result.Store(ppc_context); + if (export_entry->tags & + (xe::cpu::ExportTag::kLog | xe::cpu::ExportTag::kLogResult)) { + // TODO(benvanik): log result. + } } } }; @@ -545,38 +551,6 @@ xe::cpu::Export* RegisterExport(R (*fn)(Ps&...), const char* name, return export_entry; } -template -xe::cpu::Export* RegisterExport(void (*fn)(Ps&...), const char* name, - xe::cpu::ExportTag::type tags) { - static const auto export_entry = new cpu::Export( - ORDINAL, xe::cpu::Export::Type::kFunction, name, - tags | xe::cpu::ExportTag::kImplemented | xe::cpu::ExportTag::kLog); - static void (*FN)(Ps & ...) = fn; - struct X { - static void Trampoline(PPCContext* ppc_context) { - ++export_entry->function_data.call_count; - Param::Init init = { - ppc_context, - 0, - }; - // Using braces initializer instead of make_tuple because braces - // enforce execution order across compilers. - // The make_tuple order is undefined per the C++ standard and - // cause inconsitencies between msvc and clang. - std::tuple params = {Ps(init)...}; - if (export_entry->tags & xe::cpu::ExportTag::kLog && - (!(export_entry->tags & xe::cpu::ExportTag::kHighFrequency) || - cvars::log_high_frequency_kernel_calls)) { - PrintKernelCall(export_entry, params); - } - KernelTrampoline(FN, std::forward>(params), - std::make_index_sequence()); - } - }; - export_entry->function_data.trampoline = &X::Trampoline; - return export_entry; -} - } // namespace shim using xe::cpu::ExportTag; diff --git a/src/xenia/kernel/util/xdbf_utils.cc b/src/xenia/kernel/util/xdbf_utils.cc index 4e8c83ea3..c5e6fd217 100644 --- a/src/xenia/kernel/util/xdbf_utils.cc +++ b/src/xenia/kernel/util/xdbf_utils.cc @@ -13,9 +13,9 @@ namespace xe { namespace kernel { namespace util { -constexpr uint32_t kXdbfMagicXdbf = 'XDBF'; -constexpr uint32_t kXdbfMagicXstc = 'XSTC'; -constexpr uint32_t kXdbfMagicXstr = 'XSTR'; +constexpr fourcc_t kXdbfSignatureXdbf = make_fourcc("XDBF"); +constexpr fourcc_t kXdbfSignatureXstc = make_fourcc("XSTC"); +constexpr fourcc_t kXdbfSignatureXstr = make_fourcc("XSTR"); XdbfWrapper::XdbfWrapper(const uint8_t* data, size_t data_size) : data_(data), data_size_(data_size) { @@ -28,7 +28,7 @@ XdbfWrapper::XdbfWrapper(const uint8_t* data, size_t data_size) header_ = reinterpret_cast(ptr); ptr += sizeof(XbdfHeader); - if (header_->magic != kXdbfMagicXdbf) { + if (header_->magic != kXdbfSignatureXdbf) { data_ = nullptr; return; } @@ -65,7 +65,7 @@ std::string XdbfWrapper::GetStringTableEntry(XLanguage language, auto xstr_head = reinterpret_cast(language_block.buffer); - assert_true(xstr_head->magic == kXdbfMagicXstr); + assert_true(xstr_head->magic == kXdbfSignatureXstr); assert_true(xstr_head->version == 1); const uint8_t* ptr = language_block.buffer + sizeof(XdbfXstrHeader); @@ -94,7 +94,7 @@ XLanguage XdbfGameData::default_language() const { return XLanguage::kEnglish; } auto xstc = reinterpret_cast(block.buffer); - assert_true(xstc->magic == kXdbfMagicXstc); + assert_true(xstc->magic == kXdbfSignatureXstc); return static_cast(static_cast(xstc->default_language)); } diff --git a/src/xenia/kernel/util/xex2_info.h b/src/xenia/kernel/util/xex2_info.h index a5b5e5a33..6b77476d8 100644 --- a/src/xenia/kernel/util/xex2_info.h +++ b/src/xenia/kernel/util/xex2_info.h @@ -529,6 +529,13 @@ struct xex2_import_library { } }; +struct xex2_opt_generic_u32 { + xe::be size; + xe::be values[1]; + + uint32_t count() const { return (size - 4) / 4; } +}; + struct xex2_opt_header { xe::be key; // 0x0 diff --git a/src/xenia/kernel/xam/apps/xam_app.cc b/src/xenia/kernel/xam/apps/xam_app.cc index 29ec86717..ded317b41 100644 --- a/src/xenia/kernel/xam/apps/xam_app.cc +++ b/src/xenia/kernel/xam/apps/xam_app.cc @@ -52,20 +52,14 @@ X_HRESULT XamApp::DispatchMessageSync(uint32_t message, uint32_t buffer_ptr, if (!e || !buffer || !extra) { return X_E_INVALIDARG; } - assert_true(extra->magic == 'XEN\0'); + assert_true(extra->magic == kXObjSignature); if (data->buffer_size) { std::memset(buffer, 0, data->buffer_size); } uint32_t item_count = 0; - auto result = e->WriteItems(data->buffer_ptr, buffer, data->buffer_size, - &item_count); - assert_true(XSUCCEEDED(result)); - assert_true(item_count <= 1); - if (XSUCCEEDED(result) && item_count == 1) { - auto content_data = reinterpret_cast(buffer); - // TODO(gibbed): WTF? - *reinterpret_cast*>(&buffer[0x140]) = - content_data->title_id; + auto result = e->WriteItems(data->buffer_ptr, buffer, &item_count); + + if (result == X_ERROR_SUCCESS && item_count >= 1) { if (data->length_ptr) { auto length_ptr = memory_->TranslateVirtual*>(data->length_ptr); diff --git a/src/xenia/kernel/xam/apps/xgi_app.cc b/src/xenia/kernel/xam/apps/xgi_app.cc index c77665209..771341cdb 100644 --- a/src/xenia/kernel/xam/apps/xgi_app.cc +++ b/src/xenia/kernel/xam/apps/xgi_app.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2015 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -80,8 +80,10 @@ X_HRESULT XgiApp::DispatchMessageSync(uint32_t message, uint32_t buffer_ptr, return X_E_SUCCESS; } case 0x000B0011: { - // TODO(DrChat): Figure out what this is again - } break; + // TODO(PermaNull): reverse buffer contents. + XELOGD("XGISessionDelete"); + return X_STATUS_SUCCESS; + } case 0x000B0012: { assert_true(buffer_length == 0x14); uint32_t session_ptr = xe::load_and_swap(buffer + 0x0); @@ -95,6 +97,17 @@ X_HRESULT XgiApp::DispatchMessageSync(uint32_t message, uint32_t buffer_ptr, user_count, unk_0, user_index_array, private_slots_array); return X_E_SUCCESS; } + case 0x000B0014: { + // Gets Jetpac XBLA in game + // get high score table? + XELOGD("XGI_unknown"); + return X_STATUS_SUCCESS; + } + case 0x000B0015: { + // send high scores? + XELOGD("XGI_unknown"); + return X_STATUS_SUCCESS; + } case 0x000B0041: { assert_true(!buffer_length || buffer_length == 32); // 00000000 2789fecc 00000000 00000000 200491e0 00000000 200491f0 20049340 diff --git a/src/xenia/kernel/xam/apps/xlivebase_app.cc b/src/xenia/kernel/xam/apps/xlivebase_app.cc index d35692ca8..45440fa55 100644 --- a/src/xenia/kernel/xam/apps/xlivebase_app.cc +++ b/src/xenia/kernel/xam/apps/xlivebase_app.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2015 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -41,18 +41,28 @@ X_HRESULT XLiveBaseApp::DispatchMessageSync(uint32_t message, xe::store_and_swap(buffer + 0, 1); // XONLINE_NAT_OPEN return X_E_SUCCESS; } + case 0x00058007: { + // Occurs if title calls XOnlineGetServiceInfo, expects dwServiceId + // and pServiceInfo. pServiceInfo should contain pointer to + // XONLINE_SERVICE_INFO structure. + XELOGD("CXLiveLogon::GetServiceInfo({:08X}, {:08X})", buffer_ptr, + buffer_length); + return 0x80151802; // ERROR_CONNECTION_INVALID + } case 0x00058020: { // 0x00058004 is called right before this. // We should create a XamEnumerate-able empty list here, but I'm not // sure of the format. // buffer_length seems to be the same ptr sent to 0x00058004. - XELOGD("XLiveBaseFriendsCreateEnumerator({:08X}, {:08X}) unimplemented", + XELOGD("CXLiveFriends::Enumerate({:08X}, {:08X}) unimplemented", buffer_ptr, buffer_length); return X_E_FAIL; } case 0x00058023: { - XELOGD("XliveBaseUnk58023({:08X}, {:08X}) unimplemented", buffer_ptr, - buffer_length); + XELOGD( + "CXLiveMessaging::XMessageGameInviteGetAcceptedInfo({:08X}, {:08X}) " + "unimplemented", + buffer_ptr, buffer_length); return X_E_FAIL; } case 0x00058046: { diff --git a/src/xenia/kernel/xam/content_manager.cc b/src/xenia/kernel/xam/content_manager.cc index 9c08ac737..a4367a48b 100644 --- a/src/xenia/kernel/xam/content_manager.cc +++ b/src/xenia/kernel/xam/content_manager.cc @@ -15,6 +15,7 @@ #include "xenia/base/filesystem.h" #include "xenia/base/string.h" #include "xenia/kernel/kernel_state.h" +#include "xenia/kernel/xfile.h" #include "xenia/kernel/xobject.h" #include "xenia/vfs/devices/host_path_device.h" @@ -30,7 +31,7 @@ static int content_device_id_ = 0; ContentPackage::ContentPackage(KernelState* kernel_state, const std::string_view root_name, - const ContentData& data, + const XCONTENT_AGGREGATE_DATA& data, const std::filesystem::path& package_path) : kernel_state_(kernel_state), root_name_(root_name) { device_path_ = fmt::format("\\Device\\Content\\{0}\\", ++content_device_id_); @@ -57,63 +58,49 @@ ContentManager::ContentManager(KernelState* kernel_state, ContentManager::~ContentManager() = default; std::filesystem::path ContentManager::ResolvePackageRoot( - uint32_t content_type) { - auto title_id = fmt::format("{:8X}", kernel_state_->title_id()); - - std::string type_name; - switch (content_type) { - case 1: - // Save games. - type_name = "00000001"; - break; - case 2: - // DLC from the marketplace. - type_name = "00000002"; - break; - case 3: - // Publisher content? - type_name = "00000003"; - break; - case 0x000D0000: - // ??? - type_name = "000D0000"; - break; - default: - assert_unhandled_case(data.content_type); - return std::filesystem::path(); + XContentType content_type, uint32_t title_id) { + if (title_id == kCurrentlyRunningTitleId) { + title_id = kernel_state_->title_id(); } + auto title_id_str = fmt::format("{:08X}", title_id); + auto content_type_str = fmt::format("{:08X}", uint32_t(content_type)); // Package root path: - // content_root/title_id/type_name/ - return root_path_ / title_id / type_name; + // content_root/title_id/content_type/ + return root_path_ / title_id_str / content_type_str; } std::filesystem::path ContentManager::ResolvePackagePath( - const ContentData& data) { + const XCONTENT_AGGREGATE_DATA& data) { // Content path: - // content_root/title_id/type_name/data_file_name/ - auto package_root = ResolvePackageRoot(data.content_type); - return package_root / xe::to_path(data.file_name); + // content_root/title_id/content_type/data_file_name/ + auto package_root = ResolvePackageRoot(data.content_type, data.title_id); + return package_root / xe::to_path(data.file_name()); } -std::vector ContentManager::ListContent(uint32_t device_id, - uint32_t content_type) { - std::vector result; +std::vector ContentManager::ListContent( + uint32_t device_id, XContentType content_type, uint32_t title_id) { + std::vector result; + + if (title_id == kCurrentlyRunningTitleId) { + title_id = kernel_state_->title_id(); + } // Search path: // content_root/title_id/type_name/* - auto package_root = ResolvePackageRoot(content_type); + auto package_root = ResolvePackageRoot(content_type, title_id); auto file_infos = xe::filesystem::ListFiles(package_root); for (const auto& file_info : file_infos) { if (file_info.type != xe::filesystem::FileInfo::Type::kDirectory) { // Directories only. continue; } - ContentData content_data; + XCONTENT_AGGREGATE_DATA content_data; content_data.device_id = device_id; content_data.content_type = content_type; - content_data.display_name = xe::path_to_utf16(file_info.name); - content_data.file_name = xe::path_to_utf8(file_info.name); + content_data.set_display_name(xe::path_to_utf16(file_info.name)); + content_data.set_file_name(xe::path_to_utf8(file_info.name)); + content_data.title_id = title_id; result.emplace_back(std::move(content_data)); } @@ -121,7 +108,7 @@ std::vector ContentManager::ListContent(uint32_t device_id, } std::unique_ptr ContentManager::ResolvePackage( - const std::string_view root_name, const ContentData& data) { + const std::string_view root_name, const XCONTENT_AGGREGATE_DATA& data) { auto package_path = ResolvePackagePath(data); if (!std::filesystem::exists(package_path)) { return nullptr; @@ -134,13 +121,13 @@ std::unique_ptr ContentManager::ResolvePackage( return package; } -bool ContentManager::ContentExists(const ContentData& data) { +bool ContentManager::ContentExists(const XCONTENT_AGGREGATE_DATA& data) { auto path = ResolvePackagePath(data); return std::filesystem::exists(path); } X_RESULT ContentManager::CreateContent(const std::string_view root_name, - const ContentData& data) { + const XCONTENT_AGGREGATE_DATA& data) { auto global_lock = global_critical_region_.Acquire(); if (open_packages_.count(string_key(root_name))) { @@ -167,7 +154,7 @@ X_RESULT ContentManager::CreateContent(const std::string_view root_name, } X_RESULT ContentManager::OpenContent(const std::string_view root_name, - const ContentData& data) { + const XCONTENT_AGGREGATE_DATA& data) { auto global_lock = global_critical_region_.Acquire(); if (open_packages_.count(string_key(root_name))) { @@ -197,6 +184,7 @@ X_RESULT ContentManager::CloseContent(const std::string_view root_name) { if (it == open_packages_.end()) { return X_ERROR_FILE_NOT_FOUND; } + CloseOpenedFilesFromContent(root_name); auto package = it->second; open_packages_.erase(it); @@ -205,8 +193,8 @@ X_RESULT ContentManager::CloseContent(const std::string_view root_name) { return X_ERROR_SUCCESS; } -X_RESULT ContentManager::GetContentThumbnail(const ContentData& data, - std::vector* buffer) { +X_RESULT ContentManager::GetContentThumbnail( + const XCONTENT_AGGREGATE_DATA& data, std::vector* buffer) { auto global_lock = global_critical_region_.Acquire(); auto package_path = ResolvePackagePath(data); auto thumb_path = package_path / kThumbnailFileName; @@ -224,8 +212,8 @@ X_RESULT ContentManager::GetContentThumbnail(const ContentData& data, } } -X_RESULT ContentManager::SetContentThumbnail(const ContentData& data, - std::vector buffer) { +X_RESULT ContentManager::SetContentThumbnail( + const XCONTENT_AGGREGATE_DATA& data, std::vector buffer) { auto global_lock = global_critical_region_.Acquire(); auto package_path = ResolvePackagePath(data); std::filesystem::create_directories(package_path); @@ -240,7 +228,7 @@ X_RESULT ContentManager::SetContentThumbnail(const ContentData& data, } } -X_RESULT ContentManager::DeleteContent(const ContentData& data) { +X_RESULT ContentManager::DeleteContent(const XCONTENT_AGGREGATE_DATA& data) { auto global_lock = global_critical_region_.Acquire(); if (IsContentOpen(data)) { @@ -265,13 +253,35 @@ std::filesystem::path ContentManager::ResolveGameUserContentPath() { return root_path_ / title_id / kGameUserContentDirName / user_name; } -bool ContentManager::IsContentOpen(const ContentData& data) const { +bool ContentManager::IsContentOpen(const XCONTENT_AGGREGATE_DATA& data) const { return std::any_of(open_packages_.cbegin(), open_packages_.cend(), [data](std::pair content) { return data == content.second->GetPackageContentData(); }); } +void ContentManager::CloseOpenedFilesFromContent( + const std::string_view root_name) { + // TODO(Gliniak): Cleanup this code to care only about handles + // related to provided content + const std::vector> all_files_handles = + kernel_state_->object_table()->GetObjectsByType( + XObject::Type::File); + + std::string resolved_path = ""; + kernel_state_->file_system()->FindSymbolicLink(std::string(root_name) + ':', + resolved_path); + + for (const object_ref& file : all_files_handles) { + std::string file_path = file->entry()->absolute_path(); + bool is_file_inside_content = utf8::starts_with(file_path, resolved_path); + + if (is_file_inside_content) { + file->ReleaseHandle(); + } + } +} + } // namespace xam } // namespace kernel } // namespace xe diff --git a/src/xenia/kernel/xam/content_manager.h b/src/xenia/kernel/xam/content_manager.h index e6f6f7e12..4876bfd1c 100644 --- a/src/xenia/kernel/xam/content_manager.h +++ b/src/xenia/kernel/xam/content_manager.h @@ -31,107 +31,108 @@ namespace xe { namespace kernel { namespace xam { +// If set in XCONTENT_AGGREGATE_DATA, will be substituted with the running +// titles ID +// TODO: check if actual x360 kernel/xam has a value similar to this +constexpr uint32_t kCurrentlyRunningTitleId = 0xFFFFFFFF; + struct XCONTENT_DATA { be device_id; - be content_type; + be content_type; union { - be display_name[128]; - char16_t display_name_chars[128]; - }; - char file_name[42]; - uint8_t padding[2]; -}; -static_assert_size(XCONTENT_DATA, 308); + // this should be be, but that stops copy constructor being + // generated... + uint16_t uint[128]; + char16_t chars[128]; + } display_name_raw; -struct XCONTENT_AGGREGATE_DATA { - be device_id; - be content_type; - union { - be display_name[128]; - char16_t display_name_chars[128]; - }; - char file_name[42]; + char file_name_raw[42]; + + // Some games use this padding field as a null-terminator, as eg. + // DLC packages usually fill the entire file_name_raw array + // Not every game sets it to 0 though, so make sure any file_name_raw reads + // only go up to 42 chars! uint8_t padding[2]; + + bool operator==(const XCONTENT_DATA& other) const { + // Package is located via device_id/content_type/file_name, so only need to + // compare those + return device_id == other.device_id && content_type == other.content_type && + file_name() == other.file_name(); + } + + std::u16string display_name() const { + return load_and_swap(display_name_raw.uint); + } + + std::string file_name() const { + std::string value; + value.assign(file_name_raw, + std::min(strlen(file_name_raw), countof(file_name_raw))); + return value; + } + + void set_display_name(const std::u16string_view value) { + // Some games (eg Goldeneye XBLA) require multiple null-terminators for it + // to read the string properly, blanking the array should take care of that + + std::fill_n(display_name_raw.chars, countof(display_name_raw.chars), 0); + string_util::copy_and_swap_truncating(display_name_raw.chars, value, + countof(display_name_raw.chars)); + } + + void set_file_name(const std::string_view value) { + std::fill_n(file_name_raw, countof(file_name_raw), 0); + string_util::copy_maybe_truncating( + file_name_raw, value, xe::countof(file_name_raw)); + + // Some games rely on padding field acting as a null-terminator... + padding[0] = padding[1] = 0; + } +}; +static_assert_size(XCONTENT_DATA, 0x134); + +struct XCONTENT_AGGREGATE_DATA : XCONTENT_DATA { + be unk134; // some titles store XUID here? be title_id; -}; -static_assert_size(XCONTENT_AGGREGATE_DATA, 312); -struct ContentData { - uint32_t device_id; - uint32_t content_type; - std::u16string display_name; - std::string file_name; - - ContentData() = default; - - bool operator==(const ContentData& rhs) const { - return device_id == rhs.device_id && content_type == rhs.content_type && - file_name == rhs.file_name; + XCONTENT_AGGREGATE_DATA() = default; + XCONTENT_AGGREGATE_DATA(const XCONTENT_DATA& other) { + device_id = other.device_id; + content_type = other.content_type; + set_display_name(other.display_name()); + set_file_name(other.file_name()); + padding[0] = padding[1] = 0; + unk134 = 0; + title_id = kCurrentlyRunningTitleId; } - explicit ContentData(const XCONTENT_DATA& data) { - device_id = data.device_id; - content_type = data.content_type; - display_name = xe::load_and_swap(data.display_name); - file_name = xe::load_and_swap(data.file_name); - } - - void Write(XCONTENT_DATA* data) const { - data->device_id = device_id; - data->content_type = content_type; - xe::string_util::copy_and_swap_truncating( - data->display_name_chars, display_name, - xe::countof(data->display_name_chars)); - xe::string_util::copy_maybe_truncating< - string_util::Safety::IKnowWhatIAmDoing>(data->file_name, file_name, - xe::countof(data->file_name)); - } -}; - -struct ContentAggregateData { - uint32_t device_id; - uint32_t content_type; - std::u16string display_name; - std::string file_name; - uint32_t title_id; - - ContentAggregateData() = default; - - explicit ContentAggregateData(const XCONTENT_AGGREGATE_DATA& data) { - device_id = data.device_id; - content_type = data.content_type; - display_name = xe::load_and_swap(data.display_name); - file_name = xe::load_and_swap(data.file_name); - title_id = data.title_id; - } - - void Write(XCONTENT_AGGREGATE_DATA* data) const { - data->device_id = device_id; - data->content_type = content_type; - xe::string_util::copy_and_swap_truncating( - data->display_name_chars, display_name, - xe::countof(data->display_name_chars)); - xe::string_util::copy_maybe_truncating< - string_util::Safety::IKnowWhatIAmDoing>(data->file_name, file_name, - xe::countof(data->file_name)); - data->title_id = title_id; + bool operator==(const XCONTENT_AGGREGATE_DATA& other) const { + // Package is located via device_id/title_id/content_type/file_name, so only + // need to compare those + return device_id == other.device_id && title_id == other.title_id && + content_type == other.content_type && + file_name() == other.file_name(); } }; +static_assert_size(XCONTENT_AGGREGATE_DATA, 0x148); class ContentPackage { public: ContentPackage(KernelState* kernel_state, const std::string_view root_name, - const ContentData& data, + const XCONTENT_AGGREGATE_DATA& data, const std::filesystem::path& package_path); ~ContentPackage(); - const ContentData& GetPackageContentData() const { return content_data_; } + const XCONTENT_AGGREGATE_DATA& GetPackageContentData() const { + return content_data_; + } private: KernelState* kernel_state_; std::string root_name_; std::string device_path_; - ContentData content_data_; + XCONTENT_AGGREGATE_DATA content_data_; }; class ContentManager { @@ -140,29 +141,32 @@ class ContentManager { const std::filesystem::path& root_path); ~ContentManager(); - std::vector ListContent(uint32_t device_id, - uint32_t content_type); + std::vector ListContent(uint32_t device_id, + XContentType content_type, + uint32_t title_id = -1); std::unique_ptr ResolvePackage( - const std::string_view root_name, const ContentData& data); + const std::string_view root_name, const XCONTENT_AGGREGATE_DATA& data); - bool ContentExists(const ContentData& data); + bool ContentExists(const XCONTENT_AGGREGATE_DATA& data); X_RESULT CreateContent(const std::string_view root_name, - const ContentData& data); + const XCONTENT_AGGREGATE_DATA& data); X_RESULT OpenContent(const std::string_view root_name, - const ContentData& data); + const XCONTENT_AGGREGATE_DATA& data); X_RESULT CloseContent(const std::string_view root_name); - X_RESULT GetContentThumbnail(const ContentData& data, + X_RESULT GetContentThumbnail(const XCONTENT_AGGREGATE_DATA& data, std::vector* buffer); - X_RESULT SetContentThumbnail(const ContentData& data, + X_RESULT SetContentThumbnail(const XCONTENT_AGGREGATE_DATA& data, std::vector buffer); - X_RESULT DeleteContent(const ContentData& data); + X_RESULT DeleteContent(const XCONTENT_AGGREGATE_DATA& data); std::filesystem::path ResolveGameUserContentPath(); - bool IsContentOpen(const ContentData& data) const; + bool IsContentOpen(const XCONTENT_AGGREGATE_DATA& data) const; + void CloseOpenedFilesFromContent(const std::string_view root_name); private: - std::filesystem::path ResolvePackageRoot(uint32_t content_type); - std::filesystem::path ResolvePackagePath(const ContentData& data); + std::filesystem::path ResolvePackageRoot(XContentType content_type, + uint32_t title_id = -1); + std::filesystem::path ResolvePackagePath(const XCONTENT_AGGREGATE_DATA& data); KernelState* kernel_state_; std::filesystem::path root_path_; diff --git a/src/xenia/kernel/xam/xam_content.cc b/src/xenia/kernel/xam/xam_content.cc index 0cde00a84..dea81d46b 100644 --- a/src/xenia/kernel/xam/xam_content.cc +++ b/src/xenia/kernel/xam/xam_content.cc @@ -86,8 +86,8 @@ dword_result_t XamContentCreateEnumerator(dword_t user_index, dword_t device_id, *buffer_size_ptr = sizeof(XCONTENT_DATA) * items_per_enumerate; } - auto e = object_ref(new XStaticEnumerator( - kernel_state(), items_per_enumerate, sizeof(XCONTENT_DATA))); + auto e = make_object>(kernel_state(), + items_per_enumerate); auto result = e->Initialize(0xFF, 0xFE, 0x20005, 0x20007, 0); if (XFAILED(result)) { return result; @@ -96,11 +96,11 @@ dword_result_t XamContentCreateEnumerator(dword_t user_index, dword_t device_id, if (!device_info || device_info->device_id == DummyDeviceId::HDD) { // Get all content data. auto content_datas = kernel_state()->content_manager()->ListContent( - static_cast(DummyDeviceId::HDD), content_type); + static_cast(DummyDeviceId::HDD), + XContentType(uint32_t(content_type))); for (const auto& content_data : content_datas) { - auto item = reinterpret_cast(e->AppendItem()); - assert_not_null(item); - content_data.Write(item); + auto item = e->AppendItem(); + *item = content_data; } } @@ -116,99 +116,126 @@ dword_result_t XamContentCreateEnumerator(dword_t user_index, dword_t device_id, } DECLARE_XAM_EXPORT1(XamContentCreateEnumerator, kContent, kImplemented); +dword_result_t xeXamContentCreate(dword_t user_index, lpstring_t root_name, + lpvoid_t content_data_ptr, + dword_t content_data_size, dword_t flags, + lpdword_t disposition_ptr, + lpdword_t license_mask_ptr, + dword_t cache_size, qword_t content_size, + lpvoid_t overlapped_ptr) { + XCONTENT_AGGREGATE_DATA content_data; + if (content_data_size == sizeof(XCONTENT_DATA)) { + content_data = *content_data_ptr.as(); + } else if (content_data_size == sizeof(XCONTENT_AGGREGATE_DATA)) { + content_data = *content_data_ptr.as(); + } else { + assert_always(); + return X_ERROR_INVALID_PARAMETER; + } + + auto content_manager = kernel_state()->content_manager(); + + if (overlapped_ptr && disposition_ptr) { + *disposition_ptr = 0; + } + + auto run = [content_manager, root_name = root_name.value(), flags, + content_data, disposition_ptr, license_mask_ptr]( + uint32_t& extended_error, uint32_t& length) -> X_RESULT { + X_RESULT result = X_ERROR_INVALID_PARAMETER; + bool create = false; + bool open = false; + switch (flags & 0xF) { + case 1: // CREATE_NEW + // Fail if exists. + if (content_manager->ContentExists(content_data)) { + result = X_ERROR_ALREADY_EXISTS; + } else { + create = true; + } + break; + case 2: // CREATE_ALWAYS + // Overwrite existing, if any. + if (content_manager->ContentExists(content_data)) { + content_manager->DeleteContent(content_data); + create = true; + } else { + create = true; + } + break; + case 3: // OPEN_EXISTING + // Open only if exists. + if (!content_manager->ContentExists(content_data)) { + result = X_ERROR_PATH_NOT_FOUND; + } else { + open = true; + } + break; + case 4: // OPEN_ALWAYS + // Create if needed. + if (!content_manager->ContentExists(content_data)) { + create = true; + } else { + open = true; + } + break; + case 5: // TRUNCATE_EXISTING + // Fail if doesn't exist, if does exist delete and recreate. + if (!content_manager->ContentExists(content_data)) { + result = X_ERROR_PATH_NOT_FOUND; + } else { + content_manager->DeleteContent(content_data); + create = true; + } + break; + default: + assert_unhandled_case(flags & 0xF); + break; + } + + // creation result + // 0 = ? + // 1 = created + // 2 = opened + uint32_t disposition = create ? 1 : 2; + if (disposition_ptr) { + *disposition_ptr = disposition; + } + + if (create) { + result = content_manager->CreateContent(root_name, content_data); + } else if (open) { + result = content_manager->OpenContent(root_name, content_data); + } + + if (license_mask_ptr && XSUCCEEDED(result)) { + *license_mask_ptr = 0; // Stub! + } + + extended_error = X_HRESULT_FROM_WIN32(result); + length = disposition; + return result; + }; + + if (!overlapped_ptr) { + uint32_t extended_error, length; + return run(extended_error, length); + } else { + kernel_state()->CompleteOverlappedDeferredEx(run, overlapped_ptr); + return X_ERROR_IO_PENDING; + } +} + dword_result_t XamContentCreateEx(dword_t user_index, lpstring_t root_name, lpvoid_t content_data_ptr, dword_t flags, lpdword_t disposition_ptr, lpdword_t license_mask_ptr, dword_t cache_size, qword_t content_size, lpvoid_t overlapped_ptr) { - X_RESULT result = X_ERROR_INVALID_PARAMETER; - auto content_data = - static_cast(*content_data_ptr.as()); - - auto content_manager = kernel_state()->content_manager(); - bool create = false; - bool open = false; - switch (flags & 0xF) { - case 1: // CREATE_NEW - // Fail if exists. - if (content_manager->ContentExists(content_data)) { - result = X_ERROR_ALREADY_EXISTS; - } else { - create = true; - } - break; - case 2: // CREATE_ALWAYS - // Overwrite existing, if any. - if (content_manager->ContentExists(content_data)) { - content_manager->DeleteContent(content_data); - create = true; - } else { - create = true; - } - break; - case 3: // OPEN_EXISTING - // Open only if exists. - if (!content_manager->ContentExists(content_data)) { - result = X_ERROR_PATH_NOT_FOUND; - } else { - open = true; - } - break; - case 4: // OPEN_ALWAYS - // Create if needed. - if (!content_manager->ContentExists(content_data)) { - create = true; - } else { - open = true; - } - break; - case 5: // TRUNCATE_EXISTING - // Fail if doesn't exist, if does exist delete and recreate. - if (!content_manager->ContentExists(content_data)) { - result = X_ERROR_PATH_NOT_FOUND; - } else { - content_manager->DeleteContent(content_data); - create = true; - } - break; - default: - assert_unhandled_case(flags & 0xF); - break; - } - - // creation result - // 0 = ? - // 1 = created - // 2 = opened - uint32_t disposition = create ? 1 : 2; - if (disposition_ptr) { - // In case when overlapped_ptr exist we should clear disposition_ptr first - // however we're executing it immediately, so it's not required - *disposition_ptr = disposition; - } - - if (create) { - result = content_manager->CreateContent(root_name.value(), content_data); - } else if (open) { - result = content_manager->OpenContent(root_name.value(), content_data); - } - - if (license_mask_ptr && XSUCCEEDED(result)) { - *license_mask_ptr = 0; // Stub! - } - - if (overlapped_ptr) { - X_RESULT extended_error = X_HRESULT_FROM_WIN32(result); - if (int32_t(extended_error) < 0) { - result = X_ERROR_FUNCTION_FAILED; - } - kernel_state()->CompleteOverlappedImmediateEx(overlapped_ptr, result, - extended_error, disposition); - return X_ERROR_IO_PENDING; - } else { - return result; - } + return xeXamContentCreate(user_index, root_name, content_data_ptr, + sizeof(XCONTENT_DATA), flags, disposition_ptr, + license_mask_ptr, cache_size, content_size, + overlapped_ptr); } DECLARE_XAM_EXPORT1(XamContentCreateEx, kContent, kImplemented); @@ -217,9 +244,9 @@ dword_result_t XamContentCreate(dword_t user_index, lpstring_t root_name, lpdword_t disposition_ptr, lpdword_t license_mask_ptr, lpvoid_t overlapped_ptr) { - return XamContentCreateEx(user_index, root_name, content_data_ptr, flags, - disposition_ptr, license_mask_ptr, 0, 0, - overlapped_ptr); + return xeXamContentCreate(user_index, root_name, content_data_ptr, + sizeof(XCONTENT_DATA), flags, disposition_ptr, + license_mask_ptr, 0, 0, overlapped_ptr); } DECLARE_XAM_EXPORT1(XamContentCreate, kContent, kImplemented); @@ -227,7 +254,8 @@ dword_result_t XamContentCreateInternal( lpstring_t root_name, lpvoid_t content_data_ptr, dword_t flags, lpdword_t disposition_ptr, lpdword_t license_mask_ptr, dword_t cache_size, qword_t content_size, lpvoid_t overlapped_ptr) { - return XamContentCreateEx(0xFE, root_name, content_data_ptr, flags, + return xeXamContentCreate(0xFE, root_name, content_data_ptr, + sizeof(XCONTENT_AGGREGATE_DATA), flags, disposition_ptr, license_mask_ptr, cache_size, content_size, overlapped_ptr); } @@ -277,20 +305,26 @@ dword_result_t XamContentGetCreator(dword_t user_index, lpunknown_t overlapped_ptr) { auto result = X_ERROR_SUCCESS; - auto content_data = - static_cast(*content_data_ptr.as()); + XCONTENT_AGGREGATE_DATA content_data = *content_data_ptr.as(); - if (content_data.content_type == 1) { - // User always creates saves. - *is_creator_ptr = 1; - if (creator_xuid_ptr) { - *creator_xuid_ptr = kernel_state()->user_profile()->xuid(); + bool content_exists = + kernel_state()->content_manager()->ContentExists(content_data); + + if (content_exists) { + if (content_data.content_type == XContentType::kSavedGame) { + // User always creates saves. + *is_creator_ptr = 1; + if (creator_xuid_ptr) { + *creator_xuid_ptr = kernel_state()->user_profile()->xuid(); + } + } else { + *is_creator_ptr = 0; + if (creator_xuid_ptr) { + *creator_xuid_ptr = 0; + } } } else { - *is_creator_ptr = 0; - if (creator_xuid_ptr) { - *creator_xuid_ptr = 0; - } + result = X_ERROR_PATH_NOT_FOUND; } if (overlapped_ptr) { @@ -309,8 +343,7 @@ dword_result_t XamContentGetThumbnail(dword_t user_index, lpunknown_t overlapped_ptr) { assert_not_null(buffer_size_ptr); uint32_t buffer_size = *buffer_size_ptr; - auto content_data = - static_cast(*content_data_ptr.as()); + XCONTENT_AGGREGATE_DATA content_data = *content_data_ptr.as(); // Get thumbnail (if it exists). std::vector buffer; @@ -346,8 +379,7 @@ dword_result_t XamContentSetThumbnail(dword_t user_index, lpvoid_t content_data_ptr, lpvoid_t buffer_ptr, dword_t buffer_size, lpunknown_t overlapped_ptr) { - auto content_data = - static_cast(*content_data_ptr.as()); + XCONTENT_AGGREGATE_DATA content_data = *content_data_ptr.as(); // Buffer is PNG data. auto buffer = std::vector((uint8_t*)buffer_ptr, @@ -366,8 +398,7 @@ DECLARE_XAM_EXPORT1(XamContentSetThumbnail, kContent, kImplemented); dword_result_t XamContentDelete(dword_t user_index, lpvoid_t content_data_ptr, lpunknown_t overlapped_ptr) { - auto content_data = - static_cast(*content_data_ptr.as()); + XCONTENT_AGGREGATE_DATA content_data = *content_data_ptr.as(); auto result = kernel_state()->content_manager()->DeleteContent(content_data); diff --git a/src/xenia/kernel/xam/xam_content_aggregate.cc b/src/xenia/kernel/xam/xam_content_aggregate.cc index 79a025c28..765619002 100644 --- a/src/xenia/kernel/xam/xam_content_aggregate.cc +++ b/src/xenia/kernel/xam/xam_content_aggregate.cc @@ -11,6 +11,7 @@ #include "xenia/base/math.h" #include "xenia/base/string_util.h" #include "xenia/kernel/kernel_state.h" +#include "xenia/kernel/user_module.h" #include "xenia/kernel/util/shim_utils.h" #include "xenia/kernel/xam/xam_content_device.h" #include "xenia/kernel/xam/xam_private.h" @@ -22,14 +23,15 @@ namespace xe { namespace kernel { namespace xam { -void AddODDContentTest(object_ref e, uint32_t content_type) { +void AddODDContentTest(object_ref> e, + XContentType content_type) { auto root_entry = kernel_state()->file_system()->ResolvePath( "game:\\Content\\0000000000000000"); if (!root_entry) { return; } - auto content_type_path = fmt::format("{:08X}", content_type); + auto content_type_path = fmt::format("{:08X}", uint32_t(content_type)); xe::filesystem::WildcardEngine title_find_engine; title_find_engine.SetRule("????????"); @@ -60,16 +62,15 @@ void AddODDContentTest(object_ref e, uint32_t content_type) { break; } - auto item = reinterpret_cast(e->AppendItem()); + auto item = e->AppendItem(); assert_not_null(item); - ContentAggregateData content_aggregate_data = {}; - content_aggregate_data.device_id = - static_cast(DummyDeviceId::ODD); - content_aggregate_data.content_type = content_type; - content_aggregate_data.display_name = to_utf16(content_entry->name()); - content_aggregate_data.file_name = content_entry->name(); - content_aggregate_data.title_id = title_id; - content_aggregate_data.Write(item); + if (item) { + item->device_id = static_cast(DummyDeviceId::ODD); + item->content_type = content_type; + item->set_display_name(to_utf16(content_entry->name())); + item->set_file_name(content_entry->name()); + item->title_id = title_id; + } } } } @@ -87,36 +88,47 @@ dword_result_t XamContentAggregateCreateEnumerator(qword_t xuid, return X_E_INVALIDARG; } - auto e = object_ref(new XStaticEnumerator( - kernel_state(), 1, sizeof(XCONTENT_AGGREGATE_DATA))); + auto e = make_object>( + kernel_state(), 1); X_KENUMERATOR_CONTENT_AGGREGATE* extra; auto result = e->Initialize(0xFF, 0xFE, 0x2000E, 0x20010, 0, &extra); if (XFAILED(result)) { return result; } - extra->magic = 'XEN\0'; + extra->magic = kXObjSignature; extra->handle = e->handle(); + auto content_type_enum = XContentType(uint32_t(content_type)); + if (!device_info || device_info->device_type == DeviceType::HDD) { - // Get all content data. - auto content_datas = kernel_state()->content_manager()->ListContent( - static_cast(DummyDeviceId::HDD), content_type); - for (const auto& content_data : content_datas) { - auto item = reinterpret_cast(e->AppendItem()); - assert_not_null(item); - ContentAggregateData content_aggregate_data = {}; - content_aggregate_data.device_id = content_data.device_id; - content_aggregate_data.content_type = content_data.content_type; - content_aggregate_data.display_name = content_data.display_name; - content_aggregate_data.file_name = content_data.file_name; - content_aggregate_data.title_id = kernel_state()->title_id(); - content_aggregate_data.Write(item); + // Fetch any alternate title IDs defined in the XEX header + // (used by games to load saves from other titles, etc) + std::vector title_ids{kCurrentlyRunningTitleId}; + auto exe_module = kernel_state()->GetExecutableModule(); + if (exe_module && exe_module->xex_module()) { + const auto& alt_ids = exe_module->xex_module()->opt_alternate_title_ids(); + std::copy(alt_ids.cbegin(), alt_ids.cend(), + std::back_inserter(title_ids)); + } + + for (auto& title_id : title_ids) { + // Get all content data. + auto content_datas = kernel_state()->content_manager()->ListContent( + static_cast(DummyDeviceId::HDD), content_type_enum, + title_id); + for (const auto& content_data : content_datas) { + auto item = e->AppendItem(); + assert_not_null(item); + if (item) { + *item = content_data; + } + } } } if (!device_info || device_info->device_type == DeviceType::ODD) { - AddODDContentTest(e, content_type); + AddODDContentTest(e, content_type_enum); } XELOGD("XamContentAggregateCreateEnumerator: added {} items to enumerator", diff --git a/src/xenia/kernel/xam/xam_content_device.cc b/src/xenia/kernel/xam/xam_content_device.cc index d0aaa34f1..e4312de95 100644 --- a/src/xenia/kernel/xam/xam_content_device.cc +++ b/src/xenia/kernel/xam/xam_content_device.cc @@ -139,8 +139,8 @@ dword_result_t XamContentCreateDeviceEnumerator(dword_t content_type, *buffer_size_ptr = sizeof(X_CONTENT_DEVICE_DATA) * max_count; } - auto e = object_ref(new XStaticEnumerator( - kernel_state(), max_count, sizeof(X_CONTENT_DEVICE_DATA))); + auto e = make_object>(kernel_state(), + max_count); auto result = e->Initialize(0xFE, 0xFE, 0x2000A, 0x20009, 0); if (XFAILED(result)) { return result; @@ -148,7 +148,8 @@ dword_result_t XamContentCreateDeviceEnumerator(dword_t content_type, for (const auto& device_info : dummy_device_infos_) { // Copy our dummy device into the enumerator - auto device_data = (X_CONTENT_DEVICE_DATA*)e->AppendItem(); + auto device_data = e->AppendItem(); + assert_not_null(device_data); if (device_data) { device_data->device_id = static_cast(device_info->device_id); device_data->device_type = diff --git a/src/xenia/kernel/xam/xam_enum.cc b/src/xenia/kernel/xam/xam_enum.cc index ce496a523..396d08dd7 100644 --- a/src/xenia/kernel/xam/xam_enum.cc +++ b/src/xenia/kernel/xam/xam_enum.cc @@ -32,49 +32,36 @@ uint32_t xeXamEnumerate(uint32_t handle, uint32_t flags, lpvoid_t buffer_ptr, uint32_t overlapped_ptr) { assert_true(flags == 0); - X_RESULT result; - uint32_t item_count = 0; - auto e = kernel_state()->object_table()->LookupObject(handle); if (!e) { - result = X_ERROR_INVALID_HANDLE; - } else if (!buffer_ptr) { - result = X_ERROR_INVALID_PARAMETER; - } else { - size_t needed_buffer_size = e->item_size() * e->items_per_enumerate(); - - uint32_t actual_buffer_size = buffer_size; - if (buffer_size == e->items_per_enumerate()) { - actual_buffer_size = static_cast(needed_buffer_size); - // Known culprits: - // Final Fight: Double Impact (saves) - XELOGW( - "Broken usage of XamEnumerate! buffer size={:X} vs actual " - "size={:X} (item size={:X}, items per enumerate={})", - buffer_size, actual_buffer_size, e->item_size(), - e->items_per_enumerate()); - } - - result = X_ERROR_INSUFFICIENT_BUFFER; - if (actual_buffer_size >= needed_buffer_size) { - buffer_ptr.Zero(actual_buffer_size); - result = - e->WriteItems(buffer_ptr.guest_address(), buffer_ptr.as(), - actual_buffer_size, &item_count); - } + return X_ERROR_INVALID_HANDLE; } + auto run = [e, buffer_ptr](uint32_t& extended_error, + uint32_t& length) -> X_RESULT { + X_RESULT result; + uint32_t item_count = 0; + if (!buffer_ptr) { + result = X_ERROR_INVALID_PARAMETER; + } else { + result = e->WriteItems(buffer_ptr.guest_address(), + buffer_ptr.as(), &item_count); + } + extended_error = X_HRESULT_FROM_WIN32(result); + length = item_count; + return result; + }; + if (items_returned) { assert_true(!overlapped_ptr); + uint32_t extended_error; + uint32_t item_count; + X_RESULT result = run(extended_error, item_count); *items_returned = result == X_ERROR_SUCCESS ? item_count : 0; return result; } else if (overlapped_ptr) { assert_true(!items_returned); - kernel_state()->CompleteOverlappedImmediateEx( - overlapped_ptr, - result == X_ERROR_SUCCESS ? X_ERROR_SUCCESS : X_ERROR_FUNCTION_FAILED, - X_HRESULT_FROM_WIN32(result), - result == X_ERROR_SUCCESS ? item_count : 0); + kernel_state()->CompleteOverlappedDeferredEx(run, overlapped_ptr); return X_ERROR_IO_PENDING; } else { assert_always(); diff --git a/src/xenia/kernel/xam/xam_module_export_groups.inc b/src/xenia/kernel/xam/xam_module_export_groups.inc index da6a363c6..563b789a5 100644 --- a/src/xenia/kernel/xam/xam_module_export_groups.inc +++ b/src/xenia/kernel/xam/xam_module_export_groups.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2020 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ diff --git a/src/xenia/kernel/xam/xam_net.cc b/src/xenia/kernel/xam/xam_net.cc index 07ea5935a..dbdff9dc1 100644 --- a/src/xenia/kernel/xam/xam_net.cc +++ b/src/xenia/kernel/xam/xam_net.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -107,9 +107,9 @@ struct XWSAOVERLAPPED { xe::be internal_high; union { struct { - xe::be offset; - xe::be offset_high; - }; + xe::be low; + xe::be high; + } offset; // must be named to avoid GCC error xe::be pointer; }; xe::be event_handle; @@ -306,9 +306,11 @@ dword_result_t NetDll_WSARecvFrom(dword_t caller, dword_t socket, //} } - return 0; + // we're not going to be receiving packets any time soon + // return error so we don't wait on that - Cancerous + return -1; } -DECLARE_XAM_EXPORT1(NetDll_WSARecvFrom, kNetworking, kStub); +DECLARE_XAM_EXPORT2(NetDll_WSARecvFrom, kNetworking, kStub, kHighFrequency); // If the socket is a VDP socket, buffer 0 is the game data length, and buffer 1 // is the unencrypted game data. @@ -598,7 +600,18 @@ dword_result_t NetDll_XNetQosListen(dword_t caller, lpvoid_t id, lpvoid_t data, DECLARE_XAM_EXPORT1(NetDll_XNetQosListen, kNetworking, kStub); dword_result_t NetDll_inet_addr(lpstring_t addr_ptr) { + if (!addr_ptr) { + return -1; + } + uint32_t addr = inet_addr(addr_ptr); + // https://docs.microsoft.com/en-us/windows/win32/api/winsock2/nf-winsock2-inet_addr#return-value + // Based on console research it seems like x360 uses old version of inet_addr + // In case of empty string it return 0 instead of -1 + if (addr == -1 && !addr_ptr.value().length()) { + return 0; + } + return xe::byte_swap(addr); } DECLARE_XAM_EXPORT1(NetDll_inet_addr, kNetworking, kImplemented); diff --git a/src/xenia/kernel/xam/xam_table.inc b/src/xenia/kernel/xam/xam_table.inc index 0bc4f02e6..2e22f5629 100644 --- a/src/xenia/kernel/xam/xam_table.inc +++ b/src/xenia/kernel/xam/xam_table.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -10,6 +10,7 @@ // This is a partial file designed to be included by other files when // constructing various tables. +// clang-format off XE_EXPORT(xam, 0x00000001, NetDll_WSAStartup, kFunction), XE_EXPORT(xam, 0x00000002, NetDll_WSACleanup, kFunction), diff --git a/src/xenia/kernel/xam/xam_task.cc b/src/xenia/kernel/xam/xam_task.cc index facac462c..58f314079 100644 --- a/src/xenia/kernel/xam/xam_task.cc +++ b/src/xenia/kernel/xam/xam_task.cc @@ -11,6 +11,7 @@ #include "xenia/base/string_util.h" #include "xenia/cpu/processor.h" #include "xenia/kernel/kernel_state.h" +#include "xenia/kernel/user_module.h" #include "xenia/kernel/util/shim_utils.h" #include "xenia/kernel/xam/xam_module.h" #include "xenia/kernel/xam/xam_private.h" @@ -40,24 +41,37 @@ static_assert_size(XTASK_MESSAGE, 0x1C); dword_result_t XamTaskSchedule(lpvoid_t callback, pointer_t message, - dword_t unknown, lpdword_t handle_ptr) { - assert_zero(unknown); - + lpdword_t unknown, lpdword_t handle_ptr) { // TODO(gibbed): figure out what this is for *handle_ptr = 12345; - XELOGW("!! Executing scheduled task ({:08X}) synchronously, PROBABLY BAD !! ", + uint32_t stack_size = kernel_state()->GetExecutableModule()->stack_size(); + + // Stack must be aligned to 16kb pages + stack_size = std::max((uint32_t)0x4000, ((stack_size + 0xFFF) & 0xFFFFF000)); + + auto thread = + object_ref(new XThread(kernel_state(), stack_size, 0, callback, + message.guest_address(), 0, true)); + + X_STATUS result = thread->Create(); + + if (XFAILED(result)) { + // Failed! + XELOGE("XAM task creation failed: {:08X}", result); + return result; + } + + XELOGD("XAM task ({:08X}) scheduled asynchronously", callback.guest_address()); - // TODO(gibbed): this is supposed to be async... let's cheat. - auto thread_state = XThread::GetCurrentThread()->thread_state(); - uint64_t args[] = {message.guest_address()}; - auto result = kernel_state()->processor()->Execute(thread_state, callback, - args, xe::countof(args)); return X_STATUS_SUCCESS; } DECLARE_XAM_EXPORT2(XamTaskSchedule, kNone, kImplemented, kSketchy); +dword_result_t XamTaskShouldExit(dword_t r3) { return 0; } +DECLARE_XAM_EXPORT2(XamTaskShouldExit, kNone, kStub, kSketchy); + void RegisterTaskExports(xe::cpu::ExportResolver* export_resolver, KernelState* kernel_state) {} diff --git a/src/xenia/kernel/xam/xam_user.cc b/src/xenia/kernel/xam/xam_user.cc index 850461531..2a1d3c3f7 100644 --- a/src/xenia/kernel/xam/xam_user.cc +++ b/src/xenia/kernel/xam/xam_user.cc @@ -546,7 +546,13 @@ DECLARE_XAM_EXPORT1(XamUserAreUsersFriends, kUserProfiles, kStub); dword_result_t XamShowSigninUI(dword_t unk, dword_t unk_mask) { // Mask values vary. Probably matching user types? Local/remote? - // Games seem to sit and loop until we trigger this notification. + + // To fix game modes that display a 4 profile signin UI (even if playing + // alone): + // XN_SYS_SIGNINCHANGED + kernel_state()->BroadcastNotification(0x0000000A, 1); + // Games seem to sit and loop until we trigger this notification: + // XN_SYS_UI (off) kernel_state()->BroadcastNotification(0x00000009, 0); return X_ERROR_SUCCESS; } @@ -601,7 +607,7 @@ class XStaticAchievementEnumerator : public XEnumerator { } uint32_t WriteItems(uint32_t buffer_ptr, uint8_t* buffer_data, - uint32_t buffer_size, uint32_t* written_count) override { + uint32_t* written_count) override { size_t count = std::min(items_.size() - current_item_, items_per_enumerate()); if (!count) { @@ -609,9 +615,6 @@ class XStaticAchievementEnumerator : public XEnumerator { } size_t size = count * item_size(); - if (size > buffer_size) { - return X_ERROR_INSUFFICIENT_BUFFER; - } auto details = reinterpret_cast(buffer_data); size_t string_offset = @@ -737,6 +740,9 @@ dword_result_t XamReadTileToTexture(dword_t unknown, dword_t title_id, lpvoid_t buffer_ptr, dword_t stride, dword_t height, dword_t overlapped_ptr) { // TODO(gibbed): unknown=0,2,3,9 + if (!tile_id) { + return X_ERROR_INVALID_PARAMETER; + } size_t size = size_t(stride) * size_t(height); std::memset(buffer_ptr, 0xFF, size); @@ -770,8 +776,10 @@ DECLARE_XAM_EXPORT1(XamSessionCreateHandle, kUserProfiles, kStub); dword_result_t XamSessionRefObjByHandle(dword_t handle, lpdword_t obj_ptr) { assert_true(handle == 0xCAFEDEAD); - *obj_ptr = 0; - return X_ERROR_FUNCTION_FAILED; + // TODO(PermaNull): Implement this properly, + // For the time being returning 0xDEADF00D will prevent crashing. + *obj_ptr = 0xDEADF00D; + return X_ERROR_SUCCESS; } DECLARE_XAM_EXPORT1(XamSessionRefObjByHandle, kUserProfiles, kStub); diff --git a/src/xenia/kernel/xbdm/xbdm_table.inc b/src/xenia/kernel/xbdm/xbdm_table.inc index 62a5ad75e..ab217b3ab 100644 --- a/src/xenia/kernel/xbdm/xbdm_table.inc +++ b/src/xenia/kernel/xbdm/xbdm_table.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -10,6 +10,7 @@ // This is a partial file designed to be included by other files when // constructing various tables. +// clang-format off XE_EXPORT(xbdm, 0x00000001, DmAllocatePool, kFunction), XE_EXPORT(xbdm, 0x00000002, DmAllocatePoolWithTag, kFunction), diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_error.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_error.cc index cd41c0858..3a27d490b 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_error.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_error.cc @@ -997,7 +997,7 @@ uint32_t xeRtlNtStatusToDosError(uint32_t source_status) { if (!result) { break; } - XELOGI("RtlNtStatusToDosError {:X} => {:X}", status, result); + XELOGI("xeRtlNtStatusToDosError {:X} => {:X}", status, result); return result; } ++error_table; @@ -1007,7 +1007,7 @@ uint32_t xeRtlNtStatusToDosError(uint32_t source_status) { return status & 0xFFFF; } - XELOGE("RtlNtStatusToDosError lookup NOT IMPLEMENTED"); + XELOGE("xeRtlNtStatusToDosError lookup NOT IMPLEMENTED"); return 317; // ERROR_MR_MID_NOT_FOUND } diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_io.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_io.cc index 7a2d797e8..f7dee19b9 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_io.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_io.cc @@ -357,11 +357,7 @@ dword_result_t NtWriteFile(dword_t file_handle, dword_t event_handle, pointer_t io_status_block, lpvoid_t buffer, dword_t buffer_length, lpqword_t byte_offset_ptr) { - // Async not supported yet. - assert_zero(apc_routine); - X_STATUS result = X_STATUS_SUCCESS; - uint32_t info = 0; // Grab event to signal. bool signal_event = false; @@ -386,30 +382,37 @@ dword_result_t NtWriteFile(dword_t file_handle, dword_t event_handle, buffer.guest_address(), buffer_length, byte_offset_ptr ? static_cast(*byte_offset_ptr) : -1, &bytes_written, apc_context); - if (XSUCCEEDED(result)) { - info = bytes_written; + + if (io_status_block) { + io_status_block->status = result; + io_status_block->information = static_cast(bytes_written); + } + + // Queue the APC callback. It must be delivered via the APC mechanism even + // though were are completing immediately. + // Low bit probably means do not queue to IO ports. + if ((uint32_t)apc_routine & ~1) { + if (apc_context) { + auto thread = XThread::GetCurrentThread(); + thread->EnqueueApc(static_cast(apc_routine) & ~1u, + apc_context, io_status_block, 0); + } } if (!file->is_synchronous()) { result = X_STATUS_PENDING; } - if (io_status_block) { - io_status_block->status = X_STATUS_SUCCESS; - io_status_block->information = info; - } - // Mark that we should signal the event now. We do this after // we have written the info out. signal_event = true; } else { // X_STATUS_PENDING if not returning immediately. result = X_STATUS_PENDING; - info = 0; if (io_status_block) { - io_status_block->status = X_STATUS_SUCCESS; - io_status_block->information = info; + io_status_block->status = X_STATUS_PENDING; + io_status_block->information = 0; } } } @@ -458,7 +461,8 @@ dword_result_t NtSetIoCompletion(dword_t handle, dword_t key_context, port->QueueNotification(notification); return X_STATUS_SUCCESS; } -DECLARE_XBOXKRNL_EXPORT1(NtSetIoCompletion, kFileSystem, kImplemented); +DECLARE_XBOXKRNL_EXPORT2(NtSetIoCompletion, kFileSystem, kImplemented, + kHighFrequency); // Dequeues a packet from the completion port. dword_result_t NtRemoveIoCompletion( @@ -473,7 +477,9 @@ dword_result_t NtRemoveIoCompletion( status = X_STATUS_INVALID_HANDLE; } - uint64_t timeout_ticks = timeout ? static_cast(*timeout) : 0u; + uint64_t timeout_ticks = + timeout ? static_cast(*timeout) + : static_cast(std::numeric_limits::min()); XIOCompletion::IONotification notification; if (port->WaitForNotification(timeout_ticks, ¬ification)) { if (key_context) { @@ -493,7 +499,8 @@ dword_result_t NtRemoveIoCompletion( return status; } -DECLARE_XBOXKRNL_EXPORT1(NtRemoveIoCompletion, kFileSystem, kImplemented); +DECLARE_XBOXKRNL_EXPORT2(NtRemoveIoCompletion, kFileSystem, kImplemented, + kHighFrequency); dword_result_t NtQueryFullAttributesFile( pointer_t obj_attribs, @@ -667,6 +674,66 @@ dword_result_t FscSetCacheElementCount(dword_t unk_0, dword_t unk_1) { } DECLARE_XBOXKRNL_EXPORT1(FscSetCacheElementCount, kFileSystem, kStub); +dword_result_t NtDeviceIoControlFile( + dword_t handle, dword_t event_handle, dword_t apc_routine, + dword_t apc_context, dword_t io_status_block, dword_t io_control_code, + lpvoid_t input_buffer, dword_t input_buffer_len, lpvoid_t output_buffer, + dword_t output_buffer_len) { + // Called by XMountUtilityDrive cache-mounting code + // (checks if the returned values look valid, values below seem to pass the + // checks) + const uint32_t cache_size = 0xFF000; + + const uint32_t X_IOCTL_DISK_GET_DRIVE_GEOMETRY = 0x70000; + const uint32_t X_IOCTL_DISK_GET_PARTITION_INFO = 0x74004; + + if (io_control_code == X_IOCTL_DISK_GET_DRIVE_GEOMETRY) { + if (output_buffer_len < 0x8) { + assert_always(); + return X_STATUS_BUFFER_TOO_SMALL; + } + xe::store_and_swap(output_buffer, cache_size / 512); + xe::store_and_swap(output_buffer + 4, 512); + } else if (io_control_code == X_IOCTL_DISK_GET_PARTITION_INFO) { + if (output_buffer_len < 0x10) { + assert_always(); + return X_STATUS_BUFFER_TOO_SMALL; + } + xe::store_and_swap(output_buffer, 0); + xe::store_and_swap(output_buffer + 8, cache_size); + } else { + XELOGD("NtDeviceIoControlFile(0x{:X}) - unhandled IOCTL!", + uint32_t(io_control_code)); + assert_always(); + return X_STATUS_INVALID_PARAMETER; + } + + return X_STATUS_SUCCESS; +} +DECLARE_XBOXKRNL_EXPORT1(NtDeviceIoControlFile, kFileSystem, kStub); + +dword_result_t IoCreateDevice(dword_t device_struct, dword_t r4, dword_t r5, + dword_t r6, dword_t r7, lpdword_t out_struct) { + // Called from XMountUtilityDrive XAM-task code + // That code tries writing things to a pointer at out_struct+0x18 + // We'll alloc some scratch space for it so it doesn't cause any exceptions + + // 0x24 is guessed size from accesses to out_struct - likely incorrect + auto out_guest = kernel_memory()->SystemHeapAlloc(0x24); + + auto out = kernel_memory()->TranslateVirtual(out_guest); + memset(out, 0, 0x24); + + // XMountUtilityDrive writes some kind of header here + // 0x1000 bytes should be enough to store it + auto out_guest2 = kernel_memory()->SystemHeapAlloc(0x1000); + xe::store_and_swap(out + 0x18, out_guest2); + + *out_struct = out_guest; + return X_STATUS_SUCCESS; +} +DECLARE_XBOXKRNL_EXPORT1(IoCreateDevice, kFileSystem, kStub); + void RegisterIoExports(xe::cpu::ExportResolver* export_resolver, KernelState* kernel_state) {} diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_io_info.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_io_info.cc index 0add7390a..e43db31e6 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_io_info.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_io_info.cc @@ -126,6 +126,13 @@ dword_result_t NtQueryInformationFile( out_length = sizeof(*info); break; } + case XFileAlignmentInformation: { + // Requested by XMountUtilityDrive XAM-task + auto info = info_ptr.as(); + *info = 0; // FILE_BYTE_ALIGNMENT? + out_length = sizeof(*info); + break; + } default: { // Unsupported, for now. assert_always(); diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_module.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_module.cc index b2aafe294..f6b9846e0 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_module.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_module.cc @@ -189,6 +189,16 @@ XboxkrnlModule::XboxkrnlModule(Emulator* emulator, KernelState* kernel_state) ordinals::XexExecutableModuleHandle, ppXexExecutableModuleHandle); + // ExLoadedImageName (char*) + // The full path to loaded image/xex including its name. + // Used usually in custom dashboards (Aurora) + // Todo(Gliniak): Confirm that official kernel always allocate space for this + // variable. + uint32_t ppExLoadedImageName = + memory_->SystemHeapAlloc(kExLoadedImageNameSize); + export_resolver_->SetVariableMapping( + "xboxkrnl.exe", ordinals::ExLoadedImageName, ppExLoadedImageName); + // ExLoadedCommandLine (char*) // The name of the xex. Not sure this is ever really used on real devices. // Perhaps it's how swap disc/etc data is sent? diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_module.h b/src/xenia/kernel/xboxkrnl/xboxkrnl_module.h index 5a817453c..39a9c95b2 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_module.h +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_module.h @@ -27,6 +27,8 @@ namespace xboxkrnl { class XboxkrnlModule : public KernelModule { public: + static constexpr size_t kExLoadedImageNameSize = 255 + 1; + XboxkrnlModule(Emulator* emulator, KernelState* kernel_state); virtual ~XboxkrnlModule(); diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_strings.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_strings.cc index 5c5090299..f350fd9e5 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_strings.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_strings.cc @@ -19,6 +19,9 @@ #include "xenia/kernel/xthread.h" #include "xenia/xbox.h" +DEFINE_bool(log_string_format_kernel_calls, false, + "Log kernel calls with the kHighFrequency tag.", "Logging"); + namespace xe { namespace kernel { namespace xboxkrnl { @@ -830,7 +833,14 @@ SHIM_CALL DbgPrint_shim(PPCContext* ppc_context, KernelState* kernel_state) { return; } - XELOGD("(DbgPrint) {}", data.str()); + // trim whitespace from end of message + auto str = data.str(); + str.erase(std::find_if(str.rbegin(), str.rend(), + [](uint8_t c) { return !std::isspace(c); }) + .base(), + str.end()); + + XELOGI("(DbgPrint) {}", str); SHIM_SET_RETURN_32(X_STATUS_SUCCESS); } @@ -841,8 +851,11 @@ SHIM_CALL _snprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { int32_t buffer_count = SHIM_GET_ARG_32(1); uint32_t format_ptr = SHIM_GET_ARG_32(2); - XELOGD("_snprintf({:08X}, {}, {:08X}, ...)", buffer_ptr, buffer_count, - format_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("_snprintf({:08X}, {}, {:08X}({}), ...)", buffer_ptr, buffer_count, + format_ptr, + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr))); + } if (buffer_ptr == 0 || buffer_count <= 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -877,7 +890,10 @@ SHIM_CALL sprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t buffer_ptr = SHIM_GET_ARG_32(0); uint32_t format_ptr = SHIM_GET_ARG_32(1); - XELOGD("sprintf({:08X}, {:08X}, ...)", buffer_ptr, format_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("sprintf({:08X}, {:08X}({}), ...)", buffer_ptr, format_ptr, + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr))); + } if (buffer_ptr == 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -906,8 +922,12 @@ SHIM_CALL _snwprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { int32_t buffer_count = SHIM_GET_ARG_32(1); uint32_t format_ptr = SHIM_GET_ARG_32(2); - XELOGD("_snwprintf({:08X}, {}, {:08X}, ...)", buffer_ptr, buffer_count, - format_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("_snwprintf({:08X}, {}, {:08X}({}), ...)", buffer_ptr, buffer_count, + format_ptr, + xe::to_utf8( + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr)))); + } if (buffer_ptr == 0 || buffer_count <= 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -942,7 +962,11 @@ SHIM_CALL swprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t buffer_ptr = SHIM_GET_ARG_32(0); uint32_t format_ptr = SHIM_GET_ARG_32(1); - XELOGD("swprintf({:08X}, {:08X}, ...)", buffer_ptr, format_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("swprintf({:08X}, {:08X}({}), ...)", buffer_ptr, format_ptr, + xe::to_utf8( + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr)))); + } if (buffer_ptr == 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -972,8 +996,11 @@ SHIM_CALL _vsnprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t format_ptr = SHIM_GET_ARG_32(2); uint32_t arg_ptr = SHIM_GET_ARG_32(3); - XELOGD("_vsnprintf({:08X}, {}, {:08X}, {:08X})", buffer_ptr, buffer_count, - format_ptr, arg_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("_vsnprintf({:08X}, {}, {:08X}({}), {:08X})", buffer_ptr, + buffer_count, format_ptr, + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr)), arg_ptr); + } if (buffer_ptr == 0 || buffer_count <= 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -1012,8 +1039,13 @@ SHIM_CALL _vsnwprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t format_ptr = SHIM_GET_ARG_32(2); uint32_t arg_ptr = SHIM_GET_ARG_32(3); - XELOGD("_vsnwprintf({:08X}, {}, {:08X}, {:08X})", buffer_ptr, buffer_count, - format_ptr, arg_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("_vsnwprintf({:08X}, {}, {:08X}({}), {:08X})", buffer_ptr, + buffer_count, format_ptr, + xe::to_utf8( + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr))), + arg_ptr); + } if (buffer_ptr == 0 || buffer_count <= 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -1051,7 +1083,10 @@ SHIM_CALL vsprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t format_ptr = SHIM_GET_ARG_32(1); uint32_t arg_ptr = SHIM_GET_ARG_32(2); - XELOGD("vsprintf({:08X}, {:08X}, {:08X})", buffer_ptr, format_ptr, arg_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("vsprintf({:08X}, {:08X}({}), {:08X})", buffer_ptr, format_ptr, + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr)), arg_ptr); + } if (buffer_ptr == 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -1079,7 +1114,12 @@ SHIM_CALL _vscwprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t format_ptr = SHIM_GET_ARG_32(0); uint32_t arg_ptr = SHIM_GET_ARG_32(1); - XELOGD("_vscwprintf({:08X}, {:08X})", format_ptr, arg_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("_vscwprintf({:08X}({}), {:08X})", format_ptr, + xe::to_utf8( + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr))), + arg_ptr); + } if (format_ptr == 0) { SHIM_SET_RETURN_32(-1); @@ -1102,7 +1142,12 @@ SHIM_CALL vswprintf_shim(PPCContext* ppc_context, KernelState* kernel_state) { uint32_t format_ptr = SHIM_GET_ARG_32(1); uint32_t arg_ptr = SHIM_GET_ARG_32(2); - XELOGD("vswprintf({:08X}, {:08X}, {:08X})", buffer_ptr, format_ptr, arg_ptr); + if (cvars::log_high_frequency_kernel_calls) { + XELOGD("vswprintf({:08X}, {:08X}({}), {:08X})", buffer_ptr, format_ptr, + xe::to_utf8( + xe::load_and_swap(SHIM_MEM_ADDR(format_ptr))), + arg_ptr); + } if (buffer_ptr == 0 || format_ptr == 0) { SHIM_SET_RETURN_32(-1); diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_table.inc b/src/xenia/kernel/xboxkrnl/xboxkrnl_table.inc index 3d6f6cc6f..0e0447055 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_table.inc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_table.inc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2013 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -10,6 +10,7 @@ // This is a partial file designed to be included by other files when // constructing various tables. +// clang-format off XE_EXPORT(xboxkrnl, 0x00000001, DbgBreakPoint, kFunction), XE_EXPORT(xboxkrnl, 0x00000002, DbgBreakPointWithStatus, kFunction), diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_threading.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_threading.cc index bbe78ec87..3a323d579 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_threading.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_threading.cc @@ -960,14 +960,14 @@ void KeReleaseSpinLockFromRaisedIrql(lpdword_t lock_ptr) { DECLARE_XBOXKRNL_EXPORT2(KeReleaseSpinLockFromRaisedIrql, kThreading, kImplemented, kHighFrequency); -void KeEnterCriticalRegion() { XThread::EnterCriticalRegion(); } +void KeEnterCriticalRegion() { + XThread::GetCurrentThread()->EnterCriticalRegion(); +} DECLARE_XBOXKRNL_EXPORT2(KeEnterCriticalRegion, kThreading, kImplemented, kHighFrequency); void KeLeaveCriticalRegion() { - XThread::LeaveCriticalRegion(); - - XThread::GetCurrentThread()->CheckApcs(); + XThread::GetCurrentThread()->LeaveCriticalRegion(); } DECLARE_XBOXKRNL_EXPORT2(KeLeaveCriticalRegion, kThreading, kImplemented, kHighFrequency); diff --git a/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc b/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc index 91e685a14..e05415570 100644 --- a/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc +++ b/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc @@ -344,7 +344,7 @@ dword_result_t VdRetrainEDRAM(unknown_t unk0, unknown_t unk1, unknown_t unk2, DECLARE_XBOXKRNL_EXPORT1(VdRetrainEDRAM, kVideo, kStub); void VdSwap(lpvoid_t buffer_ptr, // ptr into primary ringbuffer - lpvoid_t fetch_ptr, // frontbuffer texture fetch + lpvoid_t fetch_ptr, // frontbuffer Direct3D 9 texture header fetch lpunknown_t unk2, // system writeback ptr lpunknown_t unk3, // buffer from VdGetSystemCommandBuffer lpunknown_t unk4, // from VdGetSystemCommandBuffer (0xBEEF0001) @@ -361,23 +361,29 @@ void VdSwap(lpvoid_t buffer_ptr, // ptr into primary ringbuffer namespace xenos = xe::gpu::xenos; - xenos::xe_gpu_texture_fetch_t fetch; + xenos::xe_gpu_texture_fetch_t gpu_fetch; xe::copy_and_swap_32_unaligned( - &fetch, reinterpret_cast(fetch_ptr.host_address()), 6); + &gpu_fetch, reinterpret_cast(fetch_ptr.host_address()), 6); - // Kernel virtual -> GPU physical. - uint32_t frontbuffer_address = fetch.base_address << 12; - assert_true(*frontbuffer_ptr == frontbuffer_address); - frontbuffer_address = - kernel_memory()->GetPhysicalAddress(frontbuffer_address); - assert_true(frontbuffer_address != UINT32_MAX); - if (frontbuffer_address == UINT32_MAX) { + // The fetch constant passed is not a true GPU fetch constant, but rather, the + // fetch constant stored in the Direct3D 9 texture header, which contains the + // address in one of the virtual mappings of the physical memory rather than + // the physical address itself. We're emulating swapping in the GPU subsystem, + // which works with GPU memory addresses (physical addresses directly) from + // proper fetch constants like ones used to bind textures to shaders, not CPU + // MMU addresses, so translation from virtual to physical is needed. + uint32_t frontbuffer_virtual_address = gpu_fetch.base_address << 12; + assert_true(*frontbuffer_ptr == frontbuffer_virtual_address); + uint32_t frontbuffer_physical_address = + kernel_memory()->GetPhysicalAddress(frontbuffer_virtual_address); + assert_true(frontbuffer_physical_address != UINT32_MAX); + if (frontbuffer_physical_address == UINT32_MAX) { // Xenia-specific safety check. XELOGE("VdSwap: Invalid front buffer virtual address 0x{:08X}", - fetch.base_address << 12); + frontbuffer_virtual_address); return; } - fetch.base_address = frontbuffer_address >> 12; + gpu_fetch.base_address = frontbuffer_physical_address >> 12; auto texture_format = gpu::xenos::TextureFormat(texture_format_ptr.value()); auto color_space = *color_space_ptr; @@ -385,8 +391,8 @@ void VdSwap(lpvoid_t buffer_ptr, // ptr into primary ringbuffer texture_format == gpu::xenos::TextureFormat::k_2_10_10_10_AS_16_16_16_16); assert_true(color_space == 0); // RGB(0) - assert_true(*width == 1 + fetch.size_2d.width); - assert_true(*height == 1 + fetch.size_2d.height); + assert_true(*width == 1 + gpu_fetch.size_2d.width); + assert_true(*height == 1 + gpu_fetch.size_2d.height); // The caller seems to reserve 64 words (256b) in the primary ringbuffer // for this method to do what it needs. We just zero them out and send a @@ -398,19 +404,19 @@ void VdSwap(lpvoid_t buffer_ptr, // ptr into primary ringbuffer uint32_t offset = 0; auto dwords = buffer_ptr.as_array(); - // Write in the texture fetch. + // Write in the GPU texture fetch. dwords[offset++] = xenos::MakePacketType0(gpu::XE_GPU_REG_SHADER_CONSTANT_FETCH_00_0, 6); - dwords[offset++] = fetch.dword_0; - dwords[offset++] = fetch.dword_1; - dwords[offset++] = fetch.dword_2; - dwords[offset++] = fetch.dword_3; - dwords[offset++] = fetch.dword_4; - dwords[offset++] = fetch.dword_5; + dwords[offset++] = gpu_fetch.dword_0; + dwords[offset++] = gpu_fetch.dword_1; + dwords[offset++] = gpu_fetch.dword_2; + dwords[offset++] = gpu_fetch.dword_3; + dwords[offset++] = gpu_fetch.dword_4; + dwords[offset++] = gpu_fetch.dword_5; dwords[offset++] = xenos::MakePacketType3(xenos::PM4_XE_SWAP, 4); - dwords[offset++] = 'SWAP'; - dwords[offset++] = frontbuffer_address; + dwords[offset++] = xe::gpu::xenos::kSwapSignature; + dwords[offset++] = frontbuffer_physical_address; dwords[offset++] = *width; dwords[offset++] = *height; diff --git a/src/xenia/kernel/xenumerator.cc b/src/xenia/kernel/xenumerator.cc index 4b5ea7216..dcaa6a07a 100644 --- a/src/xenia/kernel/xenumerator.cc +++ b/src/xenia/kernel/xenumerator.cc @@ -21,7 +21,7 @@ XEnumerator::XEnumerator(KernelState* kernel_state, size_t items_per_enumerate, XEnumerator::~XEnumerator() = default; X_STATUS XEnumerator::Initialize(uint32_t user_index, uint32_t app_id, - uint32_t message, uint32_t message2, + uint32_t open_message, uint32_t close_message, uint32_t flags, uint32_t extra_size, void** extra_buffer) { auto native_object = CreateNative(sizeof(X_KENUMERATOR) + extra_size); @@ -30,8 +30,8 @@ X_STATUS XEnumerator::Initialize(uint32_t user_index, uint32_t app_id, } auto guest_object = reinterpret_cast(native_object); guest_object->app_id = app_id; - guest_object->message = message; - guest_object->message2 = message2; + guest_object->open_message = open_message; + guest_object->close_message = close_message; guest_object->user_index = user_index; guest_object->items_per_enumerate = static_cast(items_per_enumerate_); @@ -44,32 +44,28 @@ X_STATUS XEnumerator::Initialize(uint32_t user_index, uint32_t app_id, } X_STATUS XEnumerator::Initialize(uint32_t user_index, uint32_t app_id, - uint32_t message, uint32_t message2, + uint32_t open_message, uint32_t close_message, uint32_t flags) { - return Initialize(user_index, app_id, message, message2, flags, 0, nullptr); + return Initialize(user_index, app_id, open_message, close_message, flags, 0, + nullptr); } -uint8_t* XStaticEnumerator::AppendItem() { - buffer_.resize(++item_count_ * item_size()); - auto ptr = - const_cast(buffer_.data() + (item_count_ - 1) * item_size()); - return ptr; +uint8_t* XStaticUntypedEnumerator::AppendItem() { + size_t offset = buffer_.size(); + buffer_.resize(offset + item_size()); + item_count_++; + return const_cast(&buffer_.data()[offset]); } -uint32_t XStaticEnumerator::WriteItems(uint32_t buffer_ptr, - uint8_t* buffer_data, - uint32_t buffer_size, - uint32_t* written_count) { +uint32_t XStaticUntypedEnumerator::WriteItems(uint32_t buffer_ptr, + uint8_t* buffer_data, + uint32_t* written_count) { size_t count = std::min(item_count_ - current_item_, items_per_enumerate()); if (!count) { return X_ERROR_NO_MORE_FILES; } size_t size = count * item_size(); - if (size > buffer_size) { - return X_ERROR_INSUFFICIENT_BUFFER; - } - size_t offset = current_item_ * item_size(); std::memcpy(buffer_data, buffer_.data() + offset, size); diff --git a/src/xenia/kernel/xenumerator.h b/src/xenia/kernel/xenumerator.h index 3af03241d..7b2218e97 100644 --- a/src/xenia/kernel/xenumerator.h +++ b/src/xenia/kernel/xenumerator.h @@ -22,8 +22,8 @@ namespace kernel { struct X_KENUMERATOR { be app_id; - be message; - be message2; + be open_message; + be close_message; be user_index; be items_per_enumerate; be flags; @@ -43,19 +43,21 @@ class XEnumerator : public XObject { size_t item_size); virtual ~XEnumerator(); - X_STATUS Initialize(uint32_t user_index, uint32_t app_id, uint32_t message, - uint32_t message2, uint32_t flags, uint32_t extra_size, - void** extra_buffer); + X_STATUS Initialize(uint32_t user_index, uint32_t app_id, + uint32_t open_message, uint32_t close_message, + uint32_t flags, uint32_t extra_size, void** extra_buffer); - X_STATUS Initialize(uint32_t user_index, uint32_t app_id, uint32_t message, - uint32_t message2, uint32_t flags); + X_STATUS Initialize(uint32_t user_index, uint32_t app_id, + uint32_t open_message, uint32_t close_message, + uint32_t flags); template - X_STATUS Initialize(uint32_t user_index, uint32_t app_id, uint32_t message, - uint32_t message2, uint32_t flags, T** extra) { + X_STATUS Initialize(uint32_t user_index, uint32_t app_id, + uint32_t open_message, uint32_t close_message, + uint32_t flags, T** extra) { void* dummy; - auto result = Initialize(user_index, app_id, message, message2, flags, - static_cast(sizeof(T)), &dummy); + auto result = Initialize(user_index, app_id, open_message, close_message, + flags, static_cast(sizeof(T)), &dummy); if (extra) { *extra = XFAILED(result) ? nullptr : static_cast(dummy); } @@ -63,7 +65,6 @@ class XEnumerator : public XObject { } virtual uint32_t WriteItems(uint32_t buffer_ptr, uint8_t* buffer_data, - uint32_t buffer_size, uint32_t* written_count) = 0; size_t item_size() const { return item_size_; } @@ -74,10 +75,10 @@ class XEnumerator : public XObject { size_t item_size_; }; -class XStaticEnumerator : public XEnumerator { +class XStaticUntypedEnumerator : public XEnumerator { public: - XStaticEnumerator(KernelState* kernel_state, size_t items_per_enumerate, - size_t item_size) + XStaticUntypedEnumerator(KernelState* kernel_state, + size_t items_per_enumerate, size_t item_size) : XEnumerator(kernel_state, items_per_enumerate, item_size), item_count_(0), current_item_(0) {} @@ -87,7 +88,7 @@ class XStaticEnumerator : public XEnumerator { uint8_t* AppendItem(); uint32_t WriteItems(uint32_t buffer_ptr, uint8_t* buffer_data, - uint32_t buffer_size, uint32_t* written_count) override; + uint32_t* written_count) override; private: size_t item_count_; @@ -95,6 +96,23 @@ class XStaticEnumerator : public XEnumerator { std::vector buffer_; }; +template +class XStaticEnumerator : public XStaticUntypedEnumerator { + public: + XStaticEnumerator(KernelState* kernel_state, size_t items_per_enumerate) + : XStaticUntypedEnumerator(kernel_state, items_per_enumerate, sizeof(T)) { + } + + T* AppendItem() { + return reinterpret_cast(XStaticUntypedEnumerator::AppendItem()); + } + + void AppendItem(const T& item) { + auto ptr = AppendItem(); + item.Write(ptr); + } +}; + } // namespace kernel } // namespace xe diff --git a/src/xenia/kernel/xiocompletion.cc b/src/xenia/kernel/xiocompletion.cc index 94d49a5f5..638a0a3ef 100644 --- a/src/xenia/kernel/xiocompletion.cc +++ b/src/xenia/kernel/xiocompletion.cc @@ -30,7 +30,7 @@ bool XIOCompletion::WaitForNotification(uint64_t wait_ticks, IONotification* notify) { auto ms = std::chrono::milliseconds(TimeoutTicksToMs(wait_ticks)); auto res = threading::Wait(notification_semaphore_.get(), false, ms); - if (res == threading::WaitResult::kSuccess || !wait_ticks) { + if (res == threading::WaitResult::kSuccess) { std::unique_lock lock(notification_lock_); assert_false(notifications_.empty()); diff --git a/src/xenia/kernel/xmodule.cc b/src/xenia/kernel/xmodule.cc index 06510cfee..5807fbc88 100644 --- a/src/xenia/kernel/xmodule.cc +++ b/src/xenia/kernel/xmodule.cc @@ -71,7 +71,7 @@ uint32_t XModule::GetHandleFromHModule(void* hmodule) { bool XModule::Save(ByteStream* stream) { XELOGD("XModule {:08X} ({})", handle(), path()); - stream->Write('XMOD'); + stream->Write(kModuleSaveSignature); stream->Write(path()); stream->Write(hmodule_ptr_); @@ -85,7 +85,7 @@ bool XModule::Save(ByteStream* stream) { object_ref XModule::Restore(KernelState* kernel_state, ByteStream* stream) { - if (stream->Read() != 'XMOD') { + if (stream->Read() != kModuleSaveSignature) { return nullptr; } diff --git a/src/xenia/kernel/xmodule.h b/src/xenia/kernel/xmodule.h index 8b558681a..0a937a73b 100644 --- a/src/xenia/kernel/xmodule.h +++ b/src/xenia/kernel/xmodule.h @@ -19,6 +19,8 @@ namespace xe { namespace kernel { +constexpr fourcc_t kModuleSaveSignature = make_fourcc("XMOD"); + // https://www.nirsoft.net/kernel_struct/vista/LDR_DATA_TABLE_ENTRY.html // HMODULE points to this struct! struct X_LDR_DATA_TABLE_ENTRY { diff --git a/src/xenia/kernel/xobject.cc b/src/xenia/kernel/xobject.cc index 3675a1bce..4909dbaa1 100644 --- a/src/xenia/kernel/xobject.cc +++ b/src/xenia/kernel/xobject.cc @@ -381,7 +381,7 @@ object_ref XObject::GetNativeObject(KernelState* kernel_state, as_type = header->type; } - if (header->wait_list_flink == 'XEN\0') { + if (header->wait_list_flink == kXObjSignature) { // Already initialized. // TODO: assert if the type of the object != as_type uint32_t handle = header->wait_list_blink; diff --git a/src/xenia/kernel/xobject.h b/src/xenia/kernel/xobject.h index 163b6afe4..11d8ecb3c 100644 --- a/src/xenia/kernel/xobject.h +++ b/src/xenia/kernel/xobject.h @@ -27,6 +27,8 @@ class Emulator; namespace xe { namespace kernel { +constexpr fourcc_t kXObjSignature = make_fourcc('X', 'E', 'N', '\0'); + class KernelState; template @@ -214,7 +216,7 @@ class XObject { // Stash native pointer into X_DISPATCH_HEADER static void StashHandle(X_DISPATCH_HEADER* header, uint32_t handle) { - header->wait_list_flink = 'XEN\0'; + header->wait_list_flink = kXObjSignature; header->wait_list_blink = handle; } @@ -346,6 +348,12 @@ bool operator!=(std::nullptr_t _Left, const object_ref<_Ty>& _Right) noexcept { return (!(_Left == _Right)); } +template +std::enable_if_t::value, object_ref> make_object( + Args&&... args) { + return object_ref(new T(std::forward(args)...)); +} + template object_ref retain_object(T* ptr) { if (ptr) ptr->Retain(); diff --git a/src/xenia/kernel/xthread.cc b/src/xenia/kernel/xthread.cc index 46f1ef961..e11a94296 100644 --- a/src/xenia/kernel/xthread.cc +++ b/src/xenia/kernel/xthread.cc @@ -226,7 +226,7 @@ void XThread::InitializeGuestObject() { } bool XThread::AllocateStack(uint32_t size) { - auto heap = memory()->LookupHeap(0x40000000); + auto heap = memory()->LookupHeap(kStackAddressRangeBegin); auto alignment = heap->page_size(); auto padding = heap->page_size() * 2; // Guard page size * 2 @@ -234,10 +234,10 @@ bool XThread::AllocateStack(uint32_t size) { auto actual_size = size + padding; uint32_t address = 0; - if (!heap->AllocRange(0x40000000, 0x7F000000, actual_size, alignment, - kMemoryAllocationReserve | kMemoryAllocationCommit, - kMemoryProtectRead | kMemoryProtectWrite, false, - &address)) { + if (!heap->AllocRange( + kStackAddressRangeBegin, kStackAddressRangeEnd, actual_size, + alignment, kMemoryAllocationReserve | kMemoryAllocationCommit, + kMemoryProtectRead | kMemoryProtectWrite, false, &address)) { return false; } @@ -258,7 +258,7 @@ bool XThread::AllocateStack(uint32_t size) { void XThread::FreeStack() { if (stack_alloc_base_) { - auto heap = memory()->LookupHeap(0x40000000); + auto heap = memory()->LookupHeap(kStackAddressRangeBegin); heap->Release(stack_alloc_base_); stack_alloc_base_ = 0; @@ -578,11 +578,15 @@ void XThread::Reenter(uint32_t address) { } void XThread::EnterCriticalRegion() { - xe::global_critical_region::mutex().lock(); + guest_object()->apc_disable_count--; } void XThread::LeaveCriticalRegion() { - xe::global_critical_region::mutex().unlock(); + auto kthread = guest_object(); + auto apc_disable_count = ++kthread->apc_disable_count; + if (apc_disable_count == 0) { + CheckApcs(); + } } uint32_t XThread::RaiseIrql(uint32_t new_irql) { @@ -593,11 +597,11 @@ void XThread::LowerIrql(uint32_t new_irql) { irql_ = new_irql; } void XThread::CheckApcs() { DeliverAPCs(); } -void XThread::LockApc() { EnterCriticalRegion(); } +void XThread::LockApc() { global_critical_region_.mutex().lock(); } void XThread::UnlockApc(bool queue_delivery) { bool needs_apc = apc_list_.HasPending(); - LeaveCriticalRegion(); + global_critical_region_.mutex().unlock(); if (needs_apc && queue_delivery) { thread_->QueueUserCallback([this]() { DeliverAPCs(); }); } @@ -632,7 +636,8 @@ void XThread::DeliverAPCs() { // https://www.drdobbs.com/inside-nts-asynchronous-procedure-call/184416590?pgno=7 auto processor = kernel_state()->processor(); LockApc(); - while (apc_list_.HasPending()) { + auto kthread = guest_object(); + while (apc_list_.HasPending() && kthread->apc_disable_count == 0) { // Get APC entry (offset for LIST_ENTRY offset) and cache what we need. // Calling the routine may delete the memory/overwrite it. uint32_t apc_ptr = apc_list_.Shift() - 8; @@ -915,7 +920,7 @@ bool XThread::Save(ByteStream* stream) { return false; } - stream->Write('THRD'); + stream->Write(kThreadSaveSignature); stream->Write(thread_name_); ThreadSavedState state; @@ -971,7 +976,7 @@ object_ref XThread::Restore(KernelState* kernel_state, return nullptr; } - if (stream->Read() != 'THRD') { + if (stream->Read() != kThreadSaveSignature) { XELOGE("Could not restore XThread - invalid magic!"); return nullptr; } diff --git a/src/xenia/kernel/xthread.h b/src/xenia/kernel/xthread.h index 78a6591a1..9eef807b2 100644 --- a/src/xenia/kernel/xthread.h +++ b/src/xenia/kernel/xthread.h @@ -25,6 +25,8 @@ namespace xe { namespace kernel { +constexpr fourcc_t kThreadSaveSignature = make_fourcc("THRD"); + class XEvent; constexpr uint32_t X_CREATE_SUSPENDED = 0x00000001; @@ -111,7 +113,9 @@ struct X_KTHREAD { uint8_t unk_8B; // 0x8B uint8_t unk_8C[0x10]; // 0x8C xe::be unk_9C; // 0x9C - uint8_t unk_A0[0x1C]; // 0xA0 + uint8_t unk_A0[0x10]; // 0xA0 + int32_t apc_disable_count; // 0xB0 + uint8_t unk_B4[0x8]; // 0xB4 uint8_t suspend_count; // 0xBC uint8_t unk_BD; // 0xBD uint8_t unk_BE; // 0xBE @@ -145,6 +149,9 @@ class XThread : public XObject, public cpu::Thread { public: static const XObject::Type kObjectType = XObject::Type::Thread; + static constexpr uint32_t kStackAddressRangeBegin = 0x70000000; + static constexpr uint32_t kStackAddressRangeEnd = 0x7F000000; + struct CreationParams { uint32_t stack_size; uint32_t xapi_thread_startup; @@ -190,8 +197,8 @@ class XThread : public XObject, public cpu::Thread { virtual void Reenter(uint32_t address); - static void EnterCriticalRegion(); - static void LeaveCriticalRegion(); + void EnterCriticalRegion(); + void LeaveCriticalRegion(); uint32_t RaiseIrql(uint32_t new_irql); void LowerIrql(uint32_t new_irql); diff --git a/src/xenia/ui/d3d12/d3d12_api.h b/src/xenia/ui/d3d12/d3d12_api.h index 1f22fcaf7..e474d9391 100644 --- a/src/xenia/ui/d3d12/d3d12_api.h +++ b/src/xenia/ui/d3d12/d3d12_api.h @@ -17,6 +17,7 @@ #include #include #include +#include #include #include // For Microsoft::WRL::ComPtr. diff --git a/src/xenia/ui/d3d12/d3d12_context.cc b/src/xenia/ui/d3d12/d3d12_context.cc index 7764afa44..a37c61b72 100644 --- a/src/xenia/ui/d3d12/d3d12_context.cc +++ b/src/xenia/ui/d3d12/d3d12_context.cc @@ -32,10 +32,10 @@ bool D3D12Context::Initialize() { return true; } - auto& provider = GetD3D12Provider(); - auto dxgi_factory = provider.GetDXGIFactory(); - auto device = provider.GetDevice(); - auto direct_queue = provider.GetDirectQueue(); + const D3D12Provider& provider = GetD3D12Provider(); + IDXGIFactory2* dxgi_factory = provider.GetDXGIFactory(); + ID3D12Device* device = provider.GetDevice(); + ID3D12CommandQueue* direct_queue = provider.GetDirectQueue(); swap_fence_current_value_ = 1; swap_fence_completed_value_ = 0; @@ -70,11 +70,10 @@ bool D3D12Context::Initialize() { swap_chain_desc.AlphaMode = DXGI_ALPHA_MODE_IGNORE; swap_chain_desc.Flags = 0; IDXGISwapChain1* swap_chain_1; - if (FAILED(dxgi_factory->CreateSwapChainForHwnd( - provider.GetDirectQueue(), - reinterpret_cast(target_window_->native_handle()), - &swap_chain_desc, nullptr, nullptr, &swap_chain_1))) { - XELOGE("Failed to create a DXGI swap chain"); + if (FAILED(dxgi_factory->CreateSwapChainForComposition( + provider.GetDirectQueue(), &swap_chain_desc, nullptr, + &swap_chain_1))) { + XELOGE("Failed to create a DXGI swap chain for composition"); Shutdown(); return false; } @@ -117,9 +116,9 @@ bool D3D12Context::Initialize() { return false; } } - if (FAILED(device->CreateCommandList(0, D3D12_COMMAND_LIST_TYPE_DIRECT, - swap_command_allocators_[0], nullptr, - IID_PPV_ARGS(&swap_command_list_)))) { + if (FAILED(device->CreateCommandList( + 0, D3D12_COMMAND_LIST_TYPE_DIRECT, swap_command_allocators_[0].Get(), + nullptr, IID_PPV_ARGS(&swap_command_list_)))) { XELOGE("Failed to create the composition graphics command list"); Shutdown(); return false; @@ -127,6 +126,45 @@ bool D3D12Context::Initialize() { // Initially in open state, wait until BeginSwap. swap_command_list_->Close(); + // Associate the swap chain with the window via DirectComposition. + if (FAILED(provider.CreateDCompositionDevice(nullptr, + IID_PPV_ARGS(&dcomp_device_)))) { + XELOGE("Failed to create a DirectComposition device"); + Shutdown(); + return false; + } + if (FAILED(dcomp_device_->CreateTargetForHwnd( + reinterpret_cast(target_window_->native_handle()), TRUE, + &dcomp_target_))) { + XELOGE("Failed to create a DirectComposition target for the window"); + Shutdown(); + return false; + } + if (FAILED(dcomp_device_->CreateVisual(&dcomp_visual_))) { + XELOGE("Failed to create a DirectComposition visual"); + Shutdown(); + return false; + } + if (FAILED(dcomp_visual_->SetContent(swap_chain_.Get()))) { + XELOGE( + "Failed to set the content of the DirectComposition visual to the swap " + "chain"); + Shutdown(); + return false; + } + if (FAILED(dcomp_target_->SetRoot(dcomp_visual_.Get()))) { + XELOGE( + "Failed to set the root of the DirectComposition target to the swap " + "chain visual"); + Shutdown(); + return false; + } + if (FAILED(dcomp_device_->Commit())) { + XELOGE("Failed to commit DirectComposition commands"); + Shutdown(); + return false; + } + // Initialize the immediate mode drawer if not offscreen. immediate_drawer_ = std::make_unique(*this); if (!immediate_drawer_->Initialize()) { @@ -151,14 +189,14 @@ bool D3D12Context::InitializeSwapChainBuffers() { swap_chain_back_buffer_index_ = swap_chain_->GetCurrentBackBufferIndex(); // Create RTV descriptors for the swap chain buffers. - auto device = GetD3D12Provider().GetDevice(); + ID3D12Device* device = GetD3D12Provider().GetDevice(); D3D12_RENDER_TARGET_VIEW_DESC rtv_desc; rtv_desc.Format = kSwapChainFormat; rtv_desc.ViewDimension = D3D12_RTV_DIMENSION_TEXTURE2D; rtv_desc.Texture2D.MipSlice = 0; rtv_desc.Texture2D.PlaneSlice = 0; for (uint32_t i = 0; i < kSwapChainBufferCount; ++i) { - device->CreateRenderTargetView(swap_chain_buffers_[i], &rtv_desc, + device->CreateRenderTargetView(swap_chain_buffers_[i].Get(), &rtv_desc, GetSwapChainBufferRTV(i)); } @@ -179,34 +217,23 @@ void D3D12Context::Shutdown() { immediate_drawer_.reset(); - util::ReleaseAndNull(swap_command_list_); + dcomp_visual_.Reset(); + dcomp_target_.Reset(); + dcomp_device_.Reset(); + + swap_command_list_.Reset(); for (uint32_t i = 0; i < kSwapCommandAllocatorCount; ++i) { - auto& swap_command_allocator = swap_command_allocators_[i]; - if (!swap_command_allocator) { - break; - } - swap_command_allocator->Release(); - swap_command_allocator = nullptr; + swap_command_allocators_[i].Reset(); } - if (swap_chain_) { - for (uint32_t i = 0; i < kSwapChainBufferCount; ++i) { - auto& swap_chain_buffer = swap_chain_buffers_[i]; - if (!swap_chain_buffer) { - break; - } - swap_chain_buffer->Release(); - swap_chain_buffer = nullptr; - } - - util::ReleaseAndNull(swap_chain_rtv_heap_); - - swap_chain_->Release(); - swap_chain_ = nullptr; + for (uint32_t i = 0; i < kSwapChainBufferCount; ++i) { + swap_chain_buffers_[i].Reset(); } + swap_chain_rtv_heap_.Reset(); + swap_chain_.Reset(); // First release the fence since it may reference the event. - util::ReleaseAndNull(swap_fence_); + swap_fence_.Reset(); if (swap_fence_completion_event_) { CloseHandle(swap_fence_completion_event_); swap_fence_completion_event_ = nullptr; @@ -243,8 +270,7 @@ bool D3D12Context::BeginSwap() { } // All buffer references must be released before resizing. for (uint32_t i = 0; i < kSwapChainBufferCount; ++i) { - swap_chain_buffers_[i]->Release(); - swap_chain_buffers_[i] = nullptr; + swap_chain_buffers_[i].Reset(); } if (FAILED(swap_chain_->ResizeBuffers( kSwapChainBufferCount, target_window_width, target_window_height, @@ -276,7 +302,8 @@ bool D3D12Context::BeginSwap() { uint32_t command_allocator_index = uint32_t((swap_fence_current_value_ + (kSwapCommandAllocatorCount - 1)) % kSwapCommandAllocatorCount); - auto command_allocator = swap_command_allocators_[command_allocator_index]; + ID3D12CommandAllocator* command_allocator = + swap_command_allocators_[command_allocator_index].Get(); command_allocator->Reset(); swap_command_list_->Reset(command_allocator, nullptr); @@ -285,7 +312,7 @@ bool D3D12Context::BeginSwap() { barrier.Type = D3D12_RESOURCE_BARRIER_TYPE_TRANSITION; barrier.Flags = D3D12_RESOURCE_BARRIER_FLAG_NONE; barrier.Transition.pResource = - swap_chain_buffers_[swap_chain_back_buffer_index_]; + swap_chain_buffers_[swap_chain_back_buffer_index_].Get(); barrier.Transition.Subresource = D3D12_RESOURCE_BARRIER_ALL_SUBRESOURCES; barrier.Transition.StateBefore = D3D12_RESOURCE_STATE_PRESENT; barrier.Transition.StateAfter = D3D12_RESOURCE_STATE_RENDER_TARGET; @@ -305,14 +332,14 @@ void D3D12Context::EndSwap() { return; } - auto direct_queue = GetD3D12Provider().GetDirectQueue(); + ID3D12CommandQueue* direct_queue = GetD3D12Provider().GetDirectQueue(); // Switch the back buffer to presentation state. D3D12_RESOURCE_BARRIER barrier; barrier.Type = D3D12_RESOURCE_BARRIER_TYPE_TRANSITION; barrier.Flags = D3D12_RESOURCE_BARRIER_FLAG_NONE; barrier.Transition.pResource = - swap_chain_buffers_[swap_chain_back_buffer_index_]; + swap_chain_buffers_[swap_chain_back_buffer_index_].Get(); barrier.Transition.Subresource = D3D12_RESOURCE_BARRIER_ALL_SUBRESOURCES; barrier.Transition.StateBefore = D3D12_RESOURCE_STATE_RENDER_TARGET; barrier.Transition.StateAfter = D3D12_RESOURCE_STATE_PRESENT; @@ -320,7 +347,7 @@ void D3D12Context::EndSwap() { // Submit the command list. swap_command_list_->Close(); - ID3D12CommandList* execute_command_lists[] = {swap_command_list_}; + ID3D12CommandList* execute_command_lists[] = {swap_command_list_.Get()}; direct_queue->ExecuteCommandLists(1, execute_command_lists); // Present and check if the context was lost. @@ -330,7 +357,7 @@ void D3D12Context::EndSwap() { } // Signal the fence to wait for frame resources to become free again. - direct_queue->Signal(swap_fence_, swap_fence_current_value_++); + direct_queue->Signal(swap_fence_.Get(), swap_fence_current_value_++); // Get the back buffer index for the next frame. swap_chain_back_buffer_index_ = swap_chain_->GetCurrentBackBufferIndex(); diff --git a/src/xenia/ui/d3d12/d3d12_context.h b/src/xenia/ui/d3d12/d3d12_context.h index b9bcb11c5..308d3aa6f 100644 --- a/src/xenia/ui/d3d12/d3d12_context.h +++ b/src/xenia/ui/d3d12/d3d12_context.h @@ -40,7 +40,7 @@ class D3D12Context : public GraphicsContext { // The format used by DWM. static constexpr DXGI_FORMAT kSwapChainFormat = DXGI_FORMAT_B8G8R8A8_UNORM; ID3D12Resource* GetSwapChainBuffer(uint32_t buffer_index) const { - return swap_chain_buffers_[buffer_index]; + return swap_chain_buffers_[buffer_index].Get(); } uint32_t GetSwapChainBackBufferIndex() const { return swap_chain_back_buffer_index_; @@ -62,7 +62,7 @@ class D3D12Context : public GraphicsContext { return swap_fence_completed_value_; } ID3D12GraphicsCommandList* GetSwapCommandList() const { - return swap_command_list_; + return swap_command_list_.Get(); } private: @@ -77,25 +77,30 @@ class D3D12Context : public GraphicsContext { bool context_lost_ = false; static constexpr uint32_t kSwapChainBufferCount = 3; - IDXGISwapChain3* swap_chain_ = nullptr; + Microsoft::WRL::ComPtr swap_chain_; uint32_t swap_chain_width_ = 0, swap_chain_height_ = 0; - ID3D12Resource* swap_chain_buffers_[kSwapChainBufferCount] = {}; + Microsoft::WRL::ComPtr + swap_chain_buffers_[kSwapChainBufferCount]; uint32_t swap_chain_back_buffer_index_ = 0; - ID3D12DescriptorHeap* swap_chain_rtv_heap_ = nullptr; + Microsoft::WRL::ComPtr swap_chain_rtv_heap_; D3D12_CPU_DESCRIPTOR_HANDLE swap_chain_rtv_heap_start_; uint64_t swap_fence_current_value_ = 1; uint64_t swap_fence_completed_value_ = 0; HANDLE swap_fence_completion_event_ = nullptr; - ID3D12Fence* swap_fence_ = nullptr; + Microsoft::WRL::ComPtr swap_fence_; static constexpr uint32_t kSwapCommandAllocatorCount = 3; - ID3D12CommandAllocator* swap_command_allocators_[kSwapCommandAllocatorCount] = - {}; + Microsoft::WRL::ComPtr + swap_command_allocators_[kSwapCommandAllocatorCount]; // Current command allocator is: // ((swap_fence_current_value_ + (kSwapCommandAllocatorCount - 1))) % // kSwapCommandAllocatorCount. - ID3D12GraphicsCommandList* swap_command_list_ = nullptr; + Microsoft::WRL::ComPtr swap_command_list_; + + Microsoft::WRL::ComPtr dcomp_device_; + Microsoft::WRL::ComPtr dcomp_target_; + Microsoft::WRL::ComPtr dcomp_visual_; std::unique_ptr immediate_drawer_; }; diff --git a/src/xenia/ui/d3d12/d3d12_immediate_drawer.cc b/src/xenia/ui/d3d12/d3d12_immediate_drawer.cc index 5c0a104e5..5cd6b551c 100644 --- a/src/xenia/ui/d3d12/d3d12_immediate_drawer.cc +++ b/src/xenia/ui/d3d12/d3d12_immediate_drawer.cc @@ -24,9 +24,11 @@ namespace xe { namespace ui { namespace d3d12 { -// Generated with `xb buildhlsl`. -#include "xenia/ui/d3d12/shaders/dxbc/immediate_ps.h" -#include "xenia/ui/d3d12/shaders/dxbc/immediate_vs.h" +// Generated with `xb buildshaders`. +namespace shaders { +#include "xenia/ui/shaders/bytecode/d3d12_5_1/immediate_ps.h" +#include "xenia/ui/shaders/bytecode/d3d12_5_1/immediate_vs.h" +} // namespace shaders D3D12ImmediateDrawer::D3D12ImmediateTexture::D3D12ImmediateTexture( uint32_t width, uint32_t height, ID3D12Resource* resource, @@ -121,10 +123,10 @@ bool D3D12ImmediateDrawer::Initialize() { // Create the pipelines. D3D12_GRAPHICS_PIPELINE_STATE_DESC pipeline_desc = {}; pipeline_desc.pRootSignature = root_signature_; - pipeline_desc.VS.pShaderBytecode = immediate_vs; - pipeline_desc.VS.BytecodeLength = sizeof(immediate_vs); - pipeline_desc.PS.pShaderBytecode = immediate_ps; - pipeline_desc.PS.BytecodeLength = sizeof(immediate_ps); + pipeline_desc.VS.pShaderBytecode = shaders::immediate_vs; + pipeline_desc.VS.BytecodeLength = sizeof(shaders::immediate_vs); + pipeline_desc.PS.pShaderBytecode = shaders::immediate_ps; + pipeline_desc.PS.BytecodeLength = sizeof(shaders::immediate_ps); D3D12_RENDER_TARGET_BLEND_DESC& pipeline_blend_desc = pipeline_desc.BlendState.RenderTarget[0]; pipeline_blend_desc.BlendEnable = TRUE; diff --git a/src/xenia/ui/d3d12/d3d12_provider.cc b/src/xenia/ui/d3d12/d3d12_provider.cc index ab038bbfa..9560cfa97 100644 --- a/src/xenia/ui/d3d12/d3d12_provider.cc +++ b/src/xenia/ui/d3d12/d3d12_provider.cc @@ -89,6 +89,9 @@ D3D12Provider::~D3D12Provider() { if (library_d3dcompiler_ != nullptr) { FreeLibrary(library_d3dcompiler_); } + if (library_dcomp_ != nullptr) { + FreeLibrary(library_dcomp_); + } if (library_d3d12_ != nullptr) { FreeLibrary(library_d3d12_); } @@ -120,8 +123,9 @@ bool D3D12Provider::Initialize() { // Load the core libraries. library_dxgi_ = LoadLibraryW(L"dxgi.dll"); library_d3d12_ = LoadLibraryW(L"D3D12.dll"); - if (library_dxgi_ == nullptr || library_d3d12_ == nullptr) { - XELOGE("Failed to load dxgi.dll or D3D12.dll"); + library_dcomp_ = LoadLibraryW(L"dcomp.dll"); + if (!library_dxgi_ || !library_d3d12_ || !library_dcomp_) { + XELOGE("Failed to load dxgi.dll, D3D12.dll or dcomp.dll"); return false; } bool libraries_loaded = true; @@ -142,8 +146,12 @@ bool D3D12Provider::Initialize() { (pfn_d3d12_serialize_root_signature_ = PFN_D3D12_SERIALIZE_ROOT_SIGNATURE( GetProcAddress(library_d3d12_, "D3D12SerializeRootSignature"))) != nullptr; + libraries_loaded &= + (pfn_dcomposition_create_device_ = PFNDCompositionCreateDevice( + GetProcAddress(library_dcomp_, "DCompositionCreateDevice"))) != + nullptr; if (!libraries_loaded) { - XELOGE("Failed to get DXGI or Direct3D 12 functions"); + XELOGE("Failed to get DXGI, Direct3D 12 or DirectComposition functions"); return false; } @@ -154,12 +162,12 @@ bool D3D12Provider::Initialize() { pfn_d3d_disassemble_ = pD3DDisassemble(GetProcAddress(library_d3dcompiler_, "D3DDisassemble")); if (pfn_d3d_disassemble_ == nullptr) { - XELOGW( + XELOGD( "Failed to get D3DDisassemble from D3DCompiler_47.dll, DXBC " "disassembly for debugging will be unavailable"); } } else { - XELOGW( + XELOGD( "Failed to load D3DCompiler_47.dll, DXBC disassembly for debugging " "will be unavailable"); } @@ -171,12 +179,12 @@ bool D3D12Provider::Initialize() { pfn_dxilconv_dxc_create_instance_ = DxcCreateInstanceProc( GetProcAddress(library_dxilconv_, "DxcCreateInstance")); if (pfn_dxilconv_dxc_create_instance_ == nullptr) { - XELOGW( + XELOGD( "Failed to get DxcCreateInstance from dxilconv.dll, converted DXIL " "disassembly for debugging will be unavailable"); } } else { - XELOGW( + XELOGD( "Failed to load dxilconv.dll, converted DXIL disassembly for debugging " "will be unavailable - DXIL may be unsupported by your OS version"); } @@ -188,12 +196,12 @@ bool D3D12Provider::Initialize() { pfn_dxcompiler_dxc_create_instance_ = DxcCreateInstanceProc( GetProcAddress(library_dxcompiler_, "DxcCreateInstance")); if (pfn_dxcompiler_dxc_create_instance_ == nullptr) { - XELOGW( + XELOGD( "Failed to get DxcCreateInstance from dxcompiler.dll, converted DXIL " "disassembly for debugging will be unavailable"); } } else { - XELOGW( + XELOGD( "Failed to load dxcompiler.dll, converted DXIL disassembly for " "debugging will be unavailable - if needed, download the DirectX " "Shader Compiler from " @@ -359,7 +367,7 @@ bool D3D12Provider::Initialize() { if (cvars::d3d12_queue_priority >= 2) { queue_desc.Priority = D3D12_COMMAND_QUEUE_PRIORITY_GLOBAL_REALTIME; if (!EnableIncreaseBasePriorityPrivilege()) { - XELOGD3D( + XELOGW( "Failed to enable SeIncreaseBasePriorityPrivilege for global " "realtime Direct3D 12 command queue priority, falling back to high " "priority, try launching Xenia as administrator"); @@ -377,7 +385,7 @@ bool D3D12Provider::Initialize() { IID_PPV_ARGS(&direct_queue)))) { bool queue_created = false; if (queue_desc.Priority == D3D12_COMMAND_QUEUE_PRIORITY_GLOBAL_REALTIME) { - XELOGD3D( + XELOGW( "Failed to create a Direct3D 12 direct command queue with global " "realtime priority, falling back to high priority, try launching " "Xenia as administrator"); diff --git a/src/xenia/ui/d3d12/d3d12_provider.h b/src/xenia/ui/d3d12/d3d12_provider.h index 089712b78..25c159dcd 100644 --- a/src/xenia/ui/d3d12/d3d12_provider.h +++ b/src/xenia/ui/d3d12/d3d12_provider.h @@ -110,7 +110,7 @@ class D3D12Provider : public GraphicsProvider { return virtual_address_bits_per_resource_; } - // Proxies for Direct3D 12 functions since they are loaded dynamically. + // Proxies for DirectX functions since they are loaded dynamically. HRESULT SerializeRootSignature(const D3D12_ROOT_SIGNATURE_DESC* desc, D3D_ROOT_SIGNATURE_VERSION version, ID3DBlob** blob_out, @@ -118,6 +118,11 @@ class D3D12Provider : public GraphicsProvider { return pfn_d3d12_serialize_root_signature_(desc, version, blob_out, error_blob_out); } + HRESULT CreateDCompositionDevice(IDXGIDevice* dxgi_device, const IID& iid, + void** dcomposition_device_out) const { + return pfn_dcomposition_create_device_(dxgi_device, iid, + dcomposition_device_out); + } HRESULT Disassemble(const void* src_data, size_t src_data_size, UINT flags, const char* comments, ID3DBlob** disassembly_out) const { if (!pfn_d3d_disassemble_) { @@ -151,6 +156,9 @@ class D3D12Provider : public GraphicsProvider { _COM_Outptr_ void** ppFactory); typedef HRESULT(WINAPI* PFNDXGIGetDebugInterface1)( UINT Flags, REFIID riid, _COM_Outptr_ void** pDebug); + typedef HRESULT(WINAPI* PFNDCompositionCreateDevice)( + _In_opt_ IDXGIDevice* dxgiDevice, _In_ REFIID iid, + _Outptr_ void** dcompositionDevice); HMODULE library_dxgi_ = nullptr; PFNCreateDXGIFactory2 pfn_create_dxgi_factory2_; @@ -161,6 +169,9 @@ class D3D12Provider : public GraphicsProvider { PFN_D3D12_CREATE_DEVICE pfn_d3d12_create_device_; PFN_D3D12_SERIALIZE_ROOT_SIGNATURE pfn_d3d12_serialize_root_signature_; + HMODULE library_dcomp_ = nullptr; + PFNDCompositionCreateDevice pfn_dcomposition_create_device_; + HMODULE library_d3dcompiler_ = nullptr; pD3DDisassemble pfn_d3d_disassemble_ = nullptr; diff --git a/src/xenia/ui/d3d12/premake5.lua b/src/xenia/ui/d3d12/premake5.lua index f301a94d2..1615ee611 100644 --- a/src/xenia/ui/d3d12/premake5.lua +++ b/src/xenia/ui/d3d12/premake5.lua @@ -12,7 +12,7 @@ project("xenia-ui-d3d12") }) local_platform_files() files({ - "shaders/bin/*.h", + "../shaders/bytecode/d3d12_5_1/*.h", }) group("demos") diff --git a/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.cso b/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.cso deleted file mode 100644 index 691d686b9..000000000 Binary files a/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.cso and /dev/null differ diff --git a/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.h b/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.h deleted file mode 100644 index 0dba2b889..000000000 --- a/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.h +++ /dev/null @@ -1,68 +0,0 @@ -// generated from `xb buildhlsl` -// source: immediate.ps.hlsl -const uint8_t immediate_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0xDA, 0xC8, 0x6C, 0xC4, 0x3A, 0x1C, 0x46, 0xE2, - 0x62, 0x89, 0x59, 0xC7, 0xDA, 0x3A, 0x9B, 0xAC, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x03, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x1C, 0x01, 0x00, 0x00, 0x68, 0x01, 0x00, 0x00, 0x9C, 0x01, 0x00, 0x00, - 0x64, 0x02, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xE0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFF, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0xB6, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA1, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x69, - 0x6D, 0x6D, 0x65, 0x64, 0x69, 0x61, 0x74, 0x65, 0x5F, 0x73, 0x61, 0x6D, - 0x70, 0x6C, 0x65, 0x72, 0x00, 0x78, 0x65, 0x5F, 0x69, 0x6D, 0x6D, 0x65, - 0x64, 0x69, 0x61, 0x74, 0x65, 0x5F, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, - 0x65, 0x00, 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, - 0x28, 0x52, 0x29, 0x20, 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0x00, 0x00, - 0x51, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, - 0x5A, 0x00, 0x00, 0x06, 0x46, 0x6E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x58, 0x18, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x62, 0x10, 0x00, 0x03, 0x32, 0x10, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x62, 0x10, 0x00, 0x03, 0xF2, 0x10, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x03, 0xF2, 0x20, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, - 0x48, 0x00, 0x00, 0x0D, 0xF2, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x7E, 0x20, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x20, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x07, 0xF2, 0x20, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x1E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, - 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.txt b/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.txt deleted file mode 100644 index f32850272..000000000 --- a/src/xenia/ui/d3d12/shaders/dxbc/immediate_ps.txt +++ /dev/null @@ -1,39 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_immediate_sampler sampler NA NA S0 s0 1 -// xe_immediate_texture texture float4 2d T0 t0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xy 0 NONE float xy -// TEXCOORD 1 xyzw 1 NONE float xyzw -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// SV_Target 0 xyzw 0 TARGET float xyzw -// -ps_5_1 -dcl_globalFlags refactoringAllowed -dcl_sampler S0[0:0], mode_default, space=0 -dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 -dcl_input_ps linear v0.xy -dcl_input_ps linear v1.xyzw -dcl_output o0.xyzw -dcl_temps 1 -sample_l r0.xyzw, v0.xyxx, T0[0].xyzw, S0[0], l(0.000000) -mul o0.xyzw, r0.xyzw, v1.xyzw -ret -// Approximately 3 instruction slots used diff --git a/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.cso b/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.cso deleted file mode 100644 index 80424158c..000000000 Binary files a/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.cso and /dev/null differ diff --git a/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.h b/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.h deleted file mode 100644 index cba670479..000000000 --- a/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.h +++ /dev/null @@ -1,91 +0,0 @@ -// generated from `xb buildhlsl` -// source: immediate.vs.hlsl -const uint8_t immediate_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0x72, 0x14, 0x64, 0xA2, 0xD5, 0x3D, 0x4B, 0x94, - 0xC5, 0xDD, 0x32, 0xBA, 0xB5, 0xC9, 0x90, 0x20, 0x01, 0x00, 0x00, 0x00, - 0x10, 0x04, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x64, 0x01, 0x00, 0x00, 0xD4, 0x01, 0x00, 0x00, 0x44, 0x02, 0x00, 0x00, - 0x74, 0x03, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x28, 0x01, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x00, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x58, 0x65, 0x49, 0x6D, 0x6D, 0x65, 0x64, 0x69, - 0x61, 0x74, 0x65, 0x56, 0x65, 0x72, 0x74, 0x65, 0x78, 0x43, 0x6F, 0x6E, - 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0x64, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x98, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x78, 0x65, 0x5F, 0x76, 0x69, 0x65, 0x77, 0x70, 0x6F, 0x72, 0x74, 0x5F, - 0x73, 0x69, 0x7A, 0x65, 0x5F, 0x69, 0x6E, 0x76, 0x00, 0x66, 0x6C, 0x6F, - 0x61, 0x74, 0x32, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xD5, 0x00, 0x00, 0x00, 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, - 0x74, 0x20, 0x28, 0x52, 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, - 0x68, 0x61, 0x64, 0x65, 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, - 0x65, 0x72, 0x20, 0x31, 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, - 0x68, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, - 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, - 0x62, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, - 0x50, 0x4F, 0x53, 0x49, 0x54, 0x49, 0x4F, 0x4E, 0x00, 0x54, 0x45, 0x58, - 0x43, 0x4F, 0x4F, 0x52, 0x44, 0x00, 0x43, 0x4F, 0x4C, 0x4F, 0x52, 0x00, - 0x4F, 0x53, 0x47, 0x4E, 0x68, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x0C, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x0F, 0x00, 0x00, 0x00, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x0F, 0x00, 0x00, 0x00, 0x54, 0x45, 0x58, 0x43, 0x4F, 0x4F, 0x52, 0x44, - 0x00, 0x53, 0x56, 0x5F, 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, - 0x00, 0xAB, 0xAB, 0xAB, 0x53, 0x48, 0x45, 0x58, 0x28, 0x01, 0x00, 0x00, - 0x51, 0x00, 0x01, 0x00, 0x4A, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, - 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x03, 0x32, 0x10, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x03, 0x32, 0x10, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x03, 0xF2, 0x10, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x03, 0x32, 0x20, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x03, 0xF2, 0x20, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x04, 0xF2, 0x20, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, - 0x01, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x09, 0x32, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, 0x32, 0x20, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0xC0, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xF2, 0x20, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x46, 0x1E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x08, 0xC2, 0x20, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x36, 0x00, 0x00, 0x05, - 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x10, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.txt b/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.txt deleted file mode 100644 index 1f61459e4..000000000 --- a/src/xenia/ui/d3d12/shaders/dxbc/immediate_vs.txt +++ /dev/null @@ -1,56 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeImmediateVertexConstants -// { -// -// float2 xe_viewport_size_inv; // Offset: 0 Size: 8 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// XeImmediateVertexConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// POSITION 0 xy 0 NONE float xy -// TEXCOORD 0 xy 1 NONE float xy -// COLOR 0 xyzw 2 NONE float xyzw -// -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xy 0 NONE float xy -// TEXCOORD 1 xyzw 1 NONE float xyzw -// SV_Position 0 xyzw 2 POS float xyzw -// -vs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 -dcl_input v0.xy -dcl_input v1.xy -dcl_input v2.xyzw -dcl_output o0.xy -dcl_output o1.xyzw -dcl_output_siv o2.xyzw, position -dcl_temps 1 -mul r0.xy, v0.xyxx, CB0[0][0].xyxx -mad o2.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000) -mov o1.xyzw, v2.xyzw -mov o2.zw, l(0,0,0,1.000000) -mov o0.xy, v1.xyxx -ret -// Approximately 6 instruction slots used diff --git a/src/xenia/ui/imgui_drawer.cc b/src/xenia/ui/imgui_drawer.cc index 158c9248a..276cea114 100644 --- a/src/xenia/ui/imgui_drawer.cc +++ b/src/xenia/ui/imgui_drawer.cc @@ -12,6 +12,7 @@ #include "third_party/imgui/imgui.h" #include "xenia/base/assert.h" #include "xenia/base/logging.h" +#include "xenia/base/math.h" #include "xenia/ui/window.h" namespace xe { @@ -107,23 +108,23 @@ void ImGuiDrawer::Initialize() { style.Colors[ImGuiCol_TextSelectedBg] = ImVec4(0.00f, 1.00f, 0.00f, 0.21f); style.Colors[ImGuiCol_ModalWindowDimBg] = ImVec4(0.20f, 0.20f, 0.20f, 0.35f); - io.KeyMap[ImGuiKey_Tab] = 0x09; // VK_TAB; - io.KeyMap[ImGuiKey_LeftArrow] = 0x25; - io.KeyMap[ImGuiKey_RightArrow] = 0x27; - io.KeyMap[ImGuiKey_UpArrow] = 0x26; - io.KeyMap[ImGuiKey_DownArrow] = 0x28; - io.KeyMap[ImGuiKey_Home] = 0x24; - io.KeyMap[ImGuiKey_End] = 0x23; - io.KeyMap[ImGuiKey_Delete] = 0x2E; - io.KeyMap[ImGuiKey_Backspace] = 0x08; - io.KeyMap[ImGuiKey_Enter] = 0x0D; - io.KeyMap[ImGuiKey_Escape] = 0x1B; - io.KeyMap[ImGuiKey_A] = 'A'; - io.KeyMap[ImGuiKey_C] = 'C'; - io.KeyMap[ImGuiKey_V] = 'V'; - io.KeyMap[ImGuiKey_X] = 'X'; - io.KeyMap[ImGuiKey_Y] = 'Y'; - io.KeyMap[ImGuiKey_Z] = 'Z'; + io.KeyMap[ImGuiKey_Tab] = int(ui::VirtualKey::kTab); + io.KeyMap[ImGuiKey_LeftArrow] = int(ui::VirtualKey::kLeft); + io.KeyMap[ImGuiKey_RightArrow] = int(ui::VirtualKey::kRight); + io.KeyMap[ImGuiKey_UpArrow] = int(ui::VirtualKey::kUp); + io.KeyMap[ImGuiKey_DownArrow] = int(ui::VirtualKey::kDown); + io.KeyMap[ImGuiKey_Home] = int(ui::VirtualKey::kHome); + io.KeyMap[ImGuiKey_End] = int(ui::VirtualKey::kEnd); + io.KeyMap[ImGuiKey_Delete] = int(ui::VirtualKey::kDelete); + io.KeyMap[ImGuiKey_Backspace] = int(ui::VirtualKey::kBack); + io.KeyMap[ImGuiKey_Enter] = int(ui::VirtualKey::kReturn); + io.KeyMap[ImGuiKey_Escape] = int(ui::VirtualKey::kEscape); + io.KeyMap[ImGuiKey_A] = int(ui::VirtualKey::kA); + io.KeyMap[ImGuiKey_C] = int(ui::VirtualKey::kC); + io.KeyMap[ImGuiKey_V] = int(ui::VirtualKey::kV); + io.KeyMap[ImGuiKey_X] = int(ui::VirtualKey::kX); + io.KeyMap[ImGuiKey_Y] = int(ui::VirtualKey::kY); + io.KeyMap[ImGuiKey_Z] = int(ui::VirtualKey::kZ); } void ImGuiDrawer::SetupFont() { @@ -228,36 +229,16 @@ void ImGuiDrawer::RenderDrawLists() { } } -void ImGuiDrawer::OnKeyDown(KeyEvent* e) { - auto& io = GetIO(); - io.KeysDown[e->key_code()] = true; - switch (e->key_code()) { - case 16: { - io.KeyShift = true; - } break; - case 17: { - io.KeyCtrl = true; - } break; - } -} +void ImGuiDrawer::OnKeyDown(KeyEvent* e) { OnKey(e, true); } -void ImGuiDrawer::OnKeyUp(KeyEvent* e) { - auto& io = GetIO(); - io.KeysDown[e->key_code()] = false; - switch (e->key_code()) { - case 16: { - io.KeyShift = false; - } break; - case 17: { - io.KeyCtrl = false; - } break; - } -} +void ImGuiDrawer::OnKeyUp(KeyEvent* e) { OnKey(e, false); } void ImGuiDrawer::OnKeyChar(KeyEvent* e) { auto& io = GetIO(); - if (e->key_code() > 0 && e->key_code() < 0x10000) { - io.AddInputCharacter(e->key_code()); + // TODO(Triang3l): Accept the Unicode character. + unsigned int character = static_cast(e->virtual_key()); + if (character > 0 && character < 0x10000) { + io.AddInputCharacter(character); e->set_handled(true); } } @@ -327,5 +308,30 @@ void ImGuiDrawer::OnMouseWheel(MouseEvent* e) { io.MouseWheel += float(e->dy() / 120.0f); } +void ImGuiDrawer::OnKey(KeyEvent* e, bool is_down) { + auto& io = GetIO(); + VirtualKey virtual_key = e->virtual_key(); + if (size_t(virtual_key) < xe::countof(io.KeysDown)) { + io.KeysDown[size_t(virtual_key)] = is_down; + } + switch (virtual_key) { + case VirtualKey::kShift: + io.KeyShift = is_down; + break; + case VirtualKey::kControl: + io.KeyCtrl = is_down; + break; + case VirtualKey::kMenu: + // FIXME(Triang3l): Doesn't work in xenia-ui-window-demo. + io.KeyAlt = is_down; + break; + case VirtualKey::kLWin: + io.KeySuper = is_down; + break; + default: + break; + } +} + } // namespace ui } // namespace xe diff --git a/src/xenia/ui/imgui_drawer.h b/src/xenia/ui/imgui_drawer.h index 7163e7a1a..2c370b2aa 100644 --- a/src/xenia/ui/imgui_drawer.h +++ b/src/xenia/ui/imgui_drawer.h @@ -57,6 +57,9 @@ class ImGuiDrawer : public WindowListener { ImGuiContext* internal_state_ = nullptr; std::unique_ptr font_texture_; + + private: + void OnKey(KeyEvent* e, bool is_down); }; } // namespace ui diff --git a/src/xenia/ui/shaders/bytecode/.clang-format b/src/xenia/ui/shaders/bytecode/.clang-format new file mode 100644 index 000000000..e3845288a --- /dev/null +++ b/src/xenia/ui/shaders/bytecode/.clang-format @@ -0,0 +1 @@ +DisableFormat: true diff --git a/src/xenia/ui/shaders/bytecode/d3d12_5_1/immediate_ps.h b/src/xenia/ui/shaders/bytecode/d3d12_5_1/immediate_ps.h new file mode 100644 index 000000000..6a0bd31ac --- /dev/null +++ b/src/xenia/ui/shaders/bytecode/d3d12_5_1/immediate_ps.h @@ -0,0 +1,173 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_immediate_sampler sampler NA NA S0 s0 1 +// xe_immediate_texture texture float4 2d T0 t0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xy 0 NONE float xy +// TEXCOORD 1 xyzw 1 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xyzw 0 TARGET float xyzw +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_sampler S0[0:0], mode_default, space=0 +dcl_resource_texture2d (float,float,float,float) T0[0:0], space=0 +dcl_input_ps linear v0.xy +dcl_input_ps linear v1.xyzw +dcl_output o0.xyzw +dcl_temps 1 +sample_l r0.xyzw, v0.xyxx, T0[0].xyzw, S0[0], l(0.000000) +mul o0.xyzw, r0.xyzw, v1.xyzw +ret +// Approximately 3 instruction slots used +#endif + +const BYTE immediate_ps[] = +{ + 68, 88, 66, 67, 204, 46, + 131, 39, 62, 129, 239, 95, + 188, 170, 211, 224, 226, 155, + 212, 68, 1, 0, 0, 0, + 0, 3, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 28, 1, 0, 0, 104, 1, + 0, 0, 156, 1, 0, 0, + 100, 2, 0, 0, 82, 68, + 69, 70, 224, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 255, 255, 0, 5, 4, 0, + 182, 0, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 140, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 161, 0, + 0, 0, 2, 0, 0, 0, + 5, 0, 0, 0, 4, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 1, 0, + 0, 0, 12, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 120, 101, 95, 105, + 109, 109, 101, 100, 105, 97, + 116, 101, 95, 115, 97, 109, + 112, 108, 101, 114, 0, 120, + 101, 95, 105, 109, 109, 101, + 100, 105, 97, 116, 101, 95, + 116, 101, 120, 116, 117, 114, + 101, 0, 77, 105, 99, 114, + 111, 115, 111, 102, 116, 32, + 40, 82, 41, 32, 72, 76, + 83, 76, 32, 83, 104, 97, + 100, 101, 114, 32, 67, 111, + 109, 112, 105, 108, 101, 114, + 32, 49, 48, 46, 49, 0, + 171, 171, 73, 83, 71, 78, + 68, 0, 0, 0, 2, 0, + 0, 0, 8, 0, 0, 0, + 56, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 3, 0, 0, + 56, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 0, 15, 15, 0, 0, + 84, 69, 88, 67, 79, 79, + 82, 68, 0, 171, 171, 171, + 79, 83, 71, 78, 44, 0, + 0, 0, 1, 0, 0, 0, + 8, 0, 0, 0, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 15, 0, 0, 0, 83, 86, + 95, 84, 97, 114, 103, 101, + 116, 0, 171, 171, 83, 72, + 69, 88, 192, 0, 0, 0, + 81, 0, 0, 0, 48, 0, + 0, 0, 106, 8, 0, 1, + 90, 0, 0, 6, 70, 110, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 88, 24, 0, 7, 70, 126, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 85, 85, 0, 0, + 0, 0, 0, 0, 98, 16, + 0, 3, 50, 16, 16, 0, + 0, 0, 0, 0, 98, 16, + 0, 3, 242, 16, 16, 0, + 1, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 0, 0, 0, 0, 104, 0, + 0, 2, 1, 0, 0, 0, + 72, 0, 0, 13, 242, 0, + 16, 0, 0, 0, 0, 0, + 70, 16, 16, 0, 0, 0, + 0, 0, 70, 126, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 96, 32, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 64, 0, 0, + 0, 0, 0, 0, 56, 0, + 0, 7, 242, 32, 16, 0, + 0, 0, 0, 0, 70, 14, + 16, 0, 0, 0, 0, 0, + 70, 30, 16, 0, 1, 0, + 0, 0, 62, 0, 0, 1, + 83, 84, 65, 84, 148, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0 +}; diff --git a/src/xenia/ui/shaders/bytecode/d3d12_5_1/immediate_vs.h b/src/xenia/ui/shaders/bytecode/d3d12_5_1/immediate_vs.h new file mode 100644 index 000000000..03385fb28 --- /dev/null +++ b/src/xenia/ui/shaders/bytecode/d3d12_5_1/immediate_vs.h @@ -0,0 +1,236 @@ +#if 0 +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeImmediateVertexConstants +// { +// +// float2 xe_viewport_size_inv; // Offset: 0 Size: 8 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// XeImmediateVertexConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xy 0 NONE float xy +// TEXCOORD 0 xy 1 NONE float xy +// COLOR 0 xyzw 2 NONE float xyzw +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xy 0 NONE float xy +// TEXCOORD 1 xyzw 1 NONE float xyzw +// SV_Position 0 xyzw 2 POS float xyzw +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_input v0.xy +dcl_input v1.xy +dcl_input v2.xyzw +dcl_output o0.xy +dcl_output o1.xyzw +dcl_output_siv o2.xyzw, position +dcl_temps 1 +mul r0.xy, v0.xyxx, CB0[0][0].xyxx +mad o2.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000) +mov o1.xyzw, v2.xyzw +mov o2.zw, l(0,0,0,1.000000) +mov o0.xy, v1.xyxx +ret +// Approximately 6 instruction slots used +#endif + +const BYTE immediate_vs[] = +{ + 68, 88, 66, 67, 88, 56, + 35, 17, 155, 211, 230, 48, + 9, 16, 27, 220, 163, 42, + 194, 218, 1, 0, 0, 0, + 16, 4, 0, 0, 5, 0, + 0, 0, 52, 0, 0, 0, + 100, 1, 0, 0, 212, 1, + 0, 0, 68, 2, 0, 0, + 116, 3, 0, 0, 82, 68, + 69, 70, 40, 1, 0, 0, + 1, 0, 0, 0, 128, 0, + 0, 0, 1, 0, 0, 0, + 60, 0, 0, 0, 1, 5, + 254, 255, 0, 5, 4, 0, + 0, 1, 0, 0, 19, 19, + 68, 37, 60, 0, 0, 0, + 24, 0, 0, 0, 40, 0, + 0, 0, 40, 0, 0, 0, + 36, 0, 0, 0, 12, 0, + 0, 0, 0, 0, 0, 0, + 100, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 1, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 88, 101, + 73, 109, 109, 101, 100, 105, + 97, 116, 101, 86, 101, 114, + 116, 101, 120, 67, 111, 110, + 115, 116, 97, 110, 116, 115, + 0, 171, 100, 0, 0, 0, + 1, 0, 0, 0, 152, 0, + 0, 0, 16, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 192, 0, 0, 0, + 0, 0, 0, 0, 8, 0, + 0, 0, 2, 0, 0, 0, + 220, 0, 0, 0, 0, 0, + 0, 0, 255, 255, 255, 255, + 0, 0, 0, 0, 255, 255, + 255, 255, 0, 0, 0, 0, + 120, 101, 95, 118, 105, 101, + 119, 112, 111, 114, 116, 95, + 115, 105, 122, 101, 95, 105, + 110, 118, 0, 102, 108, 111, + 97, 116, 50, 0, 1, 0, + 3, 0, 1, 0, 2, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 213, 0, 0, 0, 77, 105, + 99, 114, 111, 115, 111, 102, + 116, 32, 40, 82, 41, 32, + 72, 76, 83, 76, 32, 83, + 104, 97, 100, 101, 114, 32, + 67, 111, 109, 112, 105, 108, + 101, 114, 32, 49, 48, 46, + 49, 0, 73, 83, 71, 78, + 104, 0, 0, 0, 3, 0, + 0, 0, 8, 0, 0, 0, + 80, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 0, 0, + 0, 0, 3, 3, 0, 0, + 89, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 1, 0, + 0, 0, 3, 3, 0, 0, + 98, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 3, 0, 0, 0, 2, 0, + 0, 0, 15, 15, 0, 0, + 80, 79, 83, 73, 84, 73, + 79, 78, 0, 84, 69, 88, + 67, 79, 79, 82, 68, 0, + 67, 79, 76, 79, 82, 0, + 79, 83, 71, 78, 104, 0, + 0, 0, 3, 0, 0, 0, + 8, 0, 0, 0, 80, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 0, 0, 0, 0, + 3, 12, 0, 0, 80, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 3, 0, + 0, 0, 1, 0, 0, 0, + 15, 0, 0, 0, 89, 0, + 0, 0, 0, 0, 0, 0, + 1, 0, 0, 0, 3, 0, + 0, 0, 2, 0, 0, 0, + 15, 0, 0, 0, 84, 69, + 88, 67, 79, 79, 82, 68, + 0, 83, 86, 95, 80, 111, + 115, 105, 116, 105, 111, 110, + 0, 171, 171, 171, 83, 72, + 69, 88, 40, 1, 0, 0, + 81, 0, 1, 0, 74, 0, + 0, 0, 106, 8, 0, 1, + 89, 0, 0, 7, 70, 142, + 48, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 95, 0, + 0, 3, 50, 16, 16, 0, + 0, 0, 0, 0, 95, 0, + 0, 3, 50, 16, 16, 0, + 1, 0, 0, 0, 95, 0, + 0, 3, 242, 16, 16, 0, + 2, 0, 0, 0, 101, 0, + 0, 3, 50, 32, 16, 0, + 0, 0, 0, 0, 101, 0, + 0, 3, 242, 32, 16, 0, + 1, 0, 0, 0, 103, 0, + 0, 4, 242, 32, 16, 0, + 2, 0, 0, 0, 1, 0, + 0, 0, 104, 0, 0, 2, + 1, 0, 0, 0, 56, 0, + 0, 9, 50, 0, 16, 0, + 0, 0, 0, 0, 70, 16, + 16, 0, 0, 0, 0, 0, + 70, 128, 48, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 50, 0, + 0, 15, 50, 32, 16, 0, + 2, 0, 0, 0, 70, 0, + 16, 0, 0, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 64, 0, 0, 0, 192, + 0, 0, 0, 0, 0, 0, + 0, 0, 2, 64, 0, 0, + 0, 0, 128, 191, 0, 0, + 128, 63, 0, 0, 0, 0, + 0, 0, 0, 0, 54, 0, + 0, 5, 242, 32, 16, 0, + 1, 0, 0, 0, 70, 30, + 16, 0, 2, 0, 0, 0, + 54, 0, 0, 8, 194, 32, + 16, 0, 2, 0, 0, 0, + 2, 64, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 128, 63, 54, 0, 0, 5, + 50, 32, 16, 0, 0, 0, + 0, 0, 70, 16, 16, 0, + 1, 0, 0, 0, 62, 0, + 0, 1, 83, 84, 65, 84, + 148, 0, 0, 0, 6, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 6, 0, + 0, 0, 2, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 1, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, + 0, 0 +}; diff --git a/src/xenia/ui/d3d12/shaders/immediate.ps.hlsl b/src/xenia/ui/shaders/immediate.ps.hlsl similarity index 100% rename from src/xenia/ui/d3d12/shaders/immediate.ps.hlsl rename to src/xenia/ui/shaders/immediate.ps.hlsl diff --git a/src/xenia/ui/d3d12/shaders/immediate.vs.hlsl b/src/xenia/ui/shaders/immediate.vs.hlsl similarity index 100% rename from src/xenia/ui/d3d12/shaders/immediate.vs.hlsl rename to src/xenia/ui/shaders/immediate.vs.hlsl diff --git a/src/xenia/ui/ui_event.h b/src/xenia/ui/ui_event.h index 9fd4734ba..993eda672 100644 --- a/src/xenia/ui/ui_event.h +++ b/src/xenia/ui/ui_event.h @@ -12,6 +12,8 @@ #include +#include "xenia/ui/virtual_key.h" + namespace xe { namespace ui { @@ -42,11 +44,12 @@ class FileDropEvent : public UIEvent { class KeyEvent : public UIEvent { public: - KeyEvent(Window* target, int key_code, int repeat_count, bool prev_state, - bool modifier_shift_pressed, bool modifier_ctrl_pressed, - bool modifier_alt_pressed, bool modifier_super_pressed) + KeyEvent(Window* target, VirtualKey virtual_key, int repeat_count, + bool prev_state, bool modifier_shift_pressed, + bool modifier_ctrl_pressed, bool modifier_alt_pressed, + bool modifier_super_pressed) : UIEvent(target), - key_code_(key_code), + virtual_key_(virtual_key), repeat_count_(repeat_count), prev_state_(prev_state), modifier_shift_pressed_(modifier_shift_pressed), @@ -58,7 +61,7 @@ class KeyEvent : public UIEvent { bool is_handled() const { return handled_; } void set_handled(bool value) { handled_ = value; } - int key_code() const { return key_code_; } + VirtualKey virtual_key() const { return virtual_key_; } int repeat_count() const { return repeat_count_; } bool prev_state() const { return prev_state_; } @@ -70,7 +73,7 @@ class KeyEvent : public UIEvent { private: bool handled_ = false; - int key_code_ = 0; + VirtualKey virtual_key_ = VirtualKey::kNone; int repeat_count_ = 0; bool prev_state_ = false; // Key previously down(true) or up(false) diff --git a/src/xenia/ui/virtual_key.h b/src/xenia/ui/virtual_key.h new file mode 100644 index 000000000..8bda0667a --- /dev/null +++ b/src/xenia/ui/virtual_key.h @@ -0,0 +1,362 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_UI_VIRTUAL_KEY_H_ +#define XENIA_UI_VIRTUAL_KEY_H_ + +#include + +namespace xe { +namespace ui { + +// Windows and Xbox 360 / XInput virtual key enumeration. +// This is what platform-specific keys should be translated to, for both HID +// keystroke emulation and Xenia-internal UI events. On Windows, the translation +// is a simple cast. +// This is uint16_t as it's WPARAM (which was 16-bit back in Win16 days, where +// virtual key codes were added), and XINPUT_KEYSTROKE stores the virtual key as +// a WORD. In some cases (see kPacket), bits above 16 may be used as well, but +// VK_ on Windows are defined up to 0xFF (0xFE not counting the reserved 0xFF) +// as of Windows SDK 10.0.19041.0, and XInput virtual key codes are 16-bit. +// Base virtual key codes as of _WIN32_WINNT 0x0500 (Windows 2000, which the +// Xbox 360's kernel is based on), virtual key codes added later are marked +// explicitly as such. +enum class VirtualKey : uint16_t { + // Not a valid key - MapVirtualKey returns zero when there is no translation. + kNone, + + kLButton = 0x01, + kRButton = 0x02, + kCancel = 0x03, // Control-break. + kMButton = 0x04, // Not contiguous with kLButton and kRButton. + + kXButton1 = 0x05, // Not contiguous with kLButton and kRButton. + kXButton2 = 0x06, // Not contiguous with kLButton and kRButton. + + kBack = 0x08, // Backspace. + kTab = 0x09, + + kClear = 0x0C, + kReturn = 0x0D, // Enter. + + kShift = 0x10, + kControl = 0x11, // Ctrl. + kMenu = 0x12, // Alt. + kPause = 0x13, + kCapital = 0x14, // Caps Lock. + + kKana = 0x15, + kHangeul = 0x15, // Old name. + kHangul = 0x15, + kImeOn = 0x16, + kJunja = 0x17, + kFinal = 0x18, + kHanja = 0x19, + kKanji = 0x19, + kImeOff = 0x1A, + + kEscape = 0x1B, + + kConvert = 0x1C, + kNonConvert = 0x1D, + kAccept = 0x1E, + kModeChange = 0x1F, + + kSpace = 0x20, + kPrior = 0x21, // Page Up. + kNext = 0x22, // Page Down. + kEnd = 0x23, + kHome = 0x24, + kLeft = 0x25, + kUp = 0x26, + kRight = 0x27, + kDown = 0x28, + kSelect = 0x29, + kPrint = 0x2A, + kExecute = 0x2B, + kSnapshot = 0x2C, + kInsert = 0x2D, + kDelete = 0x2E, + kHelp = 0x2F, + + // Same as ASCII '0' - '9'. + k0 = 0x30, + k1 = 0x31, + k2 = 0x32, + k3 = 0x33, + k4 = 0x34, + k5 = 0x35, + k6 = 0x36, + k7 = 0x37, + k8 = 0x38, + k9 = 0x39, + + // Same as ASCII 'A' - 'Z'. + kA = 0x41, + kB = 0x42, + kC = 0x43, + kD = 0x44, + kE = 0x45, + kF = 0x46, + kG = 0x47, + kH = 0x48, + kI = 0x49, + kJ = 0x4A, + kK = 0x4B, + kL = 0x4C, + kM = 0x4D, + kN = 0x4E, + kO = 0x4F, + kP = 0x50, + kQ = 0x51, + kR = 0x52, + kS = 0x53, + kT = 0x54, + kU = 0x55, + kV = 0x56, + kW = 0x57, + kX = 0x58, + kY = 0x59, + kZ = 0x5A, + + kLWin = 0x5B, + kRWin = 0x5C, + kApps = 0x5D, + + kSleep = 0x5F, + + kNumpad0 = 0x60, + kNumpad1 = 0x61, + kNumpad2 = 0x62, + kNumpad3 = 0x63, + kNumpad4 = 0x64, + kNumpad5 = 0x65, + kNumpad6 = 0x66, + kNumpad7 = 0x67, + kNumpad8 = 0x68, + kNumpad9 = 0x69, + kMultiply = 0x6A, + kAdd = 0x6B, + kSeparator = 0x6C, + kSubtract = 0x6D, + kDecimal = 0x6E, + kDivide = 0x6F, + kF1 = 0x70, + kF2 = 0x71, + kF3 = 0x72, + kF4 = 0x73, + kF5 = 0x74, + kF6 = 0x75, + kF7 = 0x76, + kF8 = 0x77, + kF9 = 0x78, + kF10 = 0x79, + kF11 = 0x7A, + kF12 = 0x7B, + kF13 = 0x7C, + kF14 = 0x7D, + kF15 = 0x7E, + kF16 = 0x7F, + kF17 = 0x80, + kF18 = 0x81, + kF19 = 0x82, + kF20 = 0x83, + kF21 = 0x84, + kF22 = 0x85, + kF23 = 0x86, + kF24 = 0x87, + + // VK_NAVIGATION_* added in _WIN32_WINNT 0x0604, but marked as reserved in + // WinUser.h and not documented on MSDN. + kNavigationView = 0x88, + kNavigationMenu = 0x89, + kNavigationUp = 0x8A, + kNavigationDown = 0x8B, + kNavigationLeft = 0x8C, + kNavigationRight = 0x8D, + kNavigationAccept = 0x8E, + kNavigationCancel = 0x8F, + + kNumLock = 0x90, + kScroll = 0x91, + + // NEC PC-9800 keyboard. + kOemNecEqual = 0x92, // '=' key on the numpad. + + // Fujitsu/OASYS keyboard. + kOemFjJisho = 0x92, // 'Dictionary' key. + kOemFjMasshou = 0x93, // 'Unregister word' key. + kOemFjTouroku = 0x94, // 'Register word' key. + kOemFjLOya = 0x95, // 'Left OYAYUBI' key. + kOemFjROya = 0x96, // 'Right OYAYUBI' key. + + // Left and right Alt, Ctrl and Shift virtual keys. + // On Windows (from WinUser.h): + // "Used only as parameters to GetAsyncKeyState() and GetKeyState(). + // No other API or message will distinguish left and right keys in this way." + kLShift = 0xA0, + kRShift = 0xA1, + kLControl = 0xA2, + kRControl = 0xA3, + kLMenu = 0xA4, + kRMenu = 0xA5, + + kBrowserBack = 0xA6, + kBrowserForward = 0xA7, + kBrowserRefresh = 0xA8, + kBrowserStop = 0xA9, + kBrowserSearch = 0xAA, + kBrowserFavorites = 0xAB, + kBrowserHome = 0xAC, + + kVolumeMute = 0xAD, + kVolumeDown = 0xAE, + kVolumeUp = 0xAF, + kMediaNextTrack = 0xB0, + kMediaPrevTrack = 0xB1, + kMediaStop = 0xB2, + kMediaPlayPause = 0xB3, + kLaunchMail = 0xB4, + kLaunchMediaSelect = 0xB5, + kLaunchApp1 = 0xB6, + kLaunchApp2 = 0xB7, + + kOem1 = 0xBA, // ';:' for the US. + kOemPlus = 0xBB, // '+' for any country. + kOemComma = 0xBC, // ',' for any country. + kOemMinus = 0xBD, // '-' for any country. + kOemPeriod = 0xBE, // '.' for any country. + kOem2 = 0xBF, // '/?' for the US. + kOem3 = 0xC0, // '`~' for the US. + + // VK_GAMEPAD_* (since _WIN32_WINNT 0x0604) virtual key codes are marked as + // reserved in WinUser.h and are mostly not documented on MSDN (with the + // exception of the Xbox Device Portal Remote Input REST API in the "UWP on + // Xbox One" section). + // Xenia uses VK_PAD_* (kXInputPad*) for HID emulation internally instead + // because XInput is the API used for the Xbox 360 controller. + // To avoid confusion between VK_GAMEPAD_* and VK_PAD_*, here they are + // prefixed with kXboxOne and kXInput respectively. + kXboxOneGamepadA = 0xC3, + kXboxOneGamepadB = 0xC4, + kXboxOneGamepadX = 0xC5, + kXboxOneGamepadY = 0xC6, + kXboxOneGamepadRightShoulder = 0xC7, + kXboxOneGamepadLeftShoulder = 0xC8, + kXboxOneGamepadLeftTrigger = 0xC9, + kXboxOneGamepadRightTrigger = 0xCA, + kXboxOneGamepadDpadUp = 0xCB, + kXboxOneGamepadDpadDown = 0xCC, + kXboxOneGamepadDpadLeft = 0xCD, + kXboxOneGamepadDpadRight = 0xCE, + kXboxOneGamepadMenu = 0xCF, + kXboxOneGamepadView = 0xD0, + kXboxOneGamepadLeftThumbstickButton = 0xD1, + kXboxOneGamepadRightThumbstickButton = 0xD2, + kXboxOneGamepadLeftThumbstickUp = 0xD3, + kXboxOneGamepadLeftThumbstickDown = 0xD4, + kXboxOneGamepadLeftThumbstickRight = 0xD5, + kXboxOneGamepadLeftThumbstickLeft = 0xD6, + kXboxOneGamepadRightThumbstickUp = 0xD7, + kXboxOneGamepadRightThumbstickDown = 0xD8, + kXboxOneGamepadRightThumbstickRight = 0xD9, + kXboxOneGamepadRightThumbstickLeft = 0xDA, + + kOem4 = 0xDB, // '[{' for the US. + kOem5 = 0xDC, // '\|' for the US. + kOem6 = 0xDD, // ']}' for the US. + kOem7 = 0xDE, // ''"' for the US. + kOem8 = 0xDF, + + kOemAx = 0xE1, // 'AX' key on the Japanese AX keyboard. + kOem102 = 0xE2, // "<>" or "\|" on the RT 102-key keyboard. + kIcoHelp = 0xE3, // Help key on the Olivetti keyboard (ICO). + kIco00 = 0xE4, // 00 key on the ICO. + + kProcessKey = 0xE5, + + kIcoClear = 0xE6, + + // From MSDN: + // "Used to pass Unicode characters as if they were keystrokes. The VK_PACKET + // key is the low word of a 32-bit Virtual Key value used for non-keyboard + // input methods." + kPacket = 0xE7, + + // Nokia/Ericsson. + kOemReset = 0xE9, + kOemJump = 0xEA, + kOemPa1 = 0xEB, + kOemPa2 = 0xEC, + kOemPa3 = 0xED, + kOemWsCtrl = 0xEE, + kOemCuSel = 0xEF, + kOemAttn = 0xF0, + kOemFinish = 0xF1, + kOemCopy = 0xF2, + kOemAuto = 0xF3, + kOemEnlW = 0xF4, + kOemBackTab = 0xF5, + + kAttn = 0xF6, + kCrSel = 0xF7, + kExSel = 0xF8, + kErEof = 0xF9, + kPlay = 0xFA, + kZoom = 0xFB, + kNoName = 0xFC, + kPa1 = 0xFD, + kOemClear = 0xFE, + + // VK_PAD_* from XInput.h for XInputGetKeystroke. kXInput prefix added to + // distinguish from VK_GAMEPAD_*, added much later for the Xbox One + // controller. + + kXInputPadA = 0x5800, + kXInputPadB = 0x5801, + kXInputPadX = 0x5802, + kXInputPadY = 0x5803, + // RShoulder before LShoulder, not a typo. + kXInputPadRShoulder = 0x5804, + kXInputPadLShoulder = 0x5805, + kXInputPadLTrigger = 0x5806, + kXInputPadRTrigger = 0x5807, + + kXInputPadDpadUp = 0x5810, + kXInputPadDpadDown = 0x5811, + kXInputPadDpadLeft = 0x5812, + kXInputPadDpadRight = 0x5813, + kXInputPadStart = 0x5814, + kXInputPadBack = 0x5815, + kXInputPadLThumbPress = 0x5816, + kXInputPadRThumbPress = 0x5817, + + kXInputPadLThumbUp = 0x5820, + kXInputPadLThumbDown = 0x5821, + kXInputPadLThumbRight = 0x5822, + kXInputPadLThumbLeft = 0x5823, + kXInputPadLThumbUpLeft = 0x5824, + kXInputPadLThumbUpRight = 0x5825, + kXInputPadLThumbDownRight = 0x5826, + kXInputPadLThumbDownLeft = 0x5827, + + kXInputPadRThumbUp = 0x5830, + kXInputPadRThumbDown = 0x5831, + kXInputPadRThumbRight = 0x5832, + kXInputPadRThumbLeft = 0x5833, + kXInputPadRThumbUpLeft = 0x5834, + kXInputPadRThumbUpRight = 0x5835, + kXInputPadRThumbDownRight = 0x5836, + kXInputPadRThumbDownLeft = 0x5837, +}; + +} // namespace ui +} // namespace xe + +#endif // XENIA_UI_VIRTUAL_KEY_H_ diff --git a/src/xenia/ui/vulkan/blitter.cc b/src/xenia/ui/vulkan/blitter.cc index e4394eef7..165301d3c 100644 --- a/src/xenia/ui/vulkan/blitter.cc +++ b/src/xenia/ui/vulkan/blitter.cc @@ -26,6 +26,7 @@ Blitter::~Blitter() { Shutdown(); } VkResult Blitter::Initialize(VulkanDevice* device) { device_ = device; + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Shaders @@ -34,8 +35,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { shader_create_info.sType = VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO; shader_create_info.codeSize = sizeof(blit_vert); shader_create_info.pCode = reinterpret_cast(blit_vert); - status = vkCreateShaderModule(*device_, &shader_create_info, nullptr, - &blit_vertex_); + status = dfn.vkCreateShaderModule(*device_, &shader_create_info, nullptr, + &blit_vertex_); CheckResult(status, "vkCreateShaderModule"); if (status != VK_SUCCESS) { return status; @@ -46,8 +47,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { shader_create_info.codeSize = sizeof(blit_color_frag); shader_create_info.pCode = reinterpret_cast(blit_color_frag); - status = vkCreateShaderModule(*device_, &shader_create_info, nullptr, - &blit_color_); + status = dfn.vkCreateShaderModule(*device_, &shader_create_info, nullptr, + &blit_color_); CheckResult(status, "vkCreateShaderModule"); if (status != VK_SUCCESS) { return status; @@ -58,8 +59,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { shader_create_info.codeSize = sizeof(blit_depth_frag); shader_create_info.pCode = reinterpret_cast(blit_depth_frag); - status = vkCreateShaderModule(*device_, &shader_create_info, nullptr, - &blit_depth_); + status = dfn.vkCreateShaderModule(*device_, &shader_create_info, nullptr, + &blit_depth_); CheckResult(status, "vkCreateShaderModule"); if (status != VK_SUCCESS) { return status; @@ -83,8 +84,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { texture_binding.stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT; texture_binding.pImmutableSamplers = nullptr; texture_set_layout_info.pBindings = &texture_binding; - status = vkCreateDescriptorSetLayout(*device_, &texture_set_layout_info, - nullptr, &descriptor_set_layout_); + status = dfn.vkCreateDescriptorSetLayout(*device_, &texture_set_layout_info, + nullptr, &descriptor_set_layout_); CheckResult(status, "vkCreateDescriptorSetLayout"); if (status != VK_SUCCESS) { return status; @@ -119,8 +120,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { pipeline_layout_info.pushConstantRangeCount = static_cast(xe::countof(push_constant_ranges)); pipeline_layout_info.pPushConstantRanges = push_constant_ranges; - status = vkCreatePipelineLayout(*device_, &pipeline_layout_info, nullptr, - &pipeline_layout_); + status = dfn.vkCreatePipelineLayout(*device_, &pipeline_layout_info, nullptr, + &pipeline_layout_); CheckResult(status, "vkCreatePipelineLayout"); if (status != VK_SUCCESS) { return status; @@ -147,8 +148,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { VK_BORDER_COLOR_INT_TRANSPARENT_BLACK, VK_FALSE, }; - status = - vkCreateSampler(*device_, &sampler_create_info, nullptr, &samp_nearest_); + status = dfn.vkCreateSampler(*device_, &sampler_create_info, nullptr, + &samp_nearest_); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return status; @@ -157,8 +158,8 @@ VkResult Blitter::Initialize(VulkanDevice* device) { sampler_create_info.minFilter = VK_FILTER_LINEAR; sampler_create_info.magFilter = VK_FILTER_LINEAR; sampler_create_info.mipmapMode = VK_SAMPLER_MIPMAP_MODE_LINEAR; - status = - vkCreateSampler(*device_, &sampler_create_info, nullptr, &samp_linear_); + status = dfn.vkCreateSampler(*device_, &sampler_create_info, nullptr, + &samp_linear_); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return status; @@ -168,49 +169,50 @@ VkResult Blitter::Initialize(VulkanDevice* device) { } void Blitter::Shutdown() { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); if (samp_nearest_) { - vkDestroySampler(*device_, samp_nearest_, nullptr); + dfn.vkDestroySampler(*device_, samp_nearest_, nullptr); samp_nearest_ = nullptr; } if (samp_linear_) { - vkDestroySampler(*device_, samp_linear_, nullptr); + dfn.vkDestroySampler(*device_, samp_linear_, nullptr); samp_linear_ = nullptr; } if (blit_vertex_) { - vkDestroyShaderModule(*device_, blit_vertex_, nullptr); + dfn.vkDestroyShaderModule(*device_, blit_vertex_, nullptr); blit_vertex_ = nullptr; } if (blit_color_) { - vkDestroyShaderModule(*device_, blit_color_, nullptr); + dfn.vkDestroyShaderModule(*device_, blit_color_, nullptr); blit_color_ = nullptr; } if (blit_depth_) { - vkDestroyShaderModule(*device_, blit_depth_, nullptr); + dfn.vkDestroyShaderModule(*device_, blit_depth_, nullptr); blit_depth_ = nullptr; } if (pipeline_color_) { - vkDestroyPipeline(*device_, pipeline_color_, nullptr); + dfn.vkDestroyPipeline(*device_, pipeline_color_, nullptr); pipeline_color_ = nullptr; } if (pipeline_depth_) { - vkDestroyPipeline(*device_, pipeline_depth_, nullptr); + dfn.vkDestroyPipeline(*device_, pipeline_depth_, nullptr); pipeline_depth_ = nullptr; } if (pipeline_layout_) { - vkDestroyPipelineLayout(*device_, pipeline_layout_, nullptr); + dfn.vkDestroyPipelineLayout(*device_, pipeline_layout_, nullptr); pipeline_layout_ = nullptr; } if (descriptor_set_layout_) { - vkDestroyDescriptorSetLayout(*device_, descriptor_set_layout_, nullptr); + dfn.vkDestroyDescriptorSetLayout(*device_, descriptor_set_layout_, nullptr); descriptor_set_layout_ = nullptr; } for (auto& pipeline : pipelines_) { - vkDestroyPipeline(*device_, pipeline.second, nullptr); + dfn.vkDestroyPipeline(*device_, pipeline.second, nullptr); } pipelines_.clear(); for (auto& pass : render_passes_) { - vkDestroyRenderPass(*device_, pass.second, nullptr); + dfn.vkDestroyRenderPass(*device_, pass.second, nullptr); } render_passes_.clear(); } @@ -230,6 +232,8 @@ void Blitter::BlitTexture2D(VkCommandBuffer command_buffer, VkFence fence, VkFramebuffer dst_framebuffer, VkViewport viewport, VkRect2D scissor, VkFilter filter, bool color_or_depth, bool swap_channels) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Do we need a full draw, or can we cheap out with a blit command? bool full_draw = swap_channels || true; if (full_draw) { @@ -249,18 +253,18 @@ void Blitter::BlitTexture2D(VkCommandBuffer command_buffer, VkFence fence, nullptr, }; - vkCmdBeginRenderPass(command_buffer, &render_pass_info, - VK_SUBPASS_CONTENTS_INLINE); + dfn.vkCmdBeginRenderPass(command_buffer, &render_pass_info, + VK_SUBPASS_CONTENTS_INLINE); - vkCmdSetViewport(command_buffer, 0, 1, &viewport); - vkCmdSetScissor(command_buffer, 0, 1, &scissor); + dfn.vkCmdSetViewport(command_buffer, 0, 1, &viewport); + dfn.vkCmdSetScissor(command_buffer, 0, 1, &scissor); // Acquire a pipeline. auto pipeline = GetPipeline(render_pass, color_or_depth ? blit_color_ : blit_depth_, color_or_depth); - vkCmdBindPipeline(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline); + dfn.vkCmdBindPipeline(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline); // Acquire and update a descriptor set for this image. auto set = descriptor_pool_->AcquireEntry(descriptor_set_layout_); @@ -287,10 +291,10 @@ void Blitter::BlitTexture2D(VkCommandBuffer command_buffer, VkFence fence, write.pImageInfo = ℑ write.pBufferInfo = nullptr; write.pTexelBufferView = nullptr; - vkUpdateDescriptorSets(*device_, 1, &write, 0, nullptr); + dfn.vkUpdateDescriptorSets(*device_, 1, &write, 0, nullptr); - vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline_layout_, 0, 1, &set, 0, nullptr); + dfn.vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_layout_, 0, 1, &set, 0, nullptr); VtxPushConstants vtx_constants = { { @@ -306,9 +310,9 @@ void Blitter::BlitTexture2D(VkCommandBuffer command_buffer, VkFence fence, float(dst_rect.extent.height) / dst_extents.height, }, }; - vkCmdPushConstants(command_buffer, pipeline_layout_, - VK_SHADER_STAGE_VERTEX_BIT, 0, sizeof(VtxPushConstants), - &vtx_constants); + dfn.vkCmdPushConstants(command_buffer, pipeline_layout_, + VK_SHADER_STAGE_VERTEX_BIT, 0, + sizeof(VtxPushConstants), &vtx_constants); PixPushConstants pix_constants = { 0, @@ -316,12 +320,12 @@ void Blitter::BlitTexture2D(VkCommandBuffer command_buffer, VkFence fence, 0, swap_channels ? 1 : 0, }; - vkCmdPushConstants(command_buffer, pipeline_layout_, - VK_SHADER_STAGE_FRAGMENT_BIT, sizeof(VtxPushConstants), - sizeof(PixPushConstants), &pix_constants); + dfn.vkCmdPushConstants( + command_buffer, pipeline_layout_, VK_SHADER_STAGE_FRAGMENT_BIT, + sizeof(VtxPushConstants), sizeof(PixPushConstants), &pix_constants); - vkCmdDraw(command_buffer, 4, 1, 0, 0); - vkCmdEndRenderPass(command_buffer); + dfn.vkCmdDraw(command_buffer, 4, 1, 0, 0); + dfn.vkCmdEndRenderPass(command_buffer); } } @@ -421,8 +425,9 @@ VkRenderPass Blitter::CreateRenderPass(VkFormat output_format, nullptr, }; VkRenderPass renderpass = nullptr; + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult result = - vkCreateRenderPass(*device_, &renderpass_info, nullptr, &renderpass); + dfn.vkCreateRenderPass(*device_, &renderpass_info, nullptr, &renderpass); CheckResult(result, "vkCreateRenderPass"); return renderpass; @@ -431,6 +436,7 @@ VkRenderPass Blitter::CreateRenderPass(VkFormat output_format, VkPipeline Blitter::CreatePipeline(VkRenderPass render_pass, VkShaderModule frag_shader, bool color_or_depth) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult result = VK_SUCCESS; // Pipeline @@ -576,8 +582,8 @@ VkPipeline Blitter::CreatePipeline(VkRenderPass render_pass, pipeline_info.basePipelineIndex = -1; VkPipeline pipeline = nullptr; - result = vkCreateGraphicsPipelines(*device_, nullptr, 1, &pipeline_info, - nullptr, &pipeline); + result = dfn.vkCreateGraphicsPipelines(*device_, nullptr, 1, &pipeline_info, + nullptr, &pipeline); CheckResult(result, "vkCreateGraphicsPipelines"); return pipeline; diff --git a/src/xenia/ui/vulkan/circular_buffer.cc b/src/xenia/ui/vulkan/circular_buffer.cc index 06cb68aa7..543342efe 100644 --- a/src/xenia/ui/vulkan/circular_buffer.cc +++ b/src/xenia/ui/vulkan/circular_buffer.cc @@ -22,6 +22,7 @@ namespace vulkan { CircularBuffer::CircularBuffer(VulkanDevice* device, VkBufferUsageFlags usage, VkDeviceSize capacity, VkDeviceSize alignment) : device_(device), capacity_(capacity) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Create our internal buffer. @@ -34,14 +35,14 @@ CircularBuffer::CircularBuffer(VulkanDevice* device, VkBufferUsageFlags usage, buffer_info.sharingMode = VK_SHARING_MODE_EXCLUSIVE; buffer_info.queueFamilyIndexCount = 0; buffer_info.pQueueFamilyIndices = nullptr; - status = vkCreateBuffer(*device_, &buffer_info, nullptr, &gpu_buffer_); + status = dfn.vkCreateBuffer(*device_, &buffer_info, nullptr, &gpu_buffer_); CheckResult(status, "vkCreateBuffer"); if (status != VK_SUCCESS) { assert_always(); } VkMemoryRequirements reqs; - vkGetBufferMemoryRequirements(*device_, gpu_buffer_, &reqs); + dfn.vkGetBufferMemoryRequirements(*device_, gpu_buffer_, &reqs); alignment_ = xe::round_up(alignment, reqs.alignment); } CircularBuffer::~CircularBuffer() { Shutdown(); } @@ -52,10 +53,12 @@ VkResult CircularBuffer::Initialize(VkDeviceMemory memory, gpu_memory_ = memory; gpu_base_ = offset; + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; // Bind the buffer to its backing memory. - status = vkBindBufferMemory(*device_, gpu_buffer_, gpu_memory_, gpu_base_); + status = + dfn.vkBindBufferMemory(*device_, gpu_buffer_, gpu_memory_, gpu_base_); CheckResult(status, "vkBindBufferMemory"); if (status != VK_SUCCESS) { XELOGE("CircularBuffer::Initialize - Failed to bind memory!"); @@ -64,8 +67,8 @@ VkResult CircularBuffer::Initialize(VkDeviceMemory memory, } // Map the memory so we can access it. - status = vkMapMemory(*device_, gpu_memory_, gpu_base_, capacity_, 0, - reinterpret_cast(&host_base_)); + status = dfn.vkMapMemory(*device_, gpu_memory_, gpu_base_, capacity_, 0, + reinterpret_cast(&host_base_)); CheckResult(status, "vkMapMemory"); if (status != VK_SUCCESS) { XELOGE("CircularBuffer::Initialize - Failed to map memory!"); @@ -77,10 +80,11 @@ VkResult CircularBuffer::Initialize(VkDeviceMemory memory, } VkResult CircularBuffer::Initialize() { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status = VK_SUCCESS; VkMemoryRequirements reqs; - vkGetBufferMemoryRequirements(*device_, gpu_buffer_, &reqs); + dfn.vkGetBufferMemoryRequirements(*device_, gpu_buffer_, &reqs); // Allocate memory from the device to back the buffer. owns_gpu_memory_ = true; @@ -95,7 +99,8 @@ VkResult CircularBuffer::Initialize() { gpu_base_ = 0; // Bind the buffer to its backing memory. - status = vkBindBufferMemory(*device_, gpu_buffer_, gpu_memory_, gpu_base_); + status = + dfn.vkBindBufferMemory(*device_, gpu_buffer_, gpu_memory_, gpu_base_); CheckResult(status, "vkBindBufferMemory"); if (status != VK_SUCCESS) { XELOGE("CircularBuffer::Initialize - Failed to bind memory!"); @@ -104,8 +109,8 @@ VkResult CircularBuffer::Initialize() { } // Map the memory so we can access it. - status = vkMapMemory(*device_, gpu_memory_, gpu_base_, capacity_, 0, - reinterpret_cast(&host_base_)); + status = dfn.vkMapMemory(*device_, gpu_memory_, gpu_base_, capacity_, 0, + reinterpret_cast(&host_base_)); CheckResult(status, "vkMapMemory"); if (status != VK_SUCCESS) { XELOGE("CircularBuffer::Initialize - Failed to map memory!"); @@ -118,22 +123,24 @@ VkResult CircularBuffer::Initialize() { void CircularBuffer::Shutdown() { Clear(); + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); if (host_base_) { - vkUnmapMemory(*device_, gpu_memory_); + dfn.vkUnmapMemory(*device_, gpu_memory_); host_base_ = nullptr; } if (gpu_buffer_) { - vkDestroyBuffer(*device_, gpu_buffer_, nullptr); + dfn.vkDestroyBuffer(*device_, gpu_buffer_, nullptr); gpu_buffer_ = nullptr; } if (gpu_memory_ && owns_gpu_memory_) { - vkFreeMemory(*device_, gpu_memory_, nullptr); + dfn.vkFreeMemory(*device_, gpu_memory_, nullptr); gpu_memory_ = nullptr; } } void CircularBuffer::GetBufferMemoryRequirements(VkMemoryRequirements* reqs) { - vkGetBufferMemoryRequirements(*device_, gpu_buffer_, reqs); + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + dfn.vkGetBufferMemoryRequirements(*device_, gpu_buffer_, reqs); } bool CircularBuffer::CanAcquire(VkDeviceSize length) { @@ -224,23 +231,25 @@ CircularBuffer::Allocation* CircularBuffer::Acquire(VkDeviceSize length, } void CircularBuffer::Flush(Allocation* allocation) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkMappedMemoryRange range; range.sType = VK_STRUCTURE_TYPE_MAPPED_MEMORY_RANGE; range.pNext = nullptr; range.memory = gpu_memory_; range.offset = gpu_base_ + allocation->offset; range.size = allocation->length; - vkFlushMappedMemoryRanges(*device_, 1, &range); + dfn.vkFlushMappedMemoryRanges(*device_, 1, &range); } void CircularBuffer::Flush(VkDeviceSize offset, VkDeviceSize length) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkMappedMemoryRange range; range.sType = VK_STRUCTURE_TYPE_MAPPED_MEMORY_RANGE; range.pNext = nullptr; range.memory = gpu_memory_; range.offset = gpu_base_ + offset; range.size = length; - vkFlushMappedMemoryRanges(*device_, 1, &range); + dfn.vkFlushMappedMemoryRanges(*device_, 1, &range); } void CircularBuffer::Clear() { @@ -249,12 +258,14 @@ void CircularBuffer::Clear() { } void CircularBuffer::Scavenge() { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Stash the last signalled fence VkFence fence = nullptr; while (!allocations_.empty()) { Allocation& alloc = allocations_.front(); if (fence != alloc.fence && - vkGetFenceStatus(*device_, alloc.fence) != VK_SUCCESS) { + dfn.vkGetFenceStatus(*device_, alloc.fence) != VK_SUCCESS) { // Don't bother freeing following allocations to ensure proper ordering. break; } diff --git a/src/xenia/ui/vulkan/fenced_pools.cc b/src/xenia/ui/vulkan/fenced_pools.cc index f7aeffff3..f6ce79662 100644 --- a/src/xenia/ui/vulkan/fenced_pools.cc +++ b/src/xenia/ui/vulkan/fenced_pools.cc @@ -19,9 +19,11 @@ namespace vulkan { using xe::ui::vulkan::CheckResult; -CommandBufferPool::CommandBufferPool(VkDevice device, +CommandBufferPool::CommandBufferPool(const VulkanDevice& device, uint32_t queue_family_index) : BaseFencedPool(device) { + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + // Create the pool used for allocating buffers. // They are marked as transient (short-lived) and cycled frequently. VkCommandPoolCreateInfo cmd_pool_info; @@ -31,7 +33,7 @@ CommandBufferPool::CommandBufferPool(VkDevice device, VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT; cmd_pool_info.queueFamilyIndex = queue_family_index; auto err = - vkCreateCommandPool(device_, &cmd_pool_info, nullptr, &command_pool_); + dfn.vkCreateCommandPool(device_, &cmd_pool_info, nullptr, &command_pool_); CheckResult(err, "vkCreateCommandPool"); // Allocate a bunch of command buffers to start. @@ -43,8 +45,8 @@ CommandBufferPool::CommandBufferPool(VkDevice device, command_buffer_info.level = VK_COMMAND_BUFFER_LEVEL_PRIMARY; command_buffer_info.commandBufferCount = kDefaultCount; VkCommandBuffer command_buffers[kDefaultCount]; - err = - vkAllocateCommandBuffers(device_, &command_buffer_info, command_buffers); + err = dfn.vkAllocateCommandBuffers(device_, &command_buffer_info, + command_buffers); CheckResult(err, "vkCreateCommandBuffer"); for (size_t i = 0; i < xe::countof(command_buffers); ++i) { PushEntry(command_buffers[i], nullptr); @@ -53,7 +55,8 @@ CommandBufferPool::CommandBufferPool(VkDevice device, CommandBufferPool::~CommandBufferPool() { FreeAllEntries(); - vkDestroyCommandPool(device_, command_pool_, nullptr); + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + dfn.vkDestroyCommandPool(device_, command_pool_, nullptr); command_pool_ = nullptr; } @@ -67,17 +70,19 @@ VkCommandBuffer CommandBufferPool::AllocateEntry(void* data) { VkCommandBufferLevel(reinterpret_cast(data)); command_buffer_info.commandBufferCount = 1; VkCommandBuffer command_buffer; - auto err = - vkAllocateCommandBuffers(device_, &command_buffer_info, &command_buffer); + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + auto err = dfn.vkAllocateCommandBuffers(device_, &command_buffer_info, + &command_buffer); CheckResult(err, "vkCreateCommandBuffer"); return command_buffer; } void CommandBufferPool::FreeEntry(VkCommandBuffer handle) { - vkFreeCommandBuffers(device_, command_pool_, 1, &handle); + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + dfn.vkFreeCommandBuffers(device_, command_pool_, 1, &handle); } -DescriptorPool::DescriptorPool(VkDevice device, uint32_t max_count, +DescriptorPool::DescriptorPool(const VulkanDevice& device, uint32_t max_count, std::vector pool_sizes) : BaseFencedPool(device) { VkDescriptorPoolCreateInfo descriptor_pool_info; @@ -88,13 +93,15 @@ DescriptorPool::DescriptorPool(VkDevice device, uint32_t max_count, descriptor_pool_info.maxSets = max_count; descriptor_pool_info.poolSizeCount = uint32_t(pool_sizes.size()); descriptor_pool_info.pPoolSizes = pool_sizes.data(); - auto err = vkCreateDescriptorPool(device, &descriptor_pool_info, nullptr, - &descriptor_pool_); + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + auto err = dfn.vkCreateDescriptorPool(device, &descriptor_pool_info, nullptr, + &descriptor_pool_); CheckResult(err, "vkCreateDescriptorPool"); } DescriptorPool::~DescriptorPool() { FreeAllEntries(); - vkDestroyDescriptorPool(device_, descriptor_pool_, nullptr); + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + dfn.vkDestroyDescriptorPool(device_, descriptor_pool_, nullptr); descriptor_pool_ = nullptr; } @@ -108,15 +115,17 @@ VkDescriptorSet DescriptorPool::AllocateEntry(void* data) { set_alloc_info.descriptorPool = descriptor_pool_; set_alloc_info.descriptorSetCount = 1; set_alloc_info.pSetLayouts = &layout; + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); auto err = - vkAllocateDescriptorSets(device_, &set_alloc_info, &descriptor_set); + dfn.vkAllocateDescriptorSets(device_, &set_alloc_info, &descriptor_set); CheckResult(err, "vkAllocateDescriptorSets"); return descriptor_set; } void DescriptorPool::FreeEntry(VkDescriptorSet handle) { - vkFreeDescriptorSets(device_, descriptor_pool_, 1, &handle); + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + dfn.vkFreeDescriptorSets(device_, descriptor_pool_, 1, &handle); } } // namespace vulkan diff --git a/src/xenia/ui/vulkan/fenced_pools.h b/src/xenia/ui/vulkan/fenced_pools.h index d64bcd6ac..0af6dd694 100644 --- a/src/xenia/ui/vulkan/fenced_pools.h +++ b/src/xenia/ui/vulkan/fenced_pools.h @@ -14,6 +14,7 @@ #include "xenia/base/assert.h" #include "xenia/ui/vulkan/vulkan.h" +#include "xenia/ui/vulkan/vulkan_device.h" #include "xenia/ui/vulkan/vulkan_util.h" namespace xe { @@ -28,7 +29,7 @@ namespace vulkan { template class BaseFencedPool { public: - BaseFencedPool(VkDevice device) : device_(device) {} + BaseFencedPool(const VulkanDevice& device) : device_(device) {} virtual ~BaseFencedPool() { // TODO(benvanik): wait on fence until done. @@ -47,11 +48,12 @@ class BaseFencedPool { // Checks all pending batches for completion and scavenges their entries. // This should be called as frequently as reasonable. void Scavenge() { + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); while (pending_batch_list_head_) { auto batch = pending_batch_list_head_; assert_not_null(batch->fence); - VkResult status = vkGetFenceStatus(device_, batch->fence); + VkResult status = dfn.vkGetFenceStatus(device_, batch->fence); if (status == VK_SUCCESS || status == VK_ERROR_DEVICE_LOST) { // Batch has completed. Reclaim. pending_batch_list_head_ = batch->next; @@ -80,6 +82,7 @@ class BaseFencedPool { VkFence BeginBatch(VkFence fence = nullptr) { assert_null(open_batch_); Batch* batch = nullptr; + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); if (free_batch_list_head_) { // Reuse a batch. batch = free_batch_list_head_; @@ -88,10 +91,10 @@ class BaseFencedPool { if (batch->flags & kBatchOwnsFence && !fence) { // Reset owned fence. - vkResetFences(device_, 1, &batch->fence); + dfn.vkResetFences(device_, 1, &batch->fence); } else if ((batch->flags & kBatchOwnsFence) && fence) { // Transfer owned -> external - vkDestroyFence(device_, batch->fence, nullptr); + dfn.vkDestroyFence(device_, batch->fence, nullptr); batch->fence = fence; batch->flags &= ~kBatchOwnsFence; } else if (!(batch->flags & kBatchOwnsFence) && !fence) { @@ -100,7 +103,8 @@ class BaseFencedPool { info.sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO; info.pNext = nullptr; info.flags = 0; - VkResult res = vkCreateFence(device_, &info, nullptr, &batch->fence); + VkResult res = + dfn.vkCreateFence(device_, &info, nullptr, &batch->fence); if (res != VK_SUCCESS) { assert_always(); } @@ -121,7 +125,8 @@ class BaseFencedPool { info.sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO; info.pNext = nullptr; info.flags = 0; - VkResult res = vkCreateFence(device_, &info, nullptr, &batch->fence); + VkResult res = + dfn.vkCreateFence(device_, &info, nullptr, &batch->fence); if (res != VK_SUCCESS) { assert_always(); } @@ -239,13 +244,14 @@ class BaseFencedPool { } void FreeAllEntries() { + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); // Run down free lists. while (free_batch_list_head_) { auto batch = free_batch_list_head_; free_batch_list_head_ = batch->next; if (batch->flags & kBatchOwnsFence) { - vkDestroyFence(device_, batch->fence, nullptr); + dfn.vkDestroyFence(device_, batch->fence, nullptr); batch->fence = nullptr; } delete batch; @@ -258,7 +264,7 @@ class BaseFencedPool { } } - VkDevice device_ = nullptr; + const VulkanDevice& device_; private: struct Entry { @@ -288,7 +294,7 @@ class CommandBufferPool public: typedef BaseFencedPool Base; - CommandBufferPool(VkDevice device, uint32_t queue_family_index); + CommandBufferPool(const VulkanDevice& device, uint32_t queue_family_index); ~CommandBufferPool() override; VkCommandBuffer AcquireEntry( @@ -308,7 +314,7 @@ class DescriptorPool : public BaseFencedPool { public: typedef BaseFencedPool Base; - DescriptorPool(VkDevice device, uint32_t max_count, + DescriptorPool(const VulkanDevice& device, uint32_t max_count, std::vector pool_sizes); ~DescriptorPool() override; diff --git a/src/xenia/ui/vulkan/functions/device_1_0.inc b/src/xenia/ui/vulkan/functions/device_1_0.inc new file mode 100644 index 000000000..aed4f435a --- /dev/null +++ b/src/xenia/ui/vulkan/functions/device_1_0.inc @@ -0,0 +1,83 @@ +// Vulkan 1.0 core device functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkAllocateCommandBuffers) +XE_UI_VULKAN_FUNCTION(vkAllocateDescriptorSets) +XE_UI_VULKAN_FUNCTION(vkAllocateMemory) +XE_UI_VULKAN_FUNCTION(vkBeginCommandBuffer) +XE_UI_VULKAN_FUNCTION(vkCmdBeginRenderPass) +XE_UI_VULKAN_FUNCTION(vkCmdBindDescriptorSets) +XE_UI_VULKAN_FUNCTION(vkBindBufferMemory) +XE_UI_VULKAN_FUNCTION(vkBindImageMemory) +XE_UI_VULKAN_FUNCTION(vkCmdBindIndexBuffer) +XE_UI_VULKAN_FUNCTION(vkCmdBindPipeline) +XE_UI_VULKAN_FUNCTION(vkCmdBindVertexBuffers) +XE_UI_VULKAN_FUNCTION(vkCmdBlitImage) +XE_UI_VULKAN_FUNCTION(vkCmdClearColorImage) +XE_UI_VULKAN_FUNCTION(vkCmdClearDepthStencilImage) +XE_UI_VULKAN_FUNCTION(vkCmdCopyBufferToImage) +XE_UI_VULKAN_FUNCTION(vkCmdCopyImageToBuffer) +XE_UI_VULKAN_FUNCTION(vkCmdDraw) +XE_UI_VULKAN_FUNCTION(vkCmdDrawIndexed) +XE_UI_VULKAN_FUNCTION(vkCmdEndRenderPass) +XE_UI_VULKAN_FUNCTION(vkCmdExecuteCommands) +XE_UI_VULKAN_FUNCTION(vkCmdFillBuffer) +XE_UI_VULKAN_FUNCTION(vkCmdPipelineBarrier) +XE_UI_VULKAN_FUNCTION(vkCmdPushConstants) +XE_UI_VULKAN_FUNCTION(vkCmdResolveImage) +XE_UI_VULKAN_FUNCTION(vkCmdSetBlendConstants) +XE_UI_VULKAN_FUNCTION(vkCmdSetDepthBias) +XE_UI_VULKAN_FUNCTION(vkCmdSetDepthBounds) +XE_UI_VULKAN_FUNCTION(vkCmdSetLineWidth) +XE_UI_VULKAN_FUNCTION(vkCmdSetScissor) +XE_UI_VULKAN_FUNCTION(vkCmdSetStencilCompareMask) +XE_UI_VULKAN_FUNCTION(vkCmdSetStencilReference) +XE_UI_VULKAN_FUNCTION(vkCmdSetStencilWriteMask) +XE_UI_VULKAN_FUNCTION(vkCmdSetViewport) +XE_UI_VULKAN_FUNCTION(vkCreateBuffer) +XE_UI_VULKAN_FUNCTION(vkCreateCommandPool) +XE_UI_VULKAN_FUNCTION(vkCreateDescriptorPool) +XE_UI_VULKAN_FUNCTION(vkCreateDescriptorSetLayout) +XE_UI_VULKAN_FUNCTION(vkCreateFence) +XE_UI_VULKAN_FUNCTION(vkCreateFramebuffer) +XE_UI_VULKAN_FUNCTION(vkCreateGraphicsPipelines) +XE_UI_VULKAN_FUNCTION(vkCreateImage) +XE_UI_VULKAN_FUNCTION(vkCreateImageView) +XE_UI_VULKAN_FUNCTION(vkCreatePipelineCache) +XE_UI_VULKAN_FUNCTION(vkCreatePipelineLayout) +XE_UI_VULKAN_FUNCTION(vkCreateRenderPass) +XE_UI_VULKAN_FUNCTION(vkCreateSampler) +XE_UI_VULKAN_FUNCTION(vkCreateSemaphore) +XE_UI_VULKAN_FUNCTION(vkCreateShaderModule) +XE_UI_VULKAN_FUNCTION(vkDestroyBuffer) +XE_UI_VULKAN_FUNCTION(vkDestroyCommandPool) +XE_UI_VULKAN_FUNCTION(vkDestroyDescriptorPool) +XE_UI_VULKAN_FUNCTION(vkDestroyDescriptorSetLayout) +XE_UI_VULKAN_FUNCTION(vkDestroyFence) +XE_UI_VULKAN_FUNCTION(vkDestroyFramebuffer) +XE_UI_VULKAN_FUNCTION(vkDestroyImage) +XE_UI_VULKAN_FUNCTION(vkDestroyImageView) +XE_UI_VULKAN_FUNCTION(vkDestroyPipeline) +XE_UI_VULKAN_FUNCTION(vkDestroyPipelineCache) +XE_UI_VULKAN_FUNCTION(vkDestroyPipelineLayout) +XE_UI_VULKAN_FUNCTION(vkDestroyRenderPass) +XE_UI_VULKAN_FUNCTION(vkDestroySampler) +XE_UI_VULKAN_FUNCTION(vkDestroySemaphore) +XE_UI_VULKAN_FUNCTION(vkDestroyShaderModule) +XE_UI_VULKAN_FUNCTION(vkEndCommandBuffer) +XE_UI_VULKAN_FUNCTION(vkFlushMappedMemoryRanges) +XE_UI_VULKAN_FUNCTION(vkFreeCommandBuffers) +XE_UI_VULKAN_FUNCTION(vkFreeDescriptorSets) +XE_UI_VULKAN_FUNCTION(vkFreeMemory) +XE_UI_VULKAN_FUNCTION(vkGetDeviceQueue) +XE_UI_VULKAN_FUNCTION(vkGetBufferMemoryRequirements) +XE_UI_VULKAN_FUNCTION(vkGetFenceStatus) +XE_UI_VULKAN_FUNCTION(vkGetImageMemoryRequirements) +XE_UI_VULKAN_FUNCTION(vkGetImageSubresourceLayout) +XE_UI_VULKAN_FUNCTION(vkGetPipelineCacheData) +XE_UI_VULKAN_FUNCTION(vkMapMemory) +XE_UI_VULKAN_FUNCTION(vkQueueSubmit) +XE_UI_VULKAN_FUNCTION(vkQueueWaitIdle) +XE_UI_VULKAN_FUNCTION(vkResetCommandBuffer) +XE_UI_VULKAN_FUNCTION(vkResetFences) +XE_UI_VULKAN_FUNCTION(vkUnmapMemory) +XE_UI_VULKAN_FUNCTION(vkUpdateDescriptorSets) +XE_UI_VULKAN_FUNCTION(vkWaitForFences) diff --git a/src/xenia/ui/vulkan/functions/device_amd_shader_info.inc b/src/xenia/ui/vulkan/functions/device_amd_shader_info.inc new file mode 100644 index 000000000..2da2b31b6 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/device_amd_shader_info.inc @@ -0,0 +1,2 @@ +// VK_AMD_shader_info functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkGetShaderInfoAMD) diff --git a/src/xenia/ui/vulkan/functions/device_ext_debug_marker.inc b/src/xenia/ui/vulkan/functions/device_ext_debug_marker.inc new file mode 100644 index 000000000..11a44aa81 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/device_ext_debug_marker.inc @@ -0,0 +1,5 @@ +// VK_EXT_debug_marker functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkDebugMarkerSetObjectNameEXT) +XE_UI_VULKAN_FUNCTION(vkCmdDebugMarkerBeginEXT) +XE_UI_VULKAN_FUNCTION(vkCmdDebugMarkerEndEXT) +XE_UI_VULKAN_FUNCTION(vkCmdDebugMarkerInsertEXT) diff --git a/src/xenia/ui/vulkan/functions/device_khr_swapchain.inc b/src/xenia/ui/vulkan/functions/device_khr_swapchain.inc new file mode 100644 index 000000000..435d88a82 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/device_khr_swapchain.inc @@ -0,0 +1,6 @@ +// VK_KHR_swapchain functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkAcquireNextImageKHR) +XE_UI_VULKAN_FUNCTION(vkCreateSwapchainKHR) +XE_UI_VULKAN_FUNCTION(vkDestroySwapchainKHR) +XE_UI_VULKAN_FUNCTION(vkGetSwapchainImagesKHR) +XE_UI_VULKAN_FUNCTION(vkQueuePresentKHR) diff --git a/src/xenia/ui/vulkan/functions/instance_1_0.inc b/src/xenia/ui/vulkan/functions/instance_1_0.inc new file mode 100644 index 000000000..8fbb7f8ca --- /dev/null +++ b/src/xenia/ui/vulkan/functions/instance_1_0.inc @@ -0,0 +1,13 @@ +// Vulkan 1.0 core instance functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkCreateDevice) +XE_UI_VULKAN_FUNCTION(vkDestroyDevice) +XE_UI_VULKAN_FUNCTION(vkEnumerateDeviceExtensionProperties) +XE_UI_VULKAN_FUNCTION(vkEnumerateDeviceLayerProperties) +XE_UI_VULKAN_FUNCTION(vkEnumeratePhysicalDevices) +XE_UI_VULKAN_FUNCTION(vkGetDeviceProcAddr) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceFeatures) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceFormatProperties) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceImageFormatProperties) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceMemoryProperties) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceProperties) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceQueueFamilyProperties) diff --git a/src/xenia/ui/vulkan/functions/instance_ext_debug_report.inc b/src/xenia/ui/vulkan/functions/instance_ext_debug_report.inc new file mode 100644 index 000000000..4d57b9552 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/instance_ext_debug_report.inc @@ -0,0 +1,3 @@ +// VK_EXT_debug_report functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkCreateDebugReportCallbackEXT) +XE_UI_VULKAN_FUNCTION(vkDestroyDebugReportCallbackEXT) diff --git a/src/xenia/ui/vulkan/functions/instance_khr_android_surface.inc b/src/xenia/ui/vulkan/functions/instance_khr_android_surface.inc new file mode 100644 index 000000000..7449ac2d1 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/instance_khr_android_surface.inc @@ -0,0 +1,2 @@ +// VK_KHR_android_surface functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkCreateAndroidSurfaceKHR) diff --git a/src/xenia/ui/vulkan/functions/instance_khr_surface.inc b/src/xenia/ui/vulkan/functions/instance_khr_surface.inc new file mode 100644 index 000000000..ca3efdebf --- /dev/null +++ b/src/xenia/ui/vulkan/functions/instance_khr_surface.inc @@ -0,0 +1,6 @@ +// VK_KHR_surface functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkDestroySurfaceKHR) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceSurfaceCapabilitiesKHR) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceSurfaceFormatsKHR) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceSurfacePresentModesKHR) +XE_UI_VULKAN_FUNCTION(vkGetPhysicalDeviceSurfaceSupportKHR) diff --git a/src/xenia/ui/vulkan/functions/instance_khr_win32_surface.inc b/src/xenia/ui/vulkan/functions/instance_khr_win32_surface.inc new file mode 100644 index 000000000..bbda68af6 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/instance_khr_win32_surface.inc @@ -0,0 +1,2 @@ +// VK_KHR_win32_surface functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkCreateWin32SurfaceKHR) diff --git a/src/xenia/ui/vulkan/functions/instance_khr_xcb_surface.inc b/src/xenia/ui/vulkan/functions/instance_khr_xcb_surface.inc new file mode 100644 index 000000000..4faa37b75 --- /dev/null +++ b/src/xenia/ui/vulkan/functions/instance_khr_xcb_surface.inc @@ -0,0 +1,2 @@ +// VK_KHR_xcb_surface functions used in Xenia. +XE_UI_VULKAN_FUNCTION(vkCreateXcbSurfaceKHR) diff --git a/src/xenia/ui/vulkan/premake5.lua b/src/xenia/ui/vulkan/premake5.lua index 6d2137567..3f675ad0a 100644 --- a/src/xenia/ui/vulkan/premake5.lua +++ b/src/xenia/ui/vulkan/premake5.lua @@ -18,6 +18,7 @@ project("xenia-ui-vulkan") project_root.."/third_party/vulkan/", }) local_platform_files() + local_platform_files("functions") files({ "shaders/bin/*.h", }) @@ -31,7 +32,6 @@ project("xenia-ui-window-vulkan-demo") links({ "fmt", "imgui", - "volk", "xenia-base", "xenia-ui", "xenia-ui-spirv", diff --git a/src/xenia/ui/vulkan/vulkan.h b/src/xenia/ui/vulkan/vulkan.h index cebd210ca..9ba44197c 100644 --- a/src/xenia/ui/vulkan/vulkan.h +++ b/src/xenia/ui/vulkan/vulkan.h @@ -10,20 +10,30 @@ #ifndef XENIA_UI_VULKAN_VULKAN_H_ #define XENIA_UI_VULKAN_VULKAN_H_ +#include "xenia/base/cvar.h" #include "xenia/base/platform.h" -#if XE_PLATFORM_WIN32 -#define VK_USE_PLATFORM_WIN32_KHR 1 -#elif XE_PLATFORM_LINUX +#if XE_PLATFORM_ANDROID +#ifndef VK_USE_PLATFORM_ANDROID_KHR +#define VK_USE_PLATFORM_ANDROID_KHR 1 +#endif +#elif XE_PLATFORM_GNU_LINUX +#ifndef VK_USE_PLATFORM_XCB_KHR #define VK_USE_PLATFORM_XCB_KHR 1 -#else -#error Platform not yet supported. -#endif // XE_PLATFORM_WIN32 +#endif +#elif XE_PLATFORM_WIN32 +// Must be included before vulkan.h with VK_USE_PLATFORM_WIN32_KHR because it +// includes Windows.h too. +#include "xenia/base/platform_win.h" +#ifndef VK_USE_PLATFORM_WIN32_KHR +#define VK_USE_PLATFORM_WIN32_KHR 1 +#endif +#endif -// We use a loader with its own function prototypes. -#include "third_party/volk/volk.h" +#ifndef VK_NO_PROTOTYPES +#define VK_NO_PROTOTYPES 1 +#endif #include "third_party/vulkan/vulkan.h" -#include "xenia/base/cvar.h" #define XELOGVK XELOGI diff --git a/src/xenia/ui/vulkan/vulkan_context.cc b/src/xenia/ui/vulkan/vulkan_context.cc index 76101c6b7..50a4e7a8a 100644 --- a/src/xenia/ui/vulkan/vulkan_context.cc +++ b/src/xenia/ui/vulkan/vulkan_context.cc @@ -25,7 +25,7 @@ #include "xenia/ui/vulkan/vulkan_util.h" #include "xenia/ui/window.h" -#if XE_PLATFORM_LINUX +#if XE_PLATFORM_GNU_LINUX #include "xenia/ui/window_gtk.h" #include @@ -41,10 +41,11 @@ VulkanContext::VulkanContext(VulkanProvider* provider, Window* target_window) VulkanContext::~VulkanContext() { VkResult status; auto provider = static_cast(provider_); - auto device = provider->device(); + VulkanDevice* device = provider->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); { std::lock_guard queue_lock(device->primary_queue_mutex()); - status = vkQueueWaitIdle(device->primary_queue()); + status = dfn.vkQueueWaitIdle(device->primary_queue()); } immediate_drawer_.reset(); swap_chain_.reset(); @@ -52,6 +53,8 @@ VulkanContext::~VulkanContext() { bool VulkanContext::Initialize() { auto provider = static_cast(provider_); + VulkanInstance* instance = provider->instance(); + const VulkanInstance::InstanceFunctions& ifn = instance->ifn(); if (target_window_) { // Create swap chain used to present to the window. @@ -65,10 +68,10 @@ bool VulkanContext::Initialize() { create_info.hinstance = static_cast(target_window_->native_platform_handle()); create_info.hwnd = static_cast(target_window_->native_handle()); - status = vkCreateWin32SurfaceKHR(*provider->instance(), &create_info, - nullptr, &surface); + status = ifn.vkCreateWin32SurfaceKHR(*provider->instance(), &create_info, + nullptr, &surface); CheckResult(status, "vkCreateWin32SurfaceKHR"); -#elif XE_PLATFORM_LINUX +#elif XE_PLATFORM_GNU_LINUX #ifdef GDK_WINDOWING_X11 GtkWidget* window_handle = dynamic_cast(target_window_)->native_window_handle(); @@ -81,8 +84,8 @@ bool VulkanContext::Initialize() { create_info.connection = static_cast( target_window_->native_platform_handle()); create_info.window = static_cast(window); - status = vkCreateXcbSurfaceKHR(*provider->instance(), &create_info, nullptr, - &surface); + status = ifn.vkCreateXcbSurfaceKHR(*provider->instance(), &create_info, + nullptr, &surface); CheckResult(status, "vkCreateXcbSurfaceKHR"); #else #error Unsupported GDK Backend on Linux. @@ -95,8 +98,8 @@ bool VulkanContext::Initialize() { return false; } - swap_chain_ = std::make_unique(provider->instance(), - provider->device()); + swap_chain_ = + std::make_unique(instance, provider->device()); if (swap_chain_->Initialize(surface) != VK_SUCCESS) { XELOGE("Unable to initialize swap chain"); return false; @@ -139,7 +142,8 @@ void VulkanContext::ClearCurrent() {} bool VulkanContext::BeginSwap() { SCOPE_profile_cpu_f("gpu"); auto provider = static_cast(provider_); - auto device = provider->device(); + VulkanDevice* device = provider->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); VkResult status; @@ -164,15 +168,16 @@ bool VulkanContext::BeginSwap() { // TODO(benvanik): use a fence instead? May not be possible with target image. std::lock_guard queue_lock(device->primary_queue_mutex()); - status = vkQueueWaitIdle(device->primary_queue()); + status = dfn.vkQueueWaitIdle(device->primary_queue()); return true; } void VulkanContext::EndSwap() { SCOPE_profile_cpu_f("gpu"); - auto provider = static_cast(provider_); - auto device = provider->device(); + auto provider = static_cast(provider_); + VulkanDevice* device = provider->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); VkResult status; @@ -188,7 +193,7 @@ void VulkanContext::EndSwap() { // Wait until the queue is idle. // TODO(benvanik): is this required? std::lock_guard queue_lock(device->primary_queue_mutex()); - status = vkQueueWaitIdle(device->primary_queue()); + status = dfn.vkQueueWaitIdle(device->primary_queue()); } std::unique_ptr VulkanContext::Capture() { diff --git a/src/xenia/ui/vulkan/vulkan_device.cc b/src/xenia/ui/vulkan/vulkan_device.cc index 275a45070..704e43c2d 100644 --- a/src/xenia/ui/vulkan/vulkan_device.cc +++ b/src/xenia/ui/vulkan/vulkan_device.cc @@ -11,6 +11,7 @@ #include #include +#include #include #include @@ -68,7 +69,8 @@ VulkanDevice::VulkanDevice(VulkanInstance* instance) : instance_(instance) { VulkanDevice::~VulkanDevice() { if (handle) { - vkDestroyDevice(handle, nullptr); + const VulkanInstance::InstanceFunctions& ifn = instance_->ifn(); + ifn.vkDestroyDevice(handle, nullptr); handle = nullptr; } } @@ -91,9 +93,11 @@ bool VulkanDevice::Initialize(DeviceInfo device_info) { return false; } + const VulkanInstance::InstanceFunctions& ifn = instance_->ifn(); + // Query supported features so we can make sure we have what we need. VkPhysicalDeviceFeatures supported_features; - vkGetPhysicalDeviceFeatures(device_info.handle, &supported_features); + ifn.vkGetPhysicalDeviceFeatures(device_info.handle, &supported_features); VkPhysicalDeviceFeatures enabled_features = {0}; bool any_features_missing = false; #define ENABLE_AND_EXPECT(name) \ @@ -189,7 +193,8 @@ bool VulkanDevice::Initialize(DeviceInfo device_info) { create_info.ppEnabledExtensionNames = enabled_extensions_.data(); create_info.pEnabledFeatures = &enabled_features; - auto err = vkCreateDevice(device_info.handle, &create_info, nullptr, &handle); + auto err = + ifn.vkCreateDevice(device_info.handle, &create_info, nullptr, &handle); switch (err) { case VK_SUCCESS: // Ok! @@ -211,30 +216,34 @@ bool VulkanDevice::Initialize(DeviceInfo device_info) { return false; } - // Set flags so we can track enabled extensions easily. - for (auto& ext : enabled_extensions_) { - if (!std::strcmp(ext, VK_EXT_DEBUG_MARKER_EXTENSION_NAME)) { - debug_marker_ena_ = true; - pfn_vkDebugMarkerSetObjectNameEXT_ = - (PFN_vkDebugMarkerSetObjectNameEXT)vkGetDeviceProcAddr( - *this, "vkDebugMarkerSetObjectNameEXT"); - pfn_vkCmdDebugMarkerBeginEXT_ = - (PFN_vkCmdDebugMarkerBeginEXT)vkGetDeviceProcAddr( - *this, "vkCmdDebugMarkerBeginEXT"); - pfn_vkCmdDebugMarkerEndEXT_ = - (PFN_vkCmdDebugMarkerEndEXT)vkGetDeviceProcAddr( - *this, "vkCmdDebugMarkerEndEXT"); - pfn_vkCmdDebugMarkerInsertEXT_ = - (PFN_vkCmdDebugMarkerInsertEXT)vkGetDeviceProcAddr( - *this, "vkCmdDebugMarkerInsertEXT"); - } + // Get device functions. + std::memset(&dfn_, 0, sizeof(dfn_)); + bool device_functions_loaded = true; + debug_marker_ena_ = false; +#define XE_UI_VULKAN_FUNCTION(name) \ + device_functions_loaded &= \ + (dfn_.name = PFN_##name(ifn.vkGetDeviceProcAddr(handle, #name))) != \ + nullptr; +#include "xenia/ui/vulkan/functions/device_1_0.inc" +#include "xenia/ui/vulkan/functions/device_khr_swapchain.inc" + if (HasEnabledExtension(VK_AMD_SHADER_INFO_EXTENSION_NAME)) { +#include "xenia/ui/vulkan/functions/device_amd_shader_info.inc" + } + debug_marker_ena_ = HasEnabledExtension(VK_EXT_DEBUG_MARKER_EXTENSION_NAME); + if (debug_marker_ena_) { +#include "xenia/ui/vulkan/functions/device_ext_debug_marker.inc" + } +#undef XE_UI_VULKAN_FUNCTION + if (!device_functions_loaded) { + XELOGE("Failed to get Vulkan device function pointers"); + return false; } device_info_ = std::move(device_info); queue_family_index_ = ideal_queue_family_index; // Get the primary queue used for most submissions/etc. - vkGetDeviceQueue(handle, queue_family_index_, 0, &primary_queue_); + dfn_.vkGetDeviceQueue(handle, queue_family_index_, 0, &primary_queue_); if (!primary_queue_) { XELOGE("vkGetDeviceQueue returned nullptr!"); return false; @@ -253,7 +262,7 @@ bool VulkanDevice::Initialize(DeviceInfo device_info) { continue; } - vkGetDeviceQueue(handle, i, j, &queue); + dfn_.vkGetDeviceQueue(handle, i, j, &queue); if (queue) { free_queues_[i].push_back(queue); } @@ -292,8 +301,8 @@ void VulkanDevice::ReleaseQueue(VkQueue queue, uint32_t queue_family_index) { void VulkanDevice::DbgSetObjectName(uint64_t object, VkDebugReportObjectTypeEXT object_type, - std::string name) { - if (!debug_marker_ena_ || pfn_vkDebugMarkerSetObjectNameEXT_ == nullptr) { + const std::string& name) const { + if (!debug_marker_ena_) { // Extension disabled. return; } @@ -304,13 +313,13 @@ void VulkanDevice::DbgSetObjectName(uint64_t object, info.objectType = object_type; info.object = object; info.pObjectName = name.c_str(); - pfn_vkDebugMarkerSetObjectNameEXT_(*this, &info); + dfn_.vkDebugMarkerSetObjectNameEXT(*this, &info); } void VulkanDevice::DbgMarkerBegin(VkCommandBuffer command_buffer, std::string name, float r, float g, float b, - float a) { - if (!debug_marker_ena_ || pfn_vkCmdDebugMarkerBeginEXT_ == nullptr) { + float a) const { + if (!debug_marker_ena_) { // Extension disabled. return; } @@ -323,22 +332,22 @@ void VulkanDevice::DbgMarkerBegin(VkCommandBuffer command_buffer, info.color[1] = g; info.color[2] = b; info.color[3] = a; - pfn_vkCmdDebugMarkerBeginEXT_(command_buffer, &info); + dfn_.vkCmdDebugMarkerBeginEXT(command_buffer, &info); } -void VulkanDevice::DbgMarkerEnd(VkCommandBuffer command_buffer) { - if (!debug_marker_ena_ || pfn_vkCmdDebugMarkerEndEXT_ == nullptr) { +void VulkanDevice::DbgMarkerEnd(VkCommandBuffer command_buffer) const { + if (!debug_marker_ena_) { // Extension disabled. return; } - pfn_vkCmdDebugMarkerEndEXT_(command_buffer); + dfn_.vkCmdDebugMarkerEndEXT(command_buffer); } void VulkanDevice::DbgMarkerInsert(VkCommandBuffer command_buffer, std::string name, float r, float g, float b, - float a) { - if (!debug_marker_ena_ || pfn_vkCmdDebugMarkerInsertEXT_ == nullptr) { + float a) const { + if (!debug_marker_ena_) { // Extension disabled. return; } @@ -351,7 +360,7 @@ void VulkanDevice::DbgMarkerInsert(VkCommandBuffer command_buffer, info.color[1] = g; info.color[2] = g; info.color[3] = b; - pfn_vkCmdDebugMarkerInsertEXT_(command_buffer, &info); + dfn_.vkCmdDebugMarkerInsertEXT(command_buffer, &info); } bool VulkanDevice::is_renderdoc_attached() const { @@ -379,7 +388,8 @@ void VulkanDevice::EndRenderDocFrameCapture() { } VkDeviceMemory VulkanDevice::AllocateMemory( - const VkMemoryRequirements& requirements, VkFlags required_properties) { + const VkMemoryRequirements& requirements, + VkFlags required_properties) const { // Search memory types to find one matching our requirements and our // properties. uint32_t type_index = UINT_MAX; @@ -407,7 +417,7 @@ VkDeviceMemory VulkanDevice::AllocateMemory( memory_info.allocationSize = requirements.size; memory_info.memoryTypeIndex = type_index; VkDeviceMemory memory = nullptr; - auto err = vkAllocateMemory(handle, &memory_info, nullptr, &memory); + auto err = dfn_.vkAllocateMemory(handle, &memory_info, nullptr, &memory); CheckResult(err, "vkAllocateMemory"); return memory; } diff --git a/src/xenia/ui/vulkan/vulkan_device.h b/src/xenia/ui/vulkan/vulkan_device.h index 498e6da28..30af10040 100644 --- a/src/xenia/ui/vulkan/vulkan_device.h +++ b/src/xenia/ui/vulkan/vulkan_device.h @@ -32,11 +32,23 @@ class VulkanDevice { VulkanDevice(VulkanInstance* instance); ~VulkanDevice(); + VulkanInstance* instance() const { return instance_; } + VkDevice handle = nullptr; operator VkDevice() const { return handle; } operator VkPhysicalDevice() const { return device_info_.handle; } + struct DeviceFunctions { +#define XE_UI_VULKAN_FUNCTION(name) PFN_##name name; +#include "xenia/ui/vulkan/functions/device_1_0.inc" +#include "xenia/ui/vulkan/functions/device_amd_shader_info.inc" +#include "xenia/ui/vulkan/functions/device_ext_debug_marker.inc" +#include "xenia/ui/vulkan/functions/device_khr_swapchain.inc" +#undef XE_UI_VULKAN_FUNCTION + }; + const DeviceFunctions& dfn() const { return dfn_; } + // Declares a layer to verify and enable upon initialization. // Must be called before Initialize. void DeclareRequiredLayer(std::string name, uint32_t min_version, @@ -78,16 +90,16 @@ class VulkanDevice { void ReleaseQueue(VkQueue queue, uint32_t queue_family_index); void DbgSetObjectName(uint64_t object, VkDebugReportObjectTypeEXT object_type, - std::string name); + const std::string& name) const; void DbgMarkerBegin(VkCommandBuffer command_buffer, std::string name, float r = 0.0f, float g = 0.0f, float b = 0.0f, - float a = 0.0f); - void DbgMarkerEnd(VkCommandBuffer command_buffer); + float a = 0.0f) const; + void DbgMarkerEnd(VkCommandBuffer command_buffer) const; void DbgMarkerInsert(VkCommandBuffer command_buffer, std::string name, float r = 0.0f, float g = 0.0f, float b = 0.0f, - float a = 0.0f); + float a = 0.0f) const; // True if RenderDoc is attached and available for use. bool is_renderdoc_attached() const; @@ -101,7 +113,7 @@ class VulkanDevice { // Allocates memory of the given size matching the required properties. VkDeviceMemory AllocateMemory( const VkMemoryRequirements& requirements, - VkFlags required_properties = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT); + VkFlags required_properties = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT) const; private: VulkanInstance* instance_ = nullptr; @@ -110,6 +122,8 @@ class VulkanDevice { std::vector required_extensions_; std::vector enabled_extensions_; + DeviceFunctions dfn_ = {}; + bool debug_marker_ena_ = false; PFN_vkDebugMarkerSetObjectNameEXT pfn_vkDebugMarkerSetObjectNameEXT_ = nullptr; diff --git a/src/xenia/ui/vulkan/vulkan_immediate_drawer.cc b/src/xenia/ui/vulkan/vulkan_immediate_drawer.cc index a7aac5eae..6d95143ba 100644 --- a/src/xenia/ui/vulkan/vulkan_immediate_drawer.cc +++ b/src/xenia/ui/vulkan/vulkan_immediate_drawer.cc @@ -29,9 +29,11 @@ constexpr uint32_t kCircularBufferCapacity = 2 * 1024 * 1024; class LightweightCircularBuffer { public: - LightweightCircularBuffer(VulkanDevice* device) : device_(*device) { + LightweightCircularBuffer(const VulkanDevice* device) : device_(*device) { buffer_capacity_ = xe::round_up(kCircularBufferCapacity, 4096); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); + // Index buffer. VkBufferCreateInfo index_buffer_info; index_buffer_info.sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO; @@ -42,8 +44,8 @@ class LightweightCircularBuffer { index_buffer_info.sharingMode = VK_SHARING_MODE_EXCLUSIVE; index_buffer_info.queueFamilyIndexCount = 0; index_buffer_info.pQueueFamilyIndices = nullptr; - auto status = - vkCreateBuffer(device_, &index_buffer_info, nullptr, &index_buffer_); + auto status = dfn.vkCreateBuffer(device_, &index_buffer_info, nullptr, + &index_buffer_); CheckResult(status, "vkCreateBuffer"); // Vertex buffer. @@ -56,34 +58,37 @@ class LightweightCircularBuffer { vertex_buffer_info.sharingMode = VK_SHARING_MODE_EXCLUSIVE; vertex_buffer_info.queueFamilyIndexCount = 0; vertex_buffer_info.pQueueFamilyIndices = nullptr; - status = - vkCreateBuffer(*device, &vertex_buffer_info, nullptr, &vertex_buffer_); + status = dfn.vkCreateBuffer(*device, &vertex_buffer_info, nullptr, + &vertex_buffer_); CheckResult(status, "vkCreateBuffer"); // Allocate underlying buffer. // We alias it for both vertices and indices. VkMemoryRequirements buffer_requirements; - vkGetBufferMemoryRequirements(device_, index_buffer_, &buffer_requirements); + dfn.vkGetBufferMemoryRequirements(device_, index_buffer_, + &buffer_requirements); buffer_memory_ = device->AllocateMemory( buffer_requirements, VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT); - vkBindBufferMemory(*device, index_buffer_, buffer_memory_, 0); - vkBindBufferMemory(*device, vertex_buffer_, buffer_memory_, 0); + dfn.vkBindBufferMemory(*device, index_buffer_, buffer_memory_, 0); + dfn.vkBindBufferMemory(*device, vertex_buffer_, buffer_memory_, 0); // Persistent mapping. - status = vkMapMemory(device_, buffer_memory_, 0, VK_WHOLE_SIZE, 0, - &buffer_data_); + status = dfn.vkMapMemory(device_, buffer_memory_, 0, VK_WHOLE_SIZE, 0, + &buffer_data_); CheckResult(status, "vkMapMemory"); } ~LightweightCircularBuffer() { + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); + if (buffer_memory_) { - vkUnmapMemory(device_, buffer_memory_); + dfn.vkUnmapMemory(device_, buffer_memory_); buffer_memory_ = nullptr; } - VK_SAFE_DESTROY(vkDestroyBuffer, device_, index_buffer_, nullptr); - VK_SAFE_DESTROY(vkDestroyBuffer, device_, vertex_buffer_, nullptr); - VK_SAFE_DESTROY(vkFreeMemory, device_, buffer_memory_, nullptr); + DestroyAndNullHandle(dfn.vkDestroyBuffer, device_, index_buffer_); + DestroyAndNullHandle(dfn.vkDestroyBuffer, device_, vertex_buffer_); + DestroyAndNullHandle(dfn.vkFreeMemory, device_, buffer_memory_); } VkBuffer vertex_buffer() const { return vertex_buffer_; } @@ -118,18 +123,19 @@ class LightweightCircularBuffer { // Flush memory. // TODO(benvanik): do only in large batches? can barrier it. + const VulkanDevice::DeviceFunctions& dfn = device_.dfn(); VkMappedMemoryRange dirty_range; dirty_range.sType = VK_STRUCTURE_TYPE_MAPPED_MEMORY_RANGE; dirty_range.pNext = nullptr; dirty_range.memory = buffer_memory_; dirty_range.offset = offset; dirty_range.size = source_length; - vkFlushMappedMemoryRanges(device_, 1, &dirty_range); + dfn.vkFlushMappedMemoryRanges(device_, 1, &dirty_range); return offset; } private: - VkDevice device_ = nullptr; + const VulkanDevice& device_; VkBuffer index_buffer_ = nullptr; VkBuffer vertex_buffer_ = nullptr; @@ -153,6 +159,7 @@ class VulkanImmediateTexture : public ImmediateTexture { VkResult Initialize(VkDescriptorSetLayout descriptor_set_layout, VkImageView image_view) { image_view_ = image_view; + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; // Create descriptor set used just for this texture. @@ -163,8 +170,8 @@ class VulkanImmediateTexture : public ImmediateTexture { set_alloc_info.descriptorPool = descriptor_pool_; set_alloc_info.descriptorSetCount = 1; set_alloc_info.pSetLayouts = &descriptor_set_layout; - status = - vkAllocateDescriptorSets(*device_, &set_alloc_info, &descriptor_set_); + status = dfn.vkAllocateDescriptorSets(*device_, &set_alloc_info, + &descriptor_set_); CheckResult(status, "vkAllocateDescriptorSets"); if (status != VK_SUCCESS) { return status; @@ -184,12 +191,13 @@ class VulkanImmediateTexture : public ImmediateTexture { descriptor_write.descriptorCount = 1; descriptor_write.descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER; descriptor_write.pImageInfo = &texture_info; - vkUpdateDescriptorSets(*device_, 1, &descriptor_write, 0, nullptr); + dfn.vkUpdateDescriptorSets(*device_, 1, &descriptor_write, 0, nullptr); return VK_SUCCESS; } VkResult Initialize(VkDescriptorSetLayout descriptor_set_layout) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; // Create image object. @@ -209,7 +217,7 @@ class VulkanImmediateTexture : public ImmediateTexture { image_info.queueFamilyIndexCount = 0; image_info.pQueueFamilyIndices = nullptr; image_info.initialLayout = VK_IMAGE_LAYOUT_PREINITIALIZED; - status = vkCreateImage(*device_, &image_info, nullptr, &image_); + status = dfn.vkCreateImage(*device_, &image_info, nullptr, &image_); CheckResult(status, "vkCreateImage"); if (status != VK_SUCCESS) { return status; @@ -217,7 +225,7 @@ class VulkanImmediateTexture : public ImmediateTexture { // Allocate memory for the image. VkMemoryRequirements memory_requirements; - vkGetImageMemoryRequirements(*device_, image_, &memory_requirements); + dfn.vkGetImageMemoryRequirements(*device_, image_, &memory_requirements); device_memory_ = device_->AllocateMemory( memory_requirements, VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT); if (!device_memory_) { @@ -225,7 +233,7 @@ class VulkanImmediateTexture : public ImmediateTexture { } // Bind memory and the image together. - status = vkBindImageMemory(*device_, image_, device_memory_, 0); + status = dfn.vkBindImageMemory(*device_, image_, device_memory_, 0); CheckResult(status, "vkBindImageMemory"); if (status != VK_SUCCESS) { return status; @@ -246,7 +254,7 @@ class VulkanImmediateTexture : public ImmediateTexture { VK_COMPONENT_SWIZZLE_A, }; view_info.subresourceRange = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}; - status = vkCreateImageView(*device_, &view_info, nullptr, &image_view_); + status = dfn.vkCreateImageView(*device_, &view_info, nullptr, &image_view_); CheckResult(status, "vkCreateImageView"); if (status != VK_SUCCESS) { return status; @@ -260,8 +268,8 @@ class VulkanImmediateTexture : public ImmediateTexture { set_alloc_info.descriptorPool = descriptor_pool_; set_alloc_info.descriptorSetCount = 1; set_alloc_info.pSetLayouts = &descriptor_set_layout; - status = - vkAllocateDescriptorSets(*device_, &set_alloc_info, &descriptor_set_); + status = dfn.vkAllocateDescriptorSets(*device_, &set_alloc_info, + &descriptor_set_); CheckResult(status, "vkAllocateDescriptorSets"); if (status != VK_SUCCESS) { return status; @@ -281,44 +289,48 @@ class VulkanImmediateTexture : public ImmediateTexture { descriptor_write.descriptorCount = 1; descriptor_write.descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER; descriptor_write.pImageInfo = &texture_info; - vkUpdateDescriptorSets(*device_, 1, &descriptor_write, 0, nullptr); + dfn.vkUpdateDescriptorSets(*device_, 1, &descriptor_write, 0, nullptr); return VK_SUCCESS; } void Shutdown() { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + if (descriptor_set_) { - vkFreeDescriptorSets(*device_, descriptor_pool_, 1, &descriptor_set_); + dfn.vkFreeDescriptorSets(*device_, descriptor_pool_, 1, &descriptor_set_); descriptor_set_ = nullptr; } - VK_SAFE_DESTROY(vkDestroyImageView, *device_, image_view_, nullptr); - VK_SAFE_DESTROY(vkDestroyImage, *device_, image_, nullptr); - VK_SAFE_DESTROY(vkFreeMemory, *device_, device_memory_, nullptr); + DestroyAndNullHandle(dfn.vkDestroyImageView, *device_, image_view_); + DestroyAndNullHandle(dfn.vkDestroyImage, *device_, image_); + DestroyAndNullHandle(dfn.vkFreeMemory, *device_, device_memory_); } VkResult Upload(const uint8_t* src_data) { // TODO(benvanik): assert not in use? textures aren't dynamic right now. + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + // Get device image layout. VkImageSubresource subresource; subresource.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT; subresource.mipLevel = 0; subresource.arrayLayer = 0; VkSubresourceLayout layout; - vkGetImageSubresourceLayout(*device_, image_, &subresource, &layout); + dfn.vkGetImageSubresourceLayout(*device_, image_, &subresource, &layout); // Map memory for upload. uint8_t* gpu_data = nullptr; - auto status = vkMapMemory(*device_, device_memory_, 0, layout.size, 0, - reinterpret_cast(&gpu_data)); + auto status = dfn.vkMapMemory(*device_, device_memory_, 0, layout.size, 0, + reinterpret_cast(&gpu_data)); CheckResult(status, "vkMapMemory"); if (status == VK_SUCCESS) { // Copy the entire texture, hoping its layout matches what we expect. std::memcpy(gpu_data + layout.offset, src_data, layout.size); - vkUnmapMemory(*device_, device_memory_); + dfn.vkUnmapMemory(*device_, device_memory_); } return status; @@ -328,6 +340,8 @@ class VulkanImmediateTexture : public ImmediateTexture { // the command buffer WILL be queued and executed by the device. void TransitionLayout(VkCommandBuffer command_buffer, VkImageLayout new_layout) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + VkImageMemoryBarrier image_barrier; image_barrier.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER; image_barrier.pNext = nullptr; @@ -342,16 +356,16 @@ class VulkanImmediateTexture : public ImmediateTexture { image_barrier.subresourceRange.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT; image_layout_ = new_layout; - vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &image_barrier); + dfn.vkCmdPipelineBarrier(command_buffer, VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, + 0, nullptr, 1, &image_barrier); } VkDescriptorSet descriptor_set() const { return descriptor_set_; } VkImageLayout layout() const { return image_layout_; } private: - ui::vulkan::VulkanDevice* device_ = nullptr; + VulkanDevice* device_ = nullptr; VkDescriptorPool descriptor_pool_ = nullptr; VkSampler sampler_ = nullptr; // Not owned. VkImage image_ = nullptr; @@ -367,7 +381,8 @@ VulkanImmediateDrawer::VulkanImmediateDrawer(VulkanContext* graphics_context) VulkanImmediateDrawer::~VulkanImmediateDrawer() { Shutdown(); } VkResult VulkanImmediateDrawer::Initialize() { - auto device = context_->device(); + const VulkanDevice* device = context_->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); // NEAREST + CLAMP VkSamplerCreateInfo sampler_info; @@ -389,8 +404,8 @@ VkResult VulkanImmediateDrawer::Initialize() { sampler_info.maxLod = 0.0f; sampler_info.borderColor = VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE; sampler_info.unnormalizedCoordinates = VK_FALSE; - auto status = vkCreateSampler(*device, &sampler_info, nullptr, - &samplers_.nearest_clamp); + auto status = dfn.vkCreateSampler(*device, &sampler_info, nullptr, + &samplers_.nearest_clamp); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return status; @@ -400,8 +415,8 @@ VkResult VulkanImmediateDrawer::Initialize() { sampler_info.addressModeU = VK_SAMPLER_ADDRESS_MODE_REPEAT; sampler_info.addressModeV = VK_SAMPLER_ADDRESS_MODE_REPEAT; sampler_info.addressModeW = VK_SAMPLER_ADDRESS_MODE_REPEAT; - status = vkCreateSampler(*device, &sampler_info, nullptr, - &samplers_.nearest_repeat); + status = dfn.vkCreateSampler(*device, &sampler_info, nullptr, + &samplers_.nearest_repeat); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return status; @@ -413,8 +428,8 @@ VkResult VulkanImmediateDrawer::Initialize() { sampler_info.addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE; sampler_info.addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE; sampler_info.addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE; - status = - vkCreateSampler(*device, &sampler_info, nullptr, &samplers_.linear_clamp); + status = dfn.vkCreateSampler(*device, &sampler_info, nullptr, + &samplers_.linear_clamp); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return status; @@ -424,8 +439,8 @@ VkResult VulkanImmediateDrawer::Initialize() { sampler_info.addressModeU = VK_SAMPLER_ADDRESS_MODE_REPEAT; sampler_info.addressModeV = VK_SAMPLER_ADDRESS_MODE_REPEAT; sampler_info.addressModeW = VK_SAMPLER_ADDRESS_MODE_REPEAT; - status = vkCreateSampler(*device, &sampler_info, nullptr, - &samplers_.linear_repeat); + status = dfn.vkCreateSampler(*device, &sampler_info, nullptr, + &samplers_.linear_repeat); CheckResult(status, "vkCreateSampler"); if (status != VK_SUCCESS) { return status; @@ -447,8 +462,8 @@ VkResult VulkanImmediateDrawer::Initialize() { texture_binding.stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT; texture_binding.pImmutableSamplers = nullptr; texture_set_layout_info.pBindings = &texture_binding; - status = vkCreateDescriptorSetLayout(*device, &texture_set_layout_info, - nullptr, &texture_set_layout_); + status = dfn.vkCreateDescriptorSetLayout(*device, &texture_set_layout_info, + nullptr, &texture_set_layout_); CheckResult(status, "vkCreateDescriptorSetLayout"); if (status != VK_SUCCESS) { return status; @@ -468,8 +483,8 @@ VkResult VulkanImmediateDrawer::Initialize() { pool_sizes[0].descriptorCount = 128; descriptor_pool_info.poolSizeCount = 1; descriptor_pool_info.pPoolSizes = pool_sizes; - status = vkCreateDescriptorPool(*device, &descriptor_pool_info, nullptr, - &descriptor_pool_); + status = dfn.vkCreateDescriptorPool(*device, &descriptor_pool_info, nullptr, + &descriptor_pool_); CheckResult(status, "vkCreateDescriptorPool"); if (status != VK_SUCCESS) { return status; @@ -495,8 +510,8 @@ VkResult VulkanImmediateDrawer::Initialize() { pipeline_layout_info.pushConstantRangeCount = static_cast(xe::countof(push_constant_ranges)); pipeline_layout_info.pPushConstantRanges = push_constant_ranges; - status = vkCreatePipelineLayout(*device, &pipeline_layout_info, nullptr, - &pipeline_layout_); + status = dfn.vkCreatePipelineLayout(*device, &pipeline_layout_info, nullptr, + &pipeline_layout_); CheckResult(status, "vkCreatePipelineLayout"); if (status != VK_SUCCESS) { return status; @@ -510,8 +525,8 @@ VkResult VulkanImmediateDrawer::Initialize() { vertex_shader_info.codeSize = sizeof(immediate_vert); vertex_shader_info.pCode = reinterpret_cast(immediate_vert); VkShaderModule vertex_shader; - status = vkCreateShaderModule(*device, &vertex_shader_info, nullptr, - &vertex_shader); + status = dfn.vkCreateShaderModule(*device, &vertex_shader_info, nullptr, + &vertex_shader); CheckResult(status, "vkCreateShaderModule"); VkShaderModuleCreateInfo fragment_shader_info; fragment_shader_info.sType = VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO; @@ -521,8 +536,8 @@ VkResult VulkanImmediateDrawer::Initialize() { fragment_shader_info.pCode = reinterpret_cast(immediate_frag); VkShaderModule fragment_shader; - status = vkCreateShaderModule(*device, &fragment_shader_info, nullptr, - &fragment_shader); + status = dfn.vkCreateShaderModule(*device, &fragment_shader_info, nullptr, + &fragment_shader); CheckResult(status, "vkCreateShaderModule"); // Pipeline used when rendering triangles. @@ -667,8 +682,8 @@ VkResult VulkanImmediateDrawer::Initialize() { pipeline_info.basePipelineHandle = nullptr; pipeline_info.basePipelineIndex = -1; if (status == VK_SUCCESS) { - status = vkCreateGraphicsPipelines(*device, nullptr, 1, &pipeline_info, - nullptr, &triangle_pipeline_); + status = dfn.vkCreateGraphicsPipelines(*device, nullptr, 1, &pipeline_info, + nullptr, &triangle_pipeline_); CheckResult(status, "vkCreateGraphicsPipelines"); } @@ -678,13 +693,13 @@ VkResult VulkanImmediateDrawer::Initialize() { pipeline_info.basePipelineHandle = triangle_pipeline_; pipeline_info.basePipelineIndex = -1; if (status == VK_SUCCESS) { - status = vkCreateGraphicsPipelines(*device, nullptr, 1, &pipeline_info, - nullptr, &line_pipeline_); + status = dfn.vkCreateGraphicsPipelines(*device, nullptr, 1, &pipeline_info, + nullptr, &line_pipeline_); CheckResult(status, "vkCreateGraphicsPipelines"); } - VK_SAFE_DESTROY(vkDestroyShaderModule, *device, vertex_shader, nullptr); - VK_SAFE_DESTROY(vkDestroyShaderModule, *device, fragment_shader, nullptr); + DestroyAndNullHandle(dfn.vkDestroyShaderModule, *device, vertex_shader); + DestroyAndNullHandle(dfn.vkDestroyShaderModule, *device, fragment_shader); // Allocate the buffer we'll use for our vertex and index data. circular_buffer_ = std::make_unique(device); @@ -693,22 +708,23 @@ VkResult VulkanImmediateDrawer::Initialize() { } void VulkanImmediateDrawer::Shutdown() { - auto device = context_->device(); + const VulkanDevice* device = context_->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); circular_buffer_.reset(); - VK_SAFE_DESTROY(vkDestroyPipeline, *device, line_pipeline_, nullptr); - VK_SAFE_DESTROY(vkDestroyPipeline, *device, triangle_pipeline_, nullptr); - VK_SAFE_DESTROY(vkDestroyPipelineLayout, *device, pipeline_layout_, nullptr); + DestroyAndNullHandle(dfn.vkDestroyPipeline, *device, line_pipeline_); + DestroyAndNullHandle(dfn.vkDestroyPipeline, *device, triangle_pipeline_); + DestroyAndNullHandle(dfn.vkDestroyPipelineLayout, *device, pipeline_layout_); - VK_SAFE_DESTROY(vkDestroyDescriptorPool, *device, descriptor_pool_, nullptr); - VK_SAFE_DESTROY(vkDestroyDescriptorSetLayout, *device, texture_set_layout_, - nullptr); + DestroyAndNullHandle(dfn.vkDestroyDescriptorPool, *device, descriptor_pool_); + DestroyAndNullHandle(dfn.vkDestroyDescriptorSetLayout, *device, + texture_set_layout_); - VK_SAFE_DESTROY(vkDestroySampler, *device, samplers_.nearest_clamp, nullptr); - VK_SAFE_DESTROY(vkDestroySampler, *device, samplers_.nearest_repeat, nullptr); - VK_SAFE_DESTROY(vkDestroySampler, *device, samplers_.linear_clamp, nullptr); - VK_SAFE_DESTROY(vkDestroySampler, *device, samplers_.linear_repeat, nullptr); + DestroyAndNullHandle(dfn.vkDestroySampler, *device, samplers_.nearest_clamp); + DestroyAndNullHandle(dfn.vkDestroySampler, *device, samplers_.nearest_repeat); + DestroyAndNullHandle(dfn.vkDestroySampler, *device, samplers_.linear_clamp); + DestroyAndNullHandle(dfn.vkDestroySampler, *device, samplers_.linear_repeat); } std::unique_ptr VulkanImmediateDrawer::CreateTexture( @@ -751,7 +767,8 @@ std::unique_ptr VulkanImmediateDrawer::WrapTexture( void VulkanImmediateDrawer::Begin(int render_target_width, int render_target_height) { - auto device = context_->device(); + const VulkanDevice* device = context_->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); auto swap_chain = context_->swap_chain(); assert_null(current_cmd_buffer_); current_cmd_buffer_ = swap_chain->render_cmd_buffer(); @@ -766,7 +783,7 @@ void VulkanImmediateDrawer::Begin(int render_target_width, viewport.height = static_cast(render_target_height); viewport.minDepth = 0.0f; viewport.maxDepth = 1.0f; - vkCmdSetViewport(current_cmd_buffer_, 0, 1, &viewport); + dfn.vkCmdSetViewport(current_cmd_buffer_, 0, 1, &viewport); // Update projection matrix. const float ortho_projection[4][4] = { @@ -775,13 +792,14 @@ void VulkanImmediateDrawer::Begin(int render_target_width, {0.0f, 0.0f, -1.0f, 0.0f}, {-1.0f, 1.0f, 0.0f, 1.0f}, }; - vkCmdPushConstants(current_cmd_buffer_, pipeline_layout_, - VK_SHADER_STAGE_VERTEX_BIT, 0, sizeof(float) * 16, - ortho_projection); + dfn.vkCmdPushConstants(current_cmd_buffer_, pipeline_layout_, + VK_SHADER_STAGE_VERTEX_BIT, 0, sizeof(float) * 16, + ortho_projection); } void VulkanImmediateDrawer::BeginDrawBatch(const ImmediateDrawBatch& batch) { - auto device = context_->device(); + const VulkanDevice* device = context_->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); // Upload vertices. VkDeviceSize vertices_offset = circular_buffer_->Emplace( @@ -791,8 +809,8 @@ void VulkanImmediateDrawer::BeginDrawBatch(const ImmediateDrawBatch& batch) { return; } auto vertex_buffer = circular_buffer_->vertex_buffer(); - vkCmdBindVertexBuffers(current_cmd_buffer_, 0, 1, &vertex_buffer, - &vertices_offset); + dfn.vkCmdBindVertexBuffers(current_cmd_buffer_, 0, 1, &vertex_buffer, + &vertices_offset); // Upload indices. if (batch.indices) { @@ -802,22 +820,27 @@ void VulkanImmediateDrawer::BeginDrawBatch(const ImmediateDrawBatch& batch) { // TODO(benvanik): die? return; } - vkCmdBindIndexBuffer(current_cmd_buffer_, circular_buffer_->index_buffer(), - indices_offset, VK_INDEX_TYPE_UINT16); + dfn.vkCmdBindIndexBuffer(current_cmd_buffer_, + circular_buffer_->index_buffer(), indices_offset, + VK_INDEX_TYPE_UINT16); } batch_has_index_buffer_ = !!batch.indices; } void VulkanImmediateDrawer::Draw(const ImmediateDraw& draw) { + const VulkanDevice* device = context_->device(); + const VulkanDevice::DeviceFunctions& dfn = device->dfn(); + switch (draw.primitive_type) { case ImmediatePrimitiveType::kLines: - vkCmdBindPipeline(current_cmd_buffer_, VK_PIPELINE_BIND_POINT_GRAPHICS, - line_pipeline_); + dfn.vkCmdBindPipeline(current_cmd_buffer_, + VK_PIPELINE_BIND_POINT_GRAPHICS, line_pipeline_); break; case ImmediatePrimitiveType::kTriangles: - vkCmdBindPipeline(current_cmd_buffer_, VK_PIPELINE_BIND_POINT_GRAPHICS, - triangle_pipeline_); + dfn.vkCmdBindPipeline(current_cmd_buffer_, + VK_PIPELINE_BIND_POINT_GRAPHICS, + triangle_pipeline_); break; } @@ -833,18 +856,18 @@ void VulkanImmediateDrawer::Draw(const ImmediateDraw& draw) { XELOGW("Failed to acquire texture descriptor set for immediate drawer!"); } - vkCmdBindDescriptorSets(current_cmd_buffer_, - VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline_layout_, - 0, 1, &texture_set, 0, nullptr); + dfn.vkCmdBindDescriptorSets( + current_cmd_buffer_, VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline_layout_, + 0, 1, &texture_set, 0, nullptr); } // Use push constants for our per-draw changes. // Here, the restrict_texture_samples uniform (was used before September 26, // 2020, now deleted). int restrict_texture_samples = 0; - vkCmdPushConstants(current_cmd_buffer_, pipeline_layout_, - VK_SHADER_STAGE_FRAGMENT_BIT, sizeof(float) * 16, - sizeof(int), &restrict_texture_samples); + dfn.vkCmdPushConstants(current_cmd_buffer_, pipeline_layout_, + VK_SHADER_STAGE_FRAGMENT_BIT, sizeof(float) * 16, + sizeof(int), &restrict_texture_samples); // Scissor, if enabled. // Scissor can be disabled by making it the full screen. @@ -861,14 +884,14 @@ void VulkanImmediateDrawer::Draw(const ImmediateDraw& draw) { scissor.extent.width = current_render_target_width_; scissor.extent.height = current_render_target_height_; } - vkCmdSetScissor(current_cmd_buffer_, 0, 1, &scissor); + dfn.vkCmdSetScissor(current_cmd_buffer_, 0, 1, &scissor); // Issue draw. if (batch_has_index_buffer_) { - vkCmdDrawIndexed(current_cmd_buffer_, draw.count, 1, draw.index_offset, - draw.base_vertex, 0); + dfn.vkCmdDrawIndexed(current_cmd_buffer_, draw.count, 1, draw.index_offset, + draw.base_vertex, 0); } else { - vkCmdDraw(current_cmd_buffer_, draw.count, 1, draw.base_vertex, 0); + dfn.vkCmdDraw(current_cmd_buffer_, draw.count, 1, draw.base_vertex, 0); } } diff --git a/src/xenia/ui/vulkan/vulkan_instance.cc b/src/xenia/ui/vulkan/vulkan_instance.cc index 47ddfcf90..0ccbba7fa 100644 --- a/src/xenia/ui/vulkan/vulkan_instance.cc +++ b/src/xenia/ui/vulkan/vulkan_instance.cc @@ -10,15 +10,16 @@ #include "xenia/ui/vulkan/vulkan_instance.h" #include +#include #include #include #include "third_party/renderdoc/renderdoc_app.h" -#include "third_party/volk/volk.h" #include "xenia/base/assert.h" #include "xenia/base/logging.h" #include "xenia/base/math.h" +#include "xenia/base/platform.h" #include "xenia/base/profiling.h" #include "xenia/ui/vulkan/vulkan.h" #include "xenia/ui/vulkan/vulkan_immediate_drawer.h" @@ -26,6 +27,12 @@ #include "xenia/ui/window.h" #if XE_PLATFORM_LINUX +#include +#elif XE_PLATFORM_WIN32 +#include "xenia/base/platform_win.h" +#endif + +#if XE_PLATFORM_GNU_LINUX #include "xenia/ui/window_gtk.h" #endif @@ -64,21 +71,6 @@ VulkanInstance::VulkanInstance() { DeclareRequiredExtension(VK_EXT_DEBUG_MARKER_EXTENSION_NAME, Version::Make(0, 0, 0), true); - DeclareRequiredExtension(VK_KHR_SURFACE_EXTENSION_NAME, - Version::Make(0, 0, 0), true); -#if XE_PLATFORM_WIN32 - DeclareRequiredExtension(VK_KHR_WIN32_SURFACE_EXTENSION_NAME, - Version::Make(0, 0, 0), true); -#elif XE_PLATFORM_LINUX -#ifdef GDK_WINDOWING_X11 - DeclareRequiredExtension(VK_KHR_XCB_SURFACE_EXTENSION_NAME, - Version::Make(0, 0, 0), true); -#else -#error No Vulkan surface extension for the GDK backend defined yet. -#endif -#else -#error No Vulkan surface extension for the platform defined yet. -#endif } VulkanInstance::~VulkanInstance() { DestroyInstance(); } @@ -86,8 +78,61 @@ VulkanInstance::~VulkanInstance() { DestroyInstance(); } bool VulkanInstance::Initialize() { auto version = Version::Parse(VK_API_VERSION); XELOGVK("Initializing Vulkan {}...", version.pretty_string); - if (volkInitialize() != VK_SUCCESS) { - XELOGE("volkInitialize() failed!"); + + // Load the library. + bool library_functions_loaded = true; +#if XE_PLATFORM_LINUX +#if XE_PLATFORM_ANDROID + const char* libvulkan_name = "libvulkan.so"; +#else + const char* libvulkan_name = "libvulkan.so.1"; +#endif + // http://developer.download.nvidia.com/mobile/shield/assets/Vulkan/UsingtheVulkanAPI.pdf + library_ = dlopen(libvulkan_name, RTLD_NOW | RTLD_LOCAL); + if (!library_) { + XELOGE("Failed to load {}", libvulkan_name); + return false; + } +#define XE_VULKAN_LOAD_MODULE_LFN(name) \ + library_functions_loaded &= \ + (lfn_.name = PFN_##name(dlsym(library_, #name))) != nullptr; +#elif XE_PLATFORM_WIN32 + library_ = LoadLibraryA("vulkan-1.dll"); + if (!library_) { + XELOGE("Failed to load vulkan-1.dll"); + return false; + } +#define XE_VULKAN_LOAD_MODULE_LFN(name) \ + library_functions_loaded &= \ + (lfn_.name = PFN_##name(GetProcAddress(library_, #name))) != nullptr; +#else +#error No Vulkan library loading provided for the target platform. +#endif + XE_VULKAN_LOAD_MODULE_LFN(vkGetInstanceProcAddr); + XE_VULKAN_LOAD_MODULE_LFN(vkDestroyInstance); +#undef XE_VULKAN_LOAD_MODULE_LFN + if (!library_functions_loaded) { + XELOGE("Failed to get Vulkan library function pointers"); + return false; + } + library_functions_loaded &= + (lfn_.vkCreateInstance = PFN_vkCreateInstance(lfn_.vkGetInstanceProcAddr( + VK_NULL_HANDLE, "vkCreateInstance"))) != nullptr; + library_functions_loaded &= + (lfn_.vkEnumerateInstanceExtensionProperties = + PFN_vkEnumerateInstanceExtensionProperties( + lfn_.vkGetInstanceProcAddr( + VK_NULL_HANDLE, + "vkEnumerateInstanceExtensionProperties"))) != nullptr; + library_functions_loaded &= + (lfn_.vkEnumerateInstanceLayerProperties = + PFN_vkEnumerateInstanceLayerProperties(lfn_.vkGetInstanceProcAddr( + VK_NULL_HANDLE, "vkEnumerateInstanceLayerProperties"))) != + nullptr; + if (!library_functions_loaded) { + XELOGE( + "Failed to get Vulkan library function pointers via " + "vkGetInstanceProcAddr"); return false; } @@ -164,11 +209,11 @@ bool VulkanInstance::QueryGlobals() { std::vector global_layer_properties; VkResult err; do { - err = vkEnumerateInstanceLayerProperties(&count, nullptr); + err = lfn_.vkEnumerateInstanceLayerProperties(&count, nullptr); CheckResult(err, "vkEnumerateInstanceLayerProperties"); global_layer_properties.resize(count); - err = vkEnumerateInstanceLayerProperties(&count, - global_layer_properties.data()); + err = lfn_.vkEnumerateInstanceLayerProperties( + &count, global_layer_properties.data()); } while (err == VK_INCOMPLETE); CheckResult(err, "vkEnumerateInstanceLayerProperties"); global_layers_.resize(count); @@ -178,11 +223,11 @@ bool VulkanInstance::QueryGlobals() { // Get all extensions available for the layer. do { - err = vkEnumerateInstanceExtensionProperties( + err = lfn_.vkEnumerateInstanceExtensionProperties( global_layer.properties.layerName, &count, nullptr); CheckResult(err, "vkEnumerateInstanceExtensionProperties"); global_layer.extensions.resize(count); - err = vkEnumerateInstanceExtensionProperties( + err = lfn_.vkEnumerateInstanceExtensionProperties( global_layer.properties.layerName, &count, global_layer.extensions.data()); } while (err == VK_INCOMPLETE); @@ -205,11 +250,11 @@ bool VulkanInstance::QueryGlobals() { // Scan global extensions. do { - err = vkEnumerateInstanceExtensionProperties(nullptr, &count, nullptr); + err = lfn_.vkEnumerateInstanceExtensionProperties(nullptr, &count, nullptr); CheckResult(err, "vkEnumerateInstanceExtensionProperties"); global_extensions_.resize(count); - err = vkEnumerateInstanceExtensionProperties(nullptr, &count, - global_extensions_.data()); + err = lfn_.vkEnumerateInstanceExtensionProperties( + nullptr, &count, global_extensions_.data()); } while (err == VK_INCOMPLETE); CheckResult(err, "vkEnumerateInstanceExtensionProperties"); XELOGVK("Found {} global extensions:", global_extensions_.size()); @@ -218,6 +263,136 @@ bool VulkanInstance::QueryGlobals() { return true; } +bool VulkanInstance::CreateInstance() { + XELOGVK("Verifying layers and extensions..."); + + // Gather list of enabled layer names. + auto layers_result = CheckRequirements(required_layers_, global_layers_); + auto& enabled_layers = layers_result.second; + + // Gather list of enabled extension names. + auto extensions_result = + CheckRequirements(required_extensions_, global_extensions_); + auto& enabled_extensions = extensions_result.second; + + // We wait until both extensions and layers are checked before failing out so + // that the user gets a complete list of what they have/don't. + if (!extensions_result.first || !layers_result.first) { + XELOGE("Layer and extension verification failed; aborting initialization"); + return false; + } + + XELOGVK("Initializing application instance..."); + + // TODO(benvanik): use GetEntryInfo? + VkApplicationInfo application_info; + application_info.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO; + application_info.pNext = nullptr; + application_info.pApplicationName = "xenia"; + application_info.applicationVersion = 1; + application_info.pEngineName = "xenia"; + application_info.engineVersion = 1; + application_info.apiVersion = VK_API_VERSION; + + VkInstanceCreateInfo instance_info; + instance_info.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO; + instance_info.pNext = nullptr; + instance_info.flags = 0; + instance_info.pApplicationInfo = &application_info; + instance_info.enabledLayerCount = + static_cast(enabled_layers.size()); + instance_info.ppEnabledLayerNames = enabled_layers.data(); + instance_info.enabledExtensionCount = + static_cast(enabled_extensions.size()); + instance_info.ppEnabledExtensionNames = enabled_extensions.data(); + + auto err = lfn_.vkCreateInstance(&instance_info, nullptr, &handle); + if (err != VK_SUCCESS) { + XELOGE("vkCreateInstance returned {}", to_string(err)); + } + switch (err) { + case VK_SUCCESS: + // Ok! + break; + case VK_ERROR_INITIALIZATION_FAILED: + XELOGE("Instance initialization failed; generic"); + return false; + case VK_ERROR_INCOMPATIBLE_DRIVER: + XELOGE( + "Instance initialization failed; cannot find a compatible Vulkan " + "installable client driver (ICD)"); + return false; + case VK_ERROR_EXTENSION_NOT_PRESENT: + XELOGE("Instance initialization failed; requested extension not present"); + return false; + case VK_ERROR_LAYER_NOT_PRESENT: + XELOGE("Instance initialization failed; requested layer not present"); + return false; + default: + XELOGE("Instance initialization failed; unknown: {}", to_string(err)); + return false; + } + + // Check if extensions are enabled. + dbg_report_ena_ = false; + for (const char* enabled_extension : enabled_extensions) { + if (!dbg_report_ena_ && + !std::strcmp(enabled_extension, VK_EXT_DEBUG_REPORT_EXTENSION_NAME)) { + dbg_report_ena_ = true; + } + } + + // Get instance functions. + std::memset(&ifn_, 0, sizeof(ifn_)); + bool instance_functions_loaded = true; +#define XE_UI_VULKAN_FUNCTION(name) \ + instance_functions_loaded &= \ + (ifn_.name = PFN_##name(lfn_.vkGetInstanceProcAddr(handle, #name))) != \ + nullptr; +#include "xenia/ui/vulkan/functions/instance_1_0.inc" +#include "xenia/ui/vulkan/functions/instance_khr_surface.inc" +#if XE_PLATFORM_ANDROID +#include "xenia/ui/vulkan/functions/instance_khr_android_surface.inc" +#elif XE_PLATFORM_GNU_LINUX +#include "xenia/ui/vulkan/functions/instance_khr_xcb_surface.inc" +#elif XE_PLATFORM_WIN32 +#include "xenia/ui/vulkan/functions/instance_khr_win32_surface.inc" +#endif + if (dbg_report_ena_) { +#include "xenia/ui/vulkan/functions/instance_ext_debug_report.inc" + } +#undef XE_VULKAN_LOAD_IFN + if (!instance_functions_loaded) { + XELOGE("Failed to get Vulkan instance function pointers"); + return false; + } + + // Enable debug validation, if needed. + EnableDebugValidation(); + + return true; +} + +void VulkanInstance::DestroyInstance() { + if (handle) { + DisableDebugValidation(); + lfn_.vkDestroyInstance(handle, nullptr); + handle = nullptr; + } + +#if XE_PLATFORM_LINUX + if (library_) { + dlclose(library_); + library_ = nullptr; + } +#elif XE_PLATFORM_WIN32 + if (library_) { + FreeLibrary(library_); + library_ = nullptr; + } +#endif +} + VkBool32 VKAPI_PTR DebugMessageCallback(VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, @@ -255,116 +430,14 @@ VkBool32 VKAPI_PTR DebugMessageCallback(VkDebugReportFlagsEXT flags, return false; } -bool VulkanInstance::CreateInstance() { - XELOGVK("Verifying layers and extensions..."); - - // Gather list of enabled layer names. - auto layers_result = CheckRequirements(required_layers_, global_layers_); - auto& enabled_layers = layers_result.second; - - // Gather list of enabled extension names. - auto extensions_result = - CheckRequirements(required_extensions_, global_extensions_); - auto& enabled_extensions = extensions_result.second; - - // We wait until both extensions and layers are checked before failing out so - // that the user gets a complete list of what they have/don't. - if (!extensions_result.first || !layers_result.first) { - XELOGE("Layer and extension verification failed; aborting initialization"); - return false; - } - - XELOGVK("Initializing application instance..."); - - VkDebugReportCallbackCreateInfoEXT debug_info; - debug_info.sType = VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT; - debug_info.pNext = nullptr; - // TODO(benvanik): flags to set these. - debug_info.flags = - VK_DEBUG_REPORT_INFORMATION_BIT_EXT | VK_DEBUG_REPORT_WARNING_BIT_EXT | - VK_DEBUG_REPORT_PERFORMANCE_WARNING_BIT_EXT | - VK_DEBUG_REPORT_ERROR_BIT_EXT | VK_DEBUG_REPORT_DEBUG_BIT_EXT; - debug_info.pfnCallback = &DebugMessageCallback; - debug_info.pUserData = this; - - // TODO(benvanik): use GetEntryInfo? - VkApplicationInfo application_info; - application_info.sType = VK_STRUCTURE_TYPE_APPLICATION_INFO; - application_info.pNext = &debug_info; - application_info.pApplicationName = "xenia"; - application_info.applicationVersion = 1; - application_info.pEngineName = "xenia"; - application_info.engineVersion = 1; - application_info.apiVersion = VK_API_VERSION; - - VkInstanceCreateInfo instance_info; - instance_info.sType = VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO; - instance_info.pNext = nullptr; - instance_info.flags = 0; - instance_info.pApplicationInfo = &application_info; - instance_info.enabledLayerCount = - static_cast(enabled_layers.size()); - instance_info.ppEnabledLayerNames = enabled_layers.data(); - instance_info.enabledExtensionCount = - static_cast(enabled_extensions.size()); - instance_info.ppEnabledExtensionNames = enabled_extensions.data(); - - auto err = vkCreateInstance(&instance_info, nullptr, &handle); - if (err != VK_SUCCESS) { - XELOGE("vkCreateInstance returned {}", to_string(err)); - } - switch (err) { - case VK_SUCCESS: - // Ok! - break; - case VK_ERROR_INITIALIZATION_FAILED: - XELOGE("Instance initialization failed; generic"); - return false; - case VK_ERROR_INCOMPATIBLE_DRIVER: - XELOGE( - "Instance initialization failed; cannot find a compatible Vulkan " - "installable client driver (ICD)"); - return false; - case VK_ERROR_EXTENSION_NOT_PRESENT: - XELOGE("Instance initialization failed; requested extension not present"); - return false; - case VK_ERROR_LAYER_NOT_PRESENT: - XELOGE("Instance initialization failed; requested layer not present"); - return false; - default: - XELOGE("Instance initialization failed; unknown: {}", to_string(err)); - return false; - } - - // Load Vulkan entry points and extensions. - volkLoadInstance(handle); - - // Enable debug validation, if needed. - EnableDebugValidation(); - - return true; -} - -void VulkanInstance::DestroyInstance() { - if (!handle) { - return; - } - DisableDebugValidation(); - vkDestroyInstance(handle, nullptr); - handle = nullptr; -} - void VulkanInstance::EnableDebugValidation() { - if (dbg_report_callback_) { - DisableDebugValidation(); - } - auto vk_create_debug_report_callback_ext = - reinterpret_cast( - vkGetInstanceProcAddr(handle, "vkCreateDebugReportCallbackEXT")); - if (!vk_create_debug_report_callback_ext) { + if (!dbg_report_ena_) { XELOGVK("Debug validation layer not installed; ignoring"); return; } + if (dbg_report_callback_) { + DisableDebugValidation(); + } VkDebugReportCallbackCreateInfoEXT create_info; create_info.sType = VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT; create_info.pNext = nullptr; @@ -375,7 +448,7 @@ void VulkanInstance::EnableDebugValidation() { VK_DEBUG_REPORT_ERROR_BIT_EXT | VK_DEBUG_REPORT_DEBUG_BIT_EXT; create_info.pfnCallback = &DebugMessageCallback; create_info.pUserData = this; - auto status = vk_create_debug_report_callback_ext( + auto status = ifn_.vkCreateDebugReportCallbackEXT( handle, &create_info, nullptr, &dbg_report_callback_); if (status == VK_SUCCESS) { XELOGVK("Debug validation layer enabled"); @@ -386,16 +459,10 @@ void VulkanInstance::EnableDebugValidation() { } void VulkanInstance::DisableDebugValidation() { - if (!dbg_report_callback_) { + if (!dbg_report_ena_ || !dbg_report_callback_) { return; } - auto vk_destroy_debug_report_callback_ext = - reinterpret_cast( - vkGetInstanceProcAddr(handle, "vkDestroyDebugReportCallbackEXT")); - if (!vk_destroy_debug_report_callback_ext) { - return; - } - vk_destroy_debug_report_callback_ext(handle, dbg_report_callback_, nullptr); + ifn_.vkDestroyDebugReportCallbackEXT(handle, dbg_report_callback_, nullptr); dbg_report_callback_ = nullptr; } @@ -403,11 +470,11 @@ bool VulkanInstance::QueryDevices() { // Get handles to all devices. uint32_t count = 0; std::vector device_handles; - auto err = vkEnumeratePhysicalDevices(handle, &count, nullptr); + auto err = ifn_.vkEnumeratePhysicalDevices(handle, &count, nullptr); CheckResult(err, "vkEnumeratePhysicalDevices"); device_handles.resize(count); - err = vkEnumeratePhysicalDevices(handle, &count, device_handles.data()); + err = ifn_.vkEnumeratePhysicalDevices(handle, &count, device_handles.data()); CheckResult(err, "vkEnumeratePhysicalDevices"); // Query device info. @@ -417,33 +484,34 @@ bool VulkanInstance::QueryDevices() { device_info.handle = device_handle; // Query general attributes. - vkGetPhysicalDeviceProperties(device_handle, &device_info.properties); - vkGetPhysicalDeviceFeatures(device_handle, &device_info.features); - vkGetPhysicalDeviceMemoryProperties(device_handle, - &device_info.memory_properties); + ifn_.vkGetPhysicalDeviceProperties(device_handle, &device_info.properties); + ifn_.vkGetPhysicalDeviceFeatures(device_handle, &device_info.features); + ifn_.vkGetPhysicalDeviceMemoryProperties(device_handle, + &device_info.memory_properties); // Gather queue family properties. - vkGetPhysicalDeviceQueueFamilyProperties(device_handle, &count, nullptr); + ifn_.vkGetPhysicalDeviceQueueFamilyProperties(device_handle, &count, + nullptr); device_info.queue_family_properties.resize(count); - vkGetPhysicalDeviceQueueFamilyProperties( + ifn_.vkGetPhysicalDeviceQueueFamilyProperties( device_handle, &count, device_info.queue_family_properties.data()); // Gather layers. std::vector layer_properties; - err = vkEnumerateDeviceLayerProperties(device_handle, &count, nullptr); + err = ifn_.vkEnumerateDeviceLayerProperties(device_handle, &count, nullptr); CheckResult(err, "vkEnumerateDeviceLayerProperties"); layer_properties.resize(count); - err = vkEnumerateDeviceLayerProperties(device_handle, &count, - layer_properties.data()); + err = ifn_.vkEnumerateDeviceLayerProperties(device_handle, &count, + layer_properties.data()); CheckResult(err, "vkEnumerateDeviceLayerProperties"); for (size_t j = 0; j < layer_properties.size(); ++j) { LayerInfo layer_info; layer_info.properties = layer_properties[j]; - err = vkEnumerateDeviceExtensionProperties( + err = ifn_.vkEnumerateDeviceExtensionProperties( device_handle, layer_info.properties.layerName, &count, nullptr); CheckResult(err, "vkEnumerateDeviceExtensionProperties"); layer_info.extensions.resize(count); - err = vkEnumerateDeviceExtensionProperties( + err = ifn_.vkEnumerateDeviceExtensionProperties( device_handle, layer_info.properties.layerName, &count, layer_info.extensions.data()); CheckResult(err, "vkEnumerateDeviceExtensionProperties"); @@ -451,12 +519,12 @@ bool VulkanInstance::QueryDevices() { } // Gather extensions. - err = vkEnumerateDeviceExtensionProperties(device_handle, nullptr, &count, - nullptr); + err = ifn_.vkEnumerateDeviceExtensionProperties(device_handle, nullptr, + &count, nullptr); CheckResult(err, "vkEnumerateDeviceExtensionProperties"); device_info.extensions.resize(count); - err = vkEnumerateDeviceExtensionProperties(device_handle, nullptr, &count, - device_info.extensions.data()); + err = ifn_.vkEnumerateDeviceExtensionProperties( + device_handle, nullptr, &count, device_info.extensions.data()); CheckResult(err, "vkEnumerateDeviceExtensionProperties"); available_devices_.push_back(std::move(device_info)); diff --git a/src/xenia/ui/vulkan/vulkan_instance.h b/src/xenia/ui/vulkan/vulkan_instance.h index 6a86933bc..52a92f53e 100644 --- a/src/xenia/ui/vulkan/vulkan_instance.h +++ b/src/xenia/ui/vulkan/vulkan_instance.h @@ -14,6 +14,7 @@ #include #include +#include "xenia/base/platform.h" #include "xenia/ui/vulkan/vulkan.h" #include "xenia/ui/vulkan/vulkan_util.h" #include "xenia/ui/window.h" @@ -28,10 +29,38 @@ class VulkanInstance { VulkanInstance(); ~VulkanInstance(); + struct LibraryFunctions { + // From the module. + PFN_vkGetInstanceProcAddr vkGetInstanceProcAddr; + PFN_vkDestroyInstance vkDestroyInstance; + // From vkGetInstanceProcAddr. + PFN_vkCreateInstance vkCreateInstance; + PFN_vkEnumerateInstanceExtensionProperties + vkEnumerateInstanceExtensionProperties; + PFN_vkEnumerateInstanceLayerProperties vkEnumerateInstanceLayerProperties; + }; + const LibraryFunctions& lfn() const { return lfn_; } + VkInstance handle = nullptr; operator VkInstance() const { return handle; } + struct InstanceFunctions { +#define XE_UI_VULKAN_FUNCTION(name) PFN_##name name; +#include "xenia/ui/vulkan/functions/instance_1_0.inc" +#include "xenia/ui/vulkan/functions/instance_ext_debug_report.inc" +#include "xenia/ui/vulkan/functions/instance_khr_surface.inc" +#if XE_PLATFORM_ANDROID +#include "xenia/ui/vulkan/functions/instance_khr_android_surface.inc" +#elif XE_PLATFORM_GNU_LINUX +#include "xenia/ui/vulkan/functions/instance_khr_xcb_surface.inc" +#elif XE_PLATFORM_WIN32 +#include "xenia/ui/vulkan/functions/instance_khr_win32_surface.inc" +#endif +#undef XE_UI_VULKAN_FUNCTION + }; + const InstanceFunctions& ifn() const { return ifn_; } + // Declares a layer to verify and enable upon initialization. // Must be called before Initialize. void DeclareRequiredLayer(std::string name, uint32_t min_version, @@ -85,13 +114,24 @@ class VulkanInstance { const char* indent); void DumpDeviceInfo(const DeviceInfo& device_info); +#if XE_PLATFORM_LINUX + void* library_ = nullptr; +#elif XE_PLATFORM_WIN32 + HMODULE library_ = nullptr; +#endif + + LibraryFunctions lfn_ = {}; + std::vector required_layers_; std::vector required_extensions_; + InstanceFunctions ifn_ = {}; + std::vector global_layers_; std::vector global_extensions_; std::vector available_devices_; + bool dbg_report_ena_ = false; VkDebugReportCallbackEXT dbg_report_callback_ = nullptr; void* renderdoc_api_ = nullptr; diff --git a/src/xenia/ui/vulkan/vulkan_mem_alloc.h b/src/xenia/ui/vulkan/vulkan_mem_alloc.h index caf89aae6..31a9b2c40 100644 --- a/src/xenia/ui/vulkan/vulkan_mem_alloc.h +++ b/src/xenia/ui/vulkan/vulkan_mem_alloc.h @@ -10,31 +10,35 @@ #ifndef XENIA_UI_VULKAN_VULKAN_MEM_ALLOC_H_ #define XENIA_UI_VULKAN_VULKAN_MEM_ALLOC_H_ -#include "third_party/volk/volk.h" - #define VMA_STATIC_VULKAN_FUNCTIONS 0 #include "third_party/vulkan/vk_mem_alloc.h" +#include "xenia/ui/vulkan/vulkan_device.h" +#include "xenia/ui/vulkan/vulkan_instance.h" + namespace xe { namespace ui { namespace vulkan { -inline void FillVMAVulkanFunctions(VmaVulkanFunctions* vma_funcs) { - vma_funcs->vkGetPhysicalDeviceProperties = vkGetPhysicalDeviceProperties; +inline void FillVMAVulkanFunctions(VmaVulkanFunctions* vma_funcs, + const VulkanDevice& device) { + const VulkanInstance::InstanceFunctions& ifn = device.instance()->ifn(); + const VulkanDevice::DeviceFunctions& dfn = device.dfn(); + vma_funcs->vkGetPhysicalDeviceProperties = ifn.vkGetPhysicalDeviceProperties; vma_funcs->vkGetPhysicalDeviceMemoryProperties = - vkGetPhysicalDeviceMemoryProperties; - vma_funcs->vkAllocateMemory = vkAllocateMemory; - vma_funcs->vkFreeMemory = vkFreeMemory; - vma_funcs->vkMapMemory = vkMapMemory; - vma_funcs->vkUnmapMemory = vkUnmapMemory; - vma_funcs->vkBindBufferMemory = vkBindBufferMemory; - vma_funcs->vkBindImageMemory = vkBindImageMemory; - vma_funcs->vkGetBufferMemoryRequirements = vkGetBufferMemoryRequirements; - vma_funcs->vkGetImageMemoryRequirements = vkGetImageMemoryRequirements; - vma_funcs->vkCreateBuffer = vkCreateBuffer; - vma_funcs->vkDestroyBuffer = vkDestroyBuffer; - vma_funcs->vkCreateImage = vkCreateImage; - vma_funcs->vkDestroyImage = vkDestroyImage; + ifn.vkGetPhysicalDeviceMemoryProperties; + vma_funcs->vkAllocateMemory = dfn.vkAllocateMemory; + vma_funcs->vkFreeMemory = dfn.vkFreeMemory; + vma_funcs->vkMapMemory = dfn.vkMapMemory; + vma_funcs->vkUnmapMemory = dfn.vkUnmapMemory; + vma_funcs->vkBindBufferMemory = dfn.vkBindBufferMemory; + vma_funcs->vkBindImageMemory = dfn.vkBindImageMemory; + vma_funcs->vkGetBufferMemoryRequirements = dfn.vkGetBufferMemoryRequirements; + vma_funcs->vkGetImageMemoryRequirements = dfn.vkGetImageMemoryRequirements; + vma_funcs->vkCreateBuffer = dfn.vkCreateBuffer; + vma_funcs->vkDestroyBuffer = dfn.vkDestroyBuffer; + vma_funcs->vkCreateImage = dfn.vkCreateImage; + vma_funcs->vkDestroyImage = dfn.vkDestroyImage; } } // namespace vulkan diff --git a/src/xenia/ui/vulkan/vulkan_provider.cc b/src/xenia/ui/vulkan/vulkan_provider.cc index ab566565f..f9e9eea13 100644 --- a/src/xenia/ui/vulkan/vulkan_provider.cc +++ b/src/xenia/ui/vulkan/vulkan_provider.cc @@ -52,14 +52,16 @@ bool VulkanProvider::Initialize() { instance_ = std::make_unique(); // Always enable the swapchain. - instance_->DeclareRequiredExtension(VK_KHR_SURFACE_EXTENSION_NAME, +#if XE_PLATFORM_GNU_LINUX || XE_PLATFORM_WIN32 + instance_->DeclareRequiredExtension("VK_KHR_surface", Version::Make(0, 0, 0), + false); +#if XE_PLATFORM_GNU_LINUX + instance_->DeclareRequiredExtension("VK_KHR_xcb_surface", Version::Make(0, 0, 0), false); -#if XE_PLATFORM_WIN32 - instance_->DeclareRequiredExtension(VK_KHR_WIN32_SURFACE_EXTENSION_NAME, - Version::Make(0, 0, 0), false); -#elif XE_PLATFORM_LINUX - instance_->DeclareRequiredExtension(VK_KHR_XCB_SURFACE_EXTENSION_NAME, +#elif XE_PLATFORM_WIN32 + instance_->DeclareRequiredExtension("VK_KHR_win32_surface", Version::Make(0, 0, 0), false); +#endif #endif // Attempt initialization and device query. diff --git a/src/xenia/ui/vulkan/vulkan_swap_chain.cc b/src/xenia/ui/vulkan/vulkan_swap_chain.cc index ae91e493b..79f74a782 100644 --- a/src/xenia/ui/vulkan/vulkan_swap_chain.cc +++ b/src/xenia/ui/vulkan/vulkan_swap_chain.cc @@ -35,6 +35,8 @@ VulkanSwapChain::~VulkanSwapChain() { Shutdown(); } VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { surface_ = surface; + const VulkanInstance::InstanceFunctions& ifn = instance_->ifn(); + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; // Find a queue family that supports presentation. @@ -49,8 +51,8 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { continue; } - status = vkGetPhysicalDeviceSurfaceSupportKHR(*device_, i, surface, - &surface_supported); + status = ifn.vkGetPhysicalDeviceSurfaceSupportKHR(*device_, i, surface, + &surface_supported); if (status == VK_SUCCESS && surface_supported == VK_TRUE) { queue_family_index = i; break; @@ -80,13 +82,13 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { // Query supported target formats. uint32_t count = 0; - status = - vkGetPhysicalDeviceSurfaceFormatsKHR(*device_, surface_, &count, nullptr); + status = ifn.vkGetPhysicalDeviceSurfaceFormatsKHR(*device_, surface_, &count, + nullptr); CheckResult(status, "vkGetPhysicalDeviceSurfaceFormatsKHR"); std::vector surface_formats; surface_formats.resize(count); - status = vkGetPhysicalDeviceSurfaceFormatsKHR(*device_, surface_, &count, - surface_formats.data()); + status = ifn.vkGetPhysicalDeviceSurfaceFormatsKHR(*device_, surface_, &count, + surface_formats.data()); CheckResult(status, "vkGetPhysicalDeviceSurfaceFormatsKHR"); if (status != VK_SUCCESS) { return status; @@ -107,8 +109,8 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { // Query surface min/max/caps. VkSurfaceCapabilitiesKHR surface_caps; - status = vkGetPhysicalDeviceSurfaceCapabilitiesKHR(*device_, surface_, - &surface_caps); + status = ifn.vkGetPhysicalDeviceSurfaceCapabilitiesKHR(*device_, surface_, + &surface_caps); CheckResult(status, "vkGetPhysicalDeviceSurfaceCapabilitiesKHR"); if (status != VK_SUCCESS) { return status; @@ -116,16 +118,16 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { // Query surface properties so we can configure ourselves within bounds. std::vector present_modes; - status = vkGetPhysicalDeviceSurfacePresentModesKHR(*device_, surface_, &count, - nullptr); + status = ifn.vkGetPhysicalDeviceSurfacePresentModesKHR(*device_, surface_, + &count, nullptr); CheckResult(status, "vkGetPhysicalDeviceSurfacePresentModesKHR"); if (status != VK_SUCCESS) { return status; } present_modes.resize(count); - status = vkGetPhysicalDeviceSurfacePresentModesKHR(*device_, surface_, &count, - present_modes.data()); + status = ifn.vkGetPhysicalDeviceSurfacePresentModesKHR( + *device_, surface_, &count, present_modes.data()); CheckResult(status, "vkGetPhysicalDeviceSurfacePresentModesKHR"); if (status != VK_SUCCESS) { return status; @@ -210,7 +212,7 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { XELOGVK(" imageSharingMode = {}", to_string(create_info.imageSharingMode)); XELOGVK(" queueFamilyCount = {}", create_info.queueFamilyIndexCount); - status = vkCreateSwapchainKHR(*device_, &create_info, nullptr, &handle); + status = dfn.vkCreateSwapchainKHR(*device_, &create_info, nullptr, &handle); if (status != VK_SUCCESS) { XELOGE("Failed to create swapchain: {}", to_string(status)); return status; @@ -223,7 +225,8 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { cmd_pool_info.pNext = nullptr; cmd_pool_info.flags = VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT; cmd_pool_info.queueFamilyIndex = presentation_queue_family_; - status = vkCreateCommandPool(*device_, &cmd_pool_info, nullptr, &cmd_pool_); + status = + dfn.vkCreateCommandPool(*device_, &cmd_pool_info, nullptr, &cmd_pool_); CheckResult(status, "vkCreateCommandPool"); if (status != VK_SUCCESS) { return status; @@ -236,7 +239,8 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { cmd_buffer_info.commandPool = cmd_pool_; cmd_buffer_info.level = VK_COMMAND_BUFFER_LEVEL_PRIMARY; cmd_buffer_info.commandBufferCount = 2; - status = vkAllocateCommandBuffers(*device_, &cmd_buffer_info, &cmd_buffer_); + status = + dfn.vkAllocateCommandBuffers(*device_, &cmd_buffer_info, &cmd_buffer_); CheckResult(status, "vkCreateCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -247,7 +251,7 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { cmd_buffer_info.level = VK_COMMAND_BUFFER_LEVEL_SECONDARY; cmd_buffer_info.commandBufferCount = 2; status = - vkAllocateCommandBuffers(*device_, &cmd_buffer_info, command_buffers); + dfn.vkAllocateCommandBuffers(*device_, &cmd_buffer_info, command_buffers); CheckResult(status, "vkCreateCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -296,8 +300,8 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { render_pass_info.pSubpasses = &render_subpass; render_pass_info.dependencyCount = 0; render_pass_info.pDependencies = nullptr; - status = - vkCreateRenderPass(*device_, &render_pass_info, nullptr, &render_pass_); + status = dfn.vkCreateRenderPass(*device_, &render_pass_info, nullptr, + &render_pass_); CheckResult(status, "vkCreateRenderPass"); if (status != VK_SUCCESS) { return status; @@ -308,16 +312,16 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { semaphore_info.sType = VK_STRUCTURE_TYPE_SEMAPHORE_CREATE_INFO; semaphore_info.pNext = nullptr; semaphore_info.flags = 0; - status = vkCreateSemaphore(*device_, &semaphore_info, nullptr, - &image_available_semaphore_); + status = dfn.vkCreateSemaphore(*device_, &semaphore_info, nullptr, + &image_available_semaphore_); CheckResult(status, "vkCreateSemaphore"); if (status != VK_SUCCESS) { return status; } // Create another semaphore used to synchronize writes to the swap image. - status = vkCreateSemaphore(*device_, &semaphore_info, nullptr, - &image_usage_semaphore_); + status = dfn.vkCreateSemaphore(*device_, &semaphore_info, nullptr, + &image_usage_semaphore_); CheckResult(status, "vkCreateSemaphore"); if (status != VK_SUCCESS) { return status; @@ -327,16 +331,16 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { // Note that this may differ from our requested amount. uint32_t actual_image_count = 0; std::vector images; - status = - vkGetSwapchainImagesKHR(*device_, handle, &actual_image_count, nullptr); + status = dfn.vkGetSwapchainImagesKHR(*device_, handle, &actual_image_count, + nullptr); CheckResult(status, "vkGetSwapchainImagesKHR"); if (status != VK_SUCCESS) { return status; } images.resize(actual_image_count); - status = vkGetSwapchainImagesKHR(*device_, handle, &actual_image_count, - images.data()); + status = dfn.vkGetSwapchainImagesKHR(*device_, handle, &actual_image_count, + images.data()); CheckResult(status, "vkGetSwapchainImagesKHR"); if (status != VK_SUCCESS) { return status; @@ -360,8 +364,8 @@ VkResult VulkanSwapChain::Initialize(VkSurfaceKHR surface) { nullptr, VK_FENCE_CREATE_SIGNALED_BIT, }; - status = vkCreateFence(*device_, &fence_create_info, nullptr, - &synchronization_fence_); + status = dfn.vkCreateFence(*device_, &fence_create_info, nullptr, + &synchronization_fence_); CheckResult(status, "vkGetSwapchainImagesKHR"); if (status != VK_SUCCESS) { return status; @@ -376,6 +380,7 @@ VkResult VulkanSwapChain::InitializeBuffer(Buffer* buffer, DestroyBuffer(buffer); buffer->image = target_image; + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; // Create an image view for the presentation image. @@ -396,8 +401,8 @@ VkResult VulkanSwapChain::InitializeBuffer(Buffer* buffer, image_view_info.subresourceRange.levelCount = 1; image_view_info.subresourceRange.baseArrayLayer = 0; image_view_info.subresourceRange.layerCount = 1; - status = vkCreateImageView(*device_, &image_view_info, nullptr, - &buffer->image_view); + status = dfn.vkCreateImageView(*device_, &image_view_info, nullptr, + &buffer->image_view); CheckResult(status, "vkCreateImageView"); if (status != VK_SUCCESS) { return status; @@ -416,8 +421,8 @@ VkResult VulkanSwapChain::InitializeBuffer(Buffer* buffer, framebuffer_info.width = surface_width_; framebuffer_info.height = surface_height_; framebuffer_info.layers = 1; - status = vkCreateFramebuffer(*device_, &framebuffer_info, nullptr, - &buffer->framebuffer); + status = dfn.vkCreateFramebuffer(*device_, &framebuffer_info, nullptr, + &buffer->framebuffer); CheckResult(status, "vkCreateFramebuffer"); if (status != VK_SUCCESS) { return status; @@ -427,12 +432,13 @@ VkResult VulkanSwapChain::InitializeBuffer(Buffer* buffer, } void VulkanSwapChain::DestroyBuffer(Buffer* buffer) { + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); if (buffer->framebuffer) { - vkDestroyFramebuffer(*device_, buffer->framebuffer, nullptr); + dfn.vkDestroyFramebuffer(*device_, buffer->framebuffer, nullptr); buffer->framebuffer = nullptr; } if (buffer->image_view) { - vkDestroyImageView(*device_, buffer->image_view, nullptr); + dfn.vkDestroyImageView(*device_, buffer->image_view, nullptr); buffer->image_view = nullptr; } // Image is taken care of by the presentation engine. @@ -458,19 +464,21 @@ void VulkanSwapChain::Shutdown() { } buffers_.clear(); - VK_SAFE_DESTROY(vkDestroySemaphore, *device_, image_available_semaphore_, - nullptr); - VK_SAFE_DESTROY(vkDestroyRenderPass, *device_, render_pass_, nullptr); + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); + + DestroyAndNullHandle(dfn.vkDestroySemaphore, *device_, + image_available_semaphore_); + DestroyAndNullHandle(dfn.vkDestroyRenderPass, *device_, render_pass_); if (copy_cmd_buffer_) { - vkFreeCommandBuffers(*device_, cmd_pool_, 1, ©_cmd_buffer_); + dfn.vkFreeCommandBuffers(*device_, cmd_pool_, 1, ©_cmd_buffer_); copy_cmd_buffer_ = nullptr; } if (render_cmd_buffer_) { - vkFreeCommandBuffers(*device_, cmd_pool_, 1, &render_cmd_buffer_); + dfn.vkFreeCommandBuffers(*device_, cmd_pool_, 1, &render_cmd_buffer_); render_cmd_buffer_ = nullptr; } - VK_SAFE_DESTROY(vkDestroyCommandPool, *device_, cmd_pool_, nullptr); + DestroyAndNullHandle(dfn.vkDestroyCommandPool, *device_, cmd_pool_); if (presentation_queue_) { if (!presentation_queue_mutex_) { @@ -482,33 +490,36 @@ void VulkanSwapChain::Shutdown() { presentation_queue_family_ = -1; } - VK_SAFE_DESTROY(vkDestroyFence, *device_, synchronization_fence_, nullptr); + DestroyAndNullHandle(dfn.vkDestroyFence, *device_, synchronization_fence_); // images_ doesn't need to be cleaned up as the swapchain does it implicitly. - VK_SAFE_DESTROY(vkDestroySwapchainKHR, *device_, handle, nullptr); - VK_SAFE_DESTROY(vkDestroySurfaceKHR, *instance_, surface_, nullptr); + DestroyAndNullHandle(dfn.vkDestroySwapchainKHR, *device_, handle); + const VulkanInstance::InstanceFunctions& ifn = instance_->ifn(); + DestroyAndNullHandle(ifn.vkDestroySurfaceKHR, *instance_, surface_); } VkResult VulkanSwapChain::Begin() { wait_semaphores_.clear(); + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; // Wait for the last swap to finish. - status = vkWaitForFences(*device_, 1, &synchronization_fence_, VK_TRUE, -1); + status = + dfn.vkWaitForFences(*device_, 1, &synchronization_fence_, VK_TRUE, -1); if (status != VK_SUCCESS) { return status; } - status = vkResetFences(*device_, 1, &synchronization_fence_); + status = dfn.vkResetFences(*device_, 1, &synchronization_fence_); if (status != VK_SUCCESS) { return status; } // Get the index of the next available swapchain image. status = - vkAcquireNextImageKHR(*device_, handle, 0, image_available_semaphore_, - nullptr, ¤t_buffer_index_); + dfn.vkAcquireNextImageKHR(*device_, handle, 0, image_available_semaphore_, + nullptr, ¤t_buffer_index_); if (status != VK_SUCCESS) { return status; } @@ -531,7 +542,8 @@ VkResult VulkanSwapChain::Begin() { if (presentation_queue_mutex_) { presentation_queue_mutex_->lock(); } - status = vkQueueSubmit(presentation_queue_, 1, &wait_submit_info, nullptr); + status = + dfn.vkQueueSubmit(presentation_queue_, 1, &wait_submit_info, nullptr); if (presentation_queue_mutex_) { presentation_queue_mutex_->unlock(); } @@ -540,8 +552,8 @@ VkResult VulkanSwapChain::Begin() { } // Reset all command buffers. - vkResetCommandBuffer(render_cmd_buffer_, 0); - vkResetCommandBuffer(copy_cmd_buffer_, 0); + dfn.vkResetCommandBuffer(render_cmd_buffer_, 0); + dfn.vkResetCommandBuffer(copy_cmd_buffer_, 0); auto& current_buffer = buffers_[current_buffer_index_]; // Build the command buffer that will execute all queued rendering buffers. @@ -561,7 +573,7 @@ VkResult VulkanSwapChain::Begin() { begin_info.flags = VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT | VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT; begin_info.pInheritanceInfo = &inherit_info; - status = vkBeginCommandBuffer(render_cmd_buffer_, &begin_info); + status = dfn.vkBeginCommandBuffer(render_cmd_buffer_, &begin_info); CheckResult(status, "vkBeginCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -569,7 +581,7 @@ VkResult VulkanSwapChain::Begin() { // Start recording the copy command buffer as well. begin_info.flags = VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT; - status = vkBeginCommandBuffer(copy_cmd_buffer_, &begin_info); + status = dfn.vkBeginCommandBuffer(copy_cmd_buffer_, &begin_info); CheckResult(status, "vkBeginCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -588,31 +600,32 @@ VkResult VulkanSwapChain::Begin() { clear_color.float32[1] = 1.0f; clear_color.float32[2] = 0.0f; } - vkCmdClearColorImage(copy_cmd_buffer_, current_buffer.image, - VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, &clear_color, 1, - &clear_range); + dfn.vkCmdClearColorImage(copy_cmd_buffer_, current_buffer.image, + VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, &clear_color, + 1, &clear_range); return VK_SUCCESS; } VkResult VulkanSwapChain::End() { auto& current_buffer = buffers_[current_buffer_index_]; + const VulkanDevice::DeviceFunctions& dfn = device_->dfn(); VkResult status; - status = vkEndCommandBuffer(render_cmd_buffer_); + status = dfn.vkEndCommandBuffer(render_cmd_buffer_); CheckResult(status, "vkEndCommandBuffer"); if (status != VK_SUCCESS) { return status; } - status = vkEndCommandBuffer(copy_cmd_buffer_); + status = dfn.vkEndCommandBuffer(copy_cmd_buffer_); CheckResult(status, "vkEndCommandBuffer"); if (status != VK_SUCCESS) { return status; } // Build primary command buffer. - status = vkResetCommandBuffer(cmd_buffer_, 0); + status = dfn.vkResetCommandBuffer(cmd_buffer_, 0); CheckResult(status, "vkResetCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -623,7 +636,7 @@ VkResult VulkanSwapChain::End() { begin_info.pNext = nullptr; begin_info.flags = 0; begin_info.pInheritanceInfo = nullptr; - status = vkBeginCommandBuffer(cmd_buffer_, &begin_info); + status = dfn.vkBeginCommandBuffer(cmd_buffer_, &begin_info); CheckResult(status, "vkBeginCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -642,14 +655,14 @@ VkResult VulkanSwapChain::End() { pre_image_copy_barrier.image = current_buffer.image; pre_image_copy_barrier.subresourceRange = {VK_IMAGE_ASPECT_COLOR_BIT, 0, 1, 0, 1}; - vkCmdPipelineBarrier(cmd_buffer_, VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, - VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, - nullptr, 1, &pre_image_copy_barrier); + dfn.vkCmdPipelineBarrier(cmd_buffer_, VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT, + VK_PIPELINE_STAGE_TRANSFER_BIT, 0, 0, nullptr, 0, + nullptr, 1, &pre_image_copy_barrier); current_buffer.image_layout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL; // Execute copy commands - vkCmdExecuteCommands(cmd_buffer_, 1, ©_cmd_buffer_); + dfn.vkCmdExecuteCommands(cmd_buffer_, 1, ©_cmd_buffer_); // Transition the image to a color attachment target for drawing. VkImageMemoryBarrier pre_image_memory_barrier; @@ -669,9 +682,9 @@ VkResult VulkanSwapChain::End() { pre_image_memory_barrier.dstAccessMask = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; pre_image_memory_barrier.oldLayout = current_buffer.image_layout; pre_image_memory_barrier.newLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; - vkCmdPipelineBarrier(cmd_buffer_, VK_PIPELINE_STAGE_TRANSFER_BIT, - VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, 0, 0, - nullptr, 0, nullptr, 1, &pre_image_memory_barrier); + dfn.vkCmdPipelineBarrier(cmd_buffer_, VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, 0, 0, + nullptr, 0, nullptr, 1, &pre_image_memory_barrier); current_buffer.image_layout = pre_image_memory_barrier.newLayout; @@ -687,14 +700,14 @@ VkResult VulkanSwapChain::End() { render_pass_begin_info.renderArea.extent.height = surface_height_; render_pass_begin_info.clearValueCount = 0; render_pass_begin_info.pClearValues = nullptr; - vkCmdBeginRenderPass(cmd_buffer_, &render_pass_begin_info, - VK_SUBPASS_CONTENTS_SECONDARY_COMMAND_BUFFERS); + dfn.vkCmdBeginRenderPass(cmd_buffer_, &render_pass_begin_info, + VK_SUBPASS_CONTENTS_SECONDARY_COMMAND_BUFFERS); // Render commands. - vkCmdExecuteCommands(cmd_buffer_, 1, &render_cmd_buffer_); + dfn.vkCmdExecuteCommands(cmd_buffer_, 1, &render_cmd_buffer_); // End render pass. - vkCmdEndRenderPass(cmd_buffer_); + dfn.vkCmdEndRenderPass(cmd_buffer_); // Transition the image to a format the presentation engine can source from. // FIXME: Do we need more synchronization here between the copy buffer? @@ -715,14 +728,14 @@ VkResult VulkanSwapChain::End() { post_image_memory_barrier.subresourceRange.levelCount = 1; post_image_memory_barrier.subresourceRange.baseArrayLayer = 0; post_image_memory_barrier.subresourceRange.layerCount = 1; - vkCmdPipelineBarrier(cmd_buffer_, - VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, - VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, - nullptr, 1, &post_image_memory_barrier); + dfn.vkCmdPipelineBarrier(cmd_buffer_, + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, 0, 0, nullptr, 0, + nullptr, 1, &post_image_memory_barrier); current_buffer.image_layout = post_image_memory_barrier.newLayout; - status = vkEndCommandBuffer(cmd_buffer_); + status = dfn.vkEndCommandBuffer(cmd_buffer_); CheckResult(status, "vkEndCommandBuffer"); if (status != VK_SUCCESS) { return status; @@ -752,8 +765,8 @@ VkResult VulkanSwapChain::End() { if (presentation_queue_mutex_) { presentation_queue_mutex_->lock(); } - status = vkQueueSubmit(presentation_queue_, 1, &render_submit_info, - synchronization_fence_); + status = dfn.vkQueueSubmit(presentation_queue_, 1, &render_submit_info, + synchronization_fence_); if (presentation_queue_mutex_) { presentation_queue_mutex_->unlock(); } @@ -777,7 +790,7 @@ VkResult VulkanSwapChain::End() { if (presentation_queue_mutex_) { presentation_queue_mutex_->lock(); } - status = vkQueuePresentKHR(presentation_queue_, &present_info); + status = dfn.vkQueuePresentKHR(presentation_queue_, &present_info); if (presentation_queue_mutex_) { presentation_queue_mutex_->unlock(); } diff --git a/src/xenia/ui/vulkan/vulkan_util.h b/src/xenia/ui/vulkan/vulkan_util.h index ac47e5d4b..d57c6c0fa 100644 --- a/src/xenia/ui/vulkan/vulkan_util.h +++ b/src/xenia/ui/vulkan/vulkan_util.h @@ -26,39 +26,37 @@ namespace xe { namespace ui { namespace vulkan { -#define VK_SAFE_DESTROY(fn, dev, obj, alloc) \ - \ - do { \ - if (obj) { \ - fn(dev, obj, alloc); \ - obj = nullptr; \ - } \ - \ - } while (0) - -class Fence { - public: - Fence(VkDevice device) : device_(device) { - VkFenceCreateInfo fence_info; - fence_info.sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO; - fence_info.pNext = nullptr; - fence_info.flags = 0; - vkCreateFence(device, &fence_info, nullptr, &fence_); +template +inline bool DestroyAndNullHandle(F* destroy_function, T& handle) { + if (handle != VK_NULL_HANDLE) { + destroy_function(handle, nullptr); + handle = VK_NULL_HANDLE; + return true; } - ~Fence() { - vkDestroyFence(device_, fence_, nullptr); - fence_ = nullptr; + return false; +} + +template +inline bool DestroyAndNullHandle(F* destroy_function, VkInstance parent, + T& handle) { + if (handle != VK_NULL_HANDLE) { + destroy_function(parent, handle, nullptr); + handle = VK_NULL_HANDLE; + return true; } + return false; +} - VkResult status() const { return vkGetFenceStatus(device_, fence_); } - - VkFence fence() const { return fence_; } - operator VkFence() const { return fence_; } - - private: - VkDevice device_; - VkFence fence_ = nullptr; -}; +template +inline bool DestroyAndNullHandle(F* destroy_function, VkDevice parent, + T& handle) { + if (handle != VK_NULL_HANDLE) { + destroy_function(parent, handle, nullptr); + handle = VK_NULL_HANDLE; + return true; + } + return false; +} struct Version { uint32_t major; diff --git a/src/xenia/ui/window.cc b/src/xenia/ui/window.cc index 1273b61f0..47a2b874c 100644 --- a/src/xenia/ui/window.cc +++ b/src/xenia/ui/window.cc @@ -259,20 +259,21 @@ void Window::OnLostFocus(UIEvent* e) { void Window::OnKeyPress(KeyEvent* e, bool is_down, bool is_char) { if (!is_char) { - switch (e->key_code()) { - case 16: + switch (e->virtual_key()) { + case VirtualKey::kShift: modifier_shift_pressed_ = is_down; break; - case 17: + case VirtualKey::kControl: modifier_cntrl_pressed_ = is_down; break; - // case xx: - // // alt ?? - // modifier_alt_pressed_ = is_down; - // break; - case 91: + case VirtualKey::kMenu: + modifier_alt_pressed_ = is_down; + break; + case VirtualKey::kLWin: modifier_super_pressed_ = is_down; break; + default: + break; } } } diff --git a/src/xenia/ui/window.h b/src/xenia/ui/window.h index d8d3ac00b..56094553b 100644 --- a/src/xenia/ui/window.h +++ b/src/xenia/ui/window.h @@ -14,6 +14,7 @@ #include #include "xenia/base/delegate.h" +#include "xenia/base/platform.h" #include "xenia/ui/graphics_context.h" #include "xenia/ui/loop.h" #include "xenia/ui/menu_item.h" @@ -172,9 +173,16 @@ class Window { Loop* loop_ = nullptr; std::unique_ptr main_menu_; std::string title_; +#ifdef XE_PLATFORM_GNU_LINUX // GTK must have a default value here that isn't 0 + // TODO(Triang3l): Cleanup and unify this. May need to get the first resize + // message on various platforms. int32_t width_ = 1280; int32_t height_ = 720; +#else + int32_t width_ = 0; + int32_t height_ = 0; +#endif bool has_focus_ = true; bool is_cursor_visible_ = true; bool is_imgui_input_enabled_ = false; diff --git a/src/xenia/ui/window_demo.cc b/src/xenia/ui/window_demo.cc index cda8a6b83..4f94a1fc3 100644 --- a/src/xenia/ui/window_demo.cc +++ b/src/xenia/ui/window_demo.cc @@ -18,6 +18,7 @@ #include "xenia/ui/graphics_provider.h" #include "xenia/ui/imgui_dialog.h" #include "xenia/ui/imgui_drawer.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/window.h" namespace xe { @@ -92,10 +93,12 @@ int window_demo_main(const std::vector& args) { loop->on_quit.AddListener([&window](xe::ui::UIEvent* e) { window.reset(); }); window->on_key_down.AddListener([](xe::ui::KeyEvent* e) { - switch (e->key_code()) { - case 0x72: { // F3 + switch (e->virtual_key()) { + case VirtualKey::kF3: Profiler::ToggleDisplay(); - } break; + break; + default: + break; } }); diff --git a/src/xenia/ui/window_gtk.cc b/src/xenia/ui/window_gtk.cc index a53aacabb..cf272619b 100644 --- a/src/xenia/ui/window_gtk.cc +++ b/src/xenia/ui/window_gtk.cc @@ -16,6 +16,7 @@ #include "xenia/base/clock.h" #include "xenia/base/logging.h" #include "xenia/base/platform_linux.h" +#include "xenia/ui/virtual_key.h" #include "xenia/ui/window_gtk.h" namespace xe { @@ -31,7 +32,9 @@ GTKWindow::GTKWindow(Loop* loop, const std::string& title) GTKWindow::~GTKWindow() { OnDestroy(); if (window_) { - if (GTK_IS_WIDGET(window_)) gtk_widget_destroy(window_); + if (GTK_IS_WIDGET(window_)) { + gtk_widget_destroy(window_); + } window_ = nullptr; } } @@ -406,9 +409,10 @@ bool GTKWindow::HandleKeyboard(GdkEventKey* event) { bool alt_pressed = modifiers & GDK_META_MASK; bool super_pressed = modifiers & GDK_SUPER_MASK; uint32_t key_char = gdk_keyval_to_unicode(event->keyval); - auto e = - KeyEvent(this, event->hardware_keycode, 1, event->type == GDK_KEY_RELEASE, - shift_pressed, ctrl_pressed, alt_pressed, super_pressed); + // TODO(Triang3l): event->hardware_keycode to VirtualKey translation. + auto e = KeyEvent(this, VirtualKey(event->hardware_keycode), 1, + event->type == GDK_KEY_RELEASE, shift_pressed, ctrl_pressed, + alt_pressed, super_pressed); switch (event->type) { case GDK_KEY_PRESS: OnKeyDown(&e); diff --git a/src/xenia/ui/window_win.cc b/src/xenia/ui/window_win.cc index 853f14030..a88cad529 100644 --- a/src/xenia/ui/window_win.cc +++ b/src/xenia/ui/window_win.cc @@ -17,6 +17,7 @@ #include "xenia/base/filesystem.h" #include "xenia/base/logging.h" #include "xenia/base/platform_win.h" +#include "xenia/ui/virtual_key.h" namespace xe { namespace ui { @@ -446,7 +447,7 @@ void Win32Window::Close() { closing_ = true; OnClose(); DestroyWindow(hwnd_); - hwnd_ = 0; + hwnd_ = nullptr; } void Win32Window::OnMainMenuChange() { @@ -707,7 +708,7 @@ bool Win32Window::HandleMouse(UINT message, WPARAM wParam, LPARAM lParam) { bool Win32Window::HandleKeyboard(UINT message, WPARAM wParam, LPARAM lParam) { auto e = KeyEvent( - this, static_cast(wParam), lParam & 0xFFFF0000, !!(lParam & 0x2), + this, VirtualKey(wParam), lParam & 0xFFFF0000, !!(lParam & 0x2), !!(GetKeyState(VK_SHIFT) & 0x80), !!(GetKeyState(VK_CONTROL) & 0x80), !!(GetKeyState(VK_MENU) & 0x80), !!(GetKeyState(VK_LWIN) & 0x80)); switch (message) { diff --git a/src/xenia/vfs/devices/host_path_file.cc b/src/xenia/vfs/devices/host_path_file.cc index 366273ae6..fd7e9f6fa 100644 --- a/src/xenia/vfs/devices/host_path_file.cc +++ b/src/xenia/vfs/devices/host_path_file.cc @@ -25,7 +25,8 @@ void HostPathFile::Destroy() { delete this; } X_STATUS HostPathFile::ReadSync(void* buffer, size_t buffer_length, size_t byte_offset, size_t* out_bytes_read) { - if (!(file_access_ & FileAccess::kFileReadData)) { + if (!(file_access_ & + (FileAccess::kGenericRead | FileAccess::kFileReadData))) { return X_STATUS_ACCESS_DENIED; } @@ -39,8 +40,8 @@ X_STATUS HostPathFile::ReadSync(void* buffer, size_t buffer_length, X_STATUS HostPathFile::WriteSync(const void* buffer, size_t buffer_length, size_t byte_offset, size_t* out_bytes_written) { - if (!(file_access_ & - (FileAccess::kFileWriteData | FileAccess::kFileAppendData))) { + if (!(file_access_ & (FileAccess::kGenericWrite | FileAccess::kFileWriteData | + FileAccess::kFileAppendData))) { return X_STATUS_ACCESS_DENIED; } @@ -53,7 +54,8 @@ X_STATUS HostPathFile::WriteSync(const void* buffer, size_t buffer_length, } X_STATUS HostPathFile::SetLength(size_t length) { - if (!(file_access_ & FileAccess::kFileWriteData)) { + if (!(file_access_ & + (FileAccess::kGenericWrite | FileAccess::kFileWriteData))) { return X_STATUS_ACCESS_DENIED; } diff --git a/src/xenia/vfs/devices/null_device.cc b/src/xenia/vfs/devices/null_device.cc new file mode 100644 index 000000000..e7b014d7b --- /dev/null +++ b/src/xenia/vfs/devices/null_device.cc @@ -0,0 +1,62 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/vfs/devices/null_device.h" + +#include "xenia/base/filesystem.h" +#include "xenia/base/logging.h" +#include "xenia/base/math.h" +#include "xenia/kernel/xfile.h" +#include "xenia/vfs/devices/null_entry.h" + +namespace xe { +namespace vfs { + +NullDevice::NullDevice(const std::string& mount_path, + const std::initializer_list& null_paths) + : Device(mount_path), null_paths_(null_paths), name_("NullDevice") {} + +NullDevice::~NullDevice() = default; + +bool NullDevice::Initialize() { + auto root_entry = new NullEntry(this, nullptr, mount_path_); + root_entry->attributes_ = kFileAttributeDirectory; + root_entry_ = std::unique_ptr(root_entry); + + for (auto path : null_paths_) { + auto child = NullEntry::Create(this, root_entry, path); + root_entry->children_.push_back(std::unique_ptr(child)); + } + return true; +} + +void NullDevice::Dump(StringBuffer* string_buffer) { + auto global_lock = global_critical_region_.Acquire(); + root_entry_->Dump(string_buffer, 0); +} + +Entry* NullDevice::ResolvePath(const std::string_view path) { + XELOGFS("NullDevice::ResolvePath({})", path); + + auto root = root_entry_.get(); + if (path.empty()) { + return root_entry_.get(); + } + + for (auto& child : root->children()) { + if (!strcasecmp(child->path().c_str(), path.data())) { + return child.get(); + } + } + + return nullptr; +} + +} // namespace vfs +} // namespace xe diff --git a/src/xenia/vfs/devices/null_device.h b/src/xenia/vfs/devices/null_device.h new file mode 100644 index 000000000..6ac8f2a35 --- /dev/null +++ b/src/xenia/vfs/devices/null_device.h @@ -0,0 +1,57 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_VFS_DEVICES_NULL_DEVICE_H_ +#define XENIA_VFS_DEVICES_NULL_DEVICE_H_ + +#include + +#include "xenia/vfs/device.h" + +namespace xe { +namespace vfs { + +class NullEntry; + +class NullDevice : public Device { + public: + NullDevice(const std::string& mount_path, + const std::initializer_list& null_paths); + ~NullDevice() override; + + bool Initialize() override; + void Dump(StringBuffer* string_buffer) override; + Entry* ResolvePath(const std::string_view path) override; + + bool is_read_only() const override { return false; } + + const std::string& name() const override { return name_; } + uint32_t attributes() const override { return 0; } + uint32_t component_name_max_length() const override { return 40; } + + uint32_t total_allocation_units() const override { return 0x10; } + uint32_t available_allocation_units() const override { return 0x10; } + + // STFC/cache code seems to require the product of the next two to equal + // 0x10000 + uint32_t sectors_per_allocation_unit() const override { return 0x80; } + + // STFC requires <= 0x1000 + uint32_t bytes_per_sector() const override { return 0x200; } + + private: + std::string name_; + std::unique_ptr root_entry_; + std::vector null_paths_; +}; + +} // namespace vfs +} // namespace xe + +#endif // XENIA_VFS_DEVICES_NULL_DEVICE_H_ diff --git a/src/xenia/vfs/devices/null_entry.cc b/src/xenia/vfs/devices/null_entry.cc new file mode 100644 index 000000000..45b511c40 --- /dev/null +++ b/src/xenia/vfs/devices/null_entry.cc @@ -0,0 +1,55 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/vfs/devices/null_entry.h" + +#include "xenia/base/filesystem.h" +#include "xenia/base/logging.h" +#include "xenia/base/mapped_memory.h" +#include "xenia/base/math.h" +#include "xenia/base/string.h" +#include "xenia/vfs/device.h" +#include "xenia/vfs/devices/null_file.h" + +namespace xe { +namespace vfs { + +NullEntry::NullEntry(Device* device, Entry* parent, std::string path) + : Entry(device, parent, path) {} + +NullEntry::~NullEntry() = default; + +NullEntry* NullEntry::Create(Device* device, Entry* parent, + const std::string& path) { + auto entry = new NullEntry(device, parent, path); + + entry->create_timestamp_ = 0; + entry->access_timestamp_ = 0; + entry->write_timestamp_ = 0; + + entry->attributes_ = kFileAttributeNormal; + + entry->size_ = 0; + entry->allocation_size_ = 0; + return entry; +} + +X_STATUS NullEntry::Open(uint32_t desired_access, File** out_file) { + if (is_read_only() && (desired_access & (FileAccess::kFileWriteData | + FileAccess::kFileAppendData))) { + XELOGE("Attempting to open file for write access on read-only device"); + return X_STATUS_ACCESS_DENIED; + } + + *out_file = new NullFile(desired_access, this); + return X_STATUS_SUCCESS; +} + +} // namespace vfs +} // namespace xe diff --git a/src/xenia/vfs/devices/null_entry.h b/src/xenia/vfs/devices/null_entry.h new file mode 100644 index 000000000..84f01cb95 --- /dev/null +++ b/src/xenia/vfs/devices/null_entry.h @@ -0,0 +1,42 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_VFS_DEVICES_NULL_ENTRY_H_ +#define XENIA_VFS_DEVICES_NULL_ENTRY_H_ + +#include + +#include "xenia/base/filesystem.h" +#include "xenia/vfs/entry.h" + +namespace xe { +namespace vfs { + +class NullDevice; + +class NullEntry : public Entry { + public: + NullEntry(Device* device, Entry* parent, std::string path); + ~NullEntry() override; + + static NullEntry* Create(Device* device, Entry* parent, + const std::string& path); + + X_STATUS Open(uint32_t desired_access, File** out_file) override; + + bool can_map() const override { return false; } + + private: + friend class NullDevice; +}; + +} // namespace vfs +} // namespace xe + +#endif // XENIA_VFS_DEVICES_NULL_ENTRY_H_ diff --git a/src/xenia/vfs/devices/null_file.cc b/src/xenia/vfs/devices/null_file.cc new file mode 100644 index 000000000..e04fd8397 --- /dev/null +++ b/src/xenia/vfs/devices/null_file.cc @@ -0,0 +1,52 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/vfs/devices/null_file.h" + +#include "xenia/vfs/devices/null_entry.h" + +namespace xe { +namespace vfs { + +NullFile::NullFile(uint32_t file_access, NullEntry* entry) + : File(file_access, entry) {} + +NullFile::~NullFile() = default; + +void NullFile::Destroy() { delete this; } + +X_STATUS NullFile::ReadSync(void* buffer, size_t buffer_length, + size_t byte_offset, size_t* out_bytes_read) { + if (!(file_access_ & FileAccess::kFileReadData)) { + return X_STATUS_ACCESS_DENIED; + } + + return X_STATUS_SUCCESS; +} + +X_STATUS NullFile::WriteSync(const void* buffer, size_t buffer_length, + size_t byte_offset, size_t* out_bytes_written) { + if (!(file_access_ & + (FileAccess::kFileWriteData | FileAccess::kFileAppendData))) { + return X_STATUS_ACCESS_DENIED; + } + + return X_STATUS_SUCCESS; +} + +X_STATUS NullFile::SetLength(size_t length) { + if (!(file_access_ & FileAccess::kFileWriteData)) { + return X_STATUS_ACCESS_DENIED; + } + + return X_STATUS_SUCCESS; +} + +} // namespace vfs +} // namespace xe diff --git a/src/xenia/vfs/devices/null_file.h b/src/xenia/vfs/devices/null_file.h new file mode 100644 index 000000000..32a6be25c --- /dev/null +++ b/src/xenia/vfs/devices/null_file.h @@ -0,0 +1,40 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_VFS_DEVICES_NULL_FILE_H_ +#define XENIA_VFS_DEVICES_NULL_FILE_H_ + +#include + +#include "xenia/base/filesystem.h" +#include "xenia/vfs/file.h" + +namespace xe { +namespace vfs { + +class NullEntry; + +class NullFile : public File { + public: + NullFile(uint32_t file_access, NullEntry* entry); + ~NullFile() override; + + void Destroy() override; + + X_STATUS ReadSync(void* buffer, size_t buffer_length, size_t byte_offset, + size_t* out_bytes_read) override; + X_STATUS WriteSync(const void* buffer, size_t buffer_length, + size_t byte_offset, size_t* out_bytes_written) override; + X_STATUS SetLength(size_t length) override; +}; + +} // namespace vfs +} // namespace xe + +#endif // XENIA_VFS_DEVICES_NULL_FILE_H_ diff --git a/src/xenia/vfs/devices/stfs_container_device.cc b/src/xenia/vfs/devices/stfs_container_device.cc index e174dc5cd..138178632 100644 --- a/src/xenia/vfs/devices/stfs_container_device.cc +++ b/src/xenia/vfs/devices/stfs_container_device.cc @@ -25,15 +25,6 @@ namespace xe { namespace vfs { -uint32_t load_uint24_be(const uint8_t* p) { - return (static_cast(p[0]) << 16) | - (static_cast(p[1]) << 8) | static_cast(p[2]); -} -uint32_t load_uint24_le(const uint8_t* p) { - return (static_cast(p[2]) << 16) | - (static_cast(p[1]) << 8) | static_cast(p[0]); -} - // Convert FAT timestamp to 100-nanosecond intervals since January 1, 1601 (UTC) uint64_t decode_fat_timestamp(uint32_t date, uint32_t time) { struct tm tm = {0}; @@ -58,13 +49,14 @@ StfsContainerDevice::StfsContainerDevice(const std::string_view mount_path, : Device(mount_path), name_("STFS"), host_path_(host_path), - mmap_total_size_(), - base_offset_(), - magic_offset_(), + files_total_size_(), + svod_base_offset_(), header_(), - svod_layout_() {} + svod_layout_(), + blocks_per_hash_table_(1), + block_step{0, 0} {} -StfsContainerDevice::~StfsContainerDevice() = default; +StfsContainerDevice::~StfsContainerDevice() { CloseFiles(); } bool StfsContainerDevice::Initialize() { // Resolve a valid STFS file if a directory is given. @@ -81,10 +73,10 @@ bool StfsContainerDevice::Initialize() { return false; } - // Map the data file(s) - auto map_result = MapFiles(); - if (map_result != Error::kSuccess) { - XELOGE("Failed to map STFS container: {}", map_result); + // Open the data file(s) + auto open_result = OpenFiles(); + if (open_result != Error::kSuccess) { + XELOGE("Failed to open STFS container: {}", open_result); return false; } @@ -95,36 +87,36 @@ bool StfsContainerDevice::Initialize() { case XContentVolumeType::kSvod: return ReadSVOD() == Error::kSuccess; default: - XELOGE("Unknown STFS Descriptor Type: {}", + XELOGE("Unknown XContent volume type: {}", xe::byte_swap(uint32_t(header_.metadata.volume_type.value))); return false; } } -StfsContainerDevice::Error StfsContainerDevice::MapFiles() { +StfsContainerDevice::Error StfsContainerDevice::OpenFiles() { // Map the file containing the STFS Header and read it. - XELOGI("Mapping STFS Header file: {}", xe::path_to_utf8(host_path_)); - auto header_map = MappedMemory::Open(host_path_, MappedMemory::Mode::kRead); - if (!header_map) { - XELOGE("Error mapping STFS Header file."); + XELOGI("Loading STFS header file: {}", xe::path_to_utf8(host_path_)); + + auto header_file = xe::filesystem::OpenFile(host_path_, "rb"); + if (!header_file) { + XELOGE("Error opening STFS header file."); return Error::kErrorReadError; } - auto header_result = - ReadHeaderAndVerify(header_map->data(), header_map->size()); + auto header_result = ReadHeaderAndVerify(header_file); if (header_result != Error::kSuccess) { - XELOGE("Error reading STFS Header: {}", header_result); + XELOGE("Error reading STFS header: {}", header_result); + fclose(header_file); + files_total_size_ = 0; return header_result; } - mmap_total_size_ = header_map->size(); - // If the STFS package is a single file, the header is self contained and // we don't need to map any extra files. // NOTE: data_file_count is 0 for STFS and 1 for SVOD if (header_.metadata.data_file_count <= 1) { XELOGI("STFS container is a single file."); - mmap_.emplace(std::make_pair(0, std::move(header_map))); + files_.emplace(std::make_pair(0, header_file)); return Error::kSuccess; } @@ -152,22 +144,32 @@ StfsContainerDevice::Error StfsContainerDevice::MapFiles() { } for (size_t i = 0; i < fragment_files.size(); i++) { - auto file = fragment_files.at(i); - auto path = file.path / file.name; - auto data = MappedMemory::Open(path, MappedMemory::Mode::kRead); - if (!data) { + auto& fragment = fragment_files.at(i); + auto path = fragment.path / fragment.name; + auto file = xe::filesystem::OpenFile(path, "rb"); + if (!file) { XELOGI("Failed to map SVOD file {}.", xe::path_to_utf8(path)); - mmap_.clear(); - mmap_total_size_ = 0; + CloseFiles(); return Error::kErrorReadError; } - mmap_total_size_ += data->size(); - mmap_.emplace(std::make_pair(i, std::move(data))); + + xe::filesystem::Seek(file, 0L, SEEK_END); + files_total_size_ += xe::filesystem::Tell(file); + // no need to seek back, any reads from this file will seek first anyway + files_.emplace(std::make_pair(i, file)); } XELOGI("SVOD successfully mapped {} files.", fragment_files.size()); return Error::kSuccess; } +void StfsContainerDevice::CloseFiles() { + for (auto& file : files_) { + fclose(file.second); + } + files_.clear(); + files_total_size_ = 0; +} + void StfsContainerDevice::Dump(StringBuffer* string_buffer) { auto global_lock = global_critical_region_.Acquire(); root_entry_->Dump(string_buffer, 0); @@ -182,23 +184,36 @@ Entry* StfsContainerDevice::ResolvePath(const std::string_view path) { } StfsContainerDevice::Error StfsContainerDevice::ReadHeaderAndVerify( - const uint8_t* map_ptr, size_t map_size) { - // Copy header & check signature - memcpy(&header_, map_ptr, sizeof(StfsHeader)); - if (header_.header.magic != XContentPackageType::kPackageTypeCon && - header_.header.magic != XContentPackageType::kPackageTypeLive && - header_.header.magic != XContentPackageType::kPackageTypePirs) { + FILE* header_file) { + // Check size of the file is enough to store an STFS header + xe::filesystem::Seek(header_file, 0L, SEEK_END); + files_total_size_ = xe::filesystem::Tell(header_file); + xe::filesystem::Seek(header_file, 0L, SEEK_SET); + + if (sizeof(StfsHeader) > files_total_size_) { + return Error::kErrorTooSmall; + } + + // Read header & check signature + if (fread(&header_, sizeof(StfsHeader), 1, header_file) != 1) { + return Error::kErrorReadError; + } + + if (!header_.header.is_magic_valid()) { // Unexpected format. return Error::kErrorFileMismatch; } // Pre-calculate some values used in block number calculations - blocks_per_hash_table_ = - header_.metadata.stfs_volume_descriptor.flags.read_only_format ? 1 : 2; + if (header_.metadata.volume_type == XContentVolumeType::kStfs) { + blocks_per_hash_table_ = + header_.metadata.volume_descriptor.stfs.flags.bits.read_only_format ? 1 + : 2; - block_step[0] = kBlocksPerHashLevel[0] + blocks_per_hash_table_; - block_step[1] = kBlocksPerHashLevel[1] + - ((kBlocksPerHashLevel[0] + 1) * blocks_per_hash_table_); + block_step[0] = kBlocksPerHashLevel[0] + blocks_per_hash_table_; + block_step[1] = kBlocksPerHashLevel[1] + + ((kBlocksPerHashLevel[0] + 1) * blocks_per_hash_table_); + } return Error::kSuccess; } @@ -207,76 +222,120 @@ StfsContainerDevice::Error StfsContainerDevice::ReadSVOD() { // SVOD Systems can have different layouts. The root block is // denoted by the magic "MICROSOFT*XBOX*MEDIA" and is always in // the first "actual" data fragment of the system. - auto data = mmap_.at(0)->data(); + auto& svod_header = files_.at(0); const char* MEDIA_MAGIC = "MICROSOFT*XBOX*MEDIA"; + uint8_t magic_buf[20]; + size_t magic_offset; + // Check for EDGF layout - if (header_.metadata.svod_volume_descriptor.features.enhanced_gdf_layout) { + if (header_.metadata.volume_descriptor.svod.features.bits + .enhanced_gdf_layout) { // The STFS header has specified that this SVOD system uses the EGDF layout. // We can expect the magic block to be located immediately after the hash // blocks. We also offset block address calculation by 0x1000 by shifting // block indices by +0x2. - if (memcmp(data + 0x2000, MEDIA_MAGIC, 20) == 0) { - base_offset_ = 0x0000; - magic_offset_ = 0x2000; + xe::filesystem::Seek(svod_header, 0x2000, SEEK_SET); + if (fread(magic_buf, 1, countof(magic_buf), svod_header) != + countof(magic_buf)) { + XELOGE("ReadSVOD failed to read SVOD magic at 0x2000"); + return Error::kErrorReadError; + } + + if (std::memcmp(magic_buf, MEDIA_MAGIC, 20) == 0) { + svod_base_offset_ = 0x0000; + magic_offset = 0x2000; svod_layout_ = SvodLayoutType::kEnhancedGDF; XELOGI("SVOD uses an EGDF layout. Magic block present at 0x2000."); } else { XELOGE("SVOD uses an EGDF layout, but the magic block was not found."); return Error::kErrorFileMismatch; } - } else if (memcmp(data + 0x12000, MEDIA_MAGIC, 20) == 0) { - // If the SVOD's magic block is at 0x12000, it is likely using an XSF - // layout. This is usually due to converting the game using a third-party - // tool, as most of them use a nulled XSF as a template. - - base_offset_ = 0x10000; - magic_offset_ = 0x12000; - - // Check for XSF Header - const char* XSF_MAGIC = "XSF"; - if (memcmp(data + 0x2000, XSF_MAGIC, 3) == 0) { - svod_layout_ = SvodLayoutType::kXSF; - XELOGI("SVOD uses an XSF layout. Magic block present at 0x12000."); - XELOGI("Game was likely converted using a third-party tool."); - } else { - svod_layout_ = SvodLayoutType::kUnknown; - XELOGI("SVOD appears to use an XSF layout, but no header is present."); - XELOGI("SVOD magic block found at 0x12000"); - } - } else if (memcmp(data + 0xD000, MEDIA_MAGIC, 20) == 0) { - // If the SVOD's magic block is at 0xD000, it most likely means that it is - // a single-file system. The STFS Header is 0xB000 bytes , and the remaining - // 0x2000 is from hash tables. In most cases, these will be STFS, not SVOD. - - base_offset_ = 0xB000; - magic_offset_ = 0xD000; - - // Check for single file system - if (header_.metadata.data_file_count == 1) { - svod_layout_ = SvodLayoutType::kSingleFile; - XELOGI("SVOD is a single file. Magic block present at 0xD000."); - } else { - svod_layout_ = SvodLayoutType::kUnknown; - XELOGE( - "SVOD is not a single file, but the magic block was found at " - "0xD000."); - } } else { - XELOGE("Could not locate SVOD magic block."); - return Error::kErrorReadError; + xe::filesystem::Seek(svod_header, 0x12000, SEEK_SET); + if (fread(magic_buf, 1, countof(magic_buf), svod_header) != + countof(magic_buf)) { + XELOGE("ReadSVOD failed to read SVOD magic at 0x12000"); + return Error::kErrorReadError; + } + if (std::memcmp(magic_buf, MEDIA_MAGIC, 20) == 0) { + // If the SVOD's magic block is at 0x12000, it is likely using an XSF + // layout. This is usually due to converting the game using a third-party + // tool, as most of them use a nulled XSF as a template. + + svod_base_offset_ = 0x10000; + magic_offset = 0x12000; + + // Check for XSF Header + const char* XSF_MAGIC = "XSF"; + xe::filesystem::Seek(svod_header, 0x2000, SEEK_SET); + if (fread(magic_buf, 1, 3, svod_header) != 3) { + XELOGE("ReadSVOD failed to read SVOD XSF magic at 0x2000"); + return Error::kErrorReadError; + } + if (std::memcmp(magic_buf, XSF_MAGIC, 3) == 0) { + svod_layout_ = SvodLayoutType::kXSF; + XELOGI("SVOD uses an XSF layout. Magic block present at 0x12000."); + XELOGI("Game was likely converted using a third-party tool."); + } else { + svod_layout_ = SvodLayoutType::kUnknown; + XELOGI("SVOD appears to use an XSF layout, but no header is present."); + XELOGI("SVOD magic block found at 0x12000"); + } + } else { + xe::filesystem::Seek(svod_header, 0xD000, SEEK_SET); + if (fread(magic_buf, 1, countof(magic_buf), svod_header) != + countof(magic_buf)) { + XELOGE("ReadSVOD failed to read SVOD magic at 0xD000"); + return Error::kErrorReadError; + } + if (std::memcmp(magic_buf, MEDIA_MAGIC, 20) == 0) { + // If the SVOD's magic block is at 0xD000, it most likely means that it + // is a single-file system. The STFS Header is 0xB000 bytes , and the + // remaining 0x2000 is from hash tables. In most cases, these will be + // STFS, not SVOD. + + svod_base_offset_ = 0xB000; + magic_offset = 0xD000; + + // Check for single file system + if (header_.metadata.data_file_count == 1) { + svod_layout_ = SvodLayoutType::kSingleFile; + XELOGI("SVOD is a single file. Magic block present at 0xD000."); + } else { + svod_layout_ = SvodLayoutType::kUnknown; + XELOGE( + "SVOD is not a single file, but the magic block was found at " + "0xD000."); + } + } else { + XELOGE("Could not locate SVOD magic block."); + return Error::kErrorReadError; + } + } } // Parse the root directory - uint8_t* magic_block = data + magic_offset_; - uint32_t root_block = xe::load(magic_block + 0x14); - uint32_t root_size = xe::load(magic_block + 0x18); - uint32_t root_creation_date = xe::load(magic_block + 0x1C); - uint32_t root_creation_time = xe::load(magic_block + 0x20); - uint64_t root_creation_timestamp = - decode_fat_timestamp(root_creation_date, root_creation_time); + xe::filesystem::Seek(svod_header, magic_offset + 0x14, SEEK_SET); - auto root_entry = new StfsContainerEntry(this, nullptr, "", &mmap_); + struct { + uint32_t block; + uint32_t size; + uint32_t creation_date; + uint32_t creation_time; + } root_data; + static_assert_size(root_data, 0x10); + + if (fread(&root_data, sizeof(root_data), 1, svod_header) != 1) { + XELOGE("ReadSVOD failed to read root block data at 0x{X}", + magic_offset + 0x14); + return Error::kErrorReadError; + } + + uint64_t root_creation_timestamp = + decode_fat_timestamp(root_data.creation_date, root_data.creation_time); + + auto root_entry = new StfsContainerEntry(this, nullptr, "", &files_); root_entry->attributes_ = kFileAttributeDirectory; root_entry->access_timestamp_ = root_creation_timestamp; root_entry->create_timestamp_ = root_creation_timestamp; @@ -284,7 +343,7 @@ StfsContainerDevice::Error StfsContainerDevice::ReadSVOD() { root_entry_ = std::unique_ptr(root_entry); // Traverse all child entries - return ReadEntrySVOD(root_block, 0, root_entry); + return ReadEntrySVOD(root_data.block, 0, root_entry); } StfsContainerDevice::Error StfsContainerDevice::ReadEntrySVOD( @@ -300,21 +359,41 @@ StfsContainerDevice::Error StfsContainerDevice::ReadEntrySVOD( BlockToOffsetSVOD(block + block_offset, &entry_address, &entry_file); entry_address += true_ordinal_offset; - // Read block's descriptor - auto data = mmap_.at(entry_file)->data() + entry_address; + // Read directory entry + auto& file = files_.at(entry_file); + xe::filesystem::Seek(file, entry_address, SEEK_SET); - uint16_t node_l = xe::load(data + 0x00); - uint16_t node_r = xe::load(data + 0x02); - uint32_t data_block = xe::load(data + 0x04); - uint32_t length = xe::load(data + 0x08); - uint8_t attributes = xe::load(data + 0x0C); - uint8_t name_length = xe::load(data + 0x0D); - auto name_buffer = reinterpret_cast(data + 0x0E); - auto name = std::string(name_buffer, name_length); +#pragma pack(push, 1) + struct { + uint16_t node_l; + uint16_t node_r; + uint32_t data_block; + uint32_t length; + uint8_t attributes; + uint8_t name_length; + } dir_entry; + static_assert_size(dir_entry, 0xE); +#pragma pack(pop) + + if (fread(&dir_entry, sizeof(dir_entry), 1, file) != 1) { + XELOGE("ReadEntrySVOD failed to read directory entry at 0x{X}", + entry_address); + return Error::kErrorReadError; + } + + auto name_buffer = std::make_unique(dir_entry.name_length); + if (fread(name_buffer.get(), 1, dir_entry.name_length, file) != + dir_entry.name_length) { + XELOGE("ReadEntrySVOD failed to read directory entry name at 0x{X}", + entry_address); + return Error::kErrorReadError; + } + + auto name = std::string(name_buffer.get(), dir_entry.name_length); // Read the left node - if (node_l) { - auto node_result = ReadEntrySVOD(block, node_l, parent); + if (dir_entry.node_l) { + auto node_result = ReadEntrySVOD(block, dir_entry.node_l, parent); if (node_result != Error::kSuccess) { return node_result; } @@ -322,14 +401,14 @@ StfsContainerDevice::Error StfsContainerDevice::ReadEntrySVOD( // Read file & address of block's data size_t data_address, data_file; - BlockToOffsetSVOD(data_block, &data_address, &data_file); + BlockToOffsetSVOD(dir_entry.data_block, &data_address, &data_file); // Create the entry // NOTE: SVOD entries don't have timestamps for individual files, which can // cause issues when decrypting games. Using the root entry's timestamp // solves this issues. - auto entry = StfsContainerEntry::Create(this, parent, name, &mmap_); - if (attributes & kFileAttributeDirectory) { + auto entry = StfsContainerEntry::Create(this, parent, name, &files_); + if (dir_entry.attributes & kFileAttributeDirectory) { // Entry is a directory entry->attributes_ = kFileAttributeDirectory | kFileAttributeReadOnly; entry->data_offset_ = 0; @@ -339,9 +418,10 @@ StfsContainerDevice::Error StfsContainerDevice::ReadEntrySVOD( entry->create_timestamp_ = root_entry_->create_timestamp(); entry->write_timestamp_ = root_entry_->create_timestamp(); - if (length) { + if (dir_entry.length) { // If length is greater than 0, traverse the directory's children - auto directory_result = ReadEntrySVOD(data_block, 0, entry.get()); + auto directory_result = + ReadEntrySVOD(dir_entry.data_block, 0, entry.get()); if (directory_result != Error::kSuccess) { return directory_result; } @@ -349,19 +429,19 @@ StfsContainerDevice::Error StfsContainerDevice::ReadEntrySVOD( } else { // Entry is a file entry->attributes_ = kFileAttributeNormal | kFileAttributeReadOnly; - entry->size_ = length; - entry->allocation_size_ = xe::round_up(length, kSectorSize); + entry->size_ = dir_entry.length; + entry->allocation_size_ = xe::round_up(dir_entry.length, kBlockSize); entry->data_offset_ = data_address; - entry->data_size_ = length; - entry->block_ = data_block; + entry->data_size_ = dir_entry.length; + entry->block_ = dir_entry.data_block; entry->access_timestamp_ = root_entry_->create_timestamp(); entry->create_timestamp_ = root_entry_->create_timestamp(); entry->write_timestamp_ = root_entry_->create_timestamp(); // Fill in all block records, sector by sector. if (entry->attributes() & X_FILE_ATTRIBUTE_NORMAL) { - uint32_t block_index = data_block; - size_t remaining_size = xe::round_up(length, 0x800); + uint32_t block_index = dir_entry.data_block; + size_t remaining_size = xe::round_up(dir_entry.length, 0x800); size_t last_record = -1; size_t last_offset = -1; @@ -391,8 +471,8 @@ StfsContainerDevice::Error StfsContainerDevice::ReadEntrySVOD( parent->children_.emplace_back(std::move(entry)); // Read the right node. - if (node_r) { - auto node_result = ReadEntrySVOD(block, node_r, parent); + if (dir_entry.node_r) { + auto node_result = ReadEntrySVOD(block, dir_entry.node_r, parent); if (node_result != Error::kSuccess) { return node_result; } @@ -423,7 +503,7 @@ void StfsContainerDevice::BlockToOffsetSVOD(size_t block, size_t* out_address, const size_t BLOCKS_PER_FILE = 0x14388; const size_t MAX_FILE_SIZE = 0xA290000; const size_t BLOCK_OFFSET = - header_.metadata.svod_volume_descriptor.start_data_block(); + header_.metadata.volume_descriptor.svod.start_data_block(); // Resolve the true block address and file index size_t true_block = block - (BLOCK_OFFSET * 2); @@ -446,7 +526,7 @@ void StfsContainerDevice::BlockToOffsetSVOD(size_t block, size_t* out_address, // For single-file SVOD layouts, include the size of the header in the offset. if (svod_layout_ == SvodLayoutType::kSingleFile) { - offset += base_offset_; + offset += svod_base_offset_; } size_t block_address = (file_block * BLOCK_SIZE) + offset; @@ -463,90 +543,102 @@ void StfsContainerDevice::BlockToOffsetSVOD(size_t block, size_t* out_address, } StfsContainerDevice::Error StfsContainerDevice::ReadSTFS() { - auto data = mmap_.at(0)->data(); + auto& file = files_.at(0); - auto root_entry = new StfsContainerEntry(this, nullptr, "", &mmap_); + auto root_entry = new StfsContainerEntry(this, nullptr, "", &files_); root_entry->attributes_ = kFileAttributeDirectory; root_entry_ = std::unique_ptr(root_entry); std::vector all_entries; // Load all listings. - auto& volume_descriptor = header_.metadata.stfs_volume_descriptor; - uint32_t table_block_index = volume_descriptor.file_table_block_number(); - for (size_t n = 0; n < volume_descriptor.file_table_block_count; n++) { - const uint8_t* p = data + BlockToOffsetSTFS(table_block_index); - for (size_t m = 0; m < kSectorSize / 0x40; m++) { - const uint8_t* name_buffer = p; // 0x28b - if (name_buffer[0] == 0) { + StfsDirectoryBlock directory; + + auto& descriptor = header_.metadata.volume_descriptor.stfs; + uint32_t table_block_index = descriptor.file_table_block_number(); + size_t n = 0; + for (n = 0; n < descriptor.file_table_block_count; n++) { + auto offset = BlockToOffsetSTFS(table_block_index); + xe::filesystem::Seek(file, offset, SEEK_SET); + + if (fread(&directory, sizeof(StfsDirectoryBlock), 1, file) != 1) { + XELOGE("ReadSTFS failed to read directory block at 0x{X}", offset); + return Error::kErrorReadError; + } + + for (size_t m = 0; m < kEntriesPerDirectoryBlock; m++) { + auto& dir_entry = directory.entries[m]; + + if (dir_entry.name[0] == 0) { // Done. break; } - uint8_t name_length_flags = xe::load_and_swap(p + 0x28); - uint32_t allocated_block_count = load_uint24_le(p + 0x2C); - uint32_t start_block_index = load_uint24_le(p + 0x2F); - uint16_t path_indicator = xe::load_and_swap(p + 0x32); - uint32_t file_size = xe::load_and_swap(p + 0x34); - - // both date and time parts of the timestamp are big endian - uint16_t update_date = xe::load_and_swap(p + 0x38); - uint16_t update_time = xe::load_and_swap(p + 0x3A); - uint32_t access_date = xe::load_and_swap(p + 0x3C); - uint32_t access_time = xe::load_and_swap(p + 0x3E); - p += 0x40; StfsContainerEntry* parent_entry = nullptr; - if (path_indicator == 0xFFFF) { + if (dir_entry.directory_index == 0xFFFF) { parent_entry = root_entry; } else { - parent_entry = all_entries[path_indicator]; + parent_entry = all_entries[dir_entry.directory_index]; } - std::string name(reinterpret_cast(name_buffer), - name_length_flags & 0x3F); - auto entry = StfsContainerEntry::Create(this, parent_entry, name, &mmap_); + std::string name(reinterpret_cast(dir_entry.name), + dir_entry.flags.name_length & 0x3F); + auto entry = + StfsContainerEntry::Create(this, parent_entry, name, &files_); - // bit 0x40 = consecutive blocks (not fragmented?) - if (name_length_flags & 0x80) { + if (dir_entry.flags.directory) { entry->attributes_ = kFileAttributeDirectory; } else { entry->attributes_ = kFileAttributeNormal | kFileAttributeReadOnly; - entry->data_offset_ = BlockToOffsetSTFS(start_block_index); - entry->data_size_ = file_size; + entry->data_offset_ = BlockToOffsetSTFS(dir_entry.start_block_number()); + entry->data_size_ = dir_entry.length; } - entry->size_ = file_size; - entry->allocation_size_ = xe::round_up(file_size, kSectorSize); + entry->size_ = dir_entry.length; + entry->allocation_size_ = xe::round_up(dir_entry.length, kBlockSize); - entry->create_timestamp_ = decode_fat_timestamp(update_date, update_time); - entry->access_timestamp_ = decode_fat_timestamp(access_date, access_time); - entry->write_timestamp_ = entry->create_timestamp_; + entry->create_timestamp_ = + decode_fat_timestamp(dir_entry.create_date, dir_entry.create_time); + entry->write_timestamp_ = decode_fat_timestamp(dir_entry.modified_date, + dir_entry.modified_time); + entry->access_timestamp_ = entry->write_timestamp_; all_entries.push_back(entry.get()); // Fill in all block records. // It's easier to do this now and just look them up later, at the cost // of some memory. Nasty chain walk. - // TODO(benvanik): optimize if flag 0x40 (consecutive) is set. + // TODO(benvanik): optimize if flags.contiguous is set. if (entry->attributes() & X_FILE_ATTRIBUTE_NORMAL) { - uint32_t block_index = start_block_index; - size_t remaining_size = file_size; - while (remaining_size && block_index != 0xFFFFFF) { + uint32_t block_index = dir_entry.start_block_number(); + size_t remaining_size = dir_entry.length; + while (remaining_size && block_index != kEndOfChain) { size_t block_size = - std::min(static_cast(kSectorSize), remaining_size); + std::min(static_cast(kBlockSize), remaining_size); size_t offset = BlockToOffsetSTFS(block_index); entry->block_list_.push_back({0, offset, block_size}); remaining_size -= block_size; - auto block_hash = GetBlockHash(data, block_index); + auto block_hash = GetBlockHash(block_index); block_index = block_hash->level0_next_block(); } + if (remaining_size) { + // Loop above must have exited prematurely, bad hash tables? + XELOGW( + "STFS file {} only found {} bytes for file, expected {} ({} " + "bytes missing)", + name, dir_entry.length - remaining_size, dir_entry.length, + remaining_size); + assert_always(); + } + // Check that the number of blocks retrieved from hash entries matches // the block count read from the file entry - if (entry->block_list_.size() != allocated_block_count) { + if (entry->block_list_.size() != dir_entry.allocated_data_blocks()) { XELOGW( "STFS failed to read correct block-chain for entry {}, read {} " "blocks, expected {}", - entry->name_, entry->block_list_.size(), allocated_block_count); + entry->name_, entry->block_list_.size(), + dir_entry.allocated_data_blocks()); assert_always(); } } @@ -554,13 +646,19 @@ StfsContainerDevice::Error StfsContainerDevice::ReadSTFS() { parent_entry->children_.emplace_back(std::move(entry)); } - auto block_hash = GetBlockHash(data, table_block_index); + auto block_hash = GetBlockHash(table_block_index); table_block_index = block_hash->level0_next_block(); - if (table_block_index == 0xFFFFFF) { + if (table_block_index == kEndOfChain) { break; } } + if (n + 1 != descriptor.file_table_block_count) { + XELOGW("STFS read {} file table blocks, but STFS headers expected {}!", + n + 1, descriptor.file_table_block_count); + assert_always(); + } + return Error::kSuccess; } @@ -581,7 +679,7 @@ size_t StfsContainerDevice::BlockToOffsetSTFS(uint64_t block_index) const { base *= kBlocksPerHashLevel[0]; } - return xe::round_up(header_.header.header_size, kSectorSize) + (block << 12); + return xe::round_up(header_.header.header_size, kBlockSize) + (block << 12); } uint32_t StfsContainerDevice::BlockToHashBlockNumberSTFS( @@ -619,41 +717,48 @@ uint32_t StfsContainerDevice::BlockToHashBlockNumberSTFS( size_t StfsContainerDevice::BlockToHashBlockOffsetSTFS( uint32_t block_index, uint32_t hash_level) const { uint64_t block = BlockToHashBlockNumberSTFS(block_index, hash_level); - return xe::round_up(header_.header.header_size, kSectorSize) + (block << 12); + return xe::round_up(header_.header.header_size, kBlockSize) + (block << 12); } -const StfsHashEntry* StfsContainerDevice::GetBlockHash(const uint8_t* map_ptr, - uint32_t block_index) { - auto& volume_descriptor = header_.metadata.stfs_volume_descriptor; +const StfsHashEntry* StfsContainerDevice::GetBlockHash(uint32_t block_index) { + auto& file = files_.at(0); + + auto& descriptor = header_.metadata.volume_descriptor.stfs; // Offset for selecting the secondary hash block, in packages that have them uint32_t secondary_table_offset = - volume_descriptor.flags.root_active_index ? kSectorSize : 0; + descriptor.flags.bits.root_active_index ? kBlockSize : 0; auto hash_offset_lv0 = BlockToHashBlockOffsetSTFS(block_index, 0); if (!cached_hash_tables_.count(hash_offset_lv0)) { // If this is read_only_format then it doesn't contain secondary blocks, no // need to check upper hash levels - if (volume_descriptor.flags.read_only_format) { + if (descriptor.flags.bits.read_only_format) { secondary_table_offset = 0; } else { // Not a read-only package, need to check each levels active index flag to // see if we need to use secondary block or not // Check level1 table if package has it - if (volume_descriptor.allocated_block_count > kBlocksPerHashLevel[0]) { + if (descriptor.total_block_count > kBlocksPerHashLevel[0]) { auto hash_offset_lv1 = BlockToHashBlockOffsetSTFS(block_index, 1); if (!cached_hash_tables_.count(hash_offset_lv1)) { // Check level2 table if package has it - if (volume_descriptor.allocated_block_count > - kBlocksPerHashLevel[1]) { + if (descriptor.total_block_count > kBlocksPerHashLevel[1]) { auto hash_offset_lv2 = BlockToHashBlockOffsetSTFS(block_index, 2); if (!cached_hash_tables_.count(hash_offset_lv2)) { - cached_hash_tables_[hash_offset_lv2] = - *reinterpret_cast( - map_ptr + hash_offset_lv2 + secondary_table_offset); + xe::filesystem::Seek( + file, hash_offset_lv2 + secondary_table_offset, SEEK_SET); + + StfsHashTable table_lv2; + if (fread(&table_lv2, sizeof(StfsHashTable), 1, file) != 1) { + XELOGE("GetBlockHash failed to read level2 hash table at 0x{X}", + hash_offset_lv2 + secondary_table_offset); + return nullptr; + } + cached_hash_tables_[hash_offset_lv2] = table_lv2; } auto record = @@ -661,12 +766,19 @@ const StfsHashEntry* StfsContainerDevice::GetBlockHash(const uint8_t* map_ptr, auto record_data = &cached_hash_tables_[hash_offset_lv2].entries[record]; secondary_table_offset = - record_data->levelN_activeindex() ? kSectorSize : 0; + record_data->levelN_active_index() ? kBlockSize : 0; } - cached_hash_tables_[hash_offset_lv1] = - *reinterpret_cast( - map_ptr + hash_offset_lv1 + secondary_table_offset); + xe::filesystem::Seek(file, hash_offset_lv1 + secondary_table_offset, + SEEK_SET); + + StfsHashTable table_lv1; + if (fread(&table_lv1, sizeof(StfsHashTable), 1, file) != 1) { + XELOGE("GetBlockHash failed to read level1 hash table at 0x{X}", + hash_offset_lv1 + secondary_table_offset); + return nullptr; + } + cached_hash_tables_[hash_offset_lv1] = table_lv1; } auto record = @@ -674,13 +786,20 @@ const StfsHashEntry* StfsContainerDevice::GetBlockHash(const uint8_t* map_ptr, auto record_data = &cached_hash_tables_[hash_offset_lv1].entries[record]; secondary_table_offset = - record_data->levelN_activeindex() ? kSectorSize : 0; + record_data->levelN_active_index() ? kBlockSize : 0; } } - cached_hash_tables_[hash_offset_lv0] = - *reinterpret_cast(map_ptr + hash_offset_lv0 + - secondary_table_offset); + xe::filesystem::Seek(file, hash_offset_lv0 + secondary_table_offset, + SEEK_SET); + + StfsHashTable table_lv0; + if (fread(&table_lv0, sizeof(StfsHashTable), 1, file) != 1) { + XELOGE("GetBlockHash failed to read level0 hash table at 0x{X}", + hash_offset_lv0 + secondary_table_offset); + return nullptr; + } + cached_hash_tables_[hash_offset_lv0] = table_lv0; } auto record = block_index % kBlocksPerHashLevel[0]; @@ -689,9 +808,10 @@ const StfsHashEntry* StfsContainerDevice::GetBlockHash(const uint8_t* map_ptr, return record_data; } -uint32_t StfsContainerDevice::ReadMagic(const std::filesystem::path& path) { +XContentPackageType StfsContainerDevice::ReadMagic( + const std::filesystem::path& path) { auto map = MappedMemory::Open(path, MappedMemory::Mode::kRead, 0, 4); - return xe::load_and_swap(map->data()); + return XContentPackageType(xe::load_and_swap(map->data())); } bool StfsContainerDevice::ResolveFromFolder(const std::filesystem::path& path) { @@ -717,9 +837,9 @@ bool StfsContainerDevice::ResolveFromFolder(const std::filesystem::path& path) { auto path = current_file.path / current_file.name; auto magic = ReadMagic(path); - if (magic == XContentPackageType::kPackageTypeCon || - magic == XContentPackageType::kPackageTypeLive || - magic == XContentPackageType::kPackageTypePirs) { + if (magic == XContentPackageType::kCon || + magic == XContentPackageType::kLive || + magic == XContentPackageType::kPirs) { host_path_ = current_file.path / current_file.name; XELOGI("STFS Package found: {}", xe::path_to_utf8(host_path_)); return true; diff --git a/src/xenia/vfs/devices/stfs_container_device.h b/src/xenia/vfs/devices/stfs_container_device.h index f760bf14a..504e22cfd 100644 --- a/src/xenia/vfs/devices/stfs_container_device.h +++ b/src/xenia/vfs/devices/stfs_container_device.h @@ -15,11 +15,11 @@ #include #include -#include "xenia/base/mapped_memory.h" #include "xenia/base/math.h" #include "xenia/base/string_util.h" #include "xenia/kernel/util/xex2_info.h" #include "xenia/vfs/device.h" +#include "xenia/vfs/devices/stfs_xbox.h" namespace xe { namespace vfs { @@ -28,408 +28,21 @@ namespace vfs { class StfsContainerEntry; -enum XContentPackageType : uint32_t { - kPackageTypeCon = 0x434F4E20, - kPackageTypePirs = 0x50495253, - kPackageTypeLive = 0x4C495645, -}; - -enum XContentType : uint32_t { - kSavedGame = 0x00000001, - kMarketplaceContent = 0x00000002, - kPublisher = 0x00000003, - kXbox360Title = 0x00001000, - kIptvPauseBuffer = 0x00002000, - kXNACommunity = 0x00003000, - kInstalledGame = 0x00004000, - kXboxTitle = 0x00005000, - kSocialTitle = 0x00006000, - kGamesOnDemand = 0x00007000, - kSUStoragePack = 0x00008000, - kAvatarItem = 0x00009000, - kProfile = 0x00010000, - kGamerPicture = 0x00020000, - kTheme = 0x00030000, - kCacheFile = 0x00040000, - kStorageDownload = 0x00050000, - kXboxSavedGame = 0x00060000, - kXboxDownload = 0x00070000, - kGameDemo = 0x00080000, - kVideo = 0x00090000, - kGameTitle = 0x000A0000, - kInstaller = 0x000B0000, - kGameTrailer = 0x000C0000, - kArcadeTitle = 0x000D0000, - kXNA = 0x000E0000, - kLicenseStore = 0x000F0000, - kMovie = 0x00100000, - kTV = 0x00200000, - kMusicVideo = 0x00300000, - kGameVideo = 0x00400000, - kPodcastVideo = 0x00500000, - kViralVideo = 0x00600000, - kCommunityGame = 0x02000000, -}; - -enum class XContentVolumeType : uint32_t { - kStfs = 0, - kSvod = 1, -}; - -/* STFS structures */ -XEPACKEDSTRUCT(StfsVolumeDescriptor, { - uint8_t descriptor_length; - uint8_t version; - union { - struct { - uint8_t read_only_format : 1; // if set, only uses a single backing-block - // per hash table (no resiliency), - // otherwise uses two - uint8_t root_active_index : 1; // if set, uses secondary backing-block - // for the highest-level hash table - uint8_t directory_overallocated : 1; - uint8_t directory_index_bounds_valid : 1; - }; - uint8_t as_byte; - } flags; - uint16_t file_table_block_count; - uint8_t file_table_block_number_0; - uint8_t file_table_block_number_1; - uint8_t file_table_block_number_2; - uint8_t top_hash_table_hash[0x14]; - be allocated_block_count; - be free_block_count; - - uint32_t file_table_block_number() { - return uint32_t(file_table_block_number_0) | - (uint32_t(file_table_block_number_1) << 8) | - (uint32_t(file_table_block_number_2) << 16); - } -}); -static_assert_size(StfsVolumeDescriptor, 0x24); - -struct StfsHashEntry { - uint8_t sha1[0x14]; - - uint8_t info0; // usually contains flags - - uint8_t info1; - uint8_t info2; - uint8_t info3; - - // If this is a level0 entry, this points to the next block in the chain - uint32_t level0_next_block() const { - return uint32_t(info3) | (uint32_t(info2) << 8) | (uint32_t(info1) << 16); - } - - void level0_next_block(uint32_t value) { - info3 = uint8_t(value & 0xFF); - info2 = uint8_t((value >> 8) & 0xFF); - info1 = uint8_t((value >> 16) & 0xFF); - } - - // If this is level 1 or 2, this says whether the hash table this entry refers - // to is using the secondary block or not - bool levelN_activeindex() const { return info0 & 0x40; } - - bool levelN_writeable() const { return info0 & 0x80; } -}; -static_assert_size(StfsHashEntry, 0x18); - -struct StfsHashTable { - StfsHashEntry entries[170]; - xe::be num_blocks; // num L0 blocks covered by this table? - uint8_t padding[12]; -}; -static_assert_size(StfsHashTable, 0x1000); - -/* SVOD structures */ -struct SvodDeviceDescriptor { - uint8_t descriptor_length; - uint8_t block_cache_element_count; - uint8_t worker_thread_processor; - uint8_t worker_thread_priority; - uint8_t first_fragment_hash_entry[0x14]; - union { - struct { - uint8_t must_be_zero_for_future_usage : 6; - uint8_t enhanced_gdf_layout : 1; - uint8_t zero_for_downlevel_clients : 1; - }; - uint8_t as_byte; - } features; - uint8_t num_data_blocks2; - uint8_t num_data_blocks1; - uint8_t num_data_blocks0; - uint8_t start_data_block0; - uint8_t start_data_block1; - uint8_t start_data_block2; - uint8_t reserved[5]; - - uint32_t num_data_blocks() { - return uint32_t(num_data_blocks0) | (uint32_t(num_data_blocks1) << 8) | - (uint32_t(num_data_blocks2) << 16); - } - - uint32_t start_data_block() { - return uint32_t(start_data_block0) | (uint32_t(start_data_block1) << 8) | - (uint32_t(start_data_block2) << 16); - } -}; -static_assert_size(SvodDeviceDescriptor, 0x24); - -/* XContent structures */ -struct XContentMediaData { - uint8_t series_id[0x10]; - uint8_t season_id[0x10]; - be season_number; - be episode_number; -}; -static_assert_size(XContentMediaData, 0x24); - -struct XContentAvatarAssetData { - be sub_category; - be colorizable; - uint8_t asset_id[0x10]; - uint8_t skeleton_version_mask; - uint8_t reserved[0xB]; -}; -static_assert_size(XContentAvatarAssetData, 0x24); - -struct XContentAttributes { - uint8_t profile_transfer : 1; - uint8_t device_transfer : 1; - uint8_t move_only_transfer : 1; - uint8_t kinect_enabled : 1; - uint8_t disable_network_storage : 1; - uint8_t deep_link_supported : 1; - uint8_t reserved : 2; -}; -static_assert_size(XContentAttributes, 1); - -XEPACKEDSTRUCT(XContentMetadata, { - static const uint32_t kThumbLengthV1 = 0x4000; - static const uint32_t kThumbLengthV2 = 0x3D00; - - static const uint32_t kNumLanguagesV1 = 9; - // metadata_version 2 adds 3 languages inside thumbnail/title_thumbnail space - static const uint32_t kNumLanguagesV2 = 12; - - be content_type; - be metadata_version; - be content_size; - xex2_opt_execution_info execution_info; - uint8_t console_id[5]; - be profile_id; - union { - StfsVolumeDescriptor stfs_volume_descriptor; - SvodDeviceDescriptor svod_volume_descriptor; - }; - be data_file_count; - be data_file_size; - be volume_type; - be online_creator; - be category; - uint8_t reserved2[0x20]; - union { - XContentMediaData media_data; - XContentAvatarAssetData avatar_asset_data; - }; - uint8_t device_id[0x14]; - union { - be display_name_raw[kNumLanguagesV1][128]; - char16_t display_name_chars[kNumLanguagesV1][128]; - }; - union { - be description_raw[kNumLanguagesV1][128]; - char16_t description_chars[kNumLanguagesV1][128]; - }; - union { - be publisher_raw[64]; - char16_t publisher_chars[64]; - }; - union { - be title_name_raw[64]; - char16_t title_name_chars[64]; - }; - union { - XContentAttributes bits; - uint8_t as_byte; - } flags; - be thumbnail_size; - be title_thumbnail_size; - uint8_t thumbnail[kThumbLengthV2]; - union { - be display_name_ex_raw[kNumLanguagesV2 - kNumLanguagesV1][128]; - char16_t display_name_ex_chars[kNumLanguagesV2 - kNumLanguagesV1][128]; - }; - uint8_t title_thumbnail[kThumbLengthV2]; - union { - be description_ex_raw[kNumLanguagesV2 - kNumLanguagesV1][128]; - char16_t description_ex_chars[kNumLanguagesV2 - kNumLanguagesV1][128]; - }; - - std::u16string display_name(XLanguage language) const { - uint32_t lang_id = uint32_t(language) - 1; - - if (lang_id >= kNumLanguagesV2) { - assert_always(); - // no room for this lang, read from english slot.. - lang_id = uint32_t(XLanguage::kEnglish) - 1; - } - - const be* str = 0; - if (lang_id >= 0 && lang_id < kNumLanguagesV1) { - str = display_name_raw[lang_id]; - } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && - metadata_version >= 2) { - str = display_name_ex_raw[lang_id - kNumLanguagesV1]; - } - - if (!str) { - // Invalid language ID? - assert_always(); - return u""; - } - - return load_and_swap(str); - } - - std::u16string description(XLanguage language) const { - uint32_t lang_id = uint32_t(language) - 1; - - if (lang_id >= kNumLanguagesV2) { - assert_always(); - // no room for this lang, read from english slot.. - lang_id = uint32_t(XLanguage::kEnglish) - 1; - } - - const be* str = 0; - if (lang_id >= 0 && lang_id < kNumLanguagesV1) { - str = description_raw[lang_id]; - } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && - metadata_version >= 2) { - str = description_ex_raw[lang_id - kNumLanguagesV1]; - } - - if (!str) { - // Invalid language ID? - assert_always(); - return u""; - } - - return load_and_swap(str); - } - - std::u16string publisher() const { - return load_and_swap(publisher_raw); - } - - std::u16string title_name() const { - return load_and_swap(title_name_raw); - } - - bool set_display_name(XLanguage language, const std::u16string_view value) { - uint32_t lang_id = uint32_t(language) - 1; - - if (lang_id >= kNumLanguagesV2) { - assert_always(); - // no room for this lang, store in english slot.. - lang_id = uint32_t(XLanguage::kEnglish) - 1; - } - - char16_t* str = 0; - if (lang_id >= 0 && lang_id < kNumLanguagesV1) { - str = display_name_chars[lang_id]; - } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && - metadata_version >= 2) { - str = display_name_ex_chars[lang_id - kNumLanguagesV1]; - } - - if (!str) { - // Invalid language ID? - assert_always(); - return false; - } - - string_util::copy_and_swap_truncating(str, value, - countof(display_name_chars[0])); - return true; - } - - bool set_description(XLanguage language, const std::u16string_view value) { - uint32_t lang_id = uint32_t(language) - 1; - - if (lang_id >= kNumLanguagesV2) { - assert_always(); - // no room for this lang, store in english slot.. - lang_id = uint32_t(XLanguage::kEnglish) - 1; - } - - char16_t* str = 0; - if (lang_id >= 0 && lang_id < kNumLanguagesV1) { - str = description_chars[lang_id]; - } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && - metadata_version >= 2) { - str = description_ex_chars[lang_id - kNumLanguagesV1]; - } - - if (!str) { - // Invalid language ID? - assert_always(); - return false; - } - - string_util::copy_and_swap_truncating(str, value, - countof(description_chars[0])); - return true; - } - - bool set_publisher(const std::u16string_view value) { - string_util::copy_and_swap_truncating(publisher_chars, value, - countof(publisher_chars)); - return true; - } - - bool set_title_name(const std::u16string_view value) { - string_util::copy_and_swap_truncating(title_name_chars, value, - countof(title_name_chars)); - return true; - } -}); -static_assert_size(XContentMetadata, 0x93D6); - -struct XContentLicense { - be licensee_id; - be license_bits; - be license_flags; -}; -static_assert_size(XContentLicense, 0x10); - -XEPACKEDSTRUCT(XContentHeader, { - be magic; - uint8_t signature[0x228]; - XContentLicense licenses[0x10]; - uint8_t content_id[0x14]; - be header_size; -}); -static_assert_size(XContentHeader, 0x344); - -struct StfsHeader { - XContentHeader header; - XContentMetadata metadata; - // TODO: title/system updates contain more data after XContentMetadata, seems - // to affect header.header_size -}; -static_assert_size(StfsHeader, 0x971A); - class StfsContainerDevice : public Device { public: + const static uint32_t kBlockSize = 0x1000; + StfsContainerDevice(const std::string_view mount_path, const std::filesystem::path& host_path); ~StfsContainerDevice() override; bool Initialize() override; + + bool is_read_only() const override { + return header_.metadata.volume_type != XContentVolumeType::kStfs || + header_.metadata.volume_descriptor.stfs.flags.bits.read_only_format; + } + void Dump(StringBuffer* string_buffer) override; Entry* ResolvePath(const std::string_view path) override; @@ -438,26 +51,41 @@ class StfsContainerDevice : public Device { uint32_t component_name_max_length() const override { return 40; } uint32_t total_allocation_units() const override { + if (header_.metadata.volume_type == XContentVolumeType::kStfs) { + return header_.metadata.volume_descriptor.stfs.total_block_count; + } + return uint32_t(data_size() / sectors_per_allocation_unit() / bytes_per_sector()); } - uint32_t available_allocation_units() const override { return 0; } + uint32_t available_allocation_units() const override { + if (!is_read_only()) { + auto& descriptor = header_.metadata.volume_descriptor.stfs; + return kBlocksPerHashLevel[2] - + (descriptor.total_block_count - descriptor.free_block_count); + } + return 0; + } uint32_t sectors_per_allocation_unit() const override { return 8; } uint32_t bytes_per_sector() const override { return 0x200; } - // Gives rough estimate of the size of the data in this container - // TODO: use allocated_block_count inside volume-descriptor? size_t data_size() const { if (header_.header.header_size) { - return mmap_total_size_ - - xe::round_up(header_.header.header_size, kSectorSize); + if (header_.metadata.volume_type == XContentVolumeType::kStfs) { + return header_.metadata.volume_descriptor.stfs.total_block_count * + kBlockSize; + } + return files_total_size_ - + xe::round_up(header_.header.header_size, kBlockSize); } - return mmap_total_size_ - sizeof(StfsHeader); + return files_total_size_ - sizeof(StfsHeader); } private: - const uint32_t kSectorSize = 0x1000; const uint32_t kBlocksPerHashLevel[3] = {170, 28900, 4913000}; + const uint32_t kEndOfChain = 0xFFFFFF; + const uint32_t kEntriesPerDirectoryBlock = + kBlockSize / sizeof(StfsDirectoryEntry); enum class Error { kSuccess = 0, @@ -465,6 +93,7 @@ class StfsContainerDevice : public Device { kErrorReadError = -10, kErrorFileMismatch = -30, kErrorDamagedFile = -31, + kErrorTooSmall = -32, }; enum class SvodLayoutType { @@ -474,11 +103,13 @@ class StfsContainerDevice : public Device { kSingleFile = 0x4, }; - uint32_t ReadMagic(const std::filesystem::path& path); + XContentPackageType ReadMagic(const std::filesystem::path& path); bool ResolveFromFolder(const std::filesystem::path& path); - Error MapFiles(); - Error ReadHeaderAndVerify(const uint8_t* map_ptr, size_t map_size); + Error OpenFiles(); + void CloseFiles(); + + Error ReadHeaderAndVerify(FILE* header_file); Error ReadSVOD(); Error ReadEntrySVOD(uint32_t sector, uint32_t ordinal, @@ -492,16 +123,16 @@ class StfsContainerDevice : public Device { size_t BlockToHashBlockOffsetSTFS(uint32_t block_index, uint32_t hash_level) const; - const StfsHashEntry* GetBlockHash(const uint8_t* map_ptr, - uint32_t block_index); + const StfsHashEntry* GetBlockHash(uint32_t block_index); std::string name_; std::filesystem::path host_path_; - std::map> mmap_; - size_t mmap_total_size_; - size_t base_offset_; - size_t magic_offset_; + std::map files_; + size_t files_total_size_; + + size_t svod_base_offset_; + std::unique_ptr root_entry_; StfsHeader header_; SvodLayoutType svod_layout_; diff --git a/src/xenia/vfs/devices/stfs_container_entry.cc b/src/xenia/vfs/devices/stfs_container_entry.cc index c35f8b336..1197460cc 100644 --- a/src/xenia/vfs/devices/stfs_container_entry.cc +++ b/src/xenia/vfs/devices/stfs_container_entry.cc @@ -18,9 +18,9 @@ namespace vfs { StfsContainerEntry::StfsContainerEntry(Device* device, Entry* parent, const std::string_view path, - MultifileMemoryMap* mmap) + MultiFileHandles* files) : Entry(device, parent, path), - mmap_(mmap), + files_(files), data_offset_(0), data_size_(0), block_(0) {} @@ -29,9 +29,10 @@ StfsContainerEntry::~StfsContainerEntry() = default; std::unique_ptr StfsContainerEntry::Create( Device* device, Entry* parent, const std::string_view name, - MultifileMemoryMap* mmap) { + MultiFileHandles* files) { auto path = xe::utf8::join_guest_paths(parent->path(), name); - auto entry = std::make_unique(device, parent, path, mmap); + auto entry = + std::make_unique(device, parent, path, files); return std::move(entry); } diff --git a/src/xenia/vfs/devices/stfs_container_entry.h b/src/xenia/vfs/devices/stfs_container_entry.h index 065d9c880..0990b97ce 100644 --- a/src/xenia/vfs/devices/stfs_container_entry.h +++ b/src/xenia/vfs/devices/stfs_container_entry.h @@ -14,28 +14,27 @@ #include #include -#include "xenia/base/mapped_memory.h" #include "xenia/vfs/entry.h" #include "xenia/vfs/file.h" namespace xe { namespace vfs { -typedef std::map> MultifileMemoryMap; +typedef std::map MultiFileHandles; class StfsContainerDevice; class StfsContainerEntry : public Entry { public: StfsContainerEntry(Device* device, Entry* parent, const std::string_view path, - MultifileMemoryMap* mmap); + MultiFileHandles* files); ~StfsContainerEntry() override; static std::unique_ptr Create(Device* device, Entry* parent, const std::string_view name, - MultifileMemoryMap* mmap); + MultiFileHandles* files); - MultifileMemoryMap* mmap() const { return mmap_; } + MultiFileHandles* files() const { return files_; } size_t data_offset() const { return data_offset_; } size_t data_size() const { return data_size_; } size_t block() const { return block_; } @@ -52,7 +51,7 @@ class StfsContainerEntry : public Entry { private: friend class StfsContainerDevice; - MultifileMemoryMap* mmap_; + MultiFileHandles* files_; size_t data_offset_; size_t data_size_; size_t block_; diff --git a/src/xenia/vfs/devices/stfs_container_file.cc b/src/xenia/vfs/devices/stfs_container_file.cc index dd6c7e2ad..791d79101 100644 --- a/src/xenia/vfs/devices/stfs_container_file.cc +++ b/src/xenia/vfs/devices/stfs_container_file.cc @@ -37,8 +37,8 @@ X_STATUS StfsContainerFile::ReadSync(void* buffer, size_t buffer_length, uint8_t* p = reinterpret_cast(buffer); size_t remaining_length = std::min(buffer_length, entry_->size() - byte_offset); - *out_bytes_read = remaining_length; + *out_bytes_read = 0; for (size_t i = 0; i < entry_->block_list().size(); i++) { auto& record = entry_->block_list()[i]; if (src_offset + record.length <= byte_offset) { @@ -47,15 +47,17 @@ X_STATUS StfsContainerFile::ReadSync(void* buffer, size_t buffer_length, continue; } - uint8_t* src = entry_->mmap()->at(record.file)->data(); - size_t read_offset = (byte_offset > src_offset) ? byte_offset - src_offset : 0; size_t read_length = std::min(record.length - read_offset, remaining_length); - std::memcpy(p, src + record.offset + read_offset, read_length); - p += read_length; + auto& file = entry_->files()->at(record.file); + xe::filesystem::Seek(file, record.offset + read_offset, SEEK_SET); + auto num_read = fread(p, 1, read_length, file); + + *out_bytes_read += num_read; + p += num_read; src_offset += record.length; remaining_length -= read_length; if (remaining_length == 0) { diff --git a/src/xenia/vfs/devices/stfs_xbox.h b/src/xenia/vfs/devices/stfs_xbox.h new file mode 100644 index 000000000..ce755ea9c --- /dev/null +++ b/src/xenia/vfs/devices/stfs_xbox.h @@ -0,0 +1,469 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_VFS_DEVICES_STFS_XBOX_H_ +#define XENIA_VFS_DEVICES_STFS_XBOX_H_ + +#include "xenia/base/string_util.h" +#include "xenia/kernel/util/xex2_info.h" + +namespace xe { +namespace vfs { + +// Structs used for interchange between Xenia and actual Xbox360 kernel/XAM + +inline uint32_t load_uint24_be(const uint8_t* p) { + return (uint32_t(p[0]) << 16) | (uint32_t(p[1]) << 8) | uint32_t(p[2]); +} +inline uint32_t load_uint24_le(const uint8_t* p) { + return (uint32_t(p[2]) << 16) | (uint32_t(p[1]) << 8) | uint32_t(p[0]); +} +inline void store_uint24_le(uint8_t* p, uint32_t value) { + p[2] = uint8_t((value >> 16) & 0xFF); + p[1] = uint8_t((value >> 8) & 0xFF); + p[0] = uint8_t(value & 0xFF); +} + +enum class XContentPackageType : uint32_t { + kCon = 0x434F4E20, + kPirs = 0x50495253, + kLive = 0x4C495645, +}; + +enum class XContentVolumeType : uint32_t { + kStfs = 0, + kSvod = 1, +}; + +/* STFS structures */ +#pragma pack(push, 1) +struct StfsVolumeDescriptor { + uint8_t descriptor_length; + uint8_t version; + union { + struct { + uint8_t read_only_format : 1; // if set, only uses a single backing-block + // per hash table (no resiliency), + // otherwise uses two + uint8_t root_active_index : 1; // if set, uses secondary backing-block + // for the highest-level hash table + + uint8_t directory_overallocated : 1; + uint8_t directory_index_bounds_valid : 1; + } bits; + uint8_t as_byte; + } flags; + uint16_t file_table_block_count; + uint8_t file_table_block_number_raw[3]; + uint8_t top_hash_table_hash[0x14]; + be total_block_count; + be free_block_count; + + uint32_t file_table_block_number() const { + return load_uint24_le(file_table_block_number_raw); + } + + void set_file_table_block_number(uint32_t value) { + store_uint24_le(file_table_block_number_raw, value); + } + + bool is_valid() const { + return descriptor_length == sizeof(StfsVolumeDescriptor); + } +}; +static_assert_size(StfsVolumeDescriptor, 0x24); +#pragma pack(pop) + +enum class StfsHashState : uint8_t { + kFree = 0, // unallocated but doesn't exist in package (needs to expand)? + kFree2 = 1, // unallocated but exists in package? + kInUse = 2, +}; + +struct StfsHashEntry { + uint8_t sha1[0x14]; + + xe::be info_raw; + + uint32_t level0_next_block() const { return info_raw & 0xFFFFFF; } + void set_level0_next_block(uint32_t value) { + info_raw = (info_raw & ~0xFFFFFF) | (value & 0xFFFFFF); + } + + StfsHashState level0_allocation_state() const { + return StfsHashState(uint8_t(((info_raw & 0xC0000000) >> 30) & 0xFF)); + } + void set_level0_allocation_state(StfsHashState value) { + info_raw = (info_raw & ~0xC0000000) | (uint32_t(value) << 30); + } + + uint32_t levelN_num_blocks_free() const { return info_raw & 0x7FFF; } + void set_levelN_num_blocks_free(uint32_t value) { + info_raw = (info_raw & ~0x7FFF) | (value & 0x7FFF); + } + + uint32_t levelN_num_blocks_unk() const { + return ((info_raw & 0x3FFF8000) >> 15) & 0x7FFF; + } + void set_levelN_num_blocks_unk(uint32_t value) { + info_raw = (info_raw & ~0x3FFF8000) | ((value & 0x7FFF) << 15); + } + + bool levelN_active_index() const { return (info_raw & 0x40000000) != 0; } + void set_levelN_active_index(bool value) { + info_raw = (info_raw & ~0x40000000) | (value ? 0x40000000 : 0); + } + + bool levelN_writeable() const { return (info_raw & 0x80000000) != 0; } + void set_levelN_writeable(bool value) { + info_raw = (info_raw & ~0x80000000) | (value ? 0x80000000 : 0); + } +}; +static_assert_size(StfsHashEntry, 0x18); + +struct StfsHashTable { + StfsHashEntry entries[170]; + xe::be num_blocks; // num L0 blocks covered by this table? + uint8_t padding[12]; +}; +static_assert_size(StfsHashTable, 0x1000); + +struct StfsDirectoryEntry { + char name[40]; + + struct { + uint8_t name_length : 6; + uint8_t contiguous : 1; + uint8_t directory : 1; + } flags; + + uint8_t valid_data_blocks_raw[3]; + uint8_t allocated_data_blocks_raw[3]; + uint8_t start_block_number_raw[3]; + + be directory_index; + + be length; + + be create_date; + be create_time; + be modified_date; + be modified_time; + + uint32_t valid_data_blocks() const { + return load_uint24_le(valid_data_blocks_raw); + } + + void set_valid_data_blocks(uint32_t value) { + store_uint24_le(valid_data_blocks_raw, value); + } + + uint32_t allocated_data_blocks() const { + return load_uint24_le(allocated_data_blocks_raw); + } + + void set_allocated_data_blocks(uint32_t value) { + store_uint24_le(allocated_data_blocks_raw, value); + } + + uint32_t start_block_number() const { + return load_uint24_le(start_block_number_raw); + } + + void set_start_block_number(uint32_t value) { + store_uint24_le(start_block_number_raw, value); + } +}; +static_assert_size(StfsDirectoryEntry, 0x40); + +struct StfsDirectoryBlock { + StfsDirectoryEntry entries[0x40]; +}; +static_assert_size(StfsDirectoryBlock, 0x1000); + +/* SVOD structures */ +struct SvodDeviceDescriptor { + uint8_t descriptor_length; + uint8_t block_cache_element_count; + uint8_t worker_thread_processor; + uint8_t worker_thread_priority; + uint8_t first_fragment_hash_entry[0x14]; + union { + struct { + uint8_t must_be_zero_for_future_usage : 6; + uint8_t enhanced_gdf_layout : 1; + uint8_t zero_for_downlevel_clients : 1; + } bits; + uint8_t as_byte; + } features; + uint8_t num_data_blocks_raw[3]; + uint8_t start_data_block_raw[3]; + uint8_t reserved[5]; + + uint32_t num_data_blocks() { return load_uint24_le(num_data_blocks_raw); } + + uint32_t start_data_block() { return load_uint24_le(start_data_block_raw); } +}; +static_assert_size(SvodDeviceDescriptor, 0x24); + +/* XContent structures */ +struct XContentLicense { + be licensee_id; + be license_bits; + be license_flags; +}; +static_assert_size(XContentLicense, 0x10); + +struct XContentMediaData { + uint8_t series_id[0x10]; + uint8_t season_id[0x10]; + be season_number; + be episode_number; +}; +static_assert_size(XContentMediaData, 0x24); + +struct XContentAvatarAssetData { + be sub_category; + be colorizable; + uint8_t asset_id[0x10]; + uint8_t skeleton_version_mask; + uint8_t reserved[0xB]; +}; +static_assert_size(XContentAvatarAssetData, 0x24); + +struct XContentAttributes { + uint8_t profile_transfer : 1; + uint8_t device_transfer : 1; + uint8_t move_only_transfer : 1; + uint8_t kinect_enabled : 1; + uint8_t disable_network_storage : 1; + uint8_t deep_link_supported : 1; + uint8_t reserved : 2; +}; +static_assert_size(XContentAttributes, 1); + +#pragma pack(push, 1) +struct XContentMetadata { + static const uint32_t kThumbLengthV1 = 0x4000; + static const uint32_t kThumbLengthV2 = 0x3D00; + + static const uint32_t kNumLanguagesV1 = 9; + // metadata_version 2 adds 3 languages inside thumbnail/title_thumbnail space + static const uint32_t kNumLanguagesV2 = 12; + + be content_type; + be metadata_version; + be content_size; + xex2_opt_execution_info execution_info; + uint8_t console_id[5]; + be profile_id; + union { + StfsVolumeDescriptor stfs; + SvodDeviceDescriptor svod; + } volume_descriptor; + be data_file_count; + be data_file_size; + be volume_type; + be online_creator; + be category; + uint8_t reserved2[0x20]; + union { + XContentMediaData media_data; + XContentAvatarAssetData avatar_asset_data; + } metadata_v2; + uint8_t device_id[0x14]; + union { + be uint[kNumLanguagesV1][128]; + char16_t chars[kNumLanguagesV1][128]; + } display_name_raw; + union { + be uint[kNumLanguagesV1][128]; + char16_t chars[kNumLanguagesV1][128]; + } description_raw; + union { + be uint[64]; + char16_t chars[64]; + } publisher_raw; + union { + be uint[64]; + char16_t chars[64]; + } title_name_raw; + union { + XContentAttributes bits; + uint8_t as_byte; + } flags; + be thumbnail_size; + be title_thumbnail_size; + uint8_t thumbnail[kThumbLengthV2]; + union { + be uint[kNumLanguagesV2 - kNumLanguagesV1][128]; + char16_t chars[kNumLanguagesV2 - kNumLanguagesV1][128]; + } display_name_ex_raw; + uint8_t title_thumbnail[kThumbLengthV2]; + union { + be uint[kNumLanguagesV2 - kNumLanguagesV1][128]; + char16_t chars[kNumLanguagesV2 - kNumLanguagesV1][128]; + } description_ex_raw; + + std::u16string display_name(XLanguage language) const { + uint32_t lang_id = uint32_t(language) - 1; + + if (lang_id >= kNumLanguagesV2) { + assert_always(); + // no room for this lang, read from english slot.. + lang_id = uint32_t(XLanguage::kEnglish) - 1; + } + + const be* str = 0; + if (lang_id >= 0 && lang_id < kNumLanguagesV1) { + str = display_name_raw.uint[lang_id]; + } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && + metadata_version >= 2) { + str = display_name_ex_raw.uint[lang_id - kNumLanguagesV1]; + } + + if (!str) { + // Invalid language ID? + assert_always(); + return u""; + } + + return load_and_swap(str); + } + + std::u16string description(XLanguage language) const { + uint32_t lang_id = uint32_t(language) - 1; + + if (lang_id >= kNumLanguagesV2) { + assert_always(); + // no room for this lang, read from english slot.. + lang_id = uint32_t(XLanguage::kEnglish) - 1; + } + + const be* str = 0; + if (lang_id >= 0 && lang_id < kNumLanguagesV1) { + str = description_raw.uint[lang_id]; + } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && + metadata_version >= 2) { + str = description_ex_raw.uint[lang_id - kNumLanguagesV1]; + } + + if (!str) { + // Invalid language ID? + assert_always(); + return u""; + } + + return load_and_swap(str); + } + + std::u16string publisher() const { + return load_and_swap(publisher_raw.uint); + } + + std::u16string title_name() const { + return load_and_swap(title_name_raw.uint); + } + + bool set_display_name(XLanguage language, const std::u16string_view value) { + uint32_t lang_id = uint32_t(language) - 1; + + if (lang_id >= kNumLanguagesV2) { + assert_always(); + // no room for this lang, store in english slot.. + lang_id = uint32_t(XLanguage::kEnglish) - 1; + } + + char16_t* str = 0; + if (lang_id >= 0 && lang_id < kNumLanguagesV1) { + str = display_name_raw.chars[lang_id]; + } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && + metadata_version >= 2) { + str = display_name_ex_raw.chars[lang_id - kNumLanguagesV1]; + } + + if (!str) { + // Invalid language ID? + assert_always(); + return false; + } + + string_util::copy_and_swap_truncating(str, value, + countof(display_name_raw.chars[0])); + return true; + } + + bool set_description(XLanguage language, const std::u16string_view value) { + uint32_t lang_id = uint32_t(language) - 1; + + if (lang_id >= kNumLanguagesV2) { + assert_always(); + // no room for this lang, store in english slot.. + lang_id = uint32_t(XLanguage::kEnglish) - 1; + } + + char16_t* str = 0; + if (lang_id >= 0 && lang_id < kNumLanguagesV1) { + str = description_raw.chars[lang_id]; + } else if (lang_id >= kNumLanguagesV1 && lang_id < kNumLanguagesV2 && + metadata_version >= 2) { + str = description_ex_raw.chars[lang_id - kNumLanguagesV1]; + } + + if (!str) { + // Invalid language ID? + assert_always(); + return false; + } + + string_util::copy_and_swap_truncating(str, value, + countof(description_raw.chars[0])); + return true; + } + + void set_publisher(const std::u16string_view value) { + string_util::copy_and_swap_truncating(publisher_raw.chars, value, + countof(publisher_raw.chars)); + } + + void set_title_name(const std::u16string_view value) { + string_util::copy_and_swap_truncating(title_name_raw.chars, value, + countof(title_name_raw.chars)); + } +}; +static_assert_size(XContentMetadata, 0x93D6); + +struct XContentHeader { + be magic; + uint8_t signature[0x228]; + XContentLicense licenses[0x10]; + uint8_t content_id[0x14]; + be header_size; + + bool is_magic_valid() const { + return magic == XContentPackageType::kCon || + magic == XContentPackageType::kLive || + magic == XContentPackageType::kPirs; + } +}; +static_assert_size(XContentHeader, 0x344); +#pragma pack(pop) + +struct StfsHeader { + XContentHeader header; + XContentMetadata metadata; + // TODO: title/system updates contain more data after XContentMetadata, seems + // to affect header.header_size +}; +static_assert_size(StfsHeader, 0x971A); + +} // namespace vfs +} // namespace xe + +#endif // XENIA_VFS_DEVICES_STFS_XBOX_H_ diff --git a/src/xenia/vfs/virtual_file_system.cc b/src/xenia/vfs/virtual_file_system.cc index c0f888318..01f4761e6 100644 --- a/src/xenia/vfs/virtual_file_system.cc +++ b/src/xenia/vfs/virtual_file_system.cc @@ -117,7 +117,11 @@ Entry* VirtualFileSystem::ResolvePath(const std::string_view path) { return xe::utf8::starts_with(normalized_path, d->mount_path()); }); if (it == devices_.cend()) { - XELOGE("ResolvePath({}) failed - device not found", path); + // Supress logging the error for ShaderDumpxe:\CompareBackEnds as this is + // not an actual problem nor something we care about. + if (path != "ShaderDumpxe:\\CompareBackEnds") { + XELOGE("ResolvePath({}) failed - device not found", path); + } return nullptr; } diff --git a/src/xenia/xbox.h b/src/xenia/xbox.h index bdf6e3f38..d27d37661 100644 --- a/src/xenia/xbox.h +++ b/src/xenia/xbox.h @@ -344,6 +344,43 @@ enum class XLanguage : uint32_t { kMaxLanguages = 13 }; +enum class XContentType : uint32_t { + kSavedGame = 0x00000001, + kMarketplaceContent = 0x00000002, + kPublisher = 0x00000003, + kXbox360Title = 0x00001000, + kIptvPauseBuffer = 0x00002000, + kXNACommunity = 0x00003000, + kInstalledGame = 0x00004000, + kXboxTitle = 0x00005000, + kSocialTitle = 0x00006000, + kGamesOnDemand = 0x00007000, + kSUStoragePack = 0x00008000, + kAvatarItem = 0x00009000, + kProfile = 0x00010000, + kGamerPicture = 0x00020000, + kTheme = 0x00030000, + kCacheFile = 0x00040000, + kStorageDownload = 0x00050000, + kXboxSavedGame = 0x00060000, + kXboxDownload = 0x00070000, + kGameDemo = 0x00080000, + kVideo = 0x00090000, + kGameTitle = 0x000A0000, + kInstaller = 0x000B0000, + kGameTrailer = 0x000C0000, + kArcadeTitle = 0x000D0000, + kXNA = 0x000E0000, + kLicenseStore = 0x000F0000, + kMovie = 0x00100000, + kTV = 0x00200000, + kMusicVideo = 0x00300000, + kGameVideo = 0x00400000, + kPodcastVideo = 0x00500000, + kViralVideo = 0x00600000, + kCommunityGame = 0x02000000, +}; + } // namespace xe // clang-format on diff --git a/third_party/SDL2 b/third_party/SDL2 index 804f883c4..ea9bece5e 160000 --- a/third_party/SDL2 +++ b/third_party/SDL2 @@ -1 +1 @@ -Subproject commit 804f883c4048d1c0a549660c1c82590f0aee422d +Subproject commit ea9bece5ed4e76b6636d941101923487a6378ca6 diff --git a/third_party/SDL2-static.lua b/third_party/SDL2-static.lua index cd78626fb..492c0d3d9 100644 --- a/third_party/SDL2-static.lua +++ b/third_party/SDL2-static.lua @@ -50,6 +50,7 @@ project("SDL2") "SDL2/include/SDL_log.h", "SDL2/include/SDL_main.h", "SDL2/include/SDL_messagebox.h", + "SDL2/include/SDL_metal.h", "SDL2/include/SDL_misc.h", "SDL2/include/SDL_mouse.h", "SDL2/include/SDL_mutex.h", @@ -88,6 +89,7 @@ project("SDL2") "SDL2/include/SDL_test_images.h", "SDL2/include/SDL_test_log.h", "SDL2/include/SDL_test_md5.h", + "SDL2/include/SDL_test_memory.h", "SDL2/include/SDL_test_random.h", "SDL2/include/SDL_thread.h", "SDL2/include/SDL_timer.h", @@ -114,6 +116,7 @@ project("SDL2") "SDL2/src/dynapi/SDL_dynapi_procs.h", "SDL2/src/events/blank_cursor.h", "SDL2/src/events/default_cursor.h", + "SDL2/src/events/scancodes_windows.h", "SDL2/src/events/SDL_clipboardevents_c.h", "SDL2/src/events/SDL_displayevents_c.h", "SDL2/src/events/SDL_dropevents_c.h", @@ -124,16 +127,20 @@ project("SDL2") "SDL2/src/events/SDL_sysevents.h", "SDL2/src/events/SDL_touch_c.h", "SDL2/src/events/SDL_windowevents_c.h", + "SDL2/src/haptic/SDL_haptic_c.h", "SDL2/src/haptic/SDL_syshaptic.h", "SDL2/src/haptic/windows/SDL_dinputhaptic_c.h", "SDL2/src/haptic/windows/SDL_windowshaptic_c.h", "SDL2/src/haptic/windows/SDL_xinputhaptic_c.h", "SDL2/src/hidapi/hidapi/hidapi.h", + "SDL2/src/hidapi/SDL_hidapi.h", "SDL2/src/joystick/controller_type.h", "SDL2/src/joystick/hidapi/SDL_hidapijoystick_c.h", + "SDL2/src/joystick/hidapi/SDL_hidapi_rumble.h", "SDL2/src/joystick/SDL_gamecontrollerdb.h", "SDL2/src/joystick/SDL_joystick_c.h", "SDL2/src/joystick/SDL_sysjoystick.h", + "SDL2/src/joystick/usb_ids.h", "SDL2/src/joystick/virtual/SDL_virtualjoystick_c.h", "SDL2/src/joystick/windows/SDL_dinputjoystick_c.h", "SDL2/src/joystick/windows/SDL_rawinputjoystick_c.h", @@ -142,11 +149,14 @@ project("SDL2") "SDL2/src/libm/math_libm.h", "SDL2/src/libm/math_private.h", "SDL2/src/locale/SDL_syslocale.h", + "SDL2/src/misc/SDL_sysurl.h", + "SDL2/src/power/SDL_syspower.h", "SDL2/src/render/direct3d11/SDL_shaders_d3d11.h", "SDL2/src/render/direct3d/SDL_shaders_d3d.h", + "SDL2/src/render/opengles2/SDL_gles2funcs.h", + "SDL2/src/render/opengles2/SDL_shaders_gles2.h", "SDL2/src/render/opengl/SDL_glfuncs.h", "SDL2/src/render/opengl/SDL_shaders_gl.h", - "SDL2/src/render/opengles/SDL_glesfuncs.h", "SDL2/src/render/SDL_d3dmath.h", "SDL2/src/render/SDL_sysrender.h", "SDL2/src/render/SDL_yuv_sw_c.h", @@ -158,8 +168,11 @@ project("SDL2") "SDL2/src/render/software/SDL_drawpoint.h", "SDL2/src/render/software/SDL_render_sw_c.h", "SDL2/src/render/software/SDL_rotate.h", + "SDL2/src/SDL_assert_c.h", "SDL2/src/SDL_dataqueue.h", "SDL2/src/SDL_error_c.h", + "SDL2/src/SDL_hints_c.h", + "SDL2/src/SDL_internal.h", "SDL2/src/sensor/dummy/SDL_dummysensor.h", "SDL2/src/sensor/SDL_sensor_c.h", "SDL2/src/sensor/SDL_syssensor.h", @@ -173,10 +186,32 @@ project("SDL2") "SDL2/src/video/dummy/SDL_nullevents_c.h", "SDL2/src/video/dummy/SDL_nullframebuffer_c.h", "SDL2/src/video/dummy/SDL_nullvideo.h", + "SDL2/src/video/khronos/vulkan/vk_icd.h", + "SDL2/src/video/khronos/vulkan/vk_layer.h", + "SDL2/src/video/khronos/vulkan/vk_platform.h", + "SDL2/src/video/khronos/vulkan/vk_sdk_platform.h", + "SDL2/src/video/khronos/vulkan/vulkan.h", + "SDL2/src/video/khronos/vulkan/vulkan.hpp", + "SDL2/src/video/khronos/vulkan/vulkan_android.h", + "SDL2/src/video/khronos/vulkan/vulkan_beta.h", + "SDL2/src/video/khronos/vulkan/vulkan_core.h", + "SDL2/src/video/khronos/vulkan/vulkan_directfb.h", + "SDL2/src/video/khronos/vulkan/vulkan_fuchsia.h", + "SDL2/src/video/khronos/vulkan/vulkan_ggp.h", + "SDL2/src/video/khronos/vulkan/vulkan_ios.h", + "SDL2/src/video/khronos/vulkan/vulkan_macos.h", + "SDL2/src/video/khronos/vulkan/vulkan_metal.h", + "SDL2/src/video/khronos/vulkan/vulkan_vi.h", + "SDL2/src/video/khronos/vulkan/vulkan_wayland.h", + "SDL2/src/video/khronos/vulkan/vulkan_win32.h", + "SDL2/src/video/khronos/vulkan/vulkan_xcb.h", + "SDL2/src/video/khronos/vulkan/vulkan_xlib.h", + "SDL2/src/video/khronos/vulkan/vulkan_xlib_xrandr.h", "SDL2/src/video/SDL_blit.h", "SDL2/src/video/SDL_blit_auto.h", "SDL2/src/video/SDL_blit_copy.h", "SDL2/src/video/SDL_blit_slow.h", + "SDL2/src/video/SDL_egl_c.h", "SDL2/src/video/SDL_pixels_c.h", "SDL2/src/video/SDL_rect_c.h", "SDL2/src/video/SDL_RLEaccel_c.h", @@ -184,6 +219,7 @@ project("SDL2") "SDL2/src/video/SDL_sysvideo.h", "SDL2/src/video/SDL_vulkan_internal.h", "SDL2/src/video/SDL_yuv_c.h", + "SDL2/src/video/windows/SDL_msctf.h", "SDL2/src/video/windows/SDL_vkeys.h", "SDL2/src/video/windows/SDL_windowsclipboard.h", "SDL2/src/video/windows/SDL_windowsevents.h", @@ -193,12 +229,16 @@ project("SDL2") "SDL2/src/video/windows/SDL_windowsmodes.h", "SDL2/src/video/windows/SDL_windowsmouse.h", "SDL2/src/video/windows/SDL_windowsopengl.h", + "SDL2/src/video/windows/SDL_windowsopengles.h", "SDL2/src/video/windows/SDL_windowsshape.h", + "SDL2/src/video/windows/SDL_windowstaskdialog.h", "SDL2/src/video/windows/SDL_windowsvideo.h", "SDL2/src/video/windows/SDL_windowsvulkan.h", "SDL2/src/video/windows/SDL_windowswindow.h", "SDL2/src/video/windows/wmmsg.h", "SDL2/src/video/yuv2rgb/yuv_rgb.h", + "SDL2/src/video/yuv2rgb/yuv_rgb_sse_func.h", + "SDL2/src/video/yuv2rgb/yuv_rgb_std_func.h", "SDL2/src/atomic/SDL_atomic.c", "SDL2/src/atomic/SDL_spinlock.c", @@ -240,9 +280,11 @@ project("SDL2") "SDL2/src/joystick/dummy/SDL_sysjoystick.c", "SDL2/src/joystick/hidapi/SDL_hidapijoystick.c", "SDL2/src/joystick/hidapi/SDL_hidapi_gamecube.c", + "SDL2/src/joystick/hidapi/SDL_hidapi_luna.c", "SDL2/src/joystick/hidapi/SDL_hidapi_ps4.c", "SDL2/src/joystick/hidapi/SDL_hidapi_ps5.c", "SDL2/src/joystick/hidapi/SDL_hidapi_rumble.c", + "SDL2/src/joystick/hidapi/SDL_hidapi_stadia.c", "SDL2/src/joystick/hidapi/SDL_hidapi_switch.c", "SDL2/src/joystick/hidapi/SDL_hidapi_xbox360.c", "SDL2/src/joystick/hidapi/SDL_hidapi_xbox360w.c", @@ -320,7 +362,7 @@ project("SDL2") "SDL2/src/stdlib/SDL_strtokr.c", "SDL2/src/thread/generic/SDL_syscond.c", "SDL2/src/thread/SDL_thread.c", - "SDL2/src/thread/windows/SDL_syscond.c", + "SDL2/src/thread/windows/SDL_syscond_srw.c", "SDL2/src/thread/windows/SDL_sysmutex.c", "SDL2/src/thread/windows/SDL_syssem.c", "SDL2/src/thread/windows/SDL_systhread.c", diff --git a/third_party/catch b/third_party/catch index 6860c8def..5c88067bd 160000 --- a/third_party/catch +++ b/third_party/catch @@ -1 +1 @@ -Subproject commit 6860c8def0ba7559bf077515b7a7ff63ad3444f8 +Subproject commit 5c88067bd339465513af4aec606bd2292f1b594a diff --git a/third_party/premake-cmake b/third_party/premake-cmake index 26fbbb996..c4fec3e91 160000 --- a/third_party/premake-cmake +++ b/third_party/premake-cmake @@ -1 +1 @@ -Subproject commit 26fbbb9962aefcb1c24aff1e7952033ce1361190 +Subproject commit c4fec3e91a1dd9278a329ff7f8a40bba96fb8787 diff --git a/third_party/volk b/third_party/volk deleted file mode 160000 index 30a851b67..000000000 --- a/third_party/volk +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 30a851b67e129a3d91f191b2e9dcdad65ba98438 diff --git a/third_party/volk.lua b/third_party/volk.lua deleted file mode 100644 index 7ba0dd618..000000000 --- a/third_party/volk.lua +++ /dev/null @@ -1,30 +0,0 @@ -group("third_party") -project("volk") - uuid("C9781C93-2DF5-47A2-94EE-2C5EBED61239") - kind("StaticLib") - language("C") - - defines({ - "_LIB", - "API_NAME=\"vulkan\"", - }) - removedefines({ - "_UNICODE", - "UNICODE", - }) - includedirs({ - "volk", - }) - files({ - "volk/volk.c", - "volk/volk.h", - }) - - filter("platforms:Windows") - defines({ - "VK_USE_PLATFORM_WIN32_KHR", - }) - filter("platforms:Linux") - defines({ - "VK_USE_PLATFORM_XCB_KHR", - }) diff --git a/tools/build/premake5.lua b/tools/build/premake5.lua index 6a66f5a2b..2c7f8df6a 100644 --- a/tools/build/premake5.lua +++ b/tools/build/premake5.lua @@ -3,5 +3,6 @@ require("vstudio") include("scripts/build_paths.lua") include("scripts/force_compile_as_c.lua") include("scripts/force_compile_as_cc.lua") +include("scripts/pkg_config.lua") include("scripts/platform_files.lua") include("scripts/test_suite.lua") diff --git a/tools/build/scripts/pkg_config.lua b/tools/build/scripts/pkg_config.lua new file mode 100644 index 000000000..2042491b9 --- /dev/null +++ b/tools/build/scripts/pkg_config.lua @@ -0,0 +1,36 @@ +-- Helper methods to use the system pkg-config utility + +pkg_config = {} + +function pkg_config.cflags(lib) + if not os.istarget("linux") then + return + end + buildoptions({ + ({os.outputof("pkg-config --cflags "..lib)})[1], + }) +end + +function pkg_config.lflags(lib) + if not os.istarget("linux") then + return + end + linkoptions({ + ({os.outputof("pkg-config --libs-only-L " ..lib)})[1], + ({os.outputof("pkg-config --libs-only-other "..lib)})[1], + }) + -- We can't just drop the stdout of the `--libs` command in + -- linkoptions because library order matters + local output = ({os.outputof("pkg-config --libs-only-l "..lib)})[1] + for k, flag in next, string.explode(output, " ") do + -- remove "-l" + if flag ~= "" then + links(string.sub(flag, 3)) + end + end +end + +function pkg_config.all(lib) + pkg_config.cflags(lib) + pkg_config.lflags(lib) +end diff --git a/tools/build/scripts/test_suite.lua b/tools/build/scripts/test_suite.lua index afb8a9b31..563624c09 100644 --- a/tools/build/scripts/test_suite.lua +++ b/tools/build/scripts/test_suite.lua @@ -34,6 +34,11 @@ local function combined_test_suite(test_suite_name, project_root, base_path, con project_root.."/src/xenia/base/main_"..platform_suffix..".cc", base_path.."/**_test.cc", }) + filter("toolset:msc") + -- Edit and Continue in MSVC can cause the __LINE__ macro to produce + -- invalid values, which breaks the usability of Catch2 output on + -- failed tests. + editAndContinue("Off") end local function split_test_suite(test_suite_name, project_root, base_path, config) @@ -58,6 +63,11 @@ local function split_test_suite(test_suite_name, project_root, base_path, config project_root.."/"..build_tools_src.."/test_suite_main.cc", file_path, }) + filter("toolset:msc") + -- Edit and Continue in MSVC can cause the __LINE__ macro to produce + -- invalid values, which breaks the usability of Catch2 output on + -- failed tests. + editAndContinue("Off") end end diff --git a/tools/build/src/test_suite_main.cc b/tools/build/src/test_suite_main.cc index d84c7047c..1ea73ac36 100644 --- a/tools/build/src/test_suite_main.cc +++ b/tools/build/src/test_suite_main.cc @@ -2,7 +2,7 @@ ****************************************************************************** * Xenia : Xbox 360 Emulator Research Project * ****************************************************************************** - * Copyright 2019 Ben Vanik. All rights reserved. * + * Copyright 2021 Ben Vanik. All rights reserved. * * Released under the BSD license - see LICENSE in the root for more details. * ****************************************************************************** */ @@ -17,7 +17,7 @@ #include "xenia/base/main.h" #define CATCH_CONFIG_RUNNER -#include "third_party/catch/include/catch.hpp" +#include "third_party/catch/single_include/catch2/catch.hpp" namespace xe { namespace test_suite { @@ -43,4 +43,5 @@ int test_suite_main(const std::vector& args) { #error XE_TEST_SUITE_NAME is undefined! #endif -DEFINE_ENTRY_POINT(XE_TEST_SUITE_NAME, xe::test_suite::test_suite_main, ""); +DEFINE_ENTRY_POINT_TRANSPARENT(XE_TEST_SUITE_NAME, + xe::test_suite::test_suite_main); diff --git a/xenia-build b/xenia-build index 7851552b0..7586582ab 100755 --- a/xenia-build +++ b/xenia-build @@ -262,13 +262,31 @@ def generate_version_h(): """Generates a build/version.h file that contains current git info. """ header_file = 'build/version.h' - if git_is_repository(): + pr_number = 0 + pr_repo_name = "" + pr_branch_name = "" + pr_commit = "" + pr_commit_short = "" + if os.getenv('APPVEYOR') == 'True': + branch_name = os.getenv('APPVEYOR_REPO_BRANCH') + commit = os.getenv('APPVEYOR_REPO_COMMIT') + commit_short = commit[:9] + pr_number = os.getenv('APPVEYOR_PULL_REQUEST_NUMBER') + if not pr_number: + pr_number = 0 + else: + pr_repo_name = os.getenv('APPVEYOR_PULL_REQUEST_HEAD_REPO_NAME') + pr_branch_name = os.getenv('APPVEYOR_PULL_REQUEST_HEAD_REPO_BRANCH') + pr_commit = os.getenv('APPVEYOR_PULL_REQUEST_HEAD_COMMIT') + pr_commit_short = pr_commit[:9] + elif git_is_repository(): (branch_name, commit, commit_short) = git_get_head_info() else: branch_name = 'tarball' commit = ':(-dont-do-this' commit_short = ':(' + # header contents_new = '''// Autogenerated by `xb premake`. #ifndef GENERATED_VERSION_H_ #define GENERATED_VERSION_H_ @@ -276,9 +294,22 @@ def generate_version_h(): #define XE_BUILD_COMMIT "{}" #define XE_BUILD_COMMIT_SHORT "{}" #define XE_BUILD_DATE __DATE__ -#endif // GENERATED_VERSION_H_ '''.format(branch_name, commit, commit_short) + # PR info (if available) + if pr_number != 0: + contents_new += '''#define XE_BUILD_IS_PR +#define XE_BUILD_PR_NUMBER "{}" +#define XE_BUILD_PR_REPO "{}" +#define XE_BUILD_PR_BRANCH "{}" +#define XE_BUILD_PR_COMMIT "{}" +#define XE_BUILD_PR_COMMIT_SHORT "{}" +'''.format(pr_number, pr_repo_name, pr_branch_name, pr_commit, pr_commit_short) + + # footer + contents_new += '''#endif // GENERATED_VERSION_H_ +''' + contents_old = None if os.path.exists(header_file) and os.path.getsize(header_file) < 1024: with open(header_file, 'r') as f: @@ -562,6 +593,7 @@ def discover_commands(subparsers): 'pull': PullCommand(subparsers), 'premake': PremakeCommand(subparsers), 'build': BuildCommand(subparsers), + 'buildshaders': BuildShadersCommand(subparsers), 'devenv': DevenvCommand(subparsers), 'genspirv': GenSpirvCommand(subparsers), 'gentests': GenTestsCommand(subparsers), @@ -575,8 +607,6 @@ def discover_commands(subparsers): 'tidy': TidyCommand(subparsers), 'stub': StubCommand(subparsers), } - if sys.platform == 'win32': - commands['buildhlsl'] = BuildHlslCommand(subparsers) return commands @@ -829,6 +859,84 @@ class BuildCommand(BaseBuildCommand): return result +class BuildShadersCommand(Command): + """'buildshaders' command.""" + + def __init__(self, subparsers, *args, **kwargs): + super(BuildShadersCommand, self).__init__( + subparsers, + name='buildshaders', + help_short='Generates shader binaries for inclusion in C++ files.', + help_long=''' + Generates the shader binaries under src/*/shaders/bytecode/. + Run after modifying any .hs/vs/ds/gs/ps/cs.hlsl files. + Direct3D shaders can be built only on a Windows host. + ''', + *args, **kwargs) + self.parser.add_argument( + '--target', action='append', choices=['dxbc'], default=[], + help='Builds only the given target(s).') + + def execute(self, args, pass_args, cwd): + src_paths = [os.path.join(root, name) + for root, dirs, files in os.walk('src') + for name in files + if (name.endswith('.hs.hlsl') or + name.endswith('.vs.hlsl') or + name.endswith('.ds.hlsl') or + name.endswith('.gs.hlsl') or + name.endswith('.ps.hlsl') or + name.endswith('.cs.hlsl'))] + targets = args['target'] + all_targets = len(targets) == 0 + + # Direct3D DXBC. + if all_targets or 'dxbc' in targets: + if sys.platform == 'win32': + print('Building Direct3D 12 Shader Model 5.1 DXBC shaders...') + windows_sdk_bin_path = os.path.join( + os.environ['ProgramFiles(x86)'], 'Windows Kits/10/bin/x64') + fxc = os.path.join(windows_sdk_bin_path, 'fxc') + # Ensure we have the tools. + if not os.path.exists(windows_sdk_bin_path): + print('ERROR: could not find Windows 10 SDK binaries') + return 1 + elif not has_bin(fxc): + print('ERROR: could not find fxc') + return 1 + # Build DXBC. + for src_path in src_paths: + print('- %s > d3d12_5_1' % (src_path)) + dxbc_identifier = \ + os.path.basename(src_path)[:-5].replace('.', '_') + dxbc_dir_path = os.path.join(os.path.dirname(src_path), + 'bytecode/d3d12_5_1') + os.makedirs(dxbc_dir_path, exist_ok=True) + dxbc_file_path_base = os.path.join(dxbc_dir_path, + dxbc_identifier) + if subprocess.call([ + fxc, + '/Fh', dxbc_file_path_base + '.h', + '/T', dxbc_identifier[-2:] + '_5_1', + '/Vn', dxbc_identifier, + '/WX', + '/nologo', + src_path + ], stdout=subprocess.DEVNULL): + print('ERROR: failed to build a DXBC shader') + return 1 + else: + if all_targets: + print('WARNING: Direct3D DXBC shader building is supported ' + 'only on Windows') + else: + print('ERROR: Direct3D DXBC shader building is supported ' + 'only on Windows') + return 1 + + return 0 + + class GenSpirvCommand(Command): """'genspirv' command.""" @@ -926,95 +1034,6 @@ class GenSpirvCommand(Command): return 0 -class BuildHlslCommand(Command): - """'buildhlsl' command.""" - - def __init__(self, subparsers, *args, **kwargs): - super(BuildHlslCommand, self).__init__( - subparsers, - name='buildhlsl', - help_short='Generates Direct3D shader binaries and header files.', - help_long=''' - Generates the .cso/.h binaries under src/xenia/*/d3d12/shaders/dxbc/. - Run after modifying any .hs/vs/ds/gs/ps/cs.hlsl files. - ''', - *args, **kwargs) - - def execute(self, args, pass_args, cwd): - print('Building Direct3D shaders...') - print('') - - windows_sdk_bin_path = os.path.join(os.environ['ProgramFiles(x86)'], - 'Windows Kits/10/bin/x64') - fxc = os.path.join(windows_sdk_bin_path, 'fxc') - - # Ensure we have the tools. - if not os.path.exists(windows_sdk_bin_path): - print('ERROR: could not find Windows 10 SDK binaries') - return 1 - elif not has_bin(fxc): - print('ERROR: could not find fxc') - return 1 - - src_files = [os.path.join(root, name) - for root, dirs, files in os.walk('src') - for name in files - if (name.endswith('.hs.hlsl') or - name.endswith('.vs.hlsl') or - name.endswith('.ds.hlsl') or - name.endswith('.gs.hlsl') or - name.endswith('.ps.hlsl') or - name.endswith('.cs.hlsl'))] - - # TODO(Triang3l): Handle any_errors. - any_errors = False - for src_file in src_files: - print('- %s' % (src_file)) - src_name = os.path.splitext(os.path.basename(src_file))[0] - identifier = os.path.basename(src_file)[:-5].replace('.', '_') - - bin_path = os.path.join(os.path.dirname(src_file), 'dxbc') - if not os.path.exists(bin_path): - os.mkdir(bin_path) - cso_file = os.path.join(bin_path, identifier) + '.cso' - txt_file = os.path.join(bin_path, identifier) + '.txt' - h_file = os.path.join(bin_path, identifier) + '.h' - - # HLSL source -> .cso binary and DXBC disassembly. - shell_call([ - fxc, - '/nologo', - '/T', identifier[-2:] + '_5_1', - '/Fo', cso_file, - '/Fc', txt_file, - src_file, - ]) - - # bin2c so we get a header file we can compile in. - with open(h_file, 'w') as out_file: - out_file.write('// generated from `xb buildhlsl`\n') - out_file.write('// source: %s\n' % os.path.basename(src_file)) - out_file.write('const uint8_t %s[] = {' % (identifier)) - with open(cso_file, 'rb') as in_file: - index = 0 - c = in_file.read(1) - while len(c) != 0: - if index % 12 == 0: - out_file.write('\n ') - else: - out_file.write(' ') - index += 1 - out_file.write('0x%02X,' % ord(c)) - c = in_file.read(1) - out_file.write('\n};\n') - - if any_errors: - print('ERROR: failed to build one or more shaders.') - return 1 - - return 0 - - class TestCommand(BaseBuildCommand): """'test' command.""" @@ -1336,7 +1355,7 @@ def find_xenia_source_files(): return [os.path.join(root, name) for root, dirs, files in os.walk('src') for name in files - if name.endswith(('.cc', '.c', '.h', '.inl'))] + if name.endswith(('.cc', '.c', '.h', '.inl', '.inc'))] def find_all_source_files():