diff --git a/src/xenia/gpu/d3d12/render_target_cache.cc b/src/xenia/gpu/d3d12/render_target_cache.cc index 2ad94a36a..b6bd66e86 100644 --- a/src/xenia/gpu/d3d12/render_target_cache.cc +++ b/src/xenia/gpu/d3d12/render_target_cache.cc @@ -156,64 +156,50 @@ bool RenderTargetCache::Initialize() { return false; } - // Create the load/store pipelines. - D3D12_COMPUTE_PIPELINE_STATE_DESC pipeline_desc; - pipeline_desc.pRootSignature = edram_load_store_root_signature_; - pipeline_desc.NodeMask = 0; - pipeline_desc.CachedPSO.pCachedBlob = nullptr; - pipeline_desc.CachedPSO.CachedBlobSizeInBytes = 0; - pipeline_desc.Flags = D3D12_PIPELINE_STATE_FLAG_NONE; + // Create the pipelines. + // Load and store. for (uint32_t i = 0; i < uint32_t(EDRAMLoadStoreMode::kCount); ++i) { - // Load. const EDRAMLoadStoreModeInfo& mode_info = edram_load_store_mode_info_[i]; - pipeline_desc.CS.pShaderBytecode = mode_info.load_shader; - pipeline_desc.CS.BytecodeLength = mode_info.load_shader_size; - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&edram_load_pipelines_[i])))) { - XELOGE("Failed to create the EDRAM load pipeline for mode %u", i); + edram_load_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( + device, mode_info.load_shader, mode_info.load_shader_size, + edram_load_store_root_signature_); + edram_store_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( + device, mode_info.store_shader, mode_info.store_shader_size, + edram_load_store_root_signature_); + if (edram_load_pipelines_[i] == nullptr || + edram_store_pipelines_[i] == nullptr) { + XELOGE("Failed to create the EDRAM load/store pipelines for mode %u", i); Shutdown(); return false; } edram_load_pipelines_[i]->SetName(mode_info.load_pipeline_name); - // Store. - pipeline_desc.CS.pShaderBytecode = mode_info.store_shader; - pipeline_desc.CS.BytecodeLength = mode_info.store_shader_size; - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&edram_store_pipelines_[i])))) { - XELOGE("Failed to create the EDRAM store pipeline for mode %u", i); - Shutdown(); - return false; - } edram_store_pipelines_[i]->SetName(mode_info.store_pipeline_name); } // Tile single sample into a texture - 32 bits per pixel. - pipeline_desc.CS.pShaderBytecode = edram_tile_sample_32bpp_cs; - pipeline_desc.CS.BytecodeLength = sizeof(edram_tile_sample_32bpp_cs); - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&edram_tile_sample_32bpp_pipeline_)))) { + edram_tile_sample_32bpp_pipeline_ = ui::d3d12::util::CreateComputePipeline( + device, edram_tile_sample_32bpp_cs, sizeof(edram_tile_sample_32bpp_cs), + edram_load_store_root_signature_); + if (edram_tile_sample_32bpp_pipeline_ == nullptr) { XELOGE("Failed to create the 32bpp EDRAM raw resolve pipeline"); Shutdown(); return false; } edram_tile_sample_32bpp_pipeline_->SetName(L"EDRAM Raw Resolve 32bpp"); - - // Create the clear pipelines. - pipeline_desc.pRootSignature = edram_clear_root_signature_; - // 32-bit color or unorm depth. - pipeline_desc.CS.pShaderBytecode = edram_clear_32bpp_cs; - pipeline_desc.CS.BytecodeLength = sizeof(edram_clear_32bpp_cs); - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&edram_clear_32bpp_pipeline_)))) { + // Clear 32-bit color or unorm depth. + edram_clear_32bpp_pipeline_ = ui::d3d12::util::CreateComputePipeline( + device, edram_clear_32bpp_cs, sizeof(edram_clear_32bpp_cs), + edram_clear_root_signature_); + if (edram_clear_32bpp_pipeline_ == nullptr) { XELOGE("Failed to create the EDRAM 32bpp clear pipeline"); Shutdown(); return false; } edram_clear_32bpp_pipeline_->SetName(L"EDRAM Clear 32bpp"); - // Float depth. - pipeline_desc.CS.pShaderBytecode = edram_clear_depth_float_cs; - pipeline_desc.CS.BytecodeLength = sizeof(edram_clear_depth_float_cs); - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&edram_clear_depth_float_pipeline_)))) { + // Clear float depth. + edram_clear_depth_float_pipeline_ = ui::d3d12::util::CreateComputePipeline( + device, edram_clear_depth_float_cs, sizeof(edram_clear_depth_float_cs), + edram_clear_root_signature_); + if (edram_clear_depth_float_pipeline_ == nullptr) { XELOGE("Failed to create the EDRAM float depth clear pipeline"); Shutdown(); return false; diff --git a/src/xenia/gpu/d3d12/texture_cache.cc b/src/xenia/gpu/d3d12/texture_cache.cc index a2e674a1d..27f970e4c 100644 --- a/src/xenia/gpu/d3d12/texture_cache.cc +++ b/src/xenia/gpu/d3d12/texture_cache.cc @@ -254,30 +254,21 @@ bool TextureCache::Initialize() { } // Create the loading and tiling pipelines. - D3D12_COMPUTE_PIPELINE_STATE_DESC pipeline_desc; - pipeline_desc.pRootSignature = load_root_signature_; - pipeline_desc.NodeMask = 0; - pipeline_desc.CachedPSO.pCachedBlob = nullptr; - pipeline_desc.CachedPSO.CachedBlobSizeInBytes = 0; - pipeline_desc.Flags = D3D12_PIPELINE_STATE_FLAG_NONE; for (uint32_t i = 0; i < uint32_t(LoadMode::kCount); ++i) { const LoadModeInfo& mode_info = load_mode_info_[i]; - pipeline_desc.CS.pShaderBytecode = mode_info.shader; - pipeline_desc.CS.BytecodeLength = mode_info.shader_size; - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&load_pipelines_[i])))) { + load_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( + device, mode_info.shader, mode_info.shader_size, load_root_signature_); + if (load_pipelines_[i] == nullptr) { XELOGE("Failed to create the texture loading pipeline for mode %u", i); Shutdown(); return false; } } - pipeline_desc.pRootSignature = tile_root_signature_; for (uint32_t i = 0; i < uint32_t(TileMode::kCount); ++i) { const TileModeInfo& mode_info = tile_mode_info_[i]; - pipeline_desc.CS.pShaderBytecode = mode_info.shader; - pipeline_desc.CS.BytecodeLength = mode_info.shader_size; - if (FAILED(device->CreateComputePipelineState( - &pipeline_desc, IID_PPV_ARGS(&tile_pipelines_[i])))) { + tile_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( + device, mode_info.shader, mode_info.shader_size, tile_root_signature_); + if (tile_pipelines_[i] == nullptr) { XELOGE("Failed to create the texture tiling pipeline for mode %u", i); Shutdown(); return false; diff --git a/src/xenia/ui/d3d12/d3d12_util.cc b/src/xenia/ui/d3d12/d3d12_util.cc index 16cb4f9df..7f267950e 100644 --- a/src/xenia/ui/d3d12/d3d12_util.cc +++ b/src/xenia/ui/d3d12/d3d12_util.cc @@ -41,6 +41,22 @@ ID3D12RootSignature* CreateRootSignature( return root_signature; } +ID3D12PipelineState* CreateComputePipeline( + ID3D12Device* device, const void* shader, size_t shader_size, + ID3D12RootSignature* root_signature) { + D3D12_COMPUTE_PIPELINE_STATE_DESC desc; + desc.pRootSignature = root_signature; + desc.CS.pShaderBytecode = shader; + desc.CS.BytecodeLength = shader_size; + desc.NodeMask = 0; + desc.CachedPSO.pCachedBlob = nullptr; + desc.CachedPSO.CachedBlobSizeInBytes = 0; + desc.Flags = D3D12_PIPELINE_STATE_FLAG_NONE; + ID3D12PipelineState* pipeline = nullptr; + device->CreateComputePipelineState(&desc, IID_PPV_ARGS(&pipeline)); + return pipeline; +} + } // namespace util } // namespace d3d12 } // namespace ui diff --git a/src/xenia/ui/d3d12/d3d12_util.h b/src/xenia/ui/d3d12/d3d12_util.h index 220aea842..26f9ff9d3 100644 --- a/src/xenia/ui/d3d12/d3d12_util.h +++ b/src/xenia/ui/d3d12/d3d12_util.h @@ -30,6 +30,11 @@ inline bool ReleaseAndNull(T& object) { ID3D12RootSignature* CreateRootSignature(ID3D12Device* device, const D3D12_ROOT_SIGNATURE_DESC& desc); +ID3D12PipelineState* CreateComputePipeline(ID3D12Device* device, + const void* shader, + size_t shader_size, + ID3D12RootSignature* root_signature); + } // namespace util } // namespace d3d12 } // namespace ui