ShuriZma
/
xenia-canary
mirror of https://github.com/xenia-canary/xenia-canary.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

[C++17] static constexpr variables are implicitly inline now

This commit is contained in:
Triang3l 2020-07-11 16:44:57 +03:00
parent f8320d53d7
commit 79413345af
13 changed files with 1 additions and 105 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/xenia/gpu/d3d12/d3d12_command_processor.cc
View File

@ -66,16 +66,6 @@ namespace xe {
namespace gpu {
namespace d3d12 {
constexpr uint32_t D3D12CommandProcessor::kQueueFrames;
constexpr uint32_t
D3D12CommandProcessor::RootBindfulExtraParameterIndices::kUnavailable;
constexpr uint32_t D3D12CommandProcessor::kViewBindfulHeapSize;
constexpr uint32_t D3D12CommandProcessor::kViewBindlessHeapSize;
constexpr uint32_t D3D12CommandProcessor::kSamplerHeapSize;
constexpr uint32_t D3D12CommandProcessor::kSwapTextureWidth;
constexpr uint32_t D3D12CommandProcessor::kSwapTextureHeight;
constexpr uint32_t D3D12CommandProcessor::kScratchBufferSizeIncrement;
D3D12CommandProcessor::D3D12CommandProcessor(
D3D12GraphicsSystem* graphics_system, kernel::KernelState* kernel_state)
: CommandProcessor(graphics_system, kernel_state) {}

5
src/xenia/gpu/d3d12/d3d12_shader.cc
View File

@ -20,11 +20,6 @@ namespace xe {
namespace gpu {
namespace d3d12 {
constexpr uint32_t D3D12Shader::kMaxTextureBindingIndexBits;
constexpr uint32_t D3D12Shader::kMaxTextureBindings;
constexpr uint32_t D3D12Shader::kMaxSamplerBindingIndexBits;
constexpr uint32_t D3D12Shader::kMaxSamplerBindings;
D3D12Shader::D3D12Shader(xenos::ShaderType shader_type, uint64_t data_hash,
const uint32_t* dword_ptr, uint32_t dword_count)
: Shader(shader_type, data_hash, dword_ptr, dword_count) {}

2
src/xenia/gpu/d3d12/deferred_command_list.cc
View File

@ -17,8 +17,6 @@ namespace xe {
namespace gpu {
namespace d3d12 {
constexpr size_t DeferredCommandList::kAlignment;
DeferredCommandList::DeferredCommandList(
D3D12CommandProcessor* command_processor, size_t initial_size)
: command_processor_(command_processor) {

3
src/xenia/gpu/d3d12/pipeline_cache.cc
View File

@ -61,9 +61,6 @@ namespace d3d12 {
#include "xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.h"
#include "xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.h"
constexpr size_t PipelineCache::kLayoutUIDEmpty;
constexpr uint32_t PipelineCache::PipelineDescription::kVersion;
PipelineCache::PipelineCache(D3D12CommandProcessor* command_processor,
RegisterFile* register_file,
bool bindless_resources_used, bool edram_rov_used,

7
src/xenia/gpu/d3d12/primitive_converter.cc
View File

@ -33,13 +33,6 @@ namespace xe {
namespace gpu {
namespace d3d12 {
constexpr uint32_t PrimitiveConverter::kMaxNonIndexedVertices;
constexpr uint32_t PrimitiveConverter::kStaticIBTriangleFanOffset;
constexpr uint32_t PrimitiveConverter::kStaticIBTriangleFanCount;
constexpr uint32_t PrimitiveConverter::kStaticIBQuadOffset;
constexpr uint32_t PrimitiveConverter::kStaticIBQuadCount;
constexpr uint32_t PrimitiveConverter::kStaticIBTotalCount;
PrimitiveConverter::PrimitiveConverter(D3D12CommandProcessor* command_processor,
RegisterFile* register_file,
Memory* memory,

5
src/xenia/gpu/d3d12/render_target_cache.cc
View File

@ -63,11 +63,6 @@ namespace d3d12 {
#include "xenia/gpu/d3d12/shaders/dxbc/resolve_ps.h"
#include "xenia/gpu/d3d12/shaders/dxbc/resolve_vs.h"
#if 0
constexpr uint32_t RenderTargetCache::kHeap4MBPages;
#endif
constexpr uint32_t RenderTargetCache::kRenderTargetDescriptorHeapSize;
const RenderTargetCache::EDRAMLoadStoreModeInfo
RenderTargetCache::edram_load_store_mode_info_[size_t(
RenderTargetCache::EDRAMLoadStoreMode::kCount)] = {

9
src/xenia/gpu/d3d12/shared_memory.cc
View File

@ -34,15 +34,6 @@ namespace xe {
namespace gpu {
namespace d3d12 {
constexpr uint32_t SharedMemory::kBufferSizeLog2;
constexpr uint32_t SharedMemory::kBufferSize;
constexpr uint32_t SharedMemory::kHeapSizeLog2;
constexpr uint32_t SharedMemory::kHeapSize;
constexpr uint32_t SharedMemory::kWatchBucketSizeLog2;
constexpr uint32_t SharedMemory::kWatchBucketCount;
constexpr uint32_t SharedMemory::kWatchRangePoolSize;
constexpr uint32_t SharedMemory::kWatchNodePoolSize;
SharedMemory::SharedMemory(D3D12CommandProcessor* command_processor,
Memory* memory, TraceWriter* trace_writer)
: command_processor_(command_processor),

7
src/xenia/gpu/d3d12/texture_cache.cc
View File

@ -101,13 +101,6 @@ namespace d3d12 {
#include "xenia/gpu/d3d12/shaders/dxbc/texture_tile_r10g11b11_rgba16_cs.h"
#include "xenia/gpu/d3d12/shaders/dxbc/texture_tile_r11g11b10_rgba16_cs.h"
constexpr uint32_t TextureCache::SRVDescriptorCachePage::kHeapSize;
constexpr uint32_t TextureCache::LoadConstants::kGuestPitchTiled;
constexpr uint32_t TextureCache::kScaledResolveBufferSizeLog2;
constexpr uint32_t TextureCache::kScaledResolveBufferSize;
constexpr uint32_t TextureCache::kScaledResolveHeapSizeLog2;
constexpr uint32_t TextureCache::kScaledResolveHeapSize;
// For formats with less than 4 components, assuming the last component is
// replicated into the non-existent ones, similar to what is done for unused
// components of operands in shaders.

15
src/xenia/gpu/dxbc_shader_translator.cc
View File

@ -62,21 +62,6 @@ using namespace ucode;
// S#/T#/U# binding index, and the second is the s#/t#/u# register index
// within its space.
constexpr uint32_t DxbcShaderTranslator::kMaxTextureBindingIndexBits;
constexpr uint32_t DxbcShaderTranslator::kMaxTextureBindings;
constexpr uint32_t DxbcShaderTranslator::kMaxSamplerBindingIndexBits;
constexpr uint32_t DxbcShaderTranslator::kMaxSamplerBindings;
constexpr uint32_t DxbcShaderTranslator::kInterpolatorCount;
constexpr uint32_t DxbcShaderTranslator::kPointParametersTexCoord;
constexpr uint32_t DxbcShaderTranslator::kClipSpaceZWTexCoord;
constexpr uint32_t DxbcShaderTranslator::kSwizzleXYZW;
constexpr uint32_t DxbcShaderTranslator::kSwizzleXXXX;
constexpr uint32_t DxbcShaderTranslator::kSwizzleYYYY;
constexpr uint32_t DxbcShaderTranslator::kSwizzleZZZZ;
constexpr uint32_t DxbcShaderTranslator::kSwizzleWWWW;
constexpr uint32_t DxbcShaderTranslator::kBindingIndexUnallocated;
constexpr uint32_t DxbcShaderTranslator::kCfExecBoolConstantNone;
DxbcShaderTranslator::DxbcShaderTranslator(uint32_t vendor_id,
bool bindless_resources_used,
bool edram_rov_used,

36
src/xenia/gpu/registers.cc
View File

@ -13,53 +13,19 @@ namespace xe {
namespace gpu {
namespace reg {
constexpr Register COHER_STATUS_HOST::register_index;
constexpr Register WAIT_UNTIL::register_index;
constexpr Register SQ_PROGRAM_CNTL::register_index;
constexpr Register SQ_CONTEXT_MISC::register_index;
constexpr Register SQ_INTERPOLATOR_CNTL::register_index;
constexpr Register VGT_DRAW_INITIATOR::register_index;
constexpr Register VGT_OUTPUT_PATH_CNTL::register_index;
constexpr Register VGT_HOS_CNTL::register_index;
constexpr Register PA_SU_POINT_MINMAX::register_index;
constexpr Register PA_SU_POINT_SIZE::register_index;
constexpr Register PA_SU_SC_MODE_CNTL::register_index;
constexpr Register PA_SU_VTX_CNTL::register_index;
constexpr Register PA_SC_MPASS_PS_CNTL::register_index;
constexpr Register PA_SC_VIZ_QUERY::register_index;
constexpr Register PA_CL_CLIP_CNTL::register_index;
constexpr Register PA_CL_VTE_CNTL::register_index;
constexpr Register PA_SC_WINDOW_OFFSET::register_index;
constexpr Register PA_SC_WINDOW_SCISSOR_TL::register_index;
constexpr Register PA_SC_WINDOW_SCISSOR_BR::register_index;
constexpr Register RB_MODECONTROL::register_index;
constexpr Register RB_SURFACE_INFO::register_index;
constexpr Register RB_COLORCONTROL::register_index;
constexpr Register RB_COLOR_INFO::register_index;
const Register RB_COLOR_INFO::rt_register_indices[4] = {
XE_GPU_REG_RB_COLOR_INFO,
XE_GPU_REG_RB_COLOR1_INFO,
XE_GPU_REG_RB_COLOR2_INFO,
XE_GPU_REG_RB_COLOR3_INFO,
};
constexpr Register RB_COLOR_MASK::register_index;
constexpr Register RB_BLENDCONTROL::register_index;
const Register RB_BLENDCONTROL::rt_register_indices[4] = {
XE_GPU_REG_RB_BLENDCONTROL0,
XE_GPU_REG_RB_BLENDCONTROL1,
XE_GPU_REG_RB_BLENDCONTROL2,
XE_GPU_REG_RB_BLENDCONTROL3,
};
constexpr Register RB_DEPTHCONTROL::register_index;
constexpr Register RB_STENCILREFMASK::register_index;
constexpr Register RB_DEPTH_INFO::register_index;
constexpr Register RB_COPY_CONTROL::register_index;
constexpr Register RB_COPY_DEST_INFO::register_index;
constexpr Register RB_COPY_DEST_PITCH::register_index;
} // namespace reg
} // namespace gpu

2
src/xenia/gpu/shader_translator.cc
View File

@ -42,8 +42,6 @@ using namespace ucode;
// Lots of naming comes from the disassembly spit out by the XNA GS compiler
// and dumps of d3dcompiler and games: https://pastebin.com/i4kAv7bB
constexpr uint32_t ShaderTranslator::kMaxMemExports;
ShaderTranslator::ShaderTranslator() = default;
ShaderTranslator::~ShaderTranslator() = default;

3
src/xenia/ui/d3d12/d3d12_context.cc
View File

@ -26,9 +26,6 @@ namespace xe {
namespace ui {
namespace d3d12 {
constexpr uint32_t D3D12Context::kSwapCommandAllocatorCount;
constexpr uint32_t D3D12Context::kSwapChainBufferCount;
D3D12Context::D3D12Context(D3D12Provider* provider, Window* target_window)
: GraphicsContext(provider, target_window) {}

2
src/xenia/ui/d3d12/pools.cc
View File

@ -163,8 +163,6 @@ uint8_t* UploadBufferPool::RequestPartial(
return mapping;
}
constexpr uint64_t DescriptorHeapPool::kHeapIndexInvalid;
DescriptorHeapPool::DescriptorHeapPool(ID3D12Device* device,
D3D12_DESCRIPTOR_HEAP_TYPE type,
uint32_t page_size)