Enabled tests for vpkuhum/vpkuwum and added test with negative numbers for vpkuwus
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@ -1,39 +1,38 @@
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#vpkuhum isn't implemented yet
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#test_vpkuhum_1:
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# # {0, 1, 2, 3, 4, 5, 6, 7}
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# #_ REGISTER_IN v3 [00000001, 00020003, 00040005, 00060007]
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# # {8, 9, 10, 11, 12, 13, 14, 15}
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# #_ REGISTER_IN v4 [00080009, 000A000B, 000C000D, 000E000F]
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# vpkuhum v5, v3, v4
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# blr
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# #_ REGISTER_OUT v3 [00000001, 00020003, 00040005, 00060007]
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# #_ REGISTER_OUT v4 [00080009, 000A000B, 000C000D, 000E000F]
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# # {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
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# #_ REGISTER_OUT v5 [00010203, 04050607, 08090A0B, 0C0D0E0F]
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# blr
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test_vpkuhum_1:
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# {0, 1, 2, 3, 4, 5, 6, 7}
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#_ REGISTER_IN v3 [00000001, 00020003, 00040005, 00060007]
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# {8, 9, 10, 11, 12, 13, 14, 15}
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#_ REGISTER_IN v4 [00080009, 000A000B, 000C000D, 000E000F]
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vpkuhum v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [00000001, 00020003, 00040005, 00060007]
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#_ REGISTER_OUT v4 [00080009, 000A000B, 000C000D, 000E000F]
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# {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
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#_ REGISTER_OUT v5 [00010203, 04050607, 08090A0B, 0C0D0E0F]
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blr
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#test_vpkuhum_2:
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# # {-8, -7, -6, -5, -4, -3, -2, -1}
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# #_ REGISTER_IN v3 [FFF8FFF9, FFFAFFFB, FFFCFFFD, FFFEFFFF]
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# # {0, 1, 2, 3, 4, 5, 6, 7}
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# #_ REGISTER_IN v4 [00000001, 00020003, 00040005, 00060007]
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# vpkuhum v5, v3, v4
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# blr
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# #_ REGISTER_OUT v3 [FFF8FFF9, FFFAFFFB, FFFCFFFD, FFFEFFFF]
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# #_ REGISTER_OUT v4 [00000001, 00020003, 00040005, 00060007]
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# # {-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7}
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# #_ REGISTER_OUT v5 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
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# blr
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test_vpkuhum_2:
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# {-8, -7, -6, -5, -4, -3, -2, -1}
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#_ REGISTER_IN v3 [FFF8FFF9, FFFAFFFB, FFFCFFFD, FFFEFFFF]
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# {0, 1, 2, 3, 4, 5, 6, 7}
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#_ REGISTER_IN v4 [00000001, 00020003, 00040005, 00060007]
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vpkuhum v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFF8FFF9, FFFAFFFB, FFFCFFFD, FFFEFFFF]
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#_ REGISTER_OUT v4 [00000001, 00020003, 00040005, 00060007]
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# {-8, -7, -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7}
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#_ REGISTER_OUT v5 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
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blr
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#test_vpkuhum_3:
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# # {0, 65535, 65535, 0, 0, 0, 65535, 0}
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# #_ REGISTER_IN v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
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# # {65535, 0, 0, 65535, 65535, 65535, 0, 65535}
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# #_ REGISTER_IN v4 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
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# vpkuhum v5, v3, v4
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# blr
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# #_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
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# #_ REGISTER_OUT v4 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
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# # {0, 255, 255, 0, 0, 0, 255, 0, 255, 0, 0, 255, 255, 255, 0, 255}
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# #_ REGISTER_OUT v5 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
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# blr
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test_vpkuhum_3:
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# {0, 65535, 65535, 0, 0, 0, 65535, 0}
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#_ REGISTER_IN v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
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# {65535, 0, 0, 65535, 65535, 65535, 0, 65535}
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#_ REGISTER_IN v4 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
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vpkuhum v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
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#_ REGISTER_OUT v4 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
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# {0, 255, 255, 0, 0, 0, 255, 0, 255, 0, 0, 255, 255, 255, 0, 255}
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#_ REGISTER_OUT v5 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
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blr
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@ -1,36 +1,35 @@
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#vpkuwum isn't implemented yet
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#test_vpkuwum_1:
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# # {0, 1, 2, 3}
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# #_ REGISTER_IN v3 [00000000, 00000001, 00000002, 00000003]
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# # {4, 5, 6, 7}
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# #_ REGISTER_IN v4 [00000004, 00000005, 00000006, 00000007]
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# vpkuwum v5, v3, v4
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# blr
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# #_ REGISTER_OUT v3 [00000000, 00000001, 00000002, 00000003]
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# #_ REGISTER_OUT v4 [00000004, 00000005, 00000006, 00000007]
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# # {0, 1, 2, 3, 4, 5, 6, 7}
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# #_ REGISTER_OUT v5 [00000001, 00020003, 00040005, 00060007]
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test_vpkuwum_1:
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# {0, 1, 2, 3}
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#_ REGISTER_IN v3 [00000000, 00000001, 00000002, 00000003]
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# {4, 5, 6, 7}
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#_ REGISTER_IN v4 [00000004, 00000005, 00000006, 00000007]
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vpkuwum v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [00000000, 00000001, 00000002, 00000003]
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#_ REGISTER_OUT v4 [00000004, 00000005, 00000006, 00000007]
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# {0, 1, 2, 3, 4, 5, 6, 7}
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#_ REGISTER_OUT v5 [00000001, 00020003, 00040005, 00060007]
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#test_vpkuwum_2:
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# # {-4, -3, -2, -1}
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# #_ REGISTER_IN v3 [FFFFFFFC, FFFFFFFD, FFFFFFFE, FFFFFFFF]
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# # {0, 1, 2, 3}
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# #_ REGISTER_IN v4 [00000000, 00000001, 00000002, 00000003]
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# vpkuwum v5, v3, v4
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# blr
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# #_ REGISTER_OUT v3 [FFFFFFFC, FFFFFFFD, FFFFFFFE, FFFFFFFF]
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# #_ REGISTER_OUT v4 [00000000, 00000001, 00000002, 00000003]
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# # {-4, -3, -2, -1, 0, 1, 2, 3}
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# #_ REGISTER_OUT v5 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
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test_vpkuwum_2:
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# {-4, -3, -2, -1}
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#_ REGISTER_IN v3 [FFFFFFFC, FFFFFFFD, FFFFFFFE, FFFFFFFF]
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# {0, 1, 2, 3}
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#_ REGISTER_IN v4 [00000000, 00000001, 00000002, 00000003]
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vpkuwum v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFC, FFFFFFFD, FFFFFFFE, FFFFFFFF]
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#_ REGISTER_OUT v4 [00000000, 00000001, 00000002, 00000003]
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# {-4, -3, -2, -1, 0, 1, 2, 3}
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#_ REGISTER_OUT v5 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
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#test_vpkuwum_3:
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# # {0, 4294967295, 4294967295, 4294967295}
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# #_ REGISTER_IN v3 [00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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# # {4294967295, 0, 0, 0}
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# #_ REGISTER_IN v4 [FFFFFFFF, 00000000, 00000000, 00000000]
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# vpkuwum v5, v3, v4
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# blr
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# #_ REGISTER_OUT v3 [00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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# #_ REGISTER_OUT v4 [FFFFFFFF, 00000000, 00000000, 00000000]
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# # {0, 65535, 65535, 65535, 65535, 0, 0, 0}
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# #_ REGISTER_OUT v5 [0000FFFF, FFFFFFFF, FFFF0000, 00000000]
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test_vpkuwum_3:
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# {0, 4294967295, 4294967295, 4294967295}
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#_ REGISTER_IN v3 [00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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# {4294967295, 0, 0, 0}
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#_ REGISTER_IN v4 [FFFFFFFF, 00000000, 00000000, 00000000]
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vpkuwum v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_OUT v4 [FFFFFFFF, 00000000, 00000000, 00000000]
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# {0, 65535, 65535, 65535, 65535, 0, 0, 0}
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#_ REGISTER_OUT v5 [0000FFFF, FFFFFFFF, FFFF0000, 00000000]
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@ -9,3 +9,15 @@ test_vpkuwus_1:
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#_ REGISTER_OUT v4 [00000002, 00010002, 00000003, 00010003]
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# {0, 65535, 1, 65535, 2, 65535, 3, 65535}
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#_ REGISTER_OUT v5 [0000FFFF, 0001FFFF, 0002FFFF, 0003FFFF]
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test_vpkuwus_2:
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# {2147483648, 2147483647, 2, 3}
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#_ REGISTER_IN v3 [80000000, 7FFFFFFF, 00000002, 00000003]
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# {4294967295, 65538, 4294967294, 16}
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#_ REGISTER_IN v4 [FFFFFFFF, 00010002, FFFFFFFE, 00000010]
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vpkuwus v5, v3, v4
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blr
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#_ REGISTER_OUT v3 [80000000, 7FFFFFFF, 00000002, 00000003]
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#_ REGISTER_OUT v4 [FFFFFFFF, 00010002, FFFFFFFE, 00000010]
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# {65535, 65535, 2, 3, 65535, 65535, 65535, 16}
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#_ REGISTER_OUT v5 [FFFFFFFF, 00020003, FFFFFFFF, FFFF0010]
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