Fixing stdux/stdx o_o
This commit is contained in:
parent
62b792c903
commit
5b91ba89e9
|
@ -91,7 +91,11 @@ XEDISASMR(ldux, 0x7C00006A, X )(InstrData& i, InstrDisasm& d) {
|
|||
XEDISASMR(ldx, 0x7C00002A, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("ldx", "Load Doubleword Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
|
@ -308,11 +312,7 @@ XEDISASMR(stdu, 0xF8000001, DS )(InstrData& i, InstrDisasm& d) {
|
|||
XEDISASMR(stdux, 0x7C00016A, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stdux", "Store Doubleword with Update Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
|
||||
if (i.DS.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
|
@ -320,7 +320,11 @@ XEDISASMR(stdux, 0x7C00016A, X )(InstrData& i, InstrDisasm& d) {
|
|||
XEDISASMR(stdx, 0x7C00012A, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stdx", "Store Doubleword Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
|
|
|
@ -690,6 +690,23 @@ XEEMITTER(stdu, 0xF8000001, DS )(X64Emitter& e, X86Compiler& c, InstrDat
|
|||
}
|
||||
|
||||
XEEMITTER(stdux, 0x7C00016A, X )(X64Emitter& e, X86Compiler& c, InstrData& i) {
|
||||
// EA <- (RA) + (RB)
|
||||
// MEM(EA, 8) <- (RS)
|
||||
// RA <- EA
|
||||
|
||||
GpVar ea(c.newGpVar());
|
||||
c.mov(ea, e.gpr_value(i.X.RA));
|
||||
c.add(ea, e.gpr_value(i.X.RB));
|
||||
GpVar v = e.gpr_value(i.X.RT);
|
||||
e.WriteMemory(i.address, ea, 8, v);
|
||||
e.update_gpr_value(i.X.RA, ea);
|
||||
|
||||
e.clear_constant_gpr_value(i.X.RA);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEEMITTER(stdx, 0x7C00012A, X)(X64Emitter& e, X86Compiler& c, InstrData& i) {
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
|
@ -708,23 +725,6 @@ XEEMITTER(stdux, 0x7C00016A, X )(X64Emitter& e, X86Compiler& c, InstrDat
|
|||
return 0;
|
||||
}
|
||||
|
||||
XEEMITTER(stdx, 0x7C00012A, X )(X64Emitter& e, X86Compiler& c, InstrData& i) {
|
||||
// EA <- (RA) + (RB)
|
||||
// MEM(EA, 8) <- (RS)
|
||||
// RA <- EA
|
||||
|
||||
GpVar ea(c.newGpVar());
|
||||
c.mov(ea, e.gpr_value(i.X.RA));
|
||||
c.add(ea, e.gpr_value(i.X.RB));
|
||||
GpVar v = e.gpr_value(i.X.RT);
|
||||
e.WriteMemory(i.address, ea, 8, v);
|
||||
e.update_gpr_value(i.X.RA, ea);
|
||||
|
||||
e.clear_constant_gpr_value(i.X.RA);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEEMITTER(sth, 0xB0000000, D )(X64Emitter& e, X86Compiler& c, InstrData& i) {
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
|
|
Loading…
Reference in New Issue