[Vulkan] Bind the vertex set to DS slot 2
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9463732709
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@ -44,7 +44,8 @@ PipelineCache::~PipelineCache() { Shutdown(); }
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VkResult PipelineCache::Initialize(
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VkDescriptorSetLayout uniform_descriptor_set_layout,
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VkDescriptorSetLayout texture_descriptor_set_layout) {
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VkDescriptorSetLayout texture_descriptor_set_layout,
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VkDescriptorSetLayout vertex_descriptor_set_layout) {
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VkResult status;
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// Initialize the shared driver pipeline cache.
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@ -70,6 +71,8 @@ VkResult PipelineCache::Initialize(
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uniform_descriptor_set_layout,
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// All texture bindings.
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texture_descriptor_set_layout,
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// Vertex bindings.
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vertex_descriptor_set_layout,
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};
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// Push constants used for draw parameters.
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@ -43,7 +43,8 @@ class PipelineCache {
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~PipelineCache();
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VkResult Initialize(VkDescriptorSetLayout uniform_descriptor_set_layout,
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VkDescriptorSetLayout texture_descriptor_set_layout);
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VkDescriptorSetLayout texture_descriptor_set_layout,
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VkDescriptorSetLayout vertex_descriptor_set_layout);
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void Shutdown();
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// Loads a shader from the cache, possibly translating it.
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@ -106,7 +106,8 @@ bool VulkanCommandProcessor::SetupContext() {
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pipeline_cache_ = std::make_unique<PipelineCache>(register_file_, device_);
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status = pipeline_cache_->Initialize(
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buffer_cache_->constant_descriptor_set_layout(),
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texture_cache_->texture_descriptor_set_layout());
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texture_cache_->texture_descriptor_set_layout(),
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buffer_cache_->vertex_descriptor_set_layout());
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if (status != VK_SUCCESS) {
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XELOGE("Unable to initialize pipeline cache");
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pipeline_cache_->Shutdown();
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@ -823,74 +824,12 @@ bool VulkanCommandProcessor::PopulateVertexBuffers(
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}
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assert_true(vertex_bindings.size() <= 32);
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VkBuffer all_buffers[32];
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VkDeviceSize all_buffer_offsets[32];
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uint32_t buffer_index = 0;
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if (vertex_bindings.size() >= xe::countof(all_buffers)) {
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XELOGE("PopulateVertexBuffers failed: Too many bindings! (%zd >= %zd)",
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vertex_bindings.size(), xe::countof(all_buffers));
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return false;
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}
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for (const auto& vertex_binding : vertex_bindings) {
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int r = XE_GPU_REG_SHADER_CONSTANT_FETCH_00_0 +
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(vertex_binding.fetch_constant / 3) * 6;
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const auto group = reinterpret_cast<xe_gpu_fetch_group_t*>(®s.values[r]);
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const xe_gpu_vertex_fetch_t* fetch = nullptr;
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switch (vertex_binding.fetch_constant % 3) {
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case 0:
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fetch = &group->vertex_fetch_0;
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break;
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case 1:
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fetch = &group->vertex_fetch_1;
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break;
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case 2:
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fetch = &group->vertex_fetch_2;
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break;
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}
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if (fetch->type != 0x3) {
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// TODO(DrChat): Some games use type 0x0 (with no data).
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return false;
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}
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// TODO(benvanik): compute based on indices or vertex count.
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// THIS CAN BE MASSIVELY INCORRECT (too large).
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uint32_t source_length = fetch->size * 4;
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uint32_t physical_address = fetch->address << 2;
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trace_writer_.WriteMemoryRead(physical_address, source_length);
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// Upload (or get a cached copy of) the buffer.
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// TODO: Make the buffer cache ... actually cache buffers. We can have
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// a list of buffers that were cached, and store those in chunks in a
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// multiple of the host's page size.
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// So, we need to track all vertex buffers in a sorted map, and track all
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// write watches in a sorted map. When a vertex buffer is uploaded, track
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// all untracked pages with 1-page write watches. In the callback,
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// invalidate any overlapping vertex buffers.
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//
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// We would keep the old transient buffer as a staging buffer, and upload
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// to a GPU-only buffer that tracks all cached vertex buffers.
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auto buffer_ref = buffer_cache_->UploadVertexBuffer(
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current_setup_buffer_, physical_address, source_length,
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static_cast<Endian>(fetch->endian), current_batch_fence_);
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if (buffer_ref.second == VK_WHOLE_SIZE) {
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// Failed to upload buffer.
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return false;
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}
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// Stash the buffer reference for our bulk bind at the end.
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all_buffers[buffer_index] = buffer_ref.first;
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all_buffer_offsets[buffer_index] = buffer_ref.second;
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++buffer_index;
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}
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// Bind buffers.
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vkCmdBindVertexBuffers(command_buffer, 0, buffer_index, all_buffers,
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all_buffer_offsets);
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auto descriptor_set = buffer_cache_->PrepareVertexSet(
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command_buffer, current_batch_fence_, vertex_bindings);
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vkCmdBindDescriptorSets(command_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS,
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pipeline_cache_->pipeline_layout(), 2, 1,
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&descriptor_set, 0, nullptr);
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return true;
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}
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