Various rounding instructions.
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35ef6df1fc
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@ -1020,46 +1020,98 @@ int Translate_CONVERT(TranslationContext& ctx, Instr* i) {
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}
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}
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uint32_t IntCode_ROUND_F32(IntCodeState& ics, const IntCode* i) {
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uint32_t IntCode_ROUND_F32(IntCodeState& ics, const IntCode* i) {
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if (i->flags == ROUND_TO_NEAREST) {
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float src1 = ics.rf[i->src1_reg].f32;
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ics.rf[i->dest_reg].f32 = round(ics.rf[i->src1_reg].f32);
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float dest = src1;
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} else {
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switch (i->flags) {
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ics.rf[i->dest_reg].f32 = floor(ics.rf[i->src1_reg].f32);
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case ROUND_TO_ZERO:
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dest = truncf(src1);
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break;
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case ROUND_TO_NEAREST:
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dest = roundf(src1);
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break;
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case ROUND_TO_MINUS_INFINITY:
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dest = floorf(src1);
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break;
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case ROUND_TO_POSITIVE_INFINITY:
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dest = ceilf(src1);
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break;
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}
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}
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ics.rf[i->dest_reg].f32 = dest;
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return IA_NEXT;
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return IA_NEXT;
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}
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}
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uint32_t IntCode_ROUND_F64(IntCodeState& ics, const IntCode* i) {
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uint32_t IntCode_ROUND_F64(IntCodeState& ics, const IntCode* i) {
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if (i->flags == ROUND_TO_NEAREST) {
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double src1 = ics.rf[i->src1_reg].f64;
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ics.rf[i->dest_reg].f64 = round(ics.rf[i->src1_reg].f64);
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double dest = src1;
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} else {
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switch (i->flags) {
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ics.rf[i->dest_reg].f64 = floor(ics.rf[i->src1_reg].f64);
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case ROUND_TO_ZERO:
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dest = trunc(src1);
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break;
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case ROUND_TO_NEAREST:
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dest = round(src1);
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break;
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case ROUND_TO_MINUS_INFINITY:
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dest = floor(src1);
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break;
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case ROUND_TO_POSITIVE_INFINITY:
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dest = ceil(src1);
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break;
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}
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ics.rf[i->dest_reg].f64 = dest;
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return IA_NEXT;
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}
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uint32_t IntCode_ROUND_V128_ZERO(IntCodeState& ics, const IntCode* i) {
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const vec128_t& src1 = ics.rf[i->src1_reg].v128;
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vec128_t& dest = ics.rf[i->dest_reg].v128;
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for (size_t n = 0; n < 4; n++) {
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dest.f4[n] = truncf(src1.f4[n]);
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}
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}
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return IA_NEXT;
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return IA_NEXT;
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}
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}
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uint32_t IntCode_ROUND_V128(IntCodeState& ics, const IntCode* i) {
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uint32_t IntCode_ROUND_V128_NEAREST(IntCodeState& ics, const IntCode* i) {
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const vec128_t& src1 = ics.rf[i->src1_reg].v128;
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const vec128_t& src1 = ics.rf[i->src1_reg].v128;
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vec128_t& dest = ics.rf[i->dest_reg].v128;
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vec128_t& dest = ics.rf[i->dest_reg].v128;
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if (i->flags == ROUND_TO_NEAREST) {
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for (size_t n = 0; n < 4; n++) {
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for (size_t n = 0; n < 4; n++) {
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dest.f4[n] = roundf(src1.f4[n]);
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dest.f4[n] = round(src1.f4[n]);
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}
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}
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return IA_NEXT;
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} else {
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}
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for (size_t n = 0; n < 4; n++) {
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uint32_t IntCode_ROUND_V128_MINUS_INFINITY(IntCodeState& ics, const IntCode* i) {
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dest.f4[n] = floor(src1.f4[n]);
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const vec128_t& src1 = ics.rf[i->src1_reg].v128;
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}
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vec128_t& dest = ics.rf[i->dest_reg].v128;
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for (size_t n = 0; n < 4; n++) {
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dest.f4[n] = floorf(src1.f4[n]);
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}
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return IA_NEXT;
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}
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uint32_t IntCode_ROUND_V128_POSITIVE_INFINTIY(IntCodeState& ics, const IntCode* i) {
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const vec128_t& src1 = ics.rf[i->src1_reg].v128;
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vec128_t& dest = ics.rf[i->dest_reg].v128;
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for (size_t n = 0; n < 4; n++) {
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dest.f4[n] = ceilf(src1.f4[n]);
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}
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}
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return IA_NEXT;
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return IA_NEXT;
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}
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}
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int Translate_ROUND(TranslationContext& ctx, Instr* i) {
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int Translate_ROUND(TranslationContext& ctx, Instr* i) {
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static IntCodeFn fns[] = {
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if (i->dest->type == VEC128_TYPE) {
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IntCode_INVALID_TYPE,
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static IntCodeFn fns[] = {
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IntCode_INVALID_TYPE,
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IntCode_ROUND_V128_ZERO,
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IntCode_INVALID_TYPE,
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IntCode_ROUND_V128_NEAREST,
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IntCode_INVALID_TYPE,
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IntCode_ROUND_V128_MINUS_INFINITY,
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IntCode_ROUND_F32,
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IntCode_ROUND_V128_POSITIVE_INFINTIY,
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IntCode_ROUND_F64,
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};
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IntCode_ROUND_V128,
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return DispatchToC(ctx, i, fns[i->flags]);
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};
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} else {
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return DispatchToC(ctx, i, fns[i->dest->type]);
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static IntCodeFn fns[] = {
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IntCode_INVALID_TYPE,
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IntCode_INVALID_TYPE,
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IntCode_INVALID_TYPE,
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IntCode_INVALID_TYPE,
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IntCode_ROUND_F32,
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IntCode_ROUND_F64,
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IntCode_INVALID_TYPE,
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};
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return DispatchToC(ctx, i, fns[i->dest->type]);
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}
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}
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}
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uint32_t IntCode_VECTOR_CONVERT_I2F(IntCodeState& ics, const IntCode* i) {
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uint32_t IntCode_VECTOR_CONVERT_I2F(IntCodeState& ics, const IntCode* i) {
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@ -1183,13 +1183,17 @@ XEEMITTER(vrefp128, VX128_3(6, 1584), VX128_3)(PPCHIRBuilder& f, InstrData
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return InstrEmit_vrefp_(f, VX128_3_VD128, VX128_3_VB128);
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return InstrEmit_vrefp_(f, VX128_3_VD128, VX128_3_VB128);
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}
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}
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int InstrEmit_vrfim_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) {
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// (VD) <- RndToFPInt32Floor(VB)
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Value* v = f.Round(f.LoadVR(vb), ROUND_TO_MINUS_INFINITY);
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f.StoreVR(vd, v);
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return 0;
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}
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XEEMITTER(vrfim, 0x100002CA, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrfim, 0x100002CA, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return InstrEmit_vrfim_(f, i.VX.VD, i.VX.VB);
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return 1;
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}
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}
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XEEMITTER(vrfim128, VX128_3(6, 816), VX128_3)(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrfim128, VX128_3(6, 816), VX128_3)(PPCHIRBuilder& f, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return InstrEmit_vrfim_(f, VX128_3_VD128, VX128_3_VB128);
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return 1;
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}
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}
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int InstrEmit_vrfin_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) {
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int InstrEmit_vrfin_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) {
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@ -1205,22 +1209,30 @@ XEEMITTER(vrfin128, VX128_3(6, 880), VX128_3)(PPCHIRBuilder& f, InstrData
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return InstrEmit_vrfin_(f, VX128_3_VD128, VX128_3_VB128);
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return InstrEmit_vrfin_(f, VX128_3_VD128, VX128_3_VB128);
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}
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}
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int InstrEmit_vrfip_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) {
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// (VD) <- RndToFPInt32Ceil(VB)
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Value* v = f.Round(f.LoadVR(vb), ROUND_TO_POSITIVE_INFINITY);
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f.StoreVR(vd, v);
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return 0;
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}
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XEEMITTER(vrfip, 0x1000028A, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrfip, 0x1000028A, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return InstrEmit_vrfip_(f, i.VX.VD, i.VX.VB);
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return 1;
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}
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}
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XEEMITTER(vrfip128, VX128_3(6, 944), VX128_3)(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrfip128, VX128_3(6, 944), VX128_3)(PPCHIRBuilder& f, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return InstrEmit_vrfip_(f, VX128_3_VD128, VX128_3_VB128);
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return 1;
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}
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}
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int InstrEmit_vrfiz_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) {
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// (VD) <- RndToFPInt32Trunc(VB)
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Value* v = f.Round(f.LoadVR(vb), ROUND_TO_ZERO);
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f.StoreVR(vd, v);
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return 0;
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}
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XEEMITTER(vrfiz, 0x1000024A, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrfiz, 0x1000024A, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return InstrEmit_vrfiz_(f, i.VX.VD, i.VX.VB);
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return 1;
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}
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}
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XEEMITTER(vrfiz128, VX128_3(6, 1008), VX128_3)(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrfiz128, VX128_3(6, 1008), VX128_3)(PPCHIRBuilder& f, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return InstrEmit_vrfiz_(f, VX128_3_VD128, VX128_3_VB128);
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return 1;
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}
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}
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XEEMITTER(vrlb, 0x10000004, VX )(PPCHIRBuilder& f, InstrData& i) {
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XEEMITTER(vrlb, 0x10000004, VX )(PPCHIRBuilder& f, InstrData& i) {
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@ -28,6 +28,8 @@ enum RoundMode {
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// to zero/nearest/etc
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// to zero/nearest/etc
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ROUND_TO_ZERO = 0,
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ROUND_TO_ZERO = 0,
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ROUND_TO_NEAREST,
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ROUND_TO_NEAREST,
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ROUND_TO_MINUS_INFINITY,
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ROUND_TO_POSITIVE_INFINITY,
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};
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};
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enum LoadFlags {
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enum LoadFlags {
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LOAD_NO_ALIAS = (1 << 1),
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LOAD_NO_ALIAS = (1 << 1),
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