From 46a59270c4186280f737f5c9a553116db4d9a0f6 Mon Sep 17 00:00:00 2001
From: Ben Vanik <ben.vanik@gmail.com>
Date: Tue, 10 Feb 2015 12:00:47 -0800
Subject: [PATCH] Tests for nor and neg.

---
 src/alloy/frontend/ppc/test/bin/instr_neg.bin | Bin 0 -> 24 bytes
 src/alloy/frontend/ppc/test/bin/instr_neg.dis |  17 +++++++++++++++++
 src/alloy/frontend/ppc/test/bin/instr_neg.map |   3 +++
 src/alloy/frontend/ppc/test/bin/instr_nor.bin | Bin 0 -> 20 bytes
 src/alloy/frontend/ppc/test/bin/instr_nor.dis |  14 ++++++++++++++
 src/alloy/frontend/ppc/test/bin/instr_nor.map |   2 ++
 src/alloy/frontend/ppc/test/instr_neg.s       |  17 +++++++++++++++++
 src/alloy/frontend/ppc/test/instr_nor.s       |   9 +++++++++
 8 files changed, 62 insertions(+)
 create mode 100644 src/alloy/frontend/ppc/test/bin/instr_neg.bin
 create mode 100644 src/alloy/frontend/ppc/test/bin/instr_neg.dis
 create mode 100644 src/alloy/frontend/ppc/test/bin/instr_neg.map
 create mode 100644 src/alloy/frontend/ppc/test/bin/instr_nor.bin
 create mode 100644 src/alloy/frontend/ppc/test/bin/instr_nor.dis
 create mode 100644 src/alloy/frontend/ppc/test/bin/instr_nor.map
 create mode 100644 src/alloy/frontend/ppc/test/instr_neg.s
 create mode 100644 src/alloy/frontend/ppc/test/instr_nor.s

diff --git a/src/alloy/frontend/ppc/test/bin/instr_neg.bin b/src/alloy/frontend/ppc/test/bin/instr_neg.bin
new file mode 100644
index 0000000000000000000000000000000000000000..c2031392faf092201f12b7746e41b4a4816cba8a
GIT binary patch
literal 24
Scmb<PX1L(jz@SirMgst6M+evd

literal 0
HcmV?d00001

diff --git a/src/alloy/frontend/ppc/test/bin/instr_neg.dis b/src/alloy/frontend/ppc/test/bin/instr_neg.dis
new file mode 100644
index 000000000..b7a5234ed
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_neg.dis
@@ -0,0 +1,17 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_neg.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_neg_1>:
+  100000:	7c 63 00 d0 	neg     r3,r3
+  100004:	4e 80 00 20 	blr
+
+0000000000100008 <test_neg_2>:
+  100008:	7c 63 00 d0 	neg     r3,r3
+  10000c:	4e 80 00 20 	blr
+
+0000000000100010 <test_neg_3>:
+  100010:	7c 63 00 d0 	neg     r3,r3
+  100014:	4e 80 00 20 	blr
diff --git a/src/alloy/frontend/ppc/test/bin/instr_neg.map b/src/alloy/frontend/ppc/test/bin/instr_neg.map
new file mode 100644
index 000000000..b3e4ecf6f
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_neg.map
@@ -0,0 +1,3 @@
+0000000000000000 t test_neg_1
+0000000000000008 t test_neg_2
+0000000000000010 t test_neg_3
diff --git a/src/alloy/frontend/ppc/test/bin/instr_nor.bin b/src/alloy/frontend/ppc/test/bin/instr_nor.bin
new file mode 100644
index 0000000000000000000000000000000000000000..4155f59f99e0af259b3d4fa4e0dce96030a83c1c
GIT binary patch
literal 20
Zcmb<PmiTFrz`)?p#J~Zh8T}d<6aYMt1lj-q

literal 0
HcmV?d00001

diff --git a/src/alloy/frontend/ppc/test/bin/instr_nor.dis b/src/alloy/frontend/ppc/test/bin/instr_nor.dis
new file mode 100644
index 000000000..d1342e34a
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_nor.dis
@@ -0,0 +1,14 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_nor.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_nor_cr_1>:
+  100000:	7c 63 18 f9 	not.    r3,r3
+  100004:	38 60 00 00 	li      r3,0
+  100008:	40 82 00 08 	bne     100010 <.nor_cr_1_ne>
+  10000c:	38 60 00 01 	li      r3,1
+
+0000000000100010 <.nor_cr_1_ne>:
+  100010:	4e 80 00 20 	blr
diff --git a/src/alloy/frontend/ppc/test/bin/instr_nor.map b/src/alloy/frontend/ppc/test/bin/instr_nor.map
new file mode 100644
index 000000000..82e154c02
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/bin/instr_nor.map
@@ -0,0 +1,2 @@
+0000000000000000 t test_nor_cr_1
+0000000000000010 t .nor_cr_1_ne
diff --git a/src/alloy/frontend/ppc/test/instr_neg.s b/src/alloy/frontend/ppc/test/instr_neg.s
new file mode 100644
index 000000000..3007ef6c9
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/instr_neg.s
@@ -0,0 +1,17 @@
+test_neg_1:
+  #_ REGISTER_IN r3 0x0000000080000000
+  neg r3, r3
+  blr
+  #_ REGISTER_OUT r3 0xFFFFFFFF80000000
+
+test_neg_2:
+  #_ REGISTER_IN r3 0x8000000000000000
+  neg r3, r3
+  blr
+  #_ REGISTER_OUT r3 0x8000000000000000
+
+test_neg_3:
+  #_ REGISTER_IN r3 0x0000000000000005
+  neg r3, r3
+  blr
+  #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFB
diff --git a/src/alloy/frontend/ppc/test/instr_nor.s b/src/alloy/frontend/ppc/test/instr_nor.s
new file mode 100644
index 000000000..4caecc32d
--- /dev/null
+++ b/src/alloy/frontend/ppc/test/instr_nor.s
@@ -0,0 +1,9 @@
+test_nor_cr_1:
+  #_ REGISTER_IN r3 0x00000000FFFFFFFF
+  nor. r3, r3, r3
+  li r3, 0
+  bne .nor_cr_1_ne
+  li r3, 1
+  .nor_cr_1_ne:
+  blr
+  #_ REGISTER_OUT r3 1