From 38c85084ff8cecf6425e70a63ddf287a48ed3cd4 Mon Sep 17 00:00:00 2001 From: gibbed Date: Tue, 9 Jun 2015 19:56:26 -0500 Subject: [PATCH] Tests for vsl. --- src/xenia/cpu/frontend/test/instr_vsl.s | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 src/xenia/cpu/frontend/test/instr_vsl.s diff --git a/src/xenia/cpu/frontend/test/instr_vsl.s b/src/xenia/cpu/frontend/test/instr_vsl.s new file mode 100644 index 000000000..b0bf4d03e --- /dev/null +++ b/src/xenia/cpu/frontend/test/instr_vsl.s @@ -0,0 +1,23 @@ +test_vsl_1: + #_ REGISTER_IN v3 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] + #_ REGISTER_IN v4 [04040404, 04040404, 04040404, 04040404] + vsl v3, v3, v4 + blr + #_ REGISTER_OUT v3 [EFEFEFEF, EFEFEFEF, EFEFEFEF, EFEFEFE0] + #_ REGISTER_OUT v4 [04040404, 04040404, 04040404, 04040404] + +test_vsl_2: + #_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF] + #_ REGISTER_IN v4 [04040404, 04040404, 04040404, 04040404] + vsl v3, v3, v4 + blr + #_ REGISTER_OUT v3 [01122334, 45566778, 899AABBC, CDDEEFF0] + #_ REGISTER_OUT v4 [04040404, 04040404, 04040404, 04040404] + +test_vsl_3: + #_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF] + #_ REGISTER_IN v4 [07070707, 07070707, 07070707, 07070707] + vsl v3, v3, v4 + blr + #_ REGISTER_OUT v3 [089119A2, 2AB33BC4, 4CD55DE6, 6EF77F80] + #_ REGISTER_OUT v4 [07070707, 07070707, 07070707, 07070707]