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[GPU] Synchronize GPU frontend with the D3D12 branch

This commit is contained in:
Triang3l 2018-10-22 23:28:52 +03:00
parent 1ae9b8263d
commit 2b03a9e095
11 changed files with 129 additions and 56 deletions
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28
src/xenia/gpu/command_processor.cc
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@ -49,6 +49,24 @@ bool CommandProcessor::Initialize(
std::unique_ptr<xe::ui::GraphicsContext> context) {
context_ = std::move(context);
// Initialize the gamma ramps to their default (linear) values - taken from
// what games set when starting.
for (uint32_t i = 0; i < 256; ++i) {
uint32_t value = i * 1023 / 255;
gamma_ramp_.normal[i].value = value | (value << 10) | (value << 20);
}
for (uint32_t i = 0; i < 128; ++i) {
uint32_t value = (i * 65535 / 127) & ~63;
if (i < 127) {
value |= 0x200 << 16;
}
for (uint32_t j = 0; j < 3; ++j) {
gamma_ramp_.pwl[i].values[j].value = value;
}
}
dirty_gamma_ramp_normal_ = true;
dirty_gamma_ramp_pwl_ = true;
worker_running_ = true;
worker_thread_ = kernel::object_ref<kernel::XHostThread>(
new kernel::XHostThread(kernel_state_, 128 * 1024, 0, [this]() {
@ -301,25 +319,23 @@ void CommandProcessor::UpdateGammaRampValue(GammaRampType type,
assert_true(mask_lo == 0 || mask_lo == 7);
assert_true(mask_hi == 0);
auto subindex = gamma_ramp_rw_subindex_;
if (mask_lo) {
switch (type) {
case GammaRampType::kNormal:
assert_true(regs->values[XE_GPU_REG_DC_LUT_RW_MODE].u32 == 0);
gamma_ramp_.normal[index].value = value;
dirty_gamma_ramp_normal_ = true;
break;
case GammaRampType::kPWL:
assert_true(regs->values[XE_GPU_REG_DC_LUT_RW_MODE].u32 == 1);
gamma_ramp_.pwl[index].values[subindex].value = value;
gamma_ramp_.pwl[index].values[gamma_ramp_rw_subindex_].value = value;
gamma_ramp_rw_subindex_ = (gamma_ramp_rw_subindex_ + 1) % 3;
dirty_gamma_ramp_pwl_ = true;
break;
default:
assert_unhandled_case(type);
}
}
gamma_ramp_rw_subindex_ = (subindex + 1) % 3;
dirty_gamma_ramp_ = true;
}
void CommandProcessor::MakeCoherent() {

5
src/xenia/gpu/command_processor.h
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@ -99,7 +99,7 @@ struct GammaRamp {
};
NormalEntry normal[256];
PWLEntry pwl[256];
PWLEntry pwl[128];
};
class CommandProcessor {
@ -286,7 +286,8 @@ class CommandProcessor {
GammaRamp gamma_ramp_ = {};
int gamma_ramp_rw_subindex_ = 0;
bool dirty_gamma_ramp_ = true;
bool dirty_gamma_ramp_normal_ = true;
bool dirty_gamma_ramp_pwl_ = true;
};
} // namespace gpu

2
src/xenia/gpu/registers.h
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@ -253,7 +253,7 @@ union RB_DEPTH_INFO {
union RB_COPY_CONTROL {
xe::bf<uint32_t, 0, 3> copy_src_select;
xe::bf<uint32_t, 4, 3> copy_sample_select;
xe::bf<xenos::CopySampleSelect, 4, 3> copy_sample_select;
xe::bf<uint32_t, 8, 1> color_clear_enable;
xe::bf<uint32_t, 9, 1> depth_clear_enable;

1
src/xenia/gpu/shader.h
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@ -421,6 +421,7 @@ struct ParsedTextureFetchInstruction {
bool use_computed_lod = true;
bool use_register_lod = false;
bool use_register_gradients = false;
float lod_bias = 0.0f;
float offset_x = 0.0f;
float offset_y = 0.0f;
float offset_z = 0.0f;

1
src/xenia/gpu/shader_translator.cc
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@ -911,6 +911,7 @@ void ShaderTranslator::ParseTextureFetchInstruction(
i.attributes.use_computed_lod = op.use_computed_lod();
i.attributes.use_register_lod = op.use_register_lod();
i.attributes.use_register_gradients = op.use_register_gradients();
i.attributes.lod_bias = op.lod_bias();
i.attributes.offset_x = op.offset_x();
i.attributes.offset_y = op.offset_y();
i.attributes.offset_z = op.offset_z();

3
src/xenia/gpu/shader_translator_disasm.cc
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@ -432,6 +432,9 @@ void ParsedTextureFetchInstruction::Disassemble(StringBuffer* out) const {
if (attributes.use_register_gradients) {
out->Append(", UseRegisterGradients=true");
}
if (attributes.lod_bias != 0.0f) {
out->AppendFormat(", LODBias=%g", attributes.lod_bias);
}
int component_count = GetTextureDimensionComponentCount(dimension);
if (attributes.offset_x != 0.0f) {
out->AppendFormat(", OffsetX=%g", attributes.offset_x);

37
src/xenia/gpu/texture_info.h
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@ -19,8 +19,8 @@
namespace xe {
namespace gpu {
// a2xx_sq_surfaceformat + D3D::GetGpuFormatFromEDRAMColorFormat::formatMap and
// FMT_ string table from game executables.
// a2xx_sq_surfaceformat +
// https://github.com/indirivacua/RAGE-Console-Texture-Editor/blob/master/Console.Xbox360.Graphics.pas
enum class TextureFormat : uint32_t {
k_1_REVERSE = 0,
k_1 = 1,
@ -33,9 +33,9 @@ enum class TextureFormat : uint32_t {
k_8_A = 8,
k_8_B = 9,
k_8_8 = 10,
k_Cr_Y1_Cb_Y0 = 11,
k_Y1_Cr_Y0_Cb = 12,
k_Shadow = 13,
k_Cr_Y1_Cb_Y0_REP = 11,
k_Y1_Cr_Y0_Cb_REP = 12,
k_16_16_EDRAM = 13,
k_8_8_8_8_A = 14,
k_4_4_4_4 = 15,
k_10_11_11 = 16,
@ -43,7 +43,7 @@ enum class TextureFormat : uint32_t {
k_DXT1 = 18,
k_DXT2_3 = 19,
k_DXT4_5 = 20,
k_DXV = 21,
k_16_16_16_16_EDRAM = 21,
k_24_8 = 22,
k_24_8_FLOAT = 23,
k_16 = 24,
@ -84,8 +84,8 @@ enum class TextureFormat : uint32_t {
k_DXT5A = 59,
k_CTX1 = 60,
k_DXT3A_AS_1_1_1_1 = 61,
k_8_8_8_8_GAMMA = 62,
k_2_10_10_10_FLOAT = 63,
k_8_8_8_8_GAMMA_EDRAM = 62,
k_2_10_10_10_FLOAT_EDRAM = 63,
kUnknown = 0xFFFFFFFFu,
};
@ -113,7 +113,7 @@ inline TextureFormat GetBaseFormat(TextureFormat texture_format) {
return TextureFormat::k_10_11_11;
case TextureFormat::k_11_11_10_AS_16_16_16_16:
return TextureFormat::k_11_11_10;
case TextureFormat::k_8_8_8_8_GAMMA:
case TextureFormat::k_8_8_8_8_GAMMA_EDRAM:
return TextureFormat::k_8_8_8_8;
default:
break;
@ -175,8 +175,8 @@ inline bool IsSRGBCapable(TextureFormat format) {
case TextureFormat::k_6_5_5:
case TextureFormat::k_8_8_8_8:
case TextureFormat::k_8_8:
case TextureFormat::k_Cr_Y1_Cb_Y0:
case TextureFormat::k_Y1_Cr_Y0_Cb:
case TextureFormat::k_Cr_Y1_Cb_Y0_REP:
case TextureFormat::k_Y1_Cr_Y0_Cb_REP:
case TextureFormat::k_4_4_4_4:
case TextureFormat::k_DXT1:
case TextureFormat::k_DXT2_3:
@ -212,7 +212,6 @@ inline bool IsSRGBCapable(TextureFormat format) {
case TextureFormat::k_2_10_10_10_AS_16_16_16_16:
case TextureFormat::k_10_11_11_AS_16_16_16_16:
case TextureFormat::k_11_11_10_AS_16_16_16_16:
case TextureFormat::k_8_8_8_8_GAMMA:
return true;
default:
return false;
@ -229,19 +228,15 @@ inline TextureFormat ColorRenderTargetToTextureFormat(
case ColorRenderTargetFormat::k_8_8_8_8:
return TextureFormat::k_8_8_8_8;
case ColorRenderTargetFormat::k_8_8_8_8_GAMMA:
return TextureFormat::k_8_8_8_8_GAMMA;
return TextureFormat::k_8_8_8_8_GAMMA_EDRAM;
case ColorRenderTargetFormat::k_2_10_10_10:
return TextureFormat::k_2_10_10_10;
case ColorRenderTargetFormat::k_2_10_10_10_FLOAT:
return TextureFormat::k_2_10_10_10_FLOAT;
return TextureFormat::k_2_10_10_10_FLOAT_EDRAM;
case ColorRenderTargetFormat::k_16_16:
// TODO(Triang3l): Check if this needs to be k_Shadow according to
// GetGpuFormatFromEDRAMColorFormat.
return TextureFormat::k_16_16;
return TextureFormat::k_16_16_EDRAM;
case ColorRenderTargetFormat::k_16_16_16_16:
// TODO(Triang3l): Check if this needs to be k_DXV according to
// GetGpuFormatFromEDRAMColorFormat.
return TextureFormat::k_16_16_16_16;
return TextureFormat::k_16_16_16_16_EDRAM;
case ColorRenderTargetFormat::k_16_16_FLOAT:
return TextureFormat::k_16_16_FLOAT;
case ColorRenderTargetFormat::k_16_16_16_16_FLOAT:
@ -249,7 +244,7 @@ inline TextureFormat ColorRenderTargetToTextureFormat(
case ColorRenderTargetFormat::k_2_10_10_10_AS_16_16_16_16:
return TextureFormat::k_2_10_10_10_AS_16_16_16_16;
case ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16:
return TextureFormat::k_2_10_10_10_FLOAT;
return TextureFormat::k_2_10_10_10_FLOAT_EDRAM;
case ColorRenderTargetFormat::k_32_FLOAT:
return TextureFormat::k_32_FLOAT;
case ColorRenderTargetFormat::k_32_32_FLOAT:

12
src/xenia/gpu/texture_info_formats.cc
View File

@ -31,9 +31,9 @@ const FormatInfo* FormatInfo::Get(uint32_t gpu_format) {
FORMAT_INFO(k_8_A , kUncompressed, 1, 1, 8),
FORMAT_INFO(k_8_B , kUncompressed, 1, 1, 8),
FORMAT_INFO(k_8_8 , kUncompressed, 1, 1, 16),
FORMAT_INFO(k_Cr_Y1_Cb_Y0 , kCompressed , 2, 1, 16),
FORMAT_INFO(k_Y1_Cr_Y0_Cb , kCompressed , 2, 1, 16),
FORMAT_INFO(k_Shadow , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_Cr_Y1_Cb_Y0_REP , kCompressed , 2, 1, 16),
FORMAT_INFO(k_Y1_Cr_Y0_Cb_REP , kCompressed , 2, 1, 16),
FORMAT_INFO(k_16_16_EDRAM , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_8_8_8_8_A , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_4_4_4_4 , kUncompressed, 1, 1, 16),
FORMAT_INFO(k_10_11_11 , kUncompressed, 1, 1, 32),
@ -41,7 +41,7 @@ const FormatInfo* FormatInfo::Get(uint32_t gpu_format) {
FORMAT_INFO(k_DXT1 , kCompressed , 4, 4, 4),
FORMAT_INFO(k_DXT2_3 , kCompressed , 4, 4, 8),
FORMAT_INFO(k_DXT4_5 , kCompressed , 4, 4, 8),
FORMAT_INFO(k_DXV , kUncompressed, 1, 1, 64),
FORMAT_INFO(k_16_16_16_16_EDRAM , kUncompressed, 1, 1, 64),
FORMAT_INFO(k_24_8 , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_24_8_FLOAT , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_16 , kUncompressed, 1, 1, 16),
@ -82,8 +82,8 @@ const FormatInfo* FormatInfo::Get(uint32_t gpu_format) {
FORMAT_INFO(k_DXT5A , kCompressed , 4, 4, 4),
FORMAT_INFO(k_CTX1 , kCompressed , 4, 4, 4),
FORMAT_INFO(k_DXT3A_AS_1_1_1_1 , kCompressed , 4, 4, 4),
FORMAT_INFO(k_8_8_8_8_GAMMA , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_2_10_10_10_FLOAT , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_8_8_8_8_GAMMA_EDRAM , kUncompressed, 1, 1, 32),
FORMAT_INFO(k_2_10_10_10_FLOAT_EDRAM , kUncompressed, 1, 1, 32),
};
return &format_infos[gpu_format];
}

16
src/xenia/gpu/ucode.h
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@ -640,6 +640,10 @@ struct TextureFetchInstruction {
SampleLocation sample_location() const {
return static_cast<SampleLocation>(data_.sample_location);
}
float lod_bias() const {
// http://web.archive.org/web/20090514012026/http://msdn.microsoft.com:80/en-us/library/bb313957.aspx
return ((static_cast<int>(data_.lod_bias) << 25) >> 25) / 16.0f;
}
float offset_x() const {
return ((static_cast<int>(data_.offset_x) << 27) >> 27) / 2.0f;
}
@ -1009,17 +1013,17 @@ enum class AluScalarOpcode {
// dest.xyzw = sqrt(src0.a);
kSqrt = 40,
// mulsc dest, src0.a, src0.b
// mulsc dest, src0.a, src1.a
kMulsc0 = 42,
// mulsc dest, src0.a, src0.b
// mulsc dest, src0.a, src1.a
kMulsc1 = 43,
// addsc dest, src0.a, src0.b
// addsc dest, src0.a, src1.a
kAddsc0 = 44,
// addsc dest, src0.a, src0.b
// addsc dest, src0.a, src1.a
kAddsc1 = 45,
// subsc dest, src0.a, src0.b
// subsc dest, src0.a, src1.a
kSubsc0 = 46,
// subsc dest, src0.a, src0.b
// subsc dest, src0.a, src1.a
kSubsc1 = 47,
// Scalar Sin

18
src/xenia/gpu/vulkan/texture_config.cc
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@ -54,9 +54,9 @@ const TextureConfig texture_configs[64] = {
/* k_8_A */ ___(R8_UNORM),
/* k_8_B */ ___(UNDEFINED),
/* k_8_8 */ ___(R8G8_UNORM),
/* k_Cr_Y1_Cb_Y0 */ ___(UNDEFINED),
/* k_Y1_Cr_Y0_Cb */ ___(UNDEFINED),
/* k_Shadow */ ___(UNDEFINED),
/* k_Cr_Y1_Cb_Y0_REP */ ___(UNDEFINED),
/* k_Y1_Cr_Y0_Cb_REP */ ___(UNDEFINED),
/* k_16_16_EDRAM */ ___(UNDEFINED),
/* k_8_8_8_8_A */ ___(UNDEFINED),
/* k_4_4_4_4 */ __v(R4G4B4A4_UNORM_PACK16, YXWZ),
// TODO: Verify if these two are correct (I think not).
@ -66,7 +66,7 @@ const TextureConfig texture_configs[64] = {
/* k_DXT1 */ ___(BC1_RGBA_UNORM_BLOCK),
/* k_DXT2_3 */ ___(BC2_UNORM_BLOCK),
/* k_DXT4_5 */ ___(BC3_UNORM_BLOCK),
/* k_DXV */ ___(UNDEFINED),
/* k_16_16_16_16_EDRAM */ ___(UNDEFINED),
// TODO: D24 unsupported on AMD.
/* k_24_8 */ ___(D24_UNORM_S8_UINT),
@ -74,9 +74,9 @@ const TextureConfig texture_configs[64] = {
/* k_16 */ ___(R16_UNORM),
/* k_16_16 */ ___(R16G16_UNORM),
/* k_16_16_16_16 */ ___(R16G16B16A16_UNORM),
/* k_16_EXPAND */ ___(R16_UNORM),
/* k_16_16_EXPAND */ ___(R16G16_UNORM),
/* k_16_16_16_16_EXPAND */ ___(R16G16B16A16_UNORM),
/* k_16_EXPAND */ ___(R16_SFLOAT),
/* k_16_16_EXPAND */ ___(R16G16_SFLOAT),
/* k_16_16_16_16_EXPAND */ ___(R16G16B16A16_SFLOAT),
/* k_16_FLOAT */ ___(R16_SFLOAT),
/* k_16_16_FLOAT */ ___(R16G16_SFLOAT),
/* k_16_16_16_16_FLOAT */ ___(R16G16B16A16_SFLOAT),
@ -121,8 +121,8 @@ const TextureConfig texture_configs[64] = {
/* k_DXT3A_AS_1_1_1_1 */ ___(UNDEFINED),
/* k_8_8_8_8_GAMMA */ ___(R8G8B8A8_UNORM),
/* k_2_10_10_10_FLOAT */ ___(UNDEFINED),
/* k_8_8_8_8_GAMMA_EDRAM */ ___(UNDEFINED),
/* k_2_10_10_10_FLOAT_EDRAM */ ___(UNDEFINED),
};
#undef _cv

62
src/xenia/gpu/xenos.h
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@ -153,11 +153,18 @@ enum class MsaaSamples : uint32_t {
};
enum class ColorRenderTargetFormat : uint32_t {
k_8_8_8_8 = 0, // D3DFMT_A8R8G8B8 (or ABGR?)
k_8_8_8_8_GAMMA = 1, // D3DFMT_A8R8G8B8 with gamma correction
// D3DFMT_A8R8G8B8 (or ABGR?).
k_8_8_8_8 = 0,
// D3DFMT_A8R8G8B8 with gamma correction.
k_8_8_8_8_GAMMA = 1,
k_2_10_10_10 = 2,
// 7e3 [0, 32) RGB, unorm alpha.
// http://fileadmin.cs.lth.se/cs/Personal/Michael_Doggett/talks/eg05-xenos-doggett.pdf
k_2_10_10_10_FLOAT = 3,
// Fixed point -32...32.
// http://www.students.science.uu.nl/~3220516/advancedgraphics/papers/inferred_lighting.pdf
k_16_16 = 4,
// Fixed point -32...32.
k_16_16_16_16 = 5,
k_16_16_FLOAT = 6,
k_16_16_16_16_FLOAT = 7,
@ -169,10 +176,11 @@ enum class ColorRenderTargetFormat : uint32_t {
enum class DepthRenderTargetFormat : uint32_t {
kD24S8 = 0,
// 20e4 [0, 2).
kD24FS8 = 1,
};
// Subset of a2xx_sq_surfaceformat.
// Subset of a2xx_sq_surfaceformat - formats that RTs can be resolved to.
enum class ColorFormat : uint32_t {
k_8 = 2,
k_1_5_5_5 = 3,
@ -196,9 +204,10 @@ enum class ColorFormat : uint32_t {
k_32_FLOAT = 36,
k_32_32_FLOAT = 37,
k_32_32_32_32_FLOAT = 38,
k_8_8_8_8_AS_16_16_16_16 = 50,
k_2_10_10_10_AS_16_16_16_16 = 54,
k_8_8_8_8_GAMMA = 62,
k_2_10_10_10_FLOAT = 63,
k_10_11_11_AS_16_16_16_16 = 55,
k_11_11_10_AS_16_16_16_16 = 56,
};
enum class VertexFormat : uint32_t {
@ -274,6 +283,38 @@ inline int GetVertexFormatSizeInWords(VertexFormat format) {
}
}
// adreno_rb_blend_factor
enum class BlendFactor : uint32_t {
kZero = 0,
kOne = 1,
kSrcColor = 4,
kOneMinusSrcColor = 5,
kSrcAlpha = 6,
kOneMinusSrcAlpha = 7,
kDstColor = 8,
kOneMinusDstColor = 9,
kDstAlpha = 10,
kOneMinusDstAlpha = 11,
kConstantColor = 12,
kOneMinusConstantColor = 13,
kConstantAlpha = 14,
kOneMinusConstantAlpha = 15,
kSrcAlphaSaturate = 16,
// SRC1 likely not used on the Xbox 360 - only available in Direct3D 9Ex.
kSrc1Color = 20,
kOneMinusSrc1Color = 21,
kSrc1Alpha = 22,
kOneMinusSrc1Alpha = 23,
};
enum class BlendOp : uint32_t {
kAdd = 0,
kSubtract = 1,
kMin = 2,
kMax = 3,
kRevSubtract = 4,
};
namespace xenos {
typedef enum {
@ -297,6 +338,17 @@ enum class CopyCommand : uint32_t {
kNull = 3, // ?
};
// a2xx_rb_copy_sample_select
enum class CopySampleSelect : uint32_t {
k0,
k1,
k2,
k3,
k01,
k23,
k0123,
};
#define XE_GPU_MAKE_SWIZZLE(x, y, z, w) \
(((XE_GPU_SWIZZLE_##x) << 0) | ((XE_GPU_SWIZZLE_##y) << 3) | \
((XE_GPU_SWIZZLE_##z) << 6) | ((XE_GPU_SWIZZLE_##w) << 9))