From 2a908eb86de6dea40828e0e43560adc9dd97db6f Mon Sep 17 00:00:00 2001 From: DrChat Date: Tue, 20 Feb 2018 16:25:37 -0600 Subject: [PATCH] [SPIR-V] Handle 32-bit normalized unsigned formats --- src/xenia/gpu/spirv_shader_translator.cc | 27 +++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/src/xenia/gpu/spirv_shader_translator.cc b/src/xenia/gpu/spirv_shader_translator.cc index eb1a469ab..240a72bde 100644 --- a/src/xenia/gpu/spirv_shader_translator.cc +++ b/src/xenia/gpu/spirv_shader_translator.cc @@ -1395,7 +1395,14 @@ void SpirvShaderTranslator::ProcessVertexFetchInstruction( vertex_data); } } else { - // TODO(DrChat) + if (instr.attributes.is_signed) { + // TODO(DrChat): This is gonna be harder to convert. There's not + // enough precision in a float to shove INT_MAX into it. + assert_always(); + components[i] = b.makeFloatConstant(0.f); + } else { + components[i] = ConvertNormVar(vertex_data, uint_type_, 32, false); + } } } @@ -1423,7 +1430,14 @@ void SpirvShaderTranslator::ProcessVertexFetchInstruction( vertex_data); } } else { - // TODO(DrChat) + if (instr.attributes.is_signed) { + // TODO(DrChat): This is gonna be harder to convert. There's not + // enough precision in a float to shove INT_MAX into it. + assert_always(); + components[i] = b.makeFloatConstant(0.f); + } else { + components[i] = ConvertNormVar(vertex_data, uint_type_, 32, false); + } } } @@ -1451,7 +1465,14 @@ void SpirvShaderTranslator::ProcessVertexFetchInstruction( vertex_data); } } else { - // TODO(DrChat) + if (instr.attributes.is_signed) { + // TODO(DrChat): This is gonna be harder to convert. There's not + // enough precision in a float to shove INT_MAX into it. + assert_always(); + components[i] = b.makeFloatConstant(0.f); + } else { + components[i] = ConvertNormVar(vertex_data, uint_type_, 32, false); + } } }