Whoops - my arbitrarily picked GPU command # collided -_-
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@ -836,6 +836,9 @@ bool CommandProcessor::ExecutePacketType3(RingbufferReader* reader,
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case PM4_SET_CONSTANT:
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result = ExecutePacketType3_SET_CONSTANT(reader, packet, count);
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break;
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case PM4_SET_CONSTANT2:
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result = ExecutePacketType3_SET_CONSTANT2(reader, packet, count);
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break;
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case PM4_LOAD_ALU_CONSTANT:
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result = ExecutePacketType3_LOAD_ALU_CONSTANT(reader, packet, count);
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break;
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@ -1198,12 +1201,12 @@ bool CommandProcessor::ExecutePacketType3_EVENT_WRITE_EXT(
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address &= ~0x3;
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// Let us hope we can fake this.
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uint16_t extents[] = {
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0 / 8, // min x
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2560 / 8, // max x
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0 / 8, // min y
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2560 / 8, // max y
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0 >> 3, // min x
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2560 >> 3, // max x
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0 >> 3, // min y
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2560 >> 3, // max y
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0, // min z
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0, // max z
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1, // max z
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};
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assert_true(endianness == xenos::Endian::k8in16);
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poly::copy_and_swap_16_aligned(
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@ -1324,6 +1327,17 @@ bool CommandProcessor::ExecutePacketType3_SET_CONSTANT(RingbufferReader* reader,
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return true;
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}
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bool CommandProcessor::ExecutePacketType3_SET_CONSTANT2(
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RingbufferReader* reader, uint32_t packet, uint32_t count) {
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uint32_t offset_type = reader->Read();
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uint32_t index = offset_type & 0xFFFF;
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for (uint32_t n = 0; n < count - 1; n++, index++) {
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uint32_t data = reader->Read();
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WriteRegister(index, data);
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}
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return true;
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}
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bool CommandProcessor::ExecutePacketType3_LOAD_ALU_CONSTANT(
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RingbufferReader* reader, uint32_t packet, uint32_t count) {
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// load constants from memory
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@ -171,6 +171,8 @@ class CommandProcessor {
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uint32_t count);
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bool ExecutePacketType3_SET_CONSTANT(RingbufferReader* reader,
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uint32_t packet, uint32_t count);
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bool ExecutePacketType3_SET_CONSTANT2(RingbufferReader* reader,
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uint32_t packet, uint32_t count);
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bool ExecutePacketType3_LOAD_ALU_CONSTANT(RingbufferReader* reader,
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uint32_t packet, uint32_t count);
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bool ExecutePacketType3_SET_SHADER_CONSTANTS(RingbufferReader* reader,
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@ -326,6 +326,20 @@ bool DisasmPacketType3(const uint8_t* base_ptr, uint32_t packet,
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}
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break;
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}
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case PM4_SET_CONSTANT2: {
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static const PacketTypeInfo op_info = {PacketCategory::kGeneric,
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"PM4_SET_CONSTANT2"};
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out_info->type_info = &op_info;
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uint32_t offset_type = poly::load_and_swap<uint32_t>(ptr + 0);
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uint32_t index = offset_type & 0xFFFF;
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for (uint32_t n = 0; n < count - 1; n++, index++) {
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uint32_t data = poly::load_and_swap<uint32_t>(ptr + 4 + n * 4);
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out_info->actions.emplace_back(
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PacketAction::RegisterWrite(index, data));
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}
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return true;
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break;
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}
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case PM4_LOAD_ALU_CONSTANT: {
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// load constants from memory
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static const PacketTypeInfo op_info = {PacketCategory::kGeneric,
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@ -404,6 +404,7 @@ enum Type3Opcode {
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PM4_VIZ_QUERY = 0x23, // begin/end initiator for viz query extent processing
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PM4_SET_STATE = 0x25, // fetch state sub-blocks and initiate shader code DMAs
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PM4_SET_CONSTANT = 0x2d, // load constant into chip and to memory
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PM4_SET_CONSTANT2 = 0x55,
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PM4_LOAD_ALU_CONSTANT = 0x2f, // load constants from memory
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PM4_SET_SHADER_CONSTANTS = 0x56, // ?? constant values
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PM4_IM_LOAD = 0x27, // load sequencer instruction memory (pointer-based)
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@ -419,7 +420,7 @@ enum Type3Opcode {
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PM4_CONTEXT_UPDATE = 0x5e, // updates the current context, if needed
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PM4_INTERRUPT = 0x54, // generate interrupt from the command stream
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PM4_XE_SWAP = 0x55, // Xenia only: VdSwap uses this to trigger a swap.
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PM4_XE_SWAP = 0x64, // Xenia only: VdSwap uses this to trigger a swap.
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PM4_IM_STORE = 0x2c, // copy sequencer instruction memory to system memory
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@ -396,7 +396,7 @@ SHIM_CALL VdSwap_shim(PPCContext* ppc_state, KernelState* state) {
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// use this method.
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memset(SHIM_MEM_ADDR(unk0), 0, 64 * 4);
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auto dwords = reinterpret_cast<uint32_t*>(SHIM_MEM_ADDR(unk0));
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dwords[0] = poly::byte_swap((0x03 << 30) | ((63 - 1) << 16) |
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dwords[0] = poly::byte_swap((0x3 << 30) | ((63 - 1) << 16) |
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(xe::gpu::xenos::PM4_XE_SWAP << 8));
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dwords[1] = poly::byte_swap(frontbuffer);
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