Tweaking GPU callbacks.
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@ -512,7 +512,7 @@ uint32_t CommandProcessor::ExecutePacket(PacketArgs& args) {
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uint32_t value = READ_PTR();
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// Writeback initiator.
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WriteRegister(packet_ptr, XE_GPU_REG_VGT_EVENT_INITIATOR,
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initiator & 0x1F);
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initiator & 0x3F);
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uint32_t data_value;
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if ((initiator >> 31) & 0x1) {
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// Write counter (GPU vblank counter?).
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@ -192,6 +192,9 @@ void GraphicsSystem::DispatchInterruptCallback(
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cpu = 2;
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}
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XELOGGPU("Dispatching GPU interrupt at %.8X w/ mode %d on cpu %d",
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interrupt_callback_, source, cpu);
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// NOTE: we may be executing in some random thread.
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if (!interrupt_callback_) {
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return;
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@ -18,12 +18,12 @@
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XE_GPU_REGISTER(0x01DD, dword, SCRATCH_ADDR)
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XE_GPU_REGISTER(0x01DC, dword, SCRATCH_UMSK)
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XE_GPU_REGISTER(0x0578, dword, SCRATCH_REG0)
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XE_GPU_REGISTER(0x0579, dword, SCRATCH_REG1)
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XE_GPU_REGISTER(0x0578, dword, SCRATCH_REG0) // interrupt sync
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XE_GPU_REGISTER(0x0579, dword, SCRATCH_REG1) // present interval
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XE_GPU_REGISTER(0x057A, dword, SCRATCH_REG2)
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XE_GPU_REGISTER(0x057B, dword, SCRATCH_REG3)
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XE_GPU_REGISTER(0x057C, dword, SCRATCH_REG4)
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XE_GPU_REGISTER(0x057D, dword, SCRATCH_REG5)
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XE_GPU_REGISTER(0x057C, dword, CALLBACK_ADDRESS)
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XE_GPU_REGISTER(0x057D, dword, CALLBACK_CONTEXT)
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XE_GPU_REGISTER(0x057E, dword, SCRATCH_REG6)
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XE_GPU_REGISTER(0x057F, dword, SCRATCH_REG7)
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@ -1177,6 +1177,8 @@ SHIM_CALL KeInsertQueueDpc_shim(PPCContext* ppc_state, KernelState* state) {
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uint32_t arg1 = SHIM_GET_ARG_32(1);
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uint32_t arg2 = SHIM_GET_ARG_32(2);
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assert_always("DPC does not dispatch yet; going to hang!");
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XELOGD("KeInsertQueueDpc(%.8X, %.8X, %.8X)", dpc_ptr, arg1, arg2);
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uint32_t list_entry_ptr = dpc_ptr + 4;
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