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Merge pull request #148 from chrisps/canary_experimental 

Do not check if we should show the prefetchw error message if we alre…
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chrisps 2023-04-02 17:37:05 -04:00 committed by GitHub
parent e9d1e51c32 22dd2e52e6
commit 190cef9872
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 18 additions and 8 deletions
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4
src/xenia/base/main_init_win.cc
View File

@ -25,6 +25,8 @@ class StartupCpuFeatureCheck {
"the " "the "
"FAQ for system requirements at https://xenia.jp"; "FAQ for system requirements at https://xenia.jp";
} }
#if 0
if (!error_message) {
unsigned int data[4]; unsigned int data[4];
Xbyak::util::Cpu::getCpuid(0x80000001, data); Xbyak::util::Cpu::getCpuid(0x80000001, data);
if (!(data[2] & (1U << 8))) { if (!(data[2] & (1U << 8))) {
@ -32,6 +34,8 @@ class StartupCpuFeatureCheck {
"Your cpu does not support PrefetchW, which Xenia Canary " "Your cpu does not support PrefetchW, which Xenia Canary "
"requires."; "requires.";
} }
}
#endif
if (error_message == nullptr) { if (error_message == nullptr) {
return; return;
} else { } else {

10
src/xenia/cpu/ppc/ppc_emit_control.cc
View File

@ -807,8 +807,14 @@ int InstrEmit_mtmsr(PPCHIRBuilder& f, const InstrData& i) {
int InstrEmit_mtmsrd(PPCHIRBuilder& f, const InstrData& i) { int InstrEmit_mtmsrd(PPCHIRBuilder& f, const InstrData& i) {
//todo: this is moving msr under a mask, so only writing EE and RI //todo: this is moving msr under a mask, so only writing EE and RI
f.StoreContext(offsetof(PPCContext, scratch),
f.ZeroExtend(f.LoadGPR(i.X.RT), INT64_TYPE)); Value* from = f.LoadGPR(i.X.RT);
Value* mtmsrd_mask = f.LoadConstantUint64((1ULL << 15));
Value* msr = f.LoadContext(offsetof(PPCContext, msr), INT64_TYPE);
Value* new_msr = f.Or(f.And(from, mtmsrd_mask), f.AndNot(msr, mtmsrd_mask));
f.StoreContext(offsetof(PPCContext, msr), new_msr);
return 0; return 0;
} }