Microcode disassembler skeleton.
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651954ccae
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17be429244
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@ -58,7 +58,7 @@ public:
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XE_GPU_SHADER_TYPE type,
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uint32_t address,
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uint32_t start,
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uint32_t size_dwords) = 0;
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uint32_t length) = 0;
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virtual void DrawIndexed(
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XE_GPU_PRIMITIVE_TYPE prim_type,
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uint32_t index_count) = 0;
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@ -10,11 +10,13 @@
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#include <xenia/gpu/nop/nop_graphics_driver.h>
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#include <xenia/gpu/gpu-private.h>
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#include <xenia/gpu/ucode/ucode_disassembler.h>
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using namespace xe;
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using namespace xe::gpu;
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using namespace xe::gpu::nop;
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using namespace xe::gpu::ucode;
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NopGraphicsDriver::NopGraphicsDriver(xe_memory_ref memory) :
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@ -44,9 +46,20 @@ void NopGraphicsDriver::SetShader(
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XE_GPU_SHADER_TYPE type,
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uint32_t address,
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uint32_t start,
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uint32_t size_dwords) {
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uint32_t length) {
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XELOGGPU("NOP: set shader %d at %0.8X (%db)",
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type, address, size_dwords * 4);
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type, address, length);
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uint8_t* p = xe_memory_addr(memory_, address);
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uint32_t dw0 = XEGETUINT32BE(p + 0);
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uint32_t* dws = (uint32_t*)xe_malloc(length);
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for (int n = 0; n < length; n += 4) {
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dws[n / 4] = XEGETUINT32BE(p + n);
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}
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UcodeDisassembler disasm;
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//
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}
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void NopGraphicsDriver::DrawIndexed(
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@ -54,4 +67,4 @@ void NopGraphicsDriver::DrawIndexed(
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uint32_t index_count) {
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XELOGGPU("NOP: draw indexed %d (%d indicies)",
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prim_type, index_count);
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}
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}
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@ -34,7 +34,7 @@ public:
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XE_GPU_SHADER_TYPE type,
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uint32_t address,
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uint32_t start,
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uint32_t size_dwords);
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uint32_t length);
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virtual void DrawIndexed(
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XE_GPU_PRIMITIVE_TYPE prim_type,
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uint32_t index_count);
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@ -300,7 +300,7 @@ void RingBufferWorker::ExecuteSegment(uint32_t ptr, uint32_t length) {
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(XE_GPU_SHADER_TYPE)type,
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TRANSLATE_ADDR(addr),
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start,
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size);
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size * 4);
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}
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break;
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case PM4_IM_LOAD_IMMEDIATE:
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@ -317,7 +317,7 @@ void RingBufferWorker::ExecuteSegment(uint32_t ptr, uint32_t length) {
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(XE_GPU_SHADER_TYPE)type,
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ptr + n * 4 + 3 * 4,
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start,
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size);
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size * 4);
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}
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break;
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@ -15,6 +15,7 @@
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'includes': [
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'nop/sources.gypi',
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'ucode/sources.gypi',
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'xenos/sources.gypi',
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],
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@ -0,0 +1,11 @@
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# Copyright 2013 Ben Vanik. All Rights Reserved.
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{
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'sources': [
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'ucode.cc',
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'ucode.h',
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'ucode_disassembler.cc',
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'ucode_disassembler.h',
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'ucode_ops.cc',
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'ucode_ops.h',
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],
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}
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@ -0,0 +1,15 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#include <xenia/gpu/ucode/ucode.h>
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using namespace xe;
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using namespace xe::gpu;
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using namespace xe::gpu::ucode;
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@ -0,0 +1,28 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_GPU_UCODE_UCODE_H_
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#define XENIA_GPU_UCODE_UCODE_H_
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#include <xenia/core.h>
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namespace xe {
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namespace gpu {
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namespace ucode {
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} // namespace ucode
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} // namespace gpu
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} // namespace xe
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#endif // XENIA_GPU_UCODE_UCODE_H_
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@ -0,0 +1,22 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#include <xenia/gpu/ucode/ucode_disassembler.h>
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using namespace xe;
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using namespace xe::gpu;
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using namespace xe::gpu::ucode;
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UcodeDisassembler::UcodeDisassembler() {
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}
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UcodeDisassembler::~UcodeDisassembler() {
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}
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@ -0,0 +1,37 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_GPU_UCODE_UCODE_DISASSEMBLER_H_
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#define XENIA_GPU_UCODE_UCODE_DISASSEMBLER_H_
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#include <xenia/core.h>
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#include <xenia/gpu/ucode/ucode.h>
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namespace xe {
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namespace gpu {
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namespace ucode {
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class UcodeDisassembler {
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public:
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UcodeDisassembler();
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~UcodeDisassembler();
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private:
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};
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} // namespace ucode
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} // namespace gpu
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} // namespace xe
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#endif // XENIA_GPU_UCODE_UCODE_DISASSEMBLER_H_
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,77 @@
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/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_GPU_UCODE_UCODE_OPS_H_
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#define XENIA_GPU_UCODE_UCODE_OPS_H_
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#include <xenia/core.h>
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#include <xenia/gpu/ucode/ucode.h>
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namespace xe {
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namespace gpu {
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namespace ucode {
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// This code comes from libxemit by GliGli.
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typedef enum {
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XEMR_NONE = -1,
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XEMR_TEMP = 0,
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XEMR_CONST = 1,
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XEMR_COLOR_OUT = 2,
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XEMR_TEX_FETCH = 3,
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} ucode_reg_type_t;
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typedef enum {
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XEMO_NONE = -1,
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XEMO_SEQUENCER = 0,
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XEMO_ALU_VECTOR = 1,
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XEMO_ALU_VECTOR_SAT = 2,
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XEMO_ALU_SCALAR = 3,
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XEMO_ALU_SCALAR_SAT = 4,
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XEMO_FETCHES = 5,
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} ucode_op_type_t;
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typedef struct {
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int8_t start;
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int8_t end;
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} ucode_mask_t;
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typedef struct {
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ucode_reg_type_t reg_type;
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ucode_mask_t reg_mask[2]; // there can be 2 reg masks
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uint8_t swizzle_count;
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ucode_mask_t swizzle_mask[2]; // there can be 2 swizzle masks
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} ucode_reg_t;
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typedef struct {
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const char* name;
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ucode_op_type_t op_type;
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uint8_t base_bin[12];
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ucode_mask_t out_mask;
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ucode_reg_t regs[4];
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} ucode_op_t;
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extern const ucode_op_t ucode_ops[];
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} // namespace ucode
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} // namespace gpu
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} // namespace xe
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#endif // XENIA_GPU_UCODE_UCODE_OPS_H_
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