Constant support for a lot of vector ops.
This commit is contained in:
parent
efa0565398
commit
16bac6d9c5
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@ -628,6 +628,36 @@ struct SingleSequence : public Sequence<SingleSequence<SEQ, T>, T> {
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}
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}
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}
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}
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template <typename FN>
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static void EmitCommutativeBinaryXmmOp(
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X64Emitter& e, const EmitArgType& i, const FN& fn) {
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if (i.src1.is_constant) {
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XEASSERT(!i.src2.is_constant);
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e.LoadConstantXmm(e.xmm0, i.src1.constant());
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fn(e, i.dest, e.xmm0, i.src2);
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} else if (i.src2.is_constant) {
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e.LoadConstantXmm(e.xmm0, i.src2.constant());
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fn(e, i.dest, i.src1, e.xmm0);
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} else {
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fn(e, i.dest, i.src1, i.src2);
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}
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}
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template <typename FN>
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static void EmitAssociativeBinaryXmmOp(
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X64Emitter& e, const EmitArgType& i, const FN& fn) {
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if (i.src1.is_constant) {
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XEASSERT(!i.src2.is_constant);
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e.LoadConstantXmm(e.xmm0, i.src1.constant());
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fn(e, i.dest, e.xmm0, i.src2);
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} else if (i.src2.is_constant) {
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e.LoadConstantXmm(e.xmm0, i.src2.constant());
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fn(e, i.dest, i.src1, e.xmm0);
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} else {
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fn(e, i.dest, i.src1, i.src2);
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}
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}
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template <typename REG_REG_FN, typename REG_CONST_FN>
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template <typename REG_REG_FN, typename REG_CONST_FN>
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static void EmitCommutativeCompareOp(
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static void EmitCommutativeCompareOp(
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X64Emitter& e, const EmitArgType& i,
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X64Emitter& e, const EmitArgType& i,
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@ -2272,20 +2272,23 @@ EMITTER_OPCODE_TABLE(
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// ============================================================================
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// ============================================================================
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EMITTER(VECTOR_COMPARE_EQ_V128, MATCH(I<OPCODE_VECTOR_COMPARE_EQ, V128<>, V128<>, V128<>>)) {
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EMITTER(VECTOR_COMPARE_EQ_V128, MATCH(I<OPCODE_VECTOR_COMPARE_EQ, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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switch (i.instr->flags) {
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EmitCommutativeBinaryXmmOp(e, i,
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case INT8_TYPE:
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[&i](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vpcmpeqb(i.dest, i.src1, i.src2);
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switch (i.instr->flags) {
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break;
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case INT8_TYPE:
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case INT16_TYPE:
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e.vpcmpeqb(dest, src1, src2);
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e.vpcmpeqw(i.dest, i.src1, i.src2);
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break;
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break;
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case INT16_TYPE:
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case INT32_TYPE:
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e.vpcmpeqw(dest, src1, src2);
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e.vpcmpeqd(i.dest, i.src1, i.src2);
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break;
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break;
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case INT32_TYPE:
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case FLOAT32_TYPE:
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e.vpcmpeqd(dest, src1, src2);
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e.vcmpeqps(i.dest, i.src1, i.src2);
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break;
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break;
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case FLOAT32_TYPE:
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}
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e.vcmpeqps(dest, src1, src2);
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break;
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}
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -2298,20 +2301,23 @@ EMITTER_OPCODE_TABLE(
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// ============================================================================
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// ============================================================================
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EMITTER(VECTOR_COMPARE_SGT_V128, MATCH(I<OPCODE_VECTOR_COMPARE_SGT, V128<>, V128<>, V128<>>)) {
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EMITTER(VECTOR_COMPARE_SGT_V128, MATCH(I<OPCODE_VECTOR_COMPARE_SGT, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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switch (i.instr->flags) {
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EmitAssociativeBinaryXmmOp(e, i,
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case INT8_TYPE:
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[&i](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vpcmpgtb(i.dest, i.src1, i.src2);
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switch (i.instr->flags) {
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break;
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case INT8_TYPE:
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case INT16_TYPE:
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e.vpcmpgtb(dest, src1, src2);
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e.vpcmpgtw(i.dest, i.src1, i.src2);
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break;
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break;
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case INT16_TYPE:
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case INT32_TYPE:
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e.vpcmpgtw(dest, src1, src2);
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e.vpcmpgtd(i.dest, i.src1, i.src2);
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break;
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break;
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case INT32_TYPE:
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case FLOAT32_TYPE:
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e.vpcmpgtd(dest, src1, src2);
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e.vcmpgtps(i.dest, i.src1, i.src2);
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break;
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break;
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case FLOAT32_TYPE:
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}
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e.vcmpgtps(dest, src1, src2);
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break;
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}
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -2324,26 +2330,29 @@ EMITTER_OPCODE_TABLE(
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// ============================================================================
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// ============================================================================
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EMITTER(VECTOR_COMPARE_SGE_V128, MATCH(I<OPCODE_VECTOR_COMPARE_SGE, V128<>, V128<>, V128<>>)) {
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EMITTER(VECTOR_COMPARE_SGE_V128, MATCH(I<OPCODE_VECTOR_COMPARE_SGE, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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switch (i.instr->flags) {
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EmitAssociativeBinaryXmmOp(e, i,
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case INT8_TYPE:
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[&i](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vpcmpgtb(i.dest, i.src1, i.src2);
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switch (i.instr->flags) {
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e.vpcmpeqb(e.xmm0, i.src1, i.src2);
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case INT8_TYPE:
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e.vpor(i.dest, e.xmm0);
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e.vpcmpgtb(dest, src1, src2);
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break;
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e.vpcmpeqb(e.xmm0, src1, src2);
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case INT16_TYPE:
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e.vpor(dest, e.xmm0);
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e.vpcmpgtw(i.dest, i.src1, i.src2);
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break;
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e.vpcmpeqw(e.xmm0, i.src1, i.src2);
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case INT16_TYPE:
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e.vpor(i.dest, e.xmm0);
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e.vpcmpgtw(dest, src1, src2);
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break;
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e.vpcmpeqw(e.xmm0, src1, src2);
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case INT32_TYPE:
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e.vpor(dest, e.xmm0);
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e.vpcmpgtd(i.dest, i.src1, i.src2);
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break;
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e.vpcmpeqd(e.xmm0, i.src1, i.src2);
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case INT32_TYPE:
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e.vpor(i.dest, e.xmm0);
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e.vpcmpgtd(dest, src1, src2);
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break;
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e.vpcmpeqd(e.xmm0, src1, src2);
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case FLOAT32_TYPE:
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e.vpor(dest, e.xmm0);
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e.vcmpgeps(i.dest, i.src1, i.src2);
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break;
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break;
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case FLOAT32_TYPE:
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}
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e.vcmpgeps(i.dest, i.src1, i.src2);
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break;
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}
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -2412,17 +2421,26 @@ EMITTER(ADD_I64, MATCH(I<OPCODE_ADD, I64<>, I64<>, I64<>>)) {
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};
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};
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EMITTER(ADD_F32, MATCH(I<OPCODE_ADD, F32<>, F32<>, F32<>>)) {
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EMITTER(ADD_F32, MATCH(I<OPCODE_ADD, F32<>, F32<>, F32<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.vaddss(i.dest, i.src1, i.src2);
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EmitCommutativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vaddss(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(ADD_F64, MATCH(I<OPCODE_ADD, F64<>, F64<>, F64<>>)) {
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EMITTER(ADD_F64, MATCH(I<OPCODE_ADD, F64<>, F64<>, F64<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.vaddsd(i.dest, i.src1, i.src2);
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EmitCommutativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vaddsd(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(ADD_V128, MATCH(I<OPCODE_ADD, V128<>, V128<>, V128<>>)) {
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EMITTER(ADD_V128, MATCH(I<OPCODE_ADD, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.vaddps(i.dest, i.src1, i.src2);
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EmitCommutativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vaddps(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -2569,19 +2587,28 @@ EMITTER(SUB_I64, MATCH(I<OPCODE_SUB, I64<>, I64<>, I64<>>)) {
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EMITTER(SUB_F32, MATCH(I<OPCODE_SUB, F32<>, F32<>, F32<>>)) {
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EMITTER(SUB_F32, MATCH(I<OPCODE_SUB, F32<>, F32<>, F32<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vsubss(i.dest, i.src1, i.src2);
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EmitAssociativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vsubss(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(SUB_F64, MATCH(I<OPCODE_SUB, F64<>, F64<>, F64<>>)) {
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EMITTER(SUB_F64, MATCH(I<OPCODE_SUB, F64<>, F64<>, F64<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vsubsd(i.dest, i.src1, i.src2);
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EmitAssociativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vsubsd(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(SUB_V128, MATCH(I<OPCODE_SUB, V128<>, V128<>, V128<>>)) {
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EMITTER(SUB_V128, MATCH(I<OPCODE_SUB, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vsubps(i.dest, i.src1, i.src2);
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EmitAssociativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vsubps(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -2682,19 +2709,28 @@ EMITTER(MUL_I64, MATCH(I<OPCODE_MUL, I64<>, I64<>, I64<>>)) {
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EMITTER(MUL_F32, MATCH(I<OPCODE_MUL, F32<>, F32<>, F32<>>)) {
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EMITTER(MUL_F32, MATCH(I<OPCODE_MUL, F32<>, F32<>, F32<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vmulss(i.dest, i.src1, i.src2);
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EmitCommutativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vmulss(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(MUL_F64, MATCH(I<OPCODE_MUL, F64<>, F64<>, F64<>>)) {
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EMITTER(MUL_F64, MATCH(I<OPCODE_MUL, F64<>, F64<>, F64<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vmulsd(i.dest, i.src1, i.src2);
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EmitCommutativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vmulsd(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(MUL_V128, MATCH(I<OPCODE_MUL, V128<>, V128<>, V128<>>)) {
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EMITTER(MUL_V128, MATCH(I<OPCODE_MUL, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vmulps(i.dest, i.src1, i.src2);
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EmitCommutativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vmulps(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -2969,19 +3005,28 @@ EMITTER(DIV_I64, MATCH(I<OPCODE_DIV, I64<>, I64<>, I64<>>)) {
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EMITTER(DIV_F32, MATCH(I<OPCODE_DIV, F32<>, F32<>, F32<>>)) {
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EMITTER(DIV_F32, MATCH(I<OPCODE_DIV, F32<>, F32<>, F32<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vdivss(i.dest, i.src1, i.src2);
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EmitAssociativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vdivss(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(DIV_F64, MATCH(I<OPCODE_DIV, F64<>, F64<>, F64<>>)) {
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EMITTER(DIV_F64, MATCH(I<OPCODE_DIV, F64<>, F64<>, F64<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vdivsd(i.dest, i.src1, i.src2);
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EmitAssociativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vdivsd(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER(DIV_V128, MATCH(I<OPCODE_DIV, V128<>, V128<>, V128<>>)) {
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EMITTER(DIV_V128, MATCH(I<OPCODE_DIV, V128<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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XEASSERT(!i.instr->flags);
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XEASSERT(!i.instr->flags);
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e.vdivps(i.dest, i.src1, i.src2);
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EmitAssociativeBinaryXmmOp(e, i,
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[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
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e.vdivps(dest, src1, src2);
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});
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}
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}
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};
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};
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EMITTER_OPCODE_TABLE(
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EMITTER_OPCODE_TABLE(
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@ -3274,9 +3319,11 @@ EMITTER_OPCODE_TABLE(
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EMITTER(DOT_PRODUCT_3_V128, MATCH(I<OPCODE_DOT_PRODUCT_3, F32<>, V128<>, V128<>>)) {
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EMITTER(DOT_PRODUCT_3_V128, MATCH(I<OPCODE_DOT_PRODUCT_3, F32<>, V128<>, V128<>>)) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
|
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
||||||
// http://msdn.microsoft.com/en-us/library/bb514054(v=vs.90).aspx
|
// http://msdn.microsoft.com/en-us/library/bb514054(v=vs.90).aspx
|
||||||
// TODO(benvanik): verify ordering
|
EmitCommutativeBinaryXmmOp(e, i,
|
||||||
// TODO(benvanik): apparently this is very slow - find alternative?
|
[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
|
||||||
e.vdpps(i.dest, i.src1, i.src2, B01110001);
|
// TODO(benvanik): apparently this is very slow - find alternative?
|
||||||
|
e.vdpps(dest, src1, src2, B01110001);
|
||||||
|
});
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
EMITTER_OPCODE_TABLE(
|
EMITTER_OPCODE_TABLE(
|
||||||
|
@ -3290,9 +3337,11 @@ EMITTER_OPCODE_TABLE(
|
||||||
EMITTER(DOT_PRODUCT_4_V128, MATCH(I<OPCODE_DOT_PRODUCT_4, F32<>, V128<>, V128<>>)) {
|
EMITTER(DOT_PRODUCT_4_V128, MATCH(I<OPCODE_DOT_PRODUCT_4, F32<>, V128<>, V128<>>)) {
|
||||||
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
||||||
// http://msdn.microsoft.com/en-us/library/bb514054(v=vs.90).aspx
|
// http://msdn.microsoft.com/en-us/library/bb514054(v=vs.90).aspx
|
||||||
// TODO(benvanik): verify ordering
|
EmitCommutativeBinaryXmmOp(e, i,
|
||||||
// TODO(benvanik): apparently this is very slow - find alternative?
|
[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
|
||||||
e.vdpps(i.dest, i.src1, i.src2, B11110001);
|
// TODO(benvanik): apparently this is very slow - find alternative?
|
||||||
|
e.vdpps(dest, src1, src2, B11110001);
|
||||||
|
});
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
EMITTER_OPCODE_TABLE(
|
EMITTER_OPCODE_TABLE(
|
||||||
|
@ -3333,7 +3382,10 @@ EMITTER(AND_I64, MATCH(I<OPCODE_AND, I64<>, I64<>, I64<>>)) {
|
||||||
};
|
};
|
||||||
EMITTER(AND_V128, MATCH(I<OPCODE_AND, V128<>, V128<>, V128<>>)) {
|
EMITTER(AND_V128, MATCH(I<OPCODE_AND, V128<>, V128<>, V128<>>)) {
|
||||||
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
||||||
e.vpand(i.dest, i.src1, i.src2);
|
EmitCommutativeBinaryXmmOp(e, i,
|
||||||
|
[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
|
||||||
|
e.vpand(dest, src1, src2);
|
||||||
|
});
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
EMITTER_OPCODE_TABLE(
|
EMITTER_OPCODE_TABLE(
|
||||||
|
@ -3378,7 +3430,10 @@ EMITTER(OR_I64, MATCH(I<OPCODE_OR, I64<>, I64<>, I64<>>)) {
|
||||||
};
|
};
|
||||||
EMITTER(OR_V128, MATCH(I<OPCODE_OR, V128<>, V128<>, V128<>>)) {
|
EMITTER(OR_V128, MATCH(I<OPCODE_OR, V128<>, V128<>, V128<>>)) {
|
||||||
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
||||||
e.vpor(i.dest, i.src1, i.src2);
|
EmitCommutativeBinaryXmmOp(e, i,
|
||||||
|
[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
|
||||||
|
e.vpor(dest, src1, src2);
|
||||||
|
});
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
EMITTER_OPCODE_TABLE(
|
EMITTER_OPCODE_TABLE(
|
||||||
|
@ -3423,7 +3478,10 @@ EMITTER(XOR_I64, MATCH(I<OPCODE_XOR, I64<>, I64<>, I64<>>)) {
|
||||||
};
|
};
|
||||||
EMITTER(XOR_V128, MATCH(I<OPCODE_XOR, V128<>, V128<>, V128<>>)) {
|
EMITTER(XOR_V128, MATCH(I<OPCODE_XOR, V128<>, V128<>, V128<>>)) {
|
||||||
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
static void Emit(X64Emitter& e, const EmitArgType& i) {
|
||||||
e.vpxor(i.dest, i.src1, i.src2);
|
EmitCommutativeBinaryXmmOp(e, i,
|
||||||
|
[](X64Emitter& e, Xmm dest, Xmm src1, Xmm src2) {
|
||||||
|
e.vpxor(dest, src1, src2);
|
||||||
|
});
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
EMITTER_OPCODE_TABLE(
|
EMITTER_OPCODE_TABLE(
|
||||||
|
|
Loading…
Reference in New Issue