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xenia-canary
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Fixing warnings.

This commit is contained in:
Ben Vanik 2014-07-17 20:52:56 -07:00
parent 19b6e90b63
commit 0c5110ac3e
2 changed files with 22 additions and 22 deletions
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6
src/alloy/backend/x64/x64_sequences.cc
View File

@ -3477,7 +3477,7 @@ EMITTER(POW2_F32, MATCH(I<OPCODE_POW2, F32<>, F32<>>)) {
static __m128 EmulatePow2(__m128 src) {
float src_value;
_mm_store_ss(&src_value, src);
float result = std::pow(2, src_value);
float result = std::pow(2.0f, src_value);
return _mm_load_ss(&result);
}
static void Emit(X64Emitter& e, const EmitArgType& i) {
@ -3488,7 +3488,7 @@ EMITTER(POW2_F32, MATCH(I<OPCODE_POW2, F32<>, F32<>>)) {
}
};
EMITTER(POW2_F64, MATCH(I<OPCODE_POW2, F64<>, F64<>>)) {
static __m128d EmulatePow2(__m128 src) {
static __m128d EmulatePow2(__m128d src) {
double src_value;
_mm_store_sd(&src_value, src);
double result = std::pow(2, src_value);
@ -3506,7 +3506,7 @@ EMITTER(POW2_V128, MATCH(I<OPCODE_POW2, V128<>, V128<>>)) {
alignas(16) float values[4];
_mm_store_ps(values, src);
for (size_t i = 0; i < 4; ++i) {
values[i] = std::pow(2, values[i]);
values[i] = std::pow(2.0f, values[i]);
}
return _mm_load_ps(values);
}

38
src/xenia/kernel/util/shim_utils.h
View File

@ -29,21 +29,21 @@ using PPCContext = alloy::frontend::ppc::PPCContext;
library_name, ordinals::##export_name, \
shim_data, \
(xe_kernel_export_shim_fn)export_name##_shim, \
NULL);
nullptr);
#define SHIM_MEM_BASE ppc_state->membase
#define SHIM_MEM_ADDR(a) (a ? (ppc_state->membase + a) : NULL)
#define SHIM_MEM_ADDR(a) (a ? (ppc_state->membase + a) : nullptr)
#define SHIM_MEM_8(a) (*(uint8_t*)SHIM_MEM_ADDR(a))
#define SHIM_MEM_16(a) (uint16_t)poly::load_and_swap<uint16_t>(SHIM_MEM_ADDR(a))
#define SHIM_MEM_32(a) (uint32_t)poly::load_and_swap<uint32_t>(SHIM_MEM_ADDR(a))
#define SHIM_MEM_64(a) (uint64_t)poly::load_and_swap<uint64_t>(SHIM_MEM_ADDR(a))
#define SHIM_SET_MEM_8(a, v) (*(uint8_t*)SHIM_MEM_ADDR(a)) = v
#define SHIM_SET_MEM_16(a, v) (*(uint16_t*)SHIM_MEM_ADDR(a)) = poly::byte_swap(v)
#define SHIM_SET_MEM_32(a, v) (*(uint32_t*)SHIM_MEM_ADDR(a)) = poly::byte_swap(v)
#define SHIM_SET_MEM_64(a, v) (*(uint64_t*)SHIM_MEM_ADDR(a)) = poly::byte_swap(v)
#define SHIM_SET_MEM_F32(a, v) (*(float*)SHIM_MEM_ADDR(a)) = poly::byte_swap(v)
#define SHIM_SET_MEM_F64(a, v) (*(double*)SHIM_MEM_ADDR(a)) = poly::byte_swap(v)
#define SHIM_MEM_8(a) poly::load_and_swap<uint8_t>(SHIM_MEM_ADDR(a))
#define SHIM_MEM_16(a) poly::load_and_swap<uint16_t>(SHIM_MEM_ADDR(a))
#define SHIM_MEM_32(a) poly::load_and_swap<uint32_t>(SHIM_MEM_ADDR(a))
#define SHIM_MEM_64(a) poly::load_and_swap<uint64_t>(SHIM_MEM_ADDR(a))
#define SHIM_SET_MEM_8(a, v) poly::store_and_swap<uint8_t>(SHIM_MEM_ADDR(a), v)
#define SHIM_SET_MEM_16(a, v) poly::store_and_swap<uint16_t>(SHIM_MEM_ADDR(a), v)
#define SHIM_SET_MEM_32(a, v) poly::store_and_swap<uint32_t>(SHIM_MEM_ADDR(a), v)
#define SHIM_SET_MEM_64(a, v) poly::store_and_swap<uint64_t>(SHIM_MEM_ADDR(a), v)
#define SHIM_SET_MEM_F32(a, v) poly::store_and_swap<float>(SHIM_MEM_ADDR(a), v)
#define SHIM_SET_MEM_F64(a, v) poly::store_and_swap<double>(SHIM_MEM_ADDR(a), v)
#define SHIM_GPR_8(n) (uint8_t)(ppc_state->r[n])
#define SHIM_GPR_16(n) (uint16_t)(ppc_state->r[n])
@ -60,14 +60,14 @@ using PPCContext = alloy::frontend::ppc::PPCContext;
#define SHIM_SET_RETURN_64(v) SHIM_SET_GPR_64(3, v)
#define IMPL_MEM_ADDR(a) (a ? state->memory()->Translate(a) : NULL)
#define IMPL_MEM_ADDR(a) (a ? state->memory()->Translate(a) : nullptr)
#define IMPL_MEM_8(a) (*(uint8_t*)(IMPL_MEM_ADDR(a)))
#define IMPL_MEM_16(a) (uint16_t)poly::load_and_swap<uint16_t>(IMPL_MEM_ADDR(a))
#define IMPL_MEM_32(a) (uint32_t)poly::load_and_swap<uint32_t>(IMPL_MEM_ADDR(a))
#define IMPL_SET_MEM_8(a, v) (*(uint8_t*)IMPL_MEM_ADDR(a)) = v
#define IMPL_SET_MEM_16(a, v) (*(uint16_t*)IMPL_MEM_ADDR(a)) = poly::byte_swap(v)
#define IMPL_SET_MEM_32(a, v) (*(uint32_t*)IMPL_MEM_ADDR(a)) = poly::byte_swap(v)
#define IMPL_MEM_8(a) poly::load_and_swap<uint8_t>(IMPL_MEM_ADDR(a))
#define IMPL_MEM_16(a) poly::load_and_swap<uint16_t>(IMPL_MEM_ADDR(a))
#define IMPL_MEM_32(a) poly::load_and_swap<uint32_t>(IMPL_MEM_ADDR(a))
#define IMPL_SET_MEM_8(a, v) poly::store_and_swap<uint8_t>(IMPL_MEM_ADDR(a), v)
#define IMPL_SET_MEM_16(a, v) poly::store_and_swap<uint16_t>(IMPL_MEM_ADDR(a), v)
#define IMPL_SET_MEM_32(a, v) poly::store_and_swap<uint32_t>(IMPL_MEM_ADDR(a), v)
} // namespace kernel