diff --git a/src/xenia/cpu/frontend/test/instr_addc.s b/src/xenia/cpu/frontend/test/instr_addc.s
index 6d03d9550..105e34fcf 100644
--- a/src/xenia/cpu/frontend/test/instr_addc.s
+++ b/src/xenia/cpu/frontend/test/instr_addc.s
@@ -1,5 +1,3 @@
-# constant tests are commented since add_carry isn't supported
-
 test_addc_1:
   #_ REGISTER_IN r4 1
   #_ REGISTER_IN r5 2
@@ -11,16 +9,16 @@ test_addc_1:
   #_ REGISTER_OUT r5 2
   #_ REGISTER_OUT r6 0
 
-#test_addc_1_constant:
-#  li r4, 1
-#  li r5, 2
-#  addc r3, r4, r5
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r3 3
-#  #_ REGISTER_OUT r4 1
-#  #_ REGISTER_OUT r5 2
-#  #_ REGISTER_OUT r6 0
+test_addc_1_constant:
+  li r4, 1
+  li r5, 2
+  addc r3, r4, r5
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r3 3
+  #_ REGISTER_OUT r4 1
+  #_ REGISTER_OUT r5 2
+  #_ REGISTER_OUT r6 0
 
 test_addc_2:
   #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
@@ -33,16 +31,16 @@ test_addc_2:
   #_ REGISTER_OUT r5 0
   #_ REGISTER_OUT r6 0
 
-#test_addc_2_constant:
-#  li r4, -1
-#  li r5, 0
-#  addc r3, r4, r5
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFF
-#  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
-#  #_ REGISTER_OUT r5 0
-#  #_ REGISTER_OUT r6 0
+test_addc_2_constant:
+  li r4, -1
+  li r5, 0
+  addc r3, r4, r5
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r5 0
+  #_ REGISTER_OUT r6 0
 
 test_addc_3:
   #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
@@ -55,16 +53,16 @@ test_addc_3:
   #_ REGISTER_OUT r5 1
   #_ REGISTER_OUT r6 1
 
-#test_addc_3_constant:
-#  li r4, -1
-#  li r5, 1
-#  addc r3, r4, r5
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r3 0
-#  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
-#  #_ REGISTER_OUT r5 1
-#  #_ REGISTER_OUT r6 1
+test_addc_3_constant:
+  li r4, -1
+  li r5, 1
+  addc r3, r4, r5
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r3 0
+  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r5 1
+  #_ REGISTER_OUT r6 1
 
 test_addc_4:
   #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
@@ -77,16 +75,16 @@ test_addc_4:
   #_ REGISTER_OUT r5 123
   #_ REGISTER_OUT r6 1
 
-#test_addc_4_constant:
-#  li r4, -1
-#  li r5, 123
-#  addc r3, r4, r5
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r3 0x000000000000007A
-#  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
-#  #_ REGISTER_OUT r5 123
-#  #_ REGISTER_OUT r6 1
+test_addc_4_constant:
+  li r4, -1
+  li r5, 123
+  addc r3, r4, r5
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r3 0x000000000000007A
+  #_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r5 123
+  #_ REGISTER_OUT r6 1
 
 test_addc_5:
   #_ REGISTER_IN r4 0x7FFFFFFFFFFFFFFF
@@ -99,13 +97,13 @@ test_addc_5:
   #_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
   #_ REGISTER_OUT r6 1
 
-#test_addc_5_constant:
-#  li r4, -1
-#  sldi r5, r4, 1
-#  addc r3, r4, r5
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r3 0x7FFFFFFFFFFFFFFE
-#  #_ REGISTER_OUT r4 0x7FFFFFFFFFFFFFFF
-#  #_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
-#  #_ REGISTER_OUT r6 1
+test_addc_5_constant:
+  li r5, -1
+  srdi r4, r5, 1
+  addc r3, r4, r5
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r3 0x7FFFFFFFFFFFFFFE
+  #_ REGISTER_OUT r4 0x7FFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
+  #_ REGISTER_OUT r6 1
diff --git a/src/xenia/cpu/frontend/test/instr_addic.s b/src/xenia/cpu/frontend/test/instr_addic.s
index 9a64d1a2c..9f787fde3 100644
--- a/src/xenia/cpu/frontend/test/instr_addic.s
+++ b/src/xenia/cpu/frontend/test/instr_addic.s
@@ -1,5 +1,3 @@
-# constant tests are commented since add_carry isn't supported
-
 test_addic_1:
   #_ REGISTER_IN r4 1
   addic r4, r4, 1
@@ -8,13 +6,13 @@ test_addic_1:
   #_ REGISTER_OUT r4 2
   #_ REGISTER_OUT r6 0
 
-#test_addic_1_constant:
-#  li r4, 1
-#  addic r4, r4, 1
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r4 2
-#  #_ REGISTER_OUT r6 0
+test_addic_1_constant:
+  li r4, 1
+  addic r4, r4, 1
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r4 2
+  #_ REGISTER_OUT r6 0
 
 test_addic_2:
   #_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
@@ -24,10 +22,10 @@ test_addic_2:
   #_ REGISTER_OUT r4 0
   #_ REGISTER_OUT r6 1
 
-#test_addic_2_constant:
-#  li r4, -1
-#  addic r4, r4, 1
-#  adde r6, r0, r0
-#  blr
-#  #_ REGISTER_OUT r4 0
-#  #_ REGISTER_OUT r6 1
+test_addic_2_constant:
+  li r4, -1
+  addic r4, r4, 1
+  adde r6, r0, r0
+  blr
+  #_ REGISTER_OUT r4 0
+  #_ REGISTER_OUT r6 1