From 056d4ed9b0f959bee7817efbd6c493305a1edf94 Mon Sep 17 00:00:00 2001 From: Ben Vanik Date: Mon, 19 Jan 2015 12:24:41 -0800 Subject: [PATCH] vaddshs/vadduhm/vsubshs/vsubuhm tests. --- src/alloy/frontend/ppc/test/bin/instr_vaddshs.bin | Bin 0 -> 8 bytes src/alloy/frontend/ppc/test/bin/instr_vaddshs.dis | 9 +++++++++ src/alloy/frontend/ppc/test/bin/instr_vaddshs.map | 1 + src/alloy/frontend/ppc/test/bin/instr_vadduhm.bin | Bin 0 -> 8 bytes src/alloy/frontend/ppc/test/bin/instr_vadduhm.dis | 9 +++++++++ src/alloy/frontend/ppc/test/bin/instr_vadduhm.map | 1 + src/alloy/frontend/ppc/test/bin/instr_vsubshs.bin | Bin 0 -> 8 bytes src/alloy/frontend/ppc/test/bin/instr_vsubshs.dis | 9 +++++++++ src/alloy/frontend/ppc/test/bin/instr_vsubshs.map | 1 + src/alloy/frontend/ppc/test/bin/instr_vsubuhm.bin | Bin 0 -> 8 bytes src/alloy/frontend/ppc/test/bin/instr_vsubuhm.dis | 9 +++++++++ src/alloy/frontend/ppc/test/bin/instr_vsubuhm.map | 1 + src/alloy/frontend/ppc/test/instr_vaddshs.s | 7 +++++++ src/alloy/frontend/ppc/test/instr_vadduhm.s | 7 +++++++ src/alloy/frontend/ppc/test/instr_vsubshs.s | 7 +++++++ src/alloy/frontend/ppc/test/instr_vsubuhm.s | 7 +++++++ 16 files changed, 68 insertions(+) create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vaddshs.bin create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vaddshs.dis create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vaddshs.map create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vadduhm.bin create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vadduhm.dis create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vadduhm.map create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vsubshs.bin create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vsubshs.dis create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vsubshs.map create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vsubuhm.bin create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vsubuhm.dis create mode 100644 src/alloy/frontend/ppc/test/bin/instr_vsubuhm.map create mode 100644 src/alloy/frontend/ppc/test/instr_vaddshs.s create mode 100644 src/alloy/frontend/ppc/test/instr_vadduhm.s create mode 100644 src/alloy/frontend/ppc/test/instr_vsubshs.s create mode 100644 src/alloy/frontend/ppc/test/instr_vsubuhm.s diff --git a/src/alloy/frontend/ppc/test/bin/instr_vaddshs.bin b/src/alloy/frontend/ppc/test/bin/instr_vaddshs.bin new file mode 100644 index 0000000000000000000000000000000000000000..a17ec46ba1dd0dfad12efedf3aa234c3fb32835b GIT binary patch literal 8 PcmWegR(9}fU{C-62qyu> literal 0 HcmV?d00001 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vaddshs.dis b/src/alloy/frontend/ppc/test/bin/instr_vaddshs.dis new file mode 100644 index 000000000..62ebbba4c --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vaddshs.dis @@ -0,0 +1,9 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vaddshs.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 63 23 40 vaddshs v3,v3,v4 + 100004: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vaddshs.map b/src/alloy/frontend/ppc/test/bin/instr_vaddshs.map new file mode 100644 index 000000000..811e5abb7 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vaddshs.map @@ -0,0 +1 @@ +0000000000000000 t test_vaddshs_1 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vadduhm.bin b/src/alloy/frontend/ppc/test/bin/instr_vadduhm.bin new file mode 100644 index 0000000000000000000000000000000000000000..53fe687b0829b02f33b3b6b69bd011839f5c9f54 GIT binary patch literal 8 PcmWegR&elZU{C-62o(Xs literal 0 HcmV?d00001 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vadduhm.dis b/src/alloy/frontend/ppc/test/bin/instr_vadduhm.dis new file mode 100644 index 000000000..696588275 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vadduhm.dis @@ -0,0 +1,9 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vadduhm.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 63 20 40 vadduhm v3,v3,v4 + 100004: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vadduhm.map b/src/alloy/frontend/ppc/test/bin/instr_vadduhm.map new file mode 100644 index 000000000..30ec24c91 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vadduhm.map @@ -0,0 +1 @@ +0000000000000000 t test_vadduhm_1 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsubshs.bin b/src/alloy/frontend/ppc/test/bin/instr_vsubshs.bin new file mode 100644 index 0000000000000000000000000000000000000000..87035a37fe743daca1bf224bd8e0501903cb6a67 GIT binary patch literal 8 PcmWegR(J4gU{C-62tNVI literal 0 HcmV?d00001 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsubshs.dis b/src/alloy/frontend/ppc/test/bin/instr_vsubshs.dis new file mode 100644 index 000000000..dc1333a0f --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vsubshs.dis @@ -0,0 +1,9 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vsubshs.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 63 27 40 .long 0x10632740 + 100004: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsubshs.map b/src/alloy/frontend/ppc/test/bin/instr_vsubshs.map new file mode 100644 index 000000000..44c86bc4c --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vsubshs.map @@ -0,0 +1 @@ +0000000000000000 t test_vsubshs_1 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.bin b/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.bin new file mode 100644 index 0000000000000000000000000000000000000000..74071d6837bbef33dc876ed230bd7693ef1c7c30 GIT binary patch literal 8 PcmWegR&nraU{C-62rU7| literal 0 HcmV?d00001 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.dis b/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.dis new file mode 100644 index 000000000..af6831d44 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.dis @@ -0,0 +1,9 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vsubuhm.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 63 24 40 vsubuhm v3,v3,v4 + 100004: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.map b/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.map new file mode 100644 index 000000000..0eeae2b33 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vsubuhm.map @@ -0,0 +1 @@ +0000000000000000 t test_vsubuhm_1 diff --git a/src/alloy/frontend/ppc/test/instr_vaddshs.s b/src/alloy/frontend/ppc/test/instr_vaddshs.s new file mode 100644 index 000000000..033b9cf37 --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vaddshs.s @@ -0,0 +1,7 @@ +test_vaddshs_1: + #_ REGISTER_IN v3 [7FFF8001, 7FFF8003, 7FFF8005, 80068007] + #_ REGISTER_IN v4 [00018001, 10000000, 42568124, 00000000] + vaddshs v3, v3, v4 + blr + #_ REGISTER_OUT v3 [7fff8000, 7fff8003, 7fff8000, 80068007] + #_ REGISTER_OUT v4 [00018001, 10000000, 42568124, 00000000] diff --git a/src/alloy/frontend/ppc/test/instr_vadduhm.s b/src/alloy/frontend/ppc/test/instr_vadduhm.s new file mode 100644 index 000000000..2d7126d2d --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vadduhm.s @@ -0,0 +1,7 @@ +test_vadduhm_1: + #_ REGISTER_IN v3 [7FFF8001, 7FFF8003, 7FFF8005, 80068007] + #_ REGISTER_IN v4 [00018001, 10000000, 42568124, 00000000] + vadduhm v3, v3, v4 + blr + #_ REGISTER_OUT v3 [80000002, 8fff8003, c2550129, 80068007] + #_ REGISTER_OUT v4 [00018001, 10000000, 42568124, 00000000] diff --git a/src/alloy/frontend/ppc/test/instr_vsubshs.s b/src/alloy/frontend/ppc/test/instr_vsubshs.s new file mode 100644 index 000000000..956f5e31d --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vsubshs.s @@ -0,0 +1,7 @@ +test_vsubshs_1: + #_ REGISTER_IN v3 [7FFF8001, 7FFF8003, 7FFF8005, 80068007] + #_ REGISTER_IN v4 [00018001, 10000000, 42568124, 00000000] + vsubshs v3, v3, v4 + blr + #_ REGISTER_OUT v3 [7ffe0000, 6fff8003, 3da9fee1, 80068007] + #_ REGISTER_OUT v4 [00018001, 10000000, 42568124, 00000000] diff --git a/src/alloy/frontend/ppc/test/instr_vsubuhm.s b/src/alloy/frontend/ppc/test/instr_vsubuhm.s new file mode 100644 index 000000000..7eb9b8a98 --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vsubuhm.s @@ -0,0 +1,7 @@ +test_vsubuhm_1: + #_ REGISTER_IN v3 [7FFF8001, 7FFF8003, 7FFF8005, 80068007] + #_ REGISTER_IN v4 [00018001, 10000000, 42568124, 00000000] + vsubuhm v3, v3, v4 + blr + #_ REGISTER_OUT v3 [7ffe0000, 6fff8003, 3da9fee1, 80068007] + #_ REGISTER_OUT v4 [00018001, 10000000, 42568124, 00000000]