diff --git a/src/xenia/gpu/ring_buffer_worker.cc b/src/xenia/gpu/ring_buffer_worker.cc
index 96e29096f..a8d448c4d 100644
--- a/src/xenia/gpu/ring_buffer_worker.cc
+++ b/src/xenia/gpu/ring_buffer_worker.cc
@@ -569,13 +569,13 @@ uint32_t RingBufferWorker::ExecutePacket(PacketArgs& args) {
           uint32_t type = (offset_type >> 16) & 0xFF;
           switch (type) {
           case 0x4: // REGISTER
-            index += 0x2000;
+            index += 0x2000; // registers
             for (uint32_t n = 0; n < count - 1; n++, index++) {
               uint32_t data = READ_PTR();
               const char* reg_name = xenos::GetRegisterName(index);
               XELOGGPU("[%.8X]   %.8X -> %.4X %s",
                        packet_ptr + (1 + n) * 4,
-                       data, index, reg_name? reg_name : "");
+                       data, index, reg_name ? reg_name : "");
               WriteRegister(packet_ptr, index, data);
             }
             break;
@@ -585,6 +585,29 @@ uint32_t RingBufferWorker::ExecutePacket(PacketArgs& args) {
           }
         }
         break;
+      case PM4_LOAD_ALU_CONSTANT:
+        // load constants from memory
+        {
+          XELOGGPU("[%.8X] Packet(%.8X): PM4_LOAD_ALU_CONSTANT",
+                   packet_ptr, packet);
+          uint32_t address = READ_PTR();
+          address &= 0x3FFFFFFF;
+          uint32_t offset_type = READ_PTR();
+          uint32_t index = offset_type & 0x7FF;
+          uint32_t size = READ_PTR();
+          size &= 0xFFF;
+          index += 0x4000; // alu constants
+          for (uint32_t n = 0; n < size; n++, index++) {
+            uint32_t data = XEGETUINT32BE(
+                p + GpuToCpu(packet_ptr, address + n * 4));
+            const char* reg_name = xenos::GetRegisterName(index);
+            XELOGGPU("[%.8X]   %.8X -> %.4X %s",
+                     packet_ptr,
+                     data, index, reg_name ? reg_name : "");
+            WriteRegister(packet_ptr, index, data);
+          }
+        }
+        break;
 
       case PM4_IM_LOAD:
         // load sequencer instruction memory (pointer-based)
diff --git a/src/xenia/gpu/xenos/packets.h b/src/xenia/gpu/xenos/packets.h
index 2625f8900..4b7124310 100644
--- a/src/xenia/gpu/xenos/packets.h
+++ b/src/xenia/gpu/xenos/packets.h
@@ -56,6 +56,7 @@ enum Type3Opcode {
   PM4_VIZ_QUERY             = 0x23,   // begin/end initiator for viz query extent processing
   PM4_SET_STATE             = 0x25,   // fetch state sub-blocks and initiate shader code DMAs
   PM4_SET_CONSTANT          = 0x2d,   // load constant into chip and to memory
+  PM4_LOAD_ALU_CONSTANT     = 0x2f,   // load constants from memory
   PM4_IM_LOAD               = 0x27,   // load sequencer instruction memory (pointer-based)
   PM4_IM_LOAD_IMMEDIATE     = 0x2b,   // load sequencer instruction memory (code embedded in packet)
   PM4_LOAD_CONSTANT_CONTEXT = 0x2e,   // load constants from a location in memory