mirror of https://github.com/xemu-project/xemu.git
e2bed107c6
Add instructions of RR opcode format, that have 0x4b as the first opcode.
Add helper functions:
* parity: Calculates the parity bits for every byte of a 32 int.
* bmerge/bsplit: Merges two regs into one bitwise/Splits one reg into two bitwise.
* unpack: unpack a IEEE 754 single precision floating point number as exponent and mantissa.
* dvinit_b_13/131: (ISA v1.3/v1.31)Prepare operands for a divide operation,
where the quotient result is guaranteed to fit into 8 bit.
* dvinit_h_13/131: (ISA v1.3/v1.31)Prepare operands for a divide operation,
where the quotient result is guaranteed to fit into 16 bit.
OPCM_32_RR_FLOAT -> OPCM_32_RR_DIVIDE.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
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| .. | ||
| Makefile.objs | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| csfr.def | ||
| helper.c | ||
| helper.h | ||
| op_helper.c | ||
| translate.c | ||
| tricore-defs.h | ||
| tricore-opcodes.h | ||