xemu/target
Peter Maydell dfce4aa8fe target/arm: Define and use new regime_tcr_value() function
The regime_tcr() function returns a pointer to a struct TCR
corresponding to the TCR controlling a translation regime.  The
struct TCR has the raw value of the register, plus two fields mask
and base_mask which are used as a small optimization in the case of
32-bit short-descriptor lookups.  Almost all callers of regime_tcr()
only want the raw register value.  Define and use a new
regime_tcr_value() function which returns only the raw 64-bit
register value.

This is a preliminary to removing the 32-bit short descriptor
optimization -- it only saves a handful of bit operations, which is
tiny compared to the overhead of doing a page table walk at all, and
the TCR struct is awkward and makes fixing
https://gitlab.com/qemu-project/qemu/-/issues/1103 unnecessarily
difficult.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220714132303.1287193-2-peter.maydell@linaro.org
2022-07-18 13:20:13 +01:00
..
alpha Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
arm target/arm: Define and use new regime_tcr_value() function 2022-07-18 13:20:13 +01:00
avr target/avr: Drop avr_cpu_memory_rw_debug() 2022-06-20 13:11:36 -07:00
cris Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
hexagon Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
hppa Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
i386 hvf: Enable RDTSCP support 2022-07-13 00:05:39 +02:00
loongarch target/loongarch: Clean up tlb when cpu reset 2022-07-05 16:17:53 +05:30
m68k target/m68k: Make semihosting system only 2022-06-28 10:13:22 +05:30
microblaze Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
mips target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING 2022-07-12 22:32:22 +02:00
nios2 target/nios2: Move nios2-semi.c to nios2_softmmu_ss 2022-06-28 10:18:57 +05:30
openrisc OpenRISC Fixes for 7.0 2022-05-15 16:56:27 -07:00
ppc target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 2022-07-06 10:30:01 -03:00
riscv target/riscv: Update default priority table for local interrupts 2022-07-03 10:03:20 +10:00
rx Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
s390x target/s390x: Exit tb after executing ex_value 2022-07-06 19:04:57 +02:00
sh4 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sparc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
tricore Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
xtensa Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00