mirror of https://github.com/xemu-project/xemu.git
500 lines
16 KiB
C
500 lines
16 KiB
C
/*
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* FPU op helpers
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#include "fpu/softfloat.h"
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static inline float128 f128_in(Int128 i)
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{
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union {
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Int128 i;
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float128 f;
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} u;
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u.i = i;
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return u.f;
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}
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static inline Int128 f128_ret(float128 f)
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{
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union {
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Int128 i;
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float128 f;
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} u;
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u.f = f;
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return u.i;
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}
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static void check_ieee_exceptions(CPUSPARCState *env, uintptr_t ra)
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{
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target_ulong status = get_float_exception_flags(&env->fp_status);
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uint32_t cexc = 0;
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if (unlikely(status)) {
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/* Keep exception flags clear for next time. */
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set_float_exception_flags(0, &env->fp_status);
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/* Copy IEEE 754 flags into FSR */
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if (status & float_flag_invalid) {
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cexc |= FSR_NVC;
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}
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if (status & float_flag_overflow) {
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cexc |= FSR_OFC;
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}
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if (status & float_flag_underflow) {
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cexc |= FSR_UFC;
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}
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if (status & float_flag_divbyzero) {
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cexc |= FSR_DZC;
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}
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if (status & float_flag_inexact) {
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cexc |= FSR_NXC;
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}
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if (cexc & (env->fsr >> FSR_TEM_SHIFT)) {
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/* Unmasked exception, generate an IEEE trap. */
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env->fsr_cexc_ftt = cexc | FSR_FTT_IEEE_EXCP;
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cpu_raise_exception_ra(env, TT_FP_EXCP, ra);
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}
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/* Accumulate exceptions */
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env->fsr |= cexc << FSR_AEXC_SHIFT;
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}
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/* No trap, so FTT is cleared. */
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env->fsr_cexc_ftt = cexc;
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}
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float32 helper_fadds(CPUSPARCState *env, float32 src1, float32 src2)
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{
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float32 ret = float32_add(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float32 helper_fsubs(CPUSPARCState *env, float32 src1, float32 src2)
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{
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float32 ret = float32_sub(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float32 helper_fmuls(CPUSPARCState *env, float32 src1, float32 src2)
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{
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float32 ret = float32_mul(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float32 helper_fdivs(CPUSPARCState *env, float32 src1, float32 src2)
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{
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float32 ret = float32_div(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_faddd(CPUSPARCState *env, float64 src1, float64 src2)
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{
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float64 ret = float64_add(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fsubd(CPUSPARCState *env, float64 src1, float64 src2)
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{
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float64 ret = float64_sub(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fmuld(CPUSPARCState *env, float64 src1, float64 src2)
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{
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float64 ret = float64_mul(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fdivd(CPUSPARCState *env, float64 src1, float64 src2)
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{
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float64 ret = float64_div(src1, src2, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_faddq(CPUSPARCState *env, Int128 src1, Int128 src2)
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{
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float128 ret = float128_add(f128_in(src1), f128_in(src2), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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Int128 helper_fsubq(CPUSPARCState *env, Int128 src1, Int128 src2)
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{
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float128 ret = float128_sub(f128_in(src1), f128_in(src2), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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Int128 helper_fmulq(CPUSPARCState *env, Int128 src1, Int128 src2)
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{
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float128 ret = float128_mul(f128_in(src1), f128_in(src2), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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Int128 helper_fdivq(CPUSPARCState *env, Int128 src1, Int128 src2)
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{
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float128 ret = float128_div(f128_in(src1), f128_in(src2), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2)
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{
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float64 ret = float64_mul(float32_to_float64(src1, &env->fp_status),
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float32_to_float64(src2, &env->fp_status),
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&env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2)
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{
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float128 ret = float128_mul(float64_to_float128(src1, &env->fp_status),
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float64_to_float128(src2, &env->fp_status),
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&env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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/* Integer to float conversion. */
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float32 helper_fitos(CPUSPARCState *env, int32_t src)
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{
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float32 ret = int32_to_float32(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fitod(CPUSPARCState *env, int32_t src)
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{
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float64 ret = int32_to_float64(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_fitoq(CPUSPARCState *env, int32_t src)
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{
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float128 ret = int32_to_float128(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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#ifdef TARGET_SPARC64
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float32 helper_fxtos(CPUSPARCState *env, int64_t src)
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{
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float32 ret = int64_to_float32(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fxtod(CPUSPARCState *env, int64_t src)
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{
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float64 ret = int64_to_float64(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_fxtoq(CPUSPARCState *env, int64_t src)
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{
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float128 ret = int64_to_float128(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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#endif
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/* floating point conversion */
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float32 helper_fdtos(CPUSPARCState *env, float64 src)
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{
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float32 ret = float64_to_float32(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fstod(CPUSPARCState *env, float32 src)
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{
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float64 ret = float32_to_float64(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float32 helper_fqtos(CPUSPARCState *env, Int128 src)
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{
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float32 ret = float128_to_float32(f128_in(src), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_fstoq(CPUSPARCState *env, float32 src)
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{
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float128 ret = float32_to_float128(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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float64 helper_fqtod(CPUSPARCState *env, Int128 src)
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{
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float64 ret = float128_to_float64(f128_in(src), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_fdtoq(CPUSPARCState *env, float64 src)
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{
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float128 ret = float64_to_float128(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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/* Float to integer conversion. */
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int32_t helper_fstoi(CPUSPARCState *env, float32 src)
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{
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int32_t ret = float32_to_int32_round_to_zero(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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int32_t helper_fdtoi(CPUSPARCState *env, float64 src)
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{
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int32_t ret = float64_to_int32_round_to_zero(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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int32_t helper_fqtoi(CPUSPARCState *env, Int128 src)
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{
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int32_t ret = float128_to_int32_round_to_zero(f128_in(src),
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&env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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#ifdef TARGET_SPARC64
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int64_t helper_fstox(CPUSPARCState *env, float32 src)
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{
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int64_t ret = float32_to_int64_round_to_zero(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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int64_t helper_fdtox(CPUSPARCState *env, float64 src)
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{
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int64_t ret = float64_to_int64_round_to_zero(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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int64_t helper_fqtox(CPUSPARCState *env, Int128 src)
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{
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int64_t ret = float128_to_int64_round_to_zero(f128_in(src),
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&env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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#endif
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float32 helper_fsqrts(CPUSPARCState *env, float32 src)
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{
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float32 ret = float32_sqrt(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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float64 helper_fsqrtd(CPUSPARCState *env, float64 src)
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{
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float64 ret = float64_sqrt(src, &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return ret;
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}
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Int128 helper_fsqrtq(CPUSPARCState *env, Int128 src)
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{
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float128 ret = float128_sqrt(f128_in(src), &env->fp_status);
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check_ieee_exceptions(env, GETPC());
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return f128_ret(ret);
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}
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#define GEN_FCMP(name, size, FS, E) \
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void glue(helper_, name)(CPUSPARCState *env, Int128 src1, Int128 src2) \
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{ \
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float128 reg1 = f128_in(src1); \
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float128 reg2 = f128_in(src2); \
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FloatRelation ret; \
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target_ulong fsr; \
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if (E) { \
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ret = glue(size, _compare)(reg1, reg2, &env->fp_status); \
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} else { \
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ret = glue(size, _compare_quiet)(reg1, reg2, \
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&env->fp_status); \
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} \
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check_ieee_exceptions(env, GETPC()); \
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fsr = env->fsr; \
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switch (ret) { \
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case float_relation_unordered: \
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fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \
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fsr |= FSR_NVA; \
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break; \
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case float_relation_less: \
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fsr &= ~(FSR_FCC1) << FS; \
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fsr |= FSR_FCC0 << FS; \
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break; \
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case float_relation_greater: \
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fsr &= ~(FSR_FCC0) << FS; \
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fsr |= FSR_FCC1 << FS; \
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break; \
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default: \
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fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \
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break; \
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} \
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env->fsr = fsr; \
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}
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#define GEN_FCMP_T(name, size, FS, E) \
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void glue(helper_, name)(CPUSPARCState *env, size src1, size src2) \
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{ \
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FloatRelation ret; \
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target_ulong fsr; \
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if (E) { \
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ret = glue(size, _compare)(src1, src2, &env->fp_status); \
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} else { \
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ret = glue(size, _compare_quiet)(src1, src2, \
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&env->fp_status); \
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} \
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check_ieee_exceptions(env, GETPC()); \
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fsr = env->fsr; \
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switch (ret) { \
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case float_relation_unordered: \
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fsr |= (FSR_FCC1 | FSR_FCC0) << FS; \
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break; \
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case float_relation_less: \
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fsr &= ~(FSR_FCC1 << FS); \
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fsr |= FSR_FCC0 << FS; \
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break; \
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case float_relation_greater: \
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fsr &= ~(FSR_FCC0 << FS); \
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fsr |= FSR_FCC1 << FS; \
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break; \
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default: \
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fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \
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break; \
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} \
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env->fsr = fsr; \
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}
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GEN_FCMP_T(fcmps, float32, 0, 0);
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GEN_FCMP_T(fcmpd, float64, 0, 0);
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GEN_FCMP_T(fcmpes, float32, 0, 1);
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GEN_FCMP_T(fcmped, float64, 0, 1);
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GEN_FCMP(fcmpq, float128, 0, 0);
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GEN_FCMP(fcmpeq, float128, 0, 1);
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#ifdef TARGET_SPARC64
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GEN_FCMP_T(fcmps_fcc1, float32, 22, 0);
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GEN_FCMP_T(fcmpd_fcc1, float64, 22, 0);
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GEN_FCMP(fcmpq_fcc1, float128, 22, 0);
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GEN_FCMP_T(fcmps_fcc2, float32, 24, 0);
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GEN_FCMP_T(fcmpd_fcc2, float64, 24, 0);
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GEN_FCMP(fcmpq_fcc2, float128, 24, 0);
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GEN_FCMP_T(fcmps_fcc3, float32, 26, 0);
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GEN_FCMP_T(fcmpd_fcc3, float64, 26, 0);
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GEN_FCMP(fcmpq_fcc3, float128, 26, 0);
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GEN_FCMP_T(fcmpes_fcc1, float32, 22, 1);
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GEN_FCMP_T(fcmped_fcc1, float64, 22, 1);
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GEN_FCMP(fcmpeq_fcc1, float128, 22, 1);
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GEN_FCMP_T(fcmpes_fcc2, float32, 24, 1);
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GEN_FCMP_T(fcmped_fcc2, float64, 24, 1);
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GEN_FCMP(fcmpeq_fcc2, float128, 24, 1);
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GEN_FCMP_T(fcmpes_fcc3, float32, 26, 1);
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GEN_FCMP_T(fcmped_fcc3, float64, 26, 1);
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GEN_FCMP(fcmpeq_fcc3, float128, 26, 1);
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#endif
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#undef GEN_FCMP_T
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#undef GEN_FCMP
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target_ulong cpu_get_fsr(CPUSPARCState *env)
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{
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target_ulong fsr = env->fsr | env->fsr_cexc_ftt;
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/* VER is kept completely separate until re-assembly. */
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fsr |= env->def.fpu_version;
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return fsr;
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}
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target_ulong helper_get_fsr(CPUSPARCState *env)
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{
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return cpu_get_fsr(env);
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}
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static void set_fsr_nonsplit(CPUSPARCState *env, target_ulong fsr)
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{
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int rnd_mode;
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env->fsr = fsr & ~(FSR_VER_MASK | FSR_CEXC_MASK | FSR_FTT_MASK);
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switch (fsr & FSR_RD_MASK) {
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case FSR_RD_NEAREST:
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rnd_mode = float_round_nearest_even;
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break;
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default:
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case FSR_RD_ZERO:
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rnd_mode = float_round_to_zero;
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break;
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|
case FSR_RD_POS:
|
|
rnd_mode = float_round_up;
|
|
break;
|
|
case FSR_RD_NEG:
|
|
rnd_mode = float_round_down;
|
|
break;
|
|
}
|
|
set_float_rounding_mode(rnd_mode, &env->fp_status);
|
|
}
|
|
|
|
void cpu_put_fsr(CPUSPARCState *env, target_ulong fsr)
|
|
{
|
|
env->fsr_cexc_ftt = fsr & (FSR_CEXC_MASK | FSR_FTT_MASK);
|
|
set_fsr_nonsplit(env, fsr);
|
|
}
|
|
|
|
void helper_set_fsr_noftt(CPUSPARCState *env, target_ulong fsr)
|
|
{
|
|
env->fsr_cexc_ftt &= FSR_FTT_MASK;
|
|
env->fsr_cexc_ftt |= fsr & FSR_CEXC_MASK;
|
|
set_fsr_nonsplit(env, fsr);
|
|
}
|