mirror of https://github.com/xemu-project/xemu.git
138 lines
4.1 KiB
C
138 lines
4.1 KiB
C
/*
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* libqos driver framework for risc-v
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*
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* Initial version based on arm-virt-machine.c
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*
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* Copyright (c) 2024 Ventana Micro
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2.1 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*/
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#include "qemu/osdep.h"
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#include "../libqtest.h"
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#include "qemu/module.h"
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#include "libqos-malloc.h"
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#include "qgraph.h"
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#include "virtio-mmio.h"
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#include "generic-pcihost.h"
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#include "hw/pci/pci_regs.h"
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#define RISCV_PAGE_SIZE 4096
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/* VIRT_DRAM */
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#define RISCV_VIRT_RAM_ADDR 0x80000000
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#define RISCV_VIRT_RAM_SIZE 0x20000000
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/*
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* VIRT_VIRTIO. BASE_ADDR points to the last
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* virtio_mmio device.
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*/
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#define VIRTIO_MMIO_BASE_ADDR 0x10008000
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#define VIRTIO_MMIO_SIZE 0x00001000
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/* VIRT_PCIE_PIO */
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#define RISCV_GPEX_PIO_BASE 0x3000000
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#define RISCV_BUS_PIO_LIMIT 0x10000
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/* VIRT_PCIE_MMIO */
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#define RISCV_BUS_MMIO_ALLOC_PTR 0x40000000
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#define RISCV_BUS_MMIO_LIMIT 0x80000000
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/* VIRT_PCIE_ECAM */
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#define RISCV_ECAM_ALLOC_PTR 0x30000000
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typedef struct QVirtMachine QVirtMachine;
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struct QVirtMachine {
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QOSGraphObject obj;
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QGuestAllocator alloc;
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QVirtioMMIODevice virtio_mmio;
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QGenericPCIHost bridge;
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};
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static void virt_destructor(QOSGraphObject *obj)
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{
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QVirtMachine *machine = (QVirtMachine *) obj;
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alloc_destroy(&machine->alloc);
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}
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static void *virt_get_driver(void *object, const char *interface)
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{
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QVirtMachine *machine = object;
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if (!g_strcmp0(interface, "memory")) {
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return &machine->alloc;
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}
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fprintf(stderr, "%s not present in riscv/virtio\n", interface);
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g_assert_not_reached();
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}
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static QOSGraphObject *virt_get_device(void *obj, const char *device)
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{
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QVirtMachine *machine = obj;
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if (!g_strcmp0(device, "generic-pcihost")) {
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return &machine->bridge.obj;
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} else if (!g_strcmp0(device, "virtio-mmio")) {
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return &machine->virtio_mmio.obj;
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}
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fprintf(stderr, "%s not present in riscv/virt\n", device);
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g_assert_not_reached();
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}
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static void riscv_config_qpci_bus(QGenericPCIBus *qpci)
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{
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qpci->gpex_pio_base = RISCV_GPEX_PIO_BASE;
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qpci->bus.pio_limit = RISCV_BUS_PIO_LIMIT;
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qpci->bus.mmio_alloc_ptr = RISCV_BUS_MMIO_ALLOC_PTR;
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qpci->bus.mmio_limit = RISCV_BUS_MMIO_LIMIT;
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qpci->ecam_alloc_ptr = RISCV_ECAM_ALLOC_PTR;
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}
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static void *qos_create_machine_riscv_virt(QTestState *qts)
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{
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QVirtMachine *machine = g_new0(QVirtMachine, 1);
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alloc_init(&machine->alloc, 0,
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RISCV_VIRT_RAM_ADDR,
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RISCV_VIRT_RAM_ADDR + RISCV_VIRT_RAM_SIZE,
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RISCV_PAGE_SIZE);
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qvirtio_mmio_init_device(&machine->virtio_mmio, qts, VIRTIO_MMIO_BASE_ADDR,
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VIRTIO_MMIO_SIZE);
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qos_create_generic_pcihost(&machine->bridge, qts, &machine->alloc);
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riscv_config_qpci_bus(&machine->bridge.pci);
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machine->obj.get_device = virt_get_device;
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machine->obj.get_driver = virt_get_driver;
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machine->obj.destructor = virt_destructor;
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return machine;
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}
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static void virt_machine_register_nodes(void)
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{
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qos_node_create_machine_args("riscv32/virt", qos_create_machine_riscv_virt,
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"aclint=on,aia=aplic-imsic");
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qos_node_contains("riscv32/virt", "virtio-mmio", NULL);
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qos_node_contains("riscv32/virt", "generic-pcihost", NULL);
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qos_node_create_machine_args("riscv64/virt", qos_create_machine_riscv_virt,
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"aclint=on,aia=aplic-imsic");
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qos_node_contains("riscv64/virt", "virtio-mmio", NULL);
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qos_node_contains("riscv64/virt", "generic-pcihost", NULL);
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}
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libqos_init(virt_machine_register_nodes);
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