xemu/include
Benjamin Herrenschmidt a3980bf517 ppc/pnv: add a LPC controller
The LPC (Low Pin Count) interface on a POWER8 is made accessible to
the system through the ADU (XSCOM interface). This interface is part
of set of units connected together via a local OPB (On-Chip Peripheral
Bus) which act as a bridge between the ADU and the off chip LPC
endpoints, like external flash modules.

The most important units of this OPB are :
 - OPB Master: contains the ADU slave logic, a set of internal
   registers and the logic to control the OPB.
 - LPCHC (LPC HOST Controller): which implements a OPB Slave, a set of
   internal registers and the LPC HOST Controller to control the LPC
   interface.

Four address spaces are provided to the ADU :
 - LPC Bus Firmware Memory
 - LPC Bus Memory
 - LPC Bus I/O (ISA bus)
 - and the registers for the OPB Master and the LPC Host Controller

On POWER8, an intermediate hop is necessary to reach the OPB, through
a unit called the ECCB. OPB commands are simply mangled in ECCB write
commands.

On POWER9, the OPB master address space can be accessed via MMIO. The
logic is same but the code will be simpler as the XSCOM and ECCB hops
are not necessary anymore.

This version of the LPC controller model doesn't yet implement support
for the SerIRQ deserializer present in the Naples version of the chip
though some preliminary work is there.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[clg: - updated for qemu-2.7
      - ported on latest PowerNV patchset
      - changed the XSCOM interface to fit new model
      - QOMified the model
      - moved the ISA hunks in another patch
      - removed printf logging
      - added a couple of UNIMP logging
      - rewrote commit log ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-28 09:38:25 +11:00
..
block block: More operations for meta dirty bitmap 2016-10-24 17:56:07 +02:00
crypto crypto: add CTR mode support 2016-10-19 10:09:24 +01:00
disas disas: Fix ATTRIBUTE_UNUSED define clash with ALSA headers 2016-07-19 16:40:39 +01:00
exec tcg: Add EXCP_ATOMIC 2016-10-26 08:29:00 -07:00
fpu fpu: add mechanism to check for invalid long double formats 2016-09-15 12:43:18 +01:00
hw ppc/pnv: add a LPC controller 2016-10-28 09:38:25 +11:00
io Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
libdecnumber Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
migration migrate: move max-bandwidth and downtime-limit to migrate_set_parameter 2016-10-13 17:23:53 +02:00
monitor monitor: fix crash when leaving qemu with spice audio 2016-08-08 14:16:11 +02:00
net Remove unused function declarations 2016-09-15 15:32:22 +03:00
qapi qdict: implement a qdict_crumple method for un-flattening a dict 2016-10-25 17:56:14 +02:00
qemu tcg: Add atomic128 helpers 2016-10-26 08:29:01 -07:00
qom exec: call cpu_exec_exit() from a CPU unrealize common function 2016-10-24 17:29:16 -02:00
standard-headers linux-headers: update 2016-09-05 15:15:16 +02:00
sysemu Increase MAX_CPUMASK_BITS from 255 to 288 2016-10-24 17:29:15 -02:00
ui spice/gl: render DisplaySurface via opengl 2016-09-28 12:49:36 +02:00
elf.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
glib-compat.h glib-compat: add g_(s)list_free_full() 2016-09-08 17:57:32 +04:00
qemu-common.h tcg: Add EXCP_ATOMIC 2016-10-26 08:29:00 -07:00
qemu-io.h qemu-io: Use BlockBackend 2015-02-16 15:07:19 +00:00
trace-tcg.h trace: get rid of generated-events.h/generated-events.c 2016-10-12 09:54:52 +02:00
trace.h trace: get rid of generated-events.h/generated-events.c 2016-10-12 09:54:52 +02:00