Bin Meng a1f0083c6e target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate() ... Since commit 94452ac4cf ("target/riscv: remove fflags, frm, and fcsr from riscv-*-fpu.xml") the 3 FPU CSRs are removed from the XML target decription. The original intent of that commit was based on the assumption that the 3 FPU CSRs will show up in the riscv-csr.xml so the ones in riscv-*-fpu.xml are redundant. But unforuantely that is not true. As the FPU CSR predicate() has a run-time check on MSTATUS.FS, at the time when CSR XML is generated MSTATUS.FS is unset, hence no FPU CSRs will be reported. The FPU CSR predicate() already considered such a case of being accessed by a debugger. All we need to do is to turn on debugger mode before calling predicate(). Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-ID: <20230228104035.1879882-12-bmeng@tinylab.org> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-03-01 16:40:19 -08:00
..
alpha	target/alpha: Remove obsolete STATUS document	2023-02-27 22:29:01 +01:00
arm	target/cpu: Restrict do_transaction_failed() handlers to sysemu	2023-02-27 22:29:01 +01:00
avr	target/avr: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
cris	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	2023-02-27 22:29:01 +01:00
hexagon	target/hexagon: Clean up includes	2023-02-08 07:28:05 +01:00
hppa	target/hppa: Extract system helpers to sys_helper.c	2023-02-27 22:29:01 +01:00
i386	- buildsys	2023-02-28 15:09:18 +00:00
loongarch	target/loongarch/cpu: Restrict "memory.h" header to sysemu	2023-02-27 22:29:01 +01:00
m68k	target/cpu: Restrict do_transaction_failed() handlers to sysemu	2023-02-27 22:29:01 +01:00
microblaze	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	2023-02-27 22:29:01 +01:00
mips	Drop duplicate #include	2023-02-08 07:28:05 +01:00
nios2	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	2023-02-27 22:29:01 +01:00
openrisc	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	2023-02-27 22:29:01 +01:00
ppc	target/ppc: Fix warning with clang-15	2023-02-27 22:29:01 +01:00
riscv	target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate()	2023-03-01 16:40:19 -08:00
rx	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	2023-02-27 22:29:01 +01:00
s390x	target/s390x: Use tcg_constant_* in translate_vx.c.inc	2023-02-27 09:15:39 +01:00
sh4	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	2023-02-27 22:29:01 +01:00
sparc	target/sparc/sysemu: Remove pointless CONFIG_USER_ONLY guard	2023-02-27 22:29:01 +01:00
tricore	target/tricore: Remove unused fields from CPUTriCoreState	2023-02-27 22:29:01 +01:00
xtensa	target/xtensa/cpu: Include missing "memory.h" header	2023-02-27 22:29:01 +01:00
Kconfig	hw/loongarch: Add support loongson3 virt machine type.	2022-06-06 18:09:03 +00:00
meson.build	target/loongarch: Add target build suport	2022-06-06 18:09:03 +00:00