mirror of https://github.com/xemu-project/xemu.git
ea3f0ebc1a
Whilst similar to existing PCIESlot link configuration a few registers need to be set differently so that the downstream device presents a 'configured' state that is then used to 'train' the upstream port on the link. Basically that means setting the status register to reflect it succeeding in training up to target settings. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240916173518.1843023-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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| .. | ||
| Kconfig | ||
| meson.build | ||
| msi.c | ||
| msix.c | ||
| pci-hmp-cmds.c | ||
| pci-internal.h | ||
| pci-qmp-cmds.c | ||
| pci-stub.c | ||
| pci.c | ||
| pci_bridge.c | ||
| pci_host.c | ||
| pcie.c | ||
| pcie_aer.c | ||
| pcie_doe.c | ||
| pcie_host.c | ||
| pcie_port.c | ||
| pcie_sriov.c | ||
| shpc.c | ||
| slotid_cap.c | ||
| trace-events | ||
| trace.h | ||