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xemu/target/arm/tcg
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Peter Maydell 3d65b958c5 target/arm: Set CTR_EL0.{IDC,DIC} for the 'max' CPU 
The CTR_EL0 register has some bits which allow the implementation to
tell the guest that it does not need to do cache maintenance for
data-to-instruction coherence and instruction-to-data coherence.
QEMU doesn't emulate caches and so our cache maintenance insns are
all NOPs.

We already have some models of specific CPUs where we set these bits
(e.g.  the Neoverse V1), but the 'max' CPU still uses the settings it
inherits from Cortex-A57.  Set the bits for 'max' as well, so the
guest doesn't need to do unnecessary work.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
 		2024-01-09 14:43:43 +00:00
..
a32-uncond.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
a32.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
a64.decode target/arm: Fix A64 LDRA immediate decode 2023-11-06 15:00:29 +00:00
arm_ldst.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 2023-05-12 15:43:36 +01:00
cpu32.c target/arm/tcg: enable PMU feature for Cortex-A8 and A9 2023-11-13 16:31:41 +00:00
cpu64.c target/arm: Set CTR_EL0.{IDC,DIC} for the 'max' CPU 2024-01-09 14:43:43 +00:00
crypto_helper.c crypto: Create sm4_subword 2023-09-11 11:45:55 +10:00
helper-a64.c system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
helper-a64.h target/arm: Implement the CPY* instructions 2023-09-21 16:07:14 +01:00
helper-mve.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
helper-sme.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
helper-sve.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
hflags.c target/arm/tcg: spelling fixes: alse, addreses 2023-11-15 11:59:54 +03:00
iwmmxt_helper.c target/arm: move helpers to tcg/ 2023-02-27 13:27:04 +00:00
m-nocp.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
m_helper.c system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
meson.build target/arm/tcg: Don't build AArch64 decodetree files for qemu-system-arm 2023-07-31 11:41:21 +01:00
mte_helper.c target/arm: Correct MTE tag checking for reverse-copy MOPS 2023-11-13 13:15:50 +00:00
mve.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
mve_helper.c target/arm/tcg: Clean up local variable shadowing 2023-09-29 10:07:14 +02:00
neon-dp.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
neon-ls.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
neon-shared.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
neon_helper.c target/arm: move helpers to tcg/ 2023-02-27 13:27:04 +00:00
op_helper.c system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
pauth_helper.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
psci.c system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
sme-fa64.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
sme.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
sme_helper.c target/arm: Fix SME FMOPA (16-bit), BFMOPA 2023-11-20 15:17:00 +00:00
sve.decode target/arm: Demultiplex AESE and AESMC 2023-07-08 07:30:18 +01:00
sve_helper.c target/arm: Replace TARGET_PAGE_ENTRY_EXTRA 2023-10-03 08:01:02 -07:00
sve_ldst_internal.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 2023-05-12 15:43:36 +01:00
t16.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
t32.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
tlb_helper.c target/arm: Move feature test functions to their own header 2023-10-27 11:44:32 +01:00
translate-a32.h tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-a64.c target/arm/tcg: Including missing 'exec/exec-all.h' header 2023-12-19 17:57:49 +00:00
translate-a64.h tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-m-nocp.c tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-mve.c tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-neon.c tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-sme.c tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate-sve.c target/arm: Fix SVE STR increment 2023-11-02 13:36:45 +00:00
translate-vfp.c tcg: Rename cpu_env to tcg_env 2023-10-03 08:01:02 -07:00
translate.c target/arm: Permit T32 LDM with single register 2023-10-19 14:32:13 +01:00
translate.h target/arm: Fix A64 LDRA immediate decode 2023-11-06 15:00:29 +00:00
vec_helper.c target/arm: Use clmul_64 2023-09-15 13:57:00 +00:00
vec_internal.h target/arm: Use clmul_16* routines 2023-09-15 13:57:00 +00:00
vfp-uncond.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00
vfp.decode target/arm: move translate modules to tcg/ 2023-02-27 13:27:04 +00:00