mirror of https://github.com/xemu-project/xemu.git
![]() * Optimize codegen for MVE when predication not active * hvf: Add Apple Silicon support * hw/intc: Set GIC maintenance interrupt level to only 0 or 1 * Fix mishandling of MVE FPSCR.LTPSIZE reset for usermode emulator * elf2dmp: Fix coverity nits -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmFJ+sUZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3oxLEACJSAHzww9iuVa18kTr0A8L Zi5IXewym/XIBGI0dzSdcWm+KmwLSsWQCE267M8/wG+H4aPwkWKk5y9DjIUyvFd4 ozxgaAuQtIFZDlubZ1VdVo3b+cMfF0xLye8iIjeYUIDfoYAZzN9+KH8ctD0PWgLm 3FivfVjFzX5KnC2bOi6P13bzZxPoyQPExcQbtf85Whaujui40rPLrVsnl+6N3ulw sgBYUjT8jxECdBLh/kaSqt33WoAL23amIPfuZl/juNQwxtXYu+tCyFHtOxVNZ4Rt BOOYHgCDWJNKjdts2CA/YqITOyk44hMfRAYZKuSQAz1BVZVi2Z8FDgjTwAzc9inE /nB6EqT/67tF8lGUg0w9OnsGCSA6px3xUYUYrZk7efo7oGcyknsleDbuKE76UHE0 plFuUPZyc0jBGKdSwZGBwzc5UkA3qmcoN83HAl2jE/5piHTaqqyu7KSqMXymwAij WGOO5L2Svgwi+11BgfEFbPbgKOz+XwwvAMXj1drQm6Nf0hKt1YQYvH6oQQYoqjT+ bkUrejjOb04tyA50KTqz4gbj9s8B3/cPSuD3xWl390bDbP7jpgFOmffVj5A16wbx DL7rmwnghoOI3T+5uXXNQFA856XfuVWy1gtwpFzCYZu4hseNPw+MXKwj4YUfM/V3 QonDlN98W4C5M2u4CW09Zw== =vapC -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210921' into staging target-arm queue: * Optimize codegen for MVE when predication not active * hvf: Add Apple Silicon support * hw/intc: Set GIC maintenance interrupt level to only 0 or 1 * Fix mishandling of MVE FPSCR.LTPSIZE reset for usermode emulator * elf2dmp: Fix coverity nits # gpg: Signature made Tue 21 Sep 2021 16:31:17 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210921: (27 commits) target/arm: Optimize MVE 1op-immediate insns target/arm: Optimize MVE VSLI and VSRI target/arm: Optimize MVE VSHLL and VMOVL target/arm: Optimize MVE VSHL, VSHR immediate forms target/arm: Optimize MVE VMVN target/arm: Optimize MVE VDUP target/arm: Optimize MVE VNEG, VABS target/arm: Optimize MVE arithmetic ops target/arm: Optimize MVE logic ops target/arm: Add TB flag for "MVE insns not predicated" target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration target/arm: Avoid goto_tb if we're trying to exit to the main loop hvf: arm: Add rudimentary PMC support arm: Add Hypervisor.framework build target hvf: arm: Implement PSCI handling hvf: arm: Implement -cpu host arm/hvf: Add a WFI handler hvf: Add Apple Silicon support hvf: Introduce hvf_arch_init() callback hvf: Add execute to dirty log permission bitmap ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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.. | ||
9pfs | ||
acpi | ||
adc | ||
alpha | ||
arm | ||
audio | ||
avr | ||
block | ||
char | ||
core | ||
cpu | ||
cris | ||
display | ||
dma | ||
gpio | ||
hppa | ||
hyperv | ||
i2c | ||
i386 | ||
ide | ||
input | ||
intc | ||
ipack | ||
ipmi | ||
isa | ||
m68k | ||
mem | ||
microblaze | ||
mips | ||
misc | ||
net | ||
nios2 | ||
nubus | ||
nvme | ||
nvram | ||
openrisc | ||
pci | ||
pci-bridge | ||
pci-host | ||
pcmcia | ||
ppc | ||
rdma | ||
remote | ||
riscv | ||
rtc | ||
rx | ||
s390x | ||
scsi | ||
sd | ||
sensor | ||
sh4 | ||
smbios | ||
sparc | ||
sparc64 | ||
ssi | ||
timer | ||
tpm | ||
tricore | ||
usb | ||
vfio | ||
virtio | ||
watchdog | ||
xen | ||
xenpv | ||
xtensa | ||
Kconfig | ||
meson.build |