mirror of https://github.com/xemu-project/xemu.git
![]() * xilinx_spips: set reset values correctly * MAINTAINERS: fix an email address * hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS * nvic: Make systick banked for v8M * refactor get_phys_addr() so we can return the right format PAR for ATS operations * implement v8M TT instruction * fix some minor v8M bugs * Implement reset for GICv3 ITS * xlnx-zcu102: Add support for the ZynqMP QSPI -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJaMWr7AAoJEDwlJe0UNgzerT8P+wY9lSzRS3BHE1e450G0g8+P pusM+jH1tOiSesy4BB/LyxVAGbDYHNn1ruq8tPpY9YOdGmIMnthCrioOJ2IMF9E7 BloFP1B9svNMYgHsH/+khuBrvRLYu7mOY4g+MfQux+oYXdXgj4CKMaMkgcKc+mMn epeop6pArXHFiFfNFs6opNTEYvLb4npKmGkWesvyPnEqQtgmNljq1fy2Pan07l+z BBHPUzOzHaq7eobELCHXblMr5GYlm8tFgx/DRKFLDkuZa6HcwttenmDdGEne8CRS YGzt8Q/ZYCvUjEci1GL8tvI03YLuqIwjsfRlU6mpm3rIGht0u55UV9IgM7uC23vm thGXoEEh7qaYkjoA3zLsWMOZTZ2Hcyz1tihdUSCe9NBDzXAK5FaO8Z/3ZOHyIn3v EJu9DEcAzGGHFkoG7i6f908dBuFlb0WIcw3ve6GgNoL4gmawELb7LzrG54qxfFW6 eqxxjDgbNjSO3ls1M6JryW2qASYWzqHNb0VH90ApIqgd4Dec/8xZDWwlxuLF/LV3 X1bSVubogV7g90l+EWFsMlcchI6M+3yXQD1srQLOLxjUHakbAoTg2iojojTBT2uY 52iABcB6mTUFTqWURB0JBQz+6qPuEh4ULAGLgbUCIR049fLoueRR/rMN2kYNh0NE Yma+VzRVVhr/8MgfcChP =1EF9 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20171213' into staging target-arm queue: * xilinx_spips: set reset values correctly * MAINTAINERS: fix an email address * hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS * nvic: Make systick banked for v8M * refactor get_phys_addr() so we can return the right format PAR for ATS operations * implement v8M TT instruction * fix some minor v8M bugs * Implement reset for GICv3 ITS * xlnx-zcu102: Add support for the ZynqMP QSPI # gpg: Signature made Wed 13 Dec 2017 18:01:31 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20171213: (43 commits) xilinx_spips: Use memset instead of a for loop to zero registers xilinx_spips: Set all of the reset values xilinx_spips: Update the QSPI Mod ID reset value MAINTAINERS: replace the unavailable email address hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS nvic: Make systick banked nvic: Make nvic_sysreg_ns_ops work with any MemoryRegion target/arm: Extend PAR format determination target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill() target/arm: Ignore fsr from get_phys_addr() in do_ats_write() target/arm: Use ARMMMUFaultInfo in deliver_fault() target/arm: Convert get_phys_addr_pmsav8() to not return FSC values target/arm: Convert get_phys_addr_pmsav7() to not return FSC values target/arm: Convert get_phys_addr_pmsav5() to not return FSC values target/arm: Convert get_phys_addr_lpae() to not return FSC values target/arm: Convert get_phys_addr_v6() to not return FSC values target/arm: Convert get_phys_addr_v5() to not return FSC values target/arm: Remove fsr argument from arm_ld*_ptw() target/arm: Provide fault type enum and FSR conversion functions target/arm: Implement TT instruction ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
---|---|---|
.. | ||
9pfs | ||
acpi | ||
adc | ||
alpha | ||
arm | ||
audio | ||
block | ||
bt | ||
char | ||
core | ||
cpu | ||
cris | ||
display | ||
dma | ||
gpio | ||
i2c | ||
i386 | ||
ide | ||
input | ||
intc | ||
ipack | ||
ipmi | ||
isa | ||
lm32 | ||
m68k | ||
mem | ||
microblaze | ||
mips | ||
misc | ||
moxie | ||
net | ||
nios2 | ||
nvram | ||
openrisc | ||
pci | ||
pci-bridge | ||
pci-host | ||
pcmcia | ||
ppc | ||
s390x | ||
scsi | ||
sd | ||
sh4 | ||
smbios | ||
sparc | ||
sparc64 | ||
ssi | ||
timer | ||
tpm | ||
tricore | ||
unicore32 | ||
usb | ||
vfio | ||
virtio | ||
watchdog | ||
xen | ||
xenpv | ||
xtensa | ||
Makefile.objs |