mirror of https://github.com/xemu-project/xemu.git
272f458dc8
Make microMIPS FP branches respect CP0.Status.CU1 and trap with a Coprocessor Unusable exception if COP1 has been disabled; also trap if no FPU is present at all. Standard MIPS FP instruction encodings have a more regular structure and branches are covered with a single umbrella along other instructions. This is not the case with the microMIPS encoding, this case has to be taken care of explicitly here. Code to do so has been copied from the standard MIPS code handler for OPC_CP1, in `decode_opc'. Problems arising from this bug will generally only show up on user context switches in operating systems making use of lazy FP context switches, such as Linux. It will also more readily trigger if software FPU emulation is used, either implicitly on a non-float CPU, or forced on a hard-float CPU such as with the "nofpu" Linux kernel command line argument. The problem may have been easily missed because we have no hard-float microMIPS CPU configuration present; in fact we have no microMIPS CPU configuration of any kind present. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> |
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| .. | ||
| Makefile.objs | ||
| TODO | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| dsp_helper.c | ||
| gdbstub.c | ||
| helper.c | ||
| helper.h | ||
| kvm.c | ||
| kvm_mips.h | ||
| lmi_helper.c | ||
| machine.c | ||
| mips-defs.h | ||
| msa_helper.c | ||
| op_helper.c | ||
| translate.c | ||
| translate_init.c | ||