Victor Colombo 201fc774e0 target/ppc: Fix xs{max, min}[cj]dp to use VSX registers ... PPC instruction xsmaxcdp, xsmincdp, xsmaxjdp, and xsminjdp are using vector registers when they should be using VSX ones. This happens because the instructions are using GEN_VSX_HELPER_R3, which adds 32 to the register numbers, effectively making them vector registers. This patch fixes it by changing these instructions to use GEN_VSX_HELPER_X3. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Victor Colombo <victor.colombo@eldorado.org.br> Message-Id: <20211213120958.24443-2-victor.colombo@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>		2021-12-17 17:57:18 +01:00
..
dfp-impl.c.inc	target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree	2021-11-09 10:32:52 +11:00
fixedpoint-impl.c.inc	target/ppc: cntlzdm/cnttzdm implementation without brcond	2021-11-09 10:32:53 +11:00
fp-impl.c.inc	target/ppc: Add helper for frsqrtes	2021-12-17 17:57:16 +01:00
fp-ops.c.inc	target/ppc: Move load and store floating point instructions to decodetree	2021-11-09 10:32:51 +11:00
spe-impl.c.inc	ppc patch queue 2020-08-18	2020-08-24 09:35:21 +01:00
spe-ops.c.inc	meson: rename included C source files to .c.inc	2020-08-21 06:18:30 -04:00
vmx-impl.c.inc	target/ppc: Implement Vector Mask Move insns	2021-12-17 17:57:13 +01:00
vmx-ops.c.inc	target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree	2021-11-09 10:32:52 +11:00
vsx-impl.c.inc	target/ppc: Fix xs{max, min}[cj]dp to use VSX registers	2021-12-17 17:57:18 +01:00
vsx-ops.c.inc	target/ppc: moved XXSPLTIB to using decodetree	2021-11-09 10:32:53 +11:00