xemu/target/arm
Daniel Henrique Barboza 1770b2f2d3 accel/tcg: Add 'size' param to probe_access_flags()
probe_access_flags() as it is today uses probe_access_full(), which in
turn uses probe_access_internal() with size = 0. probe_access_internal()
then uses the size to call the tlb_fill() callback for the given CPU.
This size param ('fault_size' as probe_access_internal() calls it) is
ignored by most existing .tlb_fill callback implementations, e.g.
arm_cpu_tlb_fill(), ppc_cpu_tlb_fill(), x86_cpu_tlb_fill() and
mips_cpu_tlb_fill() to name a few.

But RISC-V riscv_cpu_tlb_fill() actually uses it. The 'size' parameter
is used to check for PMP (Physical Memory Protection) access. This is
necessary because PMP does not make any guarantees about all the bytes
of the same page having the same permissions, i.e. the same page can
have different PMP properties, so we're forced to make sub-page range
checks. To allow RISC-V emulation to do a probe_acess_flags() that
covers PMP, we need to either add a 'size' param to the existing
probe_acess_flags() or create a new interface (e.g.
probe_access_range_flags).

There are quite a few probe_* APIs already, so let's add a 'size' param
to probe_access_flags() and re-use this API. This is done by open coding
what probe_access_full() does inside probe_acess_flags() and passing the
'size' param to probe_acess_internal(). Existing probe_access_flags()
callers use size = 0 to not change their current API usage. 'size' is
asserted to enforce single page access like probe_access() already does.

No behavioral changes intended.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230223234427.521114-2-dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-02-28 10:32:31 -10:00
..
hvf hvf: arm: Add support for GICv3 2023-02-03 12:59:22 +00:00
tcg accel/tcg: Add 'size' param to probe_access_flags() 2023-02-28 10:32:31 -10:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
arch_dump.c dump: Replace opaque DumpState pointer with a typed one 2022-10-06 19:30:43 +04:00
arm-powerctl.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
common-semi-target.h semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
cpregs.h target/arm: Move cpregs code out of cpu.h 2023-02-16 16:11:04 +00:00
cpu-param.h target/arm: Enable TARGET_TB_PCREL 2022-10-20 11:28:29 +01:00
cpu-qom.h target/arm: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
cpu.h target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu 2023-02-27 22:29:01 +01:00
cpu64.c target/arm: Enable FEAT_FGT on '-cpu max' 2023-02-03 12:59:24 +00:00
cpu_tcg.c target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h' 2023-02-16 16:00:47 +00:00
debug_helper.c target/arm: Wrap TCG-only code in debug_helper.c 2023-02-27 13:27:04 +00:00
gdbstub.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
gdbstub64.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
helper-a64.h target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP 2023-02-04 06:19:42 -10:00
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sme.h target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr() 2023-01-23 13:32:38 +00:00
helper-sve.h target/arm: Implement REVD 2022-07-11 13:43:51 +01:00
helper.c target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
helper.h target/arm: Look up ARMCPRegInfo at runtime 2023-01-23 13:32:38 +00:00
hvf_arm.h target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/cpu: Restrict do_transaction_failed() handlers to sysemu 2023-02-27 22:29:01 +01:00
kvm-consts.h hw/misc: Move some arm-related files from specific_ss into softmmu_ss 2022-12-15 17:37:47 +00:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c * scsi-disk: support setting CD-ROM block size via device options 2022-10-13 13:55:03 -04:00
kvm64.c target/arm: Implement ID_DFR1 2022-09-14 11:19:40 +01:00
kvm_arm.h target/arm: Use uint32_t instead of bitmap for sve vq's 2022-06-08 19:38:57 +01:00
machine.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
meson.build target/arm: Move psci.c into the tcg directory 2023-02-27 13:27:04 +00:00
monitor.c qapi machine: Elide redundant has_FOO in generated C 2022-12-14 20:04:47 +01:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
ptw.c accel/tcg: Add 'size' param to probe_access_flags() 2023-02-28 10:32:31 -10:00
sve_ldst_internal.h target/arm: Use probe_access_full for MTE 2022-10-20 11:27:49 +01:00
syndrome.h target/arm: Implement the HFGITR_EL2.ERET trap 2023-02-03 12:59:24 +00:00
tcg-stubs.c target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-a32.h target/arm: Change gen_*set_pc_im to gen_*update_pc 2022-10-20 11:27:52 +01:00
vfp_helper.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00