xemu/target
Nicholas Piggin 13f5086783 target/ppc: Move sync instructions to decodetree
This tries to faithfully reproduce the odd BookE logic. Note the
e206 check in gen_msync_4xx() is always false, so not carried over.

It does change the handling of non-zero reserved bits outside the
defined fields from being illegal to being ignored, which the
architecture specifies ot help with backward compatibility of new
fields. The existing behaviour causes illegal instruction exceptions
when using new POWER10 sync variants that add new fields, after this
the instructions are accepted and are implemented as supersets of
the new behaviour, as intended.

Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-05-24 08:57:50 +10:00
..
alpha accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
arm accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
avr target/avr: Use translator_lduw 2024-05-15 08:55:19 +02:00
cris target/cris: Use cris_fetch in translate_v10.c.inc 2024-05-15 08:55:19 +02:00
hexagon target/hexagon: Use translator_ldl in pkt_crosses_page 2024-05-15 08:55:19 +02:00
hppa target/hppa: 2024-05-15 11:46:58 +02:00
i386 target-i386: hyper-v: Correct kvm_hv_handle_exit return value 2024-05-22 19:56:28 +02:00
loongarch target/loongarch: Add loongarch vector property unconditionally 2024-05-23 09:30:41 +08:00
m68k accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
microblaze target/microblaze: Use translator_ldl 2024-05-15 08:55:19 +02:00
mips accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
openrisc accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
ppc target/ppc: Move sync instructions to decodetree 2024-05-24 08:57:50 +10:00
riscv target/riscv: Use translator_ld* for everything 2024-05-15 08:55:19 +02:00
rx target/rx: Use translator_ld* 2024-05-15 08:55:19 +02:00
s390x target/s390x: Use translator_lduw in get_next_pc 2024-05-15 08:55:19 +02:00
sh4 accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
sparc accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
tricore accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
xtensa target/xtensa: Use translator_ldub in xtensa_insn_len 2024-05-15 08:55:19 +02:00
Kconfig meson: make target endianneess available to Kconfig 2024-05-03 15:47:47 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00