Atish Patra 0c83343ba3 hw/riscv: virt: Remove the redundant ipi-id property ... The imsic DT binding[1] has changed and no longer require an ipi-id. The latest IMSIC driver dynamically allocates ipi id if slow-ipi is not defined. Get rid of the unused dt property which may lead to confusion. [1] https://lore.kernel.org/lkml/20221111044207.1478350-5-apatel@ventanamicro.com/ Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221122080529.1692533-1-atishp@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2023-01-06 10:42:55 +10:00
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Kconfig	hw/riscv: Enable TPM backends	2022-04-29 10:48:48 +10:00
boot.c	riscv: re-randomize rng-seed on reboot	2022-10-27 11:34:31 +01:00
meson.build	hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines	2021-07-20 15:32:49 +02:00
microchip_pfsoc.c	hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals	2022-09-07 09:18:33 +02:00
numa.c	hw: Do not include qemu/log.h if it is not necessary	2021-05-02 17:24:50 +02:00
opentitan.c	hw/riscv/opentitan: add aon_timer base unimpl	2023-01-06 10:42:55 +10:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
shakti_c.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
sifive_e.c	hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan)	2022-05-24 10:38:50 +10:00
sifive_u.c	hw/riscv: set machine->fdt in sifive_u_machine_init()	2022-10-17 16:15:10 -03:00
spike.c	hw/riscv: set machine->fdt in spike_board_init()	2022-10-17 16:15:10 -03:00
virt.c	hw/riscv: virt: Remove the redundant ipi-id property	2023-01-06 10:42:55 +10:00