2 Commits

Author	SHA1	Message	Date
Richard Henderson	10dcb08b03	target/loongarch: Remove cpu_fcsr0 ... All of the fpu operations are defined with TCG_CALL_NO_WG, but they all modify FCSR0. The most efficient way to fix this is to remove cpu_fcsr0, and instead use explicit load and store operations for the two instructions that manipulate that value. Acked-by: Qi Hu <huqi@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Reported-by: Feiyang Chen <chenfeiyang@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>	2022-08-08 19:42:53 -07:00
Song Gao	b7dabd5624	target/loongarch: Add floating point move instruction translation ... This includes: - FMOV.{S/D} - FSEL - MOVGR2FR.{W/D}, MOVGR2FRH.W - MOVFR2GR.{S/D}, MOVFRH2GR.S - MOVGR2FCSR, MOVFCSR2GR - MOVFR2CF, MOVCF2FR - MOVGR2CF, MOVCF2GR Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-14-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>	2022-06-06 18:09:03 +00:00