4 Commits

Author	SHA1	Message	Date
aurel32	ac2e852285	sh4: sh_pci. Register resouces both at A7 and P4. ... Add resource registration both for P4 and A7. This is needed because of #5935 SH4: Eliminate P4 to A7 mangling. Additionally, {reg,iop,mem}base which is no longer used are removed. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6433 c046a42c-6fe2-441c-8c8c-71466251a162	2009-01-24 18:21:08 +00:00
blueswir1	1d6198c3b0	Remove unnecessary trailing newlines ... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162	2008-12-13 09:32:43 +00:00
balrog	d0ef528a3e	SH: Don't subtract bases from access addresses in PCIC. ... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5928 c046a42c-6fe2-441c-8c8c-71466251a162	2008-12-07 19:13:12 +00:00
balrog	1e5459a3fa	SH: On-chip PCI controller support (Takashi YOSHII). ... This patch adds SuperH on-chip PCI controller(PCIC) support. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5927 c046a42c-6fe2-441c-8c8c-71466251a162	2008-12-07 19:08:45 +00:00