Commit Graph

378 Commits

Author SHA1 Message Date
bellard 960540b4d2 GIF flag handling fix (Alexander Graf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4663 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 17:07:08 +00:00
bellard db620f46a8 reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 17:02:19 +00:00
bellard 914178d34b 32 bit SVM fixes - INVLPG and INVLPGA updates
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4660 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 13:53:05 +00:00
bellard 5efc27bbb6 EFER loading fixes, including SVME bit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4659 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 13:35:58 +00:00
ths 1235fc066a Spelling fixes, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-03 19:51:57 +00:00
bellard da260249a4 kqemu API change - allow use of kqemu with 32 bit QEMU on a 64 bit host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4628 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 20:48:25 +00:00
pbrook f8ed7070ea Fix typo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:54:15 +00:00
pbrook 6e68e076e7 Move clone() register setup to target specific code. Handle fork-like clone.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 17:22:15 +00:00
bellard 9133e39b84 Push common interrupt variables to cpu-defs.h (Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 10:08:06 +00:00
bellard ce5232c5c2 moved halted field to CPU_COMMON
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 17:14:10 +00:00
bellard 093f8f0632 force bit 1 in eflags load
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4606 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 16:25:20 +00:00
bellard 872929aa59 SVM rework
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 16:16:54 +00:00
bellard eaa728eec1 consistent naming for i386 TCG helper file
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4603 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 12:51:20 +00:00
bellard 26a5f13b8e variable dynamic translation buffer size
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4600 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 12:30:31 +00:00
bellard 2a449d1492 fixed x86_64 regression
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4586 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 21:01:05 +00:00
bellard 1e4840bf40 transformed TN into temporaries - add local temporaries usage when needed - optimized fcmovX
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4577 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 17:26:41 +00:00
pbrook 9b7b85d260 Fix off-by-one unwinding error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 00:36:06 +00:00
pbrook 60ea3b6137 Fix A20 debug dumps.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4556 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 14:48:38 +00:00
pbrook cb63669a54 Fix ARM conditional branch bug.
Add tcg_gen_brcondi.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
bellard 70cff25e78 use debug_insn_start to have nicer debug traces
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4532 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 17:00:49 +00:00
bellard 437a88a51c proper helper definition registering (all targets must do that)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4530 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 16:11:04 +00:00
bellard c1c379686f optimization of shifts by a constant
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4524 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 12:36:31 +00:00
bellard 12e26b75d4 lahf/sahf cpuid test
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 10:13:38 +00:00
bellard 1b9d9ebb8a cmpxchg8b fix - added cmpxchg16b
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4522 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 09:52:38 +00:00
bellard 1130328ecb cmpxchg 64 bit fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4521 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 09:36:08 +00:00
bellard d6205959f9 fxsave/fxrstor 64 bit fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4520 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 09:20:43 +00:00
bellard 8e1c85e372 converted conditional jumps, SET and CMOVx to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4518 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 19:16:45 +00:00
bellard 651ba608e2 converted env access to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4516 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 17:16:11 +00:00
bellard bd7a7b33df convert eflags manipulation insns to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 17:07:20 +00:00
bellard 3bd7da9e18 convert remaining segment handling to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4514 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:34:06 +00:00
bellard cec6843e87 converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:25:27 +00:00
bellard 839bca8467 suppressed no longer used ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:34:27 +00:00
bellard 07be379fb1 converted INTO/CMPXCHG8B to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:29:45 +00:00
bellard 9d0763c4c0 converted BCD ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4509 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:24:30 +00:00
bellard 0211e5aff9 converted MUL/IMUL to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 10:12:54 +00:00
bellard 6e0d8677cb converted string OPs and LOOP insns to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4494 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 19:28:26 +00:00
bellard cd31fefaf2 fixed INC/DEC condition codes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4493 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 19:19:57 +00:00
bellard e108dd01ce converted sign extension ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4481 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 19:24:07 +00:00
bellard bbf662ee31 MONITOR insn address generation fix - converted XLAT to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4479 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 19:05:28 +00:00
bellard 6191b05901 BSR/BSF TCG conversion
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 18:44:58 +00:00
bellard f484d38622 converted bit test operations to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4473 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 16:10:38 +00:00
bellard 07d2c59558 moved eflags computation outside op.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4472 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 13:57:33 +00:00
bellard cad3a37d3e converted adc, sbb, cmpxchg to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4471 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 13:50:02 +00:00
bellard b6abf97df1 converted condition code supprot to TCG - converted shift ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:44:31 +00:00
bellard b8b6a50b55 converted more helpers to TCG - fixed some SVM issues
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 16:46:30 +00:00
bellard 044ef8eaa9 i386 specific TODO
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4454 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13 18:27:16 +00:00
bellard 3bd8c5e4f1 compilation fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4449 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:55:35 +00:00
bellard b5b38f61b8 converted more helpers to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4447 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:05:13 +00:00
bellard dbd02bdf79 removed unused code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4446 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:03:14 +00:00
bellard ba7cd150ff FPU fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4445 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 20:30:28 +00:00
bellard 19e6c4b8bc converted x87 FPU ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4444 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 19:10:44 +00:00
bellard 5af451868c converted SSE/MMX ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4441 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 16:47:36 +00:00
bellard 8686c490f7 use TCG for MMX/SSE memory accesses
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4439 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 13:55:27 +00:00
bellard 75d28b0595 char is only for strings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 12:08:29 +00:00
bellard edea5f0193 no need to define global registers in cpu-exec.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4409 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 11:01:31 +00:00
aurel32 7caa33f7be Correctly save and restore env->a20_mask now that it is a 64-bit
variable. Noticed by Erik de Castro Lopo.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4334 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 20:11:44 +00:00
aurel32 8dd3dca351 remove target ifdefs from vl.c
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:11:44 +00:00
aurel32 d2856f1ad4 Factorize code in translate.c
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
aurel32 00f82b8a31 Use correct types to enable > 2G support, based on a patch from
Anthony Liguori.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-27 21:12:55 +00:00
aurel32 a23a663b65 Fix PHYS_ADDR_MASK: upper bits of a PTE are reserved so they are 52 bits
long. Thanks to Paul Brook for noticing that.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4242 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 21:57:57 +00:00
aurel32 0ba5f006bb x86/x86-64 MMU PAE fixes
This patch fixes MMU emulation in PAE mode for > 4GB physical addresses:
- a20_mask should have the correct size to not clear the high part of
  the addresses.
- PHYS_ADDR_MASK should not clear the high part of the addresses.
- pdpe, pde and pte could be located anywhere in memory on x86-64, but
  only in the first 4GB on x86, define their pointer to as target_ulong.
- pml4e_addr could be located anywhere in memory, define its pointer
  as uint64_t.
- paddr represents a physical address and thus should be of type
  target_phys_addr_t.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4239 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 20:37:43 +00:00
aurel32 474ea8494a x86: Introduce CPU_INTERRUPT_NMI
(Jan Kiszka)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4205 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 16:08:15 +00:00
aurel32 ca10f86763 Remove osdep.c/qemu-img code duplication
(Kevin Wolf)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
aurel32 1570de2df1 Remove unused phys_ram_base definition from target-i386/helper.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 04:55:24 +00:00
aurel32 e771edab0d Check for 3DNow! CPUID at translation time
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4184 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-09 06:41:37 +00:00
aurel32 27985df9cc Fix typo in x86 CPU definitions introduced in r4181
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4183 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08 20:01:34 +00:00
aurel32 d73bd7ebec Remove hardcoded values in x86 CPU definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4181 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08 19:51:36 +00:00
aurel32 a35f3ec76b 3DNow! instruction set emulation
(Michael Tross)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4180 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08 19:51:29 +00:00
aurel32 f94f718195 x86-64: recompute DF after eflags has been modified when emulating SYSCALL
(Jakub Jermar)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-28 22:30:30 +00:00
blueswir1 3f47aa8c37 Fix some functions declared () rather than (void) (Ian Jackson)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4029 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-09 06:59:01 +00:00
blueswir1 f8422f52fd More helper types, rearrange generic definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 07:45:43 +00:00
pbrook ac56dd4812 Add TCG variable opaque type.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3961 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03 19:56:33 +00:00
balrog 7241f532c3 NMI and INTR events injection should not be handled as software interrupts (Bernhard Kauer).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3952 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03 03:26:30 +00:00
balrog 3d575329a5 Make SVM env->cr[8] a valid register (patch from TeLeMan).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3950 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03 02:42:36 +00:00
bellard 57fec1fee9 use the TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
balrog 3e98dc8ec6 Correct the max cpuid level for each x86 cpu model (Dan Kenigsberg).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3847 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24 14:04:06 +00:00
balrog 45d242b65b SVM enabled processor should provide cpuid Fn8000_000A (Bernhard Kauer).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3844 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24 13:36:00 +00:00
balrog 71c3558ed2 Fix cmpxchg8b translation (Bernhard Kauer).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3843 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24 13:29:55 +00:00
balrog b26177d7ec Make SVM IOIO intercept check all needed bits, by Bernhard Kauer.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3792 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 23:39:22 +00:00
balrog df01e0fc33 Add rdpmc SVM intercept, by Bernhard Kauer.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3791 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 23:35:27 +00:00
ths 867e2400d6 Fix spelling typo, by Dan Kenigsberg.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3782 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:43:19 +00:00
ths 01ba98161f Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
bellard 0b1b91c77c typo fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3715 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21 16:18:21 +00:00
pbrook 9596ebb701 Add statics and missing #includes for prototypes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 01:44:38 +00:00
bellard d2fd1af767 x86_64 linux user emulation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3646 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-14 18:08:56 +00:00
bellard 6f12a2a6ea consistent types for cpu_x86_fsave and cpu_x86_frstor
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3621 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 22:16:56 +00:00
bellard bd37ec2141 removed warning
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 19:50:22 +00:00
bellard aaed909a49 added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
bellard ec6338bac3 removed obsolete x86 code copy support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3551 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08 14:25:03 +00:00
bellard 838104f608 removed
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3550 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08 14:24:28 +00:00
bellard a049de6161 added -cpu option for x86 (initial patch by Dan Kenigsberg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3547 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08 13:28:47 +00:00
j_mayer 7a51ad822f For consistency, move muls64 / mulu64 prototypes to host-utils.h
Make x86_64 optimized versions inline.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3523 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-04 02:24:58 +00:00
ths 80210bcd71 Fix compiler warnings, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3507 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-02 19:08:57 +00:00
balrog ad8488750b Correct the WBINVD intercept in SVM (Alexander Graf).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3499 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-31 02:01:33 +00:00
ths 273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored").
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
ths 5592a750b9 The other half of the mul64 rework. Sorry for the breakage, I committed
an incomplete version of what I tested.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-26 22:35:02 +00:00
j_mayer 6ebbf39000 Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
ths 198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h.
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 16:44:32 +00:00
ths a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 13:57:58 +00:00
ths 526216880d SVM VINTR fix, by Alexander Graf.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3248 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27 01:52:00 +00:00