mirror of https://github.com/xemu-project/xemu.git
851 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Liav Albani
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43b6277ac2 |
tests/acpi: i386: allow FACP acpi table changes
The FACP table is going to be changed for x86/q35 machines. To be sure the following changes are not breaking any QEMU test this change follows step 2 from the bios-tables-test.c guide on changes that affect ACPI tables. Signed-off-by: Liav Albani <liavalb@gmail.com> Acked-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220304154032.2071585-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jean-Philippe Brucker
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25a289f4c0 |
tests/qtest/virtio-iommu-test: Check bypass config
The bypass config field should be initialized to 1 by default. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-Id: <20220214124356.872985-5-jean-philippe@linaro.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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6629bf78aa |
target-arm queue:
* mps3-an547: Add missing user ahb interfaces
* hw/arm/mps2-tz.c: Update AN547 documentation URL
* hw/input/tsc210x: Don't abort on bad SPI word widths
* hw/i2c: flatten pca954x mux device
* target/arm: Support PSCI 1.1 and SMCCC 1.0
* target/arm: Fix early free of TCG temp in handle_simd_shift_fpint_conv()
* tests/qtest: add qtests for npcm7xx sdhci
* Implement FEAT_LVA
* Implement FEAT_LPA
* Implement FEAT_LPA2 (but do not enable it yet)
* Report KVM's actual PSCI version to guest in dtb
* ui/cocoa.m: Fix updateUIInfo threading issues
* ui/cocoa.m: Remove unnecessary NSAutoreleasePools
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmIf2PYZHHBldGVyLm1h
eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3jPkD/91FqRiubeyDEuuV77YMN3y
AXA0He8FJ4TgfCZ4e9IT2rA5lyYvFdx0c6TUmFKc3JJ2omhP+35sT+7qolsuhKhF
JHIvULVMakazbna4tanuQN6fTPrdhnUtVdXDTbadvdjzyWtkiMSs/Mn6YT5kmUQ+
VRrks4GjB3Ckrne/45nNO5fnt9cTP1+36+1nRUk0/4SdK7BnMR332KRMj6NexVdT
Ae3usp8wcJuwojCiDqkN6ov7LdbjLxKFl2tzyjfHHaOAjBJ4FgyLsR66QtY6BH+8
O8Uelx6/AYZ8o/CLqgimcG1ZQm8onGktKhMdg95TAWhRHPMWX0BXtVq1nYWt1e2+
O7ONbJdKYG6V7Qm9+cu8H7kzW7LU+iBabZ3dL3H5cpciuGWtvPT2ASfqTGKUbbyS
gyC5esy4m4pw+saebMKfLcuNr7DbB+0f7OQnprmfTTecBUdHwtT8s1TRXZF0glQS
zMzUcbMMWYakdNA+iPH/xRax3+S359W5oq3Q2yqHnrcyNj4kgYKHnhD8IPIsVUQo
IJwC/T6OwQlUP1s/EdMI1FV63Wz7RTzsUVcVjkQGJOOeA2vOLszm/AUtDDgJhn38
/J6fN6drkxr69X9H/EjJIRGB4VL13lk/TA1zBTnxr46R2TnI8aLxHrh8G9Ruj2zN
kosJ1Le5oyzDgz/6xZ0biQ==
=CUTQ
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20220302' into staging
target-arm queue:
* mps3-an547: Add missing user ahb interfaces
* hw/arm/mps2-tz.c: Update AN547 documentation URL
* hw/input/tsc210x: Don't abort on bad SPI word widths
* hw/i2c: flatten pca954x mux device
* target/arm: Support PSCI 1.1 and SMCCC 1.0
* target/arm: Fix early free of TCG temp in handle_simd_shift_fpint_conv()
* tests/qtest: add qtests for npcm7xx sdhci
* Implement FEAT_LVA
* Implement FEAT_LPA
* Implement FEAT_LPA2 (but do not enable it yet)
* Report KVM's actual PSCI version to guest in dtb
* ui/cocoa.m: Fix updateUIInfo threading issues
* ui/cocoa.m: Remove unnecessary NSAutoreleasePools
# gpg: Signature made Wed 02 Mar 2022 20:52:06 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20220302: (26 commits)
ui/cocoa.m: Remove unnecessary NSAutoreleasePools
ui/cocoa.m: Fix updateUIInfo threading issues
target/arm: Report KVM's actual PSCI version to guest in dtb
target/arm: Implement FEAT_LPA2
target/arm: Advertise all page sizes for -cpu max
target/arm: Validate tlbi TG matches translation granule in use
target/arm: Fix TLBIRange.base for 16k and 64k pages
target/arm: Introduce tlbi_aa64_get_range
target/arm: Extend arm_fi_to_lfsc to level -1
target/arm: Implement FEAT_LPA
target/arm: Implement FEAT_LVA
target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA
target/arm: Honor TCR_ELx.{I}PS
target/arm: Use MAKE_64BIT_MASK to compute indexmask
target/arm: Pass outputsize down to check_s2_mmu_setup
target/arm: Move arm_pamax out of line
target/arm: Fault on invalid TCR_ELx.TxSZ
target/arm: Set TCR_EL1.TSZ for user-only
hw/registerfields: Add FIELD_SEX<N> and FIELD_SDP<N>
tests/qtest: add qtests for npcm7xx sdhci
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Shengtan Mao
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4c579e15bd |
tests/qtest: add qtests for npcm7xx sdhci
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Chris Rauer <crauer@google.com> Signed-off-by: Shengtan Mao <stmao@google.com> Signed-off-by: Patrick Venture <venture@google.com> Message-id: 20220225174451.192304-1-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Xu
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3ff5740187 |
tests: Pass in MigrateStart** into test_migrate_start()
test_migrate_start() will release the MigrateStart structure that passed in, however that's not super clear to the caller because after the call returned the pointer can still be referenced by the callers. It can easily be a source of use-after-free. Let's pass in a double pointer of that, then we can safely clear the pointer for the caller after the struct is released. Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20220301083925.33483-26-peterx@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> dgilbert: Fixup apply since I didn't take 24/25 |
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Laurent Vivier
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e20977b797 |
tests/qtest: failover: migration abort test with failover off
Test abort during active migration when failover is disabled from QEMU or from guest side. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-8-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Laurent Vivier
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d9872c00f7 |
tests/qtest: failover: test migration if the guest doesn't support failover
The primary device is not plugged and the migration is done only with the standby device Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-7-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Laurent Vivier
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7f998491ae |
tests/qtest: failover: check migration with failover off
If failover is off, the primary device is not plugged and the migration is done only with the standby device. On destination, the primary device must not be plugged. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-6-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Laurent Vivier
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78475083f7 |
tests/qtest: failover: check missing guest feature
If QEMU provides the VIRTIO_NET_F_STANDBY feature but the guest doesn't the primary device must be kept hidden Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-5-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Laurent Vivier
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93262464d2 |
tests/qtest: failover: check the feature is correctly provided
Check QEMU provides the VIRTIO_NET_F_STANDBY if failover is on, and doesn't if failover is off Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-4-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Laurent Vivier
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1a800870c5 |
tests/qtest: failover: use a macro for check_one_card()
This allows g_assert() to correctly report the line number of the error in the test case. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-3-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Laurent Vivier
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fbd2913cce |
tests/qtest: failover: clean up pathname of tests
clearly indentify parameters, hotplug and migration tests Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-2-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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546f292d63 |
tests/qtest/ide-test: Remove bad retry_isa test
The retry_isa test is not doing what it was intended for: The test_retry_flush() function ignores the machine parameter completely and thus this test does not get run with the "isapc" machine. Moreover, in the course of time, the test_retry_flush() has been changed to depend on PCI-related functions, so this also cannot be fixed by simply using the machine parameter now. The correct fix would be to switch the whole test to libqos, but until someone has time to do this, let's simply drop the retry_isa test for now. Message-Id: <20220121120635.220644-1-thuth@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Eric Auger
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d24d1ad3c4 |
tests/qtest/vhost-user-test.c: Use vhostforce=on
-netdev vhost-user,vhostforce is deprecated and vhostforce=on should be used instead. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220210145254.157790-2-eric.auger@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Michael S. Tsirkin
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c4407f19bd |
erst: drop cast to long long
The way to print uint64_t is with PRIx64, not with a cast to long long. Message-Id: <20220206093547.1282513-1-mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Dr. David Alan Gilbert
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7b172333f1 |
tests/x86: Use 'pc' machine type for hotplug tests
Hotplug tests need a bridge setting up on q35, for now keep them on 'pc'. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220215162537.605030-3-dgilbert@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Dr. David Alan Gilbert
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fedcc3793e |
tests/x86: Use 'pc' machine type for old hardware tests
For tests that rely on old hardware, e.g. floppies or IDE drives, explicitly select the 'pc' machine type. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220215162537.605030-2-dgilbert@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Greg Kurz
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494fbbd3ed |
tests/9pfs: Use g_autofree and g_autoptr where possible
It is recommended to use g_autofree or g_autoptr as it reduces the odds of introducing memory leaks in future changes. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20220201151508.190035-3-groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Greg Kurz
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ba6112e40c |
tests/9pfs: Fix leak of local_test_path
local_test_path is allocated in virtio_9p_create_local_test_dir() to hold the path of the temporary directory. It should be freed in virtio_9p_remove_local_test_dir() when the temporary directory is removed. Clarify the lifecycle of local_test_path while here. Based-on: <f6602123c6f7d0d593466231b04fba087817abbd.1642879848.git.qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20220201151508.190035-2-groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> |
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Christian Schoenebeck
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68c66a96c8 |
tests/9pfs: fix mkdir() being called twice
The 9p test cases use mkdtemp() to create a temporary directory for
running the 'local' 9p tests with real files/dirs. Unlike mktemp()
which only generates a unique file name, mkdtemp() also creates the
directory, therefore the subsequent mkdir() was wrong and caused
errors on some systems.
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Fixes:
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Christian Schoenebeck
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65ceee0ae5 |
tests/9pfs: use g_autofree where possible
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <E1mn1fA-0005qZ-TM@lizzy.crudebyte.com> |
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Alex Bennée
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8dcb404bff |
tests/qtest: enable more vhost-user tests by default
If this starts causing failures again we should probably fix that. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220204204335.1689602-3-alex.bennee@linaro.org> |
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Kevin Townsend
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4fd1ebb105 |
hw/sensor: Add lsm303dlhc magnetometer device
This commit adds emulation of the magnetometer on the LSM303DLHC. It allows the magnetometer's X, Y and Z outputs to be set via the mag-x, mag-y and mag-z properties, as well as the 12-bit temperature output via the temperature property. Sensor can be enabled with 'CONFIG_LSM303DLHC_MAG=y'. Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org> Message-id: 20220130095032.35392-1-kevin.townsend@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Eric DeVolder
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a4752a51f1 |
ACPI ERST: step 6 of bios-tables-test.c
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 6.
Below is the disassembly of tests/data/acpi/pc/ERST.acpierst.
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180508 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/ERST.acpierst, Thu Dec 2 13:32:07 2021
*
* ACPI Data Table [ERST]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "ERST" [Error Record Serialization Table]
[004h 0004 4] Table Length : 00000390
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : D6
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Serialization Header Length : 00000030
[028h 0040 4] Reserved : 00000000
[02Ch 0044 4] Instruction Entry Count : 0000001B
[030h 0048 1] Action : 00 [Begin Write Operation]
[031h 0049 1] Instruction : 03 [Write Register Value]
[032h 0050 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[033h 0051 1] Reserved : 00
[034h 0052 12] Register Region : [Generic Address Structure]
[034h 0052 1] Space ID : 00 [SystemMemory]
[035h 0053 1] Bit Width : 20
[036h 0054 1] Bit Offset : 00
[037h 0055 1] Encoded Access Width : 03 [DWord Access:32]
[038h 0056 8] Address : 00000000FEBF3000
[040h 0064 8] Value : 0000000000000000
[048h 0072 8] Mask : 00000000000000FF
[050h 0080 1] Action : 01 [Begin Read Operation]
[051h 0081 1] Instruction : 03 [Write Register Value]
[052h 0082 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[053h 0083 1] Reserved : 00
[054h 0084 12] Register Region : [Generic Address Structure]
[054h 0084 1] Space ID : 00 [SystemMemory]
[055h 0085 1] Bit Width : 20
[056h 0086 1] Bit Offset : 00
[057h 0087 1] Encoded Access Width : 03 [DWord Access:32]
[058h 0088 8] Address : 00000000FEBF3000
[060h 0096 8] Value : 0000000000000001
[068h 0104 8] Mask : 00000000000000FF
[070h 0112 1] Action : 02 [Begin Clear Operation]
[071h 0113 1] Instruction : 03 [Write Register Value]
[072h 0114 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[073h 0115 1] Reserved : 00
[074h 0116 12] Register Region : [Generic Address Structure]
[074h 0116 1] Space ID : 00 [SystemMemory]
[075h 0117 1] Bit Width : 20
[076h 0118 1] Bit Offset : 00
[077h 0119 1] Encoded Access Width : 03 [DWord Access:32]
[078h 0120 8] Address : 00000000FEBF3000
[080h 0128 8] Value : 0000000000000002
[088h 0136 8] Mask : 00000000000000FF
[090h 0144 1] Action : 03 [End Operation]
[091h 0145 1] Instruction : 03 [Write Register Value]
[092h 0146 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[093h 0147 1] Reserved : 00
[094h 0148 12] Register Region : [Generic Address Structure]
[094h 0148 1] Space ID : 00 [SystemMemory]
[095h 0149 1] Bit Width : 20
[096h 0150 1] Bit Offset : 00
[097h 0151 1] Encoded Access Width : 03 [DWord Access:32]
[098h 0152 8] Address : 00000000FEBF3000
[0A0h 0160 8] Value : 0000000000000003
[0A8h 0168 8] Mask : 00000000000000FF
[0B0h 0176 1] Action : 04 [Set Record Offset]
[0B1h 0177 1] Instruction : 02 [Write Register]
[0B2h 0178 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[0B3h 0179 1] Reserved : 00
[0B4h 0180 12] Register Region : [Generic Address Structure]
[0B4h 0180 1] Space ID : 00 [SystemMemory]
[0B5h 0181 1] Bit Width : 20
[0B6h 0182 1] Bit Offset : 00
[0B7h 0183 1] Encoded Access Width : 03 [DWord Access:32]
[0B8h 0184 8] Address : 00000000FEBF3008
[0C0h 0192 8] Value : 0000000000000000
[0C8h 0200 8] Mask : 00000000FFFFFFFF
[0D0h 0208 1] Action : 04 [Set Record Offset]
[0D1h 0209 1] Instruction : 03 [Write Register Value]
[0D2h 0210 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[0D3h 0211 1] Reserved : 00
[0D4h 0212 12] Register Region : [Generic Address Structure]
[0D4h 0212 1] Space ID : 00 [SystemMemory]
[0D5h 0213 1] Bit Width : 20
[0D6h 0214 1] Bit Offset : 00
[0D7h 0215 1] Encoded Access Width : 03 [DWord Access:32]
[0D8h 0216 8] Address : 00000000FEBF3000
[0E0h 0224 8] Value : 0000000000000004
[0E8h 0232 8] Mask : 00000000000000FF
[0F0h 0240 1] Action : 05 [Execute Operation]
[0F1h 0241 1] Instruction : 03 [Write Register Value]
[0F2h 0242 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[0F3h 0243 1] Reserved : 00
[0F4h 0244 12] Register Region : [Generic Address Structure]
[0F4h 0244 1] Space ID : 00 [SystemMemory]
[0F5h 0245 1] Bit Width : 20
[0F6h 0246 1] Bit Offset : 00
[0F7h 0247 1] Encoded Access Width : 03 [DWord Access:32]
[0F8h 0248 8] Address : 00000000FEBF3008
[100h 0256 8] Value : 000000000000009C
[108h 0264 8] Mask : 00000000000000FF
[110h 0272 1] Action : 05 [Execute Operation]
[111h 0273 1] Instruction : 03 [Write Register Value]
[112h 0274 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[113h 0275 1] Reserved : 00
[114h 0276 12] Register Region : [Generic Address Structure]
[114h 0276 1] Space ID : 00 [SystemMemory]
[115h 0277 1] Bit Width : 20
[116h 0278 1] Bit Offset : 00
[117h 0279 1] Encoded Access Width : 03 [DWord Access:32]
[118h 0280 8] Address : 00000000FEBF3000
[120h 0288 8] Value : 0000000000000005
[128h 0296 8] Mask : 00000000000000FF
[130h 0304 1] Action : 06 [Check Busy Status]
[131h 0305 1] Instruction : 03 [Write Register Value]
[132h 0306 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[133h 0307 1] Reserved : 00
[134h 0308 12] Register Region : [Generic Address Structure]
[134h 0308 1] Space ID : 00 [SystemMemory]
[135h 0309 1] Bit Width : 20
[136h 0310 1] Bit Offset : 00
[137h 0311 1] Encoded Access Width : 03 [DWord Access:32]
[138h 0312 8] Address : 00000000FEBF3000
[140h 0320 8] Value : 0000000000000006
[148h 0328 8] Mask : 00000000000000FF
[150h 0336 1] Action : 06 [Check Busy Status]
[151h 0337 1] Instruction : 01 [Read Register Value]
[152h 0338 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[153h 0339 1] Reserved : 00
[154h 0340 12] Register Region : [Generic Address Structure]
[154h 0340 1] Space ID : 00 [SystemMemory]
[155h 0341 1] Bit Width : 20
[156h 0342 1] Bit Offset : 00
[157h 0343 1] Encoded Access Width : 03 [DWord Access:32]
[158h 0344 8] Address : 00000000FEBF3008
[160h 0352 8] Value : 0000000000000001
[168h 0360 8] Mask : 00000000000000FF
[170h 0368 1] Action : 07 [Get Command Status]
[171h 0369 1] Instruction : 03 [Write Register Value]
[172h 0370 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[173h 0371 1] Reserved : 00
[174h 0372 12] Register Region : [Generic Address Structure]
[174h 0372 1] Space ID : 00 [SystemMemory]
[175h 0373 1] Bit Width : 20
[176h 0374 1] Bit Offset : 00
[177h 0375 1] Encoded Access Width : 03 [DWord Access:32]
[178h 0376 8] Address : 00000000FEBF3000
[180h 0384 8] Value : 0000000000000007
[188h 0392 8] Mask : 00000000000000FF
[190h 0400 1] Action : 07 [Get Command Status]
[191h 0401 1] Instruction : 00 [Read Register]
[192h 0402 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[193h 0403 1] Reserved : 00
[194h 0404 12] Register Region : [Generic Address Structure]
[194h 0404 1] Space ID : 00 [SystemMemory]
[195h 0405 1] Bit Width : 20
[196h 0406 1] Bit Offset : 00
[197h 0407 1] Encoded Access Width : 03 [DWord Access:32]
[198h 0408 8] Address : 00000000FEBF3008
[1A0h 0416 8] Value : 0000000000000000
[1A8h 0424 8] Mask : 00000000000000FF
[1B0h 0432 1] Action : 08 [Get Record Identifier]
[1B1h 0433 1] Instruction : 03 [Write Register Value]
[1B2h 0434 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[1B3h 0435 1] Reserved : 00
[1B4h 0436 12] Register Region : [Generic Address Structure]
[1B4h 0436 1] Space ID : 00 [SystemMemory]
[1B5h 0437 1] Bit Width : 20
[1B6h 0438 1] Bit Offset : 00
[1B7h 0439 1] Encoded Access Width : 03 [DWord Access:32]
[1B8h 0440 8] Address : 00000000FEBF3000
[1C0h 0448 8] Value : 0000000000000008
[1C8h 0456 8] Mask : 00000000000000FF
[1D0h 0464 1] Action : 08 [Get Record Identifier]
[1D1h 0465 1] Instruction : 00 [Read Register]
[1D2h 0466 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[1D3h 0467 1] Reserved : 00
[1D4h 0468 12] Register Region : [Generic Address Structure]
[1D4h 0468 1] Space ID : 00 [SystemMemory]
[1D5h 0469 1] Bit Width : 40
[1D6h 0470 1] Bit Offset : 00
[1D7h 0471 1] Encoded Access Width : 04 [QWord Access:64]
[1D8h 0472 8] Address : 00000000FEBF3008
[1E0h 0480 8] Value : 0000000000000000
[1E8h 0488 8] Mask : FFFFFFFFFFFFFFFF
[1F0h 0496 1] Action : 09 [Set Record Identifier]
[1F1h 0497 1] Instruction : 02 [Write Register]
[1F2h 0498 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[1F3h 0499 1] Reserved : 00
[1F4h 0500 12] Register Region : [Generic Address Structure]
[1F4h 0500 1] Space ID : 00 [SystemMemory]
[1F5h 0501 1] Bit Width : 40
[1F6h 0502 1] Bit Offset : 00
[1F7h 0503 1] Encoded Access Width : 04 [QWord Access:64]
[1F8h 0504 8] Address : 00000000FEBF3008
[200h 0512 8] Value : 0000000000000000
[208h 0520 8] Mask : FFFFFFFFFFFFFFFF
[210h 0528 1] Action : 09 [Set Record Identifier]
[211h 0529 1] Instruction : 03 [Write Register Value]
[212h 0530 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[213h 0531 1] Reserved : 00
[214h 0532 12] Register Region : [Generic Address Structure]
[214h 0532 1] Space ID : 00 [SystemMemory]
[215h 0533 1] Bit Width : 20
[216h 0534 1] Bit Offset : 00
[217h 0535 1] Encoded Access Width : 03 [DWord Access:32]
[218h 0536 8] Address : 00000000FEBF3000
[220h 0544 8] Value : 0000000000000009
[228h 0552 8] Mask : 00000000000000FF
[230h 0560 1] Action : 0A [Get Record Count]
[231h 0561 1] Instruction : 03 [Write Register Value]
[232h 0562 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[233h 0563 1] Reserved : 00
[234h 0564 12] Register Region : [Generic Address Structure]
[234h 0564 1] Space ID : 00 [SystemMemory]
[235h 0565 1] Bit Width : 20
[236h 0566 1] Bit Offset : 00
[237h 0567 1] Encoded Access Width : 03 [DWord Access:32]
[238h 0568 8] Address : 00000000FEBF3000
[240h 0576 8] Value : 000000000000000A
[248h 0584 8] Mask : 00000000000000FF
[250h 0592 1] Action : 0A [Get Record Count]
[251h 0593 1] Instruction : 00 [Read Register]
[252h 0594 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[253h 0595 1] Reserved : 00
[254h 0596 12] Register Region : [Generic Address Structure]
[254h 0596 1] Space ID : 00 [SystemMemory]
[255h 0597 1] Bit Width : 20
[256h 0598 1] Bit Offset : 00
[257h 0599 1] Encoded Access Width : 03 [DWord Access:32]
[258h 0600 8] Address : 00000000FEBF3008
[260h 0608 8] Value : 0000000000000000
[268h 0616 8] Mask : 00000000FFFFFFFF
[270h 0624 1] Action : 0B [Begin Dummy Write]
[271h 0625 1] Instruction : 03 [Write Register Value]
[272h 0626 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[273h 0627 1] Reserved : 00
[274h 0628 12] Register Region : [Generic Address Structure]
[274h 0628 1] Space ID : 00 [SystemMemory]
[275h 0629 1] Bit Width : 20
[276h 0630 1] Bit Offset : 00
[277h 0631 1] Encoded Access Width : 03 [DWord Access:32]
[278h 0632 8] Address : 00000000FEBF3000
[280h 0640 8] Value : 000000000000000B
[288h 0648 8] Mask : 00000000000000FF
[290h 0656 1] Action : 0D [Get Error Address Range]
[291h 0657 1] Instruction : 03 [Write Register Value]
[292h 0658 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[293h 0659 1] Reserved : 00
[294h 0660 12] Register Region : [Generic Address Structure]
[294h 0660 1] Space ID : 00 [SystemMemory]
[295h 0661 1] Bit Width : 20
[296h 0662 1] Bit Offset : 00
[297h 0663 1] Encoded Access Width : 03 [DWord Access:32]
[298h 0664 8] Address : 00000000FEBF3000
[2A0h 0672 8] Value : 000000000000000D
[2A8h 0680 8] Mask : 00000000000000FF
[2B0h 0688 1] Action : 0D [Get Error Address Range]
[2B1h 0689 1] Instruction : 00 [Read Register]
[2B2h 0690 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[2B3h 0691 1] Reserved : 00
[2B4h 0692 12] Register Region : [Generic Address Structure]
[2B4h 0692 1] Space ID : 00 [SystemMemory]
[2B5h 0693 1] Bit Width : 40
[2B6h 0694 1] Bit Offset : 00
[2B7h 0695 1] Encoded Access Width : 04 [QWord Access:64]
[2B8h 0696 8] Address : 00000000FEBF3008
[2C0h 0704 8] Value : 0000000000000000
[2C8h 0712 8] Mask : FFFFFFFFFFFFFFFF
[2D0h 0720 1] Action : 0E [Get Error Address Length]
[2D1h 0721 1] Instruction : 03 [Write Register Value]
[2D2h 0722 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[2D3h 0723 1] Reserved : 00
[2D4h 0724 12] Register Region : [Generic Address Structure]
[2D4h 0724 1] Space ID : 00 [SystemMemory]
[2D5h 0725 1] Bit Width : 20
[2D6h 0726 1] Bit Offset : 00
[2D7h 0727 1] Encoded Access Width : 03 [DWord Access:32]
[2D8h 0728 8] Address : 00000000FEBF3000
[2E0h 0736 8] Value : 000000000000000E
[2E8h 0744 8] Mask : 00000000000000FF
[2F0h 0752 1] Action : 0E [Get Error Address Length]
[2F1h 0753 1] Instruction : 00 [Read Register]
[2F2h 0754 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[2F3h 0755 1] Reserved : 00
[2F4h 0756 12] Register Region : [Generic Address Structure]
[2F4h 0756 1] Space ID : 00 [SystemMemory]
[2F5h 0757 1] Bit Width : 40
[2F6h 0758 1] Bit Offset : 00
[2F7h 0759 1] Encoded Access Width : 04 [QWord Access:64]
[2F8h 0760 8] Address : 00000000FEBF3008
[300h 0768 8] Value : 0000000000000000
[308h 0776 8] Mask : 00000000FFFFFFFF
[310h 0784 1] Action : 0F [Get Error Attributes]
[311h 0785 1] Instruction : 03 [Write Register Value]
[312h 0786 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[313h 0787 1] Reserved : 00
[314h 0788 12] Register Region : [Generic Address Structure]
[314h 0788 1] Space ID : 00 [SystemMemory]
[315h 0789 1] Bit Width : 20
[316h 0790 1] Bit Offset : 00
[317h 0791 1] Encoded Access Width : 03 [DWord Access:32]
[318h 0792 8] Address : 00000000FEBF3000
[320h 0800 8] Value : 000000000000000F
[328h 0808 8] Mask : 00000000000000FF
[330h 0816 1] Action : 0F [Get Error Attributes]
[331h 0817 1] Instruction : 00 [Read Register]
[332h 0818 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[333h 0819 1] Reserved : 00
[334h 0820 12] Register Region : [Generic Address Structure]
[334h 0820 1] Space ID : 00 [SystemMemory]
[335h 0821 1] Bit Width : 20
[336h 0822 1] Bit Offset : 00
[337h 0823 1] Encoded Access Width : 03 [DWord Access:32]
[338h 0824 8] Address : 00000000FEBF3008
[340h 0832 8] Value : 0000000000000000
[348h 0840 8] Mask : 00000000FFFFFFFF
[350h 0848 1] Action : 10 [Execute Timings]
[351h 0849 1] Instruction : 03 [Write Register Value]
[352h 0850 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[353h 0851 1] Reserved : 00
[354h 0852 12] Register Region : [Generic Address Structure]
[354h 0852 1] Space ID : 00 [SystemMemory]
[355h 0853 1] Bit Width : 20
[356h 0854 1] Bit Offset : 00
[357h 0855 1] Encoded Access Width : 03 [DWord Access:32]
[358h 0856 8] Address : 00000000FEBF3000
[360h 0864 8] Value : 0000000000000010
[368h 0872 8] Mask : 00000000000000FF
[370h 0880 1] Action : 10 [Execute Timings]
[371h 0881 1] Instruction : 00 [Read Register]
[372h 0882 1] Flags (decoded below) : 00
Preserve Register Bits : 0
[373h 0883 1] Reserved : 00
[374h 0884 12] Register Region : [Generic Address Structure]
[374h 0884 1] Space ID : 00 [SystemMemory]
[375h 0885 1] Bit Width : 40
[376h 0886 1] Bit Offset : 00
[377h 0887 1] Encoded Access Width : 04 [QWord Access:64]
[378h 0888 8] Address : 00000000FEBF3008
[380h 0896 8] Value : 0000000000000000
[388h 0904 8] Mask : FFFFFFFFFFFFFFFF
Raw Table Data: Length 912 (0x390)
Note that the contents of tests/data/q35/ERST.acpierst and
tests/data/microvm/ERST.pcie are the same except for differences
due to assigned base address.
Files tests/data/pc/DSDT.acpierst and tests/data/acpi/q35/DSDT.acpierst
are new files (and are included as a result of 'make check' process).
Rather than provide the entire content, I am providing the differences
between pc/DSDT and pc/DSDT.acpierst, and the difference between
q35/DSDT and q35/DSDT.acpierst, with an explanation to follow.
diff pc/DSDT pc/DSDT.acpierst:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT, Thu Dec 2 10:10:13 2021
+ * Disassembly of tests/data/acpi/pc/DSDT.acpierst, Thu Dec 2 12:59:36 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001772 (6002)
+ * Length 0x00001751 (5969)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x9E
+ * Checksum 0x95
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -964,16 +964,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS "
Device (S18)
{
- Name (_SUN, 0x03) // _SUN: Slot User Number
Name (_ADR, 0x00030000) // _ADR: Address
- Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
- {
- PCEJ (BSEL, _SUN)
- }
-
+ Name (ASUN, 0x03)
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
- Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, ASUN))
}
}
@@ -1399,11 +1394,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS "
Method (DVNT, 2, NotSerialized)
{
- If ((Arg0 & 0x08))
- {
- Notify (S18, Arg1)
- }
-
If ((Arg0 & 0x10))
{
Notify (S20, Arg1)
diff q35/DSDT and q35/DSDT.acpierst:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Thu Dec 2 10:10:13 2021
+ * Disassembly of tests/data/acpi/q35/DSDT.acpierst, Thu Dec 2 12:59:36 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002061 (8289)
+ * Length 0x00002072 (8306)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xFA
+ * Checksum 0x9A
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -3278,6 +3278,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS "
}
}
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
+
Method (PCNT, 0, NotSerialized)
{
}
For both pc and q35, there is but a small difference between this
DSDT.acpierst and the corresponding DSDT. In both cases, the changes
occur under the hiearchy:
Scope (\_SB)
{
Scope (PCI0)
{
which leads me to believe that the change to the DSDT was needed
due to the introduction of the ERST PCI device.
And is explained in detail by Ani Sinha:
I have convinced myself of the changes we see in the DSDT tables.
On i440fx side, we are adding a non-hotpluggable pci device on slot 3.
So the changes we see are basically replacing an empty hotpluggable
slot on the pci root port with a non-hotplugggable device.
On q35, bsel on pcie root bus is not set (its not hotpluggable bus),
so the change basically adds the address enumeration for the device.
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
Acked-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <1643402289-22216-11-git-send-email-eric.devolder@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
Eric DeVolder
|
646a793cc3 |
ACPI ERST: bios-tables-test testcase
This change implements the test suite checks for the ERST table. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Message-Id: <1643402289-22216-10-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Eric DeVolder
|
bd24550e5c |
ACPI ERST: qtest for ERST
This change provides a qtest that locates and then does a simple interrogation of the ERST feature within the guest. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Message-Id: <1643402289-22216-9-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Eric DeVolder
|
922f48d37a |
ACPI ERST: bios-tables-test.c steps 1 and 2
Following the guidelines in tests/qtest/bios-tables-test.c, this change adds empty placeholder files per step 1 for the new ERST table, and excludes resulting changed files in bios-tables-test-allowed-diff.h per step 2. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1643402289-22216-2-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Igor Mammedov
|
408ca92634 |
tests: acpi: test short OEM_ID/OEM_TABLE_ID values in test_oem_fields()
Previous patch [1] added explicit whitespace padding to OEM_ID/OEM_TABLE_ID
values used in test_oem_fields() testcase to avoid false positive and
bisection issues when QEMU is switched to \0' padding. As result
testcase ceased to test values that were shorter than max possible
length values.
Update testcase to make sure that it's testing shorter IDs like it
used to before [2].
1) "tests: acpi: manually pad OEM_ID/OEM_TABLE_ID for test_oem_fields() test"
2)
|
|
|
Igor Mammedov
|
5adc3aba87 |
tests: acpi: update expected blobs
Expected changes caused by previous commit: nvdimm ssdt (q35/pc/virt): - * OEM Table ID "NVDIMM " + * OEM Table ID "NVDIMM" SLIC test FADT (tests/data/acpi/q35/FACP.slic): -[010h 0016 8] Oem Table ID : "ME " +[010h 0016 8] Oem Table ID : "ME" Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220112130332.1648664-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Igor Mammedov
|
d1e4a46541 |
tests: acpi: whitelist nvdimm's SSDT and FACP.slic expected blobs
The next commit will revert OEM fields whitespace padding to
padding with '\0' as it was before [1]. That will change OEM
Table ID for:
* SSDT.*: where it was padded from 6 characters to 8
* FACP.slic: where it was padded from 2 characters to 8
after reverting whitespace padding, it will be replaced with
'\0' which effectively will shorten OEM table ID to 6 and 2
characters.
Whitelist affected tables before introducing the change.
1)
|
|
|
Igor Mammedov
|
a849522f72 |
tests: acpi: manually pad OEM_ID/OEM_TABLE_ID for test_oem_fields() test
The next commit will revert OEM fields padding with whitespace to
padding with '\0' as it was before [1]. As result test_oem_fields() will
fail due to unexpectedly smaller ID sizes read from QEMU ACPI tables.
Pad OEM_ID/OEM_TABLE_ID manually with spaces so that values the test
puts on QEMU CLI and expected values match.
1)
|
|
|
Thomas Huth
|
274f5e6343 |
hw/i386: Add the possibility to disable the 'isapc' machine
We already have a CONFIG_ISAPC switch - but we're not using it yet. Add some "#ifdefs" to make it possible to disable this machine now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220107160713.235918-1-thuth@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Marc-André Lureau
|
861aa79ad8 |
build-sys: fix a meson deprecation warning
WARNING: Deprecated features used:
* 0.56.0: {'meson.source_root'}
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220113162148.3621818-1-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
|
Daniel P. Berrangé
|
64b4529a43 |
softmmu: fix device deletion events with -device JSON syntax
The -device JSON syntax impl leaks a reference on the created
DeviceState instance. As a result when you hot-unplug the
device, the device_finalize method won't be called and thus
it will fail to emit the required DEVICE_DELETED event.
A 'json-cli' feature was previously added against the
'device_add' QMP command QAPI schema to indicated to mgmt
apps that -device supported JSON syntax. Given the hotplug
bug that feature flag is not usable for its purpose, so
we add a new 'json-cli-hotplug' feature to indicate the
-device supports JSON without breaking hotplug.
Fixes:
|
|
|
Paolo Bonzini
|
fb72176ba6 |
meson: build all modules by default
With more recent versions of Meson, the build.ninja file is more selective as to what is built by default, and not building the modules results in test failures. Mark the modules as built-by-default and, to make the dependencies more precise, also require them to be up-to-date before running tests. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/801 Tested-by: Li Zhang <lizhang@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Stefan Berger
|
ca745d2277 |
tests: acpi: Add updated TPM related tables
The updated TPM related tables have the following additions:
Device (TPM)
{
Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID
+ Name (_STR, "TPM 2.0 Device") // _STR: Description String
+ Name (_UID, One) // _UID: Unique ID
Name (_STA, 0x0F) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Ani Sinha <ani@anisinha.ca>
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Acked-by: Ani Sinha <ani@anisinha.ca>
Message-id: 20211223022310.575496-4-stefanb@linux.ibm.com
Message-Id: <20220104175806.872996-4-stefanb@linux.ibm.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
Stefan Berger
|
b193e5f9cc |
tests: acpi: prepare for updated TPM related tables
Replace existing TPM related tables, that are about to change, with empty files. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Ani Sinha <ani@anisinha.ca> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Acked-by: Ani Sinha <ani@anisinha.ca> Message-id: 20211223022310.575496-2-stefanb@linux.ibm.com Message-Id: <20220104175806.872996-2-stefanb@linux.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> |
|
|
Igor Mammedov
|
c8adb4d222 |
tests: acpi: SLIC: update expected blobs
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20211227193120.1084176-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Igor Mammedov
|
11edfabee4 |
tests: acpi: add SLIC table test
When user uses '-acpitable' to add SLIC table, some ACPI tables (FADT) will change its 'Oem ID'/'Oem Table ID' fields to match that of SLIC. Test makes sure thati QEMU handles those fields correctly when SLIC table is added with '-acpitable' option. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20211227193120.1084176-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Igor Mammedov
|
e71f6ab9d9 |
tests: acpi: whitelist expected blobs before changing them
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20211227193120.1084176-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Thomas Huth
|
961fb4b465 |
tests/qtest/hd-geo-test: Check for the lsi53c895a controller before using it
The lsi53c895a SCSI controller might have been disabled in the target binary, so let's check for its availability first before using it. Message-Id: <20211222153600.976588-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Thomas Huth
|
7539fa0116 |
tests/qtest/test-x86-cpuid-compat: Check for machines before using them
The user might have disabled the pc-i440fx machine type (or it's older versions, like done in downstream RHEL) in the QEMU binary, so let's better check whether the machine types are available before using them. Message-Id: <20211222153923.1000420-1-thuth@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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e63ed64c6d |
tests/qtest/virtio-net-failover: Use g_file_open_tmp() to create temporary file
g_test_rand_int() must not be called before g_test_init(), otherwise the glib will show a "g_rand_int: assertion 'rand != NULL' failed" message in the log. So we could change the order here, but actually, it's safer to use g_file_open_tmp() anyway, so let's use that function now instead. Reported-by: Philippe Mathieu-Daudé <philmd@redhat.com> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211222083652.776592-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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d6a3dd7418 |
tests/qtest/boot-order-test: Check whether machines are available
Machines might not always be compiled into the QEMU binary, so we should skip the test instead of failing if it is not available. Message-Id: <20211220081054.151515-5-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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95c0b77018 |
tests/qtest/cdrom-test: Check whether devices are available before using them
Downstream users might want to disable legacy devices in their binaries, so we should not blindly assume that they are available. Add some proper checks before using them. Message-Id: <20211220081054.151515-4-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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9cbd66028b |
tests/qtest: Improve endianness-test to work with missing machines and devices
The users might have built QEMU with less machines or without the i82378 superio device. Add some checks to the endianess-test so that it is able to deal with such stripped down QEMU versions, too. Message-Id: <20211220081054.151515-3-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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ad9e129b01 |
tests/qtest: Add a function that checks whether a device is available
Devices might not always be compiled into the QEMU target binaries. We already have the libqos framework that is good for handling such situations, but some of the qtests are not a real good fit for the libqos framework. Let's add a qtest_has_device() function for such tests instead. Message-Id: <20211220081054.151515-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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31fb263c29 |
tests/qtest: Make the filter tests independent from a specific NIC
These filter tests need a NIC, no matter which one, so they use a common NIC by default. However, these common NIC models might not always have been compiled into the QEMU target binary, so assuming that a certain NIC is available is a bad idea. Since the exact type of NIC does not really matter for these tests, let's switch to "-nic" instead of "-netdev" so that QEMU can simply pick a default NIC for us. This way we can now run the tests on other targets that have a default machine with an on-board/default NIC, too. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211220103025.311759-1-thuth@redhat.com> Reviewed-by: Zhang Chen <chen.zhang@intel.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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046da5ef57 |
tests/qtest/boot-serial-test: Silence the warning about deprecated sga device
When running the qtests, there are currently a bunch of warnings about the deprecated sga device during the boot-serial-test. Switch to "-M graphics=off" to silence these warnings. Message-Id: <20211220164042.397028-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Marc-André Lureau
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b4dd5b6a60 |
tests: start dbus-display-test
Cover basic display interface usage. More cases to be added to cover disconnections, multiple connections, corner cases. At this point, they would be better written in Rust or Python though. The proxy also covers reading the properties, since they are automatically loaded at creation. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> |
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Marc-André Lureau
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2c7294d72c |
tests/qtests: add qtest_qmp_add_client()
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> |
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Marc-André Lureau
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61534882e7 |
backends: move dbus-vmstate1.xml to backends/
Although not used by the backend itself, use a common location for documentation and sharing purposes. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> |
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Philippe Mathieu-Daudé
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08c34c642d |
tests/qtest/fuzz-megasas-test: Add test for GitLab issue #521
Without the previous commit, this test triggers: $ make check-qtest-x86_64 [...] Running test qtest-x86_64/fuzz-megasas-test qemu-system-x86_64: softmmu/physmem.c:3229: address_space_unmap: Assertion `mr != NULL' failed. Broken pipe ERROR qtest-x86_64/fuzz-megasas-test - too few tests run (expected 2, got 1) Suggested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20211119201141.532377-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Richard Henderson
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90978e15bc |
Trivial patches pull request 20211217
-----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmG87o8SHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L7484L4QAIkEUWlOKfF+xjwGq5BRQhV9gdW2sYYD p+QA59lEUpdyfSw5fG6xqyhjywWMiwAyDDM2RnAGEwtqTbZPgcSLD7e0x4SW2DkE wGBQaGRpj6QsAYctSEaEwwAErvxkMR9nX43IWVQrFCH4NtHKys4GtiTTZuJK0hDp U+b9FrX5x9RmqqY+XT+mY51E/2qC50b36WlstBuleLKkPG7K/Eky8cIxr+O8WsLR 30OoL50yVe/u5AVZuzOqouFMzlf8YagiaUFquh5HXe/TUHtdA311AVCrd9XOANSK TXIINcQ1gsUMZ84mmMWovO9G4alexQQz04tm3CH5+rnOSlQ51sw8R+uFQWppOwIg 5oSEx2A/ibsgdd7XwHt7xGj0iVPy9gNBlCxjEYZtMXAZyWLmvYBZvlmF3764Psgm i9NQ/nAS0DnXd2HA2P9Ndttw3JF2U2pFLC5ti4LCs9SD3iwZs7KMr5VxXjpeVa90 /I2dAFisc/07sFqR7Fch8048HFg5stodCrhv3MIFlew3JJcyWuNqQOSLG6bWOLA2 7UVkoO6YSDGLdz/cEn00t0kx9Ps2/PpqIbLydLPjpp6NpL4GE003JAp6nZ8Lam0l xd5v3Cg7RY+tc/QyTnSvDoE1UF0XD67pMnhL3IcdfrtFAJNWu44i25pdFEqwvO9U WqYS8AcLCoAv =EP1J -----END PGP SIGNATURE----- Merge tag 'trivial-branch-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging Trivial patches pull request 20211217 # gpg: Signature made Fri 17 Dec 2021 12:09:51 PM PST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [unknown] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [unknown] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'trivial-branch-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu: checkpatch: Do not allow deprecated g_memdup() tests/qtest: Replace g_memdup() by g_memdup2() glib-compat: Introduce g_memdup2() wrapper docs/block-replication.txt: Fix replication top-id command demo hw/virtio/vhost: Fix typo in comment. hw/avr: Realize AVRCPU qdev object using qdev_realize() qemu-keymap: Add license in generated files target/i386/kvm: Replace use of __u32 type configure: Symlink binaries using .exe suffix with MinGW Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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93dc314c92 |
ppc 7.0 queue:
* General cleanup for Mac machines (Peter) * Fixes for FPU exceptions (Lucas) * Support for new ISA31 instructions (Matheus) * Fixes for ivshmem (Daniel) * Cleanups for PowerNV PHB (Christophe and Cedric) * Updates of PowerNV and pSeries documentation (Leonardo and Daniel) * Fixes for PowerNV (Daniel) * Large cleanup of FPU implementation (Richard) * Removal of SoftTLBs support for PPC74x CPUs (Fabiano) * Fixes for exception models in MPCx and 60x CPUs (Fabiano) * Removal of 401/403 CPUs (Cedric) * Deprecation of taihu machine (Thomas) * Large rework of PPC405 machine (Cedric) * Fixes for VSX instructions (Victor and Matheus) * Fix for e6500 CPU (Fabiano) * Initial support for PMU (Daniel) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmG8xt8ACgkQUaNDx8/7 7KG3Dg/9EXK3GslNgUNRvB1pgRSimnrUirGUiDmZPXxevIbsoPsYaXmUcD1zOnlb zXiCzQ2Bvi8ZUjT1uScP7dkFCdzs6gXYbTEcTzscX3k2VnTjXHXhQ3cnb0uModP5 U1QzrjV7K/q1usJW5OVSGZS1PoWOqWuZNdcp0mIUWcJHhSaYtUGGPohp7rH0JSug ncmkRA0KLgIX8eg8swyfJxrw9wCcXlFIcmwHipB8S/Dd/gUpmFEoaQsmugSJNYZe zi8Fd4jfzlRXVwb8EUSiOiaXSd/WKjEcQx/usbzzaBacbktk/nfy+rligUMryCpO vGFM5blxEX5SXD3Cd0vcFwYhCZImphD8K+Sxe6Us69rsUH11hJS+q29/Puk1MkHt DTubqB3k4BheiatOV1zeUMlbRm5svUhGj3VstFZYZeZ3Oh47Jsx3XH4hoytUuc/1 lP9UGkaf3nIx12vSqBA/3Crc7zalWX5OhaUV5RG30+jxd8zHOKcasKbd22710DNz 4WybQLb3bpUr091mWMKcaAkP6bxcE8S+mR4LE2kdELboAnkB+OgSmrdZ3slceaCv btV8qjNl4f8lBvyFQVxZ5bn05+TfxUXFlFxXipxf1fI64bYwRnyQQ3yRxMHipRYK CRta1akVgIgcBbeeRHBZLA12UgTQJY6WIoDaZMz9NxIDHJnX/jw= =APFd -----END PGP SIGNATURE----- Merge tag 'pull-ppc-20211217' of https://github.com/legoater/qemu into staging ppc 7.0 queue: * General cleanup for Mac machines (Peter) * Fixes for FPU exceptions (Lucas) * Support for new ISA31 instructions (Matheus) * Fixes for ivshmem (Daniel) * Cleanups for PowerNV PHB (Christophe and Cedric) * Updates of PowerNV and pSeries documentation (Leonardo and Daniel) * Fixes for PowerNV (Daniel) * Large cleanup of FPU implementation (Richard) * Removal of SoftTLBs support for PPC74x CPUs (Fabiano) * Fixes for exception models in MPCx and 60x CPUs (Fabiano) * Removal of 401/403 CPUs (Cedric) * Deprecation of taihu machine (Thomas) * Large rework of PPC405 machine (Cedric) * Fixes for VSX instructions (Victor and Matheus) * Fix for e6500 CPU (Fabiano) * Initial support for PMU (Daniel) # gpg: Signature made Fri 17 Dec 2021 09:20:31 AM PST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20211217' of https://github.com/legoater/qemu: (101 commits) ppc/pnv: Use QOM hierarchy to scan PEC PHB4 devices ppc/pnv: Move realize of PEC stacks under the PEC model ppc/pnv: Remove "system-memory" property from PHB4 PEC ppc/pnv: Compute the PHB index from the PHB4 PEC model ppc/pnv: Introduce a num_stack class attribute ppc/pnv: Introduce a "chip" property under the PHB4 model ppc/pnv: Introduce version and device_id class atributes for PHB4 devices ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices ppc/pnv: Use QOM hierarchy to scan PHB3 devices ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize() ppc/pnv: Drop the "num-phbs" property ppc/pnv: Use the chip class to check the index of PHB3 devices ppc/pnv: Introduce a "chip" property under PHB3 PPC64/TCG: Implement 'rfebb' instruction target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event target/ppc: enable PMU instruction count target/ppc: enable PMU counter overflow with cycle events target/ppc: PMU: update counters on MMCR1 write target/ppc: PMU: update counters on PMCs r/w target/ppc: PMU basic cycle count for pseries TCG ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Daniel Henrique Barboza
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d04aeb6862 |
ivshmem-test.c: enable test_ivshmem_server for ppc64 arch
This test, if enabled by hand, was failing when the ivhsmem device was being declared as DEVICE_NATIVE_ENDIAN with the following error: /ppc64/ivshmem/pair: OK /ppc64/ivshmem/server: ** ERROR:/home/danielhb/qemu/tests/qtest/ivshmem-test.c:367:test_ivshmem_server: assertion failed (ret != 0): (0 != 0) Aborted After the endianness change done in the previous patch, we can verify in both a a Power 9 little-endian host and in a Power 8 big-endian host that this test is now passing: $ QTEST_QEMU_BINARY=./ppc64-softmmu/qemu-system-ppc64 ./tests/qtest/ivshmem-test -m slow /ppc64/ivshmem/single: OK /ppc64/ivshmem/hotplug: OK /ppc64/ivshmem/memdev: OK /ppc64/ivshmem/pair: OK /ppc64/ivshmem/server: OK Let's keep it that way by officially enabling it for ppc64. Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211124092948.335389-3-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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Philippe Mathieu-Daudé
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460056dbe6 |
tests/qtest: Replace g_memdup() by g_memdup2()
Per https://discourse.gnome.org/t/port-your-module-from-g-memdup-to-g-memdup2-now/5538 The old API took the size of the memory to duplicate as a guint, whereas most memory functions take memory sizes as a gsize. This made it easy to accidentally pass a gsize to g_memdup(). For large values, that would lead to a silent truncation of the size from 64 to 32 bits, and result in a heap area being returned which is significantly smaller than what the caller expects. This can likely be exploited in various modules to cause a heap buffer overflow. Replace g_memdup() by the safer g_memdup2() wrapper. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903174510.751630-25-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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Richard Henderson
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29eb5c2c86 |
* improve compatibility for macOS scripts/entitlement.sh (Evan)
* add support for KVM_GUESTDBG_BLOCKIRQ (Maxim) * update linux-headers to Linux 5.16 (myself) * configure cleanups (myself) * lsi53c895a assertion failure fix (Philippe) * fix incorrect description for die-id (Yanan) * support for NUMA in SGX enclave memory (Yang Zhong) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmG5yEgUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOFkwf9Glt3tnHfO/gWZectiMAjjM8vg3cR yEsWU0fa0iu8MO8NiOW0b6DT0yosZ8rl2SYSZBQGqwa/Lq2MZLO2v0JG4LblBom7 WVmzNOG4t0OFoE2gwMlZ2J+ppaHV5zN1Yc6lMXOVQcefY0pXoyze+0Fq/cwKf2+p 6WDZTuOpjtxMwt9n71b93kNAHagk422MpNi1xi+o37hNsm/Zh3BTtaSJ7WCkCmWq YmwwQZgyB/V0Ah42wchuf5zxEnQPMbjaQSu8jQU4iyCB7+2biBuh3Cqw5eR8tqC1 cGNINGlo2Orl9ASyEunHyuDj8p0wN8J37wNuBo4kghhrTVsVKQYF0wmsqw== =U1Xy -----END PGP SIGNATURE----- Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging * improve compatibility for macOS scripts/entitlement.sh (Evan) * add support for KVM_GUESTDBG_BLOCKIRQ (Maxim) * update linux-headers to Linux 5.16 (myself) * configure cleanups (myself) * lsi53c895a assertion failure fix (Philippe) * fix incorrect description for die-id (Yanan) * support for NUMA in SGX enclave memory (Yang Zhong) # gpg: Signature made Wed 15 Dec 2021 02:49:44 AM PST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: configure: remove dead variables doc: Add the SGX numa description numa: Support SGX numa in the monitor and Libvirt interfaces numa: Enable numa for SGX EPC sections kvm: add support for KVM_GUESTDBG_BLOCKIRQ gdbstub, kvm: let KVM report supported singlestep flags gdbstub: reject unsupported flags in handle_set_qemu_sstep linux-headers: update to 5.16-rc1 virtio-gpu: do not byteswap padding scripts/entitlement.sh: Use backward-compatible cp flags qapi/machine.json: Fix incorrect description for die-id tests/qtest: Add fuzz-lsi53c895a-test hw/scsi/lsi53c895a: Do not abort when DMA requested and no data queued Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Jean-Philippe Brucker
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69a80f14ce |
tests/qtest/bios-tables-test: Only run VIOT test on TCG
The VIOT test does not always work under KVM on the virt machine: PASS 5 qtest-aarch64/bios-tables-test /aarch64/acpi/virt/oem-fields qemu-system-aarch64: kvm_init_vcpu: kvm_arch_init_vcpu failed (0): Invalid argument Broken pipe Make it TCG only. Reported-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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aab8cfd4c3 |
target-arm queue:
* ITS: error reporting cleanup * aspeed: improve documentation * Fix STM32F2XX USART data register readout * allow emulated GICv3 to be disabled in non-TCG builds * fix exception priority for singlestep, misaligned PC, bp, etc * Correct calculation of tlb range invalidate length * npcm7xx_emc: fix missing queue_flush * virt: Add VIOT ACPI table for virtio-iommu * target/i386: Use assert() to sanity-check b1 in SSE decode * Don't include qemu-common unnecessarily -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmG5xekZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3ramD/0WL8YV70sW5B/tHdb+/em1 xTBuABUUj5QDvKnxNoPIBwJI0vgmzwhAonYzcKKEUvlbL97crkgt6xSPvVxv2nf5 wnSYMKTDEC11AuYVdEyIMm5KLc88mq1w78pTYkFSUJmujCpfqLAsyXdEastIPHfN MdrwkpQ3wVmMeMcNBTq2yCxiGlz7x/myeJtDU9ihgPTcsgXa8BzziK6qCZHAOGCL 0/ljXDbVTJtLYUki9IqptPs8QUtlqOBt3rLplxHfKRKpmjiuD+xFlQ4GuIOBX+AL tQWgEyyiR9FnYpY1t3fWVtuKgjYXzlbh1A6cwdsK3Q68+qfi7Yr+lPryjwrmOkx7 /Yupq+QB/xgK4nxF4ydDXLvqI3h6GjaF2U9qujK3H9DyMOEYJDpaX1TZMphtWI89 9u7kLO6DNE00oUoiX+6Aty0qQtXv12SSaNpJmFON87/WLJJamHuiS6NiZp/r4ORU 51ds2LPGJAKAy9duqmZJ/81WlNjmHmurq1v+FIl29XInc4a2SpwEUM0rsTrrQTaD 16Qh2OZCnlYEg9nh6B54FQe8xP+pp69Gn/BRFhcwW9fPq4/pHSrwKEkI6lE+Yuiq +Fe8r0DbZczfhjcGdoUlIgMj+WSVY9Q8Opztsmv/kjZqxt0VvfdmAVp0odl5KdB4 cKAeYciNSgq2bGd+N4kuHA== =KuTi -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20211215' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * ITS: error reporting cleanup * aspeed: improve documentation * Fix STM32F2XX USART data register readout * allow emulated GICv3 to be disabled in non-TCG builds * fix exception priority for singlestep, misaligned PC, bp, etc * Correct calculation of tlb range invalidate length * npcm7xx_emc: fix missing queue_flush * virt: Add VIOT ACPI table for virtio-iommu * target/i386: Use assert() to sanity-check b1 in SSE decode * Don't include qemu-common unnecessarily # gpg: Signature made Wed 15 Dec 2021 02:39:37 AM PST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] * tag 'pull-target-arm-20211215' of https://git.linaro.org/people/pmaydell/qemu-arm: (33 commits) tests/acpi: add expected blob for VIOT test on virt machine tests/acpi: add expected blobs for VIOT test on q35 machine tests/acpi: add test case for VIOT tests/acpi: allow updates of VIOT expected data files hw/arm/virt: Use object_property_set instead of qdev_prop_set hw/arm/virt: Reject instantiation of multiple IOMMUs hw/arm/virt: Remove device tree restriction for virtio-iommu hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu hw/net: npcm7xx_emc fix missing queue_flush target/arm: Correct calculation of tlb range invalidate length hw/arm: Don't include qemu-common.h unnecessarily target/rx/cpu.h: Don't include qemu-common.h target/hexagon/cpu.h: don't include qemu-common.h include/hw/i386: Don't include qemu-common.h in .h files target/i386: Use assert() to sanity-check b1 in SSE decode tests/tcg: Add arm and aarch64 pc alignment tests target/arm: Suppress bp for exceptions with more priority target/arm: Assert thumb pc is aligned target/arm: Take an exception if PC is misaligned target/arm: Split compute_fsr_fsc out of arm_deliver_fault ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Jean-Philippe Brucker
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aed1765588 |
tests/acpi: add expected blob for VIOT test on virt machine
The VIOT blob contains the following: [000h 0000 4] Signature : "VIOT" [Virtual I/O Translation Table] [004h 0004 4] Table Length : 00000058 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : 66 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 2] Node count : 0002 [026h 0038 2] Node offset : 0030 [028h 0040 8] Reserved : 0000000000000000 [030h 0048 1] Type : 03 [VirtIO-PCI IOMMU] [031h 0049 1] Reserved : 00 [032h 0050 2] Length : 0010 [034h 0052 2] PCI Segment : 0000 [036h 0054 2] PCI BDF number : 0008 [038h 0056 8] Reserved : 0000000000000000 [040h 0064 1] Type : 01 [PCI Range] [041h 0065 1] Reserved : 00 [042h 0066 2] Length : 0018 [044h 0068 4] Endpoint start : 00000000 [048h 0072 2] PCI Segment start : 0000 [04Ah 0074 2] PCI Segment end : 0000 [04Ch 0076 2] PCI BDF start : 0000 [04Eh 0078 2] PCI BDF end : 00FF [050h 0080 2] Output node : 0030 [052h 0082 6] Reserved : 000000000000 Acked-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20211210170415.583179-9-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Jean-Philippe Brucker
|
cf7a348837 |
tests/acpi: add expected blobs for VIOT test on q35 machine
Add expected blobs of the VIOT and DSDT table for the VIOT test on the
q35 machine.
Since the test instantiates a virtio device and two PCIe expander
bridges, DSDT.viot has more blocks than the base DSDT.
The VIOT table generated for the q35 test is:
[000h 0000 4] Signature : "VIOT" [Virtual I/O Translation Table]
[004h 0004 4] Table Length : 00000070
[008h 0008 1] Revision : 00
[009h 0009 1] Checksum : 3D
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 2] Node count : 0003
[026h 0038 2] Node offset : 0030
[028h 0040 8] Reserved : 0000000000000000
[030h 0048 1] Type : 03 [VirtIO-PCI IOMMU]
[031h 0049 1] Reserved : 00
[032h 0050 2] Length : 0010
[034h 0052 2] PCI Segment : 0000
[036h 0054 2] PCI BDF number : 0010
[038h 0056 8] Reserved : 0000000000000000
[040h 0064 1] Type : 01 [PCI Range]
[041h 0065 1] Reserved : 00
[042h 0066 2] Length : 0018
[044h 0068 4] Endpoint start : 00003000
[048h 0072 2] PCI Segment start : 0000
[04Ah 0074 2] PCI Segment end : 0000
[04Ch 0076 2] PCI BDF start : 3000
[04Eh 0078 2] PCI BDF end : 30FF
[050h 0080 2] Output node : 0030
[052h 0082 6] Reserved : 000000000000
[058h 0088 1] Type : 01 [PCI Range]
[059h 0089 1] Reserved : 00
[05Ah 0090 2] Length : 0018
[05Ch 0092 4] Endpoint start : 00001000
[060h 0096 2] PCI Segment start : 0000
[062h 0098 2] PCI Segment end : 0000
[064h 0100 2] PCI BDF start : 1000
[066h 0102 2] PCI BDF end : 10FF
[068h 0104 2] Output node : 0030
[06Ah 0106 6] Reserved : 000000000000
And the DSDT diff is:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Fri Dec 10 15:03:08 2021
+ * Disassembly of /tmp/aml-H9Y5D1, Fri Dec 10 15:02:27 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002061 (8289)
+ * Length 0x000024B6 (9398)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xFA
+ * Checksum 0xA7
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -3114,6 +3114,339 @@
}
}
+ Scope (\_SB)
+ {
+ Device (PC30)
+ {
+ Name (_UID, 0x30) // _UID: Unique ID
+ Name (_BBN, 0x30) // _BBN: BIOS Bus Number
+ Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
+ Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, Zero, CDW1)
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
+ {
+ CreateDWordField (Arg3, 0x04, CDW2)
+ CreateDWordField (Arg3, 0x08, CDW3)
+ Local0 = CDW3 /* \_SB_.PC30._OSC.CDW3 */
+ Local0 &= 0x1F
+ If ((Arg1 != One))
+ {
+ CDW1 |= 0x08
+ }
+
+ If ((CDW3 != Local0))
+ {
+ CDW1 |= 0x10
+ }
+
+ CDW3 = Local0
+ }
+ Else
+ {
+ CDW1 |= 0x04
+ }
+
+ Return (Arg3)
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ Local0 = Package (0x80){}
+ Local1 = Zero
+ While ((Local1 < 0x80))
+ {
+ Local2 = (Local1 >> 0x02)
+ Local3 = ((Local1 + Local2) & 0x03)
+ If ((Local3 == Zero))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKD,
+ Zero
+ }
+ }
+
+ If ((Local3 == One))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKA,
+ Zero
+ }
+ }
+
+ If ((Local3 == 0x02))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKB,
+ Zero
+ }
+ }
+
+ If ((Local3 == 0x03))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKC,
+ Zero
+ }
+ }
+
+ Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF)
+ Local4 [One] = (Local1 & 0x03)
+ Local0 [Local1] = Local4
+ Local1++
+ }
+
+ Return (Local0)
+ }
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0030, // Range Minimum
+ 0x0030, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0001, // Length
+ ,, )
+ })
+ }
+ }
+
+ Scope (\_SB)
+ {
+ Device (PC20)
+ {
+ Name (_UID, 0x20) // _UID: Unique ID
+ Name (_BBN, 0x20) // _BBN: BIOS Bus Number
+ Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
+ Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, Zero, CDW1)
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
+ {
+ CreateDWordField (Arg3, 0x04, CDW2)
+ CreateDWordField (Arg3, 0x08, CDW3)
+ Local0 = CDW3 /* \_SB_.PC20._OSC.CDW3 */
+ Local0 &= 0x1F
+ If ((Arg1 != One))
+ {
+ CDW1 |= 0x08
+ }
+
+ If ((CDW3 != Local0))
+ {
+ CDW1 |= 0x10
+ }
+
+ CDW3 = Local0
+ }
+ Else
+ {
+ CDW1 |= 0x04
+ }
+
+ Return (Arg3)
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ Local0 = Package (0x80){}
+ Local1 = Zero
+ While ((Local1 < 0x80))
+ {
+ Local2 = (Local1 >> 0x02)
+ Local3 = ((Local1 + Local2) & 0x03)
+ If ((Local3 == Zero))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKD,
+ Zero
+ }
+ }
+
+ If ((Local3 == One))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKA,
+ Zero
+ }
+ }
+
+ If ((Local3 == 0x02))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKB,
+ Zero
+ }
+ }
+
+ If ((Local3 == 0x03))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKC,
+ Zero
+ }
+ }
+
+ Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF)
+ Local4 [One] = (Local1 & 0x03)
+ Local0 [Local1] = Local4
+ Local1++
+ }
+
+ Return (Local0)
+ }
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0020, // Range Minimum
+ 0x0020, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0001, // Length
+ ,, )
+ })
+ }
+ }
+
+ Scope (\_SB)
+ {
+ Device (PC10)
+ {
+ Name (_UID, 0x10) // _UID: Unique ID
+ Name (_BBN, 0x10) // _BBN: BIOS Bus Number
+ Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
+ Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, Zero, CDW1)
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
+ {
+ CreateDWordField (Arg3, 0x04, CDW2)
+ CreateDWordField (Arg3, 0x08, CDW3)
+ Local0 = CDW3 /* \_SB_.PC10._OSC.CDW3 */
+ Local0 &= 0x1F
+ If ((Arg1 != One))
+ {
+ CDW1 |= 0x08
+ }
+
+ If ((CDW3 != Local0))
+ {
+ CDW1 |= 0x10
+ }
+
+ CDW3 = Local0
+ }
+ Else
+ {
+ CDW1 |= 0x04
+ }
+
+ Return (Arg3)
+ }
+
+ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
+ {
+ Local0 = Package (0x80){}
+ Local1 = Zero
+ While ((Local1 < 0x80))
+ {
+ Local2 = (Local1 >> 0x02)
+ Local3 = ((Local1 + Local2) & 0x03)
+ If ((Local3 == Zero))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKD,
+ Zero
+ }
+ }
+
+ If ((Local3 == One))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKA,
+ Zero
+ }
+ }
+
+ If ((Local3 == 0x02))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKB,
+ Zero
+ }
+ }
+
+ If ((Local3 == 0x03))
+ {
+ Local4 = Package (0x04)
+ {
+ Zero,
+ Zero,
+ LNKC,
+ Zero
+ }
+ }
+
+ Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF)
+ Local4 [One] = (Local1 & 0x03)
+ Local0 [Local1] = Local4
+ Local1++
+ }
+
+ Return (Local0)
+ }
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0010, // Range Minimum
+ 0x0010, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0001, // Length
+ ,, )
+ })
+ }
+ }
+
Scope (\_SB.PCI0)
{
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
@@ -3121,9 +3454,9 @@
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
- 0x00FF, // Range Maximum
+ 0x000F, // Range Maximum
0x0000, // Translation Offset
- 0x0100, // Length
+ 0x0010, // Length
,, )
IO (Decode16,
0x0CF8, // Range Minimum
@@ -3278,6 +3611,26 @@
}
}
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
+
+ Device (S18)
+ {
+ Name (_ADR, 0x00030000) // _ADR: Address
+ }
+
+ Device (S20)
+ {
+ Name (_ADR, 0x00040000) // _ADR: Address
+ }
+
+ Device (S28)
+ {
+ Name (_ADR, 0x00050000) // _ADR: Address
+ }
+
Method (PCNT, 0, NotSerialized)
{
}
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Message-id: 20211210170415.583179-8-jean-philippe@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
|
Jean-Philippe Brucker
|
39d7554b20 |
tests/acpi: add test case for VIOT
Add two test cases for VIOT, one on the q35 machine and the other on virt. To test complex topologies the q35 test has two PCIe buses that bypass the IOMMU (and are therefore not described by VIOT), and two buses that are translated by virtio-iommu. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20211210170415.583179-7-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Jean-Philippe Brucker
|
641f32f684 |
tests/acpi: allow updates of VIOT expected data files
Create empty data files and allow updates for the upcoming VIOT tests. Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20211210170415.583179-6-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Eric Auger
|
becf88730b |
tests: qtest: Add virtio-iommu test
Add the framework to test the virtio-iommu-pci device and tests exercising the attach/detach, map/unmap API. Signed-off-by: Eric Auger <eric.auger@redhat.com> Tested-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211127072910.1261824-5-eric.auger@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Thomas Huth
|
719051ca3f |
tests/qtest: Add a function to check whether a machine is available
It is nowadays possible to build QEMU with a reduced set of machines in each binary. However, the qtests still hard-code the expected machines and fail if the binary does not feature the required machine. Let's get a little bit more flexible here: Add a function that can be used to query whether a certain machine is available or not, and use it in some tests as an example (more work has to be done in other tests which will follow later). Message-Id: <20211201104347.51922-5-thuth@redhat.com> Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Thomas Huth
|
5516a3b592 |
tests/qtest: Add a function that gets a list with available machine types
For the upcoming patches, we will need a way to gets a list with all available machine types. Refactor the qtest_cb_for_every_machine() to split the related code out into a separate new function, and gather the aliases of the various machine types, too. Message-Id: <20211201104347.51922-4-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Thomas Huth
|
bf22f15114 |
tests/qtest: Fence the tests that need xlnx-zcu102 with CONFIG_XLNX_ZYNQMP_ARM
The 'xlnx-can-test' and the 'fuzz-xlnx-dp-test' need the "xlnx-zcu102" machine and thus should only be built and run if CONFIG_XLNX_ZYNQMP_ARM is enabled. Message-Id: <20211201104347.51922-3-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Thomas Huth
|
a9697d0947 |
tests/qtest: Run the PPC 32-bit tests with the 64-bit target binary, too
The ppc64 target is a superset of the 32-bit target, so we should
include the tests here, too. This used to be done in the past already,
but it got lost during the conversion to meson.
Fixes:
|
|
|
Laurent Vivier
|
e1e3d32118 |
tests/libqtest: add a migration test with two couples of failover devices
Signed-off-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211208130350.10178-5-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Laurent Vivier
|
1e2077e223 |
tests/libqtest: add some virtio-net failover migration cancelling tests
Add some tests to check the state of the machine if the migration is cancelled while we are using virtio-net failover. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211208130350.10178-4-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Laurent Vivier
|
e32b96b559 |
tests/qtest: add some tests for virtio-net failover
Add test cases to test several error cases that must be generated by invalid failover configuration. Add a combination of coldplug and hotplug test cases to be sure the primary is correctly managed according the presence or not of the STANDBY feature. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20211208130350.10178-3-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Laurent Vivier
|
efe84f03ea |
qtest/libqos: add a function to initialize secondary PCI buses
Scan the PCI devices to find bridge and set PCI_SECONDARY_BUS and PCI_SUBORDINATE_BUS (algorithm from seabios) Signed-off-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211208130350.10178-2-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Philippe Mathieu-Daudé
|
cc20926e9b |
tests/qtest/fdc-test: Add a regression test for CVE-2021-20196
Without the previous commit, when running 'make check-qtest-i386'
with QEMU configured with '--enable-sanitizers' we get:
AddressSanitizer:DEADLYSIGNAL
=================================================================
==287878==ERROR: AddressSanitizer: SEGV on unknown address 0x000000000344
==287878==The signal is caused by a WRITE memory access.
==287878==Hint: address points to the zero page.
#0 0x564b2e5bac27 in blk_inc_in_flight block/block-backend.c:1346:5
#1 0x564b2e5bb228 in blk_pwritev_part block/block-backend.c:1317:5
#2 0x564b2e5bcd57 in blk_pwrite block/block-backend.c:1498:11
#3 0x564b2ca1cdd3 in fdctrl_write_data hw/block/fdc.c:2221:17
#4 0x564b2ca1b2f7 in fdctrl_write hw/block/fdc.c:829:9
#5 0x564b2dc49503 in portio_write softmmu/ioport.c:201:9
Add the reproducer for CVE-2021-20196.
Suggested-by: Alexander Bulekov <alxndr@bu.edu>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20211124161536.631563-4-philmd@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
|
|
|
Philippe Mathieu-Daudé
|
aa62976c9d |
tests/qtest: Add fuzz-lsi53c895a-test
Without the previous commit, this test triggers: $ make check-qtest-x86_64 [...] Running test qtest-x86_64/fuzz-lsi53c895a-test qemu-system-x86_64: hw/scsi/lsi53c895a.c:624: lsi_do_dma: Assertion `s->current' failed. ERROR qtest-x86_64/fuzz-lsi53c895a-test - too few tests run (expected 1, got 0) Suggested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20211123111732.83137-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Mark Cave-Ayland
|
283191640c |
qtest/am53c974-test: add test for reset before transfer
Based upon the qtest reproducer posted to Gitlab issue #724 at https://gitlab.com/qemu-project/qemu/-/issues/724. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211118100327.29061-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Laurent Vivier
|
4a778dac9e |
tests/qtest/virtio-net: fix hotplug test case
virtio-net-test has an hotplug testcase that is never executed.
This is because the testcase is attached to virtio-pci interface
rather than to virtio-net-pci.
$ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -l | grep hotplug
/x86_64/.../pci-ohci-tests/ohci_pci-test-hotplug
/x86_64/.../e1000e/e1000e-tests/hotplug
/x86_64/.../virtio-blk-pci/virtio-blk-pci-tests/hotplug
/x86_64/.../vhost-user-blk-pci/vhost-user-blk-pci-tests/hotplug
/x86_64/.../virtio-rng-pci/virtio-rng-pci-tests/hotplug
/x86_64/.../virtio-scsi/virtio-scsi-tests/hotplug
/x86_64/.../virtio-serial/virtio-serial-tests/hotplug
With this fix:
$ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -l | grep hotplug
...
/x86_64/.../vhost-user-blk-pci/vhost-user-blk-pci-tests/hotplug
/x86_64/.../virtio-net-pci/virtio-net-pci-tests/hotplug
/x86_64/.../virtio-rng-pci/virtio-rng-pci-tests/hotplug
...
$ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -p /x86_64/.../virtio-net-pci-tests/hotplug
/x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-net-pci/virtio-net-pci-tests/hotplug: OK
Fixes:
|
|
|
Richard Henderson
|
b1fd92137e |
* Build system fixes and cleanups
* DMA support in the multiboot option ROM * Rename default-bus-bypass-iommu * Deprecate -watchdog and cleanup -watchdog-action * HVF fix for <PAGE_SIZE regions * Support TSC scaling for AMD nested virtualization * Fix for ESP fuzzing bug -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmGBUeEUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOh+Qf+OMRhRiv6dYjbK/5zXrx81AgxYAY3 dBUSr8v16LyrMl1U3DZWzhD+MzQsC83m/Xsh4lGxlHDWtkK9QQA5xDG95JZdY26i MGCbbjnFHISbyBQV9Y724gPfPjOOODuoFbzafSx6VLITOcyv1ye0cm7TOjOPB+tt E4c3JqTZ7g8a5yMe8ItkVhz5pPY+oVw8dxMNRp6Sup5Dbfx0DjacIwLasLsHfPL7 qBADfqB20ovHUzLjXu7oWgEd4KxJ6kiSCaJJu/KD36hg0wB8+WVP1o43j4PkczHT QjU7eZaeaTrN5Cf34ttPge6QReMi5SFNCaA9O9/HLqrQgdEtt/diZWuqjQ== =a2mC -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging * Build system fixes and cleanups * DMA support in the multiboot option ROM * Rename default-bus-bypass-iommu * Deprecate -watchdog and cleanup -watchdog-action * HVF fix for <PAGE_SIZE regions * Support TSC scaling for AMD nested virtualization * Fix for ESP fuzzing bug # gpg: Signature made Tue 02 Nov 2021 10:57:37 AM EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] * remotes/bonzini/tags/for-upstream: (27 commits) configure: fix --audio-drv-list help message configure: Remove the check for the __thread keyword Move the l2tpv3 test from configure to meson.build meson: remove unnecessary coreaudio test program meson: remove pointless warnings meson.build: Allow to disable OSS again meson: bump submodule to 0.59.3 qtest/am53c974-test: add test for cancelling in-flight requests esp: ensure in-flight SCSI requests are always cancelled KVM: SVM: add migration support for nested TSC scaling hw/i386: fix vmmouse registration watchdog: remove select_watchdog_action vl: deprecate -watchdog watchdog: add information from -watchdog help to -device help hw/i386: Rename default_bus_bypass_iommu hvf: Avoid mapping regions < PAGE_SIZE as ram configure: do not duplicate CPU_CFLAGS into QEMU_LDFLAGS configure: remove useless NPTL probe target/i386: use DMA-enabled multiboot ROM for new-enough QEMU machine types optionrom: add a DMA-enabled multiboot ROM ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Richard Henderson
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cc23377516 |
Add nuvoton sd module for NPCM7XX
Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming for default-bus-bypass-iommu Ignore cache operations to mmio in HVF -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmGBgjkdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8sAAgAsHaW2sHH/W4TzCwl DfqFar4u047Q+ZtQHjNehGHF9Bxp4NS4A0qL52vk0hVoqeWlyF1N29MOnewgVDqY q1x+uxJtG9xjTse7oEEshEEFF/7J8eB8dN4E78TFn/6IhvVhGiUeeRu29s44Ot6N E2KABcXfd+4gEdqhepLGEbi5n0TnA8ARmmeffZNWVEbsxQjHnMQQYmqGmllB3xV3 qPpnp3avvD1015zMwrLVmlDO+tSRr/1bed7k3k26ebga2B/zitxcpXFNCDlgePx0 LNT5QYvBDpE7HOruGQjf4iXPJHfYw5VMtopK7K++rY9KWiJgBVSjQUcB462sdCPk wNAp0g== =vlZ5 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into staging Add nuvoton sd module for NPCM7XX Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming for default-bus-bypass-iommu Ignore cache operations to mmio in HVF # gpg: Signature made Tue 02 Nov 2021 02:23:53 PM EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * remotes/rth/tags/pull-arm-20211102-2: hvf: arm: Ignore cache operations on MMIO hw/arm/virt: Rename default_bus_bypass_iommu target/arm: Use tcg_constant_i32() in gen_rev16() target/arm: Use tcg_constant_i64() in do_sat_addsub_64() target/arm: Use the constant variant of store_cpu_field() when possible target/arm: Introduce store_cpu_field_constant() helper target/arm: Use tcg_constant_i32() in op_smlad() target/arm: Advertise MVE to gdb when present tests/qtest/libqos: add SDHCI commands hw/arm: Attach MMC to quanta-gbs-bmc hw/arm: Add Nuvoton SD module to board hw/sd: add nuvoton MMC Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Shengtan Mao
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da2f02b360 |
tests/qtest/libqos: add SDHCI commands
Signed-off-by: Shengtan Mao <stmao@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Chris Rauer <crauer@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20211008002628.1958285-5-wuhaotsh@google.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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Daniel P. Berrangé
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b6a7f3e0d2 |
qapi: introduce x-query-opcount QMP command
This is a counterpart to the HMP "info opcount" command. It is being added with an "x-" prefix because this QMP command is intended as an ad hoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
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Daniel P. Berrangé
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3a841ab53f |
qapi: introduce x-query-jit QMP command
This is a counterpart to the HMP "info jit" command. It is being added with an "x-" prefix because this QMP command is intended as an ad hoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
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Daniel P. Berrangé
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fc30920731 |
qapi: introduce x-query-usb QMP command
This is a counterpart to the HMP "info usb" command. It is being added with an "x-" prefix because this QMP command is intended as an adhoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
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Daniel P. Berrangé
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37087fde0e |
qapi: introduce x-query-profile QMP command
This is a counterpart to the HMP "info profile" command. It is being added with an "x-" prefix because this QMP command is intended as an adhoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
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Mark Cave-Ayland
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fccec5ce17 |
qtest/am53c974-test: add test for cancelling in-flight requests
Based upon the qtest reproducer posted to Gitlab issue #663 at https://gitlab.com/qemu-project/qemu/-/issues/663. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20211101183516.8455-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Ani Sinha
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a8339e07f9 |
tests/acpi/bios-tables-test: update DSDT blob for multifunction bridge test
We added a new unit test for testing acpi hotplug on multifunction bridges in
q35 machines. Here, we update the DSDT table gloden master blob for this unit
test.
The test adds the following devices to qemu and then checks the changes
introduced in the DSDT table due to the addition of the following devices:
(a) a multifunction bridge device
(b) a bridge device with function 1
(c) a non-bridge device with function 2
In the DSDT table, we should see AML hotplug descriptions for (a) and (b).
For (a) we should find a hotplug AML description for function 0.
Following is the ASL diff between the original DSDT table and the modified DSDT
table due to the unit test. We see that multifunction bridge on bus 2 and single
function bridge on bus 3 function 1 are described, not the non-bridge balloon
device on bus 4, function 2.
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Thu Oct 7 18:29:19 2021
+ * Disassembly of /tmp/aml-C7JCA1, Thu Oct 7 18:29:19 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00002061 (8289)
+ * Length 0x00002187 (8583)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xF9
+ * Checksum 0x8D
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3265,23 +3265,95 @@
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ Name (BSEL, One)
+ Device (S00)
+ {
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ PCEJ (BSEL, _SUN)
+ }
+
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = One
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
+ Device (S19)
+ {
+ Name (_ADR, 0x00030001) // _ADR: Address
+ Name (BSEL, Zero)
+ Device (S00)
+ {
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Name (_ADR, Zero) // _ADR: Address
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ PCEJ (BSEL, _SUN)
+ }
+
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN))
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
Method (PCNT, 0, NotSerialized)
{
+ ^S19.PCNT ()
+ ^S10.PCNT ()
}
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Message-Id: <20211007135750.1277213-4-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
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Ani Sinha
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04dd78b9e8 |
tests/acpi/pcihp: add unit tests for hotplug on multifunction bridges for q35
commit |
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Ani Sinha
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6dcb1cc951 |
tests/acpi/bios-tables-test: add and allow changes to a new q35 DSDT table blob
We are adding a new unit test to cover the acpi hotplug support in q35 for multi-function bridges. This test uses a new table DSDT.multi-bridge. We need to allow changes in DSDT acpi table for addition of this new unit test. Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20211007135750.1277213-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> |
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Michael S. Tsirkin
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81d7228647 |
bios-tables-test: don't disassemble empty files
A recommended way to populate new tables is to have an empty expected file. In this case, attempts to disassemble will fail but it is useful to disassemble the actual files. Detect and skip decompile step in this case. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Stefan Hajnoczi
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515efffc2f |
vhost-user-blk-test: pass vhost-user socket fds to QSD
qemu-storage-daemon is launched with the vhost-user listen socket path.
The path is first unlinked before opening the listen socket. This
prevents stale UNIX domain socket files from stopping socket
initialization.
This behavior is undesirable in vhost-user-blk-test and the cause of a
bug:
There is a race condition in vhost-user-blk-test when QEMU launches
before QSD. It connects to the old socket that QSD unlinks and the
vhost-user connection is never serviced, resulting in a hang.
Pass the listen socket fd to QSD to maintain listen socket continuity
and prevent the lost connection.
Fixes:
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Igor Mammedov
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220ffd949b |
tests: bios-tables-test: use qtest_has_accel() API to register TCG only tests
.. only if TCG is available Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-16-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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b72c76033d |
tests: migration-test: use qtest_has_accel() API
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Suggested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210902113551.461632-15-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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07e6ed2c79 |
tests: arm-cpu-features: use qtest_has_kvm() API
and drop custom function that were doing the job Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-14-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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709611cb23 |
tests: acpi: arm/virt: drop redundant test_acpi_one() in test_acpi_virt_tcg()
follow up call with smbios options generates the same ACPI tables, so there is no need to run smbios-less variant at all. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-13-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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ef422a1422 |
tests: acpi: update expected blobs
DSDT:
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
New IVRS table:
[000h 0000 4] Signature : "IVRS" [I/O Virtualization Reporting Structure]
[004h 0004 4] Table Length : 00000068
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : 43
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Virtualization Info : 00002800
[028h 0040 8] Reserved : 0000000000000000
[030h 0048 1] Subtable Type : 10 [Hardware Definition Block]
[031h 0049 1] Flags : D1
[032h 0050 2] Length : 0038
[034h 0052 2] DeviceId : 0010
[036h 0054 2] Capability Offset : 0040
[038h 0056 8] Base Address : 00000000FED80000
[040h 0064 2] PCI Segment Group : 0000
[042h 0066 2] Virtualization Info : 0000
[044h 0068 4] Reserved : 00000044
[048h 0072 1] Entry Type : 02
[049h 0073 2] Device ID : 0000
[04Bh 0075 1] Data Setting : 00
[04Ch 0076 1] Entry Type : 02
[04Dh 0077 2] Device ID : 0008
[04Fh 0079 1] Data Setting : 00
[050h 0080 1] Entry Type : 02
[051h 0081 2] Device ID : 0010
[053h 0083 1] Data Setting : 00
[054h 0084 1] Entry Type : 02
[055h 0085 2] Device ID : 00F8
[057h 0087 1] Data Setting : 00
[058h 0088 1] Entry Type : 02
[059h 0089 2] Device ID : 00FA
[05Bh 0091 1] Data Setting : 00
[05Ch 0092 1] Entry Type : 02
[05Dh 0093 2] Device ID : 00FB
[05Fh 0095 1] Data Setting : 00
[060h 0096 1] Entry Type : 48
[061h 0097 2] Device ID : 0000
[063h 0099 1] Data Setting : 00
[064h 0100 1] Handle : 00
[065h 0101 2] Source Used Device ID : 00A0
[067h 0103 1] Variety : 01
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20210902113551.461632-12-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Igor Mammedov
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a4c730cbb2 |
tests: acpi: add testcase for amd-iommu (IVRS table)
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-11-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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c5a7baad29 |
tests: acpi: whitelist expected blobs for new acpi/q35/ivrs testcase
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-10-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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44d3bdd8a6 |
tests: acpi: add expected blob for DMAR table
[000h 0000 4] Signature : "DMAR" [DMA Remapping table] [004h 0004 4] Table Length : 00000078 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : 15 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 1] Host Address Width : 26 [025h 0037 1] Flags : 01 [026h 0038 10] Reserved : 00 00 00 00 00 00 00 00 00 00 [030h 0048 2] Subtable Type : 0000 [Hardware Unit Definition] [032h 0050 2] Length : 0040 [034h 0052 1] Flags : 00 [035h 0053 1] Reserved : 00 [036h 0054 2] PCI Segment Number : 0000 [038h 0056 8] Register Base Address : 00000000FED90000 [040h 0064 1] Device Scope Type : 03 [IOAPIC Device] [041h 0065 1] Entry Length : 08 [042h 0066 2] Reserved : 0000 [044h 0068 1] Enumeration ID : 00 [045h 0069 1] PCI Bus Number : FF [046h 0070 2] PCI Path : 00,00 [048h 0072 1] Device Scope Type : 01 [PCI Endpoint Device] [049h 0073 1] Entry Length : 08 [04Ah 0074 2] Reserved : 0000 [04Ch 0076 1] Enumeration ID : 00 [04Dh 0077 1] PCI Bus Number : 00 [04Eh 0078 2] PCI Path : 00,00 [050h 0080 1] Device Scope Type : 01 [PCI Endpoint Device] [051h 0081 1] Entry Length : 08 [052h 0082 2] Reserved : 0000 [054h 0084 1] Enumeration ID : 00 [055h 0085 1] PCI Bus Number : 00 [056h 0086 2] PCI Path : 01,00 [058h 0088 1] Device Scope Type : 01 [PCI Endpoint Device] [059h 0089 1] Entry Length : 08 [05Ah 0090 2] Reserved : 0000 [05Ch 0092 1] Enumeration ID : 00 [05Dh 0093 1] PCI Bus Number : 00 [05Eh 0094 2] PCI Path : 1F,00 [060h 0096 1] Device Scope Type : 01 [PCI Endpoint Device] [061h 0097 1] Entry Length : 08 [062h 0098 2] Reserved : 0000 [064h 0100 1] Enumeration ID : 00 [065h 0101 1] PCI Bus Number : 00 [066h 0102 2] PCI Path : 1F,02 [068h 0104 1] Device Scope Type : 01 [PCI Endpoint Device] [069h 0105 1] Entry Length : 08 [06Ah 0106 2] Reserved : 0000 [06Ch 0108 1] Enumeration ID : 00 [06Dh 0109 1] PCI Bus Number : 00 [06Eh 0110 2] PCI Path : 1F,03 [070h 0112 2] Subtable Type : 0002 [Root Port ATS Capability] [072h 0114 2] Length : 0008 [074h 0116 1] Flags : 01 [075h 0117 1] Reserved : 00 [076h 0118 2] PCI Segment Number : 0000 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-9-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
|
0ff92b6d99 |
tests: acpi: add testcase for intel_iommu (DMAR table)
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-8-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
|
f6826ac4ae |
tests: acpi: whitelist new expected table tests/data/acpi/q35/DMAR.dmar
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-7-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
|
b59a898458 |
tests: acpi: update expected tables blobs
Update adds CPU entries to MADT/SRAT/FACP and DSDT to cover 288 CPUs.
Notable changes are that CPUs with APIC ID 255 and higher
use 'Processor Local x2APIC Affinity' structure in SRAT and
"Device" element in DSDT.
FACP:
- Use APIC Cluster Model (V4) : 0
+ Use APIC Cluster Model (V4) : 1
SRAT:
...
+[1010h 4112 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity]
+[1011h 4113 1] Length : 10
+
+[1012h 4114 1] Proximity Domain Low(8) : 00
+[1013h 4115 1] Apic ID : FE
+[1014h 4116 4] Flags (decoded below) : 00000001
+ Enabled : 1
+[1018h 4120 1] Local Sapic EID : 00
+[1019h 4121 3] Proximity Domain High(24) : 000000
+[101Ch 4124 4] Clock Domain : 00000000
+
+[1020h 4128 1] Subtable Type : 02 [Processor Local x2APIC Affinity]
+[1021h 4129 1] Length : 18
+
+[1022h 4130 2] Reserved1 : 0000
+[1024h 4132 4] Proximity Domain : 00000001
+[1028h 4136 4] Apic ID : 000000FF
+[102Ch 4140 4] Flags (decoded below) : 00000001
+ Enabled : 1
+[1030h 4144 4] Clock Domain : 00000000
+[1034h 4148 4] Reserved2 : 00000000
...
+[1320h 4896 1] Subtable Type : 02 [Processor Local x2APIC Affinity]
+[1321h 4897 1] Length : 18
+
+[1322h 4898 2] Reserved1 : 0000
+[1324h 4900 4] Proximity Domain : 00000001
+[1328h 4904 4] Apic ID : 0000011F
+[132Ch 4908 4] Flags (decoded below) : 00000001
+ Enabled : 1
+[1330h 4912 4] Clock Domain : 00000000
+[1334h 4916 4] Reserved2 : 00000000
DSDT:
...
+ Processor (C0FE, 0xFE, 0x00000000, 0x00)
+ {
...
+ }
+
+ Device (C0FF)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0xFF) // _UID: Unique ID
...
+ }
+ Device (C11F)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x011F) // _UID: Unique ID
...
+ }
APIC:
+[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
+[035h 0053 1] Length : 08
+[036h 0054 1] Processor ID : 01
+[037h 0055 1] Local Apic ID : 01
+[038h 0056 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
...
+[81Ch 2076 1] Subtable Type : 00 [Processor Local APIC]
+[81Dh 2077 1] Length : 08
+[81Eh 2078 1] Processor ID : FE
+[81Fh 2079 1] Local Apic ID : FE
+[820h 2080 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+
+[824h 2084 1] Subtable Type : 09 [Processor Local x2APIC]
+[825h 2085 1] Length : 10
+[826h 2086 2] Reserved : 0000
+[828h 2088 4] Processor x2Apic ID : 000000FF
+[82Ch 2092 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+[830h 2096 4] Processor UID : 000000FF
...
+[A24h 2596 1] Subtable Type : 09 [Processor Local x2APIC]
+[A25h 2597 1] Length : 10
+[A26h 2598 2] Reserved : 0000
+[A28h 2600 4] Processor x2Apic ID : 0000011F
+[A2Ch 2604 4] Flags (decoded below) : 00000000
+ Processor Enabled : 0
+[A30h 2608 4] Processor UID : 0000011F
+
+[A34h 2612 1] Subtable Type : 01 [I/O APIC]
+[A35h 2613 1] Length : 0C
+[A36h 2614 1] I/O Apic ID : 00
+[A37h 2615 1] Reserved : 00
+[A38h 2616 4] Address : FEC00000
+[A3Ch 2620 4] Interrupt : 00000000
+
+[A40h 2624 1] Subtable Type : 02 [Interrupt Source Override]
+[A41h 2625 1] Length : 0A
+[A42h 2626 1] Bus : 00
+[A43h 2627 1] Source : 00
+[A44h 2628 4] Interrupt : 00000002
+[A48h 2632 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
-[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
-[04Bh 0075 1] Length : 0A
-[04Ch 0076 1] Bus : 00
-[04Dh 0077 1] Source : 05
-[04Eh 0078 4] Interrupt : 00000005
-[052h 0082 2] Flags (decoded below) : 000D
+[A4Ah 2634 1] Subtable Type : 02 [Interrupt Source Override]
+[A4Bh 2635 1] Length : 0A
+[A4Ch 2636 1] Bus : 00
+[A4Dh 2637 1] Source : 05
+[A4Eh 2638 4] Interrupt : 00000005
+[A52h 2642 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
-[055h 0085 1] Length : 0A
-[056h 0086 1] Bus : 00
-[057h 0087 1] Source : 09
-[058h 0088 4] Interrupt : 00000009
-[05Ch 0092 2] Flags (decoded below) : 000D
+[A54h 2644 1] Subtable Type : 02 [Interrupt Source Override]
+[A55h 2645 1] Length : 0A
+[A56h 2646 1] Bus : 00
+[A57h 2647 1] Source : 09
+[A58h 2648 4] Interrupt : 00000009
+[A5Ch 2652 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
-[05Fh 0095 1] Length : 0A
-[060h 0096 1] Bus : 00
-[061h 0097 1] Source : 0A
-[062h 0098 4] Interrupt : 0000000A
-[066h 0102 2] Flags (decoded below) : 000D
+[A5Eh 2654 1] Subtable Type : 02 [Interrupt Source Override]
+[A5Fh 2655 1] Length : 0A
+[A60h 2656 1] Bus : 00
+[A61h 2657 1] Source : 0A
+[A62h 2658 4] Interrupt : 0000000A
+[A66h 2662 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
-[069h 0105 1] Length : 0A
-[06Ah 0106 1] Bus : 00
-[06Bh 0107 1] Source : 0B
-[06Ch 0108 4] Interrupt : 0000000B
-[070h 0112 2] Flags (decoded below) : 000D
+[A68h 2664 1] Subtable Type : 02 [Interrupt Source Override]
+[A69h 2665 1] Length : 0A
+[A6Ah 2666 1] Bus : 00
+[A6Bh 2667 1] Source : 0B
+[A6Ch 2668 4] Interrupt : 0000000B
+[A70h 2672 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
-[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
-[073h 0115 1] Length : 06
-[074h 0116 1] Processor ID : FF
-[075h 0117 2] Flags (decoded below) : 0000
+[A72h 2674 1] Subtable Type : 0A [Local x2APIC NMI]
+[A73h 2675 1] Length : 0C
+[A74h 2676 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
-[077h 0119 1] Interrupt Input LINT : 01
+[A76h 2678 4] Processor UID : FFFFFFFF
+[A7Ah 2682 1] Interrupt Input LINT : 01
+[A7Bh 2683 3] Reserved : 000000
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20210902113551.461632-6-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Igor Mammedov
|
80a2f3387c |
tests: acpi: q35: test for x2APIC entries in SRAT
Set -smp 1,maxcpus=288 to test for ACPI code that deal with CPUs with large APIC ID (>255). PS: Test requires KVM and in-kernel irqchip support, so skip test if KVM is not available. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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c306cdb0cc |
tests: acpi: whitelist expected tables for acpi/q35/xapic testcase
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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e741aff0f4 |
tests: qtest: add qtest_has_accel() to check if tested binary supports accelerator
Currently it is not possible to create tests that have KVM as a hard requirement on a host that doesn't support KVM for tested target binary (modulo going through the trouble of compiling out the offending test case). Following scenario makes test fail when it's run on non x86 host: qemu-system-x86_64 -enable-kvm -M q35,kernel-irqchip=on -smp 1,maxcpus=288 This patch introduces qtest_has_accel() to let users check if accel is available in advance and avoid executing non run-able test-cases. It implements detection of TCG and KVM only, the rest could be added later on, when we actually start testing them in qtest. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Igor Mammedov
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685db13a38 |
tests: acpi: dump table with failed checksum
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210902113551.461632-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Paolo Bonzini
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537b724899 |
configure, meson: move fuzzing configuration to Meson
Cc: Alexander Oleinik <alxndr@bu.edu> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Tested-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20211007130829.632254-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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654d6b0453 |
meson: switch minimum meson version to 0.58.2, minimum recommended to 0.59.2
Meson 0.58.2 does not need b_staticpic=$pie anymore, and has stabilized the keyval module. Remove the workaround and use a few replacements for features deprecated in the 0.57.0 release cycle. One feature that we would like to use is passing dependencies to summary. However, that was broken in 0.59.0 and 0.59.1. Therefore, use the embedded Meson if the host has anything older than 0.59.2, but allow --meson= to use 0.58.2. Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Yanan Wang
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bbb0c0ec6d |
qtest/numa-test: Use detailed -smp CLIs in test_def_cpu_split
Since commit
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Yanan Wang
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afc8e9aaa7 |
qtest/numa-test: Use detailed -smp CLIs in pc_dynamic_cpu_cfg
Since commit
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Paolo Bonzini
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809954efc2 |
tests: qtest: bios-tables-test depends on the unpacked edk2 ROMs
Skip the test if bzip2 is not available, and run it after they are uncompressed. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210923105529.3845741-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Yang Zhong
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0205c4fa1e |
target/i386: Add the query-sgx-capabilities QMP command
Libvirt can use query-sgx-capabilities to get the host sgx capabilities to decide how to allocate SGX EPC size to VM. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210910102258.46648-3-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Yang Zhong
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57d874c4c7 |
target/i386: Add HMP and QMP interfaces for SGX
The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve the SGX information from VM side when SGX is enabled on Intel platform. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210910102258.46648-2-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Peter Maydell
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aca68d95c5 |
libqtest: check for g_setenv() failure
g_setenv() can fail; check for it when starting a QEMU process when we set the QEMU_AUDIO_DRV environment variable. Because this happens after fork() reporting an exact message via printf() is a bad idea; just exit(1), as we already do for the case of execlp() failure. Fixes: Coverity CID 1460117 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210820163750.9106-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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8664d30a30 |
Fuzzing Patches for 2021-09-01
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+tTiv4cTddY0BRfETmYd3lg6lk4FAmEvZwgACgkQTmYd3lg6 lk6nCw//X5wVWFBHDw+7nQ3lpu/rYTVTdqzdwgcOih5ima4ZeqmRbEMGhKYHcekZ YQxAP3r4k11Fp2Jev4CS18c4TVE/jYE7d8RwS5ROGTT8IOhe3Ntgd6d5MNjIdm86 HwaTmmrxpL2cCWUgCGX8H+BXT0p+sjNpMTXfgu9CYlYEgVQKVRiTBTEsCku12FRM kwqHaFzJZoFMd45NhbH2wHt/dmDVuVYp7UuCM/HzNFKLO8E25sBLQip97RRTgInB iT9vadTYsgkrdRbIWiQbP8vWKL4D0SS7Sw6DYlxTCYhEEZffiiXPVqEwf+qr9LRX sLui6vMyjLB4yhjsg5AEd0IMZSP4H431su6YEuP0XOXG5yh5nSNkGVim0ezt1UBF DDvYDumVK0P4seCVhK87fEejW9+GAlTSf65LBcK07JSo5DLyRzfmwBXQM3EKzdCK y58Jthkmlhe4zym40WNwM91QFaNuWAD0pdvB9fa9OcidvuLgkhdgN72LJVgZSoq9 7UuWSV6laTnTAIP1YL4R5fvq1r5gNE1cnzCFf6th87pmvOUhO43Y2dT6Me8UR0v8 B7tHxtAiZJkfWvOYL4Jy3vaBXuivZCtEYUUDc0Y0Cmzfd9DnvnkxrKirZ6ECoyDs RsR6nUO1tbpe0ekdl8EvYG3PRt8iHIahZ25GnKcUSTRFydetPqE= =ec6M -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/a1xndr/tags/fuzz-pull-2021-09-01' into staging Fuzzing Patches for 2021-09-01 # gpg: Signature made Wed 01 Sep 2021 12:42:00 BST # gpg: using RSA key FAD4E2BF871375D6340517C44E661DDE583A964E # gpg: Good signature from "Alexander Bulekov <alxndr@bu.edu>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAD4 E2BF 8713 75D6 3405 17C4 4E66 1DDE 583A 964E * remotes/a1xndr/tags/fuzz-pull-2021-09-01: MAINTAINERS: add fuzzing reviewer MAINTAINERS: Add myself as a reviewer for Device Fuzzing fuzz: unblock SIGALRM so the timeout works fuzz: use ITIMER_REAL for timeouts fuzz: add an instrumentation filter fuzz: make object-name matching case-insensitive fuzz: adjust timeout to allow for longer inputs fuzz: fix sparse memory access in the DMA callback Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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59a89510b6 |
Merge tpm 2021/09/01 v1
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEuBi5yt+QicLVzsZrda1lgCoLQhEFAmEvbmcACgkQda1lgCoL QhEmtggAgWR8p/4awhUoTscEkLBoilxJATTZBkxbN8NrRYmOIIn29QShhEDhvuG9 t6ch0DrJuSVMISTnMHtE5XJKBBD8vFS04SaD4Op8NgOyKTd2fQSXx6SyqgQVK0ui zfZFjcjam9i+onIGVCSoUkGRL5GMOTougTh4SwMndR9sL9cn7lUQEJZbk7kS1II6 5r6uvKPtY4fyvxsi0wcHOYFSeajJfQOVZkav7JCnvuXiiCjQzZw2Aadsvrkmt3Y4 oaOTiOvYWJhNqFhWSuyY7gS4E4fjShwr3UuOcsmKUTu56Uf2GgdA9w4+AfZJQSxG C1Vi+u5J8+oZzVHna9T1lRKQ5wLfCA== =IprO -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2021-09-01-1' into staging Merge tpm 2021/09/01 v1 # gpg: Signature made Wed 01 Sep 2021 13:13:27 BST # gpg: using RSA key B818B9CADF9089C2D5CEC66B75AD65802A0B4211 # gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211 * remotes/stefanberger/tags/pull-tpm-2021-09-01-1: tests: acpi: tpm1.2: Add expected TPM 1.2 ACPI blobs tests: acpi: Add test cases for TPM 1.2 with TCPA table tests: Use QMP to check whether a TPM device model is available tests: acpi: prepare for new TPM 1.2 related tables tests: tpm: Create TPM 1.2 response in TPM emulator tests: acpi: tpm2: Add the renamed ACPI files and drop old ones tests: Add suffix 'tpm2' or 'tpm12' to ACPI table files tests: acpi: Prepare for renaming of TPM2 related ACPI files tests: Add tpm_version field to TPMTestState and fill it tests: Rename TestState to TPMTestState Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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079b1252e9 |
* Refactor M-profile systick to use Clocks instead of system_clock_scale global
* clock: Provide builtin multiplier/divider * Add A64FX processor model * Enable MVE emulation in Cortex-M55 * hw: Add compat machines for 6.2 * hw/intc/arm_gicv3: Replace mis-used MEMTX_* constants by booleans * hw/arm/raspi: Remove deprecated raspi2/raspi3 aliases -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmEvV40ZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gO9EACbRq2XN67/3n8icVlCA/R0 c1NKdar5yngG7EUoKg8rIHWSG4nlvGQxEsInjqccWpXUBwhRbmjIoI7OWOTVcNKL IxZPDgS619CPpUrOPtOouYYl3RiKpNS6v1BAne1IsZrMtydrioRCZIh8Wiz1cAod Ok8ts1hZIyg+n5gpYjeXs57Afsms4SCnt0zJT/4/VZXZmi+ohHVOzFX/ZGKmZyMP 2lUHX8DcBCPW6JPt4poIP9MVs+44v9RajSMHfHFkNkJb0Q8sh+fgKbAdnxOW/6d+ B381tMPtT5D1FZ5UmIwJl6XzY3JLJyU2ySQOtXlnkGWniuihxIwG0qBxwMsbPFrl bcTuJK5C20DmjFNH9jk9LMzKD4rDrLcADfoo/AfPe/JqTpE1t6zXcOzAgVTrPNx/ tSDAXHAsmnJ2Y5O7h5MRUSG6R4h7+PRoutXQyGRi39VMNkiPmqltQtM9N1UaguOe +X3w3yjtsCotN1cLWq0u/UuC7FoDoCge/uBSzYIKoeu/WyJFGjuocWGg7TmwOJyd TzqrSOqCsAx9DhVJ1trO82qb31zpyFf4B1C05PMaoudzlgMfWfvXVDrtcRmO+kjn DmUB4vqz5g2jGroJWAVuN+wz245KqkSaHA6RRI5wf9n57H56T0Rfxa2o73A9TLZy M4T9XiJxDByGODYTu8ejXQ== =D5pQ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210901' into staging * Refactor M-profile systick to use Clocks instead of system_clock_scale global * clock: Provide builtin multiplier/divider * Add A64FX processor model * Enable MVE emulation in Cortex-M55 * hw: Add compat machines for 6.2 * hw/intc/arm_gicv3: Replace mis-used MEMTX_* constants by booleans * hw/arm/raspi: Remove deprecated raspi2/raspi3 aliases # gpg: Signature made Wed 01 Sep 2021 11:35:57 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210901: (51 commits) arm: Remove system_clock_scale global hw/timer/stellaris-gptm: Use Clock input instead of system_clock_scale hw/arm/stellaris: Split stellaris-gptm into its own file hw/arm/stellaris: Fix code style issues in GPTM code hw/timer/armv7m_systick: Use clock inputs instead of system_clock_scale hw/arm/msf2-soc: Wire up refclk hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property hw/arm/msf2_soc: Don't allocate separate MemoryRegions hw/arm/stellaris: Wire sysclk up to armv7m hw/arm/stellaris: split stellaris_sys_init() hw/arm/nrf51: Wire up sysclk hw/arm/stm32vldiscovery: Delete trailing blank line hw/arm/stm32f405: Wire up sysclk and refclk hw/arm/stm32f205: Wire up sysclk and refclk hw/arm/stm32f100: Wire up sysclk and refclk hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize clock: Provide builtin multiplier/divider hw/arm/mps2.c: Connect up armv7m clocks armsse: Wire up systick cpuclk clock hw/arm/armv7m: Create input clocks ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexander Bulekov
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aaa94a1b3c |
fuzz: unblock SIGALRM so the timeout works
The timeout mechanism won't work if SIGALRM is blocked. This changes unmasks SIGALRM when the timer is installed. This doesn't completely solve the problem, as the fuzzer could trigger some device activity that re-masks SIGALRM. However, there are currently no inputs on OSS-Fuzz that re-mask SIGALRM and timeout. If that turns out to be a real issue, we could try to hook sigmask-type calls, or use a separate timer thread. Based-on: <20210713150037.9297-1-alxndr@bu.edu> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> |
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Alexander Bulekov
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40c0d963db |
fuzz: use ITIMER_REAL for timeouts
Using ITIMER_VIRTUAL is a bad idea, if the fuzzer hits a blocking syscall - e.g. ppoll with a NULL timespec. This causes timeout issues while fuzzing some block-device code. Fix that by using wall-clock time. This might cause inputs to timeout sometimes due to scheduling effects/ambient load, but it is better than bringing the entire fuzzing process to a halt. Based-on: <20210713150037.9297-1-alxndr@bu.edu> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> |
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Alexander Bulekov
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f2e8b87a1a |
fuzz: make object-name matching case-insensitive
We have some configs for devices such as the AC97 and ES1370 that were not matching memory-regions correctly, because the configs provided lowercase names. To resolve these problems and prevent them from occurring again in the future, convert both the pattern and names to lower-case, prior to checking for a match. Suggested-by: Darren Kenny <darren.kenny@oracle.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> |
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Alexander Bulekov
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993f52f4d4 |
fuzz: adjust timeout to allow for longer inputs
Using a custom timeout is useful to continue fuzzing complex devices, even after we run into some slow code-path. However, simply adding a fixed timeout to each input effectively caps the maximum input length/number of operations at some artificial value. There are two major problems with this: 1. Some code might only be reachable through long IO sequences. 2. Longer inputs can actually be _better_ for performance. While the raw number of fuzzer executions decreases with larger inputs, the number of MMIO/PIO/DMA operation/second actually increases, since were are speding proportionately less time fork()ing. With this change, we keep the custom-timeout, but we renew it, prior to each MMIO/PIO/DMA operation. Thus, we time-out only when a specific operation takes a long time. Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> |
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Alexander Bulekov
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af16990a1b |
fuzz: fix sparse memory access in the DMA callback
The code mistakenly relied on address_space_translate to store the length remaining until the next memory-region. We care about this because when there is RAM or sparse-memory neighboring on an MMIO region, we should only write up to the border, to prevent inadvertently invoking MMIO handlers within the DMA callback. However address_space_translate_internal only stores the length until the end of the MemoryRegion if memory_region_is_ram(mr). Otherwise the *len is left unmodified. This caused some false-positive issues, where the fuzzer found a way to perform a nested MMIO write through a DMA callback on an [address, length] that started within sparse memory and spanned some device MMIO regions. To fix this, write to sparse memory in small chunks of memory_access_size (similar to the underlying address_space_write code), which will prevent accidentally hitting MMIO handlers through large writes. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
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Shuuichirou Ishii
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499243e189 |
tests/arm-cpu-features: Add A64FX processor related tests
Add tests that the A64FX CPU model exposes the expected features. Signed-off-by: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com> Reviewed-by: Andrew Jones <drjones@redhat.com> [PMM: added commit message body] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Philippe Mathieu-Daudé
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cd066eea60 |
tests: Remove uses of deprecated raspi2/raspi3 machine names
Commit
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Stefan Berger
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75539b886a |
tests: acpi: tpm1.2: Add expected TPM 1.2 ACPI blobs
The TCPA.tis.tpm12 file contains the following: [000h 0000 4] Signature : "TCPA" [Trusted Computing Platform Alliance table] [004h 0004 4] Table Length : 00000032 [008h 0008 1] Revision : 02 [009h 0009 1] Checksum : 32 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 2] Platform Class : 0000 [026h 0038 4] Min Event Log Length : 00010000 [02Ah 0042 8] Event Log Address : 0000000007FF0000 Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-11-stefanb@linux.ibm.com |
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Stefan Berger
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33660128d4 |
tests: acpi: Add test cases for TPM 1.2 with TCPA table
Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-10-stefanb@linux.ibm.com |
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Stefan Berger
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58edc32cfc |
tests: Use QMP to check whether a TPM device model is available
Use QMP to check whether a given TPM device model is available and if it is not the case then do not register the tests that require it. Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20210802215246.1433175-9-stefanb@linux.ibm.com |
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Stefan Berger
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343776a685 |
tests: acpi: prepare for new TPM 1.2 related tables
Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-8-stefanb@linux.ibm.com |
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Stefan Berger
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044d55dcd4 |
tests: tpm: Create TPM 1.2 response in TPM emulator
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-7-stefanb@linux.ibm.com |
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Stefan Berger
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4a42dda7c1 |
tests: acpi: tpm2: Add the renamed ACPI files and drop old ones
Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-6-stefanb@linux.ibm.com |
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Stefan Berger
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bf8443ef99 |
tests: Add suffix 'tpm2' or 'tpm12' to ACPI table files
Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-5-stefanb@linux.ibm.com |
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Stefan Berger
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a003dbc69e |
tests: acpi: Prepare for renaming of TPM2 related ACPI files
Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-4-stefanb@linux.ibm.com |
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Stefan Berger
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09b20a148a |
tests: Add tpm_version field to TPMTestState and fill it
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-3-stefanb@linux.ibm.com |
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Stefan Berger
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9bd0e32a19 |
tests: Rename TestState to TPMTestState
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20210802215246.1433175-2-stefanb@linux.ibm.com |
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Qiang Liu
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2b3a98255c |
hw/display/xlnx_dp: fix an out-of-bounds read in xlnx_dp_read
xlnx_dp_read allows an out-of-bounds read at its default branch because
of an improper index.
According to
https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
(DP Module), registers 0x3A4/0x3A4/0x3AC are allowed.
DP_INT_MASK 0x000003A4 32 mixed 0xFFFFF03F Interrupt Mask Register for intrN.
DP_INT_EN 0x000003A8 32 mixed 0x00000000 Interrupt Enable Register.
DP_INT_DS 0x000003AC 32 mixed 0x00000000 Interrupt Disable Register.
In xlnx_dp_write, when the offset is 0x3A8 and 0x3AC, the virtual device
will write s->core_registers[0x3A4
>> 2]. That is to say, the maxize of s->core_registers could be ((0x3A4
>> 2) + 1). However, the current size of s->core_registers is (0x3AF >>
>> 2), that is ((0x3A4 >> 2) + 2), which is out of the range.
In xlxn_dp_read, the access to offset 0x3A8 or 0x3AC will be directed to
the offset 0x3A8 (incorrect functionality) or 0x3AC (out-of-bounds read)
rather than 0x3A4.
This patch enforces the read access to offset 0x3A8 and 0x3AC to 0x3A4,
but does not adjust the size of s->core_registers to avoid breaking
migration.
Fixes:
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Peter Maydell
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a8ca0033c2 |
tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct
Zero-initialize the sockaddr_in struct that we're about to fill in and pass to bind(), to ensure we don't leave possible implementation-defined extension fields as uninitialized garbage. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Corey Minyard <cminyard@mvista.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-id: 20210813150506.7768-4-peter.maydell@linaro.org |
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Thomas Huth
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b063c290f3 |
tests/qtest/vhost-user-blk-test: Check whether qemu-storage-daemon is available
The vhost-user-blk-test currently hangs if QTEST_QEMU_STORAGE_DAEMON_BINARY points to a non-existing binary. Let's improve this situation by checking for the availability of the binary first, so we can fail gracefully if it is not accessible. Message-Id: <20210811095949.133462-1-thuth@redhat.com> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Thomas Huth
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cc1838c25d |
storage-daemon: Add missing build dependency to the vhost-user-blk-test
vhost-user-blk-test needs the qemu-storage-daemon, otherwise it currently hangs. So make sure that we build the daemon before running the tests. Message-Id: <20210811094705.131314-1-thuth@redhat.com> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Philippe Mathieu-Daudé
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4ac0b72bae |
hw/sd/sdcard: Fix assertion accessing out-of-range addresses with CMD30
OSS-Fuzz found sending illegal addresses when querying the write protection bits triggers the assertion added in commit |
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Peter Xu
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61c32485b7 |
tests: Fix migration-test build failure for sparc
Even if <linux/kvm.h> seems to exist for all archs on linux, however including
it with __linux__ defined seems to be not working yet as it'll try to include
asm/kvm.h and that can be missing for archs that do not support kvm.
To fix this (instead of any attempt to fix linux headers..), we can mark the
header to be x86_64 only, because it's so far only service for adding the kvm
dirty ring test.
Fixes:
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Peter Maydell
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202abcd389 |
hw/nvme fixes
* new PMR test (Gollu Appalanaidu) * pmr/sgl mapping fix (Padmakar Kalghatgi) * hotplug fixes (me) * mmio out-of-bound read fix (me) * big-endian host fixes (me) -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmD/CnQACgkQTeGvMW1P DenrlQgAhiKhfKQAJPpP59noKaVNgHFCJySNFQdrPmnD8xDehn4wNRiP4pcdc4aL wpB28S5GN9LopzMpLtQBfQZaLygMPFa4QnuJ0ZFJnVoZZa5+T0yQUbBDt8xBJEM5 gVXBeB4rjnP4TjyTipgtRhSUZt7wieul60z9oFUbJwg4ntt0Jp36DFRzSdXAhTXY MubNZy+jqf8p2R4icL97kZISI/phPbWBBMVDSmyqlU5E/pCnip/n5pdISJ/MTPgl amqBA93Zs9d2jzhZlhfiKMT+qtdUuItGUk8NV9L2IKxE7ZTdT+tujKfQ1c54JvGM J70NjthZApzV4EJwZyrqD0UXNYwFIg== =jXUw -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging hw/nvme fixes * new PMR test (Gollu Appalanaidu) * pmr/sgl mapping fix (Padmakar Kalghatgi) * hotplug fixes (me) * mmio out-of-bound read fix (me) * big-endian host fixes (me) # gpg: Signature made Mon 26 Jul 2021 20:18:12 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-next-pull-request: tests/qtest/nvme-test: add mmio read test hw/nvme: fix mmio read hw/nvme: fix out-of-bounds reads hw/nvme: use symbolic names for registers hw/nvme: split pmrmsc register into upper and lower hw/nvme: fix controller hot unplugging tests/qtest/nvme-test: add persistent memory region test hw/nvme: error handling for too many mappings hw/nvme: unregister controller with subsystem at exit hw/nvme: mark nvme-subsys non-hotpluggable hw/nvme: remove NvmeCtrl parameter from ns setup/check functions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Klaus Jensen
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9631a8ab21 |
tests/qtest/nvme-test: add mmio read test
Add a regression test for mmio read on big-endian hosts. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> |
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Gollu Appalanaidu
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51e90178f7 |
tests/qtest/nvme-test: add persistent memory region test
This will test the PMR functionality. Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> [k.jensen: replaced memory-backend-file with memory-backend-ram] Signed-off-by: Klaus Jensen <k.jensen@samsung.com> |
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Dr. David Alan Gilbert
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5e32ffd346 |
tests/qtest/migration-test.c: use 127.0.0.1 instead of 0
OpenBSD doesn't like :0 as an address, switch to using 127.0.0.1 in baddest; it's really testing the :0 port number that isn't allowed on anything. (The test doesn't currently run anyway because of the userfault problem that Peter noticed, but this gets us closer to being able to reenable it) Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210719185217.122105-1-dgilbert@redhat.com> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> |
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Philippe Mathieu-Daudé
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59b63d78be |
hw/sd/sdcard: Check for valid address range in SEND_WRITE_PROT (CMD30)
OSS-Fuzz found sending illegal addresses when querying the write
protection bits triggers an assertion:
qemu-fuzz-i386: hw/sd/sd.c:824: uint32_t sd_wpbits(SDState *, uint64_t): Assertion `wpnum < sd->wpgrps_size' failed.
==11578== ERROR: libFuzzer: deadly signal
#8 0x7ffff628e091 in __assert_fail
#9 0x5555588f1a3c in sd_wpbits hw/sd/sd.c:824:9
#10 0x5555588dd271 in sd_normal_command hw/sd/sd.c:1383:38
#11 0x5555588d777c in sd_do_command hw/sd/sd.c
#12 0x555558cb25a0 in sdbus_do_command hw/sd/core.c💯16
#13 0x555558e02a9a in sdhci_send_command hw/sd/sdhci.c:337:12
#14 0x555558dffa46 in sdhci_write hw/sd/sdhci.c:1187:9
#15 0x5555598b9d76 in memory_region_write_accessor softmmu/memory.c:489:5
Similarly to commit
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Peter Maydell
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9516034d05 |
Some qemu updates for IPMI and I2C
Move some ADC file to where they belong and move some sensors to a sensor directory, since with new BMCs coming in lots of different sensors should be coming in. Keep from cluttering things up. Add support for I2C PMBus devices. Replace the confusing and error-prone i2c_send_recv and i2c_transfer with specific send and receive functions. Several errors have already been made with these, avoid any new errors. Fix the watchdog_expired field in the IPMI watchdog, it's not a bool, it's a u8. After a vmstate transfer, the new value could be wrong. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE/Q1c5nzg9ZpmiCaGYfOMkJGb/4EFAmDoeGAACgkQYfOMkJGb /4HpkQ//YLAddy3Kqo5LbyI0BPxcx567htHH34XXp4Pz22DcAoPvZRyRlsGiAAcR HRmqjSXNBan+KhlA82coczHUami8C+9NQAfnABf7Mv4CQnvf9Hziy9YR0riTAgEk Xfc25eYYK5dzfOHVVbp2KJ2IWPo/sY3UqbIKu9MyYzriNpzIuT5NW1aGjIrhW7Js 2feeIHxH4fEXzhkkgMKMJfXdxkYyD78mB3IfnpVCnoODq3fMZXtMskRDHWjdMEnT 0u53zeQd5T0jElLZXlwDKAd9QpiPWVnfTJwND3fwWjSMIAVkd7kTqJbVtHpYJMWB amOR9qsw72r/WIOow4lLbSjS57GbyEjB344dtlrzHhhW68y9SGbtaSXWD/imkAfB NhLlMzNzsIb+dHZhAwdEgmg4Nz/1HZngiK4Awk2YFBVCn7G6BqAvpMwLGdYYr3Az P4EPs0aVdGYBbcN5XxAwkKEqESrzF+iF7iZvNTocdSJSCV+ebFNLlZWIq/aXS1TA IED1mBmyc/drWF+jA0D520uafT1m+zN4HhPvHpRyK65bqqiH2veDpK20kz0lwQe8 e2ZeDVG2oVTMIQ+mmyu7kD9xgxjmapoHz64K1VkUwsnXE3jp9yqfa17B9vHOjqkq e/iaHiek8xeTWWyoShGk2zoAHBChkwSy/Y2JuZA6FXRnoU6kKsg= =8708 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into staging Some qemu updates for IPMI and I2C Move some ADC file to where they belong and move some sensors to a sensor directory, since with new BMCs coming in lots of different sensors should be coming in. Keep from cluttering things up. Add support for I2C PMBus devices. Replace the confusing and error-prone i2c_send_recv and i2c_transfer with specific send and receive functions. Several errors have already been made with these, avoid any new errors. Fix the watchdog_expired field in the IPMI watchdog, it's not a bool, it's a u8. After a vmstate transfer, the new value could be wrong. # gpg: Signature made Fri 09 Jul 2021 17:25:04 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/for-qemu-6.1-2: (24 commits) tests/qtest: add tests for MAX34451 device model hw/misc: add MAX34451 device tests/qtest: add tests for ADM1272 device model hw/misc: add ADM1272 device hw/i2c: add support for PMBus ipmi/sim: fix watchdog_expired data type error in IPMIBmcSim struct hw/i2c: Introduce i2c_start_recv() and i2c_start_send() hw/i2c: Extract i2c_do_start_transfer() from i2c_start_transfer() hw/i2c: Make i2c_start_transfer() direction argument a boolean hw/i2c: Rename i2c_set_slave_address() -> i2c_slave_set_address() hw/i2c: Remove confusing i2c_send_recv() hw/misc/auxbus: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/misc/auxbus: Replace 'is_write' boolean by its value hw/misc/auxbus: Explode READ_I2C / WRITE_I2C_MOT cases hw/misc/auxbus: Fix MOT/classic I2C mode hw/i2c/ppc4xx_i2c: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/i2c/ppc4xx_i2c: Add reference to datasheet hw/display/sm501: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/display/sm501: Simplify sm501_i2c_write() logic hw/input/lm832x: Define TYPE_LM8323 in public header ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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3cfcc329af |
target-arm queue:
* New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmDodKYZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lLWD/9Ux5FW5GfJstzcLyMaEQCA KMw9I18YYDXKnynxn8vqBYPV49pN8Hc/4xFcCuhVhsNMBiLMvRpNrnzCad2hylVJ JrFkyHO78ibdTRqUCWtnToFnNR37gBei1sL8jlcaex789ifDX7KOpfERqvIa313o 5iMEDLOtbkqauyNXPpMxmS/imP13VLD0iuChQwYM6tYnVKja7uFScJRlU6/3ayRL sZC0Yc8WUuwICmYOxXTu/ANhJo3XsTWMLN9RMlpDQ7PV4nT4hJP2MPtdkEiUpNZo aon/w/Fe+PB1DW6MSfyYYrrJTh9SmpylB+kiEVnZtf5RQB7URpTo0Oyb1CF4xz97 YbUqgSwJtTAeYku6H/2tmXvD87I1w7i7Y6E16Gjo5WXqs7bULYEAR9/l0dt3FMSW MoKAlhnwB7eU/p2kd5NZEkPPx9W/Z0B/nFFctVEKkQpo2CrJoOJX08RsPpFrwGSE Sr8wnyvRQr7YzWwkG/q11Y+uS9SIszuEYZYqEGw1AVBgi78dMVPSFiXktRnV3ERI FQWb7xzQe2pTtTc0W4yrudMxk8bCJvGIa9SYTW4Z5CxO0EJkBOOPTwoIGoNEeLLC NYGDGeaDYy5aCdqRwBz+oguBhRgqIiQagSjPljnJ4vJPQhJvdFik2nuK5JYbKnPl 7G0GxqlDhMQs9tXTQ523Rw== =AkRd -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210709' into staging target-arm queue: * New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message # gpg: Signature made Fri 09 Jul 2021 17:09:10 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210709: hw/intc: Improve formatting of MEMTX_ERROR guest error message target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint hw/arm/stellaris: Expand comment about handling of OLED chipselect hw/gpio/pl061: Document a shortcoming in our implementation hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset hw/arm/virt: Make PL061 GPIO lines pulled low, not high hw/gpio/pl061: Make pullup/pulldown of outputs configurable hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers hw/gpio/pl061: Document the interface of this device hw/gpio/pl061: Add tracepoints for register read and write hw/gpio/pl061: Clean up read/write offset handling logic hw/gpio/pl061: Convert DPRINTF to tracepoints hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write tests/boot-serial-test: Add STM32VLDISCOVERY board testcase docs/system: arm: Add stm32 boards description stm32vldiscovery: Add the STM32VLDISCOVERY Machine stm32f100: Add the stm32f100 SoC Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexandre Iooss
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7cb4097f2d |
tests/boot-serial-test: Add STM32VLDISCOVERY board testcase
New mini-kernel test for STM32VLDISCOVERY USART1. Signed-off-by: Alexandre Iooss <erdnaxe@crans.org> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210617165647.2575955-5-erdnaxe@crans.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexey Kardashevskiy
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fc8c745d50 |
spapr: Implement Open Firmware client interface
The PAPR platform describes an OS environment that's presented by a combination of a hypervisor and firmware. The features it specifies require collaboration between the firmware and the hypervisor. Since the beginning, the runtime component of the firmware (RTAS) has been implemented as a 20 byte shim which simply forwards it to a hypercall implemented in qemu. The boot time firmware component is SLOF - but a build that's specific to qemu, and has always needed to be updated in sync with it. Even though we've managed to limit the amount of runtime communication we need between qemu and SLOF, there's some, and it has become increasingly awkward to handle as we've implemented new features. This implements a boot time OF client interface (CI) which is enabled by a new "x-vof" pseries machine option (stands for "Virtual Open Firmware). When enabled, QEMU implements the custom H_OF_CLIENT hcall which implements Open Firmware Client Interface (OF CI). This allows using a smaller stateless firmware which does not have to manage the device tree. The new "vof.bin" firmware image is included with source code under pc-bios/. It also includes RTAS blob. This implements a handful of CI methods just to get -kernel/-initrd working. In particular, this implements the device tree fetching and simple memory allocator - "claim" (an OF CI memory allocator) and updates "/memory@0/available" to report the client about available memory. This implements changing some device tree properties which we know how to deal with, the rest is ignored. To allow changes, this skips fdt_pack() when x-vof=on as not packing the blob leaves some room for appending. In absence of SLOF, this assigns phandles to device tree nodes to make device tree traversing work. When x-vof=on, this adds "/chosen" every time QEMU (re)builds a tree. This adds basic instances support which are managed by a hash map ihandle -> [phandle]. Before the guest started, the used memory is: 0..e60 - the initial firmware 8000..10000 - stack 400000.. - kernel 3ea0000.. - initramdisk This OF CI does not implement "interpret". Unlike SLOF, this does not format uninitialized nvram. Instead, this includes a disk image with pre-formatted nvram. With this basic support, this can only boot into kernel directly. However this is just enough for the petitboot kernel and initradmdisk to boot from any possible source. Note this requires reasonably recent guest kernel with: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=df5be5be8735 The immediate benefit is much faster booting time which especially crucial with fully emulated early CPU bring up environments. Also this may come handy when/if GRUB-in-the-userspace sees light of the day. This separates VOF and sPAPR in a hope that VOF bits may be reused by other POWERPC boards which do not support pSeries. This assumes potential support for booting from QEMU backends such as blockdev or netdev without devices/drivers used. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20210625055155.2252896-1-aik@ozlabs.ru> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> [dwg: Adjusted some includes which broke compile in some more obscure compilation setups] Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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Titus Rwantare
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7649086f45 |
tests/qtest: add tests for MAX34451 device model
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210708172556.1868139-6-titusr@google.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> |
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Titus Rwantare
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c0167539ba |
tests/qtest: add tests for ADM1272 device model
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210708172556.1868139-4-titusr@google.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> |
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Peter Maydell
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9aef095419 |
* More Meson test conversions and configure cleanups
* Generalize XSAVE area offset so that it matches AMD processors on KVM
* Improvements for -display and deprecation of -no-quit
* Enable SMP configuration as a compound machine property ("-M smp.cpus=...")
* Haiku compilation fix
* Add icon on Darwin
-----BEGIN PGP SIGNATURE-----
iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmDkB7sUHHBib256aW5p
QHJlZGhhdC5jb20ACgkQv/vSX3jHroOISgf+Nn5BiXQRY52DK/2PoG330F6UeOcp
kWFAE4k4qEktDiCcd5xKekiUd7h+TiRS8bLeycmRtiSXvbzXioE2eCelui0SZDQl
zpIb8wV2WaxrD/zUYPV7r5n+VFAaTCm9lUEzzqnwaThBG/Oat45gnossZEIWv85g
KtQMsSh3pc+KpTjWbIA8V01ohzwFE2q7cA9CB/pDgR3h8M5p4K0ZdaPoAO2auhvu
2sbu9oBl1JwqpIhPme9JR6Je5fMCILBRlXTvPgJ/0iaGdxcNmZxoflO/TZVFB1pl
tUiCu0GB0yEasMO1E6+cP7ezhm15Lz3vKqjr/boV5Y9osfU36k9xkLTvAg==
=itIm
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* More Meson test conversions and configure cleanups
* Generalize XSAVE area offset so that it matches AMD processors on KVM
* Improvements for -display and deprecation of -no-quit
* Enable SMP configuration as a compound machine property ("-M smp.cpus=...")
* Haiku compilation fix
* Add icon on Darwin
# gpg: Signature made Tue 06 Jul 2021 08:35:23 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (40 commits)
config-host.mak: remove unused compiler-related lines
Set icon for QEMU binary on Mac OS
qemu-option: remove now-dead code
machine: add smp compound property
vl: switch -M parsing to keyval
keyval: introduce keyval_parse_into
keyval: introduce keyval_merge
qom: export more functions for use with non-UserCreatable objects
configure: convert compiler tests to meson, part 6
configure: convert compiler tests to meson, part 5
configure: convert compiler tests to meson, part 4
configure: convert compiler tests to meson, part 3
configure: convert compiler tests to meson, part 2
configure: convert compiler tests to meson, part 1
configure: convert HAVE_BROKEN_SIZE_MAX to meson
configure, meson: move CONFIG_IVSHMEM to meson
meson: store dependency('threads') in a variable
meson: sort existing compiler tests
configure, meson: convert libxml2 detection to meson
configure, meson: convert liburing detection to meson
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Paolo Bonzini
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fe68090e8f |
machine: add smp compound property
Make -smp syntactic sugar for a compound property "-machine
smp.{cores,threads,cpu,...}". machine_smp_parse is replaced by the
setter for the property.
numa-test will now cover the new syntax, while other tests
still use -smp.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Peter Maydell
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9bef7ea9d9 |
9pfs: misc patches
* Add link to 9p developer docs. * Fix runtime check whether client supplied relative path is the export root. * Performance optimization of Twalk requests. * Code cleanup. -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEltjREM96+AhPiFkBNMK1h2Wkc5UFAmDi6V4XHHFlbXVfb3Nz QGNydWRlYnl0ZS5jb20ACgkQNMK1h2Wkc5WsiA//dwLfbNFE9dxAZF3JzwYPmgID ino0zruJxC2UdHaVYr2r0A6H+uL/K1zFTWj53R1EKo6udhsx5avqJvmuLU5np9MA CEflB99YvwEQWLNyM7IRT+IXa+ebe+UvqC7ouRmJeTRuBaSEu7TMj5S2zMj+AD4b uNGVylm6T8yAt+r8QQar+TvK9KYuPuHt/yJgzXqg8tDfly1GGzLh2uoS/0EZoJQU 4emyYadMsBMVOh+E29sqFMBpUnHwlLl+t9JpUl3xVXM1ZShcqHBl2QbQGJIDsfh7 HxXBMKHLiSzJrFJCc2DklsOlaRlP5nZdCVEcO4B0/Sq1kZpmf6r+4V6uYrdu8cCE tP33QNhC1yWQk9FgvItGkqRfAOI/KK02TE8WWJuLxbyo2n62lE0rEU1gBJOGPkxQ rJTGUiFgweV5Ky+NMRbrB4P8EurPLvcgFEhz7qfOEBanmZKHylzI3vwQg5e9Um/t ZABjIfjm95/QB6ufeCvVuktGnmyfBC/WJSZwiDyRG+tBf1V1TJF1P9EwoBOyYexv WGHoYfAExytKbyzgsKPZ32zTGzzKLtTBko+ATIEFPCpsf5TWiSzralzz3c2/DF3j 5PHuPOdL+7nhUN3CSRi2MJzhg+LKW34ca1G8XRpob0u9RkKSjH6VbqKhysB8eQNm kE1lfhSe00ZtuZoTPto= =WqCY -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20210705' into staging 9pfs: misc patches * Add link to 9p developer docs. * Fix runtime check whether client supplied relative path is the export root. * Performance optimization of Twalk requests. * Code cleanup. # gpg: Signature made Mon 05 Jul 2021 12:13:34 BST # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * remotes/cschoenebeck/tags/pull-9p-20210705: 9pfs: reduce latency of Twalk 9pfs: drop root_qid 9pfs: replace not_same_qid() by same_stat_id() 9pfs: drop fid_to_qid() 9pfs: capture root stat 9pfs: fix not_same_qid() 9pfs: simplify v9fs_walk() 9pfs: add link to 9p developer docs Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Christian Schoenebeck
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6f56908427 |
9pfs: add link to 9p developer docs
To lower the entry level for new developers, add a link to the 9p developer docs (i.e. qemu wiki) to MAINTAINERS and to the beginning of 9p source files, that is to: https://wiki.qemu.org/Documentation/9p Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Acked-by: Greg Kurz <groug@kaod.org> Message-Id: <E1leeDf-0008GZ-9q@lizzy.crudebyte.com> |
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Peter Xu
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1f546b709d |
tests: migration-test: Add dirty ring test
Add dirty ring test if kernel supports it. Add the dirty ring parameter on source should be mostly enough, but let's change the dest too to make them match always. Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20210615175523.439830-3-peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> |
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Peter Maydell
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5d2d18ae39 |
audio: bugfixes
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmDUd5AACgkQTLbY7tPo cTjq/Q/+PL8+B9milDJCdBU+tTTOZDB+8V/aWLE5U8VbHF0kkj+eqtWWDgdqmDMf TQDolpZhYtp0UKmzQo6RQivbZX1TZMTVj67mgLw9lQEu0VVjrgUHZOqY4jMNSKCP RikxeVkv90elwJbUdjAtw1gSIepph2sySaNemjZzXT+mDQm1bV3hTwh/s1T8N6TU nVioJGUzHksBQr1hq6OxcMQmMN56ampCrEmmsiPcR3n5dS6IhGD1WfkGWTDSur9H d2UncTzLXb58l3ZaLYujv6n4ArIERcNUDWvi7j93Tcem62YQc+EcxC75nl+5mFSQ 8rnv/8Jli3n3o11ShAAtS1uPSPlGl9euE7FXkDkb28OS3dItxl5R4YbYRy45ZitJ OcS6zatrEUcMBHqO1xXhPSKEAoJ2oBJ82GPRHeQnyRRWId9lJJvfiIe9E0GDbE8P hGmLk7v1txz5ZMG7bFWyC+Ol0HMgvwH+TSSt5XbtFYwmwrVucUarHqh1F8Yi7lqm wLOP8sFtFZalfimhbv8GkZafiFw0qJ3UDot6ISBSLKZLhQXTnGi0Kl+lLJh8wijT z8Ut+LJQKH3//g1hfR73EHUiP60WRX2zL9Xw6JcX8GE2CNaQNRHlQxduO7vLum8v SWn+KqOjk5bFPPhB6OrLW5+KgvmbD2ITiM8Lt+KuHmSiyZHWSIs= =XgQF -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/audio-20210624-pull-request' into staging audio: bugfixes # gpg: Signature made Thu 24 Jun 2021 13:16:16 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20210624-pull-request: hw/audio/sb16: Restrict I/O sampling rate range for command 41h/42h coreaudio: Lock only the buffer Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Qiang Liu
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60e543f5ce |
hw/audio/sb16: Restrict I/O sampling rate range for command 41h/42h
The I/O sampling rate range is enforced to 5000 to 45000HZ according to commit |
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Philippe Mathieu-Daudé
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a8fbec7ed8 |
fuzz: Display hexadecimal value with '0x' prefix
Use memory_region_size() to get the MemoryRegion size, and display it with the '0x' prefix. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210612195842.1595999-1-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Ahmed Abouzied
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e52ee00dab |
Remove leading underscores from QEMU defines
Leading underscores followed by a capital letter or underscore are reserved by the C standard. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/369 Signed-off-by: Ahmed Abouzied <email@aabouzied.com> Message-Id: <20210605174938.13782-1-email@aabouzied.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Corey Minyard
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5e9ae4b1a3 |
sensor: Move hardware sensors from misc to a sensor directory
Lots of this are expected to be coming in, create a directory for them. Also move the tmp105.h file into the include directory where it should be. Cc: Cédric Le Goater <clg@kaod.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Joel Stanley <joel@jms.id.au> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: qemu-arm@nongnu.org Signed-off-by: Corey Minyard <cminyard@mvista.com> Acked-by: Cédric Le Goater <clg@kaod.org> |
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Philippe Mathieu-Daudé
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a2cd86a94a |
hw/audio/sb16: Avoid assertion by restricting I/O sampling rate range
While the SB16 seems to work up to 48000 Hz, the "Sound Blaster Series
Hardware Programming Guide" limit the sampling range from 4000 Hz to
44100 Hz (Section 3-9, 3-10: Digitized Sound I/O Programming, tables
3-2 and 3-3).
Later, section 6-15 (DSP Commands) is more specific regarding the 41h /
42h registers (Set digitized sound output sampling rate):
Valid sampling rates range from 5000 to 45000 Hz inclusive.
There is no comment regarding error handling if the register is filled
with an out-of-range value. (See also section 3-28 "8-bit or 16-bit
Auto-initialize Transfer"). Assume limits are enforced in hardware.
This fixes triggering an assertion in audio_calloc():
#1 abort
#2 audio_bug audio/audio.c:119:9
#3 audio_calloc audio/audio.c:154:9
#4 audio_pcm_sw_alloc_resources_out audio/audio_template.h:116:15
#5 audio_pcm_sw_init_out audio/audio_template.h:175:11
#6 audio_pcm_create_voice_pair_out audio/audio_template.h:410:9
#7 AUD_open_out audio/audio_template.h:503:14
#8 continue_dma8 hw/audio/sb16.c:216:20
#9 dma_cmd8 hw/audio/sb16.c:276:5
#10 command hw/audio/sb16.c:0
#11 dsp_write hw/audio/sb16.c:949:13
#12 portio_write softmmu/ioport.c:205:13
#13 memory_region_write_accessor softmmu/memory.c:491:5
#14 access_with_adjusted_size softmmu/memory.c:552:18
#15 memory_region_dispatch_write softmmu/memory.c:0:13
#16 flatview_write_continue softmmu/physmem.c:2759:23
#17 flatview_write softmmu/physmem.c:2799:14
#18 address_space_write softmmu/physmem.c:2891:18
#19 cpu_outw softmmu/ioport.c:70:5
[*] http://www.baudline.com/solutions/full_duplex/sb16_pci/index.html
OSS-Fuzz Report: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=29174
Fixes:
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Kit Westneat
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6b731a96aa |
tests/qtest/virtio-scsi-test: add unmap large LBA with 4k blocks test
Add test for issue #345 Signed-off-by: Kit Westneat <kit.westneat@gmail.com> Message-Id: <20210603142022.676395-1-kit.westneat@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Peter Maydell
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d2304612b5 |
tests/qtest/tpm-tests: Remove unnecessary NULL checks
Coverity points out that in tpm_test_swtpm_migration_test() we assume that src_tpm_addr and dst_tpm_addr are non-NULL (we pass them to tpm_util_migration_start_qemu() which will unconditionally dereference them) but then later explicitly check them for NULL. Remove the pointless checks. Fixes: Coverity CID 1432367, 1432359 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-6-peter.maydell@linaro.org |
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Peter Maydell
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909e4a0826 |
tests/qtest/pflash-cfi02-test: Avoid potential integer overflow
Coverity points out that we calculate a 64-bit value using 32-bit arithmetic; add the cast to force the multiply to be done as 64-bits. (The overflow will never happen with the current test data.) Fixes: Coverity CID 1432320 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-5-peter.maydell@linaro.org |
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Peter Maydell
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2c398ee5e3 |
tests/qtest/hd-geo-test: Fix checks on mkstemp() return value
Coverity notices that the checks against mkstemp() failing in create_qcow2_with_mbr() are wrong: mkstemp returns -1 on failure but the check is just "g_assert(fd)". Fix to use "g_assert(fd >= 0)", matching the correct check in create_test_img(). Fixes: Coverity CID 1432274 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-4-peter.maydell@linaro.org |
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Peter Maydell
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380822edb3 |
tests/qtest/e1000e-test: Check qemu_recv() succeeded
The e1000e_send_verify() test calls qemu_recv() but doesn't check that the call succeeded, which annoys Coverity. Add an explicit test check for the length of the data. (This is a test check, not a "we assume this syscall always succeeds", so we use g_assert_cmpint() rather than g_assert().) Fixes: Coverity CID 1432324 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-3-peter.maydell@linaro.org |
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Peter Maydell
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3c65e439b2 |
tests/qtest/bios-tables-test: Check for dup2() failure
Coverity notes that we don't check for dup2() failing. Add some assertions so that if it does ever happen we get some indication. (This is similar to how we handle other "don't expect this syscall to fail" checks in this test code.) Fixes: Coverity CID 1432346 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20210525134458.6675-2-peter.maydell@linaro.org |
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Philippe Mathieu-Daudé
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aaad026480 |
tests/qtest/fuzz: Fix build failure
On Fedora 32, using clang (version 10.0.1-3.fc32) we get:
tests/qtest/fuzz/fuzz.c:237:5: error: implicit declaration of function 'qemu_init' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
qemu_init(result.we_wordc, result.we_wordv, NULL);
^
qemu_init() is declared in "sysemu/sysemu.h", include this
header to fix.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210513162008.3922223-1-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Stefan Hajnoczi
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7999e3136d |
vhost-user-blk-test: test discard/write zeroes invalid inputs
Exercise input validation code paths in block/export/vhost-user-blk-server.c. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210309094106.196911-5-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210322092327.150720-4-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Stefan Hajnoczi
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9c4e99e879 |
tests/qtest: add multi-queue test case to vhost-user-blk-test
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210309094106.196911-4-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210322092327.150720-3-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Coiby Xu
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806952026d |
test: new qTest case to test the vhost-user-blk-server
This test case has the same tests as tests/virtio-blk-test.c except for tests have block_resize. Since the vhost-user-blk export only serves one client one time, two exports are started by qemu-storage-daemon for the hotplug test. Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Coiby Xu <coiby.xu@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210309094106.196911-3-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210322092327.150720-2-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Peter Maydell
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2ed765fdee |
tests/qtest/migration-test: Use g_autofree to avoid leaks on error paths
Coverity notices that several places in the migration-test code fail to free memory in error-exit paths. This is pretty unimportant in test case code, but we can avoid having to manually free the memory entirely by using g_autofree. The places where Coverity spotted a leak were relating to early exits not freeing 'uri' in test_precopy_unix(), do_test_validate_uuid(), migrate_postcopy_prepare() and test_migrate_auto_converge(). This patch converts all the string-allocation in the test code to g_autofree for consistency. Fixes: Coverity CID 1432313, 1432315, 1432352, 1432364 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210506185819.9010-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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bfaa3b05a9 |
tests: Avoid side effects inside g_assert() arguments
For us, assertions are always enabled, but side-effect expressions inside the argument to g_assert() are bad style anyway. Fix three occurrences in IPMI related tests, which will silence some Coverity nits. Fixes: CID 1432322, CID 1432287, CID 1432291 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-4-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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6c054176db |
tests/qtest/rtc-test: Remove pointless NULL check
In rtc-test.c we know that s is non-NULL because qtest_start() will return a non-NULL value, and we assume this when we pass s to qtest_irq_intercept_in(). So we can drop the initial assignment of NULL and the "if (s)" condition at the end of the function. Fixes: Coverity CID 1432353 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-3-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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e7b13acdf2 |
tests/qtest/tpm-util.c: Free memory with correct free function
tpm_util_migration_start_qemu() allocates memory with g_strdup_printf() but frees it with free() rather than g_free(), which provokes Coverity complaints (CID 1432379, 1432350). Use the correct free function. Fixes: Coverity CID 1432379, CID 1432350 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210503165525.26221-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Dr. David Alan Gilbert
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3a46f81676 |
tests/migration-test: Fix "true" vs true
Accidental use of "true" as a boolean; spotted by coverity and Peter. Fixes: |
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Peter Maydell
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302585450c |
tests/qtest/npcm7xx_pwm-test.c: Avoid g_assert_true() for non-test assertions
In the glib API, the distinction between g_assert() and g_assert_true() is that the former is for "bug, terminate the application" and the latter is for "test check, on failure either terminate or just mark the testcase as failed". For QEMU, g_assert() is always fatal, so code can assume that if the assertion fails execution does not proceed, but this is not true of g_assert_true(). In npcm7xx_pwm-test, the pwm_index() and pwm_module_index() functions include some assertions that are just guarding against possible bugs in the test code that might lead us to out-of-bounds array accesses. These should use g_assert() because they aren't part of what the test is testing and the code does not correctly handle the case where the condition was false. This fixes some Coverity issues where Coverity knows that g_assert_true() can continue when the condition is false and complains about the possible array overrun at various callsites. Fixes: Coverity CID 1442340, 1442341, 1442343, 1442344, 1442345, 1442346 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-Id: <20210505135516.21097-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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423dbce5a2 |
tests/qtest/ahci-test.c: Calculate iso_size with 64-bit arithmetic
Coverity notes that when calculating the 64-bit iso_size value in ahci_test_cdrom() we actually only do it with 32-bit arithmetic. This doesn't matter for the current test code because nsectors is always small; but adding the cast avoids the coverity complaints. Fixes: Coverity CID 1432343 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-Id: <20210506194358.3925-1-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Stefan Hajnoczi
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20868330a9 |
libqtest: refuse QTEST_QEMU_BINARY=qemu-kvm
Some downstreams rename the QEMU binary to "qemu-kvm". This breaks qtest_get_arch(), which attempts to parse the target architecture from the QTEST_QEMU_BINARY environment variable. Print an error instead of returning the architecture "kvm". Things fail in weird ways when the architecture string is bogus. Arguably qtests should always be run in a build directory instead of against an installed QEMU. In any case, printing a clear error when this happens is helpful. Since this is an error that is triggered by the user and not a test failure, use exit(1) instead of abort(). Change the existing abort() call in qtest_get_arch() to exit(1) too for the same reason and to be consistent. Reported-by: Qin Wang <qinwang@rehdat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Cc: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210412143050.725918-1-stefanha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Stefan Hajnoczi
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f62215298a |
libqos/qgraph: fix "UNAVAILBLE" typo
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20210412143437.727560-2-stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Markus Armbruster
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4369223902 |
Drop the deprecated unicore32 target
Target unicore32 was deprecated in commit
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Markus Armbruster
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9d49bcf699 |
Drop the deprecated lm32 target
Target lm32 was deprecated in commit
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Thomas Huth
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875bb7e35b |
Remove the deprecated moxie target
There are no known users of this CPU anymore, and there are no binaries available online which could be used for regression tests, so the code has likely completely bit-rotten already. It's been marked as deprecated since two releases now and nobody spoke up that there is still a need to keep it, thus let's remove it now. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210430160355.698194-1-thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Commit message typos fixed, trivial conflicts resolved] Signed-off-by: Markus Armbruster <armbru@redhat.com> |
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Peter Maydell
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d45a5270d0 |
Trivial patches pull request 20210503
-----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmCPtbASHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748I3wP/Al7yi77BMpts1t3lGMm7EBjKgkppnpr wZYEM68bJonvvGiEKQjexn1CUfnDcq7f5SZkzcUNLI4oP57pyywb4/gshN0k/Zz8 uCDveMfnhbio2sqlXiMsH9TOhcv/4wtXAek/ghP7EOjkBvyXrAFIQ7eEPEB9cp+X xxs9DxqfWmrGB6vt7Er78zjfUETSMa+UrheVLwbRMhJcc0Bg8hT2DCn9Lw6IjfOy usWdrLTGc6qg1zdZzi8QR7jZ+bNx0h+aJLlm8M4cVitXq9v2wb3+6KdsOAeYioAE AsnClw0m8j/xtMh3g4/hB4oCxMj0jRdZ9GIGs8Didw5ZwkXTRvFM1GK1PHxqX4pF 8xMW6Qq0bSUr4II6bPOukBUMUAnPYdkh+iHXsYSZG0I3u6VZLgMK3AXmKRukAYqe kQ1lcRe3Lwsp2h+jMBBsbCWhwYdA3THFO4YO31cUaZ191A7z57905QMbqJG/H3HB 7IUBYBNbrhgysPsNBvY6Lr7yUJIocMgcfP36UHYcBPsDdZgjNCQZneJlkaRlQb8+ CtUSF8D614EguzGsWaIn3uBSm9THKKLd1rSXCyTSgrXDI285mXlKmEWZvm236ew0 OEmIz/Ach/R4268j76enYGa1aubsxnrphUfC3aePu0Wzd3QW4RxnCSq7wc4ARPw7 WTL7J00P578h =aCeG -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging Trivial patches pull request 20210503 # gpg: Signature made Mon 03 May 2021 09:34:56 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits) hw/rx/rx-gdbsim: Do not accept invalid memory size docs: More precisely describe memory-backend-*::id's user scripts: fix generation update-binfmts templates docs/system: Document the removal of "compat" property for POWER CPUs mc146818rtc: put it into the 'misc' category Do not include exec/address-spaces.h if it's not really necessary Do not include cpu.h if it's not really necessary Do not include hw/boards.h if it's not really necessary Do not include sysemu/sysemu.h if it's not really necessary hw: Do not include qemu/log.h if it is not necessary hw: Do not include hw/irq.h if it is not necessary hw: Do not include hw/sysbus.h if it is not necessary hw: Remove superfluous includes of hw/hw.h ui: Fix memory leak in qemu_xkeymap_mapping_table() hw/usb: Constify VMStateDescription hw/display/qxl: Constify VMStateDescription hw/arm: Constify VMStateDescription vmstate: Constify some VMStateDescriptions Fix typo in CFI build documentation hw/pcmcia: Do not register PCMCIA type if not required ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Thomas Huth
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ee86213aa3 |
Do not include exec/address-spaces.h if it's not really necessary
Stop including exec/address-spaces.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-5-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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Thomas Huth
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4c386f8064 |
Do not include sysemu/sysemu.h if it's not really necessary
Stop including sysemu/sysemu.h in files that don't need it. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210416171314.2074665-2-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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Cédric Le Goater
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5fde7f10c0 |
tests/qtest: Rename m25p80 test in aspeed_smc test
The m25p80 test depends on the Aspeed SMC controller to test our SPI-NOR flash support. Reflect this dependency by changing the name. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210407171637.777743-17-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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Joel Stanley
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666099520a |
tests/qtest: Add test for Aspeed HACE
This adds a test for the Aspeed Hash and Crypto (HACE) engine. It tests the currently implemented behavior of the hash functionality. The tests are similar, but are cut/pasted instead of broken out into a common function so the assert machinery produces useful output when a test fails. Co-developed-by: Cédric Le Goater <clg@kaod.org> Co-developed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-Id: <20210409000253.1475587-4-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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Mark Cave-Ayland
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ce94fa7aa6 |
tests/qtest: add tests for am53c974 device
Use the autogenerated fuzzer test cases as the basis for a set of am53c974 regression tests. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20210407195801.685-13-mark.cave-ayland@ilande.co.uk> |
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Jason Wang
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22317309df |
Revert "tests: Add tests for query-netdev command"
Several issues has been reported for query-netdev series. Consider
it's late in the rc, this reverts commit
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Paolo Bonzini
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90a66f4847 |
x86: rename oem-id and oem-table-id properties
After introducing non-scalar machine properties, it would be preferrable to have a single acpitable property which includes both generic information (such as the OEM ids) and custom tables currently passed via -acpitable. Do not saddle ourselves with legacy oem-id and oem-table-id properties, instead mark them as experimental. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210402082128.13854-1-pbonzini@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Doug Evans
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a62ee00aa0 |
net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set
Turning REG_MCMDR_RXON is enough to start receiving packets. Signed-off-by: Doug Evans <dje@google.com> Message-id: 20210319195044.741821-1-dje@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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b3566001d4 |
memory: Add offset_in_region to flatview_cb arguments
The function flatview_for_each_range() calls a callback for each range in a FlatView. Currently the callback gets the start and length of the range and the MemoryRegion involved, but not the offset within the MemoryRegion. Add this to the callback's arguments; we're going to want it for a new use in the next commit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210318174823.18066-4-peter.maydell@linaro.org |
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Peter Maydell
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d1e8cf77f1 |
memory: Make flatview_cb return bool, not int
The return value of the flatview_cb callback passed to the flatview_for_each_range() function is zero if the iteration through the ranges should continue, or non-zero to break out of it. Use a bool for this rather than int. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210318174823.18066-2-peter.maydell@linaro.org |
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Philippe Mathieu-Daudé
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7d6a4f123e |
net/eth: Read ip6_ext_hdr_routing buffer before accessing it
We can't know the caller read enough data in the memory pointed
by ext_hdr to cast it as a ip6_ext_hdr_routing.
Declare rt_hdr on the stack and fill it again from the iovec.
Since we already checked there is enough data in the iovec buffer,
simply add an assert() call to consume the bytes_read variable.
This fix a 2 bytes buffer overrun in eth_parse_ipv6_hdr() reported
by QEMU fuzzer:
$ cat << EOF | ./qemu-system-i386 -M pc-q35-5.0 \
-accel qtest -monitor none \
-serial none -nographic -qtest stdio
outl 0xcf8 0x80001010
outl 0xcfc 0xe1020000
outl 0xcf8 0x80001004
outw 0xcfc 0x7
write 0x25 0x1 0x86
write 0x26 0x1 0xdd
write 0x4f 0x1 0x2b
write 0xe1020030 0x4 0x190002e1
write 0xe102003a 0x2 0x0807
write 0xe1020048 0x4 0x12077cdd
write 0xe1020400 0x4 0xba077cdd
write 0xe1020420 0x4 0x190002e1
write 0xe1020428 0x4 0x3509d807
write 0xe1020438 0x1 0xe2
EOF
=================================================================
==2859770==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7ffdef904902 at pc 0x561ceefa78de bp 0x7ffdef904820 sp 0x7ffdef904818
READ of size 1 at 0x7ffdef904902 thread T0
#0 0x561ceefa78dd in _eth_get_rss_ex_dst_addr net/eth.c:410:17
#1 0x561ceefa41fb in eth_parse_ipv6_hdr net/eth.c:532:17
#2 0x561cef7de639 in net_tx_pkt_parse_headers hw/net/net_tx_pkt.c:228:14
#3 0x561cef7dbef4 in net_tx_pkt_parse hw/net/net_tx_pkt.c:273:9
#4 0x561ceec29f22 in e1000e_process_tx_desc hw/net/e1000e_core.c:730:29
#5 0x561ceec28eac in e1000e_start_xmit hw/net/e1000e_core.c:927:9
#6 0x561ceec1baab in e1000e_set_tdt hw/net/e1000e_core.c:2444:9
#7 0x561ceebf300e in e1000e_core_write hw/net/e1000e_core.c:3256:9
#8 0x561cef3cd4cd in e1000e_mmio_write hw/net/e1000e.c:110:5
Address 0x7ffdef904902 is located in stack of thread T0 at offset 34 in frame
#0 0x561ceefa320f in eth_parse_ipv6_hdr net/eth.c:486
This frame has 1 object(s):
[32, 34) 'ext_hdr' (line 487) <== Memory access at offset 34 overflows this variable
HINT: this may be a false positive if your program uses some custom stack unwind mechanism, swapcontext or vfork
(longjmp and C++ exceptions *are* supported)
SUMMARY: AddressSanitizer: stack-buffer-overflow net/eth.c:410:17 in _eth_get_rss_ex_dst_addr
Shadow bytes around the buggy address:
0x10003df188d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df188e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df188f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18910: 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1
=>0x10003df18920:[02]f3 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18930: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18940: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18950: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18960: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x10003df18970: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Shadow byte legend (one shadow byte represents 8 application bytes):
Addressable: 00
Partially addressable: 01 02 03 04 05 06 07
Stack left redzone: f1
Stack right redzone: f3
==2859770==ABORTING
Add the corresponding qtest case with the fuzzer reproducer.
FWIW GCC 11 similarly reported:
net/eth.c: In function 'eth_parse_ipv6_hdr':
net/eth.c:410:15: error: array subscript 'struct ip6_ext_hdr_routing[0]' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=array-bounds]
410 | if ((rthdr->rtype == 2) && (rthdr->segleft == 1)) {
| ~~~~~^~~~~~~
net/eth.c:485:24: note: while referencing 'ext_hdr'
485 | struct ip6_ext_hdr ext_hdr;
| ^~~~~~~
net/eth.c:410:38: error: array subscript 'struct ip6_ext_hdr_routing[0]' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=array-bounds]
410 | if ((rthdr->rtype == 2) && (rthdr->segleft == 1)) {
| ~~~~~^~~~~~~~~
net/eth.c:485:24: note: while referencing 'ext_hdr'
485 | struct ip6_ext_hdr ext_hdr;
| ^~~~~~~
Cc: qemu-stable@nongnu.org
Buglink: https://bugs.launchpad.net/qemu/+bug/1879531
Reported-by: Alexander Bulekov <alxndr@bu.edu>
Reported-by: Miroslav Rezanina <mrezanin@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Miroslav Rezanina <mrezanin@redhat.com>
Fixes:
|
|
|
Peter Maydell
|
bdee969c0e |
* fixes for i386 TCG paging
* fixes for Hyper-V enlightenments * avoid uninitialized variable warning -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmBUt1QUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNa+QgAjcOo9t4cP9CMAM+BwI3qe+iVo1Ug OzfLEtACd7BWeB7gZLzbX0ga926/ZQ5WJpgvKQmIdOOCM1PY07WbFogOkpk1B3IZ XyCSBneyqrlojSBsSzW3L//GNCyCD0aY8dIWPipsNenz5S/ObS7VMDzEoWOOElva wDctnxNRcGmRjs1HnXADyG3yBm8+vEhMImMXxTZdWAlxyL+wI/Aq+VdfkeAD47kZ uO0Z291KgYy3iyeZGxqJJJtVZGK8RPp8toM/ociMrk65gG+igctJdR/FRZY6SP7x 2TkPoohJLwEehTBM7qP+36VVRvskwKwG/jwVxwORXFv4KNxBRaOCtaAMVQ== =OBel -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fixes for i386 TCG paging * fixes for Hyper-V enlightenments * avoid uninitialized variable warning # gpg: Signature made Fri 19 Mar 2021 14:38:12 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: tests/qtest: cleanup the testcase for bug 1878642 hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable i386: Make migration fail when Hyper-V reenlightenment was enabled but 'user_tsc_khz' is unset i386: Fix 'hypercall_hypercall' typo target/i386: svm: do not discard high 32 bits of EXITINFO1 target/i386: fail if toggling LA57 in 64-bit mode target/i386: allow modifying TCG phys-addr-bits qom: use qemu_printf to print help for user-creatable objects Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Paolo Bonzini
|
af05ffffd7 |
tests/qtest: cleanup the testcase for bug 1878642
Clean up the writes to the configuration space and the PM region, and rename the test to lpc-ich9-test. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Markus Armbruster
|
9585376ab5 |
fuzz: Avoid deprecated misuse of -drive if=sd
qemu-fuzz-i386-target-generic-fuzz-sdhci-v3 uses -drive=sd where it
should use -drive if=none instead. This prints a deprecation warning:
$ ./build-oss-fuzz/DEST_DIR/qemu-fuzz-i386-target-generic-fuzz-sdhci-v3 -runs=1 -seed=1
[ASan warnings snipped...]
--> i386: -drive if=sd,index=0,file=null-co://,format=raw,id=mydrive: warning: bogus if=sd is deprecated, use if=none
INFO: Seed: 1
[More normal output snipped...]
Support for this usage will be gone soon. Adjust the test.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210319132008.1830950-1-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
|
|
|
Kevin Wolf
|
9695c3af3a |
tests: Drop 'props' from object-add calls
The 'props' option has been deprecated in 5.0 in favour of a flattened object-add command. Time to change our test cases to drop the deprecated option. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Peter Krempa <pkrempa@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> |
|
|
Peter Maydell
|
1b507e55f8 |
Remove many old deprecated features
The following features have been deprecated for well over the 2
release cycle we promise
``-drive file=json:{...{'driver':'file'}}`` (since 3.0)
``-vnc acl`` (since 4.0.0)
``-mon ...,control=readline,pretty=on|off`` (since 4.1)
``migrate_set_downtime`` and ``migrate_set_speed`` (since 2.8.0)
``query-named-block-nodes`` result ``encryption_key_missing`` (since 2.10.0)
``query-block`` result ``inserted.encryption_key_missing`` (since 2.10.0)
``migrate-set-cache-size`` and ``query-migrate-cache-size`` (since 2.11.0)
``query-named-block-nodes`` and ``query-block`` result dirty-bitmaps[i].status (since 4.0)
``query-cpus`` (since 2.12.0)
``query-cpus-fast`` ``arch`` output member (since 3.0.0)
``query-events`` (since 4.0)
chardev client socket with ``wait`` option (since 4.0)
``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`` (since 4.0.0)
``ide-drive`` (since 4.2)
``scsi-disk`` (since 4.2)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE2vOm/bJrYpEtDo4/vobrtBUQT98FAmBTHBsACgkQvobrtBUQ
T9/6cA//QVlWFvNJjmYuXMFOkYdokqde9W66iMO2vt+p3LSqlcxVa59+ZOcb5XWc
7xYcZlDHEHRMe8DWrTwUyjftJ7Ild+/HY5Nz8NqDFvX08umIhC6qmzBSG64O3fU5
KtSLWe+KfbUH2usmczQO1zGG8mSIAMnOdugpLln9W13v7X9NO4yC+/O36Mm8l4VK
VEF+o9w7+s2l7QloLdhVe7RVOrqz6+9TFHx1+q1pPhMbzlv5vbfp9vIreiCgmqiO
rPLXB4bjklktWSkJBe/2Jt7ixNQZrT0DfnCmshHJmmBxTCI1+b798Xy+7j9Dz8ER
LzKHhlsilCv/jb8QKlIZSxvoDE02vAgwyVXlqxc7FdyaLmg/Emwr5LGUFHKCyhDR
3hmJafNokdWPcHwBYwRTdbG1OlgKA+yHSBzQ4OnjsTsKrrzlBrm9B9DiDVABXadS
5NnhvjZfaRmzjXZinf1th7fdMtLs4k+9XKn6szkrp2QhtlX9gyhkXuOhdwRVcyJB
V/8dLZDdOB3Kpbu5DGlmmIzdHQx5bo/tQqZlvJJNmcOWe+TKwHg56WRUYQ3PFQZK
M2A4XTd5kil6+PT7AnDHLoYAFdfScq6R32V38AI7S34kPrejftbSbDz8EVRXnrzj
zzXGNWtSQpIDZGgNEg3Ta6aIf28TxLCA7nRhuPYIDcswlUsHn4c=
=cFRH
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/berrange-gitlab/tags/dep-many-pull-request' into staging
Remove many old deprecated features
The following features have been deprecated for well over the 2
release cycle we promise
``-drive file=json:{...{'driver':'file'}}`` (since 3.0)
``-vnc acl`` (since 4.0.0)
``-mon ...,control=readline,pretty=on|off`` (since 4.1)
``migrate_set_downtime`` and ``migrate_set_speed`` (since 2.8.0)
``query-named-block-nodes`` result ``encryption_key_missing`` (since 2.10.0)
``query-block`` result ``inserted.encryption_key_missing`` (since 2.10.0)
``migrate-set-cache-size`` and ``query-migrate-cache-size`` (since 2.11.0)
``query-named-block-nodes`` and ``query-block`` result dirty-bitmaps[i].status (since 4.0)
``query-cpus`` (since 2.12.0)
``query-cpus-fast`` ``arch`` output member (since 3.0.0)
``query-events`` (since 4.0)
chardev client socket with ``wait`` option (since 4.0)
``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`` (since 4.0.0)
``ide-drive`` (since 4.2)
``scsi-disk`` (since 4.2)
# gpg: Signature made Thu 18 Mar 2021 09:23:39 GMT
# gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full]
# gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* remotes/berrange-gitlab/tags/dep-many-pull-request:
block: remove support for using "file" driver with block/char devices
block: remove 'dirty-bitmaps' field from 'BlockInfo' struct
block: remove dirty bitmaps 'status' field
block: remove 'encryption_key_missing' flag from QAPI
hw/scsi: remove 'scsi-disk' device
hw/ide: remove 'ide-drive' device
chardev: reject use of 'wait' flag for socket client chardevs
machine: remove 'arch' field from 'query-cpus-fast' QMP command
machine: remove 'query-cpus' QMP command
migrate: remove QMP/HMP commands for speed, downtime and cache size
monitor: remove 'query-events' QMP command
monitor: raise error when 'pretty' option is used with HMP
ui, monitor: remove deprecated VNC ACL option and HMP commands
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
|
Daniel P. Berrangé
|
8af54b9172 |
machine: remove 'query-cpus' QMP command
The newer 'query-cpus-fast' command avoids side effects on the guest execution. Note that some of the field names are different in the 'query-cpus-fast' command. Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Tested-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
|
|
Daniel P. Berrangé
|
cbde7be900 |
migrate: remove QMP/HMP commands for speed, downtime and cache size
The generic 'migrate_set_parameters' command handle all types of param. Only the QMP commands were documented in the deprecations page, but the rationale for deprecating applies equally to HMP, and the replacements exist. Furthermore the HMP commands are just shims to the QMP commands, so removing the latter breaks the former unless they get re-implemented. Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> |
|
|
Alexander Bulekov
|
25d309fb0d |
fuzz: configure a sparse-mem device, by default
The generic-fuzzer often provides randomized DMA addresses to virtual-devices. For a 64-bit address-space, the chance of these randomized addresses coinciding with RAM regions, is fairly small. Even though the fuzzer's instrumentation eventually finds valid addresses, this can take some-time, and slows-down fuzzing progress (especially, when multiple DMA buffers are involved). To work around this, create "fake" sparse-memory that spans all of the 64-bit address-space. Adjust the DMA call-back to populate this sparse memory, correspondingly Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Alexander Bulekov
|
d7da0e5601 |
fuzz: add a am53c974 generic-fuzzer config
Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Alexander Bulekov
|
d0614b8e7a |
fuzz: don't leave orphan llvm-symbolizers around
I noticed that with a sufficiently small timeout, the fuzzer fork-server sometimes locks up. On closer inspection, the issue appeared to be caused by entering our SIGALRM handler, while libfuzzer is in it's crash handlers. Because libfuzzer relies on pipe communication with an external child process to print out stack-traces, we shouldn't exit early, and leave an orphan child. Check for children in the SIGALRM handler to avoid this issue. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Alexander Bulekov
|
e8a2a62106 |
fuzz: fix the pro100 generic-fuzzer config
The device-type names for the pro100 network cards, are i8255.. We were matching "eepro", which catches the PCI PIO/MMIO regions for those devices, however misses the actual PCI device, which we use to map the BARs, before fuzzing. Fix that Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Philippe Mathieu-Daudé
|
b43957dcdd |
tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available
This test fails when QEMU is built without the virtio-scsi device, restrict it to its availability. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Philippe Mathieu-Daudé
|
c887d3339e |
tests/qtest: Only run fuzz-megasas-test if megasas device is available
This test fails when QEMU is built without the megasas device, restrict it to its availability. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Alexey Kirillov
|
3c3b656885 |
tests: Add tests for query-netdev command
A simply qtest that checks for correct number of netdevs in the response of the query-netdev. Signed-off-by: Alexey Kirillov <lekiravi@yandex-team.ru> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> |
|
|
Hao Wu
|
999be4a2d3 |
tests/qtest: Test PWM fan RPM using MFT in PWM test
This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm test. It tests whether the MFT module can measure correct fan values for a PWM fan in NPCM7XX boards. Reviewed-by: Doug Evans <dje@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210311180855.149764-6-wuhaotsh@google.com [PMM: fixed format strings for printing uint64_t] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Peter Maydell
|
6f34661b6c |
Pull request
-----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmBJQHkSHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748EdsP/2U2CGTM95tjDunTs9uZV/7zM6PWt85M vAPItNVU2jYPfzmaJN8twrzlj0PEDhvB9Q+OJjE4HEGxEbPcdblLg/R6Zs/EaWuY N6oKHPXnOnHb+e80UUJdiAq+Y5RUnJbb5L3ArycnVzBgws+Oj3DtqjB2VDccY4C/ Gkt23tZ7ikU4958e5VBqW2NUUrr+BQO0mqsW+sbbeE3WPj75NQc6srvS3TWvsg7W OYEyVYwm52/q2W/1a3Knfv/YO6UU9NGMpGyDLD2kwQwKbgUWYLW2BiWVwOAUldo9 De3nfKbKnFezLCZAZro20lfCa/aKwNGCOXWzlrKxqUQCmGYUx7gM1+3ahrSd5N0v zUgLdZm7O428ZHL6GujWGLA1UwwzpM9X3P3yo4c0S1J6fHypbI6a9jtewrUFvFgP TuQ7dp6cn2DTBYUcsrWilPHbTZMADYQNRD/xUtKqalYBEWy3FX5W75+OYBJKKh+X Qip68m6JBzgkszXhCcu6xlLb8ynZJr2VsHvtvIgf4NnLqNOIEgVLcMtoMZT8DPrp rIoRc5oUFz8zj5lHnJuLADBUvlCMqoCCoU3h2aqHwH8a7RGb180f+82BW9aBcb2u Jk+WgAhBUjWBBC97ReFgrINUD/qZRXVoOq8LthTuQSSyr/i1zq+oLM1F0EDXcMDm ssATku2IxL24 =moUF -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Pull request # gpg: Signature made Wed 10 Mar 2021 21:56:09 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: (22 commits) sysemu: Let VMChangeStateHandler take boolean 'running' argument sysemu/runstate: Let runstate_is_running() return bool hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards qemu-common.h: Update copyright string to 2021 tests/fp/fp-test: Replace the word 'blacklist' qemu-options: Replace the word 'blacklist' seccomp: Replace the word 'blacklist' scripts/tracetool: Replace the word 'whitelist' ui: Replace the word 'whitelist' virtio-gpu: Adjust code space style exec/memory: Use struct Object typedef fuzz-test: remove unneccessary debugging flags net: Use id_generate() in the network subsystem, too MAINTAINERS: Fix the location of tools manuals vhost_user_gpu: Drop dead check for g_malloc() failure backends/dbus-vmstate: Fix short read error handling target/hexagon/gen_tcg_funcs: Fix a typo hw/elf_ops: Fix a typo ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
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Peter Maydell
|
821e7ed167 |
* Add some missing gitlab-CI job dependencies
* Re-enable "make check SPEED=slow" * Improve the gitlab-pipeline-status script * Clean up inclusing of qtest.h headers * Improve libqos/qgraph documentation * Fix downloading problem in the acceptance tests * Remove deprecated target tilegx * Add new bsd-user maintainers -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmBHTZERHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbW1bA//Xkqv1MXiTllIp9/MaayzrCXE4QI1yosA onaEQWBuchw2oO/riyayskD516J5q0dyMlQAWx2tv9N1wFC+F8gUcP/q0zpckqhu 79DyRj9upDYrCgmGUi+0O9qelv3f7VHB6B1bBZlJzA+W7WskrXYk97dXkezvGDQa a+D95upQiOLu2cxvEWTx+Z4Gz1R4NMM/JaudnMkNy/WECLOrEQr/bEgk60dwomO2 Vdb2t1DLwmjFXXQgBvP5olVk/4vHGcDCMOD3gy8TTt7sNv3VR7re18rUdWnOQcB8 hm3IRGLYZ/JYTqKutJ4QYpOFA1hUyKOLysi3Wj/jhuzV/n028izpPbeCsuWGZ1Ck QmdOdP/g8XZzPWekEEG+pL8gZgVM/HdJAm+Ameiwq2F6ybDXS75EgBzCjFC3p1kF KA6UFUD9tw2ZGIjy5vzJToTn4wtku6n9B9sP3nHeVQYbQtSFQhfQwP02NVM66dua PLSlIPP09jtmGS/LO9j+aw72bNhMJzpEORQvnoAOsbH8cgTpu6auzvKDg2+cMqGb pXBihfvhRvfk3RV8dn2nk929FS6hxybjW3aU9iZAG+Dg0YIPwFOk/w/awgbAjhYe bwywmRZSE1mkqm6brE8J1y6SORlcvontv6PLy5NYLe6gGHJex4j8U0zWKW0qDjNr hot+/3Mstsw= =8JHZ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-03-09' into staging * Add some missing gitlab-CI job dependencies * Re-enable "make check SPEED=slow" * Improve the gitlab-pipeline-status script * Clean up inclusing of qtest.h headers * Improve libqos/qgraph documentation * Fix downloading problem in the acceptance tests * Remove deprecated target tilegx * Add new bsd-user maintainers # gpg: Signature made Tue 09 Mar 2021 10:27:29 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2021-03-09: bsd-user: Add new maintainers Remove deprecated target tilegx Acceptance Tests: restore filtering of tests by target arch Acceptance Tests: restore downloading of VM images docs/devel/qgraph: improve qgraph documentation libqos/qgraph: format qgraph comments for sphinx documentation scripts/ci/gitlab-pipeline-status: give more info when pipeline not found scripts/ci/gitlab-pipeline-status: give more information on failures scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET meson: Re-enable the possibility to run "make check SPEED=slow" docker: OpenSBI build job depends on OpenSBI container docker: EDK2 build job depends on EDK2 container docker: Alpine build job depends on Alpine container qtest: delete superfluous inclusions of qtest.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
|
5c6295a45b |
target-arm queue:
* Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implement a Xilinx CSU DMA model * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() -----BEGIN PGP SIGNATURE----- iQJMBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmBI0AQZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3n1WD/iXrX/YMZDrBOzP5h6sE5W/ W5tiTJBCKskRW1HduJjObFFl29yuiTzYld7+zfOTQUFgecpCN8q7AHuN0y9Sg+9B cyHNHwseOfkHE4CGe2ImjmpYSZUUEkQBtCN2OmJjsaiEoK/eZCIErPw4JMUcusLL VPccPjXS92WtqQkGshNYribMOhZnuBcvX/LsT7IL8THDVPv8OECIeq8ewTZtLMe/ l/x3D3PJ56q69EFMnYt6TS1cd9OtD7pw3Jnbfv0iStE/TiJQB92ft8H07kpE6KVI jhRkhyVBnrVI2deTFcFC+rZDQggzWGRVAbUzMikZOZycUML/zjJKEIGM2V6iCHmL bQMUOTR4GLFbVyabJ/IH6YoCFS+8hUboyQXQL0gOKtcJiryoDI3AjyKNjxRbIY3b qEV3xQYTtrS7mdrwQZqwH6Rs/54jDyX7eBNWfZwq4dOQKvnTQPQEj6iWmj4rOvma McWbhu6bAfU6ZINOxkr8HcG/AxF3IYw9Gtb8KRg7/87JRvNvxj++kqqjSRRLU4Co QUYuQnpd+ux7eSXKcRfnzd27iaZ++dKJMct4Gq8i0VASb+uk+xmkG2MiGEBVSJv8 kIK5NLzDGjWjrZd366uAUtHBnWktP/5J4DKq1XKx0mtrkt7tbU6Oh90a7rSiOgur LtpGH4IPQDwp/YGXZD86 =Qu2a -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210310' into staging target-arm queue: * Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implement a Xilinx CSU DMA model * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() # gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits) hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips hw/ssi: xilinx_spips: Clean up coding convention issues hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI hw/arm: xlnx-zynqmp: Clean up coding convention issues hw/dma: Implement a Xilinx CSU DMA model target/arm: Restrict v7A TCG cpus to TCG accel tests/qtest/sse-timer-test: Test counter scaling changes tests/qtest/sse-timer-test: Test the system timer tests/qtest/sse-timer-test: Add simple test of the SSE counter docs/system/arm/mps2.rst: Document the new mps3-an547 board hw/arm/mps2-tz: Add new mps3-an547 board hw/arm/mps2-tz: Make initsvtor0 setting board-specific hw/arm/mps2-tz: Support running APB peripherals on different clock hw/misc/mps2-scc: Implement changes for AN547 hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate hw/arm/mps2-tz: Make UART overflow IRQ board-specific hw/arm/armsse: Add SSE-300 support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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a557b00469 |
Block layer patches:
- qemu-storage-daemon: add --pidfile option - qemu-storage-daemon: CLI error messages include the option name now - vhost-user-blk export: Misc fixes - docs: Improvements for qemu-storage-daemon documentation - parallels: load bitmap extension - backup-top: Don't crash on post-finalize accesses - Improve error messages related to node-name options - iotests improvements -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmBGWHURHGt3b2xmQHJl ZGhhdC5jb20ACgkQfwmycsiPL9ZpyxAAk0gRiayMUidSzgvzU/CeUhzBsC4ayEkn dLtTZ8hl7cW/w3GjDK1Wri4MANRN/0YHjiLSzO38lfVpK0z8SJr5aU4CwhRlOKVm VWgx+OLlV4Azht9fMNF4SwUXgXhl7pUNiFMNnomb++gvqhjMCedDZcWlnVKhbuQ+ O3TKGO4tToSGaXP85jCM4xukw5HZ//4QMYg6MH0gDk8ahfE2MhyTHz64oDp412os qhxvc4bU2S5xGLaBfLGhsc6VPQFKjblG704P/Y73zeoxq12A0L2Ru98WvrNaXw7Z m54jJUINiDkJ7ZOl6W04zdeiLvs3BOrNe+7mxawOTmdkBsLOKErrhrTO1gJmHHmX kJLWEh9VYWxVbvE7C3KQt9bclR6wt+aPup4X1XE8pHtocPVONVq5bvctrVgxgK0b btN06NcK+2jQxcQkG4MnBJ8S41qmxHyIEQlQWKyUWXvKt6zsFU/NuWKMQrAfYZZi 5J+RPU/fB073LY4lpAgou0OP1/RIvQmi5zWzjWm/Qbp3JpgC+azcYvxn7UU7J71P +u8IEQ4+Q9s0gvXQAh/U8AQg2eOqAwEAyFUJl9wpPN56O03dbI8KyCV5ECIRJu49 CC8uKlJxZkbw9ZBs11SAmm/0J64WcNb2AMWxDPC8Z6oQbVaRRRznoRwRP2H6odUu uBolS43+5cI= =eAjH -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging Block layer patches: - qemu-storage-daemon: add --pidfile option - qemu-storage-daemon: CLI error messages include the option name now - vhost-user-blk export: Misc fixes - docs: Improvements for qemu-storage-daemon documentation - parallels: load bitmap extension - backup-top: Don't crash on post-finalize accesses - Improve error messages related to node-name options - iotests improvements # gpg: Signature made Mon 08 Mar 2021 17:01:41 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (30 commits) blockdev: Clarify error messages pertaining to 'node-name' block: Clarify error messages pertaining to 'node-name' docs: qsd: Explain --export nbd,name=... default MAINTAINERS: update parallels block driver iotests: add parallels-read-bitmap test iotests.py: add unarchive_sample_image() helper parallels: support bitmap extension for read-only mode block/parallels: BDRVParallelsState: add cluster_size field parallels.txt: fix bitmap L1 table description qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public block/export: port virtio-blk read/write range check block/export: port virtio-blk discard/write zeroes input validation block/export: fix vhost-user-blk export sector number calculation block/export: use VIRTIO_BLK_SECTOR_BITS block/export: fix blk_size double byteswap libqtest: add qtest_remove_abrt_handler() libqtest: add qtest_kill_qemu() libqtest: add qtest_socket_server() vhost-user-blk: fix blkcfg->num_queues endianness docs: replace insecure /tmp examples in qsd docs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Alexander Bulekov
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c8ffacbf7c |
fuzz-test: remove unneccessary debugging flags
These flags cause the output to look strange for 'make check', and they aren't needed to reproduce bugs, if they reappear. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210216181316.794276-1-alxndr@bu.edu> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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Emanuele Giuseppe Esposito
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222455ef81 |
libqos/qgraph: format qgraph comments for sphinx documentation
Change documentation style and fix minor typos in tests/qtest/libqos/qgraph.h to automatically generate sphinx documentation in docs/devel/qgraph.rst The mechanism explanation that once was in qgraph.h is now moved to qgraph.rst There is no functional change intended. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210308073240.6363-1-eesposit@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Peter Maydell
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bf7ca80386 |
tests/qtest/sse-timer-test: Test counter scaling changes
Test that when we change the scaling of the system counter that the system timer responds appropriately. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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Peter Maydell
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f277d1c373 |
tests/qtest/sse-timer-test: Test the system timer
Add a test which tests various parts of the functionality of the SSE system timer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
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Peter Maydell
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1eca58aa1d |
tests/qtest/sse-timer-test: Add simple test of the SSE counter
Add a simple qtest to exercise the new system counter device in the SSE-300. We'll add tests of the system timer device here too, so this includes scaffolding (register definitions, etc) for those. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-45-peter.maydell@linaro.org |
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Stefan Hajnoczi
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e1fa7f5591 |
libqtest: add qtest_remove_abrt_handler()
Add a function to remove previously-added abrt handler functions. Now that a symmetric pair of add/remove functions exists we can also balance the SIGABRT handler installation. The signal handler was installed each time qtest_add_abrt_handler() was called. Now it is installed when the abrt handler list becomes non-empty and removed again when the list becomes empty. The qtest_remove_abrt_handler() function will be used by vhost-user-blk-test. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20210223144653.811468-5-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Stefan Hajnoczi
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7a23c52376 |
libqtest: add qtest_kill_qemu()
Tests that manage multiple processes may wish to kill QEMU before destroying the QTestState. Expose a function to do that. The vhost-user-blk-test testcase will need this. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20210223144653.811468-4-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Stefan Hajnoczi
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9fb7bb0698 |
libqtest: add qtest_socket_server()
Add an API that returns a new UNIX domain socket in the listen state. The code for this was already there but only used internally in init_socket(). This new API will be used by vhost-user-blk-test. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-Id: <20210223144653.811468-3-stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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Peter Maydell
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0436c55edf |
* fix tracing vs -daemonize (Daniel)
* detect invalid CFI configuration (Daniele) * 32-bit PVH fix (David) * forward SCSI passthrough host-status to the SCSI HBA (Hannes) * detect ill-formed id in QMP object-add (Kevin) * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng Liang) * add nodelay option for chardev (myself) * deprecate -M kernel-irqchip=off on x86 (myself) * keep .d files (myself) * Fix -trace file (myself) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmBDXMAUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroPYPwf/YeM8TYqCFCt3Th4Ap2IuMqI/7HRq iNFlKWfM2S7Gk87RaNINL96MHadOteeYSQLuh4Y6FHL1OGpWX2ZByXR//z2DARLC AuV1IncevVyQiSDQzwZj6BU7G4b8xSU3Ey5yseYv+hjUhVbiscDvpioV2USkUvD5 IJFXwL5+eRAOGma0SAcumgwu5xc5/GGh5D63vZ0R7q5eDCu69Q6/ZYvK93b6+TP7 GWboGJFcbTvYku56S4ip8VdEzxiNhfQgGNa3nNDx4ejiTt4mYAft7wy+j/iQjPW9 P0y4AYuvInCrUy1RBR1BqAE+ZXNxqby3AQ0ZTujG+YMiWLIvz5FZtGEvyg== =aCET -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fix tracing vs -daemonize (Daniel) * detect invalid CFI configuration (Daniele) * 32-bit PVH fix (David) * forward SCSI passthrough host-status to the SCSI HBA (Hannes) * detect ill-formed id in QMP object-add (Kevin) * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng Liang) * add nodelay option for chardev (myself) * deprecate -M kernel-irqchip=off on x86 (myself) * keep .d files (myself) * Fix -trace file (myself) # gpg: Signature made Sat 06 Mar 2021 10:43:12 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (23 commits) meson: Stop if cfi is enabled with system slirp trace: skip qemu_set_log_filename if no "-D" option was passed trace: fix "-trace file=..." meson: adjust timeouts for some slower tests build-sys: invoke ninja with -d keepdepfile qemu-option: do not suggest using the delay option scsi: move host_status handling into SCSI drivers scsi: inline sg_io_sense_from_errno() into the callers. scsi-generic: do not snoop the output of failed commands scsi: Add mapping for generic SCSI_HOST status to sense codes scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error codes qemu-config: add error propagation to qemu_config_parse x86/pvh: extract only 4 bytes of start address for 32 bit kernels elf_ops: correct loading of 32 bit PVH kernel lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize accel: kvm: Add aligment assert for kvm_log_clear_one_slot accel: kvm: Fix memory waste under mismatch page size vl.c: do not execute trace_init_backends() before daemonizing qom: Check for wellformed id in user_creatable_add_type() chardev: add nodelay option ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Paolo Bonzini
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dc1d91ac56 |
meson: adjust timeouts for some slower tests
Adjust the timeouts for the benchmarks (Meson 0.57 allows 0 to mean
infinite) and for the longest running tests. These are the
times that I measured and the corresponding timeouts. For generic
qtests, the target that reported the longest runtime is included.
unit tests:
test-crypto-tlscredsx509 13.15s 45s
test-crypto-tlssession 14.12s 45s
qtests:
qos-test 21.26s 60s (i386)
ahci-test 22.18s 60s
pxe-test 26.51s 60s
boot-serial-test 28.02s 60s (sparc)
prom-env-test 28.86s 60s
bios-tables-test 50.17s 120s (aarch64)
test-hmp 57.15s 120s (aarch64)
npcm7xx_pwm-test 71.27s 150s
migration-test 97.09s 150s (aarch64)
qom-test 139.20s 240s (aarch64)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Doug Evans
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e6646167cc |
tests/qtests: Add npcm7xx emc model test
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Doug Evans <dje@google.com> Message-id: 20210218212453.831406-4-dje@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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07dbfdd290 |
* fix --enable-fuzzing linker failures (Alexander)
* target/i386: Add bus lock debug exception support (Chenyi) * update documentation for preferred boolean option syntax (Daniel) * make SCSI io_timeout configurable (Hannes) * fix handling of guest recoverable SCSI errors (myself) * misc fixes (Pavel, Zheng Zhan Liang, Zihao) * fix installation of binaries with entitlements (Akihiko) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmA3tzQUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMsngf+OkbgTDouxq3qnn1K89n6j2wKlAj0 qPP+57o1sv5u5MjX0BkawXCMJfvTKJaOt/Cs8S0FaPTehfR5H0T2tL76KZBEdlEP /+V3EC0Qmd1S47LKIOuDkV15szvnccyjpgwaL7Osjb0Eh0SxeXd4pBTc3yYtkacu zb/srZ63U2iJZr93QwGmEJjuW57WNym6QWXF3Mrg9PFXybkXFTGumB2vZMlQc+MN RWPTUKZKAiIr/HfdvpIETXY+HzJhylvIQ8OVWtM3XDorl48OWcOat/jyeNEVYgG3 o+gxIRnfvIL+42GkmUFbOKLzT5SV6p9EYYGLTuE1kU7nc6HWoD0CdPxA3A== =UBVO -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * fix --enable-fuzzing linker failures (Alexander) * target/i386: Add bus lock debug exception support (Chenyi) * update documentation for preferred boolean option syntax (Daniel) * make SCSI io_timeout configurable (Hannes) * fix handling of guest recoverable SCSI errors (myself) * misc fixes (Pavel, Zheng Zhan Liang, Zihao) * fix installation of binaries with entitlements (Akihiko) # gpg: Signature made Thu 25 Feb 2021 14:41:56 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (29 commits) tcg/i386: rdpmc: fix the the condtions chardev: do not use short form boolean options in non-QemuOpts character device descriptions vl: deprecate -writeconfig target/i386: Add bus lock debug exception support qom/object.c: Fix typo target/i386: update to show preferred boolean syntax for -cpu docs: update to show preferred boolean syntax for -cpu docs: update to show preferred boolean syntax for -vnc docs: update to show preferred boolean syntax for -chardev qemu-options: update to show preferred boolean syntax for -vnc qemu-options: update to show preferred boolean syntax for -incoming qemu-options: update to show preferred boolean syntax for -netdev qemu-options: update to show preferred boolean syntax for -spice qemu-options: update to show preferred boolean syntax for -chardev gdbstub: use preferred boolean option syntax char: don't fail when client is not connected scsi: drop 'result' argument from command_complete callback scsi-disk: pass guest recoverable errors through even for rerror=stop scsi-disk: pass SCSI status to scsi_handle_rw_error scsi: introduce scsi_sense_from_errno() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Daniel P. Berrangé
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b7d77f5a8e |
target/i386: update to show preferred boolean syntax for -cpu
The preferred syntax is to use "foo=on|off", rather than a bare "+foo" or "-foo" Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20210216191027.595031-11-berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Isaku Yamahata
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7b630d937a |
qtest/acpi/bios-tables-test: update acpi tables
update golden master acpi tables and empty bios-tables-test-allowed-diff.h. Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <de5a7f88563d39ed0cec34ff1d4cd6a1bdc927f0.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
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9a70e04359 |
acpi: add test case for -no-hpet
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <5ef9a81e49793afb42ffd19bbf1f44e269c65e93.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
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0dabb2e802 |
acpi: add test case for smm unsupported -machine smm=off
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <22f774a51255af1608b07b00b257af426adcf4ab.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Isaku Yamahata
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7995d9a399 |
qtest: update tests/qtest/bios-tables-test-allowed-diff.h
The following tests will modify acpi tables. prepare qtests to allow acpi table change. add new tables for new tests. - tests/data/acpi/pc/DSDT.nohpet - tests/data/acpi/pc/FACP.nosmm - tests/data/acpi/q35/DSDT.nohpet - tests/data/acpi/q35/FACP.nosmm Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <c8285f54deab362ed839d31f0fb5bb590ab71fdd.1613615732.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Xingang Wang
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2182e4058c |
tests/data/acpi/virt/DSDT.pxb: update with _CCA
Update expected DSDT files accordingly, and re-enable their testing.
diff of disassembly of changed expected files:
diff -ru -IDisassembly old/tests/data/acpi/virt/DSDT.pxb.dsl new/tests/data/acpi/virt/DSDT.pxb.dsl
--- old/tests/data/acpi/virt/DSDT.pxb.dsl 2021-02-23 09:54:18.566781350 -0500
+++ new/tests/data/acpi/virt/DSDT.pxb.dsl 2021-02-23 09:57:51.952816428 -0500
Name (_BBN, 0x80) // _BBN: BIOS Bus Number
Name (_UID, 0x80) // _UID: Unique ID
Name (_STR, Unicode ("pxb Device")) // _STR: Description String
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
{
Package (0x04)
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
Xingang Wang
|
451730cfe4 |
acpi: Allow pxb DSDT acpi table changes
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Signed-off-by: Xingang Wang <wangxingang5@huawei.com> Message-Id: <1612490205-48788-2-git-send-email-wangxingang5@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> |
|
|
Thomas Huth
|
45d10d724b |
tests/qtest/boot-sector: Check that the guest did not panic
The s390-ccw bios code panics if it can not boot successfully. In this case, it does not make sense that we wait the full 600 seconds for the boot sector test to finish and can signal the failure immediately, thus let's check the status of the guest with the "query-status" QMP command here, too. Reported-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210212113141.854871-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Philippe Mathieu-Daudé
|
421954f43b |
tests/qtest/boot-serial-test: Test Virt machine with 'max'
When using KVM, using a specific cpu type will only work if the host CPU really is that exact CPU type. During testing we can simply use the 'max' CPU which will select all the features available from the host. This allow running this test on a Cavium CN8890 (ThunderX cores). Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210205144345.2068758-4-f4bug@amsat.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
|
|
Peter Maydell
|
f0f75dc174 |
* HVF fixes
* Extra qos-test debugging output (Christian) * SEV secret address autodetection (James) * SEV-ES support (Thomas) * Relocatable paths bugfix (Stefan) * RR fix (Pavel) * EventNotifier fix (Greg) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmAr778UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroNVLwf/V3lb/HbyqFkhacB9eqEsEXGC3Hdp hU4J11P3lGS84muByxCdfw1axCGZ5x2cJmJSE71LfCcHXxEQSx4FmfxX5xeKbp1n vHPJ1XKhsFkOYA2O6mCW4yynTfizmp+JK36wwjmG3BEXTMMC5o2V8gAnzkP1sT9l 0h454CtPq2lD0upgVIvI7AStpWXZwysh0hQEDk8TsIfFfzLNs+MJyvlPGn4pj+kN k+G3475FinPdncIBGsnRNMfiBmA4/L0L4lriQzZPV57lDfZ8sJkrmh1+/JfK6vsb FWIe6Suior6JGorzATbXrFhmNJ+FxNNEmlzSdqRxRz7CDv0SDZb7Ckv37Q== =FDIr -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * HVF fixes * Extra qos-test debugging output (Christian) * SEV secret address autodetection (James) * SEV-ES support (Thomas) * Relocatable paths bugfix (Stefan) * RR fix (Pavel) * EventNotifier fix (Greg) # gpg: Signature made Tue 16 Feb 2021 16:15:59 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (21 commits) replay: fix icount request when replaying clock access event_notifier: Set ->initialized earlier in event_notifier_init() hvf: Fetch cr4 before evaluating CPUID(1) target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT hvf: x86: Remove unused definitions target/i386/hvf: add vmware-cpuid-freq cpu feature hvf: Guard xgetbv call util/cutils: Skip "." when looking for next directory component tests/qtest/qos-test: dump QEMU command if verbose tests/qtest/qos-test: dump environment variables if verbose tests/qtest/qos-test: dump qos graph if verbose libqos/qgraph_internal: add qos_printf() and qos_printf_literal() libqos/qgraph: add qos_node_create_driver_named() sev/i386: Enable an SEV-ES guest based on SEV policy kvm/i386: Use a per-VM check for SMM capability sev/i386: Don't allow a system reset under an SEV-ES guest sev/i386: Allow AP booting under SEV-ES sev/i386: Require in-kernel irqchip support for SEV-ES guests sev/i386: Add initial support for SEV-ES sev: update sev-inject-launch-secret to make gpa optional ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Christian Schoenebeck
|
b0019c995e |
tests/qtest/qos-test: dump QEMU command if verbose
If qtests are run in verbose mode (i.e. if --verbose CL argument was provided) then print the assembled qemu command line for each test. Use qos_printf() instead of g_test_message() to avoid the latter cluttering the output. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <110bef3595cb841dfa1b86733c174ac9774eb37e.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
|
093360dc32 |
tests/qtest/qos-test: dump environment variables if verbose
If qtests are run in verbose mode (i.e. if --verbose CL argument was provided) then print all environment variables to stdout before running the individual tests. It is common nowadays, at least being able to output all config vectors in a build chain, especially if it is required to investigate build- and test-issues on foreign/remote machines, which includes environment variables. In the context of writing new test cases this is also useful for finding out whether there are already some existing options for common questions like is there a preferred location for writing test files to? Is there a maximum size for test data? Is there a deadline for running tests? Use qos_printf() instead of g_test_message() to avoid the latter cluttering the output. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <21d77b33c578d80b5bba1068e61fd3562958b3c2.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Christian Schoenebeck
|
83ff78e567 |
tests/qtest/qos-test: dump qos graph if verbose
If qtests were run in verbose mode (i.e. if --verbose CL argument was provided) then dump the generated qos graph (all nodes and edges, along with their current individual availability status) to stdout, which allows to identify problems in the created qos graph e.g. when writing new qos tests. See API doc comment on function qos_dump_graph() for details. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <6bffb6e38589fb2c06a2c1b5deed33f3e710fed1.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
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Christian Schoenebeck
|
23820025af |
libqos/qgraph_internal: add qos_printf() and qos_printf_literal()
These two are macros wrapping regular printf() call. They are intended to be used instead of calling printf() directly in order to avoid breaking TAP output format. TAP output format is enabled by using --tap command line argument. Starting with glib 2.62 it is enabled by default. Unfortunately there is currently no public glib API available to check whether TAP output format is enabled. For that reason qos_printf() simply always prepends a '#' character for now. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <653a5ef61c5e7d160e4d6294e542c57ea324cee4.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
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Christian Schoenebeck
|
f6a2c6eee7 |
libqos/qgraph: add qos_node_create_driver_named()
So far the qos subsystem of the qtest framework had the limitation that only one instance of the same official QEMU (QMP) driver name could be created for qtests. That's because a) the created qos node names must always be unique, b) the node name must match the official QEMU driver name being instantiated and c) all nodes are in a global space shared by all tests. This patch removes this limitation by introducing a new function qos_node_create_driver_named() which allows test case authors to specify a node name being different from the actual associated QEMU driver name. It fills the new 'qemu_name' field of QOSGraphNode for that purpose. Adjust build_driver_cmd_line() and qos_graph_node_set_availability() to correctly deal with either accessing node name vs. node's qemu_name correctly. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <3be962ff38f3396f8040deaa5ffdab525c4e0b16.1611704181.git.qemu_oss@crudebyte.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
|
|
Hao Wu
|
6b6e7570d6 |
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
This patch implements the FIFO mode of the SMBus module. In FIFO, the user transmits or receives at most 16 bytes at a time. The FIFO mode allows the module to transmit large amount of data faster than single byte mode. Since we only added the device in a patch that is only a few commits away in the same patch set. We do not increase the VMstate version number in this special case. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Corey Minyard <cminyard@mvista.com> Message-id: 20210210220426.3577804-6-wuhaotsh@google.com Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Hao Wu
|
d986bf729c |
hw/i2c: Add a QTest for NPCM7XX SMBus Device
This patch adds a QTest for NPCM7XX SMBus's single byte mode. It sends a byte to a device in the evaluation board, and verify the retrieved value is equivalent to the sent value. Reviewed-by: Doug Evans<dje@google.com> Reviewed-by: Tyrong Ting<kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210210220426.3577804-5-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Alexander Bulekov
|
fff7111fb9 |
fuzz: add virtio-9p configurations for fuzzing
virtio-9p devices are often used to expose a virtual-filesystem to the guest. There have been some bugs reported in this device, such as CVE-2018-19364, and CVE-2021-20181. We should fuzz this device This patch adds two virtio-9p configurations: * One with the widely used -fsdev local driver. This driver leaks some state in the form of files/directories created in the shared dir. * One with the synth driver. While it is not used in the real world, this driver won't leak leak state between fuzz inputs. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210117230924.449676-4-alxndr@bu.edu> |
|
|
Alexander Bulekov
|
8630b43f11 |
fuzz: enable dynamic args for generic-fuzz configs
For some device configurations, it is useful to configure some resources, and adjust QEMU arguments at runtime, prior to fuzzing. This patch adds an "argfunc" to generic the generic_fuzz_config. When specified, it is responsible for configuring the resources and returning a string containing the corresponding QEMU arguments. This can be useful for targets that rely on e.g.: * a temporary qcow2 image * a temporary directory * an unused TCP port used to bind the VNC server Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210117230924.449676-2-alxndr@bu.edu> |
|
|
Alexander Bulekov
|
61f90e0461 |
fuzz: log the arguments used to initialize QEMU
This is useful for building reproducers. Instead checking the code or the QEMU_FUZZ_ARGS, the arguments are at the top of the crash log. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210117201014.271610-3-alxndr@bu.edu> |
|
|
Alexander Bulekov
|
d54d9b1d12 |
fuzz: refine the ide/ahci fuzzer configs
Disks work differently depending on the x86 machine type (SATA vs PATA). Additionally, we should fuzz the atapi code paths, which might contain vulnerabilities such as CVE-2020-29443. This patch adds hard-disk and cdrom generic-fuzzer configs for both the pc (PATA) and q35 (SATA) machine types. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210120152211.109782-1-alxndr@bu.edu> |
|
|
Alexander Bulekov
|
fc1c8344e6 |
fuzz: ignore address_space_map is_write flag
We passed an is_write flag to the fuzz_dma_read_cb function to differentiate between the mapped DMA regions that need to be populated with fuzzed data, and those that don't. We simply passed through the address_space_map is_write parameter. The goal was to cut down on unnecessarily populating mapped DMA regions, when they are not read from. Unfortunately, nothing precludes code from reading from regions mapped with is_write=true. For example, see: https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg04729.html This patch removes the is_write parameter to fuzz_dma_read_cb. As a result, we will fill all mapped DMA regions with fuzzed data, ignoring the specified transfer direction. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-Id: <20210120060255.558535-1-alxndr@bu.edu> |
|
|
Marian Postevca
|
277a582bf8 |
tests/acpi: disallow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-6-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
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Marian Postevca
|
4b1f88820f |
tests/acpi: add OEM ID and OEM TABLE ID test
Add support for testing the fields OEM ID and
OEM TABLE ID in all ACPI tables for PC,Q35,MICROVM,AARCH64
Full diff of changed files disassembly:
Table tests/data/acpi/virt/FACP diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-VQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-BQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-QQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-OQIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-EMIIX0, Mon Jan 18 23:55:00 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT, Mon Jan 18 23:55:00 2021
+ * Disassembly of /tmp/aml-RMIIX0, Mon Jan 18 23:55:00 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-JROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-2ROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-WROMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-YOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-TOOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-LPOMX0, Mon Jan 18 23:55:27 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 0000006A
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : AB
+[009h 0009 1] Checksum : 65
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.numamem diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Mon Jan 18 23:55:27 2021
+ * Disassembly of /tmp/aml-HPOMX0, Mon Jan 18 23:55:27 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0x60
+ * Checksum 0x0F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/FACP.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-OERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-BERTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-8DRTX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-IN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SRAT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SRAT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-FN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E2
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 5C
+[009h 0009 1] Checksum : 16
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SLIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SLIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-CN6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/SSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-9M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002E0 (736)
* Revision 0x01
- * Checksum 0x3F
+ * Checksum 0xFF
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/virt/NFIT.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/NFIT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-6M6NX0, Mon Jan 18 23:55:41 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D1
+[009h 0009 1] Checksum : 82
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.memhp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Mon Jan 18 23:55:41 2021
+ * Disassembly of /tmp/aml-3M6NX0, Mon Jan 18 23:55:41 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000019A5 (6565)
* Revision 0x02
- * Checksum 0x90
+ * Checksum 0x3F
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/virt/FACP.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/FACP, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-206LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : BB
+[009h 0009 1] Checksum : 55
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/APIC.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-E16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A8
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : B3
+[009h 0009 1] Checksum : 50
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/GTDT.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/GTDT, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-J16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [GTDT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]
[004h 0004 4] Table Length : 00000060
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : D9
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCGTDT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/MCFG.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/MCFG, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-N16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 4F
+[009h 0009 1] Checksum : EC
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/SPCR.pxb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-B16LX0, Mon Jan 18 23:55:52 2021
*
* ACPI Data Table [SPCR]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 13
+[009h 0009 1] Checksum : CB
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSPCR"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/virt/DSDT.pxb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Mon Jan 18 23:55:52 2021
+ * Disassembly of /tmp/aml-G16LX0, Mon Jan 18 23:55:52 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E09 (7689)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/pc/HPET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-QNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:53 2021
+ * Disassembly of /tmp/aml-NNVAX0, Mon Jan 18 23:58:53 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-MB7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-0C7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/TPM2.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/TPM2.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-ZC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [TPM2]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface table]
[004h 0004 4] Table Length : 0000004C
[008h 0008 1] Revision : 04
-[009h 0009 1] Checksum : 72
+[009h 0009 1] Checksum : 15
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCTPM2"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-XC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.tis diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-VC7EX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.tis diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-RC7EX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000020D7 (8407)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC8
+ * Checksum 0x77
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-3N7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-WN7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-DI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-BI7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.bridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-9H7NX0, Mon Jan 18 23:58:55 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.bridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.bridge, Mon Jan 18 23:58:55 2021
+ * Disassembly of /tmp/aml-6H7NX0, Mon Jan 18 23:58:55 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001E8B (7819)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x8F
+ * Checksum 0x3E
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-KW0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-HR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-OR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 000000E0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 3B
+[009h 0009 1] Checksum : F5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-TR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.mmio64 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ZR0GX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.mmio64 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.mmio64, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-7R0GX0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000022E4 (8932)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x9D
+ * Checksum 0x4C
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VVX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-GUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-LUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-QUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.ipmibt diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-VUX8W0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.ipmibt diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.ipmibt, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-3UX8W0, Mon Jan 18 23:58:56 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001EC4 (7876)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x2A
+ * Checksum 0xD9
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/FACP.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-2HJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ARJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 7B
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-ERJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-IRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000130
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 36
+[009h 0009 1] Checksum : F0
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SLIT.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SLIT.cphp, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-MRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [SLIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SLIT" [System Locality Information Table]
[004h 0004 4] Table Length : 00000030
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 2C
+[009h 0009 1] Checksum : E8
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSLIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:56 2021
+ * Disassembly of /tmp/aml-PRJNX0, Mon Jan 18 23:58:56 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.cphp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-TRJNX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.cphp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.cphp, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-2RJNX0, Mon Jan 18 23:58:57 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002049 (8265)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x5A
+ * Checksum 0x09
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/q35/HPET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-V1NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.memhp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-B2NBX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-BJ6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.numamem diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:57 2021
+ * Disassembly of /tmp/aml-UH6PX0, Mon Jan 18 23:58:57 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/FACP.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ITDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-STDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000090
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : AE
+[009h 0009 1] Checksum : 4B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-WTDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-XTJEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000188
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 68
+[009h 0009 1] Checksum : 22
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0TDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/SSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-8TDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000002DE (734)
* Revision 0x01
- * Checksum 0x46
+ * Checksum 0x06
* OEM ID "BOCHS "
- * OEM Table ID "NVDIMM"
+ * OEM Table ID "NVDIMM "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
+DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM ", 0x00000001)
{
Scope (\_SB)
{
Table tests/data/acpi/q35/NFIT.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/NFIT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9VDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [NFIT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table]
[004h 0004 4] Table Length : 000000F0
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 24
+[009h 0009 1] Checksum : D5
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCNFIT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.dimmpxm diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-DWDEX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.dimmpxm diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.dimmpxm, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-IWDEX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000024EF (9455)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x26
+ * Checksum 0xD5
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
External (_SB_.NVDR, UnknownObj)
Table tests/data/acpi/q35/FACP.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/FACP, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-OKSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 000000F4
[008h 0008 1] Revision : 03
-[009h 0009 1] Checksum : 1F
+[009h 0009 1] Checksum : B9
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/APIC.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/APIC.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-0KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000080
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DA
+[009h 0009 1] Checksum : 77
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HPET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HPET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-5KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/SRAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/SRAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-9KSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [SRAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : C0
+[009h 0009 1] Checksum : 7A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCSRAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/HMAT.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/HMAT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ALYOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [HMAT]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table]
[004h 0004 4] Table Length : 00000118
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : 98
+[009h 0009 1] Checksum : 42
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHMAT"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/MCFG.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/MCFG, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ELSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [MCFG]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]
[004h 0004 4] Table Length : 0000003C
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : EF
+[009h 0009 1] Checksum : 8C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCMCFG"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/WAET.acpihmat diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/q35/WAET, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-ILSOX0, Mon Jan 18 23:58:58 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/q35/DSDT.acpihmat diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT.acpihmat, Mon Jan 18 23:58:58 2021
+ * Disassembly of /tmp/aml-2JSOX0, Mon Jan 18 23:58:58 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000023A6 (9126)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xB3
+ * Checksum 0x62
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-1HH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-GIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-PIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.ipmikcs diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-OIH9W0, Mon Jan 18 23:58:59 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.ipmikcs diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Mon Jan 18 23:58:59 2021
+ * Disassembly of /tmp/aml-9GH9W0, Mon Jan 18 23:58:59 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00001411 (5137)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x33
+ * Checksum 0xE2
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-84PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-D5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-P5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.roothp diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:01 2021
+ * Disassembly of /tmp/aml-N5PIX0, Mon Jan 18 23:59:01 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.roothp diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-83PIX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000148D (5261)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xC6
+ * Checksum 0x75
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-2ZSAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-B0SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-G2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbridge diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-F2SAX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbridge diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbridge, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-R2SAX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000013A2 (5026)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xD9
+ * Checksum 0x88
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/pc/FACP.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/FACP, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-D9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 00000074
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : A1
+[009h 0009 1] Checksum : 3B
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/APIC.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-K9COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : ED
+[009h 0009 1] Checksum : 8A
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/HPET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/HPET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-L4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [HPET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]
[004h 0004 4] Table Length : 00000038
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 03
+[009h 0009 1] Checksum : B4
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCHPET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/WAET.hpbrroot diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/WAET, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-W4COX0, Mon Jan 18 23:59:02 2021
*
* ACPI Data Table [WAET]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table]
[004h 0004 4] Table Length : 00000028
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : 88
+[009h 0009 1] Checksum : 39
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCWAET"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/pc/DSDT.hpbrroot diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.hpbrroot, Mon Jan 18 23:59:02 2021
+ * Disassembly of /tmp/aml-S4COX0, Mon Jan 18 23:59:02 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000C0C (3084)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0x81
+ * Checksum 0x30
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
Table tests/data/acpi/microvm/FACP.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-PZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.usb diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZZ3FX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.usb diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.usb, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-XZ3FX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000019E (414)
* Revision 0x02
- * Checksum 0x72
+ * Checksum 0x21
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TX8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.rtc diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-QS8BX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : D7
+[009h 0009 1] Checksum : 74
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.rtc diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.rtc, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-4S8BX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000194 (404)
* Revision 0x02
- * Checksum 0x30
+ * Checksum 0xDF
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-ZRMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.ioapic2 diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-VMMOX0, Mon Jan 18 23:59:03 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000052
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : E6
+[009h 0009 1] Checksum : 83
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.ioapic2 diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.ioapic2, Mon Jan 18 23:59:03 2021
+ * Disassembly of /tmp/aml-TMMOX0, Mon Jan 18 23:59:03 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000016D (365)
* Revision 0x02
- * Checksum 0x1C
+ * Checksum 0xCB
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Table tests/data/acpi/microvm/FACP.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/FACP, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-M6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [FACP]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
-[009h 0009 1] Checksum : 7E
+[009h 0009 1] Checksum : 18
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCFACP"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/APIC.pcie diff:
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20200326 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/microvm/APIC.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-V6CGX0, Tue Jan 19 00:03:13 2021
*
* ACPI Data Table [APIC]
*
@@ -13,9 +13,9 @@
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 0000006E
[008h 0008 1] Revision : 01
-[009h 0009 1] Checksum : DF
+[009h 0009 1] Checksum : 7C
[00Ah 0010 6] Oem ID : "BOCHS "
-[010h 0016 8] Oem Table ID : "BXPCAPIC"
+[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
Table tests/data/acpi/microvm/DSDT.pcie diff:
@@ -5,20 +5,20 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Tue Jan 19 00:03:13 2021
+ * Disassembly of /tmp/aml-16CGX0, Tue Jan 19 00:03:13 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00000BD7 (3031)
* Revision 0x02
- * Checksum 0x99
+ * Checksum 0x48
* OEM ID "BOCHS "
- * OEM Table ID "BXPCDSDT"
+ * OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
-DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (_SB)
{
Signed-off-by: Marian Postevca <posteuca@mutex.one>
Message-Id: <20210119003216.17637-4-posteuca@mutex.one>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
|
Marian Postevca
|
99f84ac051 |
tests/acpi: allow updates for expected data files
Signed-off-by: Marian Postevca <posteuca@mutex.one> Message-Id: <20210119003216.17637-2-posteuca@mutex.one> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
|
|
Peter Maydell
|
7bbb12f305 |
tests/qtest/cmsdk-apb-watchdog-test: Test clock changes
Now that the CMSDK APB watchdog uses its Clock input, it will correctly respond when the system clock frequency is changed using the RCC register on in the Stellaris board system registers. Test that when the RCC register is written it causes the watchdog timer to change speed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-22-peter.maydell@linaro.org Message-id: 20210121190622.22000-22-peter.maydell@linaro.org |
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Peter Maydell
|
9bc064b539 |
tests: Add a simple test of the CMSDK APB dual timer
Add a simple test of the CMSDK dual timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Message-id: 20210128114145.20536-6-peter.maydell@linaro.org Message-id: 20210121190622.22000-6-peter.maydell@linaro.org |
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Peter Maydell
|
9cf5eb29b2 |
tests: Add a simple test of the CMSDK APB watchdog
Add a simple test of the CMSDK watchdog, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-5-peter.maydell@linaro.org Message-id: 20210121190622.22000-5-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
|
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Peter Maydell
|
30858dafd1 |
tests: Add a simple test of the CMSDK APB timer
Add a simple test of the CMSDK APB timer, since we're about to do some refactoring of how it is clocked. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-4-peter.maydell@linaro.org Message-id: 20210121190622.22000-4-peter.maydell@linaro.org |
|
|
Mihai Carabas
|
c0f82826a1 |
tests/qtest: add a test case for pvpanic-pci
Add a test case for pvpanic-pci device. The scenario is the same as pvpanic ISA device, but is using the PCI bus. Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> [PMM: added code to free dev and pcibus, which the oss-fuzz build otherwise complains about as a leak] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Mihai Carabas
|
677726ef1e |
hw/misc/pvpanic: split-out generic and bus dependent code
To ease the PCI device addition in next patches, split the code as follows: - generic code (read/write/setup) is being kept in pvpanic.c - ISA dependent code moved to pvpanic-isa.c Also, rename: - ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE. - TYPE_PVPANIC -> TYPE_PVPANIC_ISA. - MemoryRegion io -> mr. - pvpanic_ioport_* in pvpanic_*. Update the build system with the new files and config structure. Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Hao Wu
|
1e5ce6e10a |
hw/misc: Fix arith overflow in NPCM7XX PWM module
Fix potential overflow problem when calculating pwm_duty. 1. Ensure p->cmr and p->cnr to be from [0,65535], according to the hardware specification. 2. Changed duty to uint32_t. However, since MAX_DUTY * (p->cmr+1) can excceed UINT32_MAX, we convert them to uint64_t in computation and converted them back to uint32_t. (duty is guaranteed to be <= MAX_DUTY so it won't overflow.) Fixes: CID 1442342 Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Doug Evans <dje@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210127011142.2122790-1-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Paolo Bonzini
|
7848023ae4 |
arm: rename xlnx-zcu102.canbusN properties
The properties to attach a CANBUS object to the xlnx-zcu102 machine have a period in them. We want to use periods in properties for compound QAPI types, and besides the "xlnx-zcu102." prefix is both unnecessary and different from any other machine property name. Remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20210118162537.779542-1-pbonzini@redhat.com Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
|
0bcd12fb15 |
Block layer patches:
- Fix crash on write to read-only devices - iotests: Rewrite 'check' in Python, get rid of 'groups' and allow non-numeric test case names -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmARxVARHGt3b2xmQHJl ZGhhdC5jb20ACgkQfwmycsiPL9ZxrA//TAulJrmJ0T+h/782HRzA8St+Yuzkbdhh 96xuxqG+flhiRi1gq2LOiOUnIzYGgG0x2bI1INZku3AsqNp2BG02DtX95jdxpPkg 8Yr/PGAZ1Z+/fdajphcAVujR8A9tDrfj4wNXHOfN5cPoIXobNQGwMHX4+fDWJ3yf sbeihc70JmjQ3V6Psau2YAVLCESRLfPkG571YYiNu1DmBVI5n0xgMUD4Oc6hzIPR igJ6K5EO+uacrY1b6j5WsTIn7+mmUD8EC6njNZrYcF3aq8/SsCIaLqV/+6LN589e KdvysjU3EtRbeln2Zk83m4YTL48Cpz967aCbfD908lRmsq0tu+X0LrAQoa9Y7+0x DHS7jkUAG2LOppVrSFKUSt6QxOz08z8qqCBZutdMEBTJtfiq04I/EJhdv4HqLjD8 4dE9PQITAILO2NzfbWS+vVhHOgoyIuSu4QtC2Nw6ztUiGrtqkbRRkfPLmEv3vrxn daA/yHgyJFwyKPtiubKqk20LZb/5txJKXCPpo18MVIs9r70NcqfRT6J1XVqApFQA aXPhEsBNZ/p0gCBiej98ukCb15rOqlSk7iVlSV3kIPtp/Nk5kDqC3XV48Uy+GtXW shSM4QZxoE6CoKPGkB5hWyMAAvYwyJRRJAPy7w/Rcqd3vTsfgwX7Ad0bBVQe0kpo +pMOKs0/Yk8= =gFsg -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging Block layer patches: - Fix crash on write to read-only devices - iotests: Rewrite 'check' in Python, get rid of 'groups' and allow non-numeric test case names # gpg: Signature made Wed 27 Jan 2021 19:56:00 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: iotests: rename and move 169 and 199 tests iotests: rewrite check into python iotests: add testrunner.py iotests: add testenv.py iotests: add findtests.py iotests: 146: drop extra whitespaces from .out file virtio-scsi-test: Test writing to scsi-cd device block: Separate blk_is_writable() and blk_supports_write_perm() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
|
|
Kevin Wolf
|
720d10d67b |
virtio-scsi-test: Test writing to scsi-cd device
This tests that trying to write to a (read-only) scsi-cd device backed by a read-write image file doesn't crash and results in the correct error. This is a regression test for https://bugs.launchpad.net/bugs/1906693. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210118123448.307825-3-kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> |
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|
Markus Armbruster
|
f8a9b4c665 |
libqtest: Rework qtest_rsp()
qtest_rsp() is used in two different ways: (1) return some arguments to caller, which the caller must free, and (2) return no arguments to caller. Passing non-zero @expected_args gets you (1), and passing zero gets you (2). Having "the return value must be freed" depend on an argument this way is less than ideal. Provide separate functions for the two ways: (1) qtest_rsp_args() takes @expected_args (possibly zero), and returns that number of arguments. Caller must free the return value always. (2) qtest_rsp() assumes zero, and returns nothing. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20210126151649.2220902-1-armbru@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Stefan Berger
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f8e3df09d2 |
tests: Fix memory leak in tpm-util.c
This patch fixes the following memory leak detected by asan:
Indirect leak of 560320 byte(s) in 136 object(s) allocated from:
#0 0x556b3b3f9b57 in calloc (/home/stefanb/tmp/qemu-tip/build/tests/qtest/tpm-crb-swtpm-test+0x23fb57)
#1 0x152b0e96b9b0 in g_malloc0 (/lib64/libglib-2.0.so.0+0x589b0)
#2 0x556b3b588f61 in parse_object /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:318:12
#3 0x556b3b588f61 in parse_value /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:546:16
#4 0x556b3b5886e8 in json_parser_parse /home/stefanb/tmp/qemu-tip/build/../qobject/json-parser.c:580:14
#5 0x556b3b52ff4a in json_message_process_token /home/stefanb/tmp/qemu-tip/build/../qobject/json-streamer.c:92:12
#6 0x556b3b59896f in json_lexer_feed_char /home/stefanb/tmp/qemu-tip/build/../qobject/json-lexer.c:313:13
#7 0x556b3b598443 in json_lexer_feed /home/stefanb/tmp/qemu-tip/build/../qobject/json-lexer.c:350:9
#8 0x556b3b436c70 in qmp_fd_receive /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:614:9
#9 0x556b3b435871 in qtest_qmp_receive_dict /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:636:12
#10 0x556b3b435871 in qtest_qmp_receive /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:624:27
#11 0x556b3b435c59 in qtest_vqmp /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:715:12
#12 0x556b3b435c59 in qtest_qmp /home/stefanb/tmp/qemu-tip/build/../tests/qtest/libqtest.c:756:16
#13 0x556b3b4328c7 in tpm_util_wait_for_migration_complete /home/stefanb/tmp/qemu-tip/build/../tests/qtest/tpm-util.c:245:15
#14 0x556b3b4333be in tpm_test_swtpm_migration_test /home/stefanb/tmp/qemu-tip/build/../tests/qtest/tpm-tests.c:117:5
#15 0x152b0e98e29d (/lib64/libglib-2.0.so.0+0x7b29d)
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210115204637.3332555-1-stefanb@linux.vnet.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Gan Qixin
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3e829c0468 |
qtest/npcm7xx_pwm-test: Fix memleak in pwm_qom_get
The pwm_qom_get function didn't free "response", which caused an indirect
memory leak. So use qobject_unref() to fix it.
ASAN shows memory leak stack:
Indirect leak of 74160000 byte(s) in 18000 object(s) allocated from:
#0 0x7f96e2f79d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f96e2d98a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x556313112180 in qdict_new ../qobject/qdict.c:30
#3 0x556313115bca in parse_object ../qobject/json-parser.c:318
#4 0x556313117810 in parse_value ../qobject/json-parser.c:546
#5 0x556313117bda in json_parser_parse ../qobject/json-parser.c:580
#6 0x55631310fe67 in json_message_process_token ../qobject/json-streamer.c:92
#7 0x5563131210b7 in json_lexer_feed_char ../qobject/json-lexer.c:313
#8 0x556313121662 in json_lexer_feed ../qobject/json-lexer.c:350
#9 0x5563131101e9 in json_message_parser_feed ../qobject/json-streamer.c:121
#10 0x5563130cb81e in qmp_fd_receive ../tests/qtest/libqtest.c:614
#11 0x5563130cba2b in qtest_qmp_receive_dict ../tests/qtest/libqtest.c:636
#12 0x5563130cb939 in qtest_qmp_receive ../tests/qtest/libqtest.c:624
#13 0x5563130cbe0d in qtest_vqmp ../tests/qtest/libqtest.c:715
#14 0x5563130cc40f in qtest_qmp ../tests/qtest/libqtest.c:756
#15 0x5563130c5623 in pwm_qom_get ../tests/qtest/npcm7xx_pwm-test.c:180
#16 0x5563130c595e in pwm_get_duty ../tests/qtest/npcm7xx_pwm-test.c:210
#17 0x5563130c7529 in test_toggle ../tests/qtest/npcm7xx_pwm-test.c:447
Reported-by: Euler Robot <euler.robot@huawei.com>
Message-Id: <20210115075634.717909-1-ganqixin@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Jiaxun Yang
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d2c4f3841d |
tests: Rename PAGE_SIZE definitions
As per POSIX specification of limits.h [1], OS libc may define PAGE_SIZE in limits.h. Self defined PAGE_SIZE is frequently used in tests, to prevent collosion of definition, we give PAGE_SIZE definitons reasonable prefixs. [1]: https://pubs.opengroup.org/onlinepubs/7908799/xsh/limits.h.html Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210118063808.12471-7-jiaxun.yang@flygoat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Gan Qixin
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73624e04a5 |
npcm7xx_adc-test: Fix memleak in adc_qom_set
The adc_qom_set function didn't free "response", which caused an indirect
memory leak. So use qobject_unref() to fix it.
ASAN shows memory leak stack:
Indirect leak of 593280 byte(s) in 144 object(s) allocated from:
#0 0x7f9a5e7e8d4e in __interceptor_calloc (/lib64/libasan.so.5+0x112d4e)
#1 0x7f9a5e607a50 in g_malloc0 (/lib64/libglib-2.0.so.0+0x55a50)
#2 0x55b1bebf636b in qdict_new ../qobject/qdict.c:30
#3 0x55b1bec09699 in parse_object ../qobject/json-parser.c:318
#4 0x55b1bec0b2df in parse_value ../qobject/json-parser.c:546
#5 0x55b1bec0b6a9 in json_parser_parse ../qobject/json-parser.c:580
#6 0x55b1bec060d1 in json_message_process_token ../qobject/json-streamer.c:92
#7 0x55b1bec16a12 in json_lexer_feed_char ../qobject/json-lexer.c:313
#8 0x55b1bec16fbd in json_lexer_feed ../qobject/json-lexer.c:350
#9 0x55b1bec06453 in json_message_parser_feed ../qobject/json-streamer.c:121
#10 0x55b1bebc2d51 in qmp_fd_receive ../tests/qtest/libqtest.c:614
#11 0x55b1bebc2f5e in qtest_qmp_receive_dict ../tests/qtest/libqtest.c:636
#12 0x55b1bebc2e6c in qtest_qmp_receive ../tests/qtest/libqtest.c:624
#13 0x55b1bebc3340 in qtest_vqmp ../tests/qtest/libqtest.c:715
#14 0x55b1bebc3942 in qtest_qmp ../tests/qtest/libqtest.c:756
#15 0x55b1bebbd64a in adc_qom_set ../tests/qtest/npcm7xx_adc-test.c:127
#16 0x55b1bebbd793 in adc_write_input ../tests/qtest/npcm7xx_adc-test.c:140
#17 0x55b1bebbdf92 in test_convert_external ../tests/qtest/npcm7xx_adc-test.c:246
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210118065627.79903-1-ganqixin@huawei.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Richard Henderson
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eb94284d08 |
target/arm: Add cpu properties to control pauth
The crypto overhead of emulating pauth can be significant for some workloads. Add two boolean properties that allows the feature to be turned off, on with the architected algorithm, or on with an implementation defined algorithm. We need two intermediate booleans to control the state while parsing properties lest we clobber ID_AA64ISAR1 into an invalid intermediate state. Tested-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210111235740.462469-3-richard.henderson@linaro.org [PMM: fixed docs typo, tweaked text to clarify that the impdef algorithm is specific to QEMU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Peter Maydell
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e0cbcf1eea |
pc,pci,virtio: fixes, features
Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmAEIzcPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRpKrcIALB4vyMrgBYtgirTfqYiOD6b4pFRo7oDrX+r lYCoOwzqFj/2iF6ccIZk3aamCu4bYeSt2xfW4bdldVcv6TjvEgXkWmJpEQxWMCUq gVdwa0afSzM8jqvN1HYhwhEZxGdZtdB+zzciZwYeYp56Vbf6nJsN6wkQ0ApA6yzf yJrSqUpIBHyU44Crfp5uhqIBTEK7fKurwAY7pmi5Ty/bZeiqCMa4Tt29K3btB+of XwqVjCqmvo9UJqvkCkOOtD2HJVkzOBbVzYPQBAn7gvNhkYV1esXYv46kGRJLVRyh Y2sPf7LexVxJdi+ZJf4iA9elvr8bE/EYnj7naPidVPW9VgINXog= =nQMo -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: fixes, features Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 17 Jan 2021 11:44:55 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Update _DSM method in expected files acpi: Enable pxb unit-test for ARM virt machine Kconfig: Compile PXB for ARM_VIRT acpi/gpex: Exclude pxb's resources from PCI0 acpi/gpex: Inform os to keep firmware resource map acpi: Add addr offset in build_crs acpi: Fix unmatched expected DSDT.pxb file acpi: Allow DSDT acpi table changes vhost-user-fs: add the "bootindex" property pci/shpc: don't push attention button when ejecting powered-off device Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Jiahui Cen
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ccee1a8140 |
acpi: Update _DSM method in expected files
A new _DSM #5 method is added. Update expected DSDT files accordingly, and re-enable their testing. Full diff of changed files disassembly: tests/data/acpi/microvm/DSDT.pcie.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00000BCF (3023) + * Length 0x00000BD7 (3031) * Revision 0x02 - * Checksum 0x29 + * Checksum 0x99 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1302,9 +1302,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000144C (5196) + * Length 0x00001454 (5204) * Revision 0x02 - * Checksum 0xF0 + * Checksum 0x60 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1838,9 +1838,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.memhp.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000199D (6557) + * Length 0x000019A5 (6565) * Revision 0x02 - * Checksum 0x11 + * Checksum 0x90 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1840,9 +1840,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.numamem.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x0000144C (5196) + * Length 0x00001454 (5204) * Revision 0x02 - * Checksum 0xF0 + * Checksum 0x60 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1838,9 +1838,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) tests/data/acpi/virt/DSDT.pxb.dsl: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:39:35 2021 + * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:51:13 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00001DF9 (7673) + * Length 0x00001E09 (7689) * Revision 0x02 - * Checksum 0x42 + * Checksum 0x30 * OEM ID "BOCHS " * OEM Table ID "BXPCDSDT" * OEM Revision 0x00000001 (1) @@ -1810,9 +1810,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) @@ -3025,9 +3030,14 @@ { Return (Buffer (One) { - 0x01 // . + 0x21 // ! }) } + + If ((Arg2 == 0x05)) + { + Return (Zero) + } } Return (Buffer (One) Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-9-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jiahui Cen
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f698a88a77 |
acpi: Enable pxb unit-test for ARM virt machine
No matter whether the pxb is enabled or not, the CONFIG_PXB macro in test would keep undefined. And since pxb is now enabled for ARM Virt machine by default, let's enable pxb unit-test by removing the CONFIG_PXB. Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-8-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Jiahui Cen
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6f9ec653f3 |
acpi: Allow DSDT acpi table changes
Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-2-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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Peter Maydell
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6b63d12612 |
* UI configury cleanups and Meson conversion
* scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl/9yL8UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroOl8wgAjryxhmkNRYFDrhtLqB3OirurvQlS eZEwFIE88rcv6KvE2Acw+n+0cvk40mKVE5u265VjmKgItbEQKBsmA+vo9NVY+ZDT Yz5p27AzYUM/dNgtajcUzkainzcseYMCyoXV3+7+1X67i15gxJsa7/y0jAVRyrW/ z8RJOYQC1oP9dRbhH7Y5nw6XRLpB2+CEMX2nQ/g58bM/X/vNeNxhFKAZlnm6cy4q ClX8pZYewGg/w+LKNPCUZvnSyYeErdYqoX0bKZjawp71a8/6/Qth2NDU6r1VoaKa e3zF2XRdQcSPohGAwmmCMFV1rP7DplFcKO4bQ2Q0BuI5E79MykhQeLztLA== =yW7F -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * UI configury cleanups and Meson conversion * scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround # gpg: Signature made Tue 12 Jan 2021 16:05:19 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: target/i386: Use X86Seg enum for segment registers configure: quote command line arguments in config.status configure: move Cocoa incompatibility checks to Meson configure: move GTK+ detection to Meson configure: move X11 detection to Meson gtk: remove CONFIG_GTK_GL cocoa: do not enable coreaudio automatically virtio-scsi: trace events meson: Propagate gnutls dependency Docs/RCU: Correct sample code of qatomic_rcu_set scripts/gdb: implement 'qemu bt' scripts/gdb: fix 'qemu coroutine' when users selects a non topmost stack frame meson: fix Cocoa option in summary whpx: move whpx_lapic_state from header to c file maintainers: Add me as Windows Hosted Continuous Integration maintainer cirrus/msys2: Cache msys2 mingw in a better way. cirrus/msys2: Exit powershell with $LastExitCode whpx: move internal definitions to whpx-internal.h whpx: rename whp-dispatch to whpx-internal.h meson: do not use CONFIG_VIRTFS Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Hao Wu
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73314f1384 |
hw/misc: Add QTest for NPCM7XX PWM Module
We add a qtest for the PWM in the previous patch. It proves it works as expected. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210108190945.949196-6-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Hao Wu
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77c05b0b74 |
hw/adc: Add an ADC module for NPCM7XX
The ADC is part of NPCM7XX Module. Its behavior is controled by the ADC_CON register. It converts one of the eight analog inputs into a digital input and stores it in the ADC_DATA register when enabled. Users can alter input value by using qom-set QMP command. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-4-wuhaotsh@google.com [PMM: Added missing hw/adc/trace.h file] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Paolo Bonzini
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2c9dce0196 |
meson: do not use CONFIG_VIRTFS
CONFIG_VIRTFS is not anymore part of the config_host dictionary. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Alexander Bulekov
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b677001d70 |
fuzz: map all BARs and enable PCI devices
Prior to this patch, the fuzzer found inputs to map PCI device BARs and enable the device. While it is nice that the fuzzer can do this, it added significant overhead, since the fuzzer needs to map all the BARs (regenerating the memory topology), at the start of each input. With this patch, we do this once, before fuzzing, mitigating some of this overhead. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201221181203.1853-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Gan Qixin
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661465c2e0 |
qtest/libqtest: fix heap-buffer-overflow in qtest_cb_for_every_machine()
When the length of mname is less than 5, memcpy("xenfv", mname, 5) will cause
heap buffer overflow. Therefore, use strncmp to avoid this problem.
The asan showed stack:
ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60200000f2f4 at
pc 0x7f65d8cc2225 bp 0x7ffe93cc5a60 sp 0x7ffe93cc5208 READ of size 5 at
0x60200000f2f4 thread T0
#0 0x7f65d8cc2224 in memcmp (/lib64/libasan.so.5+0xdf224)
#1 0x5632c20be95b in qtest_cb_for_every_machine tests/qtest/libqtest.c:1282
#2 0x5632c20b7995 in main tests/qtest/test-hmp.c:160
#3 0x7f65d88fed42 in __libc_start_main (/lib64/libc.so.6+0x26d42)
#4 0x5632c20b72cd in _start (build/tests/qtest/test-hmp+0x542cd)
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Message-Id: <20210106050625.518041-1-ganqixin@huawei.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
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Peter Maydell
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3896895ab4 |
* Two fuzzer patches from Alexander
* Show logs of failed acceptance jobs in the gitlab-CI -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAl/gpV0RHHRodXRoQHJl ZGhhdC5jb20ACgkQLtnXdP5wLbUUmA//eGv+EL6Mqot42ZMuuwpDkoD4kg6yNX0m xUbvzWhWWlyIAEUZBoHb4s8vpZRuS0Zo/aGt9q3oCBdomiU72ageTT6urrbRSdH+ X5WdBpVgudKePBBvS8AtsDHkC346nZqZYop67QFiwAYScaZMXtcblIosJm7n+ogJ UwQjzPEsIzG3dX8eaMQVTnTpKlaiXQDnOEy59vOnNMpM0f7hsG7FxNYtOByvkMzS zp5ntO+ZqbP804xR15exUIISqvJQKYLdEaKkBOH99LVxyvz43oBknh/kpUrtcSam aNC5tbY3Z7WrkXwOBvAWT6my6GW9aeIGm5xu3U8wFlDS7+2bCrwxqhVxRqZWqKCd 0D+xiXsCiVmloAyWfGDqA3vqQzTPgyvwnGyrgU4R8uu4RgzvmD4dGjZhVFkWhWu1 hQXZh1JhbzjiFuIufF9x2Ccq0MQSuU2puH8scqYFKf/W1eEYoeVqFd+uEw2Dm5cg hTQQEn2pT6y6EA4x6uvKXEeF3B+N3HCYuufOYqsFerL0p5wfWGvUWnxR3f1oqtQY RmejgmaNX+Os/t0HPIR9vf5x6VIZVY5M+GsThcPFyKI5vWa5vfVokOYOQcov2COT 5hgm24L2eW3yHgcQ/Rq3bTxG7ZMaXaCWzbUJgkG/IAmsmCEY/j3TnM42BqGoPlG8 DGbWZ4cNIc4= =lmIG -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-12-21' into staging * Two fuzzer patches from Alexander * Show logs of failed acceptance jobs in the gitlab-CI # gpg: Signature made Mon 21 Dec 2020 13:38:37 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-12-21: gitlab-ci: Archive logs of acceptance tests gitlab-ci: Refactor code that show logs of failed acceptances tests/acceptance: Bump avocado requirements to 83.0 fuzz: fix the generic-fuzz-floppy config fuzz: Add more i386 configurations for fuzzing Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Markus Armbruster
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eab3a4678b |
qobject: Change qobject_to_json()'s value to GString
qobject_to_json() and qobject_to_json_pretty() build a GString, then covert it to QString. Just one of the callers actually needs a QString: qemu_rbd_parse_filename(). A few others need a string they can modify: qmp_send_response(), qga's send_response(), to_json_str(), and qmp_fd_vsend_fds(). The remainder just need a string. Change qobject_to_json() and qobject_to_json_pretty() to return the GString. qemu_rbd_parse_filename() now has to convert to QString. All others save a QString temporary. to_json_str() actually becomes a bit simpler, because GString provides more convenient modification functions. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-6-armbru@redhat.com> |
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Markus Armbruster
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6589f45991 |
qobject: Make qobject_to_json_pretty() take a pretty argument
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-4-armbru@redhat.com> |
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Alexander Bulekov
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d61368d1e9 |
fuzz: fix the generic-fuzz-floppy config
On the pc-i440fx machine, the floppy drive relies on the i8257 DMA controller. Add this device to the floppy fuzzer config, and silence the warning about a missing format specifier for the null-co:// drive. Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201216203328.41112-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Alexander Bulekov
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cbe945c74c |
fuzz: Add more i386 configurations for fuzzing
This adds configurations for fuzzing the following devices on oss-fuzz: * vmxnet3 CC: Dmitry Fleytman <dmitry.fleytman@gmail.com> * ne2k * pcnet * rtl8139 CC: Jason Wang <jasowang@redhat.com> * eepro100 CC: Stefan Weil <sw@weilnetz.de> * sdhci CC: Philippe Mathieu-Daudé <f4bug@amsat.org> * ehci * ohci * ac97 * cs4231a * es1370 * sb16 CC: Gerd Hoffmann <kraxel@redhat.com> * megasas CC: Hannes Reinecke <hare@suse.com> * parallel CC: Michael S. Tsirkin <mst@redhat.com> CC: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20201123184352.242907-1-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com> |
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Paolo Bonzini
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4bfb024bc7 |
memory: clamp cached translation in case it points to an MMIO region
In using the address_space_translate_internal API, address_space_cache_init
forgot one piece of advice that can be found in the code for
address_space_translate_internal:
/* MMIO registers can be expected to perform full-width accesses based only
* on their address, without considering adjacent registers that could
* decode to completely different MemoryRegions. When such registers
* exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
* regions overlap wildly. For this reason we cannot clamp the accesses
* here.
*
* If the length is small (as is the case for address_space_ldl/stl),
* everything works fine. If the incoming length is large, however,
* the caller really has to do the clamping through memory_access_size.
*/
address_space_cache_init is exactly one such case where "the incoming length
is large", therefore we need to clamp the resulting length---not to
memory_access_size though, since we are not doing an access yet, but to
the size of the resulting section. This ensures that subsequent accesses
to the cached MemoryRegionSection will be in range.
With this patch, the enclosed testcase notices that the used ring does
not fit into the MSI-X table and prints a "qemu-system-x86_64: Cannot map used"
error.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Alejandro Jimenez
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c9ca89a907 |
qtest/pvpanic: Test panic option that allows VM to continue
Test the scenario where the -action panic=none parameter is used to signal that the VM must continue executing after a guest panic occurs. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Message-Id: <1607705564-26264-5-git-send-email-alejandro.j.jimenez@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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164dafd174 |
remove preconfig state
The preconfig state is only used if -incoming is not specified, which makes the RunState state machine more tricky than it need be. However there is already an equivalent condition which works even with -incoming, namely qdev_hotplug. Use it instead of a separate runstate. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Peter Maydell
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b785d25e91 |
* Fix for NULL segments (Bin Meng)
* Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl/SWS4UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMHLAf8Cr1nOn1ou2S2H9vePeoqRAVGdQBv tbQ/nZs+2NZMyhLF7mBj7y6Ym0wNyXzkyiFnN1wR04V5e0tF+q1Y0OOZtihJ+Ntk esjzHAzdqS22xI2dNnNDBo69eQQKDq3C0Ug5x6z63tO81AoTNKP+vq+QbZqe7v7K 2TScroAnhX9zE5Hz1+qJ35w13EMCNFnUPHNcOwxVSGHj4HNoEpIjjcE6rme46jX+ REsEGKJKIJ88aV2hzOLSrdJ0/mNuWsjfOvcfgtoIYUPbb55hHMykqD+LapoyEp8K gjnco6JT6wWFN1+tVxTjY4TaERVw+NGomd2QyHSbanDoRd8igFhxu2gBnQ== =yeQi -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * Fix for NULL segments (Bin Meng) * Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) # gpg: Signature made Thu 10 Dec 2020 17:21:50 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (113 commits) scripts: kernel-doc: remove unnecessary change wrt Linux Revert "docs: temporarily disable the kernel-doc extension" scripts: kernel-doc: use :c:union when needed scripts: kernel-doc: split typedef complex regex scripts: kernel-doc: fix typedef parsing Revert "kernel-doc: Handle function typedefs that return pointers" Revert "kernel-doc: Handle function typedefs without asterisks" scripts: kernel-doc: try to use c:function if possible scripts: kernel-doc: fix line number handling scripts: kernel-doc: allow passing desired Sphinx C domain dialect scripts: kernel-doc: don't mangle with parameter list scripts: kernel-doc: fix typedef identification scripts: kernel-doc: reimplement -nofunction argument scripts: kernel-doc: fix troubles with line counts scripts: kernel-doc: use a less pedantic markup for funcs on Sphinx 3.x scripts: kernel-doc: make it more compatible with Sphinx 3.x Revert "kernel-doc: Use c:struct for Sphinx 3.0 and later" Revert "scripts/kerneldoc: For Sphinx 3 use c:macro for macros with arguments" scripts: kernel-doc: add support for typedef enum kernel-doc: add support for ____cacheline_aligned attribute ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Paolo Bonzini
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2c65db5e58 |
vl: extract softmmu/datadir.c
Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Paolo Bonzini
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991c180d74 |
treewide: do not use short-form boolean options
They are going to be deprecated, avoid warnings on stdout while the tests run. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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Peter Maydell
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2ecfc0657a |
Miscellaneous patches for 2020-12-10
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAl/SSicSHGFybWJydUBy
ZWRoYXQuY29tAAoJEDhwtADrkYZT97QP/2unFyNgKUXpqYAvjYiTlBS/GLq8nigB
y2ylZ2miJ/YiWDo2xUzfAUc50mTxGGGnXIfrpc3ZDdxwTp0uLy/DxT7u/F7eQWVG
OaDKs2mVRy2WPxJaqj08ELSP6r095yjYR5HkXWCL/3yo0un1tlg+SlxtmnpY+c5Y
W6grjFhCtdn0j3olm2rdsJdzJImOS/00dDhSej75vQvplPCLkXFnf/lvX8QqQl3P
kPxejAjlok1KAHXG9pK2yhxottRvSs7ilLYY50GBDW9RcHvsgpijALKWmZ4AbrMb
AF25dSYZPOF39z9W3bCkgiP8fCGSDMH6qi21eZe5t9q8B3YwFsBbIU6VJsbOhpgU
fm5tp2LN8YJs5833bTg55kYDUgV2QYpr/5/E4GoA/5TP5BvutA9I44sr6yCUX3Gh
ININ/OWZO+/55lXBHiJGflsVpX0fXW7eMzfcMYpQaptJ+I5aWWMXinBXjUEGWkpi
6K6/jYAetjCrESkKhKWOUYgNKNiyTr41DnCWYDpH+1/UZWhQd4alVdW2rmZXksaM
+klQtc0RGKLccyemh7Ae7U/dpp7jJlbFyTRm1zV310FWBUysf+6K72J6Ixg5ZrgJ
K3crR4BsJ0xnibbFesctT+ssxpuJr9I1WxwQ6CuDQZXmgGEpaTpXqBtrw6zqTDhr
OmWHUvtEEqBf
=hp9K
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-12-10' into staging
Miscellaneous patches for 2020-12-10
# gpg: Signature made Thu 10 Dec 2020 16:17:43 GMT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2020-12-10:
docs/devel/writing-qmp-commands.txt: Fix docs
qapi: Normalize version references x.y.0 to just x.y
Tweak a few "Parameter 'NAME' expects THING" error message
qom: Improve {qom,device}-list-properties error messages
qga: Tweak a guest-shutdown error message
qga: Replace an unreachable error by abort()
ui: Tweak a client_migrate_info error message
ui: Improve a client_migrate_info error message
ui: Improve some set_passwd, expire_password error messages
block: Improve some block-commit, block-stream error messages
qerror: Eliminate QERR_ macros used in just one place
qerror: Drop unused QERR_ macros
Clean up includes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Markus Armbruster
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4bd802b209 |
Clean up includes
Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes, with the changes
to the following files manually reverted:
contrib/libvhost-user/libvhost-user-glib.h
contrib/libvhost-user/libvhost-user.c
contrib/libvhost-user/libvhost-user.h
contrib/plugins/hotblocks.c
contrib/plugins/hotpages.c
contrib/plugins/howvec.c
contrib/plugins/lockstep.c
linux-user/mips64/cpu_loop.c
linux-user/mips64/signal.c
linux-user/sparc64/cpu_loop.c
linux-user/sparc64/signal.c
linux-user/x86_64/cpu_loop.c
linux-user/x86_64/signal.c
target/s390x/gen-features.c
tests/fp/platform.h
tests/migration/s390x/a-b-bios.c
tests/plugin/bb.c
tests/plugin/empty.c
tests/plugin/insn.c
tests/plugin/mem.c
tests/test-rcu-simpleq.c
tests/test-rcu-slist.c
tests/test-rcu-tailq.c
tests/uefi-test-tools/UefiTestToolsPkg/BiosTablesTest/BiosTablesTest.c
contrib/plugins/, tests/plugin/, and tests/test-rcu-slist.c appear not
to include osdep.h intentionally. The remaining reverts are the same
as in commit
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Peter Maydell
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379e9eaed4 |
Aspeed patches :
* New device model for EMC1413/EMC1414 temperature sensors (I2C)
* New g220a-bmc Aspeed machine
* couple of Aspeed cleanups
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAl/SDVIACgkQUaNDx8/7
7KFF3BAAvYPgi/XJN0caP0qbxZy7GvBA1nmINQq910d1ARz04Vin8K6oj9x02taq
1MMhk9KryNRF1VuT98eya8u9htsg1OxrosqSAwjrtI72oSRWLGSl1Ww0sKIPcBET
OUq8pfAv+gW5lVWRkpnEA4Ly33PMTp5zfT3sy0riuSf+Z7Mg/8Lk28tNSOYu6hBl
LUZddcweMshishrJ46F1SSwWFfdZ2+5Y1eLSDRGwn8Ba5xy6SI3UDQVFze1vFmo3
h1Sd9s2tVJtJn4It2op41XKQX99uoGUy98CYVrbAd/1euZIm/6c4ju9upZiFUU/p
wm8I1njd5ybdPzRmJkJ8zQxsblgvw/Ua0YLmX/4aFsPUlKPyomOr++YMXcyrThEY
cxezJsSmj5f/oVaGRULbRVR8hhaM18RLBgwQAbfNSOTylmFa+URT6FLR4mnysfhz
zv76xt6S8BIS8CAgxqB13tj4tQPXUansQsuVTWwRwE8mHd5Vkhau2oOQR5n9cV+n
FNjvmqUN7ICtekmwMmBdNOI4yiGBY1ckcj/UoCzkuAYK444kzTqFfB4CZABNhs5f
/fjAsWAvYtqsLFUWCUnpHkxyq/8N0hpSZc0DI3FDPsup4/NlRG17p+DcrNqimwIE
SZ1I28YYdmoh1igMQK46x7UvvnceCCXkHAnR+nGix8jOpSCWLKs=
=abAb
-----END PGP SIGNATURE-----
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20201210' into staging
Aspeed patches :
* New device model for EMC1413/EMC1414 temperature sensors (I2C)
* New g220a-bmc Aspeed machine
* couple of Aspeed cleanups
# gpg: Signature made Thu 10 Dec 2020 11:58:10 GMT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20201210:
aspeed: g220a-bmc: Add an FRU
aspeed/smc: Add support for address lane disablement
ast2600: SRAM is 89KB
aspeed: Add support for the g220a-bmc board
hw/misc: add an EMC141{3,4} device model
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Peter Maydell
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00ef48ff0d |
microvm: add support for second ioapic
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCgAGBQJf0hD2AAoJEEy22O7T6HE4YR4QAKclgGrNwtnKaRRmkqzM1Neo R+vfbRlghZ5Uj7qt6i8B/WJ+BmDOOgOUXq+xUODPl7Bc03sBJBKoBJmjtbEKfQFu Vm1+gIrSEMsWT7t8KoHYj+piGJnUMu46G1iaQDURHVGTfRZoNyMHLw9+bTHLsznp jNAp5XnBgyFTvwn61whaXW57Zw3jm0OPtjxqd6PxCWgvLB7MEogO4P1+S8RpTWu3 8h2J2kLFDY3iPBeENrxq33Ui2/3yQV19iVke0KzOhu0ncQ6QEHaQeAxXuiZBfplW 8ZxxujbJnJgcsnZm6EOdDPlbqW/KkDtqztnz+B/yXrQU1R6esu535gtXFSyrGOVa n+EuVqDfTlfSUp4RVnk1qZqwC6Y/ZPyj940DGgWA1E+FNyjuuxkr+n72ZUzFkvT/ epWsIbStvSjV222wAQ9+f061wd9dqj58Nm/X4MEY+Omg+6Poq3CBafIKh7lTz6cr 4nMuqZ1MReONc52Cgz/6amo7wTJ8+wl68+WnxxXPqdoSz1y9NzqXbF/8bnEtUhMz UAtZHGAtVP+MiNJf3bpXMDwBVcDedyIT0Jied/NWJ3yv0+OcekGCBOc6+gJsSS61 mJc5t0kJim2dE0Vkzi5+95HeGyCPoPqdDf56gU123TJLJAOAw/htenVpMr+O9znV MfmgjNYMeDKDr9dyDdcN =u8Kq -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/microvm-20201210-pull-request' into staging microvm: add support for second ioapic # gpg: Signature made Thu 10 Dec 2020 12:13:42 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/microvm-20201210-pull-request: tests/acpi: disallow updates for expected data files tests/acpi: update expected data files tests/acpi: add ioapic2=on test for microvm tests/acpi: add data files for ioapic2 test variant tests/acpi: allow updates for expected data files microvm: add second ioapic microvm: drop microvm_gsi_handler() microvm: make pcie irq base runtime changeable microvm: make number of virtio transports runtime changeable x86: add support for second ioapic x86: rewrite gsi_handler() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Havard Skinnemoen
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1af979b492 |
tests/qtest/npcm7xx_rng-test: dump random data on failure
Dump the collected random data after a randomness test failure. Note that this relies on the test having called g_test_set_nonfatal_assertions() so we don't abort immediately on the assertion failure. Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: minor commit message tweak] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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Vikram Garhwal
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ab5e842c4b |
tests/qtest: Introduce tests for Xilinx ZynqMP CAN controller
The QTests perform five tests on the Xilinx ZynqMP CAN controller:
Tests the CAN controller in loopback, sleep and snoop mode.
Tests filtering of incoming CAN messages.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Signed-off-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-id: 1605728926-352690-4-git-send-email-fnu.vikram@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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John Wang
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5e623f2bf1 |
hw/misc: add an EMC141{3,4} device model
Largely inspired by the TMP421 temperature sensor, here is a model for the EMC1413/EMC1414 temperature sensors. Specs can be found here : http://ww1.microchip.com/downloads/en/DeviceDoc/20005274A.pdf Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20201122105134.671-1-wangzhiqiang.bj@bytedance.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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Gerd Hoffmann
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08af4e13f8 |
tests/acpi: disallow updates for expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-13-kraxel@redhat.com |
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Gerd Hoffmann
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38ee397f3f |
tests/acpi: add ioapic2=on test for microvm
APIC table changes:
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
+[040h 0064 1] Subtable Type : 01 [I/O APIC]
+[041h 0065 1] Length : 0C
+[042h 0066 1] I/O Apic ID : 01
+[043h 0067 1] Reserved : 00
+[044h 0068 4] Address : FEC10000
+[048h 0072 4] Interrupt : 00000018
DSDT table changes:
- Device (VR07)
+ Device (VR23)
{
Name (_HID, "LNRO0005") // _HID: Hardware ID
- Name (_UID, 0x07) // _UID: Unique ID
+ Name (_UID, 0x17) // _UID: Unique ID
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
- 0xFEB00E00, // Address Base
+ 0xFEB02E00, // Address Base
0x00000200, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
- 0x00000017,
+ 0x0000002F,
}
})
}
}
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Sergio Lopez <slp@redhat.com>
Message-id: 20201203105423.10431-11-kraxel@redhat.com
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Gerd Hoffmann
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cdecc3d39a |
tests/acpi: allow updates for expected data files
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-9-kraxel@redhat.com |
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Gerd Hoffmann
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4d01b8994c |
microvm: add second ioapic
Create second ioapic, route virtio-mmio IRQs to it, allow more virtio-mmio devices (24 instead of 8). Needs ACPI, enabled by default, can be turned off using -machine ioapic2=off Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-8-kraxel@redhat.com |
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Peter Maydell
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5e7b204dbf |
pc,pci,virtio: fixes, cleanups
Lots of fixes, cleanups. CPU hot-unplug improvements. A new AER property for virtio devices, adding a dummy AER capability. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAl/REawPHG1zdEByZWRo YXQuY29tAAoJECgfDbjSjVRp2MQIALsT4+JQRvo3YR0L3hpVFzRU4cMwVYryqe2/ RRWggBI4OB3kiQT2YD4lElXmZnTTG5p5B69P+DE5Wj5faTQoIQdWZjDS9pO+tI+p gVNKgaN7ByKz5PUQNhhGKUfQ4F6x5yDePWlWGJZAmExEysAuC/nmCe5Lo1PrDzEV t0H/TmCNxAb4HsT9LG1pogTM/lpXDsjlVG/Mryh2XNe7z6c0ZyGo1WMI59RFVGId 9EpOV1OXWVHgkSWD6Rn7mqNq7zASS2Du/osHcQ6C51L/UE+pZPJW7gDqDRudItBR XXteNAeLXo5NdGJsTdVuHfy+Z0fJdHny9jLHMO2FkhV1wzYgJSM= =LaYX -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,pci,virtio: fixes, cleanups Lots of fixes, cleanups. CPU hot-unplug improvements. A new AER property for virtio devices, adding a dummy AER capability. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 09 Dec 2020 18:04:28 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (65 commits) hw/virtio-pci Added AER capability. hw/virtio-pci Added counter for pcie capabilities offsets. pcie_aer: Fix help message of pcie_aer_inject_error command x86: ich9: let firmware negotiate 'CPU hot-unplug with SMI' feature x86: ich9: factor out "guest_cpu_hotplug_features" tests/acpi: update expected files x86: acpi: let the firmware handle pending "CPU remove" events in SMM tests/acpi: allow expected files change x86: acpi: introduce AcpiPmInfo::smi_on_cpu_unplug acpi: cpuhp: introduce 'firmware performs eject' status/control bits hw/i386/pc: add max combined fw size as machine configuration option block/export: avoid g_return_val_if() input validation contrib/vhost-user-input: avoid g_return_val_if() input validation contrib/vhost-user-gpu: avoid g_return_val_if() input validation contrib/vhost-user-blk: avoid g_return_val_if() input validation .gitlab-ci: add build-libvhost-user libvhost-user: add a simple link test without glib libvhost-user: make it a meson subproject libvhost-user: drop qemu/osdep.h dependency libvhost-user: remove qemu/compiler.h usage ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |