152 Commits

Author	SHA1	Message	Date
Le Tan	ed7b8fbcfb	intel-iommu: add supports for queued invalidation interface ... Add supports for queued invalidation interface, an expended invalidation interface with extended capabilities. Signed-off-by: Le Tan <tamlokveer@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>	2014-08-28 23:10:22 +02:00
Le Tan	1da12ec4c8	intel-iommu: introduce Intel IOMMU (VT-d) emulation ... Add support for emulating Intel IOMMU according to the VT-d specification for the q35 chipset machine. Implement the logics for DMAR (DMA remapping) without PASID support. The emulation supports register-based invalidation and primary fault logging. Signed-off-by: Le Tan <tamlokveer@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>	2014-08-28 23:10:22 +02:00