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tcg: access cpu->icount_decr.u16.high with atomics
Consistently access u16.high with atomics to avoid undefined behaviour in MTTCG. Note that icount_decr.u16.low is only used in icount mode, so regular accesses to it are OK. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <20181010144853.13005-2-cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -51,7 +51,7 @@ static void tcg_handle_interrupt(CPUState *cpu, int mask)
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if (!qemu_cpu_is_self(cpu)) {
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if (!qemu_cpu_is_self(cpu)) {
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qemu_cpu_kick(cpu);
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qemu_cpu_kick(cpu);
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} else {
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} else {
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cpu->icount_decr.u16.high = -1;
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atomic_set(&cpu->icount_decr.u16.high, -1);
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if (use_icount &&
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if (use_icount &&
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!cpu->can_do_io
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!cpu->can_do_io
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&& (mask & ~old_mask) != 0) {
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&& (mask & ~old_mask) != 0) {
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@ -2341,7 +2341,7 @@ void cpu_interrupt(CPUState *cpu, int mask)
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{
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{
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g_assert(qemu_mutex_iothread_locked());
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g_assert(qemu_mutex_iothread_locked());
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cpu->interrupt_request |= mask;
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cpu->interrupt_request |= mask;
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cpu->icount_decr.u16.high = -1;
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atomic_set(&cpu->icount_decr.u16.high, -1);
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}
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}
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/*
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/*
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@ -265,7 +265,7 @@ static void cpu_common_reset(CPUState *cpu)
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cpu->mem_io_pc = 0;
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cpu->mem_io_pc = 0;
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cpu->mem_io_vaddr = 0;
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cpu->mem_io_vaddr = 0;
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cpu->icount_extra = 0;
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cpu->icount_extra = 0;
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cpu->icount_decr.u32 = 0;
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atomic_set(&cpu->icount_decr.u32, 0);
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cpu->can_do_io = 1;
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cpu->can_do_io = 1;
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cpu->exception_index = -1;
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cpu->exception_index = -1;
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cpu->crash_occurred = false;
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cpu->crash_occurred = false;
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