target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64

Since helper_compute_fprf() works on float64 argument, rename it
to helper_compute_fprf_float64(). Also use a macro to generate
helper_compute_fprf_float64() so that float128 version of the same
helper can be introduced easily later.

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Bharata B Rao 2017-01-06 11:44:47 +05:30 committed by David Gibson
parent 5dc22bf581
commit ffc67420f9
3 changed files with 72 additions and 69 deletions

View File

@ -57,55 +57,58 @@ static inline int ppc_float64_get_unbiased_exp(float64 f)
return ((f >> 52) & 0x7FF) - 1023; return ((f >> 52) & 0x7FF) - 1023;
} }
void helper_compute_fprf(CPUPPCState *env, float64 arg) #define COMPUTE_FPRF(tp) \
{ void helper_compute_fprf_##tp(CPUPPCState *env, tp arg) \
int isneg; { \
int fprf; int isneg; \
int fprf; \
isneg = float64_is_neg(arg); \
if (unlikely(float64_is_any_nan(arg))) { isneg = tp##_is_neg(arg); \
if (float64_is_signaling_nan(arg, &env->fp_status)) { if (unlikely(tp##_is_any_nan(arg))) { \
/* Signaling NaN: flags are undefined */ if (tp##_is_signaling_nan(arg, &env->fp_status)) { \
fprf = 0x00; /* Signaling NaN: flags are undefined */ \
} else { fprf = 0x00; \
/* Quiet NaN */ } else { \
fprf = 0x11; /* Quiet NaN */ \
} fprf = 0x11; \
} else if (unlikely(float64_is_infinity(arg))) { } \
/* +/- infinity */ } else if (unlikely(tp##_is_infinity(arg))) { \
if (isneg) { /* +/- infinity */ \
fprf = 0x09; if (isneg) { \
} else { fprf = 0x09; \
fprf = 0x05; } else { \
} fprf = 0x05; \
} else { } \
if (float64_is_zero(arg)) { } else { \
/* +/- zero */ if (tp##_is_zero(arg)) { \
if (isneg) { /* +/- zero */ \
fprf = 0x12; if (isneg) { \
} else { fprf = 0x12; \
fprf = 0x02; } else { \
} fprf = 0x02; \
} else { } \
if (float64_is_zero_or_denormal(arg)) { } else { \
/* Denormalized numbers */ if (tp##_is_zero_or_denormal(arg)) { \
fprf = 0x10; /* Denormalized numbers */ \
} else { fprf = 0x10; \
/* Normalized numbers */ } else { \
fprf = 0x00; /* Normalized numbers */ \
} fprf = 0x00; \
if (isneg) { } \
fprf |= 0x08; if (isneg) { \
} else { fprf |= 0x08; \
fprf |= 0x04; } else { \
} fprf |= 0x04; \
} } \
} } \
/* We update FPSCR_FPRF */ } \
env->fpscr &= ~(0x1F << FPSCR_FPRF); /* We update FPSCR_FPRF */ \
env->fpscr |= fprf << FPSCR_FPRF; env->fpscr &= ~(0x1F << FPSCR_FPRF); \
env->fpscr |= fprf << FPSCR_FPRF; \
} }
COMPUTE_FPRF(float64)
/* Floating-point invalid operations exception */ /* Floating-point invalid operations exception */
static inline __attribute__((__always_inline__)) static inline __attribute__((__always_inline__))
uint64_t float_invalid_op_excp(CPUPPCState *env, int op, int set_fpcc) uint64_t float_invalid_op_excp(CPUPPCState *env, int op, int set_fpcc)
@ -1808,7 +1811,7 @@ void helper_##name(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
putVSR(xT(opcode), &xt, env); \ putVSR(xT(opcode), &xt, env); \
@ -1863,7 +1866,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
\ \
@ -1917,7 +1920,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
\ \
@ -1958,7 +1961,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
\ \
@ -2007,7 +2010,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
\ \
@ -2057,7 +2060,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
\ \
@ -2257,7 +2260,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
} \ } \
\ \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt_out.fld); \ helper_compute_fprf_float64(env, xt_out.fld); \
} \ } \
} \ } \
putVSR(xT(opcode), &xt_out, env); \ putVSR(xT(opcode), &xt_out, env); \
@ -2647,7 +2650,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.tfld = ttp##_snan_to_qnan(xt.tfld); \ xt.tfld = ttp##_snan_to_qnan(xt.tfld); \
} \ } \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, ttp##_to_float64(xt.tfld, \ helper_compute_fprf_float64(env, ttp##_to_float64(xt.tfld, \
&env->fp_status)); \ &env->fp_status)); \
} \ } \
} \ } \
@ -2758,7 +2761,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.tfld = helper_frsp(env, xt.tfld); \ xt.tfld = helper_frsp(env, xt.tfld); \
} \ } \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.tfld); \ helper_compute_fprf_float64(env, xt.tfld); \
} \ } \
} \ } \
\ \
@ -2814,7 +2817,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.fld = tp##_round_to_int(xb.fld, &env->fp_status); \ xt.fld = tp##_round_to_int(xb.fld, &env->fp_status); \
} \ } \
if (sfprf) { \ if (sfprf) { \
helper_compute_fprf(env, xt.fld); \ helper_compute_fprf_float64(env, xt.fld); \
} \ } \
} \ } \
\ \
@ -2854,7 +2857,7 @@ uint64_t helper_xsrsp(CPUPPCState *env, uint64_t xb)
uint64_t xt = helper_frsp(env, xb); uint64_t xt = helper_frsp(env, xb);
helper_compute_fprf(env, xt); helper_compute_fprf_float64(env, xt);
float_check_status(env); float_check_status(env);
return xt; return xt;
} }

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@ -56,7 +56,7 @@ DEF_HELPER_FLAGS_2(brinc, TCG_CALL_NO_RWG_SE, tl, tl, tl)
DEF_HELPER_1(float_check_status, void, env) DEF_HELPER_1(float_check_status, void, env)
DEF_HELPER_1(reset_fpstatus, void, env) DEF_HELPER_1(reset_fpstatus, void, env)
DEF_HELPER_2(compute_fprf, void, env, i64) DEF_HELPER_2(compute_fprf_float64, void, env, i64)
DEF_HELPER_3(store_fpscr, void, env, i64, i32) DEF_HELPER_3(store_fpscr, void, env, i64, i32)
DEF_HELPER_2(fpscr_clrbit, void, env, i32) DEF_HELPER_2(fpscr_clrbit, void, env, i32)
DEF_HELPER_2(fpscr_setbit, void, env, i32) DEF_HELPER_2(fpscr_setbit, void, env, i32)

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@ -9,9 +9,9 @@ static inline void gen_reset_fpstatus(void)
gen_helper_reset_fpstatus(cpu_env); gen_helper_reset_fpstatus(cpu_env);
} }
static inline void gen_compute_fprf(TCGv_i64 arg) static inline void gen_compute_fprf_float64(TCGv_i64 arg)
{ {
gen_helper_compute_fprf(cpu_env, arg); gen_helper_compute_fprf_float64(cpu_env, arg);
gen_helper_float_check_status(cpu_env); gen_helper_float_check_status(cpu_env);
} }
@ -47,7 +47,7 @@ static void gen_f##name(DisasContext *ctx) \
cpu_fpr[rD(ctx->opcode)]); \ cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (set_fprf) { \ if (set_fprf) { \
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \ if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \ gen_set_cr1_from_fpscr(ctx); \
@ -74,7 +74,7 @@ static void gen_f##name(DisasContext *ctx) \
cpu_fpr[rD(ctx->opcode)]); \ cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (set_fprf) { \ if (set_fprf) { \
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \ if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \ gen_set_cr1_from_fpscr(ctx); \
@ -100,7 +100,7 @@ static void gen_f##name(DisasContext *ctx) \
cpu_fpr[rD(ctx->opcode)]); \ cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (set_fprf) { \ if (set_fprf) { \
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \ if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \ gen_set_cr1_from_fpscr(ctx); \
@ -121,7 +121,7 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \ gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \ cpu_fpr[rB(ctx->opcode)]); \
if (set_fprf) { \ if (set_fprf) { \
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \ if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \ gen_set_cr1_from_fpscr(ctx); \
@ -139,7 +139,7 @@ static void gen_f##name(DisasContext *ctx) \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \ gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \ cpu_fpr[rB(ctx->opcode)]); \
if (set_fprf) { \ if (set_fprf) { \
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); \ gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \
} \ } \
if (unlikely(Rc(ctx->opcode) != 0)) { \ if (unlikely(Rc(ctx->opcode) != 0)) { \
gen_set_cr1_from_fpscr(ctx); \ gen_set_cr1_from_fpscr(ctx); \
@ -174,7 +174,7 @@ static void gen_frsqrtes(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]); cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]); cpu_fpr[rD(ctx->opcode)]);
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) { if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx); gen_set_cr1_from_fpscr(ctx);
} }
@ -196,7 +196,7 @@ static void gen_fsqrt(DisasContext *ctx)
gen_reset_fpstatus(); gen_reset_fpstatus();
gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env, gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]); cpu_fpr[rB(ctx->opcode)]);
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) { if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx); gen_set_cr1_from_fpscr(ctx);
} }
@ -213,7 +213,7 @@ static void gen_fsqrts(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]); cpu_fpr[rB(ctx->opcode)]);
gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rD(ctx->opcode)]); cpu_fpr[rD(ctx->opcode)]);
gen_compute_fprf(cpu_fpr[rD(ctx->opcode)]); gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]);
if (unlikely(Rc(ctx->opcode) != 0)) { if (unlikely(Rc(ctx->opcode) != 0)) {
gen_set_cr1_from_fpscr(ctx); gen_set_cr1_from_fpscr(ctx);
} }