From 7d7a21ba691d3f52fdcf123adf2b79f7ce88174d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Jun 2023 16:29:11 +0200 Subject: [PATCH 01/38] exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 'NEED_CPU_H' guard target-specific code; it is defined by meson altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H as COMPILING_PER_TARGET to clarify its meaning. Mechanical change running: $ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H) then manually add a /* COMPILING_PER_TARGET */ comment after the '#endif' when the block is large. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240322161439.6448-4-philmd@linaro.org> --- include/exec/cpu-defs.h | 2 +- include/exec/helper-head.h | 4 ++-- include/exec/memop.h | 4 ++-- include/exec/memory.h | 4 ++-- include/exec/tswap.h | 4 ++-- include/gdbstub/helpers.h | 2 +- include/hw/core/cpu.h | 4 ++-- include/qemu/osdep.h | 2 +- include/sysemu/hvf.h | 8 ++++---- include/sysemu/kvm.h | 6 +++--- include/sysemu/nvmm.h | 4 ++-- include/sysemu/whpx.h | 4 ++-- include/sysemu/xen.h | 4 ++-- meson.build | 4 ++-- scripts/analyze-inclusions | 6 +++--- target/arm/kvm-consts.h | 4 ++-- 16 files changed, 33 insertions(+), 33 deletions(-) diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 3915438b83..0dbef3010c 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -19,7 +19,7 @@ #ifndef CPU_DEFS_H #define CPU_DEFS_H -#ifndef NEED_CPU_H +#ifndef COMPILING_PER_TARGET #error cpu.h included from common code #endif diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index 28ceab0a46..5ef467a79d 100644 --- a/include/exec/helper-head.h +++ b/include/exec/helper-head.h @@ -43,7 +43,7 @@ #define dh_ctype_noreturn G_NORETURN void #define dh_ctype(t) dh_ctype_##t -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET # ifdef TARGET_LONG_BITS # if TARGET_LONG_BITS == 32 # define dh_alias_tl i32 @@ -54,7 +54,7 @@ # endif # endif # define dh_ctype_tl target_ulong -#endif +#endif /* COMPILING_PER_TARGET */ /* We can't use glue() here because it falls foul of C preprocessor recursive expansion rules. */ diff --git a/include/exec/memop.h b/include/exec/memop.h index a86dc6743a..06417ff361 100644 --- a/include/exec/memop.h +++ b/include/exec/memop.h @@ -35,7 +35,7 @@ typedef enum MemOp { MO_LE = 0, MO_BE = MO_BSWAP, #endif -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #if TARGET_BIG_ENDIAN MO_TE = MO_BE, #else @@ -135,7 +135,7 @@ typedef enum MemOp { MO_BESL = MO_BE | MO_SL, MO_BESQ = MO_BE | MO_SQ, -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET MO_TEUW = MO_TE | MO_UW, MO_TEUL = MO_TE | MO_UL, MO_TEUQ = MO_TE | MO_UQ, diff --git a/include/exec/memory.h b/include/exec/memory.h index dbb1bad72f..dadb5cd65a 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -3107,7 +3107,7 @@ address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, MemTxResult address_space_set(AddressSpace *as, hwaddr addr, uint8_t c, hwaddr len, MemTxAttrs attrs); -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET /* enum device_endian to MemOp. */ static inline MemOp devend_memop(enum device_endian end) { @@ -3125,7 +3125,7 @@ static inline MemOp devend_memop(enum device_endian end) return (end == non_host_endianness) ? MO_BSWAP : 0; #endif } -#endif +#endif /* COMPILING_PER_TARGET */ /* * Inhibit technologies that require discarding of pages in RAM blocks, e.g., diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 68944a880b..5089cd6a4c 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -15,11 +15,11 @@ * If we're in target-specific code, we can hard-code the swapping * condition, otherwise we have to do (slower) run-time checks. */ -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #define target_needs_bswap() (HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN) #else #define target_needs_bswap() (target_words_bigendian() != HOST_BIG_ENDIAN) -#endif +#endif /* COMPILING_PER_TARGET */ static inline uint16_t tswap16(uint16_t s) { diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index c573aef2dc..6b97610f48 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -12,7 +12,7 @@ #ifndef _GDBSTUB_HELPERS_H_ #define _GDBSTUB_HELPERS_H_ -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include "cpu.h" /* diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index ec14f74ce5..7f037b158e 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1182,7 +1182,7 @@ bool target_words_bigendian(void); const char *target_name(void); -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifndef CONFIG_USER_ONLY @@ -1197,7 +1197,7 @@ extern const VMStateDescription vmstate_cpu_common; } #endif /* !CONFIG_USER_ONLY */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #define UNASSIGNED_CPU_INDEX -1 #define UNASSIGNED_CLUSTER_INDEX -1 diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index c7053cdc2b..f61edcfdc2 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -32,7 +32,7 @@ #endif #include "config-host.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include CONFIG_TARGET #else #include "exec/poison.h" diff --git a/include/sysemu/hvf.h b/include/sysemu/hvf.h index 4a7c6af3a5..730f927f03 100644 --- a/include/sysemu/hvf.h +++ b/include/sysemu/hvf.h @@ -16,7 +16,7 @@ #include "qemu/accel.h" #include "qom/object.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include "cpu.h" #ifdef CONFIG_HVF @@ -26,7 +26,7 @@ extern bool hvf_allowed; #define hvf_enabled() 0 #endif /* !CONFIG_HVF */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #define TYPE_HVF_ACCEL ACCEL_CLASS_NAME("hvf") @@ -34,7 +34,7 @@ typedef struct HVFState HVFState; DECLARE_INSTANCE_CHECKER(HVFState, HVF_STATE, TYPE_HVF_ACCEL) -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET struct hvf_sw_breakpoint { vaddr pc; vaddr saved_insn; @@ -66,6 +66,6 @@ void hvf_arch_update_guest_debug(CPUState *cpu); * Return whether the guest supports debugging. */ bool hvf_arch_supports_guest_debug(void); -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #endif diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 47f9e8be1b..eaf801bc93 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -20,7 +20,7 @@ #include "qemu/accel.h" #include "qom/object.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET # ifdef CONFIG_KVM # include # define CONFIG_KVM_IS_POSSIBLE @@ -210,7 +210,7 @@ bool kvm_arm_supports_user_irq(void); int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); int kvm_on_sigbus(int code, void *addr); -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include "cpu.h" void kvm_flush_coalesced_mmio_buffer(void); @@ -435,7 +435,7 @@ void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len); int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, hwaddr *phys_addr); -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ void kvm_cpu_synchronize_state(CPUState *cpu); diff --git a/include/sysemu/nvmm.h b/include/sysemu/nvmm.h index be7bc9a62d..6971ddb3a5 100644 --- a/include/sysemu/nvmm.h +++ b/include/sysemu/nvmm.h @@ -12,7 +12,7 @@ #ifndef QEMU_NVMM_H #define QEMU_NVMM_H -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifdef CONFIG_NVMM @@ -24,6 +24,6 @@ int nvmm_enabled(void); #endif /* CONFIG_NVMM */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #endif /* QEMU_NVMM_H */ diff --git a/include/sysemu/whpx.h b/include/sysemu/whpx.h index 781ca5b2b6..00ff409b68 100644 --- a/include/sysemu/whpx.h +++ b/include/sysemu/whpx.h @@ -15,7 +15,7 @@ #ifndef QEMU_WHPX_H #define QEMU_WHPX_H -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifdef CONFIG_WHPX @@ -29,6 +29,6 @@ bool whpx_apic_in_platform(void); #endif /* CONFIG_WHPX */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #endif /* QEMU_WHPX_H */ diff --git a/include/sysemu/xen.h b/include/sysemu/xen.h index a9f591f26d..754ec2e6cb 100644 --- a/include/sysemu/xen.h +++ b/include/sysemu/xen.h @@ -16,13 +16,13 @@ #include "exec/cpu-common.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET # ifdef CONFIG_XEN # define CONFIG_XEN_IS_POSSIBLE # endif #else # define CONFIG_XEN_IS_POSSIBLE -#endif +#endif /* COMPILING_PER_TARGET */ #ifdef CONFIG_XEN_IS_POSSIBLE diff --git a/meson.build b/meson.build index 553b940999..96fdc6dfd2 100644 --- a/meson.build +++ b/meson.build @@ -3610,7 +3610,7 @@ foreach d, list : target_modules if target.endswith('-softmmu') config_target = config_target_mak[target] target_inc = [include_directories('target' / config_target['TARGET_BASE_ARCH'])] - c_args = ['-DNEED_CPU_H', + c_args = ['-DCOMPILING_PER_TARGET', '-DCONFIG_TARGET="@0@-config-target.h"'.format(target), '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)] target_module_ss = module_ss.apply(config_target, strict: false) @@ -3793,7 +3793,7 @@ foreach target : target_dirs target_base_arch = config_target['TARGET_BASE_ARCH'] arch_srcs = [config_target_h[target]] arch_deps = [] - c_args = ['-DNEED_CPU_H', + c_args = ['-DCOMPILING_PER_TARGET', '-DCONFIG_TARGET="@0@-config-target.h"'.format(target), '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)] link_args = emulator_link_args diff --git a/scripts/analyze-inclusions b/scripts/analyze-inclusions index 45c821de32..b6280f25c8 100644 --- a/scripts/analyze-inclusions +++ b/scripts/analyze-inclusions @@ -92,7 +92,7 @@ echo trace/generated-tracers.h: analyze -include ../include/qemu/osdep.h trace/generated-tracers.h echo target/i386/cpu.h: -analyze -DNEED_CPU_H -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../target/i386/cpu.h +analyze -DCOMPILING_PER_TARGET -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../target/i386/cpu.h -echo hw/hw.h + NEED_CPU_H: -analyze -DNEED_CPU_H -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../include/hw/hw.h +echo hw/hw.h + COMPILING_PER_TARGET: +analyze -DCOMPILING_PER_TARGET -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../include/hw/hw.h diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h index 7c6adc14f6..c44d23dbe7 100644 --- a/target/arm/kvm-consts.h +++ b/target/arm/kvm-consts.h @@ -14,13 +14,13 @@ #ifndef ARM_KVM_CONSTS_H #define ARM_KVM_CONSTS_H -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifdef CONFIG_KVM #include #include #define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(X != Y) #endif -#endif +#endif /* COMPILING_PER_TARGET */ #ifndef MISMATCH_CHECK #define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(0) From 51579d40f9c719361ec9355bb48386e5d3ce85c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 14 Sep 2023 21:40:07 +0200 Subject: [PATCH 02/38] exec: Reduce tlb_set_dirty() declaration scope MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit tlb_set_dirty() is only used in accel/tcg/cputlb.c, where it is defined. Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Harsh Prateek Bora Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-11-philmd@linaro.org> --- accel/stubs/tcg-stub.c | 4 ---- accel/tcg/cputlb.c | 2 +- include/exec/exec-all.h | 1 - 3 files changed, 1 insertion(+), 6 deletions(-) diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index 8a496a2a6f..dd890d6cf6 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -18,10 +18,6 @@ void tb_flush(CPUState *cpu) { } -void tlb_set_dirty(CPUState *cpu, vaddr vaddr) -{ -} - int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 93b1ca810b..e16d02a62c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1039,7 +1039,7 @@ static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry, /* update the TLB corresponding to virtual page vaddr so that it is no longer dirty */ -void tlb_set_dirty(CPUState *cpu, vaddr addr) +static void tlb_set_dirty(CPUState *cpu, vaddr addr) { int mmu_idx; diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 3e53501691..9599e16a09 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -654,7 +654,6 @@ static inline void mmap_unlock(void) {} #define WITH_MMAP_LOCK_GUARD() void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); -void tlb_set_dirty(CPUState *cpu, vaddr addr); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); MemoryRegionSection * From 8501048b501aec0d2d422aafd713348c235d8b83 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 5 Dec 2023 23:24:03 +0100 Subject: [PATCH 03/38] exec: Include 'cpu.h' before validating CPUArchState placement MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CPUArchState 'env' field is defined within the ArchCPU structure, so we need to include each target "cpu.h" header which defines it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id: <20231211212003.21686-2-philmd@linaro.org> --- include/exec/cpu-all.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 1a6510fd3b..b86209fc49 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -391,6 +391,7 @@ static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) #endif /* !CONFIG_USER_ONLY */ /* Validate correct placement of CPUArchState. */ +#include "cpu.h" QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); From 75bbe6a4d2bc9c3681ab71021645d655ad045a75 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 7 Dec 2023 10:41:27 +0100 Subject: [PATCH 04/38] exec: Expose 'target_page.h' API to user emulation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit User-only objects might benefit from the "exec/target_page.h" API, which allows to build some objects once for all targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-3-philmd@linaro.org> --- meson.build | 2 +- page-target.c | 44 ++++++++++++++++++++++++++++++++++++++++++ system/physmem.c | 30 ---------------------------- target/meson.build | 2 -- target/target-common.c | 10 ---------- 5 files changed, 45 insertions(+), 43 deletions(-) create mode 100644 page-target.c delete mode 100644 target/target-common.c diff --git a/meson.build b/meson.build index 96fdc6dfd2..5db2dbc12e 100644 --- a/meson.build +++ b/meson.build @@ -3523,7 +3523,7 @@ if get_option('b_lto') pagevary = declare_dependency(link_with: pagevary) endif common_ss.add(pagevary) -specific_ss.add(files('page-vary-target.c')) +specific_ss.add(files('page-target.c', 'page-vary-target.c')) subdir('backends') subdir('disas') diff --git a/page-target.c b/page-target.c new file mode 100644 index 0000000000..82211c8593 --- /dev/null +++ b/page-target.c @@ -0,0 +1,44 @@ +/* + * QEMU page values getters (target independent) + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "exec/target_page.h" +#include "exec/cpu-defs.h" +#include "cpu.h" +#include "exec/cpu-all.h" + +size_t qemu_target_page_size(void) +{ + return TARGET_PAGE_SIZE; +} + +int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +} + +int qemu_target_page_bits(void) +{ + return TARGET_PAGE_BITS; +} + +int qemu_target_page_bits_min(void) +{ + return TARGET_PAGE_BITS_MIN; +} + +/* Convert target pages to MiB (2**20). */ +size_t qemu_target_pages_to_MiB(size_t pages) +{ + int page_bits = TARGET_PAGE_BITS; + + /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ + g_assert(page_bits < 20); + + return pages >> (20 - page_bits); +} diff --git a/system/physmem.c b/system/physmem.c index c3d04ca921..1a81c226ba 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3540,36 +3540,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, return 0; } -/* - * Allows code that needs to deal with migration bitmaps etc to still be built - * target independent. - */ -size_t qemu_target_page_size(void) -{ - return TARGET_PAGE_SIZE; -} - -int qemu_target_page_bits(void) -{ - return TARGET_PAGE_BITS; -} - -int qemu_target_page_bits_min(void) -{ - return TARGET_PAGE_BITS_MIN; -} - -/* Convert target pages to MiB (2**20). */ -size_t qemu_target_pages_to_MiB(size_t pages) -{ - int page_bits = TARGET_PAGE_BITS; - - /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ - g_assert(page_bits < 20); - - return pages >> (20 - page_bits); -} - bool cpu_physical_memory_is_io(hwaddr phys_addr) { MemoryRegion*mr; diff --git a/target/meson.build b/target/meson.build index 59b46b2ef4..1c2e6f2b19 100644 --- a/target/meson.build +++ b/target/meson.build @@ -18,5 +18,3 @@ subdir('sh4') subdir('sparc') subdir('tricore') subdir('xtensa') - -specific_ss.add(files('target-common.c')) diff --git a/target/target-common.c b/target/target-common.c deleted file mode 100644 index 903b10cfe4..0000000000 --- a/target/target-common.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -#include "qemu/osdep.h" - -#include "cpu.h" -#include "exec/target_page.h" - -int qemu_target_page_mask(void) -{ - return TARGET_PAGE_MASK; -} From 4597463b3851d9f6ec22542b6645511d7f889f78 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 5 Dec 2023 23:02:11 +0100 Subject: [PATCH 05/38] accel: Include missing 'exec/cpu_ldst.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Theses files call cpu_ldl_code() which is declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-5-philmd@linaro.org> --- accel/tcg/translator.c | 1 + target/hexagon/translate.c | 1 + target/microblaze/cpu.c | 1 + target/microblaze/translate.c | 1 + 4 files changed, 4 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 9de0bc34c8..6832e55135 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -12,6 +12,7 @@ #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/translator.h" +#include "exec/cpu_ldst.h" #include "exec/plugin-gen.h" #include "tcg/tcg-op-common.h" #include "internal-target.h" diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index f163eefe97..47a870f42d 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -23,6 +23,7 @@ #include "exec/helper-gen.h" #include "exec/helper-proto.h" #include "exec/translation-block.h" +#include "exec/cpu_ldst.h" #include "exec/log.h" #include "internal.h" #include "attribs.h" diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f8dc3173fc..9eb7374ccd 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/gdbstub.h" #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index fc451befae..6d89c1a175 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "disas/disas.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" From fe7667343c81bffc5f87e591589c691faa84286a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 7 Dec 2023 16:52:16 +0100 Subject: [PATCH 06/38] gdbstub: Include missing 'hw/core/cpu.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Functions such gdb_get_cpu_pid() dereference CPUState so require the structure declaration from "hw/core/cpu.h": static uint32_t gdb_get_cpu_pid(CPUState *cpu) { ... return cpu->cluster_index + 1; } Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id: <20231211212003.21686-15-philmd@linaro.org> Reviewed-by: Richard Henderson --- gdbstub/gdbstub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 9c23d44baf..9c2b8b5d0a 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -37,6 +37,7 @@ #include "hw/cpu/cluster.h" #include "hw/boards.h" #endif +#include "hw/core/cpu.h" #include "sysemu/hw_accel.h" #include "sysemu/runstate.h" From 94326e4f217991102770667f684156bdbef599e6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 22 Mar 2024 16:11:47 +0100 Subject: [PATCH 07/38] gdbstub: Simplify #ifdef'ry in helpers.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Slightly simplify by checking NEED_CPU_H definition in header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240322161439.6448-2-philmd@linaro.org> --- include/gdbstub/helpers.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6b97610f48..6277a858a1 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -12,7 +12,10 @@ #ifndef _GDBSTUB_HELPERS_H_ #define _GDBSTUB_HELPERS_H_ -#ifdef COMPILING_PER_TARGET +#ifndef COMPILING_PER_TARGET +#error "gdbstub helpers should only be included by target specific code" +#endif + #include "cpu.h" /* @@ -96,8 +99,4 @@ static inline uint8_t *gdb_get_reg_ptr(GByteArray *buf, int len) #define ldtul_p(addr) ldl_p(addr) #endif -#else -#error "gdbstub helpers should only be included by target specific code" -#endif - #endif /* _GDBSTUB_HELPERS_H_ */ From 0654c79416f346d967fbc7dad7ca451b49bbd822 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 18 Apr 2024 16:45:33 +0200 Subject: [PATCH 08/38] gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We only need the "exec/tswap.h" and "cpu-param.h" headers. Only include "cpu.h" in the target gdbstub.c source files. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-20-philmd@linaro.org> --- include/gdbstub/helpers.h | 3 ++- target/avr/gdbstub.c | 1 + target/tricore/gdbstub.c | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6277a858a1..26140ef1ac 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -16,7 +16,8 @@ #error "gdbstub helpers should only be included by target specific code" #endif -#include "cpu.h" +#include "exec/tswap.h" +#include "cpu-param.h" /* * The GDB remote protocol transfers values in target byte order. As diff --git a/target/avr/gdbstub.c b/target/avr/gdbstub.c index 2eeee2bf4e..d6d3c1479b 100644 --- a/target/avr/gdbstub.c +++ b/target/avr/gdbstub.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" int avr_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { diff --git a/target/tricore/gdbstub.c b/target/tricore/gdbstub.c index f9309c5e27..29a70051ff 100644 --- a/target/tricore/gdbstub.c +++ b/target/tricore/gdbstub.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" #define LCX_REGNUM 32 From 3aac8abaca536db275da671db088fef2dd82536d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 6 Dec 2023 16:11:15 +0100 Subject: [PATCH 09/38] semihosting/uaccess: Avoid including 'cpu.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "semihosting/uaccess.h" only requires the following headers: - "exec/cpu-defs.h" for target_ulong, - "exec/cpu-common.h" for cpu_memory_rw_debug() - "exec/tswap.h" for tswap32() and tswap64(). Include them instead of the huge "cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <42c6471e-8383-45e0-85ee-e20ca32ecbad@linaro.org> --- include/semihosting/uaccess.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/semihosting/uaccess.h b/include/semihosting/uaccess.h index 3963eafc3e..dd289af8dd 100644 --- a/include/semihosting/uaccess.h +++ b/include/semihosting/uaccess.h @@ -14,7 +14,9 @@ #error Cannot include semihosting/uaccess.h from user emulation #endif -#include "cpu.h" +#include "exec/cpu-common.h" +#include "exec/cpu-defs.h" +#include "exec/tswap.h" #define get_user_u64(val, addr) \ ({ uint64_t val_ = 0; \ From 83fb360d6a60b0a77dce3d3643d1a5311a235e58 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 6 Dec 2023 16:12:12 +0100 Subject: [PATCH 10/38] semihosting/guestfd: Remove unused 'semihosting/uaccess.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-8-philmd@linaro.org> Reviewed-by: Richard Henderson --- semihosting/guestfd.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/semihosting/guestfd.c b/semihosting/guestfd.c index 955c2efbd0..d3241434c5 100644 --- a/semihosting/guestfd.c +++ b/semihosting/guestfd.c @@ -12,10 +12,7 @@ #include "gdbstub/syscalls.h" #include "semihosting/semihost.h" #include "semihosting/guestfd.h" -#ifdef CONFIG_USER_ONLY -#include "qemu.h" -#else -#include "semihosting/uaccess.h" +#ifndef CONFIG_USER_ONLY #include CONFIG_DEVICES #endif From e92dd33224603ee5a42e0b13b6e055691325ba47 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 5 Dec 2023 14:31:59 +0100 Subject: [PATCH 11/38] target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit accel/tcg/ files requires the following definitions: - TARGET_LONG_BITS - TARGET_PAGE_BITS - TARGET_PHYS_ADDR_SPACE_BITS - TCG_GUEST_DEFAULT_MO The first 3 are defined in "cpu-param.h". The last one in "cpu.h", with a bunch of definitions irrelevant for TCG. By moving the TCG_GUEST_DEFAULT_MO definition to "cpu-param.h", we can simplify various accel/tcg includes. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Acked-by: Nicholas Piggin Message-Id: <20231211212003.21686-4-philmd@linaro.org> --- target/alpha/cpu-param.h | 3 +++ target/alpha/cpu.h | 3 --- target/arm/cpu-param.h | 8 +++++--- target/arm/cpu.h | 3 --- target/avr/cpu-param.h | 2 ++ target/avr/cpu.h | 2 -- target/hppa/cpu-param.h | 8 ++++++++ target/hppa/cpu.h | 6 ------ target/i386/cpu-param.h | 3 +++ target/i386/cpu.h | 3 --- target/loongarch/cpu-param.h | 2 ++ target/loongarch/cpu.h | 2 -- target/microblaze/cpu-param.h | 3 +++ target/microblaze/cpu.h | 3 --- target/mips/cpu-param.h | 2 ++ target/mips/cpu.h | 2 -- target/openrisc/cpu-param.h | 2 ++ target/openrisc/cpu.h | 2 -- target/ppc/cpu-param.h | 2 ++ target/ppc/cpu.h | 2 -- target/riscv/cpu-param.h | 2 ++ target/riscv/cpu.h | 2 -- target/s390x/cpu-param.h | 6 ++++++ target/s390x/cpu.h | 3 --- target/sparc/cpu-param.h | 23 +++++++++++++++++++++++ target/sparc/cpu.h | 23 ----------------------- target/xtensa/cpu-param.h | 3 +++ target/xtensa/cpu.h | 3 --- 28 files changed, 66 insertions(+), 62 deletions(-) diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h index c969cb016b..5ce213a9a1 100644 --- a/target/alpha/cpu-param.h +++ b/target/alpha/cpu-param.h @@ -27,4 +27,7 @@ # define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS) #endif +/* Alpha processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 7188a409a0..f9e2ecb90a 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -24,9 +24,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* Alpha processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - #define ICACHE_LINE_SIZE 32 #define DCACHE_LINE_SIZE 32 diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index da3243ab21..2d5f3aa312 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -27,14 +27,16 @@ # else # define TARGET_PAGE_BITS 12 # endif -#else +#else /* !CONFIG_USER_ONLY */ /* * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6 * have to support 1K tiny pages. */ # define TARGET_PAGE_BITS_VARY # define TARGET_PAGE_BITS_MIN 10 - -#endif +#endif /* !CONFIG_USER_ONLY */ + +/* ARM processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 97997dbd08..17efc5d565 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -30,9 +30,6 @@ #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" -/* ARM processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - #ifdef TARGET_AARCH64 #define KVM_HAVE_MCE_INJECTION 1 #endif diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h index 9a92bc74fc..93c2f470d0 100644 --- a/target/avr/cpu-param.h +++ b/target/avr/cpu-param.h @@ -32,4 +32,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 24 #define TARGET_VIRT_ADDR_SPACE_BITS 24 +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/avr/cpu.h b/target/avr/cpu.h index d185d20dcb..4725535102 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -30,8 +30,6 @@ #define CPU_RESOLVING_TYPE TYPE_AVR_CPU -#define TCG_GUEST_DEFAULT_MO 0 - /* * AVR has two memory spaces, data & code. * e.g. both have 0 address diff --git a/target/hppa/cpu-param.h b/target/hppa/cpu-param.h index bb3d7ef6f7..473d489f01 100644 --- a/target/hppa/cpu-param.h +++ b/target/hppa/cpu-param.h @@ -21,4 +21,12 @@ #define TARGET_PAGE_BITS 12 +/* PA-RISC 1.x processors have a strong memory model. */ +/* + * ??? While we do not yet implement PA-RISC 2.0, those processors have + * a weak memory model, but with TLB bits that force ordering on a per-page + * basis. It's probably easier to fall back to a strong memory model. + */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index a072d0bb63..fb2e4c4a98 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -25,12 +25,6 @@ #include "qemu/cpu-float.h" #include "qemu/interval-tree.h" -/* PA-RISC 1.x processors have a strong memory model. */ -/* ??? While we do not yet implement PA-RISC 2.0, those processors have - a weak memory model, but with TLB bits that force ordering on a per-page - basis. It's probably easier to fall back to a strong memory model. */ -#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL - #define MMU_ABS_W_IDX 6 #define MMU_ABS_IDX 7 #define MMU_KERNEL_IDX 8 diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h index 911b4cd51b..5e15335203 100644 --- a/target/i386/cpu-param.h +++ b/target/i386/cpu-param.h @@ -24,4 +24,7 @@ #endif #define TARGET_PAGE_BITS 12 +/* The x86 has a strong memory model with some store-after-load re-ordering */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + #endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6112e27bfd..565c7a98c3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -30,9 +30,6 @@ #define XEN_NR_VIRQS 24 -/* The x86 has a strong memory model with some store-after-load re-ordering */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) - #define KVM_HAVE_MCE_INJECTION 1 /* support for self modifying code even if the modified instruction is diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h index cfe195db4e..db5ad1c69f 100644 --- a/target/loongarch/cpu-param.h +++ b/target/loongarch/cpu-param.h @@ -14,4 +14,6 @@ #define TARGET_PAGE_BITS 12 +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index ec37579fd6..abb01b2cc7 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -39,8 +39,6 @@ #define IOCSR_MEM_SIZE 0x428 -#define TCG_GUEST_DEFAULT_MO (0) - #define FCSR0_M1 0x1f /* FCSR1 mask, Enables */ #define FCSR0_M2 0x1f1f0000 /* FCSR2 mask, Cause and Flags */ #define FCSR0_M3 0x300 /* FCSR3 mask, Round Mode */ diff --git a/target/microblaze/cpu-param.h b/target/microblaze/cpu-param.h index 9770b0eb52..e530fead1c 100644 --- a/target/microblaze/cpu-param.h +++ b/target/microblaze/cpu-param.h @@ -29,4 +29,7 @@ /* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */ #define TARGET_PAGE_BITS 12 +/* MicroBlaze is always in-order. */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index c0c7574dbd..3e5a3e5c60 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -24,9 +24,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* MicroBlaze is always in-order. */ -#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL - typedef struct CPUArchState CPUMBState; #if !defined(CONFIG_USER_ONLY) #include "mmu.h" diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h index 594c91a156..6f6ac1688f 100644 --- a/target/mips/cpu-param.h +++ b/target/mips/cpu-param.h @@ -30,4 +30,6 @@ #define TARGET_PAGE_BITS_MIN 12 #endif +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7329226d39..3e906a175a 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -10,8 +10,6 @@ #include "hw/clock.h" #include "mips-defs.h" -#define TCG_GUEST_DEFAULT_MO (0) - typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; /* MSA Context */ diff --git a/target/openrisc/cpu-param.h b/target/openrisc/cpu-param.h index 3f08207485..fbfc0f568b 100644 --- a/target/openrisc/cpu-param.h +++ b/target/openrisc/cpu-param.h @@ -13,4 +13,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index b1b7db5cbd..c9fe9ae12d 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -24,8 +24,6 @@ #include "exec/cpu-defs.h" #include "fpu/softfloat-types.h" -#define TCG_GUEST_DEFAULT_MO (0) - /** * OpenRISCCPUClass: * @parent_realize: The parent class' realize handler. diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h index b7ad52de03..77c5ed9a67 100644 --- a/target/ppc/cpu-param.h +++ b/target/ppc/cpu-param.h @@ -40,4 +40,6 @@ # define TARGET_PAGE_BITS 12 #endif +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 67e6b2effd..0ac55d6b25 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -29,8 +29,6 @@ #define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU -#define TCG_GUEST_DEFAULT_MO 0 - #define TARGET_PAGE_BITS_64K 16 #define TARGET_PAGE_BITS_16M 24 diff --git a/target/riscv/cpu-param.h b/target/riscv/cpu-param.h index b2a9396dec..1fbd64939d 100644 --- a/target/riscv/cpu-param.h +++ b/target/riscv/cpu-param.h @@ -28,4 +28,6 @@ * - M mode HLV/HLVX/HSV 0b111 */ +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 3b1a02b944..2d0c02c35b 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -43,8 +43,6 @@ typedef struct CPUArchState CPURISCVState; # define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE64 #endif -#define TCG_GUEST_DEFAULT_MO 0 - /* * RISC-V-specific extra insn start words: * 1: Original instruction opcode diff --git a/target/s390x/cpu-param.h b/target/s390x/cpu-param.h index 84ca08626b..11d23b600d 100644 --- a/target/s390x/cpu-param.h +++ b/target/s390x/cpu-param.h @@ -13,4 +13,10 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 64 #define TARGET_VIRT_ADDR_SPACE_BITS 64 +/* + * The z/Architecture has a strong memory model with some + * store-after-load re-ordering. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + #endif diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 43a46a5a06..414680eed1 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -33,9 +33,6 @@ #define ELF_MACHINE_UNAME "S390X" -/* The z/Architecture has a strong memory model with some store-after-load re-ordering */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) - #define TARGET_HAS_PRECISE_SMC #define TARGET_INSN_START_EXTRA_WORDS 2 diff --git a/target/sparc/cpu-param.h b/target/sparc/cpu-param.h index cb11980404..82293fb844 100644 --- a/target/sparc/cpu-param.h +++ b/target/sparc/cpu-param.h @@ -23,4 +23,27 @@ # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +/* + * From Oracle SPARC Architecture 2015: + * + * Compatibility notes: The PSO memory model described in SPARC V8 and + * SPARC V9 compatibility architecture specifications was never implemented + * in a SPARC V9 implementation and is not included in the Oracle SPARC + * Architecture specification. + * + * The RMO memory model described in the SPARC V9 specification was + * implemented in some non-Sun SPARC V9 implementations, but is not + * directly supported in Oracle SPARC Architecture 2015 implementations. + * + * Therefore always use TSO in QEMU. + * + * D.5 Specification of Partial Store Order (PSO) + * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. + * + * D.6 Specification of Total Store Order (TSO) + * ... PSO with the additional requirement that all [stores] are followed + * by an implied MEMBAR #StoreStore. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) + #endif diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index f3cdd17c62..dfd9512a21 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -6,29 +6,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* - * From Oracle SPARC Architecture 2015: - * - * Compatibility notes: The PSO memory model described in SPARC V8 and - * SPARC V9 compatibility architecture specifications was never implemented - * in a SPARC V9 implementation and is not included in the Oracle SPARC - * Architecture specification. - * - * The RMO memory model described in the SPARC V9 specification was - * implemented in some non-Sun SPARC V9 implementations, but is not - * directly supported in Oracle SPARC Architecture 2015 implementations. - * - * Therefore always use TSO in QEMU. - * - * D.5 Specification of Partial Store Order (PSO) - * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. - * - * D.6 Specification of Total Store Order (TSO) - * ... PSO with the additional requirement that all [stores] are followed - * by an implied MEMBAR #StoreStore. - */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) - #if !defined(TARGET_SPARC64) #define TARGET_DPREGS 16 #define TARGET_FCCREGS 1 diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h index b1da0555de..0000725f2f 100644 --- a/target/xtensa/cpu-param.h +++ b/target/xtensa/cpu-param.h @@ -17,4 +17,7 @@ #define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +/* Xtensa processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 6b8d0636d2..9f2341d856 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -34,9 +34,6 @@ #include "hw/clock.h" #include "xtensa-isa.h" -/* Xtensa processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - enum { /* Additional instructions */ XTENSA_OPTION_CODE_DENSITY, From eedd109525e12f435cf36a4a43e73bc38005caf3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 4 Dec 2023 15:29:19 +0100 Subject: [PATCH 12/38] target/ppc/excp_helper: Avoid 'abi_ptr' in system emulation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 'abi_ptr' is a user specific type. The system emulation equivalent is 'target_ulong'. Use it in ppc_ldl_code() to emphasis this is not an user emulation function. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Nicholas Piggin Reviewed-by: Thomas Huth Message-Id: <20231211212003.21686-18-philmd@linaro.org> Reviewed-by: Richard Henderson --- target/ppc/excp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 674c05a2ce..0712098cf7 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -142,7 +142,7 @@ static inline bool insn_need_byteswap(CPUArchState *env) return !!(env->msr & ((target_ulong)1 << MSR_LE)); } -static uint32_t ppc_ldl_code(CPUArchState *env, abi_ptr addr) +static uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr) { uint32_t insn = cpu_ldl_code(env, addr); From 9b21d29acfc9b516c6785e7ca73bff735ebf3d40 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 18 Apr 2024 13:17:47 +0100 Subject: [PATCH 13/38] target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have abi_ulong == uint32_t for the 32-bit ABI. Use the generic type to avoid to depend on the "exec/user/abitypes.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-14-philmd@linaro.org> --- target/sparc/gdbstub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c index 07ea81ab5f..ec0036e9ef 100644 --- a/target/sparc/gdbstub.c +++ b/target/sparc/gdbstub.c @@ -108,7 +108,7 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; #if defined(TARGET_ABI32) - abi_ulong tmp; + uint32_t tmp; tmp = ldl_p(mem_buf); #else From 7e17a524698809ea0cd2b848eab5516a480af75a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 1 Dec 2023 18:58:00 +0100 Subject: [PATCH 14/38] target/i386: Include missing 'exec/exec-all.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The XRSTOR instruction ends calling tlb_flush(), declared in "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-13-philmd@linaro.org> --- target/i386/tcg/fpu_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 4b965a5d6c..ece22a3553 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -21,6 +21,7 @@ #include #include "cpu.h" #include "tcg-cpu.h" +#include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" From 3b28c27067dd577a3ea137724c4247c8356915d0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 5 Dec 2023 22:40:15 +0100 Subject: [PATCH 15/38] accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit set_helper_retaddr() is only used in accel/tcg/user-exec.c. clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c and accel/tcg/user-exec.c. No need to expose their definitions to all user-emulation files including "exec/cpu_ldst.h", move them to a new "user-retaddr.h" header (restricted to accel/tcg/). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-19-philmd@linaro.org> --- accel/tcg/cpu-exec.c | 3 +++ accel/tcg/user-exec.c | 1 + accel/tcg/user-retaddr.h | 28 ++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 28 ++-------------------------- 4 files changed, 34 insertions(+), 26 deletions(-) create mode 100644 accel/tcg/user-retaddr.h diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5c70748060..225e5fbd3e 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -41,6 +41,9 @@ #include "tb-context.h" #include "internal-common.h" #include "internal-target.h" +#if defined(CONFIG_USER_ONLY) +#include "user-retaddr.h" +#endif /* -icount align implementation. */ diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 3cac3a78c4..1c621477ad 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -31,6 +31,7 @@ #include "tcg/tcg-ldst.h" #include "internal-common.h" #include "internal-target.h" +#include "user-retaddr.h" __thread uintptr_t helper_retaddr; diff --git a/accel/tcg/user-retaddr.h b/accel/tcg/user-retaddr.h new file mode 100644 index 0000000000..e0f57e1994 --- /dev/null +++ b/accel/tcg/user-retaddr.h @@ -0,0 +1,28 @@ +#ifndef ACCEL_TCG_USER_RETADDR_H +#define ACCEL_TCG_USER_RETADDR_H + +#include "qemu/atomic.h" + +extern __thread uintptr_t helper_retaddr; + +static inline void set_helper_retaddr(uintptr_t ra) +{ + helper_retaddr = ra; + /* + * Ensure that this write is visible to the SIGSEGV handler that + * may be invoked due to a subsequent invalid memory operation. + */ + signal_barrier(); +} + +static inline void clear_helper_retaddr(void) +{ + /* + * Ensure that previous memory operations have succeeded before + * removing the data visible to the signal handler. + */ + signal_barrier(); + helper_retaddr = 0; +} + +#endif diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index eb8f3f0595..82690d3947 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -300,31 +300,7 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if defined(CONFIG_USER_ONLY) - -extern __thread uintptr_t helper_retaddr; - -static inline void set_helper_retaddr(uintptr_t ra) -{ - helper_retaddr = ra; - /* - * Ensure that this write is visible to the SIGSEGV handler that - * may be invoked due to a subsequent invalid memory operation. - */ - signal_barrier(); -} - -static inline void clear_helper_retaddr(void) -{ - /* - * Ensure that previous memory operations have succeeded before - * removing the data visible to the signal handler. - */ - signal_barrier(); - helper_retaddr = 0; -} - -#else +#if !defined(CONFIG_USER_ONLY) #include "tcg/oversized-guest.h" @@ -376,7 +352,7 @@ static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; } -#endif /* defined(CONFIG_USER_ONLY) */ +#endif /* !defined(CONFIG_USER_ONLY) */ #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data From 6bba316e2333462aa8e93eda6908c06db3e4727a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 1 Dec 2023 16:15:27 +0100 Subject: [PATCH 16/38] accel/tcg: Include missing 'hw/core/cpu.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit tcg_cpu_init_cflags() accesses CPUState fields, so requires "hw/core/cpu.h" to get its structure definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-12-philmd@linaro.org> Reviewed-by: Richard Henderson --- accel/tcg/tcg-accel-ops.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 9c957f421c..2c7b0cc09e 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -37,6 +37,8 @@ #include "exec/tb-flush.h" #include "exec/gdbstub.h" +#include "hw/core/cpu.h" + #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" #include "tcg-accel-ops-rr.h" From 893b4bde885c1f02edbe9d9533919abb0ac50490 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 10 Jan 2024 15:49:40 +0100 Subject: [PATCH 17/38] accel/tcg: Include missing headers in 'tb-jmp-cache.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Due to missing headers, when including "tb-jmp-cache.h" we might get: accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type 21 | struct rcu_head rcu; | ^~~ accel/tcg/tb-jmp-cache.h:24:9: error: unknown type name ‘vaddr’ 24 | vaddr pc; | ^~~~~ Add the missing "qemu/rcu.h" and "exec/cpu-common.h" headers. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240111162442.43755-1-philmd@linaro.org> --- accel/tcg/tb-jmp-cache.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h index 4ab8553afc..184bb3e3e2 100644 --- a/accel/tcg/tb-jmp-cache.h +++ b/accel/tcg/tb-jmp-cache.h @@ -9,6 +9,9 @@ #ifndef ACCEL_TCG_TB_JMP_CACHE_H #define ACCEL_TCG_TB_JMP_CACHE_H +#include "qemu/rcu.h" +#include "exec/cpu-common.h" + #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) From e4751d340a49b117b90a411b179b8c892cf43d85 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 25 Mar 2024 15:30:33 +0100 Subject: [PATCH 18/38] accel/tcg: Rename load-extract/store-insert headers using .h.inc suffix MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename 'store-insert-al16.h' as 'store-insert-al16.h.inc' and 'load-extract-al16-al8.h' as 'load-extract-al16-al8.h.inc'. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240424173333.96148-3-philmd@linaro.org> --- accel/tcg/ldst_atomicity.c.inc | 4 ++-- .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 8 files changed, 2 insertions(+), 2 deletions(-) rename host/include/aarch64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/aarch64/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/generic/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/generic/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/loongarch64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/loongarch64/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/x86_64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) diff --git a/accel/tcg/ldst_atomicity.c.inc b/accel/tcg/ldst_atomicity.c.inc index 97dae70d53..134da3c1da 100644 --- a/accel/tcg/ldst_atomicity.c.inc +++ b/accel/tcg/ldst_atomicity.c.inc @@ -9,8 +9,8 @@ * See the COPYING file in the top-level directory. */ -#include "host/load-extract-al16-al8.h" -#include "host/store-insert-al16.h" +#include "host/load-extract-al16-al8.h.inc" +#include "host/store-insert-al16.h.inc" #ifdef CONFIG_ATOMIC64 # define HAVE_al8 true diff --git a/host/include/aarch64/host/load-extract-al16-al8.h b/host/include/aarch64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/aarch64/host/load-extract-al16-al8.h rename to host/include/aarch64/host/load-extract-al16-al8.h.inc diff --git a/host/include/aarch64/host/store-insert-al16.h b/host/include/aarch64/host/store-insert-al16.h.inc similarity index 100% rename from host/include/aarch64/host/store-insert-al16.h rename to host/include/aarch64/host/store-insert-al16.h.inc diff --git a/host/include/generic/host/load-extract-al16-al8.h b/host/include/generic/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/generic/host/load-extract-al16-al8.h rename to host/include/generic/host/load-extract-al16-al8.h.inc diff --git a/host/include/generic/host/store-insert-al16.h b/host/include/generic/host/store-insert-al16.h.inc similarity index 100% rename from host/include/generic/host/store-insert-al16.h rename to host/include/generic/host/store-insert-al16.h.inc diff --git a/host/include/loongarch64/host/load-extract-al16-al8.h b/host/include/loongarch64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/loongarch64/host/load-extract-al16-al8.h rename to host/include/loongarch64/host/load-extract-al16-al8.h.inc diff --git a/host/include/loongarch64/host/store-insert-al16.h b/host/include/loongarch64/host/store-insert-al16.h.inc similarity index 100% rename from host/include/loongarch64/host/store-insert-al16.h rename to host/include/loongarch64/host/store-insert-al16.h.inc diff --git a/host/include/x86_64/host/load-extract-al16-al8.h b/host/include/x86_64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/x86_64/host/load-extract-al16-al8.h rename to host/include/x86_64/host/load-extract-al16-al8.h.inc From 2379866c3bf7c5fd654cef64246af9d8a03f7d49 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 22 Apr 2024 16:41:04 +0200 Subject: [PATCH 19/38] accel/tcg: Rename helper-head.h -> helper-head.h.inc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename "exec/helper-head.h" as "exec/helper-head.h.inc". Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240424173333.96148-4-philmd@linaro.org> --- include/exec/helper-gen.h.inc | 2 +- include/exec/{helper-head.h => helper-head.h.inc} | 0 include/exec/helper-info.c.inc | 2 +- include/exec/helper-proto.h.inc | 2 +- 4 files changed, 3 insertions(+), 3 deletions(-) rename include/exec/{helper-head.h => helper-head.h.inc} (100%) diff --git a/include/exec/helper-gen.h.inc b/include/exec/helper-gen.h.inc index c009641517..d9fd3ed72a 100644 --- a/include/exec/helper-gen.h.inc +++ b/include/exec/helper-gen.h.inc @@ -8,7 +8,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" #define DEF_HELPER_FLAGS_0(name, flags, ret) \ extern TCGHelperInfo glue(helper_info_, name); \ diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h.inc similarity index 100% rename from include/exec/helper-head.h rename to include/exec/helper-head.h.inc diff --git a/include/exec/helper-info.c.inc b/include/exec/helper-info.c.inc index 530d2e6d35..c551736d49 100644 --- a/include/exec/helper-info.c.inc +++ b/include/exec/helper-info.c.inc @@ -7,7 +7,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" /* * Need one more level of indirection before stringification diff --git a/include/exec/helper-proto.h.inc b/include/exec/helper-proto.h.inc index c3aa666929..f8e57e43ce 100644 --- a/include/exec/helper-proto.h.inc +++ b/include/exec/helper-proto.h.inc @@ -5,7 +5,7 @@ * Define HELPER_H for the header file to be expanded. */ -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" /* * Work around an issue with --enable-lto, in which GCC's ipa-split pass From 9ad49538c7b7c0672110994d81d687ed42bf3ef4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 24 Apr 2024 18:16:34 +0200 Subject: [PATCH 20/38] accel/whpx: Use accel-specific per-vcpu @dirty field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit WHPX has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-2-philmd@linaro.org> --- target/i386/whpx/whpx-all.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 31eec7048c..b08e644517 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -237,6 +237,7 @@ struct AccelCPUState { uint64_t tpr; uint64_t apic_base; bool interruption_pending; + bool dirty; /* Must be the last field as it may have a tail */ WHV_RUN_VP_EXIT_CONTEXT exit_ctx; @@ -839,7 +840,7 @@ static HRESULT CALLBACK whpx_emu_setreg_callback( * The emulator just successfully wrote the register state. We clear the * dirty state so we avoid the double write on resume of the VP. */ - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; return hr; } @@ -1394,7 +1395,7 @@ static int whpx_last_vcpu_stopping(CPUState *cpu) /* Returns the address of the next instruction that is about to be executed. */ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid) { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { /* The CPU registers have been modified by other parts of QEMU. */ return cpu_env(cpu)->eip; } else if (exit_context_valid) { @@ -1713,9 +1714,9 @@ static int whpx_vcpu_run(CPUState *cpu) } do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (exclusive_step_mode == WHPX_STEP_NONE) { @@ -2063,9 +2064,9 @@ static int whpx_vcpu_run(CPUState *cpu) static void do_whpx_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { whpx_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } } @@ -2073,20 +2074,20 @@ static void do_whpx_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { whpx_set_registers(cpu, WHPX_SET_RESET_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_whpx_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { whpx_set_registers(cpu, WHPX_SET_FULL_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, run_on_cpu_data arg) { - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } /* @@ -2095,7 +2096,7 @@ static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, void whpx_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_whpx_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -2235,7 +2236,7 @@ int whpx_init_vcpu(CPUState *cpu) } vcpu->interruptable = true; - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; cpu->accel = vcpu; max_vcpu_index = max(max_vcpu_index, cpu->cpu_index); qemu_add_vm_change_state_handler(whpx_cpu_update_state, env); From 79f1926b2dfa25ac47adbdc0748dc5f951b55ac5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 24 Apr 2024 18:16:49 +0200 Subject: [PATCH 21/38] accel/nvmm: Use accel-specific per-vcpu @dirty field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit NVMM has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-3-philmd@linaro.org> --- target/i386/nvmm/nvmm-all.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index 49a3a3b916..f9cced53b3 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -30,6 +30,7 @@ struct AccelCPUState { struct nvmm_vcpu vcpu; uint8_t tpr; bool stop; + bool dirty; /* Window-exiting for INTs/NMIs. */ bool int_window_exit; @@ -507,7 +508,7 @@ nvmm_io_callback(struct nvmm_io *io) } /* Needed, otherwise infinite loop. */ - current_cpu->vcpu_dirty = false; + current_cpu->accel->dirty = false; } static void @@ -516,7 +517,7 @@ nvmm_mem_callback(struct nvmm_mem *mem) cpu_physical_memory_rw(mem->gpa, mem->data, mem->size, mem->write); /* Needed, otherwise infinite loop. */ - current_cpu->vcpu_dirty = false; + current_cpu->accel->dirty = false; } static struct nvmm_assist_callbacks nvmm_callbacks = { @@ -726,9 +727,9 @@ nvmm_vcpu_loop(CPUState *cpu) * Inner VCPU loop. */ do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (qcpu->stop) { @@ -826,32 +827,32 @@ static void do_nvmm_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { nvmm_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } static void do_nvmm_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_nvmm_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_nvmm_cpu_synchronize_pre_loadvm(CPUState *cpu, run_on_cpu_data arg) { - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } void nvmm_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_nvmm_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -981,7 +982,7 @@ nvmm_init_vcpu(CPUState *cpu) } } - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; cpu->accel = qcpu; return 0; From e620363687d468530e00db59ea00f08e6f67eabc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 24 Apr 2024 18:16:59 +0200 Subject: [PATCH 22/38] accel/hvf: Use accel-specific per-vcpu @dirty field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit HVF has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-4-philmd@linaro.org> --- accel/hvf/hvf-accel-ops.c | 10 +++++----- include/hw/core/cpu.h | 3 +-- include/sysemu/hvf_int.h | 1 + target/arm/hvf/hvf.c | 4 ++-- target/i386/hvf/hvf.c | 4 ++-- target/i386/hvf/x86hvf.c | 2 +- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index d94d41ab6d..40d4187d9d 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -204,15 +204,15 @@ static void hvf_set_phys_mem(MemoryRegionSection *section, bool add) static void do_hvf_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { hvf_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } } static void hvf_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_hvf_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -221,7 +221,7 @@ static void do_hvf_cpu_synchronize_set_dirty(CPUState *cpu, run_on_cpu_data arg) { /* QEMU state is the reference, push it to HVF now and on next entry */ - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } static void hvf_cpu_synchronize_post_reset(CPUState *cpu) @@ -402,7 +402,7 @@ static int hvf_init_vcpu(CPUState *cpu) #else r = hv_vcpu_create((hv_vcpuid_t *)&cpu->accel->fd, HV_VCPU_DEFAULT); #endif - cpu->vcpu_dirty = 1; + cpu->accel->dirty = true; assert_hvf_ok(r); cpu->accel->guest_debug_enabled = false; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 7f037b158e..cead8f01a6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -525,6 +525,7 @@ struct CPUState { uint32_t kvm_fetch_index; uint64_t dirty_pages; int kvm_vcpu_stats_fd; + bool vcpu_dirty; /* Use by accel-block: CPU is executing an ioctl() */ QemuLockCnt in_ioctl_lock; @@ -546,8 +547,6 @@ struct CPUState { int32_t exception_index; AccelCPUState *accel; - /* shared by kvm and hvf */ - bool vcpu_dirty; /* Used to keep track of an outstanding cpu throttle thread for migration * autoconverge diff --git a/include/sysemu/hvf_int.h b/include/sysemu/hvf_int.h index 718beddcdd..4a327fd526 100644 --- a/include/sysemu/hvf_int.h +++ b/include/sysemu/hvf_int.h @@ -55,6 +55,7 @@ struct AccelCPUState { bool vtimer_masked; sigset_t unblock_ipi_mask; bool guest_debug_enabled; + bool dirty; }; void assert_hvf_ok(hv_return_t ret); diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 65a5601804..db628c1cba 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -806,9 +806,9 @@ int hvf_put_registers(CPUState *cpu) static void flush_cpu_state(CPUState *cpu) { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { hvf_put_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } } diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 1ed8ed5154..e493452acb 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -419,9 +419,9 @@ int hvf_vcpu_exec(CPUState *cpu) } do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { hvf_put_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (hvf_inject_interrupts(cpu)) { diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index be2c46246e..1569f860eb 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -427,7 +427,7 @@ int hvf_process_events(CPUState *cs) X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; - if (!cs->vcpu_dirty) { + if (!cs->accel->dirty) { /* light weight sync for CPU_INTERRUPT_HARD and IF_MASK */ env->eflags = rreg(cs->accel->fd, HV_X86_RFLAGS); } From edfc85875d4926208a86acd8f4f212b664df35ca Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 2 Dec 2023 20:00:02 +0100 Subject: [PATCH 23/38] exec/cpu-all: Reduce 'qemu/rcu.h' header inclusion MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h", however "exec/ram_addr.h" does. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-17-philmd@linaro.org> --- include/exec/cpu-all.h | 1 - include/exec/ram_addr.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index b86209fc49..586dc56d9e 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -24,7 +24,6 @@ #include "exec/tswap.h" #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "qemu/rcu.h" /* some important defines: * diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 07c8f86375..891c44cf2d 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -26,6 +26,7 @@ #include "exec/ramlist.h" #include "exec/ramblock.h" #include "exec/exec-all.h" +#include "qemu/rcu.h" extern uint64_t total_dirty_pages; From c8f7bbb773ec815aa49c15abd87ba8b02a14add3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sat, 2 Dec 2023 20:01:07 +0100 Subject: [PATCH 24/38] exec/cpu-all: Remove unused 'qemu/thread.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Nothing is required from "qemu/thread.h" in "exec/cpu-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-13-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 586dc56d9e..4de0d5a0d7 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -22,7 +22,6 @@ #include "exec/cpu-common.h" #include "exec/memory.h" #include "exec/tswap.h" -#include "qemu/thread.h" #include "hw/core/cpu.h" /* some important defines: From 77166c4568eb7cbd81afeecf4975c607b734f1f0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 12 Dec 2023 11:18:13 +0100 Subject: [PATCH 25/38] exec/cpu-all: Remove unused tswapls() definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Last use of tswapls() was removed 2 years ago in commit aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-15-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 4de0d5a0d7..7c44ffb3af 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -38,11 +38,9 @@ #if TARGET_LONG_SIZE == 4 #define tswapl(s) tswap32(s) -#define tswapls(s) tswap32s((uint32_t *)(s)) #define bswaptls(s) bswap32s(s) #else #define tswapl(s) tswap64(s) -#define tswapls(s) tswap64s((uint64_t *)(s)) #define bswaptls(s) bswap64s(s) #endif From 425082612c012843d8b33fa0d35966adf5600c47 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 12 Dec 2023 11:34:25 +0100 Subject: [PATCH 26/38] exec: Declare target_words_bigendian() in 'exec/tswap.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the target swapping helpers. Remove "hw/core/cpu.h" when it was only included to get the target_words_bigendian() declaration. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-16-philmd@linaro.org> Reviewed-by: Richard Henderson --- cpu-target.c | 1 + disas/disas.c | 1 + hw/audio/virtio-snd.c | 2 +- hw/core/cpu-sysemu.c | 2 +- hw/core/generic-loader.c | 2 +- hw/display/vga.c | 2 +- hw/virtio/virtio.c | 1 + include/exec/tswap.h | 12 +++++++++++- include/hw/core/cpu.h | 11 ----------- 9 files changed, 18 insertions(+), 16 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 4c0621bf33..f88649c299 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -35,6 +35,7 @@ #endif #include "sysemu/cpus.h" #include "sysemu/tcg.h" +#include "exec/tswap.h" #include "exec/replay-core.h" #include "exec/cpu-common.h" #include "exec/exec-all.h" diff --git a/disas/disas.c b/disas/disas.c index 7e3b0bb46c..ec14715ecd 100644 --- a/disas/disas.c +++ b/disas/disas.c @@ -6,6 +6,7 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" +#include "exec/tswap.h" #include "exec/memory.h" /* Filled in by elfload.c. Simplistic, but will do for now. */ diff --git a/hw/audio/virtio-snd.c b/hw/audio/virtio-snd.c index c80b58bf5d..6a2ee085c0 100644 --- a/hw/audio/virtio-snd.c +++ b/hw/audio/virtio-snd.c @@ -20,11 +20,11 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "include/qemu/lockable.h" +#include "exec/tswap.h" #include "sysemu/runstate.h" #include "trace.h" #include "qapi/error.h" #include "hw/audio/virtio-snd.h" -#include "hw/core/cpu.h" #define VIRTIO_SOUND_VM_VERSION 1 #define VIRTIO_SOUND_JACK_DEFAULT 0 diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index d0d6a910f9..2a9a2a4eb5 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "hw/core/sysemu-cpu-ops.h" bool cpu_paging_enabled(const CPUState *cpu) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index d4b5c501d8..ea8628b892 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -31,7 +31,7 @@ */ #include "qemu/osdep.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "sysemu/dma.h" #include "sysemu/reset.h" #include "hw/boards.h" diff --git a/hw/display/vga.c b/hw/display/vga.c index e91a76bf76..30facc6c8e 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -26,7 +26,7 @@ #include "qemu/units.h" #include "sysemu/reset.h" #include "qapi/error.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "hw/display/vga.h" #include "hw/i386/x86.h" #include "hw/pci/pci.h" diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 871674f9be..893a072c9d 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -20,6 +20,7 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/module.h" +#include "exec/tswap.h" #include "qom/object_interfaces.h" #include "hw/core/cpu.h" #include "hw/virtio/virtio.h" diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 5089cd6a4c..b7a4191347 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -8,9 +8,19 @@ #ifndef TSWAP_H #define TSWAP_H -#include "hw/core/cpu.h" #include "qemu/bswap.h" +/** + * target_words_bigendian: + * Returns true if the (default) endianness of the target is big endian, + * false otherwise. Note that in target-specific code, you can use + * TARGET_BIG_ENDIAN directly instead. On the other hand, common + * code should normally never need to know about the endianness of the + * target, so please do *not* use this function unless you know very well + * what you are doing! + */ +bool target_words_bigendian(void); + /* * If we're in target-specific code, we can hard-code the swapping * condition, otherwise we have to do (slower) run-time checks. diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index cead8f01a6..d89b2cffcb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1168,17 +1168,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); -/** - * target_words_bigendian: - * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Note that in target-specific code, you can use - * TARGET_BIG_ENDIAN directly instead. On the other hand, common - * code should normally never need to know about the endianness of the - * target, so please do *not* use this function unless you know very well - * what you are doing! - */ -bool target_words_bigendian(void); - const char *target_name(void); #ifdef COMPILING_PER_TARGET From 827238668e7dc44e43e71a3e12b605881fe6887e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 12 Dec 2023 11:27:18 +0100 Subject: [PATCH 27/38] exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit tswapl() and bswaptls() are target-dependent and only used by user emulation. Move their definitions to a new header: "exec/user/tswap-target.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-17-philmd@linaro.org> Reviewed-by: Richard Henderson --- MAINTAINERS | 1 + bsd-user/freebsd/target_os_elf.h | 1 + bsd-user/freebsd/target_os_stack.h | 1 + bsd-user/netbsd/target_os_elf.h | 1 + bsd-user/openbsd/target_os_elf.h | 1 + bsd-user/signal.c | 1 + bsd-user/strace.c | 1 + include/exec/cpu-all.h | 8 -------- include/exec/user/abitypes.h | 1 + include/user/tswap-target.h | 22 ++++++++++++++++++++++ linux-user/elfload.c | 1 + linux-user/i386/signal.c | 1 + linux-user/ppc/signal.c | 1 + 13 files changed, 33 insertions(+), 8 deletions(-) create mode 100644 include/user/tswap-target.h diff --git a/MAINTAINERS b/MAINTAINERS index 96411e6adf..302b6fd00c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3692,6 +3692,7 @@ Overall usermode emulation M: Riku Voipio S: Maintained F: accel/tcg/user-exec*.c +F: include/exec/user/ F: include/user/ F: common-user/ diff --git a/bsd-user/freebsd/target_os_elf.h b/bsd-user/freebsd/target_os_elf.h index 9df17d56d8..01124979f7 100644 --- a/bsd-user/freebsd/target_os_elf.h +++ b/bsd-user/freebsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" #define bsd_get_ncpu() 1 /* until we pull in bsd-proc.[hc] */ diff --git a/bsd-user/freebsd/target_os_stack.h b/bsd-user/freebsd/target_os_stack.h index d15fc3263f..ac0ef22cd7 100644 --- a/bsd-user/freebsd/target_os_stack.h +++ b/bsd-user/freebsd/target_os_stack.h @@ -23,6 +23,7 @@ #include #include "target_arch_sigtramp.h" #include "qemu/guest-random.h" +#include "user/tswap-target.h" /* * The initial FreeBSD stack is as follows: diff --git a/bsd-user/netbsd/target_os_elf.h b/bsd-user/netbsd/target_os_elf.h index 2f3cb20871..9de0f290c0 100644 --- a/bsd-user/netbsd/target_os_elf.h +++ b/bsd-user/netbsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE diff --git a/bsd-user/openbsd/target_os_elf.h b/bsd-user/openbsd/target_os_elf.h index 6dca9c5a85..4cf5747dcd 100644 --- a/bsd-user/openbsd/target_os_elf.h +++ b/bsd-user/openbsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE diff --git a/bsd-user/signal.c b/bsd-user/signal.c index e5a773ddde..b2faf1d0dd 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu.h" +#include "user/tswap-target.h" #include "gdbstub/user.h" #include "signal-common.h" #include "trace.h" diff --git a/bsd-user/strace.c b/bsd-user/strace.c index 96499751eb..6dc01d3be7 100644 --- a/bsd-user/strace.c +++ b/bsd-user/strace.c @@ -22,6 +22,7 @@ #include #include "qemu.h" +#include "user/tswap-target.h" #include "os-strace.h" /* OS dependent strace print functions */ diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 7c44ffb3af..78848f018c 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -36,14 +36,6 @@ #define BSWAP_NEEDED #endif -#if TARGET_LONG_SIZE == 4 -#define tswapl(s) tswap32(s) -#define bswaptls(s) bswap32s(s) -#else -#define tswapl(s) tswap64(s) -#define bswaptls(s) bswap64s(s) -#endif - /* Target-endianness CPU memory access functions. These fit into the * {ld,st}{type}{sign}{size}{endian}_p naming scheme described in bswap.h. */ diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index db4a670328..731f345ff5 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -2,6 +2,7 @@ #define EXEC_USER_ABITYPES_H #include "cpu.h" +#include "user/tswap-target.h" #ifdef TARGET_ABI32 #define TARGET_ABI_BITS 32 diff --git a/include/user/tswap-target.h b/include/user/tswap-target.h new file mode 100644 index 0000000000..4719330dbb --- /dev/null +++ b/include/user/tswap-target.h @@ -0,0 +1,22 @@ +/* + * target-specific swap() definitions + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef USER_TSWAP_H +#define USER_TSWAP_H + +#include "exec/cpu-defs.h" +#include "exec/tswap.h" + +#if TARGET_LONG_SIZE == 4 +#define tswapl(s) tswap32(s) +#define bswaptls(s) bswap32s(s) +#else +#define tswapl(s) tswap64(s) +#define bswaptls(s) bswap64s(s) +#endif + +#endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index a0999dac15..207455c1ba 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -7,6 +7,7 @@ #include #include "qemu.h" +#include "user/tswap-target.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index cfe70fc5cf..990048f42a 100644 --- a/linux-user/i386/signal.c +++ b/linux-user/i386/signal.c @@ -21,6 +21,7 @@ #include "user-internals.h" #include "signal-common.h" #include "linux-user/trace.h" +#include "user/tswap-target.h" /* from the Linux kernel - /arch/x86/include/uapi/asm/sigcontext.h */ diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c index 652038a53c..a1d8c0bccc 100644 --- a/linux-user/ppc/signal.c +++ b/linux-user/ppc/signal.c @@ -21,6 +21,7 @@ #include "user-internals.h" #include "signal-common.h" #include "linux-user/trace.h" +#include "user/tswap-target.h" #include "vdso-asmoffset.h" /* See arch/powerpc/include/asm/ucontext.h. Only used for 32-bit PPC; From d25ddb3f543dda8189b19dafd0b9a972c331fade Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 5 Dec 2023 22:45:37 +0100 Subject: [PATCH 28/38] exec/user: Do not include 'cpu.h' in 'abitypes.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "exec/user/abitypes.h" requires: - "exec/cpu-defs.h" (TARGET_LONG_BITS) - "exec/tswap.h" (tswap32) In order to avoid "cpu.h", pick the minimum required headers. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231212123401.37493-20-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/user/abitypes.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index 731f345ff5..3ec1969368 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -1,7 +1,12 @@ #ifndef EXEC_USER_ABITYPES_H #define EXEC_USER_ABITYPES_H -#include "cpu.h" +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + +#include "exec/cpu-defs.h" +#include "exec/tswap.h" #include "user/tswap-target.h" #ifdef TARGET_ABI32 From 471558cb6e1dcda005a61f66516684262864fc9f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 5 Dec 2023 14:20:34 +0100 Subject: [PATCH 29/38] exec: Declare abi_ptr type in its own 'abi_ptr.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The abi_ptr type is declared in "exec/cpu_ldst.h" with all the load/store helpers. Some source files requiring abi_ptr type don't need the load/store helpers. In order to simplify, create a new "exec/abi_ptr.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231212123401.37493-21-philmd@linaro.org> --- include/exec/abi_ptr.h | 33 +++++++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 17 +++-------------- include/exec/exec-all.h | 1 + include/exec/translator.h | 5 ++++- 4 files changed, 41 insertions(+), 15 deletions(-) create mode 100644 include/exec/abi_ptr.h diff --git a/include/exec/abi_ptr.h b/include/exec/abi_ptr.h new file mode 100644 index 0000000000..2aedcceb0c --- /dev/null +++ b/include/exec/abi_ptr.h @@ -0,0 +1,33 @@ +/* + * QEMU abi_ptr type definitions + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef EXEC_ABI_PTR_H +#define EXEC_ABI_PTR_H + +#include "cpu-param.h" + +#if defined(CONFIG_USER_ONLY) +/* + * sparc32plus has 64bit long but 32bit space address + * this can make bad result with g2h() and h2g() + */ +#if TARGET_VIRT_ADDR_SPACE_BITS <= 32 +typedef uint32_t abi_ptr; +#define TARGET_ABI_FMT_ptr "%x" +#else +typedef uint64_t abi_ptr; +#define TARGET_ABI_FMT_ptr "%"PRIx64 +#endif + +#else /* !CONFIG_USER_ONLY */ + +#include "exec/target_long.h" + +typedef target_ulong abi_ptr; +#define TARGET_ABI_FMT_ptr TARGET_FMT_lx + +#endif /* !CONFIG_USER_ONLY */ + +#endif diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 82690d3947..64e0319996 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -63,20 +63,11 @@ #define CPU_LDST_H #include "exec/memopidx.h" +#include "exec/abi_ptr.h" #include "qemu/int128.h" #include "cpu.h" #if defined(CONFIG_USER_ONLY) -/* sparc32plus has 64bit long but 32bit space address - * this can make bad result with g2h() and h2g() - */ -#if TARGET_VIRT_ADDR_SPACE_BITS <= 32 -typedef uint32_t abi_ptr; -#define TARGET_ABI_FMT_ptr "%x" -#else -typedef uint64_t abi_ptr; -#define TARGET_ABI_FMT_ptr "%"PRIx64 -#endif #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) @@ -120,10 +111,8 @@ static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) assert(h2g_valid(x)); \ h2g_nocheck(x); \ }) -#else -typedef vaddr abi_ptr; -#define TARGET_ABI_FMT_ptr VADDR_PRIx -#endif + +#endif /* CONFIG_USER_ONLY */ uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9599e16a09..530d442112 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -22,6 +22,7 @@ #include "cpu.h" #if defined(CONFIG_USER_ONLY) +#include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif #include "exec/translation-block.h" diff --git a/include/exec/translator.h b/include/exec/translator.h index 2c4fb818e7..6cd937ac5c 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -19,7 +19,10 @@ */ #include "qemu/bswap.h" -#include "exec/cpu_ldst.h" /* for abi_ptr */ +#include "exec/cpu-common.h" +#include "exec/cpu-defs.h" +#include "exec/abi_ptr.h" +#include "cpu.h" /** * gen_intermediate_code From 9c1283dd76a4c21e1dd9d6a268f5d7383bbde77f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 26 Mar 2024 18:27:31 +0100 Subject: [PATCH 30/38] exec: Declare MMUAccessType type in 'mmu-access-type.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MMUAccessType enum is declared in "hw/core/cpu.h". "hw/core/cpu.h" contains declarations related to CPUState and CPUClass. Some source files only require MMUAccessType and don't need to pull in all CPU* declarations. In order to simplify, create a new "exec/mmu-access-type.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-2-philmd@linaro.org> --- include/exec/cpu_ldst.h | 1 + include/exec/exec-all.h | 1 + include/exec/mmu-access-type.h | 18 ++++++++++++++++++ include/hw/core/cpu.h | 8 +------- 4 files changed, 21 insertions(+), 7 deletions(-) create mode 100644 include/exec/mmu-access-type.h diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 64e0319996..5b99666702 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -64,6 +64,7 @@ #include "exec/memopidx.h" #include "exec/abi_ptr.h" +#include "exec/mmu-access-type.h" #include "qemu/int128.h" #include "cpu.h" diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 530d442112..4c5e470581 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -25,6 +25,7 @@ #include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif +#include "exec/mmu-access-type.h" #include "exec/translation-block.h" #include "qemu/clang-tsa.h" diff --git a/include/exec/mmu-access-type.h b/include/exec/mmu-access-type.h new file mode 100644 index 0000000000..28bbb05b94 --- /dev/null +++ b/include/exec/mmu-access-type.h @@ -0,0 +1,18 @@ +/* + * QEMU MMU Access type definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_MMU_ACCESS_TYPE_H +#define EXEC_MMU_ACCESS_TYPE_H + +typedef enum MMUAccessType { + MMU_DATA_LOAD = 0, + MMU_DATA_STORE = 1, + MMU_INST_FETCH = 2 +#define MMU_ACCESS_COUNT 3 +} MMUAccessType; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d89b2cffcb..759c3e7d89 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -25,6 +25,7 @@ #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" +#include "exec/mmu-access-type.h" #include "exec/tlb-common.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" @@ -80,13 +81,6 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU, typedef struct ArchCPU CpuInstanceType; \ OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME); -typedef enum MMUAccessType { - MMU_DATA_LOAD = 0, - MMU_DATA_STORE = 1, - MMU_INST_FETCH = 2 -#define MMU_ACCESS_COUNT 3 -} MMUAccessType; - typedef struct CPUWatchpoint CPUWatchpoint; /* see accel-cpu.h */ From 6ce1c9d08554c70da6ca7262b00361d8bdc1705b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 26 Mar 2024 18:37:25 +0100 Subject: [PATCH 31/38] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20240418192525.97451-3-philmd@linaro.org> --- include/exec/breakpoint.h | 30 ++++++++++++++++++++++++++++++ include/hw/core/cpu.h | 16 +--------------- target/arm/internals.h | 1 + target/ppc/internal.h | 1 + target/riscv/debug.h | 2 ++ 5 files changed, 35 insertions(+), 15 deletions(-) create mode 100644 include/exec/breakpoint.h diff --git a/include/exec/breakpoint.h b/include/exec/breakpoint.h new file mode 100644 index 0000000000..95f0482e6d --- /dev/null +++ b/include/exec/breakpoint.h @@ -0,0 +1,30 @@ +/* + * QEMU breakpoint & watchpoint definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_BREAKPOINT_H +#define EXEC_BREAKPOINT_H + +#include "qemu/queue.h" +#include "exec/vaddr.h" +#include "exec/memattrs.h" + +typedef struct CPUBreakpoint { + vaddr pc; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUBreakpoint) entry; +} CPUBreakpoint; + +typedef struct CPUWatchpoint { + vaddr vaddr; + vaddr len; + vaddr hitaddr; + MemTxAttrs hitattrs; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 759c3e7d89..46b99a7ea5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -22,6 +22,7 @@ #include "hw/qdev-core.h" #include "disas/dis-asm.h" +#include "exec/breakpoint.h" #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" @@ -347,21 +348,6 @@ typedef struct CPUNegativeOffsetState { bool can_do_io; } CPUNegativeOffsetState; -typedef struct CPUBreakpoint { - vaddr pc; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUBreakpoint) entry; -} CPUBreakpoint; - -struct CPUWatchpoint { - vaddr vaddr; - vaddr len; - vaddr hitaddr; - MemTxAttrs hitattrs; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUWatchpoint) entry; -}; - struct KVMState; struct kvm_run; diff --git a/target/arm/internals.h b/target/arm/internals.h index b53f5e8ff2..e40ec453d5 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -25,6 +25,7 @@ #ifndef TARGET_ARM_INTERNALS_H #define TARGET_ARM_INTERNALS_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" #include "tcg/tcg-gvec-desc.h" #include "syndrome.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5b20ecbd33..601c0b533f 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -18,6 +18,7 @@ #ifndef PPC_INTERNAL_H #define PPC_INTERNAL_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" /* PM instructions */ diff --git a/target/riscv/debug.h b/target/riscv/debug.h index 5794aa6ee5..c347863578 100644 --- a/target/riscv/debug.h +++ b/target/riscv/debug.h @@ -22,6 +22,8 @@ #ifndef RISCV_DEBUG_H #define RISCV_DEBUG_H +#include "exec/breakpoint.h" + #define RV_MAX_TRIGGERS 2 /* register index of tdata CSRs */ From 43bc8a6f1a5aa69b815548ab79ec2ff38812135e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 3 Apr 2024 12:32:14 +0200 Subject: [PATCH 32/38] exec: Restrict TCG specific declarations of 'cputlb.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Avoid TCG specific declarations being used from non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-5-philmd@linaro.org> --- include/exec/cputlb.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 6da1462c4f..ef18642a32 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -22,9 +22,14 @@ #include "exec/cpu-common.h" +#ifdef CONFIG_TCG + #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); #endif + +#endif /* CONFIG_TCG */ + #endif From 1ce871a3e7dd3913752966064c406c08193aa992 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 3 Apr 2024 13:55:51 +0200 Subject: [PATCH 33/38] exec: Restrict 'cpu_ldst.h' to TCG accelerator MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "exec/cpu_ldst.h" is specific to TCG, do not allow its inclusion from other accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-6-philmd@linaro.org> --- include/exec/cpu_ldst.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5b99666702..f3c2a3ca74 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -1,5 +1,5 @@ /* - * Software MMU support + * Software MMU support (per-target) * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public @@ -62,6 +62,10 @@ #ifndef CPU_LDST_H #define CPU_LDST_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/memopidx.h" #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" From d3cbde7402fa44b1be898df0e13257e6fc399974 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 26 Mar 2024 12:27:29 +0100 Subject: [PATCH 34/38] exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The include/user/ directory contains the user-emulation specific headers. Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20240418192525.97451-15-philmd@linaro.org> --- include/exec/cpu-all.h | 2 +- include/{exec => }/user/guest-base.h | 4 ++-- tcg/tcg.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename include/{exec => }/user/guest-base.h (72%) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 78848f018c..027f19e052 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,7 +65,7 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "exec/user/guest-base.h" +#include "user/guest-base.h" extern bool have_guest_base; diff --git a/include/exec/user/guest-base.h b/include/user/guest-base.h similarity index 72% rename from include/exec/user/guest-base.h rename to include/user/guest-base.h index afe2ab7fbb..1e42bca5db 100644 --- a/include/exec/user/guest-base.h +++ b/include/user/guest-base.h @@ -4,8 +4,8 @@ * Copyright (c) 2003 Fabrice Bellard */ -#ifndef EXEC_USER_GUEST_BASE_H -#define EXEC_USER_GUEST_BASE_H +#ifndef USER_GUEST_BASE_H +#define USER_GUEST_BASE_H extern uintptr_t guest_base; diff --git a/tcg/tcg.c b/tcg/tcg.c index 0c0bb9d169..6a32656cd4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -57,7 +57,7 @@ #include "tcg-internal.h" #include "tcg/perf.h" #ifdef CONFIG_USER_ONLY -#include "exec/user/guest-base.h" +#include "user/guest-base.h" #endif /* Forward declarations for functions declared in tcg-target.c.inc and From 16aa8eaaace3f8eb2d14521705fdccab518388a3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 11 Dec 2023 21:51:26 +0100 Subject: [PATCH 35/38] exec: Restrict inclusion of 'user/guest-base.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Declare 'have_guest_base' in "user/guest-base.h". Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson --- bsd-user/main.c | 1 + include/exec/cpu-all.h | 3 --- include/exec/cpu_ldst.h | 2 ++ include/user/guest-base.h | 6 ++++++ linux-user/elfload.c | 1 + linux-user/main.c | 1 + 6 files changed, 11 insertions(+), 3 deletions(-) diff --git a/bsd-user/main.c b/bsd-user/main.c index 01b313756e..29a629d877 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -36,6 +36,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "exec/exec-all.h" +#include "user/guest-base.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 027f19e052..e75ec13cd0 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,9 +65,6 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "user/guest-base.h" - -extern bool have_guest_base; /* * If non-zero, the guest virtual address space is a contiguous subset diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index f3c2a3ca74..7d0a0412ad 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -74,6 +74,8 @@ #if defined(CONFIG_USER_ONLY) +#include "user/guest-base.h" + #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) { diff --git a/include/user/guest-base.h b/include/user/guest-base.h index 1e42bca5db..055c1d14fe 100644 --- a/include/user/guest-base.h +++ b/include/user/guest-base.h @@ -7,6 +7,12 @@ #ifndef USER_GUEST_BASE_H #define USER_GUEST_BASE_H +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + extern uintptr_t guest_base; +extern bool have_guest_base; + #endif diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 207455c1ba..f9461d2844 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -8,6 +8,7 @@ #include "qemu.h" #include "user/tswap-target.h" +#include "user/guest-base.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/main.c b/linux-user/main.c index 149e35432e..94e4c47f05 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -38,6 +38,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "qemu/plugin.h" +#include "user/guest-base.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" #include "gdbstub/user.h" From aacfd8bbaf99444f84b408e6b052651fb8056c41 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 3 Apr 2024 14:13:18 +0200 Subject: [PATCH 36/38] exec: Move CPUTLBEntry helpers to cputlb.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-13-philmd@linaro.org> --- accel/tcg/cputlb.c | 51 ++++++++++++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 55 ----------------------------------------- 2 files changed, 51 insertions(+), 55 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index e16d02a62c..953c437ba9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -27,6 +27,9 @@ #include "exec/tb-flush.h" #include "exec/memory-internal.h" #include "exec/ram_addr.h" +#include "exec/mmu-access-type.h" +#include "exec/tlb-common.h" +#include "exec/vaddr.h" #include "tcg/tcg.h" #include "qemu/error-report.h" #include "exec/log.h" @@ -95,6 +98,54 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast) return fast->mask + (1 << CPU_TLB_ENTRY_BITS); } +static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, + MMUAccessType access_type) +{ + /* Do not rearrange the CPUTLBEntry structure members. */ + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != + MMU_DATA_LOAD * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != + MMU_DATA_STORE * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != + MMU_INST_FETCH * sizeof(uint64_t)); + +#if TARGET_LONG_BITS == 32 + /* Use qatomic_read, in case of addr_write; only care about low bits. */ + const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; + ptr += HOST_BIG_ENDIAN; + return qatomic_read(ptr); +#else + const uint64_t *ptr = &entry->addr_idx[access_type]; +# if TCG_OVERSIZED_GUEST + return *ptr; +# else + /* ofs might correspond to .addr_write, so use qatomic_read */ + return qatomic_read(ptr); +# endif +#endif +} + +static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) +{ + return tlb_read_idx(entry, MMU_DATA_STORE); +} + +/* Find the TLB index corresponding to the mmu_idx + address pair. */ +static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; + + return (addr >> TARGET_PAGE_BITS) & size_mask; +} + +/* Find the TLB entry corresponding to the mmu_idx + address pair. */ +static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; +} + static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, size_t max_entries) { diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 7d0a0412ad..11ba3778ba 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -70,7 +70,6 @@ #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" #include "qemu/int128.h" -#include "cpu.h" #if defined(CONFIG_USER_ONLY) @@ -296,60 +295,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if !defined(CONFIG_USER_ONLY) - -#include "tcg/oversized-guest.h" - -static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, - MMUAccessType access_type) -{ - /* Do not rearrange the CPUTLBEntry structure members. */ - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != - MMU_DATA_LOAD * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != - MMU_DATA_STORE * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != - MMU_INST_FETCH * sizeof(uint64_t)); - -#if TARGET_LONG_BITS == 32 - /* Use qatomic_read, in case of addr_write; only care about low bits. */ - const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; - ptr += HOST_BIG_ENDIAN; - return qatomic_read(ptr); -#else - const uint64_t *ptr = &entry->addr_idx[access_type]; -# if TCG_OVERSIZED_GUEST - return *ptr; -# else - /* ofs might correspond to .addr_write, so use qatomic_read */ - return qatomic_read(ptr); -# endif -#endif -} - -static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) -{ - return tlb_read_idx(entry, MMU_DATA_STORE); -} - -/* Find the TLB index corresponding to the mmu_idx + address pair. */ -static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; - - return (addr >> TARGET_PAGE_BITS) & size_mask; -} - -/* Find the TLB entry corresponding to the mmu_idx + address pair. */ -static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; -} - -#endif /* !defined(CONFIG_USER_ONLY) */ - #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data From 76d07d321fad2e05f8a86243724f91577c5f94c6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 26 Mar 2024 18:38:02 +0100 Subject: [PATCH 37/38] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only include what is required, avoiding the full CPUState API from the huge "hw/core/cpu.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-4-philmd@linaro.org> --- include/hw/core/tcg-cpu-ops.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index dc1f16a977..9387d38748 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -10,7 +10,11 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H -#include "hw/core/cpu.h" +#include "exec/breakpoint.h" +#include "exec/hwaddr.h" +#include "exec/memattrs.h" +#include "exec/mmu-access-type.h" +#include "exec/vaddr.h" struct TCGCPUOps { /** From 671558d290ffb93752d3245e7c5604b04b6dcdf2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 18 Apr 2024 16:32:01 +0200 Subject: [PATCH 38/38] plugins: Include missing 'qemu/bitmap.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit c006147122 ("plugins: create CPUPluginState and migrate plugin_mask") "qemu/plugin.h" uses DECLARE_BITMAP(), which is declared in "qemu/bitmap.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240418192525.97451-19-philmd@linaro.org> --- include/qemu/plugin.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 12a96cea2a..41db748eda 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -13,6 +13,7 @@ #include "qemu/queue.h" #include "qemu/option.h" #include "qemu/plugin-event.h" +#include "qemu/bitmap.h" #include "exec/memopidx.h" #include "hw/core/cpu.h"