mirror of https://github.com/xemu-project/xemu.git
cmdline init fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@956 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
f2aa58c6f4
commit
fd0bbb12c3
35
hw/ppc.c
35
hw/ppc.c
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@ -22,6 +22,7 @@
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* THE SOFTWARE.
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* THE SOFTWARE.
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*/
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*/
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#include "vl.h"
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#include "vl.h"
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#include "m48t59.h"
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/*****************************************************************************/
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/*****************************************************************************/
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/* PPC time base and decrementer emulation */
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/* PPC time base and decrementer emulation */
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@ -109,7 +110,7 @@ uint32_t cpu_ppc_load_decr (CPUState *env)
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decr = muldiv64(tb_env->decr_next - qemu_get_clock(vm_clock),
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decr = muldiv64(tb_env->decr_next - qemu_get_clock(vm_clock),
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tb_env->tb_freq, ticks_per_sec);
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tb_env->tb_freq, ticks_per_sec);
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#ifdef DEBUG_TB
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#if defined(DEBUG_TB)
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printf("%s: 0x%08x\n", __func__, decr);
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printf("%s: 0x%08x\n", __func__, decr);
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#endif
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#endif
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@ -257,7 +258,7 @@ CPUReadMemoryFunc *PPC_io_read[] = {
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/*****************************************************************************/
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/*****************************************************************************/
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/* Debug port */
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/* Debug port */
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void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val)
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void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val)
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{
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{
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addr &= 0xF;
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addr &= 0xF;
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switch (addr) {
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switch (addr) {
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@ -270,7 +271,7 @@ void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val)
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break;
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break;
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case 2:
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case 2:
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printf("Set loglevel to %04x\n", val);
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printf("Set loglevel to %04x\n", val);
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cpu_set_log(val);
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cpu_set_log(val | 0x100);
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break;
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break;
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}
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}
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}
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}
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@ -397,13 +398,16 @@ uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count)
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return crc;
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return crc;
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}
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}
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#define CMDLINE_ADDR 0x017ff000
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int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
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int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
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const unsigned char *arch,
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const unsigned char *arch,
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uint32_t RAM_size, int boot_device,
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uint32_t RAM_size, int boot_device,
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uint32_t kernel_image, uint32_t kernel_size,
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uint32_t kernel_image, uint32_t kernel_size,
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uint32_t cmdline, uint32_t cmdline_size,
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const char *cmdline,
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uint32_t initrd_image, uint32_t initrd_size,
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uint32_t initrd_image, uint32_t initrd_size,
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uint32_t NVRAM_image)
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uint32_t NVRAM_image,
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int width, int height, int depth)
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{
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{
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uint16_t crc;
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uint16_t crc;
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@ -416,13 +420,24 @@ int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
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NVRAM_set_byte(nvram, 0x34, boot_device);
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NVRAM_set_byte(nvram, 0x34, boot_device);
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NVRAM_set_lword(nvram, 0x38, kernel_image);
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NVRAM_set_lword(nvram, 0x38, kernel_image);
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NVRAM_set_lword(nvram, 0x3C, kernel_size);
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NVRAM_set_lword(nvram, 0x3C, kernel_size);
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NVRAM_set_lword(nvram, 0x40, cmdline);
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if (cmdline) {
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NVRAM_set_lword(nvram, 0x44, cmdline_size);
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/* XXX: put the cmdline in NVRAM too ? */
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strcpy(phys_ram_base + CMDLINE_ADDR, cmdline);
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NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR);
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NVRAM_set_lword(nvram, 0x44, strlen(cmdline));
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} else {
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NVRAM_set_lword(nvram, 0x40, 0);
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NVRAM_set_lword(nvram, 0x44, 0);
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}
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NVRAM_set_lword(nvram, 0x48, initrd_image);
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NVRAM_set_lword(nvram, 0x48, initrd_image);
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NVRAM_set_lword(nvram, 0x4C, initrd_size);
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NVRAM_set_lword(nvram, 0x4C, initrd_size);
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NVRAM_set_lword(nvram, 0x50, NVRAM_image);
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NVRAM_set_lword(nvram, 0x50, NVRAM_image);
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crc = NVRAM_compute_crc(nvram, 0x00, 0x5C);
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NVRAM_set_word(nvram, 0x5C, crc);
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NVRAM_set_word(nvram, 0x54, width);
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NVRAM_set_word(nvram, 0x56, height);
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NVRAM_set_word(nvram, 0x58, depth);
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crc = NVRAM_compute_crc(nvram, 0x00, 0xF8);
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NVRAM_set_word(nvram, 0xFC, crc);
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return 0;
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return 0;
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}
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}
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@ -442,4 +457,6 @@ void ppc_init (int ram_size, int vga_ram_size, int boot_device,
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snapshot, kernel_filename, kernel_cmdline,
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snapshot, kernel_filename, kernel_cmdline,
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initrd_filename);
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initrd_filename);
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}
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}
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/* Special port to get debug messages from Open-Firmware */
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register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
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}
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}
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