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hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl 

This adds code to instantiate the slightly extended ACPI root port
description in DSDT as per the CXL 2.0 specification.

Basically a cut and paste job from the i386/pc code.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220429144110.25167-30-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jonathan Cameron 2022-04-29 15:40:54 +01:00 committed by Michael S. Tsirkin
parent 21df6ab97f
commit fc1e01e009
2 changed files with 18 additions and 3 deletions
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1
hw/arm/Kconfig
View File

@ -29,6 +29,7 @@ config ARM_VIRT
select ACPI_APEI select ACPI_APEI
select ACPI_VIOT select ACPI_VIOT
select VIRTIO_MEM_SUPPORTED select VIRTIO_MEM_SUPPORTED
select ACPI_CXL
config CHEETAH config CHEETAH
bool bool

14
hw/pci-host/gpex-acpi.c
View File

@ -5,6 +5,7 @@
#include "hw/pci/pci_bus.h" #include "hw/pci/pci_bus.h"
#include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bridge.h"
#include "hw/pci/pcie_host.h" #include "hw/pci/pcie_host.h"
#include "hw/acpi/cxl.h"
static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq) static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
{ {
@ -139,6 +140,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
QLIST_FOREACH(bus, &bus->child, sibling) { QLIST_FOREACH(bus, &bus->child, sibling) {
uint8_t bus_num = pci_bus_num(bus); uint8_t bus_num = pci_bus_num(bus);
uint8_t numa_node = pci_bus_numa_node(bus); uint8_t numa_node = pci_bus_numa_node(bus);
bool is_cxl = pci_bus_is_cxl(bus);
if (!pci_bus_is_root(bus)) { if (!pci_bus_is_root(bus)) {
continue; continue;
@ -154,8 +156,16 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
} }
dev = aml_device("PC%.02X", bus_num); dev = aml_device("PC%.02X", bus_num);
if (is_cxl) {
struct Aml *pkg = aml_package(2);
aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0016")));
aml_append(pkg, aml_eisaid("PNP0A08"));
aml_append(pkg, aml_eisaid("PNP0A03"));
aml_append(dev, aml_name_decl("_CID", pkg));
} else {
aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A08"))); aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A08")));
aml_append(dev, aml_name_decl("_CID", aml_string("PNP0A03"))); aml_append(dev, aml_name_decl("_CID", aml_string("PNP0A03")));
}
aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num))); aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num)));
aml_append(dev, aml_name_decl("_UID", aml_int(bus_num))); aml_append(dev, aml_name_decl("_UID", aml_int(bus_num)));
aml_append(dev, aml_name_decl("_STR", aml_unicode("pxb Device"))); aml_append(dev, aml_name_decl("_STR", aml_unicode("pxb Device")));
@ -175,7 +185,11 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
cfg->pio.base, 0, 0, 0); cfg->pio.base, 0, 0, 0);
aml_append(dev, aml_name_decl("_CRS", crs)); aml_append(dev, aml_name_decl("_CRS", crs));
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
acpi_dsdt_add_pci_osc(dev); acpi_dsdt_add_pci_osc(dev);
}
aml_append(scope, dev); aml_append(scope, dev);
} }