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target-arm: Silence NaNs resulting from half-precision conversions 

Silence the NaNs that may result from half-precision conversion,
as we do for the other conversions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Peter Maydell 2011-02-10 11:29:00 +00:00 committed by Aurelien Jarno
parent f591e1bedf
commit fb91678d2c
1 changed files with 10 additions and 2 deletions
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12
target-arm/helper.c
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@ -2627,14 +2627,22 @@ float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, CPUState *env)
{ {
float_status *s = &env->vfp.fp_status; float_status *s = &env->vfp.fp_status;
int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
return float16_to_float32(make_float16(a), ieee, s); float32 r = float16_to_float32(make_float16(a), ieee, s);
if (ieee) {
return float32_maybe_silence_nan(r);
}
return r;
} }
uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, CPUState *env) uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, CPUState *env)
{ {
float_status *s = &env->vfp.fp_status; float_status *s = &env->vfp.fp_status;
int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
return float16_val(float32_to_float16(a, ieee, s)); float16 r = float32_to_float16(a, ieee, s);
if (ieee) {
r = float16_maybe_silence_nan(r);
}
return float16_val(r);
} }
float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env) float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env)