ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target/ppc: implement vclrrb 

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-17-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Matheus Ferst 2022-03-02 06:51:37 +01:00 committed by Cédric Le Goater
parent 08d512e1b9
commit fb1b56752f
2 changed files with 25 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/ppc/insn32.decode
View File

@ -530,6 +530,7 @@ VSTRIHL 000100 ..... 00010 ..... . 0000001101 @VX_tb_rc
VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc
VCLRLB 000100 ..... ..... ..... 00110001101 @VX VCLRLB 000100 ..... ..... ..... 00110001101 @VX
VCLRRB 000100 ..... ..... ..... 00111001101 @VX
# VSX Load/Store Instructions # VSX Load/Store Instructions

32
target/ppc/translate/vmx-impl.c.inc
View File

@ -1940,7 +1940,7 @@ TRANS(VSTRIBR, do_vstri, gen_helper_VSTRIBR)
TRANS(VSTRIHL, do_vstri, gen_helper_VSTRIHL) TRANS(VSTRIHL, do_vstri, gen_helper_VSTRIHL)
TRANS(VSTRIHR, do_vstri, gen_helper_VSTRIHR) TRANS(VSTRIHR, do_vstri, gen_helper_VSTRIHR)
static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a) static bool do_vclrb(DisasContext *ctx, arg_VX *a, bool right)
{ {
TCGv_i64 rb, mh, ml, tmp, TCGv_i64 rb, mh, ml, tmp,
ones = tcg_constant_i64(-1), ones = tcg_constant_i64(-1),
@ -1954,15 +1954,28 @@ static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a)
tcg_gen_extu_tl_i64(rb, cpu_gpr[a->vrb]); tcg_gen_extu_tl_i64(rb, cpu_gpr[a->vrb]);
tcg_gen_andi_i64(tmp, rb, 7); tcg_gen_andi_i64(tmp, rb, 7);
tcg_gen_shli_i64(tmp, tmp, 3); tcg_gen_shli_i64(tmp, tmp, 3);
tcg_gen_shl_i64(tmp, ones, tmp); if (right) {
tcg_gen_shr_i64(tmp, ones, tmp);
} else {
tcg_gen_shl_i64(tmp, ones, tmp);
}
tcg_gen_not_i64(tmp, tmp); tcg_gen_not_i64(tmp, tmp);
tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8), if (right) {
tmp, ones); tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8),
tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8), tmp, ones);
zero, tmp); tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8),
tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(16), zero, tmp);
mh, ones); tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(16),
ml, ones);
} else {
tcg_gen_movcond_i64(TCG_COND_LTU, ml, rb, tcg_constant_i64(8),
tmp, ones);
tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(8),
zero, tmp);
tcg_gen_movcond_i64(TCG_COND_LTU, mh, rb, tcg_constant_i64(16),
mh, ones);
}
get_avr64(tmp, a->vra, true); get_avr64(tmp, a->vra, true);
tcg_gen_and_i64(tmp, tmp, mh); tcg_gen_and_i64(tmp, tmp, mh);
@ -1980,6 +1993,9 @@ static bool trans_VCLRLB(DisasContext *ctx, arg_VX *a)
return true; return true;
} }
TRANS(VCLRLB, do_vclrb, false)
TRANS(VCLRRB, do_vclrb, true)
#define GEN_VAFORM_PAIRED(name0, name1, opc2) \ #define GEN_VAFORM_PAIRED(name0, name1, opc2) \
static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
{ \ { \