mirror of https://github.com/xemu-project/xemu.git
fix
This commit is contained in:
espes
parent
7c62d7c199
commit
faca5dd0fe
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@ -842,16 +842,16 @@ static DMAObject nv_dma_load(NV2AState *d, hwaddr dma_obj_address)
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static void *nv_dma_map(NV2AState *d, hwaddr dma_obj_address, hwaddr *len)
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{
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assert(dma_obj_address < memory_region_size(&d->ramin));
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DMAObject dma = nv_dma_load(d, dma_obj_address);
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/* TODO: Handle targets and classes properly */
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NV2A_DPRINTF("dma_map %x, %x, %" HWADDR_PRIx " %" HWADDR_PRIx "\n",
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NV2A_DPRINTF("dma_map %" HWADDR_PRIx " - %x, %x, %" HWADDR_PRIx " %" HWADDR_PRIx "\n",
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dma_obj_address,
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dma.dma_class, dma.dma_target, dma.address, dma.limit);
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dma.address &= 0x07FFFFFF;
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assert(dma.address < memory_region_size(d->vram));
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// assert(dma.address + dma.limit < memory_region_size(d->vram));
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*len = dma.limit;
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return d->vram_ptr + dma.address;
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@ -1533,9 +1533,9 @@ static void pgraph_bind_textures(NV2AState *d)
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continue;
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}
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NV2A_DPRINTF(" texture %d is format 0x%x, (r %d, %d or %d, %d, %d; %d%s),"
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NV2A_DPRINTF(" texture %d is format 0x%x, off 0x%x (r %d, %d or %d, %d, %d; %d%s),"
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" filter %x %x, levels %d-%d %d bias %d\n",
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i, color_format,
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i, color_format, offset,
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rect_width, rect_height,
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1 << log_width, 1 << log_height, 1 << log_depth,
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pitch,
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@ -2741,6 +2741,8 @@ static void pgraph_method(NV2AState *d,
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ImageBlitState *image_blit = &pg->image_blit;
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KelvinState *kelvin = &pg->kelvin;
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assert(subchannel < 8);
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if (method == NV_SET_OBJECT) {
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assert(parameter < memory_region_size(&d->ramin));
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uint8_t *obj_ptr = d->ramin_ptr + parameter;
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@ -2751,13 +2753,6 @@ static void pgraph_method(NV2AState *d,
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uint32_t ctx_4 = ldl_le_p((uint32_t*)(obj_ptr+12));
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uint32_t ctx_5 = parameter;
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pg->regs[NV_PGRAPH_CTX_SWITCH1] = ctx_1;
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pg->regs[NV_PGRAPH_CTX_SWITCH2] = ctx_2;
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pg->regs[NV_PGRAPH_CTX_SWITCH3] = ctx_3;
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pg->regs[NV_PGRAPH_CTX_SWITCH4] = ctx_4;
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pg->regs[NV_PGRAPH_CTX_SWITCH5] = ctx_5;
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assert(subchannel < 8);
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pg->regs[NV_PGRAPH_CTX_CACHE1 + subchannel * 4] = ctx_1;
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pg->regs[NV_PGRAPH_CTX_CACHE2 + subchannel * 4] = ctx_2;
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pg->regs[NV_PGRAPH_CTX_CACHE3 + subchannel * 4] = ctx_3;
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@ -2765,11 +2760,24 @@ static void pgraph_method(NV2AState *d,
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pg->regs[NV_PGRAPH_CTX_CACHE5 + subchannel * 4] = ctx_5;
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}
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// is this right?
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pg->regs[NV_PGRAPH_CTX_SWITCH1] = pg->regs[NV_PGRAPH_CTX_CACHE1 + subchannel * 4];
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pg->regs[NV_PGRAPH_CTX_SWITCH2] = pg->regs[NV_PGRAPH_CTX_CACHE2 + subchannel * 4];
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pg->regs[NV_PGRAPH_CTX_SWITCH3] = pg->regs[NV_PGRAPH_CTX_CACHE3 + subchannel * 4];
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pg->regs[NV_PGRAPH_CTX_SWITCH4] = pg->regs[NV_PGRAPH_CTX_CACHE4 + subchannel * 4];
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pg->regs[NV_PGRAPH_CTX_SWITCH5] = pg->regs[NV_PGRAPH_CTX_CACHE5 + subchannel * 4];
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uint32_t graphics_class = GET_MASK(pg->regs[NV_PGRAPH_CTX_SWITCH1],
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NV_PGRAPH_CTX_SWITCH1_GRCLASS);
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// NV2A_DPRINTF("graphics_class %d 0x%x\n", subchannel, graphics_class);
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pgraph_method_log(subchannel, graphics_class, method, parameter);
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if (subchannel != 0) {
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// catches context switching issues on xbox d3d
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assert(graphics_class != 0x97);
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}
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/* ugly switch for now */
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switch (graphics_class) {
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@ -2901,19 +2909,13 @@ static void pgraph_method(NV2AState *d,
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if (parameter != 0) {
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assert(!(pg->pending_interrupts & NV_PGRAPH_INTR_ERROR));
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// qqq
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// pg->trapped_channel_id = pg->channel_id;
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SET_MASK(pg->regs[NV_PGRAPH_TRAPPED_ADDR],
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NV_PGRAPH_TRAPPED_ADDR_CHID, channel_id);
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// pg->trapped_subchannel = subchannel;
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SET_MASK(pg->regs[NV_PGRAPH_TRAPPED_ADDR],
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NV_PGRAPH_TRAPPED_ADDR_SUBCH, subchannel);
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// pg->trapped_method = method;
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SET_MASK(pg->regs[NV_PGRAPH_TRAPPED_ADDR],
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NV_PGRAPH_TRAPPED_ADDR_MTHD, method);
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// pg->trapped_data[0] = parameter;
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pg->regs[NV_PGRAPH_TRAPPED_DATA_LOW] = parameter;
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// pg->notify_source = NV_PGRAPH_NSOURCE_NOTIFICATION; /* TODO: check this */
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pg->regs[NV_PGRAPH_NSOURCE] = NV_PGRAPH_NSOURCE_NOTIFICATION; /* TODO: check this */
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pg->pending_interrupts |= NV_PGRAPH_INTR_ERROR;
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@ -4898,11 +4900,13 @@ static void pfifo_run_puller(NV2AState *d)
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uint32_t method = method_entry & 0x1FFC;
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uint32_t subchannel = GET_MASK(method_entry, NV_PFIFO_CACHE1_METHOD_SUBCHANNEL);
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// NV2A_DPRINTF("pull %d 0x%x 0x%x - subch %d\n", get/4, method_entry, parameter, subchannel);
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if (method == 0) {
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RAMHTEntry entry = ramht_lookup(d, parameter);
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assert(entry.valid);
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// assert(entry.channel_id == state->channel_id); PPP
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// assert(entry.channel_id == state->channel_id);
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assert(entry.engine == ENGINE_GRAPHICS);
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@ -4911,9 +4915,10 @@ static void pfifo_run_puller(NV2AState *d)
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assert(subchannel < 8);
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SET_MASK(*engine_reg, 3 << (4*subchannel), entry.engine);
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SET_MASK(*pull1, NV_PFIFO_CACHE1_PULL1_ENGINE, entry.engine);
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// NV2A_DPRINTF("engine_reg1 %d 0x%x\n", subchannel, *engine_reg);
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// QQQ
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// TODO: this is fucked
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qemu_mutex_lock(&d->pgraph.lock);
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//make pgraph busy
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qemu_mutex_unlock(&d->pfifo.lock);
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@ -4926,7 +4931,6 @@ static void pfifo_run_puller(NV2AState *d)
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qemu_mutex_unlock(&d->pgraph.lock);
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qemu_mutex_lock(&d->pfifo.lock);
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} else if (method >= 0x100) {
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// method passed to engine
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@ -4942,6 +4946,7 @@ static void pfifo_run_puller(NV2AState *d)
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}
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enum FIFOEngine engine = GET_MASK(*engine_reg, 3 << (4*subchannel));
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// NV2A_DPRINTF("engine_reg2 %d 0x%x\n", subchannel, *engine_reg);
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assert(engine == ENGINE_GRAPHICS);
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SET_MASK(*pull1, NV_PFIFO_CACHE1_PULL1_ENGINE, engine);
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@ -5186,6 +5191,8 @@ static void pfifo_run_pusher(NV2AState *d)
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SET_MASK(method_entry, NV_PFIFO_CACHE1_METHOD_TYPE, method_type);
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SET_MASK(method_entry, NV_PFIFO_CACHE1_METHOD_SUBCHANNEL, method_subchannel);
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// NV2A_DPRINTF("push %d 0x%x 0x%x - subch %d\n", put/4, method_entry, word, method_subchannel);
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assert(put < 128*4 && (put%4) == 0);
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d->pfifo.regs[NV_PFIFO_CACHE1_METHOD + put*2] = method_entry;
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d->pfifo.regs[NV_PFIFO_CACHE1_DATA + put*2] = word;
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@ -21,7 +21,7 @@
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#ifndef HW_NV2A_DEBUG_H
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#define HW_NV2A_DEBUG_H
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#define DEBUG_NV2A
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// #define DEBUG_NV2A
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#ifdef DEBUG_NV2A
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# define NV2A_DPRINTF(format, ...) printf("nv2a: " format, ## __VA_ARGS__)
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#else
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