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target/mips: Add !CONFIG_USER_ONLY comment after #endif
To help understand ifdef'ry, add comment after #endif. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201214183739.500368-4-f4bug@amsat.org>
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@ -455,7 +455,8 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val)
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}
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}
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}
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#endif
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#endif /* !CONFIG_USER_ONLY */
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static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
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int rw, int tlb_error)
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@ -537,6 +538,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
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}
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#if !defined(CONFIG_USER_ONLY)
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hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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{
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MIPSCPU *cpu = MIPS_CPU(cs);
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@ -550,7 +552,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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}
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return phys_addr;
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}
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#endif
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#endif /* !CONFIG_USER_ONLY */
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(TARGET_MIPS64)
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@ -886,7 +888,7 @@ refill:
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return true;
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}
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#endif
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#endif
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#endif /* !CONFIG_USER_ONLY */
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bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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@ -1088,7 +1090,8 @@ static inline void set_badinstr_registers(CPUMIPSState *env)
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env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4);
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}
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}
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#endif
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#endif /* !CONFIG_USER_ONLY */
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void mips_cpu_do_interrupt(CPUState *cs)
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{
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@ -1482,7 +1485,7 @@ void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
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}
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}
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}
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#endif
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#endif /* !CONFIG_USER_ONLY */
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void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
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uint32_t exception,
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