mirror of https://github.com/xemu-project/xemu.git
nv2a: Fix device reset
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parent
42f9b28ce1
commit
f93c7b4ea3
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@ -430,29 +430,48 @@ static void nv2a_init_memory(NV2AState *d, MemoryRegion *ram)
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d, QEMU_THREAD_JOINABLE);
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}
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static void nv2a_reset(NV2AState *d)
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{
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qemu_mutex_lock(&d->pfifo.lock);
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qemu_mutex_lock(&d->pgraph.lock);
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memset(d->pfifo.regs, 0, sizeof(d->pfifo.regs));
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memset(d->pgraph.regs, 0, sizeof(d->pgraph.regs));
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d->pcrtc.start = 0;
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d->pramdac.core_clock_coeff = 0x00011c01; /* 189MHz...? */
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d->pramdac.core_clock_freq = 189000000;
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d->pramdac.memory_clock_coeff = 0;
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d->pramdac.video_clock_coeff = 0x0003C20D; /* 25182Khz...? */
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d->pfifo.regs[NV_PFIFO_CACHE1_STATUS] |= NV_PFIFO_CACHE1_STATUS_LOW_MARK;
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// PGRAPH might be blocked waiting for an increment. Simply simulate one
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// here to continue for now.
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SET_MASK(d->pgraph.regs[NV_PGRAPH_SURFACE], NV_PGRAPH_SURFACE_READ_3D, 1);
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vga_common_reset(&d->vga);
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qemu_cond_broadcast(&d->pfifo.puller_cond);
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qemu_cond_broadcast(&d->pfifo.pusher_cond);
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qemu_cond_broadcast(&d->pgraph.flip_3d);
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qemu_cond_broadcast(&d->pgraph.interrupt_cond);
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qemu_mutex_unlock(&d->pfifo.lock);
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qemu_mutex_unlock(&d->pgraph.lock);
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}
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static void nv2a_realize(PCIDevice *dev, Error **errp)
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{
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int i;
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NV2AState *d;
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d = NV2A_DEVICE(dev);
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NV2AState *d = NV2A_DEVICE(dev);
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/* setting subsystem ids again, see comment in nv2a_class_init() */
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pci_set_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID, 0);
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pci_set_word(dev->config + PCI_SUBSYSTEM_ID, 0);
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dev->config[PCI_INTERRUPT_PIN] = 0x01;
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d->pcrtc.start = 0;
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d->pramdac.core_clock_coeff = 0x00011c01; /* 189MHz...? */
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d->pramdac.core_clock_freq = 189000000;
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d->pramdac.memory_clock_coeff = 0;
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d->pramdac.video_clock_coeff = 0x0003C20D; /* 25182Khz...? */
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/* legacy VGA shit */
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VGACommonState *vga = &d->vga;
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vga_common_reset(vga);
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vga->vram_size_mb = 64;
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/* seems to start in color mode */
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vga->msr = VGA_MIS_COLOR;
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@ -470,7 +489,7 @@ static void nv2a_realize(PCIDevice *dev, Error **errp)
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memory_region_init(&d->mmio, OBJECT(dev), "nv2a-mmio", 0x1000000);
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pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
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for (i=0; i<ARRAY_SIZE(blocktable); i++) {
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for (int i=0; i < ARRAY_SIZE(blocktable); i++) {
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if (!blocktable[i].name) continue;
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memory_region_init_io(&d->block_mmio[i], OBJECT(dev),
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&blocktable[i].ops, d,
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@ -482,8 +501,6 @@ static void nv2a_realize(PCIDevice *dev, Error **errp)
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qemu_mutex_init(&d->pfifo.lock);
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qemu_cond_init(&d->pfifo.puller_cond);
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qemu_cond_init(&d->pfifo.pusher_cond);
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d->pfifo.regs[NV_PFIFO_CACHE1_STATUS] |= NV_PFIFO_CACHE1_STATUS_LOW_MARK;
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}
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static void nv2a_exitfn(PCIDevice *dev)
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@ -501,6 +518,12 @@ static void nv2a_exitfn(PCIDevice *dev)
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pgraph_destroy(&d->pgraph);
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}
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static void qdev_nv2a_reset(DeviceState *dev)
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{
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NV2AState *d = NV2A_DEVICE(dev);
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nv2a_reset(d);
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}
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static void nv2a_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -519,6 +542,7 @@ static void nv2a_class_init(ObjectClass *klass, void *data)
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k->exit = nv2a_exitfn;
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dc->desc = "GeForce NV2A Integrated Graphics";
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dc->reset = qdev_nv2a_reset;
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}
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static const TypeInfo nv2a_info = {
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